WO2023135901A1 - 電力変換装置 - Google Patents

電力変換装置 Download PDF

Info

Publication number
WO2023135901A1
WO2023135901A1 PCT/JP2022/040359 JP2022040359W WO2023135901A1 WO 2023135901 A1 WO2023135901 A1 WO 2023135901A1 JP 2022040359 W JP2022040359 W JP 2022040359W WO 2023135901 A1 WO2023135901 A1 WO 2023135901A1
Authority
WO
WIPO (PCT)
Prior art keywords
gate
signal
voltage
switching element
igbt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/040359
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
直樹 高田
茂俊 八木原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Industrial Equipment Systems Co Ltd
Original Assignee
Hitachi Industrial Equipment Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Industrial Equipment Systems Co Ltd filed Critical Hitachi Industrial Equipment Systems Co Ltd
Priority to JP2023573854A priority Critical patent/JP7635436B2/ja
Publication of WO2023135901A1 publication Critical patent/WO2023135901A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT

Definitions

  • the present invention relates to a power converter.
  • Patent Document 1 is known as a technique that can detect an abnormality in a power conversion device.
  • Patent Literature 1 discloses a technique for detecting an abnormality in a braking circuit that causes a current to flow to a braking resistor that consumes energy during regenerative operation of a power converter.
  • a power conversion device receives AC power, converts it into DC power with a rectifier circuit, and converts it into AC power with an inverter.
  • the inverter section is often composed of power semiconductors, which are switching elements.
  • the control circuit that controls the power converter is implemented by an electronic circuit that uses a microcomputer, other ICs, resistors, capacitors, and the like. Components of the control circuit are generally mounted on a substrate.
  • An abnormality such as disconnection may occur in that wire. In that case, it is necessary for the power converter to detect that an abnormality has occurred.
  • An object of the present invention is to provide a power converter that can detect an abnormality in connection with a switching element.
  • the present invention is a power conversion device having a plurality of switching elements, a driving section that drives gates of the switching elements, and a control section that outputs a control signal to the driving section,
  • the drive unit The power converter includes a gate resistor connected to the switching element and a voltage monitoring unit that detects an abnormality in connection with the switching element based on a potential difference between the gate resistor.
  • an abnormality in the connection with the switching element can be detected.
  • FIG. 1 is a circuit diagram of Example 1.
  • FIG. 4 is a timing chart of Example 1.
  • FIG. 1 is an overall schematic circuit diagram of a power converter as Example 1.
  • FIG. 1 is an overall schematic structural diagram of a power converter as Example 1.
  • FIG. 10 is a circuit diagram of Example 2;
  • FIG. 11 is a circuit diagram of Example 3;
  • 11 is a timing chart of Example 3;
  • FIG. 11 is a circuit diagram of Example 4;
  • FIG. FIG. 11 is a circuit diagram of Example 6;
  • FIG. 3 is an example of the overall circuit configuration of the power converter 1 to which the first embodiment is applied.
  • the power from the AC power supply 2 is full-wave rectified by the diode 3, smoothed by the capacitor 4, and temporarily converted to DC power.
  • the converted DC power is converted into AC power by the inverter of the power conversion device 1 .
  • the inverter has multiple IGBTs (Insulated Gate Bipolar Transistors) 5 . By switching the IGBT 5 ON or OFF, the DC power is converted into AC power of any frequency and any voltage, and the power converter 1 outputs the AC power to the load 6 .
  • IGBTs Insulated Gate Bipolar Transistors
  • a control circuit 9 that controls the power conversion device 1, an IGBT gate drive circuit 10 that drives the gate of the IGBT 5, and the like are composed of a microcomputer including a CPU and memory, ICs, semiconductors such as transistors, resistors, capacitors, and the like. . These circuits are mounted on the board 8 .
  • FIG. 4 is a diagram showing an example of the overall structure of a power converter to which this embodiment is applied.
  • Power semiconductors such as diodes and IGBTs are often provided in the form of modules enclosed in packages.
  • FIG. 4 shows an example in which the IGBT5 is configured by a module enclosed in a package.
  • a gate terminal for applying a gate signal is arranged in the IGBT5.
  • a plurality of diodes 3 and a plurality of IGBTs 5 are arranged on the cooling fins 21 in order to cool the heat generated from the power semiconductors.
  • Power semiconductors such as diodes and IGBTs 5 and capacitors 4 are wired by wiring materials 22 such as electric wires and copper bars.
  • a plurality of diodes 3 or a plurality of IGBTs 5 are connected by main circuit wiring members 23 such as electric wires and copper bars.
  • Terminals of the board 8 on which the control circuit 9 and the IGBT gate drive circuit 10 are mounted and gate terminals of the IGBTs 5 are connected by IGBT gate wirings 24 such as electric wires and copper bars.
  • An operation panel 7 is connected to the control circuit 9.
  • the operation panel 7 inputs operation information to the power conversion device from the outside and outputs information regarding the state of the power conversion device.
  • FIG. 1 is a diagram showing the IGBT gate drive circuit 10, the control circuit 9, and the IGBT 5 in the first embodiment.
  • the IGBT gate drive circuit 10 and the control circuit 9 are mounted on the substrate 8 .
  • the IGBT gate driving circuit 10 comprises a gate signal amplifier 31, a gate resistor 32 and a voltage monitor 33.
  • An IGBT gate wiring 24 for transmitting a signal for controlling the gate of the IGBT 5 is provided between the substrate 8 and the IGBT 5 .
  • the circuit of FIG. 1 shows one phase portion of the total six phases of the IGBT gate drive circuit 10 and the IGBT 5 shown in FIG.
  • the gate signal amplifier 31 amplifies the ON signal or OFF signal, which is the gate source signal from the control circuit 9, into a signal suitable for driving the IGBT gate.
  • the amplified gate control signal is supplied to the gate terminal of the IGBT via gate resistor 32 .
  • the voltage monitor 33 monitors the voltage generated in the gate resistor 32, and monitors whether or not a voltage pulse is generated immediately after outputting the ON signal to the gate of the IGBT. If a pulse is generated, it is determined to be normal, and if not generated, it is determined to be abnormal, and a signal indicating normal or abnormal is sent to the control circuit 9 of the higher order.
  • FIG. 2 shows a timing chart for the circuit of FIG.
  • the horizontal axis indicates time
  • the vertical axis indicates voltage at each site in FIG.
  • the gate source signal 41 that turns ON or OFF the gate of the IGBT output from the control circuit 9 and the gate signal that is the output voltage of the gate signal amplifier 31 that amplifies the gate source signal 41.
  • the voltage between the gate and the emitter of the IGBT (gate voltage) 43, the voltage 44 generated across the gate resistor 32, and the output voltage (disconnection signal) 45 of the voltage monitor 33 are shown.
  • the ON signal from the control circuit 9 causes the gate signal 42 of the gate signal amplifier 31 to rise. Since the gate of the IGBT is capacitive here, the IGBT gate is charged through the gate resistor 32 . Therefore, a voltage is generated across the gate resistor 32 during the charging period of the IGBT gate.
  • the voltage monitor 33 monitors the voltage between the gate resistors immediately after the IGBT turns on, and does not output the signal 45 (outputs an OFF signal) if a voltage pulse exceeding the specified value is generated. On the other hand, when the voltage between the gate resistors does not exceed the specified value, the voltage monitor 33 outputs an ON disconnection signal 45 . In this way, when there is no abnormality such as disconnection, the voltage monitor 33 is determined to be normal and the signal 45 is not output. When an abnormality such as disconnection occurs, the voltage monitor 33 outputs an abnormality signal 45, so that the abnormality can be detected.
  • control circuit 9 When the control circuit 9 receives the ON signal 45 from the voltage monitor 33, it determines that the IGBT gate wiring 24 between the substrate 8 and the IGBT 5 is broken, and controls to stop the power converter. In that case, the control circuit 9 may control the display unit such as the operation panel 7 to notify the outside that the disconnection has occurred so that the user or the administrator can grasp it. .
  • the abnormality when an abnormality occurs in the connection in the wiring between the substrate 8 and the IGBT 5, the abnormality can be detected and the operation of the power converter can be stopped.
  • FIG. 5 is a diagram showing the circuit of the second embodiment. The description of the points common to the first embodiment is omitted.
  • This embodiment is an embodiment in which two IGBTs are used in parallel. The reason why two IGBTs are used in parallel is that it is sometimes desired to increase the capacity of the current flowing through the IGBTs.
  • a gate resistor 32 connected to the gate of each IGBT is provided between the gate signal amplifier 31 and the parallel IGBT.
  • Each gate resistor 32 is provided with a voltage monitor 33 similar to that of the first embodiment.
  • the output from the voltage monitor 33 is connected to the OR circuit 51, and a detection signal is transmitted to the control circuit 9 when any of the voltage monitors 33 detects an abnormality.
  • control circuit 9 When the control circuit 9 receives a signal from the OR circuit 51 indicating that one of the IGBT gate wirings 24 connecting the two IGBTs connected in parallel to the substrate 8 is disconnected, power conversion is performed. Control to stop the device.
  • the wiring defect of the IGBT gate is detected, the control circuit 9 stops the operation of the power converter, and secondary failure can be prevented.
  • FIG. 6 is a diagram showing the circuit of the third embodiment.
  • the present embodiment is an embodiment in which the voltage monitor 33 in the first embodiment is embodied.
  • the voltage monitor 33 in FIG. 3 consists of a voltage comparator 61, an edge detector 62, a latch circuit 63 and an XOR circuit 64. Descriptions of points common to the first and second embodiments are omitted.
  • the voltage comparator 61 compares the voltage 44 across the gate resistor 32 and the reference voltage 74 .
  • the voltage comparator 61 outputs the ON signal 71 to the latch circuit 63 when the voltage 44 of the gate resistor 32 is higher than the reference voltage 74 .
  • the reference voltage 74 is preset in the voltage comparator 61. This reference voltage 74 is normally at a level lower than the pulse voltage of the voltage 44 of the gate resistor 32, and at a level at which the voltage comparator 61 does not output a signal due to noise, detection error, or the like except when the IGBT is turned on.
  • the signal from the voltage comparator 61 is sent to the input of the latch circuit 63.
  • the ON signal 71 is input to the latch circuit 63, the output signal 73 maintains the ON state, and when the reset signal 72 is input, the latch circuit 63 is reset and the output signal 73 is turned OFF.
  • the edge detector 62 detects the fall of the gate signal 42 output from the gate signal amplifier 31 and outputs the fall signal 72 .
  • the latch circuit 63 inputs the falling signal (reset signal) 72 from the edge detector 62 .
  • the output signal 73 of the latch circuit 63 and the gate signal 42 of the gate drive circuit are input to the XOR circuit 64 .
  • the XOR circuit 64 XORs (exclusive OR) the output signal 73 of the latch circuit 63 and the gate signal 42 which is the output of the gate drive circuit.
  • the output 45 of the XOR circuit 64 is normal and becomes an OFF signal.
  • the output 45 of the XOR circuit 64 is an ON signal indicating a wiring failure.
  • the control circuit 9 receives the output signal 45, detects that there is a wiring defect in the IGBT gate in the case of an abnormal signal, and controls the control circuit 9 to stop the operation of the power converter.
  • FIG. 7 shows a timing chart of the circuit of FIG.
  • the horizontal axis indicates time
  • the vertical axis indicates voltage at each portion in FIG.
  • the gate source signal 41 that turns ON or OFF the gate of the IGBT output from the control circuit 9, and the gate signal that is the output voltage of the gate signal amplifier 31 that amplifies the gate source signal 41.
  • 42 gate voltage 43 between the gate and emitter of the IGBT, voltage 44 which is the potential difference across gate resistor 32, signal 71 from voltage comparator 61, falling signal 72 of gate signal 42, output signal 73 of latch circuit 63, XOR Output voltage 45 of circuit 64 is shown.
  • the abnormality when an abnormality occurs in the connection in the wiring between the substrate 8 and the IGBT 5, the abnormality can be detected. Then, the operation of the power converter can be stopped. Also, the reference voltage 74 for determining whether or not there is an abnormality can be arbitrarily set according to the state of the circuit.
  • FIG. 8 is a diagram showing the circuit of the fourth embodiment. The description of the points common to the above-described embodiment will be omitted.
  • a circuit embodying the voltage monitor 33 in the third embodiment is provided for each gate resistance of the IGBT.
  • the voltage monitor 33 has a voltage comparator 61, an edge detector 62, a latch circuit 63 and an XOR circuit 64, as in the third embodiment.
  • the outputs of two XOR circuits 64 are connected to OR circuit 81 .
  • the OR circuit 81 outputs the logical sum of the outputs of the two XOR circuits 64 to the control circuit 9 . If any one of the IGBTs 5 connected in parallel has a wiring fault, the control circuit 9 can detect that the wiring fault has occurred by receiving an ON signal.
  • the OR circuit 81 outputs a signal indicating that one of the IGBT gate wirings 24 connecting the two IGBTs connected in parallel to the substrate 8 is broken. can be received by the control circuit 9 from. Therefore, it is possible to control to stop the power converter and prevent secondary failures.
  • FIG. 9 is a diagram showing the circuit of the fifth embodiment. The description of the points common to the above-described embodiment will be omitted.
  • This embodiment is an embodiment that implements one voltage monitor 93 per phase when IGBTs are used in parallel. This embodiment differs from the previous embodiment in that two resistors 921 and 922 connected to the gate resistor 91 and connected to the respective IGBTs are arranged. A common gate resistor 91 is provided with a voltage monitor 93 that monitors the voltage generated across the gate resistor 91 .
  • FIG. 10 shows a timing chart of this embodiment. Similar to the first embodiment, the gate resistor 91, the first resistor 921, and the second resistor 922 generate potential differences at the timing when the output voltage of the gate signal amplifier rises due to the ON signal from the control circuit at time t1.
  • the gate resistance 91 and the first resistance 921, and the gate resistance 91 and the second resistance 922 are connected in series. Therefore, the voltage generated across the gate resistor 91 is the resistance voltage division ratio.
  • the resistance voltage division ratio changes and the generated voltage changes.
  • R91 be the resistance value of the gate resistor 91
  • R92 be the resistance values of the first resistor 921 and the second resistor 922.
  • the voltage division ratio changes from R91/(R91+R92/2) to R91/(R91+R92) before and after the disconnection of the IGBT gate wiring 24 .
  • the gate voltage be VH when the IGBT turns ON. Then, before time t2, the voltage developed across gate resistor 91 is VH*R91/(R91+R92/2). After time t2, the voltage 101 generated across the gate resistor 91 becomes VH ⁇ R91/(R91+R92), and the voltage 101 generated across the gate resistor 91 becomes smaller than before the disconnection.
  • the reference voltage 102 for the voltage detection judgment of the voltage monitor 93 is when the voltage 101 generated by the gate resistor 91 is VH ⁇ R91/(R91+R92/2), the IGBT is ON, and when it is VH ⁇ R91/(R91+R92). is set to a level that does not turn on the IGBT. Voltage monitor 93 detects whether or not the potential difference generated at turn-on exceeds reference voltage 102 .
  • the voltage monitor 93 When the potential difference generated when the IGBT 5 is turned on exceeds the reference voltage 102, the voltage monitor 93 outputs a normal OFF signal 45 to the control circuit 9.
  • the voltage monitor 93 When the potential difference of the gate resistor 91 generated when the IGBT 5 is turned on is below the reference voltage 102, or the potential difference pulse of the gate resistor 91 is not generated, the voltage monitor 93 outputs an abnormal ON signal 45 to the control circuit 9.
  • one voltage monitor 93 per phase can be configured, and it can be determined that the wiring of the IGBT gate is faulty. Also, secondary failures can be prevented.
  • FIG. 11 is a diagram showing the circuit of the fifth embodiment. The description of the points common to the above-described embodiment will be omitted.
  • the circuit of the voltage monitor 33 in the third embodiment is used as the specific circuit of the voltage monitor 93 in the circuit configuration of FIG. 9 which is the fifth embodiment.
  • the voltage monitor 93 in FIG. 9 is composed of a voltage comparator 61, an edge detector 62, a latch circuit 63 and an XOR circuit 64.
  • the reference voltage of the voltage comparator 61 is the reference voltage 102 as in the fifth embodiment.
  • the voltage detected by the voltage comparator is different from that in the third embodiment, but other operations are the same as in the third embodiment.
  • the IGBTs 5 when the IGBTs 5 are used in parallel, it is not necessary to provide two voltage monitors for each gate resistance of the IGBT, unlike the second and fourth embodiments.
  • the IGBT has one gate resistor 91 and only one voltage monitor connected to one gate resistor 91 suffices. Also according to this embodiment, it is possible to determine whether there is a wiring defect to the gate of the IGBT. Also, secondary failures can be prevented.
  • Embodiments 1 to 6 it is possible to prevent damage to parts such as IGBTs of the power conversion device and to suppress wasteful power consumption. As a result, resources such as parts can be used effectively and waste can be eliminated, thereby contributing to the realization of a society that does not adversely affect the global environment through environmental conservation.
  • IGBT was used as an example, but it may be replaced with other switching elements such as MOSFET.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)
PCT/JP2022/040359 2022-01-17 2022-10-28 電力変換装置 Ceased WO2023135901A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023573854A JP7635436B2 (ja) 2022-01-17 2022-10-28 電力変換装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022005374 2022-01-17
JP2022-005374 2022-01-17

Publications (1)

Publication Number Publication Date
WO2023135901A1 true WO2023135901A1 (ja) 2023-07-20

Family

ID=87278762

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2022/040359 Ceased WO2023135901A1 (ja) 2022-01-17 2022-10-28 電力変換装置

Country Status (3)

Country Link
JP (1) JP7635436B2 (https=)
TW (1) TWI842259B (https=)
WO (1) WO2023135901A1 (https=)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003143833A (ja) * 2001-11-01 2003-05-16 Hitachi Ltd 半導体スイッチング素子のゲート駆動装置
JP2012186937A (ja) * 2011-03-07 2012-09-27 Denso Corp スイッチング素子の駆動回路
JP2013247734A (ja) * 2012-05-24 2013-12-09 Mitsubishi Electric Corp インバータ装置およびインバータ装置の異常検出方法
WO2021241137A1 (ja) * 2020-05-27 2021-12-02 株式会社日立製作所 故障検知装置及びその方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018093684A (ja) * 2016-12-07 2018-06-14 ルネサスエレクトロニクス株式会社 半導体装置および電力変換装置
JP2018107693A (ja) * 2016-12-27 2018-07-05 ルネサスエレクトロニクス株式会社 半導体装置および電力変換装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003143833A (ja) * 2001-11-01 2003-05-16 Hitachi Ltd 半導体スイッチング素子のゲート駆動装置
JP2012186937A (ja) * 2011-03-07 2012-09-27 Denso Corp スイッチング素子の駆動回路
JP2013247734A (ja) * 2012-05-24 2013-12-09 Mitsubishi Electric Corp インバータ装置およびインバータ装置の異常検出方法
WO2021241137A1 (ja) * 2020-05-27 2021-12-02 株式会社日立製作所 故障検知装置及びその方法

Also Published As

Publication number Publication date
TW202331282A (zh) 2023-08-01
TWI842259B (zh) 2024-05-11
JPWO2023135901A1 (https=) 2023-07-20
JP7635436B2 (ja) 2025-02-25

Similar Documents

Publication Publication Date Title
US11183835B2 (en) Short circuit detection and protection for a gate driver circuit and methods of detecting the same using logic analysis
CN106324465B (zh) 半导体装置和故障检测方法
US7675763B2 (en) Semiconductor power converter apparatus
US8841940B2 (en) System and method for a driver circuit
JP5574845B2 (ja) 電力変換装置
US7583109B2 (en) Apparatus and methods for monitoring parallel-connected power switching devices responsive to drive circuit parameters
US11217986B2 (en) Intelligent power module including semiconductor elements of a plurality of phases drive circuits of a plurality of phases and a plurality of temperature detection elements
JP4942804B2 (ja) 半導体電力変換装置
JP2009019953A (ja) 半導体装置の劣化検出方法
US20180269677A1 (en) Semiconductor element driving device
JP6656501B1 (ja) 電力変換装置、半導体チップの寿命診断装置、及び半導体チップの寿命診断方法
WO2019146258A1 (ja) 半導体装置及び電力変換装置
JP5182243B2 (ja) パワーモジュール
CN110596563B (zh) 电力变换装置及其功率半导体器件健康状态自检方法
JP4729663B2 (ja) 高電圧または高い強度の電流を制御するための半導体回路構造
JP4493865B2 (ja) 半導体装置
JP7635436B2 (ja) 電力変換装置
JP2010268662A (ja) インバータの故障検出装置
US12510582B2 (en) Semiconductor device
JP2007330028A (ja) 電力変換装置及び電力変換装置の保護方法
CN107294364A (zh) 开关系统、开关组件及故障保护方法
JP7252004B2 (ja) 電力変換装置
US20220077765A1 (en) Switching apparatus and electric-power conversion apparatus
US20250085330A1 (en) Control circuit and semiconductor module
KR20210065761A (ko) 전력 반도체 소자의 쇼트 서킷 검출 장치 및 전력 반도체 시스템

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22920423

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2023573854

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 22920423

Country of ref document: EP

Kind code of ref document: A1