WO2023133874A1 - 显示模组及其制作方法、显示装置 - Google Patents
显示模组及其制作方法、显示装置 Download PDFInfo
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- WO2023133874A1 WO2023133874A1 PCT/CN2022/072264 CN2022072264W WO2023133874A1 WO 2023133874 A1 WO2023133874 A1 WO 2023133874A1 CN 2022072264 W CN2022072264 W CN 2022072264W WO 2023133874 A1 WO2023133874 A1 WO 2023133874A1
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- Prior art keywords
- circuit board
- pads
- row
- board pads
- substrate
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 238000000034 method Methods 0.000 title abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 151
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 230000003190 augmentative effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 230000006870 function Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
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- 239000002210 silicon-based material Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Definitions
- the present disclosure relates to the field of display technology, in particular to a display module, a manufacturing method thereof, and a display device.
- OLED Organic Light-Emitting Diode, organic light-emitting diode, referred to as OLED
- OLED Organic Light-Emitting Diode
- OLED organic light-emitting diode
- a silicon-based OLED microdisplay is a display device that integrates millions or even more light-emitting pixels on a substrate (silicon-based material) with a size below 2 inches.
- a substrate silicon-based material
- AR augmented reality
- VR virtual reality
- the technical problem to be solved in the present disclosure is to provide a display module, its manufacturing method, and a display device, which can improve the process yield and reliability of the display module.
- a display module including:
- a circuit board the circuit board includes a first binding area, the first binding area is provided with two rows of circuit board pads, and each row of circuit board pads includes a plurality of circuit boards arranged at intervals along the first direction Pad;
- a display substrate located on the circuit board includes a second binding area, the second binding area is provided with a plurality of substrate pads arranged along the first direction, the display substrate is on the The orthographic projection on the circuit board does not coincide with the first binding area, and the second binding area is close to the first binding area;
- the circuit board pad is bound to the substrate pad through a suspended wire
- the two rows of circuit board pads include a first row of circuit board pads and a second row of circuit board pads
- the second row of circuit board pads includes first circuit board pads and second circuit board pads, the first circuit board pads and the second circuit board pads are arranged alternately, and the second circuit board pads are arranged alternately. There is no trace bound to the substrate pads on the board pads, and the distance between the first row of circuit board pads is smaller than the distance between the second row of circuit board pads.
- the area of the orthographic projection of the first circuit board pad on the display substrate is larger than the area of the orthographic projection of the second circuit board pad on the display substrate.
- the area of the orthographic projection of the first circuit board pad on the display substrate is larger than the area of the substrate pad, and the orthographic projection of the second circuit board pad on the display substrate The area is larger than the area of the substrate pad.
- the first circuit board pads and the second circuit board pads are arranged at intervals, and the numbers are equal.
- the substrate pads include multiple sets of first pads for transmitting high-speed differential signals and second pads other than the first pads, and each set of first pads includes two two first pads, no second pad is provided between two first pads, and at least one second pad is provided between two groups of adjacent first pads, Each group of first pads is connected to the corresponding circuit board pads with the same length of wires.
- the length of the trace connecting the second row of circuit board pads and the substrate pad is greater than the length of the trace connecting the first row of circuit board pads and the substrate pad.
- the maximum width of the circuit board pad in the second direction is greater than the maximum width in the first direction, and the second direction is perpendicular or substantially perpendicular to the first direction.
- the second circuit board pad is located in the middle of the second row of circuit board pads.
- the included angle between the first orthographic projection of the connection line between the first row of circuit board pads and the substrate pads on the circuit board and the extending direction of the first row of circuit board pads smaller than the included angle between the first orthographic projection of the line connecting the second row of circuit board pads and the substrate pads on the circuit board with the extending direction of the second row of circuit board pads.
- the distance between the first row of circuit board pads and the second row of circuit board pads is smaller than the distance between adjacent circuit board pads in the first row of circuit board pads.
- the orthographic projection of the first binding area in the first direction exceeds the orthographic projection of the second binding area in the first direction, and the first binding area is in The minimum distance between the first boundary in the second direction and the second boundary of the second binding region in the second direction is less than a preset first threshold, the second direction is perpendicular to the first direction, or Roughly vertical.
- the orthographic projection of the first binding area in the first direction is located within the orthographic projection of the second binding area in the first direction.
- an included angle between the trace and a second direction is smaller than a preset second threshold, and the second direction is perpendicular or substantially perpendicular to the first direction.
- the extension length of the first binding region along the first direction is greater than the extension length of the second binding region along the first direction.
- circuit board pads in the first row of circuit board pads and the circuit board pads in the second row of circuit board pads are alternately arranged in the first direction.
- the length of the connection between the first pads of each group and the corresponding circuit board pads is greater than that of the first row of circuit board pads and the second row of circuit board pads in the second direction.
- the second direction is perpendicular or substantially perpendicular to the first direction.
- the display area of the display substrate includes a plurality of sub-pixels, and the distance between the first row of circuit board pads and the second row of circuit board pads in the second direction is greater than the maximum of the sub-pixels. Width, the second direction is perpendicular or substantially perpendicular to the first direction.
- the maximum width of the second circuit board pad in the second direction is smaller than the maximum width of the first circuit board pad in the second direction, and the second direction is different from the first direction. Vertical or approximately vertical.
- the number of pads on the first circuit board is greater than the number of pads on the second circuit board.
- An embodiment of the present disclosure also provides a display device, including the above-mentioned display module.
- Embodiments of the present disclosure also provide a method for manufacturing a display module, including:
- a circuit board is provided, the circuit board includes a first binding area, the first binding area is provided with two rows of circuit board pads, and each row of circuit board pads includes a plurality of circuits arranged at intervals along a first direction board pad;
- a display substrate is formed on the circuit board, the display substrate includes a second binding area, and a plurality of substrate pads arranged along the first direction are arranged on the second binding area, and the display substrate is placed on the second binding area.
- the orthographic projection on the circuit board does not coincide with the first binding area, and the second binding area is close to the first binding area;
- the two rows of circuit board pads include a first row of circuit board pads and a second row of circuit board pads
- the second row of circuit board pads includes first circuit board pads and second circuit board pads, the first circuit board pads and the second circuit board pads are arranged alternately, and the second circuit board pads are arranged alternately. There is no trace bound to the substrate pads on the board pads, and the distance between the first row of circuit board pads is smaller than the distance between the second row of circuit board pads.
- circuit board pads are arranged on the circuit board, so that the layout of the circuit board pads is more concentrated, which can reduce the width of the first binding area, and make the circuit board pads closer to the substrate pads,
- the length of the traces bound to the pads of the circuit board and the pads of the substrate can be reduced, and the bonding angle of the traces can be increased to ensure the reliability of the bonding process.
- FIG. 1 and Figure 2 are schematic diagrams of existing display modules
- 3-5 are schematic diagrams of a display module according to an embodiment of the present disclosure.
- a row of circuit board pads 5 is arranged on the circuit board 2, and the circuit board pads 5 are arranged along the first direction; plate 6, and the substrate pads 6 are arranged along the first direction; the circuit board pads 5 and the substrate pads 6 are bound by the traces 4, and the circuit board pads 5, the traces 4 and the substrate pads 6 are coated with Protective glue3.
- the process of binding circuit board pads 5 and substrate pads 6 through traces 4 is called a wire bonding process. Since the manufacturing accuracy of the circuit board is much worse than that of the display substrate, when the number of circuit board pads is equal to that of the substrate When the number of pads is equal, the width of the area where the circuit board pads are located will be much larger than the width of the display substrate.
- Embodiments of the present disclosure provide a display module, a manufacturing method thereof, and a display device, which can improve the process yield and reliability of the display module.
- An embodiment of the present disclosure provides a display module, including:
- a circuit board the circuit board includes a first binding area, the first binding area is provided with two rows of circuit board pads, and each row of circuit board pads includes a plurality of circuit boards arranged at intervals along the first direction Pad;
- a display substrate located on the circuit board includes a second binding area, the second binding area is provided with a plurality of substrate pads arranged along the first direction, the display substrate is on the The orthographic projection on the circuit board does not coincide with the first binding area, and the second binding area is close to the first binding area;
- the circuit board pad is bound to the substrate pad through a suspended wire
- the two rows of circuit board pads include a first row of circuit board pads and a second row of circuit board pads
- the second row of circuit board pads includes first circuit board pads and second circuit board pads, the first circuit board pads and the second circuit board pads are arranged alternately, and the second circuit board pads are arranged alternately. There is no trace bound to the substrate pads on the board pads, and the distance between the first row of circuit board pads is smaller than the distance between the second row of circuit board pads.
- two rows of circuit board pads are arranged on the circuit board, so that the layout of the circuit board pads is more concentrated, which can reduce the width of the first binding area, and make the circuit board pads closer to the substrate pads , reduce the length of the wiring that binds the pad of the circuit board and the pad of the substrate, and can increase the binding angle of the wiring to ensure the reliability of the bonding process.
- the wires may be made of metals with good electrical conductivity, such as aluminum, gold, and the like.
- the display substrate may be a silicon-based display substrate.
- the display substrate is not limited to a silicon-based display substrate, and may be other types of display substrates.
- the number of pads on the circuit board can be slightly greater than the number of pads on the substrate.
- circuit board pads not only two rows of circuit board pads may be provided in the first binding area, but also three rows of circuit board pads or more rows of circuit board pads may be provided.
- two rows of circuit board pads 5 are arranged on the circuit board 2, and the circuit board pads 5 are arranged along the first direction;
- the pads 6 and the pads 6 of the substrate are arranged along the first direction;
- the at least two rows of circuit board pads include a first row of circuit board pads and a second row of circuit board pads
- the substrate pads include multiple groups for A first pad 61 for transmitting high-speed differential signals and a second pad 62 other than the first pad, each group of the first pads includes two of the first pads 61, two of the first pads The second pad 62 is not provided between the first pads 61 , and at least one second pad 62 is provided between two groups of adjacent first pads 61 .
- the traces 4 connected to the same group of first pads 61 need to meet the requirements of equal length and width. equal.
- the first pads 61 are bound to the circuit board pads of the first row of circuit board pads in a one-to-one correspondence.
- the number of the first pads 61 may be equal to or not equal to the number of the first row of circuit board pads.
- the same group of first pads 61 is connected to the closest pair of circuit board pads in the same row, and the traces 4 connected to the same group of first pads 61 can meet the requirements of equal length and width. Thereby ensuring the integrity of high-speed differential signals.
- the second row of circuit board pads may be located on a side of the first row of circuit board pads away from the display substrate.
- the second row of circuit board pads may also be located on a side of the first row of circuit board pads that is close to the display substrate.
- the length of the connection between the second row of circuit board pads and the substrate pads is greater than The wiring length of the connection between the first row of circuit board pads and the substrate pads.
- the circuit board pads bound to the second pads includes first circuit board pads 53 and second circuit board pads 52, the first circuit board pads The board pads 53 and the second circuit board pads 52 are alternately arranged, the second circuit board pads 52 are not provided with wiring bound to the substrate pads, and the first circuit board pads are The number of pads 53 may be greater than the number of pads 52 of the second circuit board.
- the area of the orthographic projection of the first circuit board pads 53 on the display substrate may be larger than the area of the second circuit board pads 52 on the display substrate.
- the area of the orthographic projection on the display substrate, specifically, the maximum width of the second circuit board pad in the second direction is smaller than the maximum width of the first circuit board pad in the second direction, and the second The maximum width of the pad of the circuit board in the first direction may be smaller than or equal to the maximum width of the pad of the first circuit board in the first direction.
- the number of circuit board pads that need to be bound to the second pads in the second row of circuit board pads is relatively small. So the second row can be provided with relatively few circuit board pads, in order to ensure the even arrangement of the second row of circuit board pads, the distance between the first row of circuit board pads (that is, the distance between the first row of circuit board pads) , the distance between adjacent circuit pads) is smaller than the distance between the second row of circuit board pads (that is, the distance between adjacent circuit pads in the second row of circuit board pads).
- the distance between adjacent circuit board pads in the first row of circuit board pads is d, and the width of the circuit board pads in the first direction is S; the second row of circuit board pads The distance between adjacent circuit board pads is 2d+S.
- the layout space is small, and the circuit board pads are arranged in two rows, so the layout space is relatively large, so the area of the orthographic projection of the first circuit board pads on the display substrate is larger than The area of the pad of the substrate, the area of the orthographic projection of the pad of the second circuit board on the display substrate is larger than the area of the pad of the substrate, which can reduce the difficulty of binding.
- the second circuit board pad 52 is located in the middle of the second row of circuit board pads.
- the second circuit board pad 52 is not limited to be located in the middle of the second row of circuit board pads, and may also be located in other areas of the second row of circuit board pads.
- the binding angle of the second row of circuit board pads can be reduced, and the first row of circuit board pads and the first row of circuit board pads can be reduced.
- the included angle between the first orthographic projection of the connection line of the substrate pad on the circuit board and the extending direction of the first row of circuit board pads is smaller than that of the second row of circuit board pads and the substrate pad.
- the length of the connection between the first pad and the corresponding circuit board pad in each group is longer than that between the first row of circuit board pads and the first row of circuit board pads.
- circuit board pads in the first row of circuit board pads are arranged alternately in the first direction, and the circuit board pads in two adjacent rows of circuit board pads are staggered by a set distance in the first direction.
- the set distance may be 1/2 of S, and S is the width of the solder pad on the circuit board in the first direction.
- the set distance is not limited to 1/2 of S, and can be other values.
- the number of single-row circuit board pads can be reduced, the width of the first binding area can be reduced, and the first binding area can be closer to the middle of the display substrate, thereby
- the distance between the circuit board pad on the edge of the first binding area and the substrate pad on the edge of the second binding area is reduced as much as possible, the length of the wiring 4 is reduced, and the distance between the wiring 4 and the second direction can be reduced.
- the included angle between them is smaller than the preset second threshold, and the binding angle is increased to ensure the reliability of the wire bonding process.
- the second direction is perpendicular or substantially perpendicular to the first direction.
- the maximum width of the circuit board pad 5 in the second direction is greater than the maximum width in the first direction, and the maximum width in the second direction perpendicular or substantially perpendicular to the first direction.
- the distance between the first row of circuit board pads and the second row of circuit board pads is smaller than that of the first row The distance between adjacent board pads in the board pads.
- the orthographic projection of the first binding area in the first direction exceeds the orthographic projection of the second binding area in the first direction, and the first binding area is in The minimum distance between the first boundary in the second direction and the second boundary of the second binding region in the second direction is less than a preset first threshold, the second direction is perpendicular to the first direction, In this way, the distance between the circuit board pads on the edge of the first bonding area and the substrate pads on the edge of the second bonding area can be as small as possible.
- the extension length of the first binding region along the first direction may also be greater than the extension length of the second binding region along the first direction.
- the orthographic projection of the first binding area in the first direction may be located within the orthographic projection of the second binding area in the first direction, so that the first binding The distance between the circuit board pads at the edge of the area and the substrate pads at the edge of the second bonding area is as small as possible.
- the first row of circuit board pads is bound to the substrate pads through a first trace
- the second row of circuit board pads is bound to the substrate pads through a second trace.
- the substrate pads are bound
- the second row of circuit board pads is located on the side of the first row of circuit board pads away from the display substrate
- the first trace and the second trace are arcs
- the first trace is located on the side of the second trace close to the circuit board.
- the traces bound on the pads of the two rows of circuit boards can be avoided by using arcs of different heights. The lines interfere with each other.
- the display area of the display substrate includes a plurality of sub-pixels, and the distance between the first row of circuit board pads and the second row of circuit board pads in the second direction is greater than the maximum of the sub-pixels. Width, which can avoid interference between traces bonded on two rows of board pads.
- An embodiment of the present disclosure also provides a display device, including the above-mentioned display module.
- the display device includes but not limited to: a radio frequency unit, a network module, an audio output unit, an input unit, a sensor, a display unit, a user input unit, an interface unit, a memory, a processor, and a power supply.
- a radio frequency unit a network module
- an audio output unit an input unit
- a sensor a sensor
- a display unit a user input unit
- an interface unit a memory
- a processor and a power supply.
- the display device includes but is not limited to a monitor, a mobile phone, a tablet computer, a television, a wearable electronic device, a navigation display device, and the like.
- the display device can be any product or component with a display function such as a TV, a monitor, a digital photo frame, a mobile phone, and a tablet computer, wherein the display device also includes a flexible circuit board, a printed circuit board, and a backplane.
- Embodiments of the present disclosure also provide a method for manufacturing a display module, including:
- a circuit board is provided, the circuit board includes a first binding area, the first binding area is provided with two rows of circuit board pads, and each row of circuit board pads includes a plurality of circuits arranged at intervals along a first direction board pad;
- a display substrate is formed on the circuit board, the display substrate includes a second binding area, and a plurality of substrate pads arranged along the first direction are arranged on the second binding area, and the display substrate is placed on the second binding area.
- the orthographic projection on the circuit board does not coincide with the first binding area, and the second binding area is close to the first binding area;
- the two rows of circuit board pads include a first row of circuit board pads and a second row of circuit board pads
- the second row of circuit board pads includes first circuit board pads and second circuit board pads, the first circuit board pads and the second circuit board pads are arranged alternately, and the second circuit board pads are arranged alternately. There is no trace bound to the substrate pads on the board pads, and the distance between the first row of circuit board pads is smaller than the distance between the second row of circuit board pads.
- two rows of circuit board pads are arranged on the circuit board, so that the layout of the circuit board pads is more concentrated, which can reduce the width of the first binding area, and make the circuit board pads closer to the substrate pads , reduce the length of the wiring that binds the pad of the circuit board and the pad of the substrate, and can increase the binding angle of the wiring to ensure the reliability of the bonding process.
- the wires may be made of metals with good electrical conductivity, such as aluminum, gold, and the like.
- the display substrate may be a silicon-based display substrate.
- the display substrate is not limited to a silicon-based display substrate, and may be other types of display substrates.
- the number of pads on the circuit board can be slightly greater than the number of pads on the substrate.
- not only two rows of circuit board pads can be formed in the first bonding area, but also three rows of circuit board pads or more rows of circuit board pads can be formed.
- two rows of circuit board pads 5 are formed on the circuit board 2, and the circuit board pads 5 are all arranged along the first direction; a row of substrate pads 5 is formed on the display substrate 1.
- the pads 6 and the pads 6 of the substrate are arranged along the first direction;
- circuit board pads 5 are arranged on the circuit board 2, and the circuit board pads 5 are arranged along the first direction;
- the pads 6 and the pads 6 of the substrate are arranged along the first direction;
- the at least two rows of circuit board pads include a first row of circuit board pads and a second row of circuit board pads
- the substrate pads include multiple groups for A first pad 61 for transmitting high-speed differential signals and a second pad 62 other than the first pad, each group of the first pads includes two of the first pads 61, two of the first pads The second pad 62 is not provided between the first pads 61 , and at least one second pad 62 is provided between two groups of adjacent first pads 61 .
- the traces 4 connected to the same group of first pads 61 need to meet the requirements of equal length and width. equal.
- the first pads 61 are bound to the circuit board pads of the first row of circuit board pads in a one-to-one correspondence.
- the number of the first pads 61 may be equal to or not equal to the number of the first row of circuit board pads.
- the same group of first pads 61 is connected to the closest pair of circuit board pads in the same row, and the traces 4 connected to the same group of first pads 61 can meet the requirements of equal length and width. Thereby ensuring the integrity of high-speed differential signals.
- the second row of circuit board pads may be located on a side of the first row of circuit board pads away from the display substrate.
- the second row of circuit board pads may also be located on a side of the first row of circuit board pads that is close to the display substrate.
- the length of the connection between the second row of circuit board pads and the substrate pads is greater than The wiring length of the connection between the first row of circuit board pads and the substrate pads.
- the circuit board pads bound to the second pads includes first circuit board pads 53 and second circuit board pads 52, the first circuit board pads The board pads 53 and the second circuit board pads 52 are alternately arranged, and the second circuit board pads 52 are not provided with traces bound to the substrate pads.
- the area of the first circuit board pad 53 may be greater than the area of the second circuit board pad 52 .
- the number of circuit board pads that need to be bound to the second pads in the second row of circuit board pads is relatively small. So the second row can be provided with relatively few circuit board pads, in order to ensure the even arrangement of the second row of circuit board pads, the distance between the first row of circuit board pads (that is, the distance between the first row of circuit board pads) , the distance between adjacent circuit pads) is smaller than the distance between the second row of circuit board pads (that is, the distance between adjacent circuit pads in the second row of circuit board pads).
- the distance between adjacent circuit board pads in the first row of circuit board pads is d, and the width of the circuit board pads in the first direction is S; the second row of circuit board pads The distance between adjacent circuit board pads is 2d+S.
- the layout space is small, and the circuit board pads are arranged in two rows, and the layout space is relatively large, so the area of the first circuit board pad is larger than the area of the substrate pad, and the second The area of the pads of the second circuit board is larger than that of the pads of the substrate, which can reduce the difficulty of bonding.
- the second circuit board pad 52 is located in the middle of the second row of circuit board pads.
- the second circuit board pad 52 is not limited to be located in the middle of the second row of circuit board pads, and may also be located in other areas of the second row of circuit board pads.
- the binding angle of the second row of circuit board pads can be reduced, and the first row of circuit board pads and the first row of circuit board pads can be reduced.
- the included angle between the first orthographic projection of the connection line of the substrate pad on the circuit board and the extending direction of the first row of circuit board pads is smaller than that of the second row of circuit board pads and the substrate pad.
- the length of the connection between the first pad and the corresponding circuit board pad in each group is longer than that between the first row of circuit board pads and the first row of circuit board pads.
- circuit board pads in the first row of circuit board pads are arranged alternately in the first direction, and the circuit board pads in two adjacent rows of circuit board pads are staggered by a set distance in the first direction.
- the set distance may be 1/2 of S, and S is the width of the solder pad on the circuit board in the first direction.
- the set distance is not limited to 1/2 of S, and can also be other values.
- the number of single-row circuit board pads can be reduced, the width of the first binding area can be reduced, and the first binding area can be closer to the middle of the display substrate, thereby
- the distance between the circuit board pad on the edge of the first binding area and the substrate pad on the edge of the second binding area is reduced as much as possible, the length of the wiring 4 is reduced, and the distance between the wiring 4 and the second direction can be reduced.
- the included angle between them is smaller than the preset second threshold, and the binding angle is increased to ensure the reliability of the wire bonding process.
- the second direction is perpendicular or substantially perpendicular to the first direction.
- the maximum width of the circuit board pad 5 in the second direction is greater than the maximum width in the first direction, and the maximum width in the second direction perpendicular or substantially perpendicular to the first direction.
- the distance between the first row of circuit board pads and the second row of circuit board pads is smaller than that of the first row The distance between adjacent board pads in the board pads.
- the orthographic projection of the first binding area in the first direction exceeds the orthographic projection of the second binding area in the first direction, and the first binding area is in The minimum distance between the first boundary in the second direction and the second boundary of the second binding region in the second direction is less than a preset first threshold, the second direction is perpendicular to the first direction, In this way, the distance between the circuit board pads on the edge of the first bonding area and the substrate pads on the edge of the second bonding area can be as small as possible.
- the extension length of the first binding region along the first direction may also be greater than the extension length of the second binding region along the first direction.
- the orthographic projection of the first binding area in the first direction may be located within the orthographic projection of the second binding area in the first direction, so that the first binding The distance between the circuit board pads at the edge of the area and the substrate pads at the edge of the second bonding area is as small as possible.
- the first row of circuit board pads is bound to the substrate pads through a first trace
- the second row of circuit board pads is bound to the substrate pads through a second trace.
- the substrate pads are bound
- the second row of circuit board pads is located on the side of the first row of circuit board pads away from the display substrate
- the first trace and the second trace are arcs
- the first trace is located on the side of the second trace close to the circuit board.
- the traces bound on the pads of the two rows of circuit boards can be avoided by using arcs of different heights. The lines interfere with each other.
- the display area of the display substrate includes a plurality of sub-pixels, and the distance between the first row of circuit board pads and the second row of circuit board pads in the second direction is greater than the maximum of the sub-pixels. Width, which can avoid interference between traces bonded on two rows of board pads.
- each embodiment in this specification is described in a progressive manner, the same and similar parts of each embodiment can be referred to each other, and each embodiment focuses on the differences from other embodiments.
- the description is relatively simple, and for related parts, please refer to the description of the product embodiment.
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Abstract
本公开提供了一种显示模组及其制作方法、显示装置，属于显示技术领域。显示模组包括：电路板的第一绑定区域设置第一排电路板焊盘和第二排电路板焊盘，每排电路板焊盘包括沿第一方向间隔排列的多个电路板焊盘；显示基板的第二绑定区域上设置有多个沿第一方向排列的基板焊盘，显示基板在电路板上的正投影与第一绑定区域不重合，第二绑定区域靠近第一绑定区域；电路板焊盘通过悬空的走线与基板焊盘绑定；第二排电路板焊盘包括第一电路板焊盘和第二电路板焊盘，第二电路板焊盘上未设置与基板焊盘绑定的走线，第一排电路板焊盘之间的距离小于第二排电路板焊盘之间的距离。本公开的技术方案能够提高显示模组的工艺良率与可靠性。
Description
本公开涉及显示技术领域，特别是指一种显示模组及其制作方法、显示装置。
OLED(Organic Light-Emitting Diode，有机发光二极管，简称OLED)显示装置由于具有薄、轻、宽视角、主动发光、发光颜色连续可调、成本低、响应速度快、能耗小、驱动电压低、工作温度范围宽、生产工艺简单、发光效率高及可柔性显示等优点，已被列为极具发展前景的下一代显示技术。
硅基OLED微型显示器是在一个尺寸在2寸以下的基底(硅基材料)上集成上百万甚至更多的发光像素的显示器件。近年，随着AR(增强现实)/VR(虚拟现实)等高新科技产物的出现，对于硅基OLED微型显示器的需求不断提高。
发明内容
本公开要解决的技术问题是提供一种显示模组及其制作方法、显示装置，能够提高显示模组的工艺良率与可靠性。
为解决上述技术问题，本公开的实施例提供技术方案如下：
一方面，提供一种显示模组，包括：
电路板，所述电路板包括第一绑定区域，所述第一绑定区域设置有两排电路板焊盘，每排所述电路板焊盘包括沿第一方向间隔排列的多个电路板焊盘；
位于所述电路板上的显示基板，所述显示基板包括第二绑定区域，所述第二绑定区域上设置有多个沿第一方向排列的基板焊盘，所述显示基板在所述电路板上的正投影与所述第一绑定区域不重合，所述第二绑定区域靠近所述第一绑定区域；
所述电路板焊盘通过悬空的走线与所述基板焊盘绑定；
其中，所述两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，
所述第二排电路板焊盘包括第一电路板焊盘和第二电路板焊盘，所述第一电路板焊盘和所述第二电路板焊盘交替排布，所述第二电路板焊盘上未设置与所述基板焊盘绑定的走线，所述第一排电路板焊盘之间的距离小于所述第二排电路板焊盘之间的距离。
一些实施例中，所述第一电路板焊盘在所述显示基板上的正投影的面积大于所述第二电路板焊盘在所述显示基板上的正投影的面积。
一些实施例中，所述第一电路板焊盘在所述显示基板上的正投影的面积大于所述基板焊盘的面积，所述第二电路板焊盘在所述显示基板上的正投影的面积大于所述基板焊盘的面积。
一些实施例中，所述第二排电路板焊盘中，所述第一电路板焊盘与所述第二电路板焊盘间隔设置，且数量相等。
一些实施例中，所述基板焊盘包括多组用于传输高速差分信号的第一焊盘和除所述第一焊盘之外的第二焊盘，每组所述第一焊盘包括两个所述第一焊盘，两个所述第一焊盘之间未设置所述第二焊盘，两组相邻的所述第一焊盘之间设置至少一个所述第二焊盘，每组第一焊盘与对应的电路板焊盘的连接的走线长度相等。
一些实施例中，所述第二排电路板焊盘与基板焊盘的连接的走线长度大于所述第一排电路板焊盘与基板焊盘的连接的走线长度。
一些实施例中，所述电路板焊盘在第二方向上的最大宽度大于在所述第一方向上的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，所述第二电路板焊盘位于所述第二排电路板焊盘的中部。
一些实施例中，所述第一排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第一排电路板焊盘的延伸方向的夹角，小于所述第二排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第二排电路板焊盘的延伸方向的夹角。
一些实施例中，所述第一排电路板焊盘与所述第二排电路板焊盘之间的 距离小于所述第一排电路板焊盘中相邻电路板焊盘之间的距离。
一些实施例中，所述第一绑定区域在所述第一方向上的正投影超出所述第二绑定区域在所述第一方向上的正投影，且所述第一绑定区域在第二方向上的第一边界与所述第二绑定区域在第二方向上的第二边界之间的最小距离小于预设第一阈值，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，所述第一绑定区域在所述第一方向上的正投影位于所述第二绑定区域在所述第一方向上的正投影内。
一些实施例中，所述走线与第二方向之间的夹角小于预设第二阈值，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，所述第一绑定区域沿第一方向的延伸长度大于所述第二绑定区域沿第一方向的延伸长度。
一些实施例中，所述第一排电路板焊盘中的电路板焊盘与所述第二排电路板焊盘中的电路板焊盘在所述第一方向上交错排列。
一些实施例中，每组所述第一焊盘与对应的电路板焊盘的连接的走线长度大于所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，所述显示基板的显示区域包括多个子像素，所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离大于所述子像素的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，所述第二电路板焊盘在第二方向上的最大宽度小于所述第一电路板焊盘在第二方向上的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，所述第一电路板焊盘的数量大于所述第二电路板焊盘的数量。
本公开的实施例还提供了一种显示装置，包括如上所述的显示模组。
本公开的实施例还提供了一种显示模组的制作方法，包括：
提供电路板，所述电路板包括第一绑定区域，所述第一绑定区域设置有两排电路板焊盘，每排所述电路板焊盘包括沿第一方向间隔排列的多个电路 板焊盘；
在所述电路板上形成显示基板，所述显示基板包括第二绑定区域，所述第二绑定区域上设置有多个沿第一方向排列的基板焊盘，所述显示基板在所述电路板上的正投影与所述第一绑定区域不重合，所述第二绑定区域靠近所述第一绑定区域；
形成绑定所述电路板焊盘与所述基板焊盘的悬空的走线；
其中，所述两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，
所述第二排电路板焊盘包括第一电路板焊盘和第二电路板焊盘，所述第一电路板焊盘和所述第二电路板焊盘交替排布，所述第二电路板焊盘上未设置与所述基板焊盘绑定的走线，所述第一排电路板焊盘之间的距离小于所述第二排电路板焊盘之间的距离。
本公开的实施例具有以下有益效果：
上述方案中，电路板上设置有两排电路板焊盘，使得电路板焊盘的排布更加集中，这样能够降低第一绑定区域的宽度，并且使得电路板焊盘更靠近基板焊盘，减少绑定电路板焊盘和基板焊盘的走线的长度，并且能够增加走线的绑定角，保证打线工艺的可靠性。
图1和图2为现有显示模组的示意图；
图3-图5为本公开实施例显示模组的示意图。
附图标记
1 显示基板
2 电路板
3 保护胶
4 走线
5 电路板焊盘
6 基板焊盘
61 第一焊盘
62 第二焊盘
53 第一电路板焊盘
52 第二电路板焊盘
为使本公开的实施例要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
如图1和图2所示，现有显示模组中，电路板2上设置有一排电路板焊盘5，电路板焊盘5沿第一方向排布；显示基板1上设置有一排基板焊盘6，基板焊盘6沿第一方向排布；电路板焊盘5和基板焊盘6通过走线4绑定，在电路板焊盘5、走线4和基板焊盘6上涂覆有保护胶3。通过走线4将电路板焊盘5和基板焊盘6绑定的工艺称之为打线工艺，由于电路板的制作精度较显示基板的制作精度差很多，当电路板焊盘的数量与基板焊盘的数量相等时，电路板焊盘所在区域的宽度会比显示基板的宽度大很多，这样在执行打线工艺时，可以明显看出，位于边缘的电路板焊盘5与对应基板焊盘6之间的走线4的长度会比较大，并且绑定角(走线4与第一方向之间的夹角)会明显偏小，这些都极其不利于打线工艺的可靠性。
本公开的实施例提供一种显示模组及其制作方法、显示装置，能够提高显示模组的工艺良率与可靠性。
本公开的实施例提供一种显示模组，包括：
电路板，所述电路板包括第一绑定区域，所述第一绑定区域设置有两排电路板焊盘，每排所述电路板焊盘包括沿第一方向间隔排列的多个电路板焊盘；
位于所述电路板上的显示基板，所述显示基板包括第二绑定区域，所述第二绑定区域上设置有多个沿第一方向排列的基板焊盘，所述显示基板在所述电路板上的正投影与所述第一绑定区域不重合，所述第二绑定区域靠近所述第一绑定区域；
所述电路板焊盘通过悬空的走线与所述基板焊盘绑定；
其中，所述两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，
所述第二排电路板焊盘包括第一电路板焊盘和第二电路板焊盘，所述第一电路板焊盘和所述第二电路板焊盘交替排布，所述第二电路板焊盘上未设置与所述基板焊盘绑定的走线，所述第一排电路板焊盘之间的距离小于所述第二排电路板焊盘之间的距离。
本实施例中，电路板上设置有两排电路板焊盘，使得电路板焊盘的排布更加集中，这样能够降低第一绑定区域的宽度，并且使得电路板焊盘更靠近基板焊盘，减少绑定电路板焊盘和基板焊盘的走线的长度，并且能够增加走线的绑定角，保证打线工艺的可靠性。
其中，走线可以采用导电性能良好的金属，比如铝、金等。显示基板可以为硅基显示基板，当然，显示基板并不局限为硅基显示基板，还可以为其他类型的显示基板。
由于第二电路板焊盘的设置，电路板焊盘的数量可以稍多于基板焊盘的数量。
本实施例中，第一绑定区域不仅可以设置有两排电路板焊盘，还可以设置三排电路板焊盘或者更多排电路板焊盘。一具体示例中，如图3-图5所示，电路板2上设置有两排电路板焊盘5，电路板焊盘5均沿第一方向排布；显示基板1上设置有一排基板焊盘6，基板焊盘6沿第一方向排布；电路板焊盘5和基板焊盘6通过走线4绑定。
一些实施例中，如图4和图5所示，所述至少两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，所述基板焊盘包括多组用于传输高速差分信号的第一焊盘61和除所述第一焊盘之外的第二焊盘62，每组所述第一焊盘包括两个所述第一焊盘61，两个所述第一焊盘61之间未设置所述第二焊盘62，两组相邻的所述第一焊盘61之间设置至少一个所述第二焊盘62。
为了确保高速差分信号的完整性，与同一组第一焊盘61连接的走线4需要满足等长等宽的要求，每组第一焊盘与对应的电路板焊盘的连接的走线长度相等。
为了确保高速差分信号的完整性，如图4所示，所述第一焊盘61均与第 一排电路板焊盘的电路板焊盘一一对应绑定。其中，第一焊盘61的数量可以与第一排电路板焊盘的电路板焊盘数量相等，也可以不相等。本实施例中，同一组第一焊盘61与位于同一排的距离最近的一对电路板焊盘连接，与同一组第一焊盘61连接的走线4能够满足等长等宽的要求，从而确保高速差分信号的完整性。
一些实施例中，为了减少与第一焊盘61连接的走线4的长度，所述第二排电路板焊盘可以位于所述第一排电路板焊盘远离所述显示基板的一侧。当然，第二排电路板焊盘也可以位于所述第一排电路板焊盘靠近所述显示基板的一侧。
在所述第二排电路板焊盘位于所述第一排电路板焊盘远离所述显示基板的一侧时，所述第二排电路板焊盘与基板焊盘的连接的走线长度大于所述第一排电路板焊盘与基板焊盘的连接的走线长度。
一些实施例中，如图4所示，由于第一焊盘均与第一排电路板焊盘绑定连接，第二排电路板焊盘中，与第二焊盘绑定的电路板焊盘的数量比较少，为了保证第二排电路板焊盘的均匀排布，所述第二排电路板焊盘包括第一电路板焊盘53和第二电路板焊盘52，所述第一电路板焊盘53和所述第二电路板焊盘52交替排布，所述第二电路板焊盘52上未设置与所述基板焊盘绑定的走线，所述第一电路板焊盘53的数量可以大于所述第二电路板焊盘52的数量。为了保证第一电路板焊盘与基板焊盘的可靠连接，所述第一电路板焊盘53在所述显示基板上的正投影的面积可以大于所述第二电路板焊盘52在所述显示基板上的正投影的面积，具体地，所述第二电路板焊盘在第二方向上的最大宽度小于所述第一电路板焊盘在第二方向上的最大宽度，所述第二电路板焊盘在第一方向上的最大宽度可以小于或等于所述第一电路板焊盘在第一方向上的最大宽度。
一些实施例中，由于第一焊盘均与第一排电路板焊盘绑定连接，第二排电路板焊盘中，需要与第二焊盘绑定的电路板焊盘的数量比较少，所以第二排可以设置比较少的电路板焊盘，为了保证第二排电路板焊盘的均匀排布，所述第一排电路板焊盘之间距离(即第一排电路板焊盘中，相邻电路焊盘之 间的距离)的小于所述第二排电路板焊盘之间的距离(即第二排电路板焊盘中，相邻电路焊盘之间的距离)。比如，所述第一排电路板焊盘中相邻电路板焊盘之间的距离为d，所述电路板焊盘在第一方向上的宽度为S；所述第二排电路板焊盘中相邻电路板焊盘之间的距离为2d+S。通过本实施例的技术方案可以保证在绑定时，同一对保高速差分信号的两根信号值在电路板焊盘的同一侧，确保高速差分信号的完整性。
一些实施例中，由于基板焊盘排列成一排布局空间较小，电路板焊盘排列成两排，布局空间较大，所以第一电路板焊盘在所述显示基板上的正投影的面积大于所述基板焊盘的面积，第二电路板焊盘在所述显示基板上的正投影的面积大于所述基板焊盘的面积，这样可以降低绑定的难度。
一些实施例中，如图5所示，所述第二电路板焊盘52位于所述第二排电路板焊盘的中部。当然，所述第二电路板焊盘52并不局限位于所述第二排电路板焊盘的中部，还可以位于所述第二排电路板焊盘的其他区域。
一些实施例中，由于第二排电路板焊盘与基板焊盘之间的距离更远，可以降低第二排电路板焊盘的绑定角，所述第一排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第一排电路板焊盘的延伸方向的夹角，小于所述第二排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第二排电路板焊盘的延伸方向的夹角。
一些实施例中，为了避免走线4与电路板焊盘产生接触，每组所述第一焊盘与对应的电路板焊盘的连接的走线长度大于所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离，所述第二方向与所述第一方向垂直或大致垂直。
为了避免不同的走线4之间产生接触，如图3-图4所示，所述至少两排电路板焊盘中，所述第一排电路板焊盘中的电路板焊盘与所述第二排电路板焊盘中的电路板焊盘在所述第一方向上交错排列，相邻两排电路板焊盘中各电路板焊盘在第一方向上错开设定距离。
一些实施例中，所述设定距离可以为S的二分之一，S为所述电路板焊盘在第一方向上的宽度。当然，该设定距离并不局限为S的二分之一，还可 以为其他值。
本实施例中，通过设置多排电路板焊盘，可以使得单排电路板焊盘的数量减少，第一绑定区域的宽度缩小，第一绑定区域可以更向显示基板的中间靠拢，从而使得第一绑定区域边缘的电路板焊盘与第二绑定区域边缘的基板焊盘之间的距离尽可能减少，减小走线4的长度，并且能够使得走线4与第二方向之间的夹角小于预设第二阈值，增大绑定角，保证打线工艺的可靠性。其中，所述第二方向与所述第一方向垂直或大致垂直。
为了尽可能减小第一绑定区域在第一方向上的宽度，所述电路板焊盘5在第二方向上的最大宽度大于在所述第一方向上的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，为了减小第一绑定区域在第二方向上的宽度，所述第一排电路板焊盘与所述第二排电路板焊盘之间的距离小于所述第一排电路板焊盘中相邻电路板焊盘之间的距离。
一些实施例中，所述第一绑定区域在所述第一方向上的正投影超出所述第二绑定区域在所述第一方向上的正投影，且所述第一绑定区域在第二方向上的第一边界与所述第二绑定区域在第二方向上的第二边界之间的最小距离小于预设第一阈值，所述第二方向与所述第一方向垂直，这样可以保证第一绑定区域边缘的电路板焊盘与第二绑定区域边缘的基板焊盘之间的距离尽可能小。当然，本实施例中，所述第一绑定区域沿第一方向的延伸长度还可以大于所述第二绑定区域沿第一方向的延伸长度。
一些实施例中，所述第一绑定区域在所述第一方向上的正投影可以位于所述第二绑定区域在所述第一方向上的正投影内，这样可以保证第一绑定区域边缘的电路板焊盘与第二绑定区域边缘的基板焊盘之间的距离尽可能小。
一些实施例中，如图3所示，所述第一排电路板焊盘通过第一走线与所述基板焊盘绑定，所述第二排电路板焊盘通过第二走线与所述基板焊盘绑定，所述第二排电路板焊盘位于所述第一排电路板焊盘远离所述显示基板的一侧，所述第一走线和所述第二走线为弧形走线，所述第一走线位于所述第二走线靠近所述电路板的一侧，本实施例中，通过不同高度的线弧可以避免两 排电路板焊盘上绑定的走线之间相互干涉。
一些实施例中，所述显示基板的显示区域包括多个子像素，所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离大于所述子像素的最大宽度，这样可以避免两排电路板焊盘上绑定的走线之间相互干涉。
本公开的实施例还提供了一种显示装置，包括如上所述的显示模组。
该显示装置包括但不限于：射频单元、网络模块、音频输出单元、输入单元、传感器、显示单元、用户输入单元、接口单元、存储器、处理器、以及电源等部件。本领域技术人员可以理解，上述显示装置的结构并不构成对显示装置的限定，显示装置可以包括上述更多或更少的部件，或者组合某些部件，或者不同的部件布置。在本公开实施例中，显示装置包括但不限于显示器、手机、平板电脑、电视机、可穿戴电子设备、导航显示设备等。
所述显示装置可以为：电视、显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件，其中，所述显示装置还包括柔性电路板、印刷电路板和背板。
本公开的实施例还提供了一种显示模组的制作方法，包括：
提供电路板，所述电路板包括第一绑定区域，所述第一绑定区域设置有两排电路板焊盘，每排所述电路板焊盘包括沿第一方向间隔排列的多个电路板焊盘；
在所述电路板上形成显示基板，所述显示基板包括第二绑定区域，所述第二绑定区域上设置有多个沿第一方向排列的基板焊盘，所述显示基板在所述电路板上的正投影与所述第一绑定区域不重合，所述第二绑定区域靠近所述第一绑定区域；
形成绑定所述电路板焊盘与所述基板焊盘的悬空的走线；
其中，所述两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，
所述第二排电路板焊盘包括第一电路板焊盘和第二电路板焊盘，所述第一电路板焊盘和所述第二电路板焊盘交替排布，所述第二电路板焊盘上未设置与所述基板焊盘绑定的走线，所述第一排电路板焊盘之间的距离小于所述第二排电路板焊盘之间的距离。
本实施例中，电路板上设置有两排电路板焊盘，使得电路板焊盘的排布更加集中，这样能够降低第一绑定区域的宽度，并且使得电路板焊盘更靠近基板焊盘，减少绑定电路板焊盘和基板焊盘的走线的长度，并且能够增加走线的绑定角，保证打线工艺的可靠性。
其中，走线可以采用导电性能良好的金属，比如铝、金等。显示基板可以为硅基显示基板，当然，显示基板并不局限为硅基显示基板，还可以为其他类型的显示基板。
由于第二电路板焊盘的设置，电路板焊盘的数量可以稍多于基板焊盘的数量。
本实施例中，不仅可以在第一绑定区域形成两排电路板焊盘，还可以形成三排电路板焊盘或者更多排电路板焊盘。一具体示例中，如图3-图6所示，电路板2上形成有两排电路板焊盘5，电路板焊盘5均沿第一方向排布；显示基板1上形成有一排基板焊盘6，基板焊盘6沿第一方向排布；电路板焊盘5和基板焊盘6通过走线4绑定。
一具体示例中，如图3-图5所示，电路板2上设置有两排电路板焊盘5，电路板焊盘5均沿第一方向排布；显示基板1上设置有一排基板焊盘6，基板焊盘6沿第一方向排布；电路板焊盘5和基板焊盘6通过走线4绑定。
一些实施例中，如图4和图5所示，所述至少两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，所述基板焊盘包括多组用于传输高速差分信号的第一焊盘61和除所述第一焊盘之外的第二焊盘62，每组所述第一焊盘包括两个所述第一焊盘61，两个所述第一焊盘61之间未设置所述第二焊盘62，两组相邻的所述第一焊盘61之间设置至少一个所述第二焊盘62。
为了确保高速差分信号的完整性，与同一组第一焊盘61连接的走线4需要满足等长等宽的要求，每组第一焊盘与对应的电路板焊盘的连接的走线长度相等。
为了确保高速差分信号的完整性，如图4所示，所述第一焊盘61均与第一排电路板焊盘的电路板焊盘一一对应绑定。其中，第一焊盘61的数量可以与第一排电路板焊盘的电路板焊盘数量相等，也可以不相等。本实施例中， 同一组第一焊盘61与位于同一排的距离最近的一对电路板焊盘连接，与同一组第一焊盘61连接的走线4能够满足等长等宽的要求，从而确保高速差分信号的完整性。
一些实施例中，为了减少与第一焊盘61连接的走线4的长度，所述第二排电路板焊盘可以位于所述第一排电路板焊盘远离所述显示基板的一侧。当然，第二排电路板焊盘也可以位于所述第一排电路板焊盘靠近所述显示基板的一侧。
在所述第二排电路板焊盘位于所述第一排电路板焊盘远离所述显示基板的一侧时，所述第二排电路板焊盘与基板焊盘的连接的走线长度大于所述第一排电路板焊盘与基板焊盘的连接的走线长度。
一些实施例中，如图4所示，由于第一焊盘均与第一排电路板焊盘绑定连接，第二排电路板焊盘中，与第二焊盘绑定的电路板焊盘的数量比较少，为了保证第二排电路板焊盘的均匀排布，所述第二排电路板焊盘包括第一电路板焊盘53和第二电路板焊盘52，所述第一电路板焊盘53和所述第二电路板焊盘52交替排布，所述第二电路板焊盘52上未设置与所述基板焊盘绑定的走线。为了保证第一电路板焊盘与基板焊盘的可靠连接，所述第一电路板焊盘53的面积可以大于所述第二电路板焊盘52的面积。
一些实施例中，由于第一焊盘均与第一排电路板焊盘绑定连接，第二排电路板焊盘中，需要与第二焊盘绑定的电路板焊盘的数量比较少，所以第二排可以设置比较少的电路板焊盘，为了保证第二排电路板焊盘的均匀排布，所述第一排电路板焊盘之间距离(即第一排电路板焊盘中，相邻电路焊盘之间的距离)的小于所述第二排电路板焊盘之间的距离(即第二排电路板焊盘中，相邻电路焊盘之间的距离)。比如，所述第一排电路板焊盘中相邻电路板焊盘之间的距离为d，所述电路板焊盘在第一方向上的宽度为S；所述第二排电路板焊盘中相邻电路板焊盘之间的距离为2d+S。通过本实施例的技术方案可以保证在绑定时，同一对保高速差分信号的两根信号值在电路板焊盘的同一侧，确保高速差分信号的完整性。
一些实施例中，由于基板焊盘排列成一排布局空间较小，电路板焊盘排 列成两排，布局空间较大，所以第一电路板焊盘的面积大于所述基板焊盘的面积，第二电路板焊盘的面积大于所述基板焊盘的面积，这样可以降低绑定的难度。
一些实施例中，如图5所示，所述第二电路板焊盘52位于所述第二排电路板焊盘的中部。当然，所述第二电路板焊盘52并不局限位于所述第二排电路板焊盘的中部，还可以位于所述第二排电路板焊盘的其他区域。
一些实施例中，由于第二排电路板焊盘与基板焊盘之间的距离更远，可以降低第二排电路板焊盘的绑定角，所述第一排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第一排电路板焊盘的延伸方向的夹角，小于所述第二排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第二排电路板焊盘的延伸方向的夹角。
一些实施例中，为了避免走线4与电路板焊盘产生接触，每组所述第一焊盘与对应的电路板焊盘的连接的走线长度大于所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离，所述第二方向与所述第一方向垂直或大致垂直。
为了避免不同的走线4之间产生接触，如图3-图4所示，所述至少两排电路板焊盘中，所述第一排电路板焊盘中的电路板焊盘与所述第二排电路板焊盘中的电路板焊盘在所述第一方向上交错排列，相邻两排电路板焊盘中各电路板焊盘在第一方向上错开设定距离。
一些实施例中，所述设定距离可以为S的二分之一，S为所述电路板焊盘在第一方向上的宽度。当然，该设定距离并不局限为S的二分之一，还可以为其他值。
本实施例中，通过形成多排电路板焊盘，可以使得单排电路板焊盘的数量减少，第一绑定区域的宽度缩小，第一绑定区域可以更向显示基板的中间靠拢，从而使得第一绑定区域边缘的电路板焊盘与第二绑定区域边缘的基板焊盘之间的距离尽可能减少，减小走线4的长度，并且能够使得走线4与第二方向之间的夹角小于预设第二阈值，增大绑定角，保证打线工艺的可靠性。其中，所述第二方向与所述第一方向垂直或大致垂直。
为了尽可能减小第一绑定区域在第一方向上的宽度，所述电路板焊盘5在第二方向上的最大宽度大于在所述第一方向上的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
一些实施例中，为了减小第一绑定区域在第二方向上的宽度，所述第一排电路板焊盘与所述第二排电路板焊盘之间的距离小于所述第一排电路板焊盘中相邻电路板焊盘之间的距离。
一些实施例中，所述第一绑定区域在所述第一方向上的正投影超出所述第二绑定区域在所述第一方向上的正投影，且所述第一绑定区域在第二方向上的第一边界与所述第二绑定区域在第二方向上的第二边界之间的最小距离小于预设第一阈值，所述第二方向与所述第一方向垂直，这样可以保证第一绑定区域边缘的电路板焊盘与第二绑定区域边缘的基板焊盘之间的距离尽可能小。当然，本实施例中，所述第一绑定区域沿第一方向的延伸长度还可以大于所述第二绑定区域沿第一方向的延伸长度。
一些实施例中，所述第一绑定区域在所述第一方向上的正投影可以位于所述第二绑定区域在所述第一方向上的正投影内，这样可以保证第一绑定区域边缘的电路板焊盘与第二绑定区域边缘的基板焊盘之间的距离尽可能小。
一些实施例中，如图3所示，所述第一排电路板焊盘通过第一走线与所述基板焊盘绑定，所述第二排电路板焊盘通过第二走线与所述基板焊盘绑定，所述第二排电路板焊盘位于所述第一排电路板焊盘远离所述显示基板的一侧，所述第一走线和所述第二走线为弧形走线，所述第一走线位于所述第二走线靠近所述电路板的一侧，本实施例中，通过不同高度的线弧可以避免两排电路板焊盘上绑定的走线之间相互干涉。
一些实施例中，所述显示基板的显示区域包括多个子像素，所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离大于所述子像素的最大宽度，这样可以避免两排电路板焊盘上绑定的走线之间相互干涉。
需要说明，本说明书中的各个实施例均采用递进的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于实施例而言，由于其基本相似于产品实施例， 所以描述得比较简单，相关之处参见产品实施例的部分说明即可。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
在上述实施方式的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。
Claims (21)
- 一种显示模组，其特征在于，包括：电路板，所述电路板包括第一绑定区域，所述第一绑定区域设置有两排电路板焊盘，每排所述电路板焊盘包括沿第一方向间隔排列的多个电路板焊盘；位于所述电路板上的显示基板，所述显示基板包括第二绑定区域，所述第二绑定区域上设置有多个沿第一方向排列的基板焊盘，所述显示基板在所述电路板上的正投影与所述第一绑定区域不重合，所述第二绑定区域靠近所述第一绑定区域；所述电路板焊盘通过悬空的走线与所述基板焊盘绑定；其中，所述两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，所述第二排电路板焊盘包括第一电路板焊盘和第二电路板焊盘，所述第一电路板焊盘和所述第二电路板焊盘交替排布，所述第二电路板焊盘上未设置与所述基板焊盘绑定的走线，所述第一排电路板焊盘之间的距离小于所述第二排电路板焊盘之间的距离。
- 根据权利要求1所述的显示模组，其特征在于，所述第一电路板焊盘在所述显示基板上的正投影的面积大于所述第二电路板焊盘在所述显示基板上的正投影的面积。
- 根据权利要求1所述的显示模组，其特征在于，所述第一电路板焊盘在所述显示基板上的正投影的面积大于所述基板焊盘的面积，所述第二电路板焊盘在所述显示基板上的正投影的面积大于所述基板焊盘的面积。
- 根据权利要求1所述的显示模组，其特征在于，所述第二排电路板焊盘中，所述第一电路板焊盘与所述第二电路板焊盘间隔设置，且数量相等。
- 根据权利要求1所述的显示模组，其特征在于，所述基板焊盘包括多组用于传输高速差分信号的第一焊盘和除所述第一焊盘之外的第二焊盘，每组所述第一焊盘包括两个所述第一焊盘，两个所述第一焊盘之间未设置所述第二焊盘，两组相邻的所述第一焊盘之间设置至少一个所述第二焊盘，每组 第一焊盘与对应的电路板焊盘的连接的走线长度相等。
- 根据权利要求1所述的显示模组，其特征在于，所述第二排电路板焊盘与基板焊盘的连接的走线长度大于所述第一排电路板焊盘与基板焊盘的连接的走线长度。
- 根据权利要求1所述的显示模组，其特征在于，所述电路板焊盘在第二方向上的最大宽度大于在所述第一方向上的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
- 根据权利要求1所述的显示模组，其特征在于，所述第二电路板焊盘位于所述第二排电路板焊盘的中部。
- 根据权利要求1所述的显示模组，其特征在于，所述第一排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第一排电路板焊盘的延伸方向的夹角，小于所述第二排电路板焊盘与所述基板焊盘的连线在所述电路板上的第一正投影与所述第二排电路板焊盘的延伸方向的夹角。
- 根据权利要求1所述的显示模组，其特征在于，所述第一排电路板焊盘与所述第二排电路板焊盘之间的距离小于所述第一排电路板焊盘中相邻电路板焊盘之间的距离。
- 根据权利要求1所述的显示模组，其特征在于，所述第一绑定区域在所述第一方向上的正投影超出所述第二绑定区域在所述第一方向上的正投影，且所述第一绑定区域在第二方向上的第一边界与所述第二绑定区域在第二方向上的第二边界之间的最小距离小于预设第一阈值，所述第二方向与所述第一方向垂直或大致垂直。
- 根据权利要求1所述的显示模组，其特征在于，所述第一绑定区域在所述第一方向上的正投影位于所述第二绑定区域在所述第一方向上的正投影内。
- 根据权利要求1所述的显示模组，其特征在于，所述走线与第二方向之间的夹角小于预设第二阈值，所述第二方向与所述第一方向垂直或大致垂直。
- 根据权利要求1所述的显示模组，其特征在于，所述第一绑定区域 沿第一方向的延伸长度大于所述第二绑定区域沿第一方向的延伸长度。
- 根据权利要求1所述的显示模组，其特征在于，所述第一排电路板焊盘中的电路板焊盘与所述第二排电路板焊盘中的电路板焊盘在所述第一方向上交错排列。
- 根据权利要求5所述的显示模组，其特征在于，每组所述第一焊盘与对应的电路板焊盘的连接的走线长度大于所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离，所述第二方向与所述第一方向垂直或大致垂直。
- 根据权利要求1所述的显示模组，其特征在于，所述显示基板的显示区域包括多个子像素，所述第一排电路板焊盘与所述第二排电路板焊盘在第二方向上的距离大于所述子像素的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
- 根据权利要求1所述的显示模组，其特征在于，所述第二电路板焊盘在第二方向上的最大宽度小于所述第一电路板焊盘在第二方向上的最大宽度，所述第二方向与所述第一方向垂直或大致垂直。
- 根据权利要求1所述的显示模组，其特征在于，所述第一电路板焊盘的数量大于所述第二电路板焊盘的数量。
- 一种显示装置，其特征在于，包括如权利要求1-19中任一项所述的显示模组。
- 一种显示模组的制作方法，其特征在于，包括：提供电路板，所述电路板包括第一绑定区域，所述第一绑定区域设置有两排电路板焊盘，每排所述电路板焊盘包括沿第一方向间隔排列的多个电路板焊盘；在所述电路板上形成显示基板，所述显示基板包括第二绑定区域，所述第二绑定区域上设置有多个沿第一方向排列的基板焊盘，所述显示基板在所述电路板上的正投影与所述第一绑定区域不重合，所述第二绑定区域靠近所述第一绑定区域；形成绑定所述电路板焊盘与所述基板焊盘的悬空的走线；其中，所述两排电路板焊盘包括第一排电路板焊盘和第二排电路板焊盘，所述第二排电路板焊盘包括第一电路板焊盘和第二电路板焊盘，所述第一电路板焊盘和所述第二电路板焊盘交替排布，所述第二电路板焊盘上未设置与所述基板焊盘绑定的走线，所述第一排电路板焊盘之间的距离小于所述第二排电路板焊盘之间的距离。
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| CN109856734A (zh) * | 2019-02-11 | 2019-06-07 | 武汉电信器件有限公司 | 一种光器件的管壳 |
| CN110286535A (zh) * | 2019-06-20 | 2019-09-27 | 上海天马微电子有限公司 | 显示模组、显示模组的制造方法及显示装置 |
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| US6403895B1 (en) * | 1999-02-10 | 2002-06-11 | Sharp Kabushiki Kaisha | Wiring substance and semiconductor |
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| CN109856734A (zh) * | 2019-02-11 | 2019-06-07 | 武汉电信器件有限公司 | 一种光器件的管壳 |
| CN110286535A (zh) * | 2019-06-20 | 2019-09-27 | 上海天马微电子有限公司 | 显示模组、显示模组的制造方法及显示装置 |
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