WO2023123304A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2023123304A1
WO2023123304A1 PCT/CN2021/143492 CN2021143492W WO2023123304A1 WO 2023123304 A1 WO2023123304 A1 WO 2023123304A1 CN 2021143492 W CN2021143492 W CN 2021143492W WO 2023123304 A1 WO2023123304 A1 WO 2023123304A1
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WO
WIPO (PCT)
Prior art keywords
signal
bridge
electrically connected
signal lead
sub
Prior art date
Application number
PCT/CN2021/143492
Other languages
English (en)
French (fr)
Inventor
苏秋杰
薄灵丹
陈东川
刘建涛
先建波
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202180004373.4A priority Critical patent/CN116686040A/zh
Priority to PCT/CN2021/143492 priority patent/WO2023123304A1/zh
Priority to US17/912,255 priority patent/US20240213262A1/en
Priority to EP21969661.4A priority patent/EP4339935A4/en
Publication of WO2023123304A1 publication Critical patent/WO2023123304A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287—Organisation of a multiplicity of shift registers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes

Definitions

  • the present disclosure relates to the field of display technology, in particular to a display panel and a display device.
  • Displays such as liquid crystal displays (Liquid Crystal Display, LCD) and organic light-emitting diodes (Organic Light-Emitting Diode, OLED) generally include a plurality of pixel units. Each pixel unit may include: a red sub-pixel, a green sub-pixel and a blue sub-pixel. By controlling the brightness corresponding to each sub-pixel, the required display color is mixed to display a color image.
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • a substrate substrate including a non-display area
  • Multiple signal lead-in lines are located in the non-display area; wherein, the multiple signal lead-in lines are divided into multiple line groups, and the frame start signal end of one register group is correspondingly electrically connected to one of the line groups;
  • signal lead-in lines of other line groups are arranged between the two signal lead-in lines of the same line group.
  • the display panel also includes:
  • a plurality of signal introduction parts wherein, one of the plurality of wire groups is electrically connected to the signal introduction part in the plurality of signal introduction parts;
  • a plurality of bridging parts wherein, the bridging parts and the signal introducing part are located on different layers;
  • the signal lead-in part and the signal lead-in line are located on the same layer; and, one of the multiple line groups is directly electrically connected to the corresponding signal lead-in part, and the other line groups are connected to the corresponding
  • the signal introduction part is electrically connected through the bridge part.
  • the plurality of register sets includes a first set of registers and a second set of registers
  • the plurality of wire groups includes a first wire group and a second wire group
  • the plurality of signal introduction parts include a first signal introduction part and a second signal introduction part;
  • first end of the first line group is directly electrically connected to the first signal introduction part, and the second end of the first line group is electrically connected to the frame start signal end of the first register group;
  • the first end of the second line group is electrically connected to the second signal introduction part through the bridge part, and the second end of the second line group is electrically connected to the frame start signal end of the second register group.
  • the bridging portion includes a first bridging portion, a second bridging portion, and a third bridging portion connected between the first bridging portion and the second bridging portion;
  • the display panel also includes:
  • the first bridging connection part, the first bridging connection part is located on a different layer from the bridging part and the signal introduction part; wherein, the first end of the first bridging connection part and the first bridging part pass through the first turn being electrically connected via a via hole, and the second end of the first bridging connection part is electrically connected to the second signal introduction part through a second transfer via hole;
  • the second bridging connection part, the second bridging connection part is located on the same layer as the first bridging connection part; wherein, the first end of the second bridging connection part and the second bridging part pass through a third transfer
  • the via hole is electrically connected, and the second end of the second bridging connection part is electrically connected to the signal lead-in line in the second line group through the fourth transfer via hole.
  • the third bridge part includes a plurality of third sub-bridge parts arranged at intervals; wherein, one third sub-bridge part corresponds to one signal lead-in line;
  • the second bridge part includes a plurality of second sub-bridge parts; wherein, one second sub-bridge part corresponds to one signal lead-in line.
  • the plurality of second sub-bridges are spaced apart from each other;
  • the plurality of second sub-bridges contact each other to form an integrated structure.
  • the second bridge connection part includes a plurality of second sub-bridge connection parts spaced apart from each other; one second sub-bridge part connects to one second sub-bridge through the third transfer via hole.
  • the bridge connections are electrically connected.
  • the first signal introduction part includes: at least one first sub-signal introduction part and a third sub-signal introduction part; wherein, the third sub-signal introduction part and the first sub-signal introduction part of the first wire group Terminals are directly electrically connected;
  • the display panel also includes:
  • the fifth bridging connection part, the fifth bridging connection part is located on the same layer as the first bridging connection part; wherein, the fifth bridging connection part is introduced into each of the first sub-signals through the ninth transfer via hole part, and the fifth bridging connection part is electrically connected to the third sub-signal introduction part through the tenth transfer via hole.
  • the signal lead-in wires in the first wire group include a first signal lead segment and at least one second signal lead segment;
  • the display panel also includes:
  • a plurality of fourth bridge connection parts, the fourth bridge connection part and the first bridge connection part are located on the same layer; wherein, in the same signal lead-in line, the first signal lead segment and the second signal lead segment The lead segments are electrically connected through the fourth bridge connection portion, and the adjacent second signal lead segments are electrically connected through the fourth bridge connection portion.
  • the first end of the first signal lead segment is directly electrically connected to the third sub-signal introduction part, and the second end of the first signal lead segment is connected to the corresponding The first end of the fourth bridging connection part is electrically connected, and the second end of the fourth bridging connection part is electrically connected to the second signal lead segment through the sixth transfer via hole;
  • One of the adjacent second signal lead segments is electrically connected to the first end of the corresponding fourth bridge connection part through the seventh transfer via hole, and the fourth bridge connection The second end of the portion is electrically connected to the other second signal lead segment through the eighth transition hole.
  • the second ends of each of the first signal lead segments in the first wire group are spaced from each other; or, the second ends of each of the first signal lead segments in the first wire group The ends contact each other to form an integrated structure.
  • the signal lead-in wires in the second wire group include at least two third signal lead wire segments; the display panel further includes: a plurality of third bridge connection parts;
  • third signal lead segments are electrically connected through the third bridging connection part, and the first end of the third bridging connection part is connected through the thirteenth transition
  • the via hole is electrically connected to one of the third signal lead segments, and the second end of the third bridging connection portion is electrically connected to the other third signal lead segment through the fourteenth transfer via hole.
  • the plurality of fourth bridging connections are arranged at intervals from each other.
  • the total number of the fourth bridge connection parts corresponding to one signal lead-in wire in the first wire group, the third bridge connection part and the second bridge connection part corresponding to one signal lead-in wire in the second wire group The sum of the total number of connected parts is the same.
  • the second signal introduction part includes: at least one second sub-signal introduction part; the first bridge connection part is electrically connected to each of the second sub-signal introduction parts through the second transfer via hole. connect;
  • the total number of the first sub-signal introduction parts is the same as the total number of the second sub-signal introduction parts.
  • the display panel further includes: a first auxiliary part and a second auxiliary part; the first auxiliary part and the second auxiliary part are located on the same layer as the bridging part;
  • the orthographic projection of the first auxiliary portion on the base substrate is located between the orthographic projections of the first sub-signal introduction portion and the third sub-signal introduction portion on the base substrate; and, the first The fifth bridge connection part is also electrically connected to the first auxiliary part through the fifteenth transfer hole;
  • the orthographic projection of the second auxiliary portion on the substrate is located between the second sub-signal introduction portion and the orthographic projection of the first bridge portion on the substrate; and, the first bridge
  • the connecting part is also electrically connected to the second auxiliary part through the sixteenth transfer via hole.
  • the display panel further includes: a plurality of third auxiliary parts; the third auxiliary part and the first auxiliary part are located on the same layer as the bridging part;
  • a signal lead-in line in the first line group is correspondingly provided with at least one third auxiliary part;
  • the first signal lead segment is electrically connected to the second signal lead segment through the corresponding third auxiliary part.
  • the display panel further includes: a plurality of sixth bridge transfer parts and a plurality of seventh bridge transfer parts;
  • At least one of the third auxiliary parts is correspondingly provided with at least one of the sixth bridging transfer part and at least one of the seventh bridging transfer part;
  • the first end of the third auxiliary part is electrically connected to the corresponding sixth bridge transfer part through the eleventh transfer via hole, and the sixth bridge transfer part is connected to the corresponding sixth bridge transfer part through the twelfth transfer via hole.
  • the first signal lead segment is electrically connected
  • the second end of the third auxiliary part is electrically connected to the corresponding seventh bridge transfer part through the seventeenth transfer via hole, and the seventh bridge transfer
  • the part is electrically connected to the corresponding second signal lead segment through the eighteenth transfer via hole.
  • the bridging portion includes a fourth bridging portion, a sixth bridging portion, and a fifth bridging portion connected between the fourth bridging portion and the sixth bridging portion;
  • the fourth bridge part is electrically connected to the second signal introduction part through a first conductive via
  • the sixth bridging portion is electrically connected to the signal lead-in wires in the second wire group through the second conductive via.
  • the fifth bridging portion includes a plurality of fifth sub-bridges arranged at intervals from each other; the sixth bridging portion includes a plurality of sixth sub-bridges arranged at intervals from each other;
  • the fourth bridge part is electrically connected to one signal lead-in line in the second line group through at least one fifth sub-bridge part and at least one sixth sub-bridge part.
  • the first signal introduction part includes: a first hollow area
  • the first hollow area includes: a first bonding via; wherein the first bonding via passes through the first signal introduction part.
  • the first hollow area further includes: a first combining slit; wherein the first combining slit runs through the first signal introducing portion.
  • the display panel further includes: a fourth auxiliary part and a fifth auxiliary part; the fourth auxiliary part and the fifth auxiliary part are located on the same layer as the bridging part;
  • the fourth auxiliary part is electrically connected to the first signal introduction part through a third conducting hole;
  • the fifth auxiliary part is electrically connected to the second signal introduction part through the fourth conducting hole.
  • the signal lead-in wires in the first wire group include a second hollow area
  • the second hollow area includes: a second bonding via hole; wherein, the second bonding via hole passes through the signal lead-in wires in the first wire group.
  • the second hollow area further includes: a second combining slit; wherein, the second combining slit penetrates the signal lead-in wires in the first wire group.
  • the second hollow area further includes: a second bonding via; wherein, the second bonding via penetrates the signal lead-in wire in the first wire group, and the second bonding via Located on a side of the second bonding slit away from the first bonding via;
  • the end of the signal lead-in line in the second wire group connected to the fifth sub-bridge part is provided with a fourth bonding via; wherein, the fourth bonding via is located at the second conductive via away from the sixth sub-bridge. bridge side.
  • a display device provided by an embodiment of the present disclosure includes the above-mentioned display panel.
  • FIG. 1 is some structural schematic diagrams of a display panel in an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of some gate drive circuits in an embodiment of the present disclosure
  • Fig. 3a is some structural schematic diagrams of the first register group of the gate driving circuit in the embodiment of the present disclosure
  • FIG. 3b is a schematic structural diagram of a second register group of the gate drive circuit in an embodiment of the present disclosure
  • FIG. 4 is a corresponding signal timing diagram of a gate drive circuit in an embodiment of the present disclosure
  • Fig. 5a is a schematic diagram of some layout structures of a display panel in an embodiment of the present disclosure.
  • Fig. 5b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 5a;
  • Fig. 5c is a schematic diagram of the layout structure of the layer where the bridging part is located in Fig. 5a;
  • Fig. 5d is a schematic diagram of the layout structure of the layer where the first bridging connection part is located in Fig. 5a;
  • Fig. 6 is a schematic cross-sectional structure diagram along AA' direction in Fig. 5a;
  • Fig. 7a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 7b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 7a;
  • Fig. 7c is a schematic diagram of the layout structure of the layer where the bridging part is located in Fig. 7a;
  • Fig. 7d is a schematic diagram of the layout structure of the layer where the first bridging connection part is located in Fig. 7a;
  • Fig. 8 is a schematic cross-sectional structure diagram along the BB' direction in Fig. 7a;
  • Fig. 9a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 9b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 9a;
  • Fig. 9c is a schematic diagram of the layout structure of the layer where the bridging part is located in Fig. 9a;
  • Fig. 9d is a schematic diagram of the layout structure of the layer where the first bridging connection part is located in Fig. 9a;
  • Fig. 10 is a schematic cross-sectional structural view along CC' direction in Fig. 9a;
  • Fig. 11a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 11b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 11a;
  • Fig. 11c is a schematic diagram of the layout structure of the layer where the bridging part is located in Fig. 11a;
  • Fig. 11d is a schematic diagram of the layout structure of the layer where the first bridging connection part is located in Fig. 11a;
  • Fig. 12a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 12b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 12a;
  • Fig. 13a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 13b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 13a;
  • Fig. 13c is a schematic diagram of the layout structure of the layer where the first bridging connection part is located in Fig. 13a;
  • Fig. 14a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 14b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 14a;
  • Fig. 14c is a schematic diagram of the layout structure of the layer where the bridging part is located in Fig. 14a;
  • Fig. 14d is a schematic diagram of the layout structure of the layer where the first bridging connection part is located in Fig. 14a;
  • Fig. 15a is a schematic cross-sectional structure diagram along the DD' direction in Fig. 14a;
  • Fig. 15b is a schematic cross-sectional structure diagram along EE' direction in Fig. 14a;
  • FIG. 16 is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 17a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 17b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 17a;
  • Fig. 17c is a schematic diagram of the layout structure of the layer where the bridging part is located in Fig. 17a;
  • Fig. 17d is a schematic diagram of the layout structure of the layer where the first bridging connection part is located in Fig. 17a;
  • Fig. 18a is a schematic diagram of some other layout structures of the display panel in the embodiment of the present disclosure.
  • Fig. 18b is a schematic diagram of the layout structure of the layer where the signal lead-in line is located in Fig. 18a;
  • Fig. 18c is a schematic diagram of the layout structure of the layer where the bridging part is located in Fig. 18a;
  • Fig. 19 is a schematic cross-sectional structure along the FF' direction in Fig. 18a.
  • the display panel may include a base substrate 100 .
  • the base substrate includes a display area and a non-display area surrounding the display area.
  • the display area may include a plurality of pixel units arranged in an array, a plurality of gate lines GA (eg, GA1, GA2, GA3, GA4), and a plurality of data lines DA (eg, DA1, DA2, DA3).
  • the non-display area may include a gate driving circuit 110 and a source driving circuit 120 .
  • the gate driving circuit 110 is electrically connected to the gate lines GA1 , GA2 , GA3 , GA4 respectively
  • the source driving circuit 120 is electrically connected to the data lines DA1 , DA2 , DA3 respectively.
  • a signal may be input to the gate driving circuit 110 , so that the gate driving circuit 110 outputs a signal to drive the gate lines GA1 , GA2 , GA3 , and GA4 .
  • the source driving circuit 120 inputs a data voltage to the data line, thereby charging the sub-pixel SPX, and causing the sub-pixel SPX to input a corresponding data voltage to realize the screen display function.
  • the number of source driving circuits 120 can be set to two, wherein one source driving circuit 120 is connected to half the number of data lines, and the other source driving circuit 120 is connected to the other half of the number of data lines.
  • one, three, four, or more source driving circuits 120 can also be provided, which can be designed and determined according to the requirements of practical applications, and are not limited here.
  • each pixel unit includes a plurality of sub-pixels SPX.
  • a pixel unit may include red sub-pixels, green sub-pixels and blue sub-pixels, so that red, green and blue colors can be mixed to achieve color display.
  • the pixel unit may also include red sub-pixels, green sub-pixels, blue sub-pixels and white sub-pixels, so that color mixing can be performed through red, green, blue and white to achieve color display.
  • the luminous color of the sub-pixels in the pixel unit can be designed and determined according to the practical application environment, which is not limited here.
  • the display panel in the embodiment of the present disclosure may be a liquid crystal display panel, an OLED display panel, etc., which is not limited herein.
  • the gate drive circuit may include a plurality of shift registers, for example, shift registers from the first stage to the Nth stage: SR(1), SR(2)...SR(n-1), SR(n )...SR(N-1), SR(N) (a total of N shift registers, 1 ⁇ n ⁇ N, n is an integer).
  • Multiple shift registers can be grouped into multiple register banks. Wherein, the shift registers in the same register group can be set in cascade, and the frame start signal terminals connected to different register groups are different.
  • the shift register in the gate driving circuit can be divided into two register groups.
  • FIG. 2 takes shift registers SR( 1 ) ⁇ SR( 24 ) from the first stage to the 24th stage as an example.
  • the first register group X1 in the two register groups includes the odd-numbered shift registers: the first-stage shift register SR (1), the third-stage shift register SR (3) , 5th stage shift register SR(5), ... 19th stage shift register SR(19), 21st stage shift register SR(21) and 23rd stage shift register SR(23).
  • the odd-numbered shift registers are electrically connected to the odd-numbered gate lines.
  • the input signal terminal IP of the first stage shift register SR (1), the input signal terminal IP of the third stage shift register SR (3), and the input signal terminal IP of the fifth stage shift register SR (5) Both are electrically connected to the frame start signal terminal STV_A.
  • the output signal terminal GO of the first-stage shift register SR(1) is electrically connected to the input signal terminal IP of the seventh-stage shift register SR(7).
  • the output signal terminal GO of the third-stage shift register SR(3) is electrically connected to the input signal terminal IP of the ninth-stage shift register SR(9).
  • the output signal terminal GO of the 15th stage shift register SR (15) is electrically connected to the input signal terminal IP of the 21st stage shift register SR (21).
  • the output signal terminal GO of the 17th stage shift register SR ( 17 ) is electrically connected to the input signal terminal IP of the 23rd stage shift register SR ( 23 ).
  • the output signal terminal GO of the ninth-stage shift register SR(9) is electrically connected to the reset signal terminal RE of the first-stage shift register SR(1).
  • the output signal terminal GO of the eleventh-stage shift register SR(11) is electrically connected to the reset signal terminal RE of the third-stage shift register SR(3).
  • the output signal terminal GO of the 21st stage shift register SR (21) is electrically connected to the reset signal terminal RE of the 13th stage shift register SR (13).
  • the output signal terminal GO of the 23rd stage shift register SR ( 23 ) is electrically connected to the reset signal terminal RE of the 15th stage shift register SR ( 15 ).
  • the second register group X2 in the two register groups includes the even-numbered shift registers: the second-stage shift register SR (2), the fourth-stage shift register SR (4) , 6th stage shift register SR(6), ... 20th stage shift register SR(20), 22nd stage shift register SR(22) and 24th stage shift register SR(24).
  • the even-numbered shift register is electrically connected to the even-numbered gate line.
  • the input signal end IP of the second stage shift register SR (2), the input signal end IP of the fourth stage shift register SR (4), and the input signal end IP of the sixth stage shift register SR (6) Both are electrically connected to the frame start signal terminal STV_B.
  • the output signal terminal GO of the second-stage shift register SR(2) is electrically connected to the input signal terminal IP of the eighth-stage shift register SR(8).
  • the output signal terminal GO of the fourth-stage shift register SR(4) is electrically connected to the input signal terminal IP of the tenth-stage shift register SR(10).
  • the output signal terminal GO of the 16th stage shift register SR (16) is electrically connected to the input signal terminal IP of the 22nd stage shift register SR (22).
  • the output signal terminal GO of the 18th stage shift register SR ( 18 ) is electrically connected to the input signal terminal IP of the 24th stage shift register SR ( 24 ).
  • the output signal terminal GO of the tenth-stage shift register SR (10) is electrically connected to the reset signal terminal RE of the second-stage shift register SR (2).
  • the output signal terminal GO of the twelfth-stage shift register SR(12) is electrically connected to the reset signal terminal RE of the fourth-stage shift register SR(4).
  • the output signal terminal GO of the 22nd stage shift register SR (22) is electrically connected to the reset signal terminal RE of the 14th stage shift register SR (14).
  • the output signal terminal GO of the 24th stage shift register SR ( 24 ) is electrically connected to the reset signal terminal RE of the 16th stage shift register SR ( 16 ).
  • stv_a represents the signal of the frame start signal terminal STV_A
  • stv_b represents the signal of the frame start signal terminal STV_B
  • ck1 represents the clock signal transmitted on the clock signal line CK1
  • ck2 represents the clock signal transmitted on the clock signal line CK2
  • ck3 represents The clock signal transmitted on the clock signal line CK3, ck4 represents the clock signal transmitted on the clock signal line CK4
  • ck5 represents the clock signal transmitted on the clock signal line CK5
  • ck6 represents the clock signal transmitted on the clock signal line CK6,
  • ck7 represents the clock signal
  • the clock signal transmitted on the line CK7, ck8 represents the clock signal transmitted on the clock signal line CK8, ck9 represents the clock signal transmitted on the clock signal line CK9
  • ck10 represents the clock signal transmitted on the clock signal line CK10
  • ck11 represents the clock signal line CK11
  • the clock signal transmitted on the clock signal line CK11 The clock signal transmitted on the clock signal line
  • the signal go1 represents the gate drive signal output from the output signal terminal GO of the first-stage shift register SR(1).
  • the signal go2 represents the gate drive signal output from the output signal terminal GO of the second-stage shift register SR(2).
  • the signal go3 represents the gate drive signal output from the output signal terminal GO of the third-stage shift register SR(3).
  • the signal go24 represents the gate drive signal output by the output signal terminal GO of the 24th stage shift register SR (24).
  • the shift register in the gate driving circuit is divided into two register groups as an example for illustration.
  • the shift register in the gate driving circuit can also be divided into three register groups, four register groups or more register groups, which are not limited here.
  • the frame start signal terminal is electrically connected to the input signal terminal IP of the shift register through a signal lead-in line.
  • the signal lead-in lines corresponding to the same frame start signal terminal are arranged in the same area, and no other signal lines are arranged between the signal lead-in lines corresponding to the same frame start signal terminal, which is not conducive to the wiring of the signal lead-in lines.
  • a plurality of signal lead-in lines are also arranged in the non-display area.
  • the multiple signal lead-in lines are divided into multiple wire groups, and one register group is correspondingly electrically connected to one wire group. And between the two signal lead-in lines of the same line group, signal lead-in lines of other line groups are arranged.
  • these multiple signal lead-in lines may be signal lines electrically connecting the frame start signal terminal and the input signal terminal IP of the shift register.
  • these multiple signal lead-in lines may be clock signal lines. Or signal lines for other functions.
  • the multiple signal lead-in lines can be divided into two line groups: wherein, the first line group in the two line groups includes signal lead-in lines 110-1, 110-2 and 110-3, and the first The line group is connected to the frame start signal terminal STV_A of the first register group X1.
  • the signal lead-in line 110-1 is connected between the frame start signal terminal STV_A and the input signal terminal IP of the first-stage shift register SR (1)
  • the signal lead-in line 110-2 is connected between the frame start signal terminal STV_A and the input signal terminal IP of the first stage shift register SR (1).
  • the signal lead-in line 110-3 is connected between the frame start signal end STV_A and the input signal end IP of the fifth-stage shift register SR (5) .
  • the second wire group of the two wire groups includes signal lead-in wires 120 - 1 , 120 - 2 and 120 - 3 .
  • the second line group is connected to the frame start signal terminal STV_B of the second register group X2.
  • the signal introduction line 120-1 is connected between the frame start signal terminal STV_B and the input signal terminal IP of the second stage shift register SR (2)
  • the signal introduction line 120-2 is connected between the frame start signal terminal STV_B and the input signal terminal IP of the second stage shift register SR (2).
  • the signal lead-in line 120-3 is connected between the frame start signal terminal STV_B and the input signal terminal IP of the 6th stage shift register SR (6) .
  • the signal lead-in lines in the first line group and the signal lead-in lines in the second line group are arranged alternately.
  • the signal lead-in line 120-3, the signal lead-in line 110-3, the signal lead-in line 120-2, the signal lead-in line 110-2, the signal lead-in line 120-1, and the signal lead-in line 110-1 follow the direction indicated by the F1 arrow Arranged in order. This optimizes the wiring space.
  • a sub-pixel of the display panel has a transistor, and the transistor has a gate, an active layer, and a source and a drain.
  • the gate electrode and the gate line are arranged in the same layer and the same material
  • the source drain and the data line are arranged in the same layer and the same material
  • the active layer may be located between the layer where the gate line is located and the layer where the data line is located.
  • a gate insulating layer is provided between the layer where the gate line is located and the layer where the active layer is located
  • an interlayer insulating layer such as PVX
  • the signal lead-in line and the gate line may be provided in the same layer and made of the same material.
  • the pattern of the gate line and the pattern of the signal lead-in line can be formed at the same time through a single patterning process, without adding a separate
  • the process for preparing signal lead-in wires can simplify the preparation process, save production costs, and improve production efficiency.
  • the display panel may further include: a plurality of signal introduction parts and a plurality of bridging parts; wherein, the signal introduction parts and the signal introduction lines are located on the same layer;
  • the signal lead-in parts in the lead-in parts are electrically connected.
  • one of the multiple wire groups is directly electrically connected to the corresponding signal lead-in part, and the other wire groups are electrically connected to the corresponding signal lead-in part through the bridging part.
  • the multiple signal lead-in parts include a first signal lead-in part 210 and the second signal introduction part 220; as shown in FIG.
  • the signal lead-in lines 110-1, 110-2, and 110-3 can be directly electrically connected to the first signal lead-in part 210, that is, the signal lead-in lines 110-1, 110-2, and 110-3 in the first line group An integral structure formed of the same film layer material as the first signal introduction part 210 .
  • the signal lead-in lines 120 - 1 , 120 - 2 and 120 - 3 in the second line group may be electrically connected to the second signal lead-in part 220 through the bridge part 300 . That is to say, there is a gap between the signal lead-in wires 120 - 1 , 120 - 2 and 120 - 3 in the second wire group and the second signal lead-in part 220 .
  • the first ends of the signal lead-in wires 110-1, 110-2, and 110-3 in the first line group can be directly electrically connected to the first signal lead-in part 210, and the signal lead-in wires 110-110- 1, the second terminals of 110-2 and 110-3 may be respectively electrically connected to the input signal terminals IP of the shift registers in the first register group.
  • the signal stv_a input by the first signal introduction part 210 can be directly input to the input signal terminal IP of the second-stage shift register SR(1) through the signal introduction line 110-1.
  • the signal stv_a input by the first signal introduction part 210 is directly input into the input signal terminal IP of the third-stage shift register SR ( 3 ) through the signal introduction line 110 - 2 .
  • the signal stv_a input by the first signal introduction part 210 is directly input into the input signal terminal IP of the fifth-stage shift register SR ( 5 ) through the signal introduction line 110 - 3 .
  • First ends of the signal lead-in wires 120 - 1 , 120 - 2 and 120 - 3 in the second wire group may be electrically connected to the second signal lead-in part 220 through the bridge part 300 .
  • the second ends of the signal lead-in wires 120-1, 120-2 and 120-3 in the second wire group may be respectively electrically connected to the input signal terminals IP of the shift registers in the second register group.
  • the signal stv_b input by the second signal introduction part 220 can be input into the input signal terminal IP of the second-stage shift register SR ( 2 ) through the bridge part 300 and the signal introduction line 120 - 1 sequentially through the bridge.
  • the signal stv_b input by the second signal introduction part 220 is input into the input signal terminal IP of the fourth-stage shift register SR ( 4 ) through the bridge part 300 and the signal introduction line 120 - 2 sequentially through a bridge.
  • the signal stv_b input by the second signal introduction part 220 is input into the input signal terminal IP of the sixth-stage shift register SR ( 6 ) through the bridge part 300 and the signal introduction line 120 - 3 sequentially through a bridge.
  • the bridging part and the signal introducing part are located at different layers.
  • the bridging part and the data line may be provided in the same layer and material.
  • the technology of the bridging part can simplify the preparation process, save the production cost and improve the production efficiency.
  • the display panel may further include: a first bridging connection part 410 and a second bridging connection part 420; wherein, the first bridging connection part 410 is located on a different layer from the bridging part and the signal introduction part, and the second bridging connection part 420 is connected to the first bridging connection part 420.
  • the bridging connection 410 is located on the same floor.
  • the first bridge connection portion 410 and the second bridge connection portion 420 can be provided in the same layer and the same material as the pixel electrodes.
  • the second end of the second signal lead-in part 220 is electrically connected through the second transfer via hole GZ2.
  • the first end of the second bridging connection part 420 is electrically connected to the second bridging part 320 through the third transfer via hole GZ3, and the second end of the second bridging connection part 420 is connected to the signal lead-in wire in the second wire group through The fourth transfer via hole GZ4 is electrically connected.
  • the first transfer via hole GZ1 penetrates through the interlayer insulating layer.
  • the second transfer via hole GZ2 penetrates through the gate insulating layer and the interlayer insulating layer.
  • the total number of the first transfer vias GZ1 and the total number of the second transfer vias GZ2 may be the same.
  • the total number of the first transfer vias GZ1 and the total number of the second transfer vias GZ2 may both be 12 or 10 or 8 or other numbers.
  • the total number of first transfer vias GZ1 and the total number of second transfer vias GZ2 may also be different.
  • the total number of the first transfer vias GZ1 and the second transfer vias GZ2 can be designed and determined according to the requirements of practical applications, and are not limited here.
  • the third bridging portion 330 may include a plurality of third sub-bridges arranged at intervals, and the second bridging portion 320 includes a plurality of second sub-bridges. Wherein, one third sub-bridge part corresponds to one signal lead-in line, and one second sub-bridge part corresponds to one signal lead-in line.
  • the signal lead-in line 120-1 corresponds to the third sub-bridge part 331 and the second sub-bridge part 321, and the signal lead-in line 120- 1 is electrically connected to the first bridge portion 310 through the second sub-bridge portion 321 and the third sub-bridge portion 331 in sequence.
  • the signal lead-in line 120-2 corresponds to the third sub-bridge part 332 and the second sub-bridge part 322, and the signal lead-in line 120-2 passes through the second sub-bridge part 322, the third sub-bridge part 332 and the first bridge part 310 in sequence. electrical connection.
  • the signal lead-in line 120-3 corresponds to the third sub-bridge part 333 and the second sub-bridge part 323, and the signal lead-in line 120-3 passes through the second sub-bridge part 323, the third sub-bridge part 333 and the first bridge part 310 in sequence electrical connection.
  • the signal lead-in line 120-3 passes through the second sub-bridge part 323, the third sub-bridge part 333 and the first bridge part 310 in sequence electrical connection.
  • the shape of the third sub-bridge may be a non-linear shape.
  • the shape of the third sub-bridge (331, 332, 333) may be a bent line shape.
  • the third sub-bridge ( 331 , 332 , 333 ) may be in the shape of a bent line formed by three straight segments, and may have two bent angles, and the bent angles may be obtuse angles.
  • the shape of the third sub-bridge may also be a curved shape.
  • the third sub-bridge part may be composed of arc-shaped curves.
  • the shape of the third sub-bridge portion can be determined according to the requirements of practical applications, which is not limited here.
  • a plurality of second sub-bridges may be arranged at intervals from each other. For example, there are gaps between the second sub-bridges 321, 322, 323, and the orthographic projections of the multiple second sub-bridges on the base substrate and the signal lead-in lines in the first line group are on the orthographic projection of the base substrate. Projections do not overlap. In this way, the overlapping area between the second sub-bridge portion and the signal lead-in wires in the first wire group can be reduced, thereby reducing signal interference.
  • the second bridging connection part 420 may include a plurality of second sub-bridging connection parts spaced apart from each other;
  • the via GZ3 is electrically connected to a second sub-bridge connection.
  • the second bridge connection portion 420 includes three second sub-bridge connection portions: 421 , 422 , 423 arranged at intervals.
  • the second sub-bridge connection part 421 is electrically connected to the second sub-bridge part 321 through the third transfer via hole GZ3, and the second sub-bridge connection part 421 is connected to the signal lead-in line 120-1 through the fourth transfer via hole GZ4. electrical connection.
  • the signal stv_b input by the second signal introduction part 220 can be input through the first bridge connection part 410, the first bridge part 310, the second sub-bridge part 321, the second sub-bridge connection part 421, and the signal lead-in line 120-1 in sequence. to the input signal terminal IP of the second-stage shift register SR(2).
  • the second sub-bridge connection part 422 is electrically connected to the second sub-bridge part 322 through the third transfer via hole GZ3, and the second sub-bridge connection part 422 is connected to the signal lead-in line 120-2 through the fourth transfer via hole GZ4 electrical connection.
  • the signal stv_b input by the second signal introduction part 220 can be input through the first bridge connection part 410, the first bridge part 310, the second sub-bridge part 322, the second sub-bridge connection part 422, and the signal lead-in line 120-2 in sequence. to the input signal terminal IP of the fourth-stage shift register SR (4).
  • the second sub-bridge connection part 423 is electrically connected to the second sub-bridge part 323 through the third transfer via hole GZ3, and the second sub-bridge connection part 423 is connected to the signal lead-in line 120-3 through the fourth transfer via hole GZ4 electrical connection.
  • the signal stv_b input by the second signal introduction part 220 can be sequentially input through the first bridge connection part 410, the first bridge connection part 310, the second sub-bridge connection part 323, the second sub-bridge connection part 423, and the signal introduction line 120-3. to the input signal terminal IP of the sixth stage shift register SR(6).
  • the third transfer via hole GZ3 penetrates through the interlayer insulating layer.
  • the fourth transfer via hole GZ4 penetrates through the gate insulating layer and the interlayer insulating layer.
  • the total numbers of the third transfer vias GZ3 and the fourth transfer vias GZ4 corresponding to one second sub-bridge connection portion may be the same.
  • the total number of the third transfer vias GZ3 and the fourth transfer vias GZ4 corresponding to one second sub-bridge connection part can be 1, 2, 3 or other numbers.
  • the total numbers of the third transfer vias GZ3 and the fourth transfer vias GZ4 corresponding to one second sub-bridge connection part may also be different.
  • the total number of corresponding third transfer vias GZ3 and fourth transfer vias GZ4 can be designed and determined according to the requirements of practical applications, and is not limited here.
  • Embodiments of the present disclosure provide other schematic structural diagrams of display panels, as shown in FIG. 7 a to FIG. 8 , which are modified for the implementation manners in the foregoing embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the portion 213 is directly electrically connected to the first end of each signal lead-in wire in the first wire group.
  • the display panel may further include: a fifth bridging connection portion 450 ; wherein, the fifth bridging connection portion 450 is located on the same layer as the first bridging connection portion 410 .
  • the fifth bridge connection part 450 is electrically connected to each first sub-signal introduction part through the ninth transfer via hole GZ9, and the fifth bridge connection part 450 is electrically connected to the third sub-signal introduction part 213 through the tenth transfer via hole GZ10. connect.
  • the resistance difference between the signal circulation path stv_a corresponding to the signal lead-in line in the first line group from the first signal lead-in part 210 to the first line group is relatively large, resulting in a difference in delay when the signals stv_a and stv_b are input to the signal input terminal IP , which in turn leads to the output signal terminal GO output of the first-stage shift register, the third-stage shift register, the fifth-stage shift register and the second-stage shift register, the fourth-stage shift register, and the sixth-stage shift register
  • the signals of the sub-pixels are different, resulting in different brightness of the corresponding sub-pixels, which affects the display effect.
  • the first signal introduction part 210 is divided into the first sub-signal introduction part 211 and the third sub-signal introduction part 213, and the first sub-signal introduction part 211 and the third sub-signal introduction part 211 are connected through the fifth bridge connection part 450.
  • the electrical connection of the sub-signal introduction parts 213 can increase the resistance between the first signal introduction part 210 and the signal introduction line in the first line group, which is the current flow path, thereby reducing the signal flow path stv_a and the signal flow path stv_b.
  • the voltage difference between the signal circulation paths reduces the delay difference when the signals stv_a and stv_b are input to the signal input terminal IP, and improves the display effect.
  • the ninth transfer via hole GZ9 penetrates through the gate insulating layer and the interlayer insulating layer.
  • the tenth transfer via hole GZ10 runs through the gate insulating layer and the interlayer insulating layer.
  • the first signal introduction part 210 may include: a first sub-signal introduction part 211 and a third sub-signal introduction part 213 .
  • the second signal introduction part 220 includes a second sub-signal introduction part 221, that is, the second signal introduction part 220 is used as the second sub-signal introduction part, so that the number of the first sub-signal introduction part 211 and the second signal introduction part 220 can same.
  • the third sub-signal introduction part 213 is directly electrically connected to the first ends of the signal introduction lines 110-1, 110-2 and 110-3 in the first line group.
  • the first end of the fifth bridge connection part 450 is electrically connected to the first sub-signal introduction part through the ninth transfer via hole GZ9, and the second end of the fifth bridge connection part 450 is connected to the first sub-signal introduction part through the tenth transfer via hole GZ10.
  • the three sub-signal introduction parts 213 are electrically connected.
  • the first sub-signal introduction part is electrically connected to the bonding terminal (PAD) of the input signal stv_a, so that the signal stv_a input to the bonding terminal (PAD) can pass through the first sub-signal introduction part,
  • the fifth bridge connection part 450 , the third sub-signal lead-in part 213 and the signal lead-in lines 110 - 1 , 110 - 2 and 110 - 3 in the first line group are input to the signal input terminal IP of the corresponding shift register.
  • the total number of the ninth transfer vias GZ9 and the total number of the second transfer vias GZ2 may be the same.
  • the total number of the ninth transfer vias GZ9 and the total number of the second transfer vias GZ2 can be set to 12, 8, 10 or other numbers.
  • the total number of the ninth transfer vias GZ9 and the total number of the second transfer vias GZ2 may also be different.
  • the total number of the ninth transfer vias GZ9 and the total number of the second transfer vias GZ2 can be designed and determined according to the requirements of practical applications, and are not limited here.
  • the total number of the tenth transfer vias GZ10 and the total number of the first transfer vias GZ1 may be the same.
  • the total number of the tenth transfer vias GZ10 and the total number of the first transfer vias GZ1 can be set to 12, 8, 10 or other numbers.
  • the total number of the tenth transfer vias GZ10 and the total number of the first transfer vias GZ1 may also be different.
  • the total number of the tenth transfer vias GZ10 and the total number of the first transfer vias GZ1 can be designed and determined according to the requirements of practical applications, and are not limited here.
  • Embodiments of the present disclosure provide still some schematic structural diagrams of display panels, as shown in FIG. 9 a to FIG. 10 , which are modified for the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the signal lead-in wires in the first wire group include a first signal lead segment and a second signal lead segment.
  • the display panel further includes: a plurality of fourth bridge connection parts; wherein, the fourth bridge connection part is located on the same layer as the first bridge connection part 410; wherein, in the same signal lead line, the first signal lead segment and the second signal The lead segments are electrically connected via the fourth bridge connection.
  • a plurality of fourth bridging connections may be arranged at intervals from each other.
  • the orthographic projection of the fourth bridging connection portion on the base substrate does not overlap with the orthographic projections of the signal lead-in line in the first wire group, the fourth bridging connection portion, and the bridging portion on the base substrate. This further reduces signal interference.
  • the signal lead-in wires in the first wire group include a first signal lead segment and a second signal lead segment.
  • the first signal lead segment 110-1a and the second signal lead segment 110-1b are electrically connected through the fourth bridge connection part 440-1.
  • the first signal lead segment 110-2a and the second signal lead segment 110-2b are electrically connected through the fourth bridge connection part 440-2.
  • the signal lead-in line 110-3 the first signal lead segment 110-3a and the second signal lead segment 110-3b are electrically connected through the fourth bridge connection part 440-3.
  • the resistance difference between the signal lead-in lines in the first line group and the signal lead-in lines in the second line group can be reduced, the delay of the signals stv_a and stv_b can be further reduced, and the display effect can be further improved.
  • the second end of -1a is electrically connected to the first end of the corresponding fourth bridge connection part 440-1 through the fifth transfer via hole GZ5, and the second end of the fourth bridge connection part 440-1 is electrically connected through the sixth transfer via hole GZ5.
  • the first end of the first signal lead section 110-2a is directly electrically connected to the third sub-signal introduction part 213, and the second end of the first signal lead section 110-2a is connected to the corresponding second sub-signal section 110-2a through the fifth transfer via hole GZ5.
  • the first end of the four bridge connection part 440-2 is electrically connected, and the second end of the fourth bridge connection part 440-2 is electrically connected to the second signal lead segment 110-2b through the sixth transfer via hole GZ6.
  • the first end of the first signal lead section 110-3a is directly electrically connected to the third sub-signal introduction part 213, and the second end of the first signal lead section 110-3a is connected to the corresponding second sub-signal section 110-3a through the fifth transfer via hole GZ5.
  • the first end of the four bridge connection part 440-3 is electrically connected, and the second end of the fourth bridge connection part 440-3 is electrically connected to the second signal lead segment 110-3b through the sixth transfer via hole GZ6.
  • the fifth transfer via hole GZ5 penetrates through the gate insulating layer and the interlayer insulating layer.
  • the sixth transfer via hole GZ6 runs through the gate insulating layer and the interlayer insulating layer.
  • the second ends of the first signal lead segments in the first wire group are arranged at intervals from each other. Moreover, gaps are provided between the second ends of the first signal lead wire segments in the first wire group.
  • the orthographic projection of the second end of the first signal lead segment in the first wire group on the base substrate does not overlap with the orthographic projection of each signal lead-in wire in the second wire group on the base substrate.
  • the fifth transfer via hole corresponding to a fourth bridging connection part may be the same as the total number of the third transfer vias GZ3 corresponding to one second bridging connection portion 420 .
  • the total number of fifth transfer vias GZ5 corresponding to a fourth bridge connection part and the total number of third transfer vias GZ3 corresponding to a second bridge connection part 420 can be 2 or 3 or 1 or other quantities.
  • the total number of the fifth transfer vias GZ5 corresponding to one fourth bridge connection part and the total number of the third transfer vias GZ3 corresponding to one second bridge connection part 420 may also be different.
  • the total number of fifth transfer vias GZ5 corresponding to one fourth bridge connection part and the total number of third transfer vias GZ3 corresponding to one second bridge connection part 420 can be adjusted according to the actual application requirements. It is determined by design and is not limited here.
  • a fourth bridging connection corresponding to a sixth transition may be the same as the total number of fourth transition vias GZ4 corresponding to one second bridging connection portion 420 .
  • the total number of the sixth transfer vias GZ6 corresponding to a fourth bridge connection part and the total number of the fourth transfer vias GZ4 corresponding to a second bridge connection part 420 can be 2 or 3 or 1 or other quantities.
  • the total number of the sixth transfer vias GZ6 corresponding to one fourth bridge connection part and the total number of the fourth transfer vias GZ4 corresponding to one second bridge connection part 420 may also be different.
  • the total number of sixth transfer vias GZ6 corresponding to one fourth bridge connection part and the total number of fourth transfer vias GZ4 corresponding to one second bridge connection part 420 can be adjusted according to the actual application requirements. It is determined by design and is not limited here.
  • Embodiments of the present disclosure provide still some schematic structural diagrams of display panels, as shown in FIG. 11 a to FIG. 11 d , which are modified for the implementation manners in the foregoing embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the second ends of the first signal lead segments in the first wire group may be in contact with each other to form an integrated structure. That is to say, the orthographic projection of the integrated structure formed by the contact of the second ends of the first signal lead segments in the first wire group on the substrate and the orthographic projection of the signal lead-in wires in the second wire group on the substrate have overlapping regions.
  • a plurality of second sub-bridges may be in contact with each other to form an integrated structure. That is to say, the orthographic projection of the integrated structure formed by the plurality of second sub-bridges in contact with each other on the base substrate has an overlapping area with the orthographic projection of the signal lead-in lines in the first line group on the base substrate.
  • the three second sub-bridge connection parts included in the second bridging connection part 420 are in contact with each other to form an integrated structure.
  • Embodiments of the present disclosure provide still some structural schematic diagrams of display panels, as shown in FIG. 12a and FIG. 12b , which are modified for the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the second signal introduction part 220 includes: at least one second sub-signal introduction part; the first bridging connection part 410 is electrically connected to each second sub-signal introduction part through the second transfer via hole GZ2;
  • the total number of one sub-signal lead-in parts is the same as the total number of second sub-signal lead-in parts.
  • the total number of first sub-signal lead-in parts and the total number of second sub-signal lead-in parts may be the same.
  • the first signal introduction part 210 may include: two first sub-signal introduction parts 211 - 1 , 211 - 2 and a third sub-signal introduction part 213 .
  • the second signal introduction part 220 may include: two second sub-signal introduction parts 221-1, 221-2.
  • the fifth bridge connection part 450 is electrically connected to the first sub-signal introduction part 211-1, 211-2 through the ninth transfer via hole GZ9, and the fifth bridge connection part 450 is connected to the third sub-signal introduction part 211-2 through the tenth transfer via hole GZ10.
  • the sub-signal introduction part 213 is electrically connected.
  • the first bridging connection part 410 is electrically connected to the second sub-signal introduction part 221-1, 221-2 through the second transfer via hole GZ2.
  • the total number of first sub-signal introduction parts and the total number of second sub-signal introduction parts can also be set to 3, 4 or more, which is not limited here.
  • the total number of the first sub-signal introduction part and the total number of the second sub-signal introduction part may also be different.
  • the total number of first sub-signal introduction parts and the total number of second sub-signal introduction parts can be designed and determined according to the requirements of practical applications, which are not limited here.
  • Embodiments of the present disclosure provide still some schematic structural diagrams of display panels, as shown in FIG. 13a and FIG. 13b , which are modified for the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the signal lead-in wires in the first wire group include one first signal lead segment and at least two second signal lead segments.
  • the first signal lead segment and the second signal lead segment are electrically connected through the fourth bridge connection part
  • the adjacent second signal lead segments are electrically connected through the fourth bridge connection part.
  • one of the adjacent second signal lead segments is electrically connected to the first end of the corresponding fourth bridge connection part through the seventh transfer via hole GZ7, and the first end of the fourth bridge connection part The two ends are electrically connected to another second signal lead segment through the eighth transfer via hole GZ8.
  • the seventh transfer via hole GZ7 penetrates through the gate insulating layer and the interlayer insulating layer.
  • the eighth transfer via hole GZ8 runs through the gate insulating layer and the interlayer insulating layer.
  • the signal lead-in wires in the second wire group include at least two third signal lead wire segments;
  • the display panel further includes: a plurality of third bridging connection parts (such as 430- 1, 430-2, 430-3); in the same signal lead-in line, two adjacent third signal lead segments are electrically connected through the third bridging connection part, and the first end of the third bridging connection part is connected through the tenth bridging connection part
  • the three transfer vias GZ13 are electrically connected to a third signal lead segment, and the second end of the third bridging connection part is electrically connected to another third signal lead segment through the fourteenth transfer via GZ14 .
  • the thirteenth transfer via hole GZ13 penetrates through the gate insulating layer and the interlayer insulating layer.
  • the fourteenth transfer via hole GZ14 runs through the gate insulating layer and the interlayer insulating layer.
  • a plurality of fourth bridging connection portions are arranged at intervals from each other. That is to say, the orthographic projection of the fourth bridging connection portion on the base substrate does not overlap with the orthographic projection of the signal lead-in line in the second line group on the base substrate.
  • the total number of the fourth bridging connections corresponding to one signal lead-in line in the first line group, and the third bridge connection part corresponding to one signal lead-in line in the second line group The sum of the total number of bridging connections and second bridging connections is the same.
  • the signal lead-in line 110-1 corresponds to two fourth bridge connections
  • the signal lead-in line 110-2 corresponds to two fourth bridge connections
  • the signal lead-in line 110-3 corresponds to two fourth bridge connections.
  • the signal lead-in line 120-1 corresponds to a third bridge connection part and a second bridge connection part 421
  • the signal lead-in line 120-2 corresponds to a third bridge connection part and a second bridge connection part 422
  • the signal lead-in line 120 - 3 corresponds to a third bridge connection part and a second bridge connection part 423 .
  • the signal lead-in wire 110-1 includes a first signal lead wire segment 110-1a and two second signal lead wire segments 110-1b, 110-1c .
  • the first end of the first signal lead section 110-1a is directly electrically connected to the third sub-signal introduction part 213, and the second end of the first signal lead section 110-1a is connected to the fourth bridge through the fifth transfer via hole GZ5.
  • the transfer part 440-1a is electrically connected, the fourth bridge transfer part 440-1a is electrically connected to the first end of the second signal lead segment 110-1b through the sixth transfer via hole GZ6, and the second signal lead segment 110-1b
  • the second end of the second end is electrically connected to the fourth bridge transfer part 440-1b through the seventh transfer via hole GZ7, and the fourth bridge transfer part 440-1b is connected to the second signal lead segment 110-1b through the eighth transfer via hole GZ8.
  • the first end of 1c is electrically connected, and the second end of the second signal lead segment 110-1c is electrically connected to the input signal end IP of the corresponding shift register.
  • the first end of the first signal lead section 110-2a is directly electrically connected to the third sub-signal introduction part 213, and the second end of the first signal lead section 110-2a is connected to the fourth bridge through the fifth transfer via hole GZ5
  • the transfer part 440-2a is electrically connected
  • the fourth bridge transfer part 440-2a is electrically connected to the first end of the second signal lead segment 110-2b through the sixth transfer via hole GZ6, and the second signal lead segment 110-2b
  • the second end of the second end is electrically connected to the fourth bridge transfer part 440-2b through the seventh transfer via hole GZ7
  • the fourth bridge transfer part 440-2b is connected to the second signal lead segment 110-2b through the eighth transfer via hole GZ8.
  • the first end of 2c is electrically connected, and the second end of the second signal lead segment 110-2c is electrically connected to the input signal end IP of the corresponding shift register. And, the first end of the first signal lead segment 110-3a is directly electrically connected to the third sub-signal introduction part 213, and the second end of the first signal lead segment 110-3a is connected to the fourth bridge through the fifth transfer via hole GZ5
  • the transfer part 440-3a is electrically connected, the fourth bridge transfer part 440-3a is electrically connected to the first end of the second signal lead segment 110-3b through the sixth transfer via hole GZ6, and the second signal lead segment 110-3b
  • the second end of the second end is electrically connected to the fourth bridge transfer part 440-3b through the seventh transfer via hole GZ7, and the fourth bridge transfer part 440-3b is connected to the second signal lead segment 110-3b through the eighth transfer via hole GZ8.
  • the first end of 3c is electrically connected, and the second end of the second signal lead segment 110-3c is electrically connected to the input
  • the signal lead-in wire 120-1 may include two third signal lead wire segments 120-1b, 120-1c.
  • the first end of the third signal lead section 120-1b is electrically connected to the second sub-bridge connection part 421 through the third transfer via hole GZ3, and the second end of the third signal lead section 120-1b is connected through the thirteenth transfer hole GZ3.
  • the connection via hole GZ13 is electrically connected to the third bridge connection part 430-1, and the third bridge connection part 430-1 is electrically connected to the first end of the third signal lead segment 120-1c through the fourteenth transfer via hole GZ14.
  • the second end of the three-signal lead segment 120-1c is electrically connected to the input signal end IP of the corresponding shift register.
  • the signal lead-in 120-2 may include two third signal lead segments 120-2b, 120-2c.
  • the first end of the third signal lead segment 120-2b is electrically connected to the second sub-bridge connection part 422 through the third transfer via hole GZ3
  • the second end of the third signal lead segment 120-2b is electrically connected to the second sub-bridge connection part 422 through the thirteenth transfer hole GZ3.
  • the connection via hole GZ13 is electrically connected to the third bridge connection part 430-2
  • the third bridge connection part 430-2 is electrically connected to the first end of the third signal lead segment 120-2c through the fourteenth transfer via hole GZ14.
  • the second end of the three-signal lead segment 120-2c is electrically connected to the input signal end IP of the corresponding shift register.
  • the signal lead-in 120-3 may include two third signal lead segments 120-3b, 120-3c.
  • the first end of the third signal lead section 120-3b is electrically connected to the second sub-bridge connection part 423 through the third transfer via hole GZ3, and the second end of the third signal lead section 120-3b is connected through the thirteenth turn
  • the connection via hole GZ13 is electrically connected to the third bridge connection part 430-3, and the third bridge connection part 430-3 is electrically connected to the first end of the third signal lead segment 120-3c through the fourteenth transfer via hole GZ14.
  • the second end of the three-signal lead segment 120-3c is electrically connected to the input signal end IP of the corresponding shift register.
  • Embodiments of the present disclosure provide still some schematic structural diagrams of display panels, as shown in FIG. 14a to FIG. 15b , which are modified for the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the display panel further includes: a first auxiliary portion 510 and a second auxiliary portion 520; the first auxiliary portion 510 and the second auxiliary portion 520 are located on the same layer as the bridging portion ; Wherein, the orthographic projection of the first auxiliary portion 510 on the base substrate is located between the first sub-signal introduction portion and the third sub-signal introduction portion 213 on the orthographic projection of the base substrate; and, the fifth bridging connection portion 450 also passes through The fifteenth transition via GZ15 is electrically connected to the first auxiliary part 510 .
  • the orthographic projection of the second auxiliary part 520 on the substrate is located between the second sub-signal introduction part and the orthographic projection of the first bridging part 310 on the substrate; and the first bridging connection part 410 also passes through the sixteenth
  • the transfer via GZ16 is electrically connected to the second auxiliary part 520 .
  • the fifteenth transfer via hole GZ15 penetrates the interlayer insulation layer
  • the sixteenth transfer via hole GZ16 penetrates the interlayer insulation layer.
  • the first signal introduction part 210 may include: a first sub-signal introduction part 211 and a third sub-signal introduction part 213.
  • the orthographic projection of the first auxiliary part 510 on the base substrate is located between the orthographic projections of the first sub-signal introduction part 211 and the third sub-signal introduction part 213 on the base substrate.
  • the fifth bridging connection portion 450 is also electrically connected to the first auxiliary portion 510 through the fifteenth transition via GZ15 .
  • the second signal introduction part 200 may include: a second sub-signal introduction part 221 .
  • the orthographic projection of the second auxiliary portion 520 on the base substrate is located between the second sub-signal introduction portion 221 and the orthographic projection of the first bridging portion 310 on the base substrate.
  • the first bridging connection part 410 is also electrically connected to the second auxiliary part 520 through the sixteenth transition via GZ16 .
  • the first auxiliary part 510 electrically connected to the first signal introduction part 210 is provided to reduce the resistance of the signal stv_a circulation path.
  • a second auxiliary part 520 electrically connected to the second sub-signal introduction part is provided to reduce the resistance of the circulation path of the signal stv_b.
  • the total number of the fifteenth transfer vias GZ15 and the total number of the sixteenth transfer vias GZ16 may be the same.
  • the total number of the fifteenth transfer via hole GZ15 and the total number of the sixteenth transfer via hole GZ16 can be set to 16, 20, 24 or other numbers, which can be designed and determined according to the needs of actual applications, here Not limited.
  • the total number of the fifteenth transfer vias GZ15 and the total number of the sixteenth transfer vias GZ16 may also be different.
  • the total number of the fifteenth transfer vias GZ15 and the total number of the sixteenth transfer vias GZ16 can be designed and determined according to the requirements of practical applications, and are not limited here.
  • the first transfer via GZ1, the second transfer via GZ2, the ninth transfer via GZ9, the tenth transfer via The dimensions of GZ10, the fifteenth transfer via hole GZ15, and the sixteenth transfer via hole GZ16 may be the same.
  • the first transfer via GZ1, the second transfer via GZ2, the ninth transfer via GZ9, the tenth transfer via GZ10, the fifteenth transfer via GZ15, the sixteenth transfer via The shape of GZ16 can be the same.
  • the first transfer via GZ1, the second transfer via GZ2, the ninth transfer via GZ9, the tenth transfer via GZ10, the fifteenth transfer via GZ15, the sixteenth transfer via The size and shape of the transfer via hole GZ16 can be designed and determined according to actual application requirements, and is not limited here.
  • the third transfer via GZ3, the fourth transfer via GZ4, the fifth transfer via GZ5, the sixth transfer via GZ6 can be the same size.
  • the shapes of the third transfer via GZ3 , the fourth transfer via GZ4 , the fifth transfer via GZ5 , and the sixth transfer via GZ6 may be the same.
  • the size and shape of the third via GZ3, the fourth via GZ4, the fifth via GZ5, and the sixth via GZ6 can be designed and determined according to the actual application requirements. , is not limited here.
  • the size of GZ10, the fifteenth transfer hole GZ15, and the sixteenth transfer hole GZ16 can be larger than the third transfer hole GZ3, the fourth transfer hole GZ4, the fifth transfer hole GZ5, and the sixth transfer hole.
  • the first transfer via GZ1, the second transfer via GZ2, the ninth transfer via GZ9, the tenth transfer via The shape of GZ10, the fifteenth transfer hole GZ15, and the sixteenth transfer hole GZ16 can be compared with the third transfer hole GZ3, the fourth transfer hole GZ4, the fifth transfer hole GZ5, the sixth The transfer vias GZ6 have the same shape.
  • the side of the first bridge connection part 410 away from the bridge part and the side of the second sub-signal introduction part close to the bridge part in the direction F1 The distance W1 between them can be set to 30um ⁇ 50um.
  • W1 may be set to 30um.
  • W1 can also be set to 35um.
  • W1 can also be set to 40um.
  • W1 can also be set to 45um.
  • W1 can also be set to 50um.
  • the specific value of W1 can be designed according to the requirements of practical applications, which is not limited here.
  • W2 between one side of the portion may be set to 4um ⁇ 10um.
  • W2 can be set to 4um.
  • W2 can also be set to 5um.
  • W2 can also be set to 6um.
  • W2 can also be set to 7um.
  • W2 can also be set to 8um.
  • W2 can also be set to 9um.
  • W2 can also be set to 10um.
  • the specific value of W2 can be designed according to the requirements of practical applications, which is not limited here.
  • the side of the second auxiliary part 520 close to the second sub-signal introduction part and the side of the second auxiliary part 520 away from the second sub-signal introduction part along the direction F1 are
  • the distance W3 between one side of the signal introduction part can be set to 60um ⁇ 100um.
  • W3 can be set to 60um.
  • W3 can also be set to 70um.
  • W3 can also be set to 80um.
  • W3 can also be set to 90um.
  • W3 can also be set to 100um.
  • the specific value of W3 can be designed according to the requirements of practical applications, which is not limited here.
  • the first auxiliary portion 510 partially overlaps the bridging portion along the direction F2, and the first auxiliary portion 510 along the direction F2
  • the distance W4 from the bridging portion can be set at 40um ⁇ 80um.
  • W4 can be set to 40um.
  • W4 can also be set to 50um.
  • W4 can also be set to 60um.
  • W4 can also be set to 70um.
  • W4 can also be set to 80um.
  • the specific value of W4 can be designed according to the requirements of practical applications, which is not limited here.
  • the distance W5 of the first bridging portion 310 along the direction F2 can be set to 50um ⁇ 150um.
  • W5 can be set to 50um.
  • W5 can also be set to 70um.
  • W5 can also be set to 90um.
  • W5 can also be set to 110um.
  • W5 can also be set to 130um.
  • W5 can also be set to 150um.
  • the specific value of W5 can be designed according to the requirements of practical applications, which is not limited here.
  • the distance W6 along the direction F1 of the area where the signal lead-in line in the first line group is provided with the fifth transfer via hole GZ5 can be set It is 20um ⁇ 80um.
  • W6 can be set to 20um.
  • W6 can also be set to 30um.
  • W6 can also be set to 40um.
  • W6 can also be set to 50um.
  • W6 can also be set to 60um.
  • W6 can also be set to 70um.
  • W6 can also be set to 80um.
  • the specific value of W6 can be designed according to the requirements of practical applications, which is not limited here.
  • the distance along the direction F1 of the area where the signal lead-in line in the first line group is provided with the sixth transfer via hole GZ6 can also be W6, the details will not be repeated here.
  • the line where the fourth bridging connection part is close to the side of the second bridging connection part 420 and the second bridging connection part can be set to 4um ⁇ 10um.
  • W7 can be set to 4um.
  • W7 can be set to 5um.
  • W7 can be set to 6um.
  • W7 can be set to 7um.
  • W7 can be set to 8um.
  • W7 can be set to 9um.
  • W7 can be set to 10um.
  • the specific value of W7 can be designed according to the requirements of practical applications, which is not limited here.
  • the distance W8 between the second bridging connection part 420 and its adjacent signal lead-in line can be set to 4um-10um .
  • W8 can be set to 4um.
  • W8 can be set to 5um.
  • W8 can be set to 6um.
  • W8 can be set to 7um.
  • W8 can be set to 8um.
  • W8 can be set to 9um.
  • W8 can be set to 10um.
  • the specific value of W8 can be designed according to the requirements of practical applications, which is not limited here.
  • the distance between the fourth bridging connection part and its adjacent signal lead-in line may be W8, which is not specifically described here. repeat.
  • the distance W9 of the second bridging connection portion 420 along the direction F2 can be set to 4um ⁇ 10um.
  • W9 can be set to 4um.
  • W9 can be set to 5um.
  • W9 can be set to 6um.
  • W9 can be set to 7um.
  • W9 can be set to 8um.
  • W9 can be set to 9um.
  • W9 can be set to 10um.
  • the specific value of W9 can be designed according to the requirements of practical applications, which is not limited here.
  • the distance of the fourth bridging connection portion in the direction F2 may be W9, and details are not described here.
  • each signal lead-in line in the second line group is not provided with an area for transfer via holes, and the distance W10 along the direction F1 can be set as 4um ⁇ 10um.
  • W10 can be set to 4um.
  • W10 can be set to 5um.
  • W10 can be set to 6um.
  • W10 can be set to 7um.
  • W10 can be set to 8um.
  • W10 can be set to 9um.
  • W10 can be set to 10um.
  • the specific value of W10 can be designed according to the requirements of practical applications, which is not limited here.
  • each signal lead-in line in the first line group is not provided with a transfer via area, and the distance along the direction F1 can also be W10, details will not be repeated here.
  • the distance W11 along the direction F2 can be set to 4um ⁇ 10um.
  • W11 can be set to 4um.
  • W11 can be set to 5um.
  • W11 can be set to 6um.
  • W11 can be set to 7um.
  • W11 can be set to 8um.
  • W11 can be set to 9um.
  • W11 can be set to 10um.
  • the specific value of W11 can be designed according to the requirements of practical applications, which is not limited here.
  • the third sub-bridge part (such as 421) and the signal lead-in line (such as 120-1) connected to the same second bridge transfer part are connected along the The distance in the direction F2 may also be W11, which will not be detailed here.
  • Embodiments of the present disclosure provide still some schematic structural diagrams of display panels, as shown in FIG. 17a to FIG. 17d , which are modified for the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the display panel may further include: a plurality of third auxiliary parts (such as 530-1, 530-2, 530-3); the third auxiliary parts and the first
  • the auxiliary part 510 is located on the same layer as the bridging part; a signal lead-in line in the first line group is correspondingly provided with at least one third auxiliary part; wherein, in the same signal lead-in line, the first signal lead-in section passes through the corresponding third auxiliary part and The second signal lead segment is electrically connected.
  • the display panel further includes: a plurality of sixth bridge transfer parts and a plurality of seventh bridge transfer parts; wherein at least one third auxiliary part is correspondingly provided with at least one sixth bridge transfer part and at least one seventh bridge transfer part Bridge transfer part; the first end of the third auxiliary part is electrically connected to the corresponding sixth bridge transfer part through the eleventh transfer via hole GZ11, and the sixth bridge transfer part is connected to the corresponding sixth bridge transfer part through the twelfth transfer via hole GZ12.
  • the corresponding first signal lead segment is electrically connected
  • the second end of the third auxiliary part is electrically connected to the corresponding seventh bridge transfer part through the seventeenth transfer via hole GZ17
  • the seventh bridge transfer part is connected through the eighteenth transfer hole GZ17.
  • the via hole GZ18 is electrically connected to the corresponding seventh bridge transfer portion.
  • the eleventh transfer via hole GZ11 penetrates through the interlayer insulating layer.
  • the twelfth transfer via hole GZ12 runs through the gate insulating layer and the interlayer insulating layer.
  • the seventeenth transfer via hole GZ17 penetrates through the interlayer insulating layer.
  • the eighteenth transfer via hole GZ18 runs through the gate insulating layer and the interlayer insulating layer.
  • the signal lead-in line 110-1 is correspondingly provided with a third auxiliary part 530-1, a sixth bridge transfer part 460-1 and a seventh bridge transfer part 470-1.
  • the first signal lead segment 110-1a is electrically connected to the sixth bridge transfer part 460-1 through the twelfth transfer via hole GZ12, and the sixth bridge transfer part 460-1 is connected to the sixth bridge transfer part 460-1 through the eleventh transfer via hole GZ11.
  • the first ends of the three auxiliary parts 530-1 are electrically connected.
  • the second end of the third auxiliary part 530-1 is electrically connected to the seventh bridge transfer part 470-1 through the seventeenth transfer via hole GZ17, and the seventh bridge transfer part 470-1 is passed through the eighteenth transfer via hole GZ18 is electrically connected to the second signal lead segment 110-1b. This can further reduce the difference between the resistance of the signal lead-in wires in the first line group and the resistance of the signal lead-in wires in the second line group. The rest are the same and will not be repeated here.
  • Embodiments of the present disclosure provide still some schematic structural diagrams of display panels, as shown in FIG. 18 a to FIG. 19 , which are modified for the implementation manners in the above-mentioned embodiments. The following only describes the differences between this embodiment and the above-mentioned embodiments, and the similarities will not be repeated here.
  • the bridging portion may include a fourth bridging portion 340, a sixth bridging portion, and a fifth bridging portion connected between the fourth bridging portion 340 and the sixth bridging portion.
  • the fourth bridge part 340 is electrically connected with the second signal introduction part 220 through the first conduction hole GK1; the sixth bridge part is electrically connected with the signal lead-in line in the second line group through the second conduction through hole GK2.
  • the fifth bridge part includes a plurality of fifth sub-bridge parts (such as 351, 352, 353) arranged at intervals from each other;
  • the sixth bridge part includes a plurality of sixth sub-bridge parts (such as 361, 362) arranged at intervals from each other. , 363);
  • the fourth bridge part 340 is electrically connected to one signal lead-in line in the second line group through at least one fifth sub-bridge part and at least one sixth sub-bridge part.
  • the second signal introduction part 220 is electrically connected to the fourth bridge part 340 through the first conductive via hole GK1
  • the sixth sub-bridge part 361 is directly electrically connected to the fifth sub-bridge part 351
  • the fifth sub-bridge part 351 is passed through
  • the second conductor is electrically connected to the signal lead-in line 120-1 through the hole GK2.
  • the sixth sub-bridge part 362 is directly electrically connected to the fifth sub-bridge part 352
  • the fifth sub-bridge part 352 is electrically connected to the signal lead-in line 120 - 2 through the second conducting hole GK2 .
  • the sixth sub-bridge part 363 is directly electrically connected to the fifth sub-bridge part 353, and the fifth sub-bridge part 353 is electrically connected to the signal lead-in line 120-3 through the second conductive via hole GK2.
  • the first signal introduction part 210 includes: a first hollow area KB1; wherein, the first hollow area KB1 includes: a first bonding via hole GH1 and a first bonding slot slit GF1 ; wherein, the first bonding via GH1 and the first bonding slit GF1 run through the first signal introduction part 210 .
  • the resistance difference between the signal circulation path stv_a corresponding to the signal lead-in line in the first line group from the first signal lead-in part 210 to the first line group is relatively large, resulting in a difference in delay when the signals stv_a and stv_b are input to the signal input terminal IP , which in turn leads to the output signal terminal GO output of the first-stage shift register, the third-stage shift register, the fifth-stage shift register and the second-stage shift register, the fourth-stage shift register, and the sixth-stage shift register
  • the signals of the sub-pixels are different, resulting in different brightness of the corresponding sub-pixels, which affects the display effect.
  • the first hollow area KB1 is provided on the first signal introduction part 210, and the first bonding via hole GH1 and the first bonding slit penetrating through the second signal introduction part 220 are provided in the first hollow area KB1.
  • GF1 which can increase the resistance of the first signal introduction part 210, thereby reducing the voltage difference between the signal flow path stv_a and the signal flow path stv_b, and reducing the delay when the signals stv_a and stv_b are input to the signal input terminal IP The difference improves the display effect.
  • the total number of the first bonding vias GH1 and the total number of the first conductive vias GK1 may be set to be the same.
  • the total number of the first bonding vias GH1 and the total number of the first guide vias GK1 can be set to 12, 8, or other numbers, which are not limited here.
  • the total number of the first bonding vias GH1 and the total number of the first guiding vias GK1 can also be set differently, which can be determined according to the requirements of practical applications, and is not limited here.
  • the display panel may further include: a fourth auxiliary part 540 and a fifth auxiliary part 550; the fourth auxiliary part 540 and the fifth auxiliary part 550 are located at the same layer; wherein, the fourth auxiliary part 540 is electrically connected to the first signal introduction part 210 through the third conductive via hole GK3; wherein, the fifth auxiliary part 550 is electrically connected to the second signal introduction part 220 through the fourth conductive via hole GK4.
  • the fourth auxiliary part 540 electrically connected to the first signal introduction part 210
  • the resistance of the circulation path of the signal stv_a can be reduced.
  • the fifth auxiliary part 550 electrically connected to the second signal introduction part 220 the resistance of the flow path of the signal stv_b can be reduced.
  • the signal lead-in lines in the first line group may include a second hollow area (such as KB-1, KB-2, KB-3); the second hollow area Including: the second bonding via GH2 and the second bonding slit GF2; wherein, the second bonding via GH2 runs through the signal introduction line in the first line group, and the second bonding slit GF2 runs through the signal introduction in the first line group Wire.
  • This can increase the resistance of the signal lead-in lines in the first line group, further reducing the difference between the resistance of the flow path of the signal stv_a and the resistance of the flow path of stv_b.
  • the second hollow area (such as KB-1, KB-2, KB-3) further includes: the second bonding via hole GH2; wherein, the second bonding via The hole GH2 runs through the signal lead-in wires in the first line group, and the second bonding via hole GH2 is located on the side of the second bonding slit GF2 away from the first bonding via hole GH1;
  • the end connecting the five sub-bridges is provided with a fourth bonding via GH4; wherein, the fourth bonding via GH4 is located on the side of the second conductive via GK2 away from the sixth sub-bridge.
  • the sameness mentioned in the above-mentioned embodiments cannot be completely the same, and there may be some deviations.
  • the conditions are sufficient, and all belong to the protection scope of the present disclosure.
  • the above-mentioned identity may be the identity allowed within the error tolerance range.

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Abstract

本公开实施例提供的显示面板及显示装置，其中，显示面板，包括：衬底基板，包括非显示区；栅极驱动电路，位于非显示区；其中，栅极驱动电路包括多个移位寄存器，多个移位寄存器分为多个寄存器组；多条信号引入线，位于非显示区；其中，多条信号引入线分为多个线组，并且一个寄存器组的帧起始信号端对应电连接一个线组；其中，位于同一线组的两条信号引入线之间设置有其他线组的信号引入线。

Description

显示面板及显示装置 技术领域
本公开涉及显示技术领域，特别涉及显示面板及显示装置。
背景技术
在诸如液晶显示器(Liquid Crystal Display，LCD)和有机发光二极管(Organic Light-Emitting Diode，OLED)显示器中，一般包括多个像素单元。每个像素单元可以包括：红色子像素、绿色子像素以及蓝色子像素。通过控制每个子像素对应的亮度，从而混合出所需显示的色彩来显示彩色图像。
发明内容
本公开实施例提供的显示面板，包括：
衬底基板，包括非显示区；
栅极驱动电路，位于所述非显示区；其中，所述栅极驱动电路包括多个移位寄存器，所述多个移位寄存器分为多个寄存器组；
多条信号引入线，位于所述非显示区；其中，所述多条信号引入线分为多个线组，并且一个所述寄存器组的帧起始信号端对应电连接一个所述线组；
其中，位于同一所述线组的两条信号引入线之间设置有其他线组的信号引入线。
在一些示例中，所述显示面板还包括：
多个信号引入部；其中，所述多个线组中的一个所述线组与所述多个信号引入部中的所述信号引入部电连接；
多个桥接部；其中，所述桥接部与所述信号引入部位于不同层；
其中，所述信号引入部与所述信号引入线位于同一层；并且，所述多个线组中的一个所述线组与对应的信号引入部直接电连接，其余所述线组与对应的信号引入部通过桥接部电连接。
在一些示例中，所述多个寄存器组包括第一寄存器组和第二寄存器组；
所述多个线组包括第一线组和第二线组；
所述多个信号引入部包括第一信号引入部和第二信号引入部；
其中，所述第一线组的第一端与所述第一信号引入部直接电连接，所述第一线组的第二端与所述第一寄存器组的帧起始信号端电连接；
所述第二线组的第一端与所述第二信号引入部通过桥接部电连接，所述第二线组的第二端与所述第二寄存器组的帧起始信号端电连接。
在一些示例中，所述桥接部包括第一桥接部、第二桥接部以及连接于所述第一桥接部和所述第二桥接部之间的第三桥接部；
所述显示面板还包括：
第一桥接连接部，所述第一桥接连接部与所述桥接部以及信号引入部位于不同层；其中，所述第一桥接连接部的第一端与所述第一桥接部通过第一转接过孔电连接，且所述第一桥接连接部的第二端与所述第二信号引入部通过第二转接过孔电连接；
第二桥接连接部，所述第二桥接连接部与所述第一桥接连接部位于同一层；其中，所述第二桥接连接部的第一端与所述第二桥接部通过第三转接过孔电连接，且所述第二桥接连接部的第二端与所述第二线组中的信号引入线通过第四转接过孔电连接。
在一些示例中，所述第三桥接部包括相互间隔设置的多个第三子桥接部；其中，一个所述第三子桥接部对应一条信号引入线；
所述第二桥接部包括多个第二子桥接部；其中，一个所述第二子桥接部对应一条信号引入线。
在一些示例中，所述多个第二子桥接部相互间隔设置；
或者，所述多个第二子桥接部相互接触形成一体化结构。
在一些示例中，所述第二桥接连接部包括相互间隔设置的多个第二子桥接连接部；一个所述第二子桥接部通过所述第三转接过孔与一个所述第二子桥接连接部电连接。
在一些示例中，所述第一信号引入部包括：至少一个第一子信号引入部和第三子信号引入部；其中，所述第三子信号引入部与所述第一线组的第一端直接电连接；
所述显示面板还包括：
第五桥接连接部，所述第五桥接连接部与所述第一桥接连接部位于同一层；其中，所述第五桥接连接部通过第九转接过孔与各所述第一子信号引入部电连接，所述第五桥接连接部通过第十转接过孔与所述第三子信号引入部电连接。
在一些示例中，所述第一线组中的信号引入线包括第一信号引线段和至少一个第二信号引线段；
所述显示面板还包括：
多个第四桥接连接部，所述第四桥接连接部与所述第一桥接连接部位于同一层；其中，同一所述信号引入线中，所述第一信号引线段和所述第二信号引线段通过所述第四桥接连接部电连接，且相邻的所述第二信号引线段通过所述第四桥接连接部电连接。
在一些示例中，所述第一信号引线段的第一端与所述第三子信号引入部直接电连接，所述第一信号引线段的第二端通过第五转接过孔与对应的所述第四桥接连接部的第一端电连接，所述第四桥接连接部的第二端通过第六转接过孔与所述第二信号引线段的电连接；
相邻的所述第二信号引线段中的一个所述第二信号引线段通过第七转接过孔与对应的所述第四桥接连接部的第一端电连接，所述第四桥接连接部的第二端通过第八转接过孔与另一个所述第二信号引线段电连接。
在一些示例中，所述第一线组中的各所述第一信号引线段的第二端相互间隔设置；或者，所述第一线组中的各所述第一信号引线段的第二端相互接触形成一体化结构。
在一些示例中，所述第二线组中的信号引入线包括至少两个第三信号引线段；所述显示面板还包括：多个第三桥接连接部；
同一条所述信号引入线中，相邻的两个所述第三信号引线段通过所述第三桥接连接部电连接，且所述第三桥接连接部的第一端通过第十三转接过孔与一个所述第三信号引线段电连接，所述第三桥接连接部的第二端通过第十四转接过孔与另一个所述第三信号引线段电连接。
在一些示例中，所述多个第四桥接连接部相互间隔设置。
在一些示例中，所述第一线组中的一条信号引入线对应的第四桥接连接部的总数，与所述第二线组中的一条信号引入线对应的第三桥接连接部和第二桥接连接部的总数之和相同。
在一些示例中，所述第二信号引入部包括：至少一个第二子信号引入部；所述第一桥接连接部通过所述第二转接过孔与各所述第二子信号引入部电连接；
所述第一子信号引入部的总数与所述第二子信号引入部的总数相同。
在一些示例中，所述显示面板还包括：第一辅助部和第二辅助部；所述第一辅助部和所述第二辅助部与所述桥接部位于同一层；
所述第一辅助部在所述衬底基板的正投影位于所述第一子信号引入部和所述第三子信号引入部在所述衬底基板的正投影之间；并且，所述第五桥接连接部还通过第十五转接过孔与所述第一辅助部电连接；
所述第二辅助部在所述衬底基板的正投影位于所述第二子信号引入部和所述第一桥接部在所述衬底基板的正投影之间；并且，所述第一桥接连接部还通过第十六转接过孔与所述第二辅助部电连接。
在一些示例中，所述显示面板还包括：多个第三辅助部；所述第三辅助部和所述第一辅助部与所述桥接部位于同一层；
第一线组中的一条信号引入线对应设置至少一个第三辅助部；
其中，同一信号引入线中，所述第一信号引线段通过对应的所述第三辅助部与所述第二信号引线段电连接。
在一些示例中，所述显示面板还包括：多个第六桥接转接部和多个第七桥接转接部；
至少一个所述第三辅助部对应设置至少一个所述第六桥接转接部和至少一个所述第七桥接转接部；
所述第三辅助部的第一端通过第十一转接过孔与对应的所述第六桥接转接部电连接，所述第六桥接转接部通过第十二转接过孔与对应的所述第一信号引线段电连接，所述第三辅助部的第二端通过第十七转接过孔与对应的所述第七桥接转接部电连接，所述第七桥接转接部通过第十八转接过孔与对应的所述第二信号引线段电连接。
在一些示例中，所述桥接部包括第四桥接部、第六桥接部以及连接于所述第四桥接部和所述第六桥接部之间的第五桥接部；
所述第四桥接部与所述第二信号引入部通过第一导通过孔电连接；
所述第六桥接部与所述第二线组中的信号引入线通过第二导通过孔电连接。
在一些示例中，所述第五桥接部包括相互间隔设置的多个第五子桥接部；所述第六桥接部包括相互间隔设置的多个第六子桥接部；
所述第四桥接部通过至少一个所述第五子桥接部和至少一个第六子桥接部与所述第二线组中的一条信号引入线电连接。
在一些示例中，所述第一信号引入部包括：第一镂空区域；
所述第一镂空区域包括：第一结合过孔；其中，所述第一结合过孔贯穿所述第一信号引入部。
在一些示例中，所述第一镂空区域还包括：第一结合狭缝；其中，所述第一结合狭缝贯穿所述第一信号引入部。
在一些示例中，所述显示面板还包括：第四辅助部和第五辅助部；所述第四辅助部和第五辅助部与所述桥接部位于同一层；
所述第四辅助部通过第三导通过孔与所述第一信号引入部电连接；
第五辅助部通过第四导通过孔与所述第二信号引入部电连接。
在一些示例中，所述第一线组中的信号引入线包括第二镂空区域；
所述第二镂空区域包括：第二结合过孔；其中，所述第二结合过孔贯穿 所述第一线组中的信号引入线。
在一些示例中，所述第二镂空区域还包括：第二结合狭缝；其中，所述第二结合狭缝贯穿所述第一线组中的信号引入线。
在一些示例中，所述第二镂空区域还包括：第二结合过孔；其中，所述第二结合过孔贯穿所述第一线组中的信号引入线，且所述第二结合过孔位于所述第二结合狭缝背离所述第一结合过孔的一侧；
所述第二线组中的信号引入线与第五子桥接部连接的一端设置有第四结合过孔；其中，所述第四结合过孔位于所述第二导通过孔背离所述第六子桥接部一侧。
本公开实施例提供的显示装置，包括上述的显示面板。
附图说明
图1为本公开实施例中的显示面板的一些结构示意图；
图2为本公开实施例中的栅极驱动电路的一些结构示意图；
图3a为本公开实施例中的栅极驱动电路的第一寄存器组的一些结构示意图；
图3b为本公开实施例中的栅极驱动电路的第二寄存器组的一些结构示意图；
图4为本公开实施例中的栅极驱动电路的对应的信号时序图；
图5a为本公开实施例中的显示面板的一些布局结构示意图；
图5b为图5a中信号引入线所在层的布局结构示意图；
图5c为图5a中桥接部所在层的布局结构示意图；
图5d为图5a中第一桥接连接部所在层的布局结构示意图；
图6为图5a中沿AA’方向上的剖视结构示意图；
图7a为本公开实施例中的显示面板的又一些布局结构示意图；
图7b为图7a中信号引入线所在层的布局结构示意图；
图7c为图7a中桥接部所在层的布局结构示意图；
图7d为图7a中第一桥接连接部所在层的布局结构示意图；
图8为图7a中沿BB’方向上的剖视结构示意图；
图9a为本公开实施例中的显示面板的又一些布局结构示意图；
图9b为图9a中信号引入线所在层的布局结构示意图；
图9c为图9a中桥接部所在层的布局结构示意图；
图9d为图9a中第一桥接连接部所在层的布局结构示意图；
图10为图9a中沿CC’方向上的剖视结构示意图；
图11a为本公开实施例中的显示面板的又一些布局结构示意图；
图11b为图11a中信号引入线所在层的布局结构示意图；
图11c为图11a中桥接部所在层的布局结构示意图；
图11d为图11a中第一桥接连接部所在层的布局结构示意图；
图12a为本公开实施例中的显示面板的又一些布局结构示意图；
图12b为图12a中信号引入线所在层的布局结构示意图；
图13a为本公开实施例中的显示面板的又一些布局结构示意图；
图13b为图13a中信号引入线所在层的布局结构示意图；
图13c为图13a中第一桥接连接部所在层的布局结构示意图；
图14a为本公开实施例中的显示面板的又一些布局结构示意图；
图14b为图14a中信号引入线所在层的布局结构示意图；
图14c为图14a中桥接部所在层的布局结构示意图；
图14d为图14a中第一桥接连接部所在层的布局结构示意图；
图15a为图14a中沿DD’方向上的剖视结构示意图；
图15b为图14a中沿EE’方向上的剖视结构示意图；
图16为本公开实施例中的显示面板的又一些布局结构示意图；
图17a为本公开实施例中的显示面板的又一些布局结构示意图；
图17b为图17a中信号引入线所在层的布局结构示意图；
图17c为图17a中桥接部所在层的布局结构示意图；
图17d为图17a中第一桥接连接部所在层的布局结构示意图；
图18a为本公开实施例中的显示面板的又一些布局结构示意图；
图18b为图18a中信号引入线所在层的布局结构示意图；
图18c为图18a中桥接部所在层的布局结构示意图；
图19为图18a中沿FF’方向上的剖视结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。并且在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、总数或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。
需要注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
参见图1，显示面板可以包括衬底基板100。衬底基板包括显示区和围绕显示区的非显示区。其中，显示区可以包括多个阵列排布的像素单元，多条栅线GA(例如，GA1、GA2、GA3、GA4)、多条数据线DA(例如，DA1、DA2、DA3)。非显示区可以包括栅极驱动电路110以及源极驱动电路120。示例性地，栅极驱动电路110分别与栅线GA1、GA2、GA3、GA4电连接， 源极驱动电路120分别与数据线DA1、DA2、DA3电连接。其中，可以向栅极驱动电路110输入信号，从而使栅极驱动电路110输出信号以驱动栅线GA1、GA2、GA3、GA4。通过向源极驱动电路120输入信号，以使源极驱动电路120向数据线输入数据电压，从而对子像素SPX充电，使子像素SPX输入相应的数据电压，实现画面显示功能。示例性地，源极驱动电路120可以设置为2个，其中一个源极驱动电路120连接一半数量的数据线，另一个源极驱动电路120连接另一半数量的数据线。当然，源极驱动电路120也可以设置1个、3个、4个、或更多个，其可以根据实际应用的需求进行设计确定，在此不作限定。
示例性地，每个像素单元包括多个子像素SPX。例如，像素单元可以包括红色子像素，绿色子像素以及蓝色子像素，这样可以通过红绿蓝进行混色，以实现彩色显示。或者，像素单元也可以包括红色子像素，绿色子像素、蓝色子像素以及白色子像素，这样可以通过红绿蓝白进行混色，以实现彩色显示。当然，在实际应用中，像素单元中的子像素的发光颜色可以根据实际应用环境来设计确定，在此不作限定。
需要说明的是，本公开实施例中的显示面板可以为液晶显示面板、OLED显示面板等，在此不作限定。
在一些示例中，栅极驱动电路可以包括多个移位寄存器，例如，第1级至第N级移位寄存器：SR(1)、SR(2)…SR(n-1)、SR(n)…SR(N-1)、SR(N)(共N个移位寄存器，1≤n≤N，n为整数)。可以将多个移位寄存器分为多个寄存器组。其中，同一寄存器组中的移位寄存器可以级联设置，并且不同寄存器组连接的帧起始信号端不同。
示例性地，可以将栅极驱动电路中的移位寄存器分为两个寄存器组。例如，图2以第1级至第24级移位寄存器SR(1)～SR(24)为例。
结合图2与图3a所示，这两个寄存器组中的第一寄存器组X1包括第奇数个移位寄存器：第1级移位寄存器SR(1)、第3级移位寄存器SR(3)、第5级移位寄存器SR(5)、……第19级移位寄存器SR(19)、第21级移位寄存器 SR(21)以及第23级移位寄存器SR(23)。并且，第奇数级移位寄存器与第奇数条栅线电连接。其中，第1级移位寄存器SR(1)的输入信号端IP、第3级移位寄存器SR(3)的输入信号端IP、以及第5级移位寄存器SR(5)的输入信号端IP均与帧起始信号端STV_A电连接。并且，第1级移位寄存器SR(1)的输出信号端GO与第7级移位寄存器SR(7)的输入信号端IP电连接。第3级移位寄存器SR(3)的输出信号端GO与第9级移位寄存器SR(9)的输入信号端IP电连接。……第15级移位寄存器SR(15)的输出信号端GO与第21级移位寄存器SR(21)的输入信号端IP电连接。第17级移位寄存器SR(17)的输出信号端GO与第23级移位寄存器SR(23)的输入信号端IP电连接。以及，第9级移位寄存器SR(9)的输出信号端GO与第1级移位寄存器SR(1)的复位信号端RE电连接。第11级移位寄存器SR(11)的输出信号端GO与第3级移位寄存器SR(3)的复位信号端RE电连接。……第21级移位寄存器SR(21)的输出信号端GO与第13级移位寄存器SR(13)的复位信号端RE电连接。第23级移位寄存器SR(23)的输出信号端GO与第15级移位寄存器SR(15)的复位信号端RE电连接。
结合图2与图3b所示，这两个寄存器组中的第二寄存器组X2包括第偶数个移位寄存器：第2级移位寄存器SR(2)、第4级移位寄存器SR(4)、第6级移位寄存器SR(6)、……第20级移位寄存器SR(20)、第22级移位寄存器SR(22)以及第24级移位寄存器SR(24)。并且，第偶数级移位寄存器与第偶数条栅线电连接。其中，第2级移位寄存器SR(2)的输入信号端IP、第4级移位寄存器SR(4)的输入信号端IP、以及第6级移位寄存器SR(6)的输入信号端IP均与帧起始信号端STV_B电连接。并且，第2级移位寄存器SR(2)的输出信号端GO与第8级移位寄存器SR(8)的输入信号端IP电连接。第4级移位寄存器SR(4)的输出信号端GO与第10级移位寄存器SR(10)的输入信号端IP电连接。……第16级移位寄存器SR(16)的输出信号端GO与第22级移位寄存器SR(22)的输入信号端IP电连接。第18级移位寄存器SR(18)的输出信号端GO与第24级移位寄存器SR(24)的输入信号端IP电连接。以及，第10级移 位寄存器SR(10)的输出信号端GO与第2级移位寄存器SR(2)的复位信号端RE电连接。第12级移位寄存器SR(12)的输出信号端GO与第4级移位寄存器SR(4)的复位信号端RE电连接。……第22级移位寄存器SR(22)的输出信号端GO与第14级移位寄存器SR(14)的复位信号端RE电连接。第24级移位寄存器SR(24)的输出信号端GO与第16级移位寄存器SR(16)的复位信号端RE电连接。
图2所示的栅极驱动电路对应的信号时序图，如图4所示。其中，stv_a代表帧起始信号端STV_A的信号，stv_b代表帧起始信号端STV_B的信号，ck1代表时钟信号线CK1上传输的时钟信号，ck2代表时钟信号线CK2上传输的时钟信号，ck3代表时钟信号线CK3上传输的时钟信号，ck4代表时钟信号线CK4上传输的时钟信号，ck5代表时钟信号线CK5上传输的时钟信号，ck6代表时钟信号线CK6上传输的时钟信号，ck7代表时钟信号线CK7上传输的时钟信号，ck8代表时钟信号线CK8上传输的时钟信号，ck9代表时钟信号线CK9上传输的时钟信号，ck10代表时钟信号线CK10上传输的时钟信号，ck11代表时钟信号线CK11上传输的时钟信号，ck12代表时钟信号线CK12上传输的时钟信号。信号go1代表第1级移位寄存器SR(1)的输出信号端GO输出的栅极驱动信号。信号go2代表第2级移位寄存器SR(2)的输出信号端GO输出的栅极驱动信号。信号go3代表第3级移位寄存器SR(3)的输出信号端GO输出的栅极驱动信号。……信号go24代表第24级移位寄存器SR(24)的输出信号端GO输出的栅极驱动信号。
需要说明的是，本公开实施例中，仅是以栅极驱动电路中的移位寄存器分为两个寄存器组为例进行说明。在实际应用中，栅极驱动电路中的移位寄存器还可以分为三个寄存器组，四个寄存器组或更多个寄存器组，在此不作限定。
在实际应用中，帧起始信号端会通过信号引入线与移位寄存器的输入信号端IP电连接。然而，目前，同一帧起始信号端对应的信号引入线会设置在同一区域，且同一帧起始信号端对应的信号引入线之间不设置其他信号线， 不利于信号引入线的布线。
本公开实施例中，在非显示区中还设置有多条信号引入线。多条信号引入线分为多个线组，并且一个寄存器组对应电连接一个线组。并且位于同一线组的两条信号引入线之间设置有其他线组的信号引入线。示例性地，这些多条信号引入线可以为将帧起始信号端与移位寄存器的输入信号端IP进行电连接的信号线。或者，这些多条信号引入线可以为将时钟信号线。或者其他功能的信号线。
例如，在这些多条信号引入线为将帧起始信号端与移位寄存器的输入信号端IP进行电连接的信号线时，本公开实施例中，结合图2、图3a、图5a以及图5b所示，多条信号引入线可以分为两个线组：其中，这两个线组中的第一线组包括信号引入线110-1、110-2以及110-3，并且，第一线组连接第一寄存器组X1的帧起始信号端STV_A。其中，信号引入线110-1连接于帧起始信号端STV_A与第1级移位寄存器SR(1)的输入信号端IP之间，信号引入线110-2连接于帧起始信号端STV_A与第3级移位寄存器SR(3)的输入信号端IP之间，信号引入线110-3连接于帧起始信号端STV_A与第5级移位寄存器SR(5)的输入信号端IP之间。
并且，结合图2、图3b、图5a、图5b以及图6所示，这两个线组中的第二线组包括信号引入线120-1、120-2以及120-3。并且，第二线组连接第二寄存器组X2的帧起始信号端STV_B。其中，信号引入线120-1连接于帧起始信号端STV_B与第2级移位寄存器SR(2)的输入信号端IP之间，信号引入线120-2连接于帧起始信号端STV_B与第4级移位寄存器SR(4)的输入信号端IP之间，信号引入线120-3连接于帧起始信号端STV_B与第6级移位寄存器SR(6)的输入信号端IP之间。
以及，结合图5a以及图5b所示，第一线组中的信号引入线和第二线组中的信号引入线交替设置。例如，信号引入线120-3、信号引入线110-3、信号引入线120-2、信号引入线110-2、信号引入线120-1、信号引入线110-1按照F1箭头所指的方向依次排列。这样可以优化布线空间。
在本公开实施例中，显示面板的子像素中具有晶体管，晶体管具有栅极、有源层以及源漏极。其中，栅极与栅线同层同材质设置，源漏极与数据线同层同材质设置，有源层可以位于栅线所在层和数据线所在层之间。并且，在栅线所在层与有源层所在层之间设置有栅绝缘层，有源层所在层和数据线所在层之间设置有层间绝缘层(例如PVX)。
在本公开实施例中，信号引入线可以与栅线同层同材质设置。这样在制备栅线时，只需在形成栅线的图形时改变原有的掩膜版的构图的图形，即可通过一次构图工艺同时形成栅线的图形和信号引入线的图形，不用增加单独制备信号引入线的工艺，可以简化制备工艺流程，节省生产成本，提高生产效率。
在本公开实施例中，显示面板还可以包括：多个信号引入部和多个桥接部；其中，信号引入部与信号引入线位于同一层；多个线组中的一个线组与多个信号引入部中的信号引入部电连接。并且，多个线组中的一个线组与对应的信号引入部直接电连接，其余线组与对应的信号引入部通过桥接部电连接。例如，在这些多条信号引入线为将帧起始信号端与移位寄存器的输入信号端IP进行电连接的信号线时，本公开实施例中，多个信号引入部包括第一信号引入部210和第二信号引入部220；结合图2、图3a以及图5a至图6所示，第一信号引入部210为采用同一膜层的材料形成的一体结构，并且，第一线组中的信号引入线110-1、110-2以及110-3可以直接与第一信号引入部210电连接，也就是说，第一线组中的信号引入线110-1、110-2以及110-3与第一信号引入部210采用同一膜层的材料形成的一体结构。第二线组中的信号引入线120-1、120-2以及120-3可以通过桥接部300与第二信号引入部220电连接。也就是说，第二线组中的信号引入线120-1、120-2以及120-3与第二信号引入部220之间具有间隙存在。
具体地，第一线组中的信号引入线110-1、110-2以及110-3的第一端可以直接与第一信号引入部210电连接，第一线组中的信号引入线110-1、110-2以及110-3的第二端可以分别与第一寄存器组中的移位寄存器的输入信号端 IP电连接。这样可以将第一信号引入部210输入的信号stv_a直接通过信号引入线110-1输入到第二级移位寄存器SR(1)的输入信号端IP中。以及，将第一信号引入部210输入的信号stv_a直接通过信号引入线110-2输入到第三级移位寄存器SR(3)的输入信号端IP中。以及，将第一信号引入部210输入的信号stv_a直接通过信号引入线110-3输入到第五级移位寄存器SR(5)的输入信号端IP中。
第二线组中的信号引入线120-1、120-2以及120-3的第一端可以通过桥接部300与第二信号引入部220电连接。第二线组中的信号引入线120-1、120-2以及120-3的第二端可以分别与第二寄存器组中的移位寄存器的输入信号端IP电连接。这样可以通过桥接的方式将第二信号引入部220输入的信号stv_b依次通过桥接部300、信号引入线120-1输入到第二级移位寄存器SR(2)的输入信号端IP中。以及，通过桥接的方式将第二信号引入部220输入的信号stv_b依次通过桥接部300、信号引入线120-2输入到第四级移位寄存器SR(4)的输入信号端IP中。以及，通过桥接的方式将第二信号引入部220输入的信号stv_b依次通过桥接部300、信号引入线120-3输入到第六级移位寄存器SR(6)的输入信号端IP中。
在本公开实施例中，桥接部与信号引入部位于不同层。示例性地，桥接部可以与数据线同层同材质设置。这样在制备数据线时，只需在形成数据线的图形时改变原有的掩膜版的构图的图形，即可通过一次构图工艺同时形成数据线的图形和桥接部的图形，不用增加单独制备桥接部的工艺，可以简化制备工艺流程，节省生产成本，提高生产效率。
在本公开实施例中，如图5a至图6所示，桥接部可以包括第一桥接部310、第二桥接部320以及连接于第一桥接部310和第二桥接部320之间的第三桥接部330。以及，显示面板还可以包括：第一桥接连接部410和第二桥接连接部420；其中，第一桥接连接部410与桥接部以及信号引入部位于不同层，第二桥接连接部420与第一桥接连接部410位于同一层。示例性地，在显示面板为液晶显示面板时，第一桥接连接部410和第二桥接连接部420可以与像 素电极同层同材质设置。
在本公开实施例中，如图5a至图6所示，第一桥接连接部410的第一端与第一桥接部310通过第一转接过孔GZ1电连接，且第一桥接连接部410的第二端与第二信号引入部220通过第二转接过孔GZ2电连接。以及，第二桥接连接部420的第一端与第二桥接部320通过第三转接过孔GZ3电连接，且第二桥接连接部420的第二端与第二线组中的信号引入线通过第四转接过孔GZ4电连接。
示例性地，第一转接过孔GZ1贯穿层间绝缘层。第二转接过孔GZ2贯穿栅绝缘层和层间绝缘层。
示例性地，第一转接过孔GZ1设置的总数和第二转接过孔GZ2设置的总数可以相同。例如，第一转接过孔GZ1设置的总数和第二转接过孔GZ2设置的总数可以均为12个或10个或8个或其他数量。或者，第一转接过孔GZ1设置的总数和第二转接过孔GZ2设置的总数也可以不同。当然，在实际应用中，第一转接过孔GZ1设置的总数和第二转接过孔GZ2设置的总数可以根据实际应用的需求进行设计确定，在此不作限定。
在本公开实施例中，如图5a至图6所示，第三桥接部330可以包括相互间隔设置的多个第三子桥接部，第二桥接部320包括多个第二子桥接部。其中，一个第三子桥接部对应一条信号引入线，一个第二子桥接部对应一条信号引入线。例如，第二线组中具有信号引入线120-1、120-2以及120-3，则信号引入线120-1对应第三子桥接部331和第二子桥接部321，且信号引入线120-1依次通过第二子桥接部321、第三子桥接部331与第一桥接部310电连接。以及，信号引入线120-2对应第三子桥接部332和第二子桥接部322，信号引入线120-2依次通过第二子桥接部322、第三子桥接部332与第一桥接部310电连接。以及信号引入线120-3对应第三子桥接部333和第二子桥接部323，且信号引入线120-3依次通过第二子桥接部323、第三子桥接部333与第一桥接部310电连接。从而形成信号传输路径。并且，通过将多个第三子桥接部相互间隔设置，这样可以降低第三子桥接部和第一线组中的信号引入线之间 的交叠面积，降低信号干扰。
在本公开实施例中，第三子桥接部的形状可以是非直线形状，例如，如图5c所示，第三子桥接部(331、332、333)的形状可以是弯折线形状。并且，第三子桥接部(331、332、333)可以通过三个直线段组成的弯折线形状，并且可以具有两个弯折角，该弯折角可以为钝角。或者，第三子桥接部的形状也可以是曲线形状。并且，第三子桥接部可以通过弧形的曲线组成。当然，在实际应用中，第三子桥接部的形状可以根据实际应用的需求进行确定，在此不作限定。
在本公开实施例中，如图5a、图5c以及图6所示，可以使多个第二子桥接部相互间隔设置。例如，第二子桥接部321、322、323之间具有缝隙，并且，该多个第二子桥接部在衬底基板的正投影与第一线组中的信号引入线在衬底基板的正投影不交叠。这样可以降低第二子桥接部和第一线组中的信号引入线之间的交叠面积，降低信号干扰。
在本公开实施例中，如图5a至图6所示，第二桥接连接部420可以包括相互间隔设置的多个第二子桥接连接部；其中，一个第二子桥接部通过第三转接过孔GZ3与一个第二子桥接连接部电连接。例如，第二桥接连接部420包括相互间隔设置的3个第二子桥接连接部：421、422、423。其中，第二子桥接连接部421通过第三转接过孔GZ3与第二子桥接部321电连接，且第二子桥接连接部421通过第四转接过孔GZ4与信号引入线120-1电连接。这样可以将第二信号引入部220输入的信号stv_b依次通过第一桥接连接部410、第一桥接部310、第二子桥接部321、第二子桥接连接部421、信号引入线120-1输入到第二级移位寄存器SR(2)的输入信号端IP中。
以及，第二子桥接连接部422通过第三转接过孔GZ3与第二子桥接部322电连接，且第二子桥接连接部422通过第四转接过孔GZ4与信号引入线120-2电连接。这样可以将第二信号引入部220输入的信号stv_b依次通过第一桥接连接部410、第一桥接部310、第二子桥接部322、第二子桥接连接部422、信号引入线120-2输入到第四级移位寄存器SR(4)的输入信号端IP中。
以及，第二子桥接连接部423通过第三转接过孔GZ3与第二子桥接部323电连接，且第二子桥接连接部423通过第四转接过孔GZ4与信号引入线120-3电连接。这样可以将第二信号引入部220输入的信号stv_b依次通过第一桥接连接部410、第一桥接部310、第二子桥接部323、第二子桥接连接部423、信号引入线120-3输入到第六级移位寄存器SR(6)的输入信号端IP中。
示例性地，第三转接过孔GZ3贯穿层间绝缘层。第四转接过孔GZ4贯穿栅绝缘层和层间绝缘层。
在本公开实施例中，如图5a与图5d所示，可以使多个第二子桥接连接部之间具有缝隙，并且，该多个第二子桥接连接部在衬底基板的正投影与第一线组中的信号引入线在衬底基板的正投影不交叠。这样可以降低第二子桥接连接部和第一线组中的信号引入线之间的交叠面积，降低信号干扰。
示例性地，一个第二子桥接连接部对应的第三转接过孔GZ3和第四转接过孔GZ4的总数可以相同。例如，一个第二子桥接连接部对应的第三转接过孔GZ3和第四转接过孔GZ4的总数可以均为1个或2个或3个或其他数量。或者，一个第二子桥接连接部对应的第三转接过孔GZ3和第四转接过孔GZ4的总数也可以不同。当然，在实际应用中，对应的第三转接过孔GZ3和第四转接过孔GZ4的总数可以根据实际应用的需求进行设计确定，在此不作限定。
本公开实施例提供了另一些显示面板的结构示意图，如图7a至图8所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，如图7a至图8所示，第一信号引入部210可以包括：至少一个第一子信号引入部211和第三子信号引入部213；其中，第三子信号引入部213与第一线组中的各信号引入线的第一端直接电连接。并且，显示面板还可以包括：第五桥接连接部450；其中，第五桥接连接部450与第一桥接连接部410位于同一层。并且，第五桥接连接部450通过第九转接过孔GZ9与各第一子信号引入部电连接，第五桥接连接部450通过第十转接过孔GZ10与第三子信号引入部213电连接。
由于第二信号引入部220需要通过桥接部才能与第二线组中的信号引入线电连接，这样使得第二信号引入部220至第二线组中的信号引入线对应的stv_b这一信号流通路径，与第一信号引入部210至第一线组中的信号引入线对应的stv_a这一信号流通路径之间的电阻差异较大，从而导致信号stv_a和stv_b输入到信号输入端IP中时延迟具有差异，进而导致第一级移位寄存器、第三级移位寄存器、第五级移位寄存器与第二级移位寄存器、第四级移位寄存器、第六级移位寄存器的输出信号端GO输出的信号具有差异，造成对应上子像素的亮度不同，影响显示效果。本公开实施例中通过将第一信号引入部210划分为第一子信号引入部211和第三子信号引入部213，并通过第五桥接连接部450将第一子信号引入部211和第三子信号引入部213电连接起来，可以增加第一信号引入部210至第一线组中的信号引入线这一电流流通路径之间的电阻，从而可以降低stv_a这一信号流通路径和stv_b这一信号流通路径之间的电压差异，降低信号stv_a和stv_b输入到信号输入端IP中时延迟的差异，提高显示效果。
示例性地，第九转接过孔GZ9贯穿栅绝缘层和层间绝缘层。第十转接过孔GZ10贯穿栅绝缘层和层间绝缘层。
示例性地，在本公开实施例中，如图7a至图8所示，第一信号引入部210可以包括：一个第一子信号引入部211和第三子信号引入部213。第二信号引入部220包括一个第二子信号引入部221，即第二信号引入部220作为第二子信号引入部，这样可以使第一子信号引入部211和第二信号引入部220的数量相同。其中，第三子信号引入部213与第一线组中的各信号引入线110-1、110-2以及110-3的第一端直接电连接。并且，第五桥接连接部450的第一端通过第九转接过孔GZ9与第一子信号引入部电连接，第五桥接连接部450的第二端通过第十转接过孔GZ10与第三子信号引入部213电连接。在实际应用中，第一子信号引入部与输入信号stv_a的邦定端子(PAD)电连接，这样可以将输入到邦定端子(PAD)上的信号stv_a，依次通过第一子信号引入部、第五桥接连接部450、第三子信号引入部213以及第一线组中的各信号引入线 110-1、110-2以及110-3输入到对应的移位寄存器的信号输入端IP中。
示例性地，在本公开实施例中，如图7a至图8所示，第九转接过孔GZ9的总数与第二转接过孔GZ2的总数可以相同。例如，第九转接过孔GZ9的总数和第二转接过孔GZ2的总数可以设置为12个、8个、10个或其他数量。在实际应用中，第九转接过孔GZ9的总数与第二转接过孔GZ2的总数也可以不相同。当然，第九转接过孔GZ9的总数与第二转接过孔GZ2的总数可以根据实际应用的需求进行设计确定，在此不作限定。
示例性地，在本公开实施例中，如图7a至图8所示，第十转接过孔GZ10的总数与第一转接过孔GZ1的总数可以相同。例如，第十转接过孔GZ10的总数和第一转接过孔GZ1的总数可以设置为12个、8个、10个或其他数量。在实际应用中，第十转接过孔GZ10的总数与第一转接过孔GZ1的总数也可以不相同。当然，第十转接过孔GZ10的总数与第一转接过孔GZ1的总数可以根据实际应用的需求进行设计确定，在此不作限定。
本公开实施例提供了又一些显示面板的结构示意图，如图9a至图10所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，如图9a至图10所示，第一线组中的信号引入线包括一个第一信号引线段和一个第二信号引线段。并且，显示面板还包括：多个第四桥接连接部；其中，第四桥接连接部与第一桥接连接部410位于同一层；其中，同一信号引入线中，第一信号引线段和第二信号引线段通过第四桥接连接部电连接。示例性地，多个第四桥接连接部可以相互间隔设置。并且，第四桥接连接部在衬底基板的正投影与第一线组中的信号引入线、第四桥接连接部以及桥接部在衬底基板的正投影均不交叠。这样可以进一步降低信号干扰。
示例性地，在本公开实施例中，如图9a至图10所示，第一线组中的信号引入线包括一个第一信号引线段和一个第二信号引线段。其中，信号引入线110-1中，第一信号引线段110-1a和第二信号引线段110-1b通过第四桥接 连接部440-1电连接。信号引入线110-2中，第一信号引线段110-2a和第二信号引线段110-2b通过第四桥接连接部440-2电连接。信号引入线110-3中，第一信号引线段110-3a和第二信号引线段110-3b通过第四桥接连接部440-3电连接。这样可以使降低第一线组中的信号引入线和第二线组中的信号引入线之间的电阻差异，进一步降低信号stv_a和stv_b的延迟，进一步提高显示效果。
示例性地，在本公开实施例中，如图9a至图10所示，第一信号引线段110-1a的第一端与第三子信号引入部213直接电连接，第一信号引线段110-1a的第二端通过第五转接过孔GZ5与对应的第四桥接连接部440-1的第一端电连接，第四桥接连接部440-1的第二端通过第六转接过孔GZ6与第二信号引线段110-1b的电连接。以及，第一信号引线段110-2a的第一端与第三子信号引入部213直接电连接，第一信号引线段110-2a的第二端通过第五转接过孔GZ5与对应的第四桥接连接部440-2的第一端电连接，第四桥接连接部440-2的第二端通过第六转接过孔GZ6与第二信号引线段110-2b的电连接。以及，第一信号引线段110-3a的第一端与第三子信号引入部213直接电连接，第一信号引线段110-3a的第二端通过第五转接过孔GZ5与对应的第四桥接连接部440-3的第一端电连接，第四桥接连接部440-3的第二端通过第六转接过孔GZ6与第二信号引线段110-3b的电连接。
示例性地，第五转接过孔GZ5贯穿栅绝缘层和层间绝缘层。第六转接过孔GZ6贯穿栅绝缘层和层间绝缘层。
示例性地，在本公开实施例中，如图9a至图10所示，第一线组中的各第一信号引线段的第二端相互间隔设置。并且，第一线组中的各第一信号引线段的第二端之间设置有间隙。例如，第一线组中的第一信号引线段的第二端在衬底基板的正投影与第二线组中的各信号引入线在衬底基板的正投影不交叠。
示例性地，在本公开实施例中，在第一线组中的信号引入线包括第一信号引线段和一个第二信号引线段时，一个第四桥接连接部对应的第五转接过 孔GZ5的总数与一个第二桥接连接部420对应的第三转接过孔GZ3的总数可以相同。例如，一个第四桥接连接部对应的第五转接过孔GZ5的总数与一个第二桥接连接部420对应的第三转接过孔GZ3的总数可以均为2个或3个或1个或其他数量。或者，一个第四桥接连接部对应的第五转接过孔GZ5的总数与一个第二桥接连接部420对应的第三转接过孔GZ3的总数也可以不同。当然，在实际应用中，一个第四桥接连接部对应的第五转接过孔GZ5的总数与一个第二桥接连接部420对应的第三转接过孔GZ3的总数可以根据实际应用的需求进行设计确定，在此不作限定。
示例性地，在本公开实施例中，在第一线组中的信号引入线包括一个第一信号引线段和一个第二信号引线段时，一个第四桥接连接部对应的第六转接过孔GZ6的总数与一个第二桥接连接部420对应的第四转接过孔GZ4的总数可以相同。例如，一个第四桥接连接部对应的第六转接过孔GZ6的总数与一个第二桥接连接部420对应的第四转接过孔GZ4的总数可以均为2个或3个或1个或其他数量。或者，一个第四桥接连接部对应的第六转接过孔GZ6的总数与一个第二桥接连接部420对应的第四转接过孔GZ4的总数也可以不同。当然，在实际应用中，一个第四桥接连接部对应的第六转接过孔GZ6的总数与一个第二桥接连接部420对应的第四转接过孔GZ4的总数可以根据实际应用的需求进行设计确定，在此不作限定。
本公开实施例提供了又一些显示面板的结构示意图，如图11a至图11d所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，如图11a至图11d所示，可以使第一线组中的各第一信号引线段的第二端相互接触形成一体化结构。也就是说，第一线组中的各第一信号引线段的第二端相互接触形成的一体化结构在衬底基板的正投影与第二线组中的信号引入线在衬底基板的正投影具有交叠区域。
在本公开实施例中，如图11a至图11d所示，可以使多个第二子桥接部相互接触形成一体化结构。也就是说，多个第二子桥接部相互接触形成的一体 化结构在衬底基板的正投影与第一线组中的信号引入线在衬底基板的正投影具有交叠区域。例如，第二桥接连接部420包括的3个第二子桥接连接部相互接触形成一体化结构。
本公开实施例提供了又一些显示面板的结构示意图，如图12a与图12b所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，第二信号引入部220包括：至少一个第二子信号引入部；第一桥接连接部410通过第二转接过孔GZ2与各第二子信号引入部电连接；第一子信号引入部的总数与第二子信号引入部的总数相同。第一子信号引入部的总数与第二子信号引入部的总数可以相同。
示例性地，如图12a与图12b所示，第一信号引入部210可以包括：两个第一子信号引入部211-1、211-2和第三子信号引入部213。第二信号引入部220可以包括：两个第二子信号引入部221-1、221-2。其中，第五桥接连接部450通过第九转接过孔GZ9与第一子信号引入部211-1、211-2电连接，第五桥接连接部450通过第十转接过孔GZ10与第三子信号引入部213电连接。以及，第一桥接连接部410通过第二转接过孔GZ2与第二子信号引入部221-1、221-2电连接。
当然，第一子信号引入部的总数与第二子信号引入部的总数也可设置为3个、4个或更多个，在此不作限定。当然，第一子信号引入部的总数与第二子信号引入部的总数也可以不相同。在实际应用中，第一子信号引入部的总数与第二子信号引入部的总数可以根据实际应用的需求进行设计确定，在此不作限定。
本公开实施例提供了又一些显示面板的结构示意图，如图13a与图13b所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，如图13a至图13c所示，第一线组中的信号引入线包括一个第一信号引线段和至少两个第二信号引线段。其中，同一信号引入线 中，第一信号引线段和第二信号引线段通过第四桥接连接部电连接，且相邻的第二信号引线段通过第四桥接连接部电连接。示例性地，相邻的第二信号引线段中的一个第二信号引线段通过第七转接过孔GZ7与对应的第四桥接连接部的第一端电连接，第四桥接连接部的第二端通过第八转接过孔GZ8与另一个第二信号引线段电连接。
示例性地，第七转接过孔GZ7贯穿栅绝缘层和层间绝缘层。第八转接过孔GZ8贯穿栅绝缘层和层间绝缘层。
在本公开实施例中，如图13a至图13c所示，第二线组中的信号引入线包括至少两个第三信号引线段；显示面板还包括：多个第三桥接连接部(如430-1、430-2、430-3)；同一条信号引入线中，相邻的两个第三信号引线段通过第三桥接连接部电连接，且第三桥接连接部的第一端通过第十三转接过孔GZ13与一个第三信号引线段电连接，第三桥接连接部的第二端通过第十四转接过孔GZ14与另一个第三信号引线段电连接。
示例性地，第十三转接过孔GZ13贯穿栅绝缘层和层间绝缘层。第十四转接过孔GZ14贯穿栅绝缘层和层间绝缘层。
在本公开实施例中，如图13a至图13c所示，多个第四桥接连接部相互间隔设置。也就是说，第四桥接连接部在衬底基板的正投影与第二线组中的信号引入线在衬底基板的正投影不交叠。
在本公开实施例中，如图13a至图13c所示，第一线组中的一条信号引入线对应的第四桥接连接部的总数，与第二线组中的一条信号引入线对应的第三桥接连接部和第二桥接连接部的总数之和相同。例如，信号引入线110-1对应着2个第四桥接连接部，信号引入线110-2对应着2个第四桥接连接部，信号引入线110-3对应着2个第四桥接连接部。信号引入线120-1对应着1个第三桥接连接部和1个第二桥接连接部421，信号引入线120-2对应着1个第三桥接连接部和1个第二桥接连接部422，信号引入线120-3对应着1个第三桥接连接部和1个第二桥接连接部423。
示例性地，在本公开实施例中，如图13a至图13c所示，信号引入线110-1 包括第一信号引线段110-1a和两个第二信号引线段110-1b、110-1c。其中，第一信号引线段110-1a的第一端与第三子信号引入部213直接电连接，第一信号引线段110-1a的第二端通过第五转接过孔GZ5与第四桥接转接部440-1a电连接，第四桥接转接部440-1a通过第六转接过孔GZ6与第二信号引线段110-1b的第一端电连接，第二信号引线段110-1b的第二端通过第七转接过孔GZ7与第四桥接转接部440-1b电连接，第四桥接转接部440-1b通过第八转接过孔GZ8与第二信号引线段110-1c的第一端电连接，第二信号引线段110-1c的第二端与对应的移位寄存器的输入信号端IP电连接。以及，第一信号引线段110-2a的第一端与第三子信号引入部213直接电连接，第一信号引线段110-2a的第二端通过第五转接过孔GZ5与第四桥接转接部440-2a电连接，第四桥接转接部440-2a通过第六转接过孔GZ6与第二信号引线段110-2b的第一端电连接，第二信号引线段110-2b的第二端通过第七转接过孔GZ7与第四桥接转接部440-2b电连接，第四桥接转接部440-2b通过第八转接过孔GZ8与第二信号引线段110-2c的第一端电连接，第二信号引线段110-2c的第二端与对应的移位寄存器的输入信号端IP电连接。以及，第一信号引线段110-3a的第一端与第三子信号引入部213直接电连接，第一信号引线段110-3a的第二端通过第五转接过孔GZ5与第四桥接转接部440-3a电连接，第四桥接转接部440-3a通过第六转接过孔GZ6与第二信号引线段110-3b的第一端电连接，第二信号引线段110-3b的第二端通过第七转接过孔GZ7与第四桥接转接部440-3b电连接，第四桥接转接部440-3b通过第八转接过孔GZ8与第二信号引线段110-3c的第一端电连接，第二信号引线段110-3c的第二端与对应的移位寄存器的输入信号端IP电连接。
在本公开实施例中，如图13a至图13c所示，信号引入线120-1可以包括两个第三信号引线段120-1b、120-1c。其中，第三信号引线段120-1b的第一端通过第三转接过孔GZ3与第二子桥接连接部421电连接，第三信号引线段120-1b的第二端通过第十三转接过孔GZ13与第三桥接连接部430-1电连接，第三桥接连接部430-1通过第十四转接过孔GZ14与第三信号引线段120-1c 的第一端电连接，第三信号引线段120-1c的第二端与对应的移位寄存器的输入信号端IP电连接。以及，信号引入线120-2可以包括两个第三信号引线段120-2b、120-2c。其中，第三信号引线段120-2b的第一端通过第三转接过孔GZ3与第二子桥接连接部422电连接，第三信号引线段120-2b的第二端通过第十三转接过孔GZ13与第三桥接连接部430-2电连接，第三桥接连接部430-2通过第十四转接过孔GZ14与第三信号引线段120-2c的第一端电连接，第三信号引线段120-2c的第二端与对应的移位寄存器的输入信号端IP电连接。以及，信号引入线120-3可以包括两个第三信号引线段120-3b、120-3c。其中，第三信号引线段120-3b的第一端通过第三转接过孔GZ3与第二子桥接连接部423电连接，第三信号引线段120-3b的第二端通过第十三转接过孔GZ13与第三桥接连接部430-3电连接，第三桥接连接部430-3通过第十四转接过孔GZ14与第三信号引线段120-3c的第一端电连接，第三信号引线段120-3c的第二端与对应的移位寄存器的输入信号端IP电连接。
本公开实施例提供了又一些显示面板的结构示意图，如图14a至图15b所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，如图14a至图15b所示，显示面板还包括：第一辅助部510和第二辅助部520；第一辅助部510和第二辅助部520与桥接部位于同一层；其中，第一辅助部510在衬底基板的正投影位于第一子信号引入部和第三子信号引入部213在衬底基板的正投影之间；并且，第五桥接连接部450还通过第十五转接过孔GZ15与第一辅助部510电连接。以及，第二辅助部520在衬底基板的正投影位于第二子信号引入部和第一桥接部310在衬底基板的正投影之间；并且，第一桥接连接部410还通过第十六转接过孔GZ16与第二辅助部520电连接。
示例性地，第十五转接过孔GZ15贯穿层间绝缘层，第十六转接过孔GZ16贯穿层间绝缘层。
示例性地，在本公开实施例中，如图14a至图15b所示，第一信号引入 部210可以包括：第一子信号引入部211和第三子信号引入部213。第一辅助部510在衬底基板的正投影位于第一子信号引入部211和第三子信号引入部213在衬底基板的正投影之间。并且，第五桥接连接部450还通过第十五转接过孔GZ15与第一辅助部510电连接。
示例性地，在本公开实施例中，如图14a至图15b所示，第二信号引入部200可以包括：第二子信号引入部221。第二辅助部520在衬底基板的正投影位于第二子信号引入部221和第一桥接部310在衬底基板的正投影之间。并且，第一桥接连接部410还通过第十六转接过孔GZ16与第二辅助部520电连接。
本公开实施例中，为了使信号stv_a的流通路径的电阻与信号stv_b的流通路径的电阻之间的差值尽可能的降低，通过设置了用于将第一子信号引入部211和第三子信号引入部213电连接的第五桥接连接部450，以使信号stv_a的流通路径的电阻增加。然而，电阻增加会使信号延迟增加，为了降低信号stv_a和信号stv_d的延迟，设置了与第一信号引入部210电连接的第一辅助部510，以降低信号stv_a的流通路径的电阻。以及设置了与第二子信号引入部电连接的第二辅助部520，以降低信号stv_b的流通路径的电阻。
示例性地，在本公开实施例中，如图14a至图15b所示，第十五转接过孔GZ15的总数和第十六转接过孔GZ16的总数可以相同。例如，第十五转接过孔GZ15的总数和第十六转接过孔GZ16的总数可以设置为16个、20、24个或其他数量，其可以根据实际应用的需求进行设计确定，在此不作限定。当然，第十五转接过孔GZ15的总数和第十六转接过孔GZ16的总数也可以不相同。在实际应用中，第十五转接过孔GZ15的总数和第十六转接过孔GZ16的总数可以根据实际应用的需求进行设计确定，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第一转接过孔GZ1、第二转接过孔GZ2、第九转接过孔GZ9、第十转接过孔GZ10、第十五转接过孔GZ15、第十六转接过孔GZ16的尺寸可以相同。以及，第一转接过孔GZ1、第二转接过孔GZ2、第九转接过孔GZ9、第十转接过孔GZ10、第十 五转接过孔GZ15、第十六转接过孔GZ16的形状可以相同。当然，在实际应用，第一转接过孔GZ1、第二转接过孔GZ2、第九转接过孔GZ9、第十转接过孔GZ10、第十五转接过孔GZ15、第十六转接过孔GZ16的尺寸和形状可以根据实际应用的需求进行设计确定，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第三转接过孔GZ3、第四转接过孔GZ4、第五转接过孔GZ5、第六转接过孔GZ6的尺寸可以相同。以及，第三转接过孔GZ3、第四转接过孔GZ4、第五转接过孔GZ5、第六转接过孔GZ6的形状可以相同。当然，在实际应用，第三转接过孔GZ3、第四转接过孔GZ4、第五转接过孔GZ5、第六转接过孔GZ6的尺寸和形状可以根据实际应用的需求进行设计确定，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第一转接过孔GZ1、第二转接过孔GZ2、第九转接过孔GZ9、第十转接过孔GZ10、第十五转接过孔GZ15、第十六转接过孔GZ16的尺寸，可以大于第三转接过孔GZ3、第四转接过孔GZ4、第五转接过孔GZ5、第六转接过孔GZ6的尺寸。
示例性地，在本公开实施例中，如图14a与图16所示，第一转接过孔GZ1、第二转接过孔GZ2、第九转接过孔GZ9、第十转接过孔GZ10、第十五转接过孔GZ15、第十六转接过孔GZ16的形状，可以与第三转接过孔GZ3、第四转接过孔GZ4、第五转接过孔GZ5、第六转接过孔GZ6的形状相同。
示例性地，在本公开实施例中，如图14a与图16所示，在沿方向F1上第一桥接连接部410远离桥接部的一侧与第二子信号引入部靠近桥接部的一侧之间的距离W1可以设置为30um～50um。示例性地，W1可以设置为30um。或者，W1也可以设置为35um。或者，W1也可以设置为40um。或者，W1也可以设置为45um。或者，W1也可以设置为50um。在实际应用中，可以根据实际应用的需求设计W1的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，在沿方向F1上，第二子信号引入部靠近桥接部的一侧与第二辅助部520靠近第二子信号引入部的一侧之间的距离W2可以设置为4um～10um。示例性地，W2可以设置为 4um。或者，W2也可以设置为5um。或者，W2也可以设置为6um。或者，W2也可以设置为7um。或者，W2也可以设置为8um。或者，W2也可以设置为9um。或者，W2也可以设置为10um。在实际应用中，可以根据实际应用的需求设计W2的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，在沿方向F1上第二辅助部520靠近第二子信号引入部的一侧与第二辅助部520远离第二子信号引入部的一侧之间的距离W3可以设置为60um～100um。示例性地，W3可以设置为60um。或者，W3也可以设置为70um。或者，W3也可以设置为80um。或者，W3也可以设置为90um。或者，W3也可以设置为100um。在实际应用中，可以根据实际应用的需求设计W3的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，在沿方向F2上第一辅助部510与桥接部具有部分交叠，并且，在沿方向F2上第一辅助部510与桥接部之间的距离W4可以设置为40um～80um。示例性地，W4可以设置为40um。或者，W4也可以设置为50um。或者，W4也可以设置为60um。或者，W4也可以设置为70um。或者，W4也可以设置为80um。在实际应用中，可以根据实际应用的需求设计W4的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第一桥接部310在沿方向F2上的距离W5可以设置为50um～150um。示例性地，W5可以设置为50um。或者，W5也可以设置为70um。或者，W5也可以设置为90um。或者，W5也可以设置为110um。或者，W5也可以设置为130um。或者，W5也可以设置为150um。在实际应用中，可以根据实际应用的需求设计W5的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第一线组中的信号引入线设置有第五转接过孔GZ5的区域在沿方向F1上的距离W6可以设置为20um～80um。示例性地，W6可以设置为20um。或者，W6也可以设置为30um。或者，W6也可以设置为40um。或者，W6也可以设置为50um。或者，W6也可以设置为60um。或者，W6也可以设置为70um。或者，W6也可以 设置为80um。在实际应用中，可以根据实际应用的需求设计W6的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第一线组中的信号引入线设置有第六转接过孔GZ6的区域在沿方向F1上的距离也可以为W6，具体在此不作赘述。
示例性地，在本公开实施例中，如图14a与图16所示，在沿方向F2上，第四桥接连接部靠近第二桥接连接部420一侧所在的直线，与第二桥接连接部420靠近第四桥接连接部一侧所在的直线之间的距离W7可以设置为4um～10um。示例性地，W7可以设置为4um。或者，W7可以设置为5um。或者，W7可以设置为6um。或者，W7可以设置为7um。或者，W7可以设置为8um。或者，W7可以设置为9um。或者，W7可以设置为10um。在实际应用中，可以根据实际应用的需求设计W7的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，在沿方向F1上，第二桥接连接部420与其相邻的信号引入线之间的距离W8可以设置为4um～10um。示例性地，W8可以设置为4um。或者，W8可以设置为5um。或者，W8可以设置为6um。或者，W8可以设置为7um。或者，W8可以设置为8um。或者，W8可以设置为9um。或者，W8可以设置为10um。在实际应用中，可以根据实际应用的需求设计W8的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，在沿方向F1上，第四桥接连接部与其相邻的信号引入线之间的距离可以为W8，具体在此不作赘述。
示例性地，在本公开实施例中，如图14a与图16所示，第二桥接连接部420在沿方向F2上的距离W9可以设置为4um～10um。示例性地，W9可以设置为4um。或者，W9可以设置为5um。或者，W9可以设置为6um。或者，W9可以设置为7um。或者，W9可以设置为8um。或者，W9可以设置为9um。或者，W9可以设置为10um。在实际应用中，可以根据实际应用的需求设计W9的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第四桥接连接部在沿方向F2上的距离可以为W9，具体在此不作赘述。
示例性地，在本公开实施例中，如图14a与图16所示，第二线组中的各信号引入线不设置有转接过孔的区域，在沿方向F1上的距离W10可以设置为4um～10um。示例性地，W10可以设置为4um。或者，W10可以设置为5um。或者，W10可以设置为6um。或者，W10可以设置为7um。或者，W10可以设置为8um。或者，W10可以设置为9um。或者，W10可以设置为10um。在实际应用中，可以根据实际应用的需求设计W10的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，第一线组中的各信号引入线不设置有转接过孔的区域，在沿方向F1上的距离也可以为W10，具体在此不作赘述。
示例性地，在本公开实施例中，如图14a与图16所示，同一第四桥接转接部连接的第一信号引线段(如110-1a)和第二信号引线段(如110-1b)在沿方向F2上的距离W11可以设置为4um～10um。示例性地，W11可以设置为4um。或者，W11可以设置为5um。或者，W11可以设置为6um。或者，W11可以设置为7um。或者，W11可以设置为8um。或者，W11可以设置为9um。或者，W11可以设置为10um。在实际应用中，可以根据实际应用的需求设计W11的具体数值，在此不作限定。
示例性地，在本公开实施例中，如图14a与图16所示，同一第二桥接转接部连接的第三子桥接部(如421)和信号引入线(如120-1)在沿方向F2上的距离也可以为W11，具体在此不作赘述。
本公开实施例提供了又一些显示面板的结构示意图，如图17a至图17d所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，如图17a至图17d所示，显示面板还可以包括：多个第三辅助部(如530-1、530-2、530-3)；第三辅助部和第一辅助部510与桥 接部位于同一层；第一线组中的一条信号引入线对应设置至少一个第三辅助部；其中，同一信号引入线中，第一信号引线段通过对应的第三辅助部与第二信号引线段电连接。示例性地，显示面板还包括：多个第六桥接转接部和多个第七桥接转接部；其中，至少一个第三辅助部对应设置至少一个第六桥接转接部和至少一个第七桥接转接部；第三辅助部的第一端通过第十一转接过孔GZ11与对应的第六桥接转接部电连接，第六桥接转接部通过第十二转接过孔GZ12与对应的第一信号引线段电连接，第三辅助部的第二端通过第十七转接过孔GZ17与对应的第七桥接转接部电连接，第七桥接转接部通过第十八转接过孔GZ18与对应的第七桥接转接部电连接。
示例性地，第十一转接过孔GZ11贯穿层间绝缘层。第十二转接过孔GZ12贯穿栅绝缘层和层间绝缘层。第十七转接过孔GZ17贯穿层间绝缘层。第十八转接过孔GZ18贯穿栅绝缘层和层间绝缘层。
示例性地，如图17a至图17d所示，信号引入线110-1对应设置第三辅助部530-1，第六桥接转接部460-1以及第七桥接转接部470-1。第一信号引线段110-1a通过第十二转接过孔GZ12与第六桥接转接部460-1电连接，第六桥接转接部460-1通过第十一转接过孔GZ11与第三辅助部530-1的第一端电连接。第三辅助部530-1的第二端通过第十七转接过孔GZ17与第七桥接转接部470-1电连接，第七桥接转接部470-1通过第十八转接过孔GZ18与第二信号引线段110-1b电连接。这样可以进一步降低第一线组中信号引入线的电阻与第二线组中信号引入线的电阻之间的差异。其余同理，在此不作赘述。
本公开实施例提供了又一些显示面板的结构示意图，如图18a至图19所示，其针对上述实施例中的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在本公开实施例中，如图18a至图19所示，桥接部可以包括第四桥接部340、第六桥接部以及连接于第四桥接部340和第六桥接部之间的第五桥接部；其中，第四桥接部340与第二信号引入部220通过第一导通过孔GK1电连接；第六桥接部与第二线组中的信号引入线通过第二导通过孔GK2电连接。示例 性地，第五桥接部包括相互间隔设置的多个第五子桥接部(如351、352、353)；第六桥接部包括相互间隔设置的多个第六子桥接部(如361、362、363)；第四桥接部340通过至少一个第五子桥接部和至少一个第六子桥接部与第二线组中的一条信号引入线电连接。
示例性地，第二信号引入部220通过第一导通过孔GK1与第四桥接部340电连接，第六子桥接部361与第五子桥接部351直接电连接，第五子桥接部351通过第二导通过孔GK2与信号引入线120-1电连接。以及，第六子桥接部362与第五子桥接部352直接电连接，第五子桥接部352通过第二导通过孔GK2与信号引入线120-2电连接。以及，第六子桥接部363与第五子桥接部353直接电连接，第五子桥接部353通过第二导通过孔GK2与信号引入线120-3电连接。
在本公开实施例中，如图18a至图19所示，第一信号引入部210包括：第一镂空区域KB1；其中，第一镂空区域KB1包括：第一结合过孔GH1以及第一结合狭缝GF1；其中，第一结合过孔GH1以及第一结合狭缝GF1贯穿第一信号引入部210。
由于第二信号引入部220需要通过桥接部才能与第二线组中的信号引入线电连接，这样使得第二信号引入部220至第二线组中的信号引入线对应的stv_b这一信号流通路径，与第一信号引入部210至第一线组中的信号引入线对应的stv_a这一信号流通路径之间的电阻差异较大，从而导致信号stv_a和stv_b输入到信号输入端IP中时延迟具有差异，进而导致第一级移位寄存器、第三级移位寄存器、第五级移位寄存器与第二级移位寄存器、第四级移位寄存器、第六级移位寄存器的输出信号端GO输出的信号具有差异，造成对应上子像素的亮度不同，影响显示效果。本公开实施例中通过在第一信号引入部210上设置第一镂空区域KB1，并在第一镂空区域KB1中设置贯穿第二信号引入部220的第一结合过孔GH1以及第一结合狭缝GF1，这样可以增加第一信号引入部210的电阻，从而可以降低stv_a这一信号流通路径和stv_b这一信号流通路径之间的电压差异，降低信号stv_a和stv_b输入到信号输入端 IP中时延迟的差异，提高显示效果。
在本公开实施例中，可以使第一结合过孔GH1的总数与第一导通过孔GK1的总数设置为相同。例如，可以使第一结合过孔GH1的总数与第一导通过孔GK1的总数设置为12个、8个、或其他数量，在此不作限定。当然，也可以使第一结合过孔GH1的总数与第一导通过孔GK1的总数设置为不同，其可以根据实际应用的需求进行确定，在此不作限定。
在本公开实施例中，如图18a至图19所示，显示面板还可以包括：第四辅助部540和第五辅助部550；第四辅助部540和第五辅助部550与桥接部位于同一层；其中，第四辅助部540通过第三导通过孔GK3与第一信号引入部210电连接；其中，第五辅助部550通过第四导通过孔GK4与第二信号引入部220电连接。这样通过设置与第一信号引入部210电连接的第四辅助部540，可以降低信号stv_a的流通路径的电阻。以及，通过设置与第二信号引入部220电连接的第五辅助部550，可以降低信号stv_b的流通路径的电阻。
在本公开实施例中，如图18a至图19所示，第一线组中的信号引入线可以包括第二镂空区域(如KB-1、KB-2、KB-3)；第二镂空区域包括：第二结合过孔GH2和第二结合狭缝GF2；其中，第二结合过孔GH2贯穿第一线组中的信号引入线，第二结合狭缝GF2贯穿第一线组中的信号引入线。这可以增加第一线组中的信号引入线的电阻，进一步使信号stv_a的流通路径的电阻和stv_b的流通路径的电阻之间的差异降低。
在本公开实施例中，如图18a至图19所示，第二镂空区域(如KB-1、KB-2、KB-3)还包括：第二结合过孔GH2；其中，第二结合过孔GH2贯穿第一线组中的信号引入线，且第二结合过孔GH2位于第二结合狭缝GF2背离第一结合过孔GH1的一侧；以及，第二线组中的信号引入线与第五子桥接部连接的一端设置有第四结合过孔GH4；其中，第四结合过孔GH4位于第二导通过孔GK2背离第六子桥接部一侧。进一步使信号stv_a的流通路径的电阻和stv_b的流通路径的电阻之间的差异降低。
需要说明的是，在实际工艺中，由于工艺条件的限制或其他因素，上述 各实施例中提到的相同并不能完全相同，可能会有一些偏差，因此上述所指出的相同关系只要大致满足上述条件即可，均属于本公开的保护范围。例如，上述相同可以是在误差允许范围之内所允许的相同。
尽管已描述了本公开的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本公开范围的所有变更和修改。
显然，本领域的技术人员可以对本公开实施例进行各种改动和变型而不脱离本公开实施例的精神和范围。这样，倘若本公开实施例的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (27)

  1. 一种显示面板，包括：
    衬底基板，包括非显示区；
    栅极驱动电路，位于所述非显示区；其中，所述栅极驱动电路包括多个移位寄存器，所述多个移位寄存器分为多个寄存器组；
    多条信号引入线，位于所述非显示区；其中，所述多条信号引入线分为多个线组，并且一个所述寄存器组的帧起始信号端对应电连接一个所述线组；
    其中，位于同一所述线组的两条信号引入线之间设置有其他线组的信号引入线。
  2. 如权利要求1所述的显示面板，其中，所述显示面板还包括：
    多个信号引入部；其中，所述多个线组中的一个所述线组与所述多个信号引入部中的所述信号引入部电连接；
    多个桥接部；其中，所述桥接部与所述信号引入部位于不同层；
    其中，所述信号引入部与所述信号引入线位于同一层；并且，所述多个线组中的一个所述线组与对应的信号引入部直接电连接，其余所述线组与对应的信号引入部通过桥接部电连接。
  3. 如权利要求2所述的显示面板，其中，所述多个寄存器组包括第一寄存器组和第二寄存器组；
    所述多个线组包括第一线组和第二线组；
    所述多个信号引入部包括第一信号引入部和第二信号引入部；
    其中，所述第一线组的第一端与所述第一信号引入部直接电连接，所述第一线组的第二端与所述第一寄存器组的帧起始信号端电连接；
    所述第二线组的第一端与所述第二信号引入部通过桥接部电连接，所述第二线组的第二端与所述第二寄存器组的帧起始信号端电连接。
  4. 如权利要求3所述的显示面板，其中，所述桥接部包括第一桥接部、第二桥接部以及连接于所述第一桥接部和所述第二桥接部之间的第三桥接部；
    所述显示面板还包括：
    第一桥接连接部，所述第一桥接连接部与所述桥接部以及信号引入部位于不同层；其中，所述第一桥接连接部的第一端与所述第一桥接部通过第一转接过孔电连接，且所述第一桥接连接部的第二端与所述第二信号引入部通过第二转接过孔电连接；
    第二桥接连接部，所述第二桥接连接部与所述第一桥接连接部位于同一层；其中，所述第二桥接连接部的第一端与所述第二桥接部通过第三转接过孔电连接，且所述第二桥接连接部的第二端与所述第二线组中的信号引入线通过第四转接过孔电连接。
  5. 如权利要求4所述的显示面板，其中，所述第三桥接部包括相互间隔设置的多个第三子桥接部；其中，一个所述第三子桥接部对应一条信号引入线；
    所述第二桥接部包括多个第二子桥接部；其中，一个所述第二子桥接部对应一条信号引入线。
  6. 如权利要求5所述的显示面板，其中，所述多个第二子桥接部相互间隔设置；
    或者，所述多个第二子桥接部相互接触形成一体化结构。
  7. 如权利要求6所述的显示面板，其中，所述第二桥接连接部包括相互间隔设置的多个第二子桥接连接部；一个所述第二子桥接部通过所述第三转接过孔与一个所述第二子桥接连接部电连接。
  8. 如权利要求4-7任一项所述的显示面板，其中，所述第一信号引入部包括：至少一个第一子信号引入部和第三子信号引入部；其中，所述第三子信号引入部与所述第一线组的第一端直接电连接；
    所述显示面板还包括：
    第五桥接连接部，所述第五桥接连接部与所述第一桥接连接部位于同一层；其中，所述第五桥接连接部通过第九转接过孔与各所述第一子信号引入部电连接，所述第五桥接连接部通过第十转接过孔与所述第三子信号引入部 电连接。
  9. 如权利要求8所述的显示面板，其中，所述第一线组中的信号引入线包括第一信号引线段和至少一个第二信号引线段；
    所述显示面板还包括：
    多个第四桥接连接部，所述第四桥接连接部与所述第一桥接连接部位于同一层；其中，同一所述信号引入线中，所述第一信号引线段和所述第二信号引线段通过所述第四桥接连接部电连接，且相邻的所述第二信号引线段通过所述第四桥接连接部电连接。
  10. 如权利要求9所述的显示面板，其中，所述第一信号引线段的第一端与所述第三子信号引入部直接电连接，所述第一信号引线段的第二端通过第五转接过孔与对应的所述第四桥接连接部的第一端电连接，所述第四桥接连接部的第二端通过第六转接过孔与所述第二信号引线段的电连接；
    相邻的所述第二信号引线段中的一个所述第二信号引线段通过第七转接过孔与对应的所述第四桥接连接部的第一端电连接，所述第四桥接连接部的第二端通过第八转接过孔与另一个所述第二信号引线段电连接。
  11. 如权利要求10所述的显示面板，其中，所述第一线组中的各所述第一信号引线段的第二端相互间隔设置；或者，所述第一线组中的各所述第一信号引线段的第二端相互接触形成一体化结构。
  12. 如权利要求10所述的显示面板，其中，所述第二线组中的信号引入线包括至少两个第三信号引线段；所述显示面板还包括：多个第三桥接连接部；
    同一条所述信号引入线中，相邻的两个所述第三信号引线段通过所述第三桥接连接部电连接，且所述第三桥接连接部的第一端通过第十三转接过孔与一个所述第三信号引线段电连接，所述第三桥接连接部的第二端通过第十四转接过孔与另一个所述第三信号引线段电连接。
  13. 如权利要求9-12任一项所述的显示面板，其中，所述多个第四桥接连接部相互间隔设置。
  14. 如权利要求13所述的显示面板，其中，所述第一线组中的一条信号引入线对应的第四桥接连接部的总数，与所述第二线组中的一条信号引入线对应的第三桥接连接部和第二桥接连接部的总数之和相同。
  15. 如权利要求8所述的显示面板，其中，所述第二信号引入部包括：至少一个第二子信号引入部；所述第一桥接连接部通过所述第二转接过孔与各所述第二子信号引入部电连接；
    所述第一子信号引入部的总数与所述第二子信号引入部的总数相同。
  16. 如权利要求8-15任一项所述的显示面板，其中，所述显示面板还包括：第一辅助部和第二辅助部；所述第一辅助部和所述第二辅助部与所述桥接部位于同一层；
    所述第一辅助部在所述衬底基板的正投影位于所述第一子信号引入部和所述第三子信号引入部在所述衬底基板的正投影之间；并且，所述第五桥接连接部还通过第十五转接过孔与所述第一辅助部电连接；
    所述第二辅助部在所述衬底基板的正投影位于所述第二子信号引入部和所述第一桥接部在所述衬底基板的正投影之间；并且，所述第一桥接连接部还通过第十六转接过孔与所述第二辅助部电连接。
  17. 如权利要求16所述的显示面板，其中，所述显示面板还包括：多个第三辅助部；所述第三辅助部和所述第一辅助部与所述桥接部位于同一层；
    第一线组中的一条信号引入线对应设置至少一个第三辅助部；
    其中，同一信号引入线中，所述第一信号引线段通过对应的所述第三辅助部与所述第二信号引线段电连接。
  18. 如权利要求17所述的显示面板，其中，所述显示面板还包括：多个第六桥接转接部和多个第七桥接转接部；
    至少一个所述第三辅助部对应设置至少一个所述第六桥接转接部和至少一个所述第七桥接转接部；
    所述第三辅助部的第一端通过第十一转接过孔与对应的所述第六桥接转接部电连接，所述第六桥接转接部通过第十二转接过孔与对应的所述第一信 号引线段电连接，所述第三辅助部的第二端通过第十七转接过孔与对应的所述第七桥接转接部电连接，所述第七桥接转接部通过第十八转接过孔与对应的所述第二信号引线段电连接。
  19. 如权利要求3所述的显示面板，其中，所述桥接部包括第四桥接部、第六桥接部以及连接于所述第四桥接部和所述第六桥接部之间的第五桥接部；
    所述第四桥接部与所述第二信号引入部通过第一导通过孔电连接；
    所述第六桥接部与所述第二线组中的信号引入线通过第二导通过孔电连接。
  20. 如权利要求19所述的显示面板，其中，所述第五桥接部包括相互间隔设置的多个第五子桥接部；所述第六桥接部包括相互间隔设置的多个第六子桥接部；
    所述第四桥接部通过至少一个所述第五子桥接部和至少一个第六子桥接部与所述第二线组中的一条信号引入线电连接。
  21. 如权利要求19或20所述的显示面板，其中，所述第一信号引入部包括：第一镂空区域；
    所述第一镂空区域包括：第一结合过孔；其中，所述第一结合过孔贯穿所述第一信号引入部。
  22. 如权利要求21所述的显示面板，其中，所述第一镂空区域还包括：第一结合狭缝；其中，所述第一结合狭缝贯穿所述第一信号引入部。
  23. 如权利要求21所述的显示面板，其中，所述显示面板还包括：第四辅助部和第五辅助部；所述第四辅助部和第五辅助部与所述桥接部位于同一层；
    所述第四辅助部通过第三导通过孔与所述第一信号引入部电连接；
    第五辅助部通过第四导通过孔与所述第二信号引入部电连接。
  24. 如权利要求21-23任一项所述的显示面板，其中，所述第一线组中的信号引入线包括第二镂空区域；
    所述第二镂空区域包括：第二结合过孔；其中，所述第二结合过孔贯穿 所述第一线组中的信号引入线。
  25. 如权利要求24所述的显示面板，其中，所述第二镂空区域还包括：第二结合狭缝；其中，所述第二结合狭缝贯穿所述第一线组中的信号引入线。
  26. 如权利要求25所述的显示面板，其中，所述第二镂空区域还包括：第二结合过孔；其中，所述第二结合过孔贯穿所述第一线组中的信号引入线，且所述第二结合过孔位于所述第二结合狭缝背离所述第一结合过孔的一侧；
    所述第二线组中的信号引入线与第五子桥接部连接的一端设置有第四结合过孔；其中，所述第四结合过孔位于所述第二导通过孔背离所述第六子桥接部一侧。
  27. 一种显示装置，包括如权利要求1-26任一项所述的显示面板。
PCT/CN2021/143492 2021-12-31 2021-12-31 显示面板及显示装置 WO2023123304A1 (zh)

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