WO2023098301A1 - 显示基板和显示装置 - Google Patents

显示基板和显示装置 Download PDF

Info

Publication number
WO2023098301A1
WO2023098301A1 PCT/CN2022/124653 CN2022124653W WO2023098301A1 WO 2023098301 A1 WO2023098301 A1 WO 2023098301A1 CN 2022124653 W CN2022124653 W CN 2022124653W WO 2023098301 A1 WO2023098301 A1 WO 2023098301A1
Authority
WO
WIPO (PCT)
Prior art keywords
sub
pixel
pixels
color
layer
Prior art date
Application number
PCT/CN2022/124653
Other languages
English (en)
French (fr)
Inventor
周瑞
石佺
张微
秦成杰
卢彦伟
郭晓亮
杜丽丽
刘聪
王本莲
黄炜赟
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Publication of WO2023098301A1 publication Critical patent/WO2023098301A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels

Definitions

  • Embodiments of the present disclosure relate to a display substrate and a display device.
  • OLED organic light-emitting diode display
  • OLEDs organic light-emitting diode display devices
  • Embodiments of the present disclosure provide a display substrate and a display device.
  • the display substrate includes a base substrate, a plurality of sub-pixels and an isolation structure; a plurality of sub-pixels are located on the base substrate, each sub-pixel includes a light-emitting element, and the light-emitting element includes a light-emitting functional layer and first electrodes located on both sides of the light-emitting functional layer and
  • the second electrode, the second electrode is located between the luminescent functional layer and the base substrate, the luminescent functional layer includes a charge generation layer;
  • the isolation structure is located on the base substrate, the isolation structure is located between adjacent sub-pixels, and the luminescent functional layer The charge generation layer is disconnected where the partition structure is located.
  • the display substrate can be provided with an isolation structure between adjacent sub-pixels, and the charge generation layer in the light-emitting functional layer is disconnected at the position where the isolation structure is located, thereby avoiding the charge generation layer with higher conductivity. Crosstalk between adjacent subpixels.
  • At least one embodiment of the present disclosure provides a display substrate, which includes: a base substrate; a plurality of sub-pixels located on the base substrate, each of the sub-pixels includes a light-emitting element, and the light-emitting element includes a light-emitting functional layer and is located on the base substrate.
  • the second electrode and the first electrode on both sides of the luminescent functional layer, the first electrode is located between the luminescent functional layer and the base substrate, the luminescent functional layer includes a conductive sublayer; and an isolation structure , located on the base substrate, the isolation structure is located between adjacent sub-pixels, and the conductive sublayer in the light-emitting functional layer is disconnected at the position where the isolation structure is located.
  • the partition structure includes: a first sub-partition structure; and a second sub-partition structure, the first sub-partition structure and the second sub-partition structure
  • the adjacent sub-pixels are sequentially arranged in the arrangement direction.
  • the display substrate provided by an embodiment of the present disclosure further includes: a pixel definition layer located on the base substrate, the pixel definition layer is partly located on the side of the first electrode away from the base substrate, the The pixel defining layer includes a plurality of pixel openings and pixel interval openings, the plurality of pixel openings are in one-to-one correspondence with the plurality of sub-pixels to define effective light emitting areas of the plurality of sub-pixels, the pixel openings are configured to expose the For the first electrode, the pixel spacing openings are located between adjacent first electrodes, and at least part of the isolation structure is located in the pixel spacing openings.
  • the plurality of sub-pixels includes a plurality of sub-pixels of a first color, a plurality of sub-pixels of a second color, and a plurality of sub-pixels of a third color
  • the partition structure includes a plurality of rings Each ring-shaped partition surrounds one of the first color sub-pixel, one second color sub-pixel and one third color sub-pixel.
  • the plurality of ring-shaped partitions include a plurality of first ring-shaped partitions, and each of the first ring-shaped partitions surrounds one sub-pixel of the second color. set up.
  • the first annular partition includes at least one first notch.
  • the partition structure further includes: a plurality of first strip-shaped partitions, each of which extends along the first direction; and a plurality of second strip-shaped partitions.
  • Strip-shaped partitions, each of the second strip-shaped partitions extends along the second direction; the first strip-shaped partition connects two adjacent first ring-shaped partitions in the first direction, so The second strip-shaped partition connects two adjacent first annular partitions in the second direction, and the plurality of first strip-shaped partitions and the plurality of second strip-shaped partitions connect
  • the plurality of first annular partitions are connected to form a plurality of first grid structures and a plurality of second grid structures in areas other than the plurality of first annular partitions, the first grid
  • the structure is arranged around a sub-pixel of the first color
  • the second grid structure is arranged around a sub-pixel of the third color.
  • the display substrate provided by an embodiment of the present disclosure further includes: a spacer, the plurality of first strip-shaped partitions and the plurality of second strip-shaped partitions connect the plurality of first ring-shaped partitions connected to form a plurality of third grid structures, the third grid structures are arranged around one adjacent sub-pixel of the first color and one sub-pixel of the third color, and the spacer is located on the first color sub-pixel within the three-grid structure and located between the first color sub-pixel and the third color sub-pixel.
  • the display substrate provided by an embodiment of the present disclosure further includes: a spacer, the spacer is located inside the first grid structure or the second grid structure, and is located adjacent to the second grid structure. Between the first color sub-pixel and the third color sub-pixel.
  • the partition structure further includes: a plurality of second ring-shaped partitions, each of which is arranged around one sub-pixel of the first color; And a plurality of third ring-shaped partitions, each of the third ring-shaped partitions is arranged around one sub-pixel of the third color.
  • the partition structure further includes: a plurality of second ring-shaped partitions, each of which is arranged around one sub-pixel of the first color; And a plurality of third ring-shaped partitions, each of the third ring-shaped partitions is arranged around one of the third color sub-pixels, the third ring-shaped partitions include a second gap, and the third ring-shaped partitions The two ends at the second gap of the part are respectively connected with two first annular partition parts adjacent in the first direction or the second direction.
  • the display substrate provided by an embodiment of the present disclosure further includes: a spacer, and the spacer is located at the second gap of the third ring-shaped partition.
  • the plurality of sub-pixels of the first color and the plurality of sub-pixels of the third color are arranged alternately along the first direction and the second direction to form a plurality of first A pixel row and a plurality of first pixel columns
  • the plurality of second color sub-pixels are arranged in an array along the first direction and the second direction to form a plurality of second pixel rows and a plurality of second pixel columns
  • the plurality of first pixel rows and the plurality of second pixel rows are alternately arranged along the second direction and staggered from each other in the first direction
  • the plurality of first pixel columns and the plurality of The second pixel columns are arranged alternately along the first direction and staggered from each other in the second direction
  • the partition structure is located between adjacent sub-pixels of the first color and sub-pixels of the third color
  • the partition structure is located between the adjacent sub-pixels of the second color and the sub-pixel of the third color
  • the plurality of sub-pixels includes a plurality of sub-pixels of a first color, a plurality of sub-pixels of a second color, and a plurality of sub-pixels of a third color
  • the partition structure includes a plurality of Each of the first ring-shaped partitions is arranged around two adjacent sub-pixels of the second color.
  • the partition structure further includes: a plurality of second ring-shaped partitions, each of which is arranged around one sub-pixel of the first color; And a plurality of third ring-shaped partitions, each of the third ring-shaped partitions is arranged around one sub-pixel of the third color.
  • any two of the plurality of first annular partitions, the plurality of second annular partitions, and the plurality of third annular partitions Adjacent annular partitions share a partition edge.
  • the multiple sub-pixels are divided into multiple sub-pixel groups, and each sub-pixel group includes a sub-pixel of a first color, two sub-pixels of a second color, and a sub-pixel of a third color.
  • Sub-pixels, in each sub-pixel group, the first color sub-pixels and the third color sub-pixels are arranged along a first direction, and two of the second color sub-pixels are adjacently arranged in a second direction, and Located between the first color sub-pixel and the third color sub-pixel.
  • the partition structure includes: a groove; a shielding part, the shielding part is located at the edge of the groove and protrudes into the groove to form A protruding portion of a part of the opening of the groove, the conductive sublayer of the light-emitting functional layer is disconnected at the protruding portion of the shielding portion.
  • two edges of the groove in the arrangement direction of two adjacent sub-pixels are respectively provided with the shielding parts.
  • the partition structure includes a partition column, and the partition column includes a first isolation part and a second isolation part arranged in layers, and the first isolation part is located on the first isolation part.
  • One side of the second isolation part close to the base substrate, the second isolation part has a protruding part beyond the first isolation part in the arrangement direction of two adjacent sub-pixels, and the light-emitting functional layer The conductive sublayer of is disconnected at the protruding portion of the second isolation portion.
  • the light-emitting functional layer includes a first light-emitting layer and a second light-emitting layer located on both sides of the conductive sublayer in a direction perpendicular to the base substrate.
  • the conductive sublayer is a charge generation layer.
  • the second electrode is disconnected at the position where the isolation structure is located.
  • the display substrate provided by an embodiment of the present disclosure further includes: a flat layer located on the side of the first electrode close to the base substrate; a plurality of data lines located between the flat layer and the base substrate Between, the plurality of data lines extend along the first direction and are arranged along the second direction, the first direction and the second direction intersect; a plurality of power lines are located between the planar layer and the base substrate Between, the plurality of power lines extend along the first direction and are arranged along the second direction, along the direction perpendicular to the base substrate, the isolation structure and the data line and the power line At least one of them overlaps.
  • At least one embodiment of the present disclosure further provides a display device, which includes any one of the above display substrates.
  • FIG. 1 is a schematic plan view of a display substrate provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic cross-sectional view of a display substrate along the AB direction in FIG. 1 according to an embodiment of the present disclosure
  • FIG. 3 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 5 is a schematic cross-sectional view of a display substrate along the CD direction in FIG. 4 according to an embodiment of the present disclosure
  • FIG. 6 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 7 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 8 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 9 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 10 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 11 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 12 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 13 is a schematic partial cross-sectional view of a display substrate provided by an embodiment of the present disclosure.
  • FIG. 14 is a schematic diagram of a display device provided by an embodiment of the present disclosure.
  • FIG. 15 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 16 is a schematic cross-sectional view of a display substrate along line EF in FIG. 15 according to an embodiment of the present disclosure
  • FIG. 17A is a schematic partial cross-sectional view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 17B is a cross-sectional electron microscope view of a display substrate provided by an embodiment of the present disclosure.
  • FIG. 18 is a schematic diagram of another display device provided by an embodiment of the present disclosure.
  • FIG. 19 is a schematic partial cross-sectional view of a display substrate provided by an embodiment of the present disclosure.
  • FIG. 20 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • Fig. 21A is a partial cross-sectional structural schematic diagram of a display substrate provided according to another example of an embodiment of the present disclosure.
  • Fig. 21B is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • 22A to 22D are schematic flow charts of the manufacturing method of the display substrate before forming the display substrate shown in FIG. 19;
  • Fig. 23 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • 24A to 24D are schematic flow charts of the manufacturing method of the display substrate before forming the display substrate shown in FIG. 23;
  • Fig. 25 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • FIG. 26 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 27 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 28 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 29 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • 30A-30C are schematic steps of another method for manufacturing a display substrate provided by an embodiment of the present disclosure.
  • 31A-31C are schematic diagrams of steps of another manufacturing method of a display substrate provided by an embodiment of the present disclosure.
  • the component may be one or more, or may be understood as at least one.
  • At least one means one or more, and “plurality” means at least two.
  • the “same layer” in the embodiments of the present disclosure refers to the relationship between multiple film layers formed of the same material after going through the same step (eg, one-step patterning process).
  • the “same layer” here does not always mean that multiple film layers have the same thickness or that multiple film layers have the same height in cross-sectional view.
  • the single-layer light-emitting layer in the light-emitting element in the OLED can be replaced by two light-emitting layers, and a charge generation layer (CGL) is added between the double-layer light-emitting layers to achieve a Double-layer luminous (Tandem EL) design. Since the display device with double-layer light-emitting (Tandem EL) design has two light-emitting layers, its luminous brightness can be approximately equivalent to twice that of a single light-emitting layer. Therefore, the display device adopting the double-layer light-emitting design has the advantages of long life, low power consumption, and high brightness.
  • the inventors of the present application have noticed that for high-resolution products, the light-emitting functional layers of adjacent sub-pixels (herein referring to two light-emitting layers and charge generation The film layer of the layer) is connected, so the charge generation layer is easy to cause crosstalk between adjacent sub-pixels, which seriously affects the display quality.
  • inventions of the present disclosure provide a display substrate and a display device.
  • the display substrate includes a base substrate, a plurality of sub-pixels and an isolation structure; a plurality of sub-pixels are located on the base substrate, each sub-pixel includes a light-emitting element, and the light-emitting element includes a light-emitting functional layer and first electrodes located on both sides of the light-emitting functional layer and The second electrode, the second electrode is located between the luminescent functional layer and the base substrate, the luminescent functional layer includes a charge generation layer; the isolation structure is located on the base substrate, the isolation structure is located between adjacent sub-pixels, and the luminescent functional layer The charge generation layer is disconnected where the partition structure is located.
  • the display substrate can be provided with an isolation structure between adjacent sub-pixels, and the charge generation layer in the light-emitting functional layer is disconnected at the position where the isolation structure is located, thereby avoiding the charge generation layer with higher conductivity. Crosstalk between adjacent subpixels.
  • FIG. 1 is a schematic plan view of a display substrate provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic cross-sectional view of a display substrate provided by an embodiment of the present disclosure along the direction AB in FIG. 1 .
  • the display substrate 100 includes a base substrate 110 and a plurality of sub-pixels 200; the plurality of sub-pixels 200 are located on the base substrate 110, and each sub-pixel 200 includes a light emitting element 210; each light emitting element 210 includes a light emitting element
  • the light-emitting functional layer 120 includes multiple sub-functional layers, and the multiple sub-functional layers include a conductive sub-layer 129 with relatively high conductivity. It should be noted that the above-mentioned light-emitting functional layer does not only include film layers that directly emit light, but also includes functional film layers used to assist light emission, such as hole transport layers, electron transport layers, and the like.
  • the conductive sublayer 129 may be a charge generation layer.
  • the first electrode 131 may be an anode
  • the second electrode 132 may be a cathode.
  • the cathode can be formed of a material with high conductivity and low work function, for example, the cathode can be made of a metal material.
  • the anode may be formed of a transparent conductive material having a high work function.
  • the display substrate 100 further includes an isolation structure 140 located on the base substrate 110 and between adjacent sub-pixels 200 ; the charge generation layer 129 in the light-emitting functional layer 120 Break at the location where the partition structure 140 is located. It should be noted that the charge generation layer in the light-emitting functional layer has a discontinuous structure or a non-integrated structure at the disconnected position.
  • the isolation structure is provided between adjacent sub-pixels, and the charge generation layer in the light-emitting functional layer is disconnected at the location of the isolation structure, so as to avoid the high conductivity.
  • the charge generation layer causes crosstalk between adjacent subpixels.
  • the display substrate can avoid crosstalk between adjacent sub-pixels through the isolation structure, the display substrate can increase pixel density while adopting a double-layer light emitting (Tandem EL) design. Therefore, the display substrate can have the advantages of long life, low power consumption, high brightness, and high resolution.
  • adjacent sub-pixels means that no other sub-pixels are disposed between two sub-pixels.
  • the line connecting the brightness centers of two adjacent sub-pixels 200 passes through the partition structure 140 . Since the size of the charge generating layer in the extending direction of the connecting line is small, the resistance of the charge generating layer in the extending direction of the connecting line is also small, and the charge can easily pass through the charge generating layer from one of the two adjacent sub-pixels. It is transferred to the other of the two adjacent sub-pixels along the extending direction of the connecting line. Therefore, the display substrate allows the connection line to pass through the isolation structure, so that the isolation structure can effectively block the shortest propagation path of charges, thereby effectively avoiding crosstalk between adjacent sub-pixels.
  • each sub-pixel may be the geometric center of the effective light-emitting area of the sub-pixel.
  • the embodiments of the present disclosure include but are not limited thereto, and the brightness center of each sub-pixel may also be the position where the maximum luminous brightness of the sub-pixel is located.
  • the display substrate 100 further includes a pixel defining layer 150 on the base substrate 110; the pixel defining layer 150 is partially located on the side of the first electrode 131 away from the base substrate 110
  • the pixel defining layer 150 includes a plurality of pixel openings 152 and pixel spacing openings 154; the plurality of pixel openings 152 are in one-to-one correspondence with the plurality of sub-pixels 200 to define the effective light-emitting areas of the plurality of sub-pixels 200; the pixel openings 152 are configured to expose the first electrode 131 so that the first electrode 131 is in contact with the subsequently formed light-emitting functional layer 120 .
  • the pixel spacing openings 154 are located between adjacent first electrodes 131 , and at least part of the isolation structure 140 is located in the pixel spacing openings 154 . Therefore, the display substrate can avoid forming an isolation structure on the pixel defining layer, thereby avoiding increasing the thickness of the display substrate.
  • the embodiments of the present disclosure include but are not limited thereto, and the above-mentioned pixel spacing openings may not be provided on the pixel defining layer, so that the isolation structure may be directly disposed on the pixel defining layer, or the isolation structure may be fabricated using the pixel defining layer.
  • the material of the pixel defining layer may include organic materials such as polyimide, acrylic or polyethylene terephthalate.
  • the partition structure 140 can be a partition column; at this time, the partition structure 140 includes a first isolation part 1405 and a second isolation part 1406 arranged in layers, and the first isolation part 1405 is located in the second isolation part.
  • the isolation structure can realize the disconnection of the conductive sub-layer of the light-emitting functional layer.
  • the partition structure provided by the embodiments of the present disclosure is not limited to the form of the above-mentioned partition columns, and the partition structure can also adopt other structures that can realize the disconnection of the conductive layer of the light-emitting functional layer; in addition, the above-mentioned arrangement direction It may be an extending direction of a line connecting brightness centers of two adjacent sub-pixels.
  • a plurality of sub-pixels 200 share the second electrode 132 , and the second electrode 132 is disconnected at the position where the isolation structure 140 is located.
  • embodiments of the present disclosure include but are not limited thereto, and the second electrode may not be disconnected at the position where the partition structure is located.
  • the light-emitting functional layer 120 includes a first light-emitting layer 121 and a second light-emitting layer 122 located on both sides of a conductive sublayer 129 in a direction perpendicular to the base substrate 110, and the conductive sublayer 129 is a charge generation layer.
  • the display substrate can implement a double-layer light-emitting (Tandem EL) design, so it has the advantages of long life, low power consumption, and high brightness.
  • the first light emitting layer 121 and the second light emitting layer 122 in the light emitting functional layer 120 are also disconnected at the position where the isolation structure 140 is located.
  • embodiments of the present disclosure include but are not limited thereto.
  • the first light-emitting layer and the second light-emitting layer in the light-emitting functional layer may not be disconnected at the position where the isolation structure is located, but only the conductive electron layer is at the position where the isolation structure is located. disconnect.
  • the conductivity of the conductive sublayer 129 is greater than the conductivity of the first light emitting layer 121 and the second light emitting layer 122 , and is less than that of the second electrode 132 .
  • the first light emitting layer 121 is located on the side of the conductive sublayer 129 close to the base substrate 110 ; the second light emitting layer 122 is located on the side of the conductive sublayer 129 away from the base substrate 110 .
  • the light-emitting functional layer may also include other sub-functional layers other than the conductive sub-layer, the first light-emitting layer, and the second light-emitting layer, such as a hole injection layer, a hole transport layer, an electron injection layer, and an electron injection layer. transport layer.
  • the materials of the first light-emitting layer and the second light-emitting layer may be selected from pyrene derivatives, anthracene derivatives, fluorene derivatives, perylene derivatives, styrylamine derivatives, metal complexes, and the like.
  • the material of the hole injection layer may include oxides such as molybdenum oxide, titanium oxide, vanadium oxide, rhenium oxide, ruthenium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide , Silver oxide, tungsten oxide, manganese oxide.
  • oxides such as molybdenum oxide, titanium oxide, vanadium oxide, rhenium oxide, ruthenium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide , Silver oxide, tungsten oxide, manganese oxide.
  • the material of the hole injection layer may also include organic materials, such as: hexacyanohexaazatriphenylene, 2,3,5,6-tetrafluoro-7,7,8,8-tetracyano-p-quinone Dimethane (F4TCNQ), 1,2,3-tris[(cyano)(4-cyano-2,3,5,6-tetrafluorophenyl)methylene]cyclopropane.
  • organic materials such as: hexacyanohexaazatriphenylene, 2,3,5,6-tetrafluoro-7,7,8,8-tetracyano-p-quinone Dimethane (F4TCNQ), 1,2,3-tris[(cyano)(4-cyano-2,3,5,6-tetrafluorophenyl)methylene]cyclopropane.
  • the material of the hole transport layer may include aromatic amines with hole transport properties and dimethylfluorene or carbazole materials, such as: 4,4'-bis[N-(1-naphthyl)-N-benzene Amino]biphenyl (NPB), N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1'-biphenyl]-4,4'-diamine (TPD), 4-phenyl-4'-(9-phenylfluoren-9-yl)triphenylamine (BAFLP), 4,4'-bis[N-(9,9-dimethylfluorene- 2-yl)-N-phenylamino]biphenyl (DFLDPBi), 4,4'-bis(9-carbazolyl)biphenyl (CBP), 9-phenyl-3-[4-(10-phenyl yl-9-anthryl)phenyl]-9H-carba
  • the material of the electron transport layer may include aromatic heterocyclic compounds, such as: benzimidazole derivatives, imidazole derivatives, pyrimidine derivatives, oxazine derivatives, quinoline derivatives, isoquinoline derivatives, phenanthroline derivatives things etc.
  • aromatic heterocyclic compounds such as: benzimidazole derivatives, imidazole derivatives, pyrimidine derivatives, oxazine derivatives, quinoline derivatives, isoquinoline derivatives, phenanthroline derivatives things etc.
  • the material of the electron injection layer may be alkali metal or metal and their compounds, such as lithium fluoride (LiF), ytterbium (Yb), magnesium (Mg), calcium (Ca).
  • LiF lithium fluoride
  • Yb ytterbium
  • Mg magnesium
  • Ca calcium
  • the first electrode 131 can be made of a metal material, such as any one of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo) or More, or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti, etc., or, is a metal A stack structure formed with transparent conductive materials, such as reflective materials such as ITO/Ag/ITO, Mo/AlNd/ITO, etc.
  • a metal material such as any one of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo) or More, or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum n
  • the second electrode 132 can use any one or more of magnesium (Mg), silver (Ag), aluminum (Al), or an alloy made of any one or more of the above metals , or use a transparent conductive material, such as indium tin oxide (ITO), or a multi-layer composite structure of metal and transparent conductive material.
  • Mg magnesium
  • Ag silver
  • Al aluminum
  • ITO indium tin oxide
  • the charge generation layer 129 may be configured to generate carriers, transport carriers, and inject carriers.
  • the material of the charge generation layer 129 may include n-type doped organic layer/inorganic metal oxide, such as Alq 3 :Mg/WO 3 , Bphen:Li/MoO 3 , BCP:Li/V 2 O 5 and BCP: Cs/V 2 O 5 ; or, n-type doped organic layer/organic layer, such as Alq 3 :Li/HAT-CN; or, n-type doped organic layer/p-type doped organic layer, such as BPhen :Cs/NPB:F4-TCNQ, Alq 3 :Li/NPB:FeCl 3 , TPBi:Li/NPB:FeCl 3 and Alq 3 :Mg/m-MTDATA:F4-TCNQ; or, non-doped type, such as F 16 CuPc/CuPc and Al/WO 3 /Au.
  • the material of the base substrate 110 may be made of one or more materials among glass, polyimide, polycarbonate, polyacrylate, polyetherimide, and polyethersulfone. Examples include but are not limited to this.
  • the base substrate can be a rigid substrate or a flexible substrate; when the base substrate is a flexible substrate, the base substrate can include a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second Two flexible material layers and a second inorganic material layer.
  • Materials such as the first flexible material layer and the second flexible material layer are polyimide (PI), polyethylene terephthalate (PET) or surface-treated polymer soft film.
  • the materials of the first inorganic material layer and the second inorganic material layer are silicon nitride (SiNx) or silicon oxide (SiOx), etc., which are used to improve the water and oxygen resistance of the base substrate.
  • the first inorganic material layer, the second inorganic material layer The layer is also called the barrier (Barrier) layer.
  • the material of the semiconductor layer is amorphous silicon (a-si).
  • the preparation process of the base substrate includes: first coating a layer of polyimide on the glass carrier plate, curing it into Form the first flexible (PI1) layer after the film; then deposit a layer of barrier film on the first flexible layer to form the first barrier (Barrier1) layer covering the first flexible layer; then deposit a layer of non- Crystalline silicon thin film, forming an amorphous silicon (a-si) layer covering the first barrier layer; then coating a layer of polyimide on the amorphous silicon layer, forming a second flexible (PI2) layer after curing to form a film ; Then deposit a layer of barrier film on the second flexible layer to form a second barrier (Barrier2) layer covering the second flexible layer, and finally complete the preparation of the base substrate.
  • the multiple sub-pixels 200 include multiple first color sub-pixels 201, multiple second color sub-pixels 202, and multiple third color sub-pixels 203;
  • the isolation structure 140 includes multiple first color sub-pixels 203;
  • a ring-shaped partition 141 , the first ring-shaped partition 141 is arranged around at least one sub-pixel 202 of the second color.
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first ring-shaped partition 141, and the first ring-shaped partition 141 can separate the second color sub-pixel 202 from other sub-pixels, thereby avoiding Crosstalk between second color subpixels and adjacent subpixels.
  • first ring-shaped partition shown in FIG. 2 is only arranged around one sub-pixel of the second color
  • the embodiments of the present disclosure include but are not limited thereto, and each first ring-shaped partition can also surround two sub-pixels. or more second color sub-pixels.
  • each first annular partition 141 is arranged around one sub-pixel 202 of the second color.
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first ring-shaped partition 141 , and the first ring-shaped partition 141 can separate each second-color sub-pixel 202 from other sub-pixels.
  • the number of sub-pixels 202 of the second color is greater than the number of sub-pixels 201 of the first color; or, the number of sub-pixels 202 of the second color is greater than that of the sub-pixels 203 of the third color. number; or, the number of sub-pixels 202 of the second color is greater than the number of sub-pixels 201 of the first color and the number of sub-pixels 203 of the third color.
  • the number of sub-pixels 202 of the second color is roughly twice the number of sub-pixels 201 of the first color or the number of sub-pixels 203 of the third color.
  • the partition structure 140 further includes a plurality of first strip-shaped partitions 144 and a plurality of second strip-shaped partitions 145; the first strip-shaped partitions 144 extend along the first direction, and the second strip-shaped partitions 145 extend along the first direction.
  • Two strip-shaped partitions 145 extend along the second direction; the first strip-shaped partition 144 connects the two first ring-shaped partitions 141 adjacent in the first direction, and the second strip-shaped partition 145 will be in the second Two first annular partitions 141 that are adjacent in the direction are connected.
  • a plurality of first strip-shaped partitions 144 and a plurality of second strip-shaped partitions 145 connect the plurality of first annular partitions 141 to form a plurality of first ring-shaped partitions 141 outside the plurality of first strip-shaped partitions 141.
  • a grid structure 161 and a plurality of second grid structures 162 the first grid structure 161 is arranged around a first color sub-pixel 201 , and the second grid structure 162 is arranged around a third color sub-pixel 203 .
  • the first strip-shaped partition can separate adjacent first-color sub-pixels and third-color sub-pixels in the second direction, so that the charge generation layer in the light-emitting functional layer is located in the first strip-shaped partition.
  • the second strip-shaped partition can be adjacent in the first direction
  • the sub-pixels of the first color and the sub-pixels of the third color are separated, so that the charge generation layer in the light-emitting functional layer is disconnected at the position where the second strip-shaped partition is located, so that it can effectively avoid being adjacent to each other in the first direction.
  • first direction intersects with the second direction, for example, the first direction and the second direction are perpendicular to each other.
  • the display substrate 100 further includes a spacer 170; a plurality of first strip-shaped partitions 144 and a plurality of second strip-shaped partitions 145 separate the plurality of first ring-shaped partitions 141 are connected to form a plurality of third grid structures 163, and the third grid structures 163 are arranged around an adjacent first color sub-pixel 201 and a third color sub-pixel 203, and the spacer 170 is located in the third grid structure 163, and between the first color sub-pixel 201 and the third color sub-pixel 203.
  • the above-mentioned third grid structure can provide enough space for the spacer; in addition, because The spacer has a certain height and is located between the first color sub-pixel and the third color sub-pixel in the third grid structure, so the spacer can also prevent the first color sub-pixel in the third grid structure from Crosstalk between sub-pixels and third-color sub-pixels. It should be noted that the spacers are used to support the evaporation mask used to manufacture the above-mentioned light-emitting layer.
  • a plurality of first color sub-pixels 201 and a plurality of third color sub-pixels 203 are alternately arranged along the first direction and the second direction to form a plurality of first pixel rows 310 and a plurality of a first pixel row 320
  • a plurality of second color sub-pixels 202 are arrayed along the first direction and the second direction to form a plurality of second pixel rows 330 and a plurality of second pixel columns 340
  • a plurality of first pixels The row 310 and the plurality of second pixel rows 330 are alternately arranged along the second direction and staggered from each other in the first direction
  • the plurality of first pixel columns 320 and the plurality of second pixel columns 340 are alternately arranged along the first direction and are arranged alternately in the second direction.
  • the partition structure 140 is located between the adjacent first color sub-pixel 201 and the third color sub-pixel 203, and/or, the partition structure 140 is located between the adjacent second color sub-pixel 202 and the third color sub-pixel 203, And/or, the isolation structure 140 is located between the adjacent sub-pixels 201 of the first color and the sub-pixels 202 of the second color.
  • the luminous efficiency of the sub-pixels of the third color is smaller than that of the sub-pixels of the second color.
  • the first color sub-pixel 201 is configured to emit red light
  • the second color sub-pixel 202 is configured to emit green light
  • the third color sub-pixel 203 is configured to emit blue light.
  • embodiments of the present disclosure include but are not limited thereto.
  • the shape of the orthographic projection of the effective light emitting area of the subpixel 201 of the first color on the substrate 110 includes a rounded rectangle;
  • the shape of the orthographic projection on the substrate 110 includes a rounded rectangle;
  • the shape of the orthographic projection of the effective light emitting area of the third color sub-pixel 203 on the base substrate 110 includes a rounded rectangle.
  • the above-mentioned effective light-emitting area may roughly be the area defined by the pixel opening corresponding to the sub-pixel.
  • the shape of the orthographic projection of the effective light-emitting area of the third-color subpixel 203 on the base substrate 110 includes a plurality of rounded corners, and the plurality of rounded corners includes a first rounded corner 2031, the arc radius of the first rounded corner portion 2031 is larger than the arc radius of other rounded corner portions.
  • the arc radius of the first rounded portion 2031 is relatively large, the space occupied by the first rounded portion 2031 is small, so the spacer 170 can be arranged near the first rounded portion 2031, thereby fully
  • the area on the display substrate is utilized to increase the pixel density.
  • the first rounded corner portion 2031 is the rounded corner portion with the smallest distance from the first color sub-pixel 201 among the plurality of rounded corner portions of the third color sub-pixel 203 .
  • the orthographic projection of the spacer 170 on the base substrate 110 is located on the line connecting the midpoint of the first rounded corner portion 2031 and the brightness center of the first color sub-pixel 201 .
  • the shape of the orthographic projection of the effective light-emitting area of the third-color subpixel 203 on the base substrate 110 includes a plurality of rounded corners, and the plurality of rounded corners includes a first rounded corner 2031 and the second rounded portion 2032, the arc radius of the first rounded portion 2031 is greater than the arc radius of the second rounded portion 2031;
  • the shape of the orthographic projection is axisymmetric with respect to the line connecting the first rounded corner portion 2031 and the second rounded corner portion 2032 .
  • FIG. 3 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • the first annular partition 141 includes at least one notch 1410 .
  • the second color sub-pixel is provided with a first ring-shaped partition, not only the charge generation layer in the light-emitting functional layer will be broken at the first ring-shaped partition, but the second electrode on the light-emitting functional layer may also break at the first ring-shaped partition.
  • the position where a ring-shaped partition is located is broken, so that the cathode signal cannot be transmitted to the second color sub-pixel. Therefore, by providing at least one notch on the first ring-shaped partition, the display substrate can prevent the first ring-shaped partition from completely isolating the sub-pixels of the second color, thereby avoiding the phenomenon that the cathode signal cannot be transmitted.
  • the second color sub-pixel 202 is surrounded by two first color sub-pixels 201 and two third color sub-pixels 203;
  • the gaps 1410 are respectively located between the second color sub-pixel 202 and the four adjacent sub-pixels 200 . Therefore, by providing the aforementioned gap, the second electrode or the cathode between the second color sub-pixel and the surrounding four sub-pixels will not be disconnected, thereby facilitating the transmission of the cathode signal.
  • the first annular partition is provided with the above-mentioned notch, due to the relatively small size of the notch, the resistance of the conductive sublayer (such as the charge generation layer) at the notch position can be greatly increased, thereby effectively hindering The passage of current can effectively avoid crosstalk between adjacent sub-pixels.
  • the conductivity of the second electrode is greater than that of the conductive sublayer, and multiple sub-pixels share the second electrode, there are multiple conductive channels, so even if the size of the gap is relatively small, it will not hinder the transmission of cathode signals.
  • the first electrode 131 of the second color sub-pixel 202 includes an electrode connection portion 1312
  • the orthographic projection of the electrode connection portion 1312 on the base substrate 110 is the same as that of the first annular partition portion 141 .
  • Orthographic projections of the notches 1410 on the base substrate 110 are at least partially overlapped.
  • the display substrate can use the position of the gap of the first ring-shaped partition to provide the electrode connection part, so that the sub-pixel layout can be made more compact, and the pixel density can be increased.
  • the brightness center of each sub-pixel may be the geometric center of the effective light-emitting area of the sub-pixel.
  • the embodiments of the present disclosure include but are not limited thereto, and the brightness center of each sub-pixel may also be the position where the maximum luminous brightness of the sub-pixel is located.
  • the first electrode 131 of the first color sub-pixel 201 also includes an electrode connection portion 1312
  • the first electrode 131 of the third color sub-pixel 203 also includes an electrode connection portion 1312
  • the orthographic projection of the electrode connection portion 1312 of the sub-pixel 201 and the third-color sub-pixel 203 on the base substrate 110 also at least partially overlaps the orthographic projection of the notch 1410 of the first annular partition 141 on the base substrate 110 .
  • the display substrate can further use the position of the gap of the first ring-shaped partition to set the electrode connection part of the sub-pixel of the first color and the sub-pixel of the third color, so that the layout of the sub-pixel can be made more compact, and the pixel density can be improved.
  • the partition structure 140 further includes a plurality of first strip-shaped partitions 144 and a plurality of second strip-shaped partitions 145; each first strip-shaped partition 144 extends along the first direction, Each second strip-shaped partition 145 extends along the second direction; the first strip-shaped partition 144 connects two adjacent first annular partitions 141 in the first direction, and the second strip-shaped partition 145 will Two adjacent first annular partitions 141 in the second direction are connected.
  • a plurality of first strip-shaped partitions 144 and a plurality of second strip-shaped partitions 145 connect the plurality of first annular partitions 141 to form a plurality of first ring-shaped partitions 141 outside the plurality of first strip-shaped partitions 141.
  • a grid structure 161 and a plurality of second grid structures 162 the first grid structure 161 is arranged around a first color sub-pixel 201 , and the second grid structure 162 is arranged around a third color sub-pixel 203 .
  • the first strip-shaped partition can separate adjacent first-color sub-pixels and third-color sub-pixels in the second direction, so that the charge generation layer in the light-emitting functional layer is located in the first strip-shaped partition.
  • the second strip-shaped partition can be adjacent in the first direction
  • the sub-pixels of the first color and the sub-pixels of the third color are separated, so that the charge generation layer in the light-emitting functional layer is disconnected at the position where the second strip-shaped partition is located, so that it can effectively avoid being adjacent to each other in the first direction.
  • first direction intersects with the second direction, for example, the first direction and the second direction are perpendicular to each other.
  • the gap 1410 of the first annular partition 141 also serves as the gap of the first grid structure 161 and the gap of the second grid structure 162 .
  • the second electrode of the first color sub-pixel 201 located in the first grid structure 161 and the second electrode of the third color sub-pixel 203 located in the second grid structure 162 will not be completely disconnected, thereby facilitating Pass the cathode signal.
  • the display substrate 100 further includes a spacer 170; the spacer 170 is located inside the first grid structure 161, and is located in the first color sub-pixel 201 and the third color sub-pixel Between 203.
  • the spacer can be directly placed in the first grid structure.
  • the embodiments of the present disclosure include but are not limited thereto, and the spacers may also be located within the second grid structure; in addition, the above-mentioned “inside the grid structure” refers to the space surrounded by the grid structure. within, not within the grid structure itself.
  • FIG. 4 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • a plurality of sub-pixels 200 includes a plurality of first color sub-pixels 201, a plurality of second color sub-pixels 202 and a plurality of third color sub-pixels 203;
  • the partition structure 140 includes a plurality of first ring-shaped partitions 141, a plurality of second annular partitions 142 and a plurality of third annular partitions 143; each first annular partition 141 is arranged around one sub-pixel 202 of the second color; each second annular partition 142 It is arranged around a sub-pixel 201 of the first color; each third annular partition 143 is arranged around a sub-pixel 203 of the third color.
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first ring-shaped partition 141 , the second ring-shaped partition 142 and the third ring-shaped partition 143 .
  • the ring-shaped partition 141 can separate the second color sub-pixel 202 from other sub-pixels, thereby avoiding crosstalk between the second-color sub-pixel and adjacent sub-pixels;
  • the second ring-shaped partition 142 can separate the first color
  • the sub-pixel 201 is separated from other sub-pixels, thereby avoiding crosstalk between the first color sub-pixel and adjacent sub-pixels;
  • the third annular partition 143 can separate the third color sub-pixel 203 from other sub-pixels, Therefore, crosstalk between the sub-pixels of the second color and adjacent sub-pixels can be avoided.
  • FIG. 5 is a schematic cross-sectional view of a display substrate along the CD direction in FIG. 4 according to an embodiment of the present disclosure.
  • the partition structure 140 between the first color sub-pixel 201 and the second color sub-pixel 202 includes a part of the first ring-shaped partition 141 and a part of the second ring-shaped partition 142;
  • a part of an annular partition 141 can serve as the first sub-partition structure 140A of the partition structure 140
  • a part of the second annular partition 142 can serve as the second sub-partition structure 140B of the partition structure 140 .
  • the first sub-isolation structure 140A and the second sub-isolation structure 140B are sequentially arranged in the arrangement direction of the adjacent sub-pixels 200 .
  • the charge generation layer in the light-emitting functional layer When the charge generation layer in the light-emitting functional layer is not disconnected or completely disconnected at the position of the first sub-block structure, the charge generation layer in the light-emitting functional layer may be disconnected at the position of the second sub-block structure. Therefore, by sequentially arranging the first sub-isolation structure and the second sub-isolation structure in the arrangement direction of the adjacent sub-pixels, the display substrate can better make the charge generation layer in the light-emitting functional layer in the position where the isolation structure is located. to further avoid crosstalk between adjacent sub-pixels caused by the charge generation layer with higher conductivity.
  • the embodiments of the present disclosure include but are not limited thereto. When the distance between adjacent sub-pixels is relatively small, only one sub-blocking structure may be provided.
  • both the first annular partition 141 and the second annular partition 142 are complete annular structures without gaps; and the third annular partition 143 includes a gap 1430, Both ends of the notch 1430 of the third annular partition 143 are respectively connected to two adjacent first annular partitions 141 in the first direction or the second direction.
  • the partition structure includes the above-mentioned first ring-shaped partition, the second ring-shaped partition and the third ring-shaped partition, the distance between adjacent ring-shaped partitions It may not be enough to provide a spacer; at this time, by providing a gap in the third annular partition, the display substrate can be provided with a spacer at the position of the gap; and, due to the two The ends are respectively connected to two first ring-shaped partitions adjacent in the first direction or the second direction, and the display substrate can better avoid crosstalk between adjacent sub-pixels.
  • the embodiments of the present disclosure include but are not limited thereto, and the third ring-shaped partition can also be a complete ring structure .
  • the light-emitting functional layer can be controlled by controlling the height, depth or other parameters of the ring-shaped partition structure. The conductive sublayer in is disconnected at the position where the ring-shaped partition structure is located, while the second electrode is not disconnected at the position where the ring-shaped partition structure is located.
  • the shape of the orthographic projection of the effective light emitting area of the subpixel 201 of the first color on the substrate 110 includes a rounded rectangle;
  • the shape of the orthographic projection on the substrate 110 includes a rounded rectangle;
  • the shape of the orthographic projection of the effective light emitting area of the third color sub-pixel 203 on the base substrate 110 includes a rounded rectangle.
  • the shape of the orthographic projection of the effective light-emitting area of the third-color subpixel 203 on the base substrate 110 includes a plurality of rounded corners, and the plurality of rounded corners includes a first rounded corner. 2031, the arc radius of the first rounded corner portion 2031 is larger than the arc radius of other rounded corner portions.
  • the spacer 170 is correspondingly disposed near the first rounded portion 2031, so that the area on the display substrate can be fully utilized and the pixel density can be increased.
  • the first rounded corner portion 2031 is the rounded corner portion with the smallest distance from the first color sub-pixel 201 among the plurality of rounded corner portions of the third color sub-pixel 203 .
  • the orthographic projection of the spacer 170 on the base substrate 110 is located on the line connecting the midpoint of the first rounded portion 2031 and the brightness center of the first color sub-pixel 201 .
  • the shape of the orthographic projection of the effective light-emitting area of the third-color subpixel 203 on the base substrate 110 includes a plurality of rounded corners, and the plurality of rounded corners includes a first rounded corner. 2031 and the second rounded portion 2032, the arc radius of the first rounded portion 2031 is greater than the arc radius of the second rounded portion 2031;
  • the shape of the orthographic projection is axisymmetric with respect to the line connecting the first rounded corner portion 2031 and the second rounded corner portion 2032 .
  • the shape of the orthographic projection of the effective light-emitting area of the first color sub-pixel 201 on the base substrate 110 also includes a plurality of rounded corners, and the arc radii of these rounded corners are equal. .
  • the shape of the orthographic projection of the effective light-emitting area of the second-color subpixel 202 on the base substrate 110 also includes a plurality of rounded corners, and the arc radii of these rounded corners are equal. .
  • the area of the orthographic projection of the effective light emitting area of the third color subpixel 203 on the base substrate 110 is larger than the area of the effective light emitting area of the first color subpixel 201 on the base substrate 110
  • the area of the orthographic projection: the area of the orthographic projection of the effective light-emitting area of the first color sub-pixel 201 on the base substrate 110 is larger than the area of the orthographic projection of the effective light-emitting area of the second-color sub-pixel 202 on the base substrate 110 .
  • the embodiments of the present disclosure include but are not limited thereto, and the area of the effective light-emitting region of each sub-pixel can be set according to actual needs.
  • a plurality of first color sub-pixels 201 and a plurality of third color sub-pixels 203 are arranged alternately along the first direction and the second direction to form a plurality of first pixel rows 310 and a plurality of a first pixel row 320
  • a plurality of second color sub-pixels 202 are arrayed along the first direction and the second direction to form a plurality of second pixel rows 330 and a plurality of second pixel columns 340
  • a plurality of first pixels The row 310 and the plurality of second pixel rows 330 are alternately arranged along the second direction and staggered from each other in the first direction
  • the plurality of first pixel columns 320 and the plurality of second pixel columns 340 are alternately arranged along the first direction and are arranged alternately in the second direction.
  • the partition structure 140 is located between the adjacent first color sub-pixel 201 and the third color sub-pixel 203, and/or, the partition structure 140 is located between the adjacent second color sub-pixel 202 and the third color sub-pixel 203, And/or, the isolation structure 140 is located between the adjacent sub-pixels 201 of the first color and the sub-pixels 202 of the second color.
  • the luminous efficiency of the sub-pixels of the third color is smaller than that of the sub-pixels of the second color.
  • the first color sub-pixel 201 is configured to emit red light
  • the second color sub-pixel 202 is configured to emit green light
  • the third color sub-pixel 203 is configured to emit blue light.
  • embodiments of the present disclosure include but are not limited thereto.
  • FIG. 6 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • a plurality of sub-pixels 200 includes a plurality of first color sub-pixels 201, a plurality of second color sub-pixels 202, and a plurality of third color sub-pixels 203; a plurality of first color sub-pixels 201 and a plurality of second color sub-pixels
  • the three-color sub-pixels 203 are alternately arranged along the first direction and the second direction to form a plurality of first pixel rows 310 and a plurality of first pixel columns 320, and a plurality of second-color sub-pixels 202 are arranged along the first direction and the second direction Arranged in an array to form a plurality of second pixel rows 330 and a plurality of second pixel columns 340, a plurality of first pixel rows 310 and a plurality of second pixel rows 330 are arranged alternately along the second direction and mutually in the first direction Sta
  • the partition structure 140 includes a plurality of first annular partitions 141, a plurality of second annular partitions 142 and a plurality of third annular partitions 143; each first annular partition 141 surrounds one of the second color sub-parts
  • the pixels 202 are arranged; each second ring-shaped partition 142 is arranged around a first-color sub-pixel 201 ; each third ring-shaped partition 143 is arranged around a third-color sub-pixel 203 .
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first ring-shaped partition 141 , the second ring-shaped partition 142 and the third ring-shaped partition 143 , the first annular partition 143
  • the ring-shaped partition 141 can separate the second color sub-pixel 202 from other sub-pixels, thereby avoiding crosstalk between the second-color sub-pixel and adjacent sub-pixels;
  • the second ring-shaped partition 142 can separate the first color
  • the sub-pixel 201 is separated from other sub-pixels, thereby avoiding crosstalk between the first color sub-pixel and adjacent sub-pixels;
  • the third annular partition 143 can separate the third color sub-pixel 203 from other sub-pixels, Therefore, crosstalk between the sub-pixels of the second color and adjacent sub-pixels can be avoided.
  • the first annular partition 141 includes at least one notch 1410
  • the second annular partition 142 includes at least one notch 1420
  • the third annular partition 143 includes at least one notch 1430 .
  • the notches of any two adjacent annular partitions in the first annular partition 141 , the second annular partition 142 and the third annular partition 143 are arranged in a dislocation manner, To ensure that there is at least an isolation structure between two adjacent sub-pixels, so that crosstalk between adjacent sub-pixels can be effectively avoided.
  • first color subpixels 201 and second color subpixels 202 charges propagate from the first color subpixel 201 to the shortest distance of the second color subpixel 202 .
  • the path is the position where the center line connecting the effective light emitting area of the first color sub-pixel 201 and the effective light emitting area of the second color sub-pixel 202 is located.
  • the gap 1410 of the first ring-shaped partition 141 outside the second color sub-pixel 202 and the gap 1420 of the second ring-shaped partition 142 outside the first color sub-pixel 201 cannot be located in the effective area of the first color sub-pixel 201 at the same time. On the line connecting the center of the light emitting area and the effective light emitting area of the second color sub-pixel 202 .
  • the notch 1420 of the second annular partition 142 and the effective light-emitting area of the first color sub-pixel 201 It is spaced apart from the line connecting the center of the effective light emitting area of the second color sub-pixel 202 . That is to say, the notch 1420 of the second annular partition 142 is not disposed on the center line between the effective light emitting area of the first color sub-pixel 201 and the effective light emitting area of the second color sub-pixel 202 .
  • a partition structure also needs to be provided on the center line between the effective light-emitting area of the third-color sub-pixel 203 and the effective light-emitting area of the second-color sub-pixel 202 . Therefore, the gap 1410 of the first ring-shaped partition 141 outside the third color sub-pixel 202 and the gap 1430 of the third ring-shaped partition 143 outside the third color sub-pixel 203 cannot be located in the effective area of the third-color sub-pixel 203 at the same time. On the line connecting the center of the light emitting area and the effective light emitting area of the second color sub-pixel 202 .
  • the notch 1420 of the second annular partition 142 and the effective light-emitting area of the third color sub-pixel 203 It is spaced apart from the line connecting the center of the effective light emitting area of the second color sub-pixel 202 . That is to say, the notch 1420 of the second annular partition 142 is not disposed on the center line between the effective light emitting area of the third color sub-pixel 203 and the effective light emitting area of the second color sub-pixel 202 .
  • At least one notch 1410 of the first annular partition 141 is offset in the third direction.
  • the third direction intersects the first direction and the second direction respectively, and is located on the same plane as the intersection with the first direction and the second direction; for example, the third direction may be the The extending direction of the line connecting the centers of the effective light-emitting area and the effective light-emitting area of the sub-pixel of the second color.
  • At least one notch 1410 of the first annular partition 141 in the first annular partition 141 and the third annular partition 143 adjacently arranged in the third direction Z, at least one notch 1410 of the first annular partition 141 are also offset in the third direction.
  • the shape of the orthographic projection of the effective light-emitting area of the second-color subpixel 202 on the base substrate 110 includes a rounded rectangle including four rounded corners; at this time, the first ring
  • the shape partition 141 includes four notches 1410 , and the four notches 1410 are respectively arranged corresponding to the four rounded corners of the effective light emitting area of the second color sub-pixel 202 .
  • the shape of the orthographic projection of the effective light-emitting area of the first color sub-pixel 201 on the base substrate includes a rounded rectangle with four sides; at this time, the second annular partition 142 includes four gaps 1420, and these four The four notches 1420 are respectively set corresponding to the four sides of the effective light-emitting area of the first color sub-pixel 201 .
  • the shape of the orthographic projection of the effective light-emitting area of the first color sub-pixel 203 on the base substrate includes a rounded rectangle with four sides; at this time, the third annular partition 143 includes four gaps 1430, and these four The four notches 1430 are respectively set corresponding to the four sides of the effective light emitting area of the third color sub-pixel 203 . In this way, the display substrate can ensure that the gaps of the ring-shaped partitions outside two adjacent sub-pixels are staggered, so as to ensure that there is at least a partition structure between two adjacent sub-pixels.
  • the display substrate 100 further includes a spacer 170 ; at this time, the ring-shaped partition near the spacer 170 is different from the ring-shaped partition at other positions.
  • the spacer 170 is surrounded by a first color sub-pixel 201, two second color sub-pixels 202 and a third color sub-pixel 203; the first color sub-pixel 201 and the third color sub-pixel 203 are respectively arranged on the spacer 170 along both sides of the second direction Y; two second color sub-pixels 202 are respectively disposed on both sides of the spacer 170 along the first direction X.
  • the position of the second annular partition 142 outside the first color sub-pixel 201 close to the spacer 170 includes a spacer gap 1425
  • the third ring-shaped partition 142 outside the third color sub-pixel 203 includes a spacer gap 1425
  • the position of the annular partition 143 close to the spacer 170 includes a spacer notch 1435 . Therefore, the display substrate can provide enough space for placing spacers. Moreover, since the spacer itself also has a certain partitioning effect, the gap in the above spacer will not cause crosstalk between the sub-pixels of the first color and the sub-pixels of the third color.
  • the third-shaped partition 143 is arranged at the above-mentioned spacer notch 1435 ;
  • the two first ring-shaped partitions 141 on both sides are not provided with gaps near the spacer 170 , so that crosstalk between adjacent sub-pixels can be effectively avoided.
  • the dimension of the spacer 170 in the second direction Y is greater than the dimension of the spacer 170 in the first direction X.
  • the shape of the orthographic projection of the effective light-emitting area of the third-color sub-pixel 203 on the base substrate 110 includes a plurality of rounded corners, and the rounded corners include a first rounded corner 2031, a first rounded corner 2031, and a first rounded corner 2031.
  • the arc radius of one rounded portion 2031 is larger than the arc radius of other rounded portions.
  • the spacer notch 1435 can be arranged near the first rounded portion 2031, so that Make full use of the area on the display substrate and increase the pixel density.
  • the first rounded corner portion 2031 is the rounded corner portion with the smallest distance from the first color sub-pixel 201 among the plurality of rounded corner portions of the third color sub-pixel 203 .
  • the shape of the orthographic projection of the effective light-emitting area of the third-color subpixel 203 on the base substrate 110 includes a plurality of rounded corners, and the plurality of rounded corners includes a first rounded corner 2031 and the second rounded portion 2032, the arc radius of the first rounded portion 2031 is greater than the arc radius of the second rounded portion 2031;
  • the shape of the orthographic projection is axisymmetric with respect to the line connecting the first rounded corner portion 2031 and the second rounded corner portion 2032 .
  • FIG. 7 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • the partition structure 140 includes a plurality of first annular partitions 141, a plurality of second annular partitions 142 and a plurality of third annular partitions 143; each first annular partition 141 surrounds a The second color sub-pixel 202 is arranged; each second ring-shaped partition 142 is arranged around a first-color sub-pixel 201; each third ring-shaped partition 143 is arranged around a third-color sub-pixel 203, so that the first color sub-pixel 203 can be avoided. Crosstalk between two color sub-pixels and adjacent sub-pixels.
  • the first annular partition 141 includes at least one notch 1410
  • the second annular partition 142 includes at least one notch 1420
  • the third annular partition 143 includes at least one notch 1430 .
  • the gaps of any two adjacent annular partitions in the first annular partition 141, the second annular partition 142, and the third annular partition 143 are misaligned to ensure that the gap between two adjacent sub-pixels At least there is an isolation structure, so that crosstalk between adjacent sub-pixels can be effectively avoided.
  • the notch 1410 of the first annular partition 141 is aligned with the gap 1410 of the first color sub-pixel 201
  • the effective light emitting area and the center line of the effective light emitting area of the second color sub-pixel 202 are arranged at intervals. That is to say, the notch 1410 of the first annular partition 141 is not disposed on the center line between the effective light emitting area of the first color sub-pixel 201 and the effective light emitting area of the second color sub-pixel 202 .
  • the effective light emitting area and the center line of the effective light emitting area of the second color sub-pixel 202 are arranged at intervals. That is to say, the notch 1430 of the third ring-shaped partition 143 is not disposed on the center line between the effective light-emitting area of the third-color sub-pixel 203 and the effective light-emitting area of the second-color sub-pixel 202 .
  • the shape of the orthographic projection of the effective light-emitting area of the second-color sub-pixel 202 on the base substrate 110 includes a rounded rectangle including four sides;
  • the partition portion 141 includes four notches 1410 , and the four notches 1410 are respectively arranged corresponding to the four sides of the effective light emitting area of the second color sub-pixel 202 .
  • the shape of the orthographic projection of the effective light-emitting area of the first color sub-pixel 201 on the substrate includes a rounded rectangle, which includes four rounded corners; at this time, the second annular partition 142 includes four gaps 1420, and this The four notches 1420 are respectively set corresponding to the four rounded corners of the effective light emitting area of the first color sub-pixel 201 .
  • the shape of the orthographic projection of the effective light-emitting area of the first color sub-pixel 203 on the substrate includes a rounded rectangle with four rounded corners; at this time, the third annular partition 143 includes four gaps 1430, and this The four notches 1430 are respectively set corresponding to the four rounded corners of the effective light emitting area of the third color sub-pixel 203 . In this way, the display substrate can ensure that the gaps of the ring-shaped partitions outside two adjacent sub-pixels are staggered, so as to ensure that there is at least a partition structure between two adjacent sub-pixels.
  • the display substrate 100 further includes a spacer 170 ; at this time, the ring-shaped partition near the spacer 170 is different from the ring-shaped partition at other positions.
  • the spacer 170 is surrounded by a first color sub-pixel 201, two second color sub-pixels 202 and a third color sub-pixel 203; the first color sub-pixel 201 and the third color sub-pixel 203 are respectively arranged on the spacer 170 along both sides of the second direction Y; two second color sub-pixels 202 are respectively disposed on both sides of the spacer 170 along the first direction X.
  • the position of the second annular partition 142 outside the first color sub-pixel 201 close to the spacer 170 includes a spacer notch 1425 , and the position where the spacer notch 1425 is located is not provided.
  • Isolation structure; spacer notch 1425 extends from the interval between the first color sub-pixel 201 and a second color sub-pixel 202, through the interval between the first color sub-pixel 201 and the spacer 170, to the first The interval between a color sub-pixel 201 and another second color sub-pixel 202 . That is to say, the second ring-shaped partition 142 outside the first color sub-pixel 201 near the spacer further includes two strip-shaped partitions.
  • the position of the third annular partition 143 outside the third color sub-pixel 203 close to the spacer 170 includes a spacer notch 1435, and no partition structure is provided at the position where the spacer notch 1435 is located; the spacer notch 1435 extends from the third The interval between the color sub-pixel 203 and a second-color sub-pixel 202 extends to the third-color sub-pixel 203 and another second-color sub-pixel through the interval between the third-color sub-pixel 203 and the spacer 170. spacing between pixels 202 . That is to say, the third ring-shaped partition 143 outside the third-color sub-pixel 203 near the spacer only includes two strip-shaped partitions. Therefore, the display substrate can provide enough space for placing spacers. Moreover, since the spacer itself also has a certain partitioning effect, the gap in the above-mentioned spacer will not cause crosstalk between the sub-pixels of the first color and the sub-pixels of the third color.
  • the third-shaped partition 143 is arranged at the above-mentioned spacer notch 1435 ;
  • the two first ring-shaped partitions 141 on both sides are not provided with gaps near the spacer 170 , so that crosstalk between adjacent sub-pixels can be effectively avoided.
  • the dimension of the spacer 170 in the second direction Y is greater than the dimension of the spacer 170 in the first direction X.
  • FIG. 8 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • a plurality of sub-pixels 200 includes a plurality of first color sub-pixels 201, a plurality of second color sub-pixels 202 and a plurality of third color sub-pixels 203;
  • the partition structure 140 includes a third strip-shaped partition 147 and The fourth strip-shaped partition 148;
  • the third strip-shaped partition 147 is located between the adjacent first color sub-pixel 201 and the second color sub-pixel 202;
  • the fourth strip-shaped partition 148 is located between the adjacent third color sub-pixel between the pixel 203 and the second color sub-pixel 202 .
  • the extension direction of the third strip partition 147 is connected to the center of the effective light emitting area of the adjacent first color sub-pixel 201 and the effective light emitting area of the second color sub-pixel 202.
  • the extension direction of the fourth strip-shaped partition 148 is perpendicular to the center line connecting the effective light-emitting areas of the adjacent third-color sub-pixels 203 and the effective light-emitting areas of the second-color sub-pixels 202 .
  • the orthographic projection of the effective light-emitting area of the sub-pixel 201 of the first color on the base substrate 110 is a rounded rectangle, and the size of the third strip-shaped partition 147 in its extending direction ( That is, the length) is 0.8-1 times the side length of the effective light emitting area of the first color sub-pixel 201 .
  • the orthographic projection of the effective light-emitting area of the sub-pixel 201 of the third color on the base substrate 110 is a rounded rectangle, and the dimension of the fourth strip-shaped partition 148 in its extending direction ( That is, the length) is 0.8-1 times the side length of the effective light emitting area of the third color sub-pixel 203 .
  • the display substrate 100 further includes a spacer 170 ; at this time, the isolation structure near the spacer 170 is different from the isolation structures at other positions.
  • the spacer 170 is surrounded by a first color sub-pixel 201, two second color sub-pixels 202 and a third color sub-pixel 203; the first color sub-pixel 201 and the third color sub-pixel 203 are respectively arranged on the spacer 170 along both sides of the second direction Y; two second color sub-pixels 202 are respectively disposed on both sides of the spacer 170 along the first direction X.
  • the partition structure 140 includes an arc-shaped partition 149, and the arc-shaped partition 149 is located between the second color sub-pixel 202 and the spacer 170; and, the arc-shaped partition 149 149 extends from the interval between the second color sub-pixel 202 and the third color sub-pixel 203 to the interval between the second color sub-pixel 202 and the first color sub-pixel 201; One end is located between the second color sub-pixel 202 and the third color sub-pixel 203, which can function as the fourth strip partition 148; the other end of the arc-shaped partition 149 is located between the second color sub-pixel 202 and the first Between the color sub-pixels 201 , the third strip-shaped partition 147 can be used; the middle part of the arc-shaped partition 149 is located between the second-color sub-pixel 202 and the spacer 170 .
  • FIG. 9 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • a plurality of sub-pixels 200 includes a plurality of first color sub-pixels 201, a plurality of second color sub-pixels 202, and a plurality of third color sub-pixels 203;
  • the partition structure 140 includes a plurality of first ring-shaped partitions 141, a plurality of second annular partitions 142 and a plurality of third annular partitions 143; each first annular partition 141 is arranged around two adjacent second color sub-pixels 202; each second annular partition The part 142 is arranged around a sub-pixel 201 of the first color; each third annular partition part 143 is arranged around a sub-pixel 203 of the third color.
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first annular partition 141, the second annular partition 142, and the third annular partition 143, and the first annular partition 141 can Two adjacent second color sub-pixels 202 are separated from other sub-pixels, so as to avoid crosstalk between the second color sub-pixels and adjacent sub-pixels; the first annular partition 141 can separate the first color sub-pixels 201 is separated from other sub-pixels, so as to avoid crosstalk between the first color sub-pixel and adjacent sub-pixels; the third annular partition 143 can separate the third-color sub-pixel 203 from other sub-pixels, so that Crosstalk between the second color sub-pixel and adjacent sub-pixels is avoided.
  • FIG. 9 there are two annular partitions between any two adjacent sub-pixels 200 , so that crosstalk between adjacent sub-pixels can be further avoided.
  • a plurality of sub-pixels 200 are divided into a plurality of sub-pixel groups 350, and each sub-pixel group 350 includes a first-color sub-pixel 201, two second-color sub-pixels 202, and a third-color sub-pixel 202.
  • the above-mentioned concept of pixel group is only used to describe the pixel arrangement structure of multiple sub-pixels, and does not limit one pixel group to display one pixel point or be driven by the same gate line.
  • four sub-pixels in the dotted box 360 may be driven by the same gate line.
  • the embodiments of the present disclosure include but are not limited thereto, and the driving of the sub-pixels may be set according to actual needs.
  • FIG. 10 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • the plurality of sub-pixels 200 includes a plurality of first-color sub-pixels 201, a plurality of second-color sub-pixels 202, and a plurality of third-color sub-pixels 203.
  • the partition structure 140 includes a plurality of first annular partitions 141, a plurality of second annular partitions 142 and a plurality of third annular partitions 143; each first annular partition 141 surrounds two adjacent second The color sub-pixels 202 are arranged; each second ring-shaped partition 142 is arranged around a first-color sub-pixel 201 ; each third ring-shaped partition 143 is arranged around a third-color sub-pixel 203 .
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first annular partition 141, the second annular partition 142, and the third annular partition 143, and the first annular partition 141 can Two adjacent second color sub-pixels 202 are separated from other sub-pixels, so as to avoid crosstalk between the second color sub-pixels and adjacent sub-pixels; the first annular partition 141 can separate the first color sub-pixels 201 is separated from other sub-pixels, so as to avoid crosstalk between the first color sub-pixel and adjacent sub-pixels; the third annular partition 143 can separate the third-color sub-pixel 203 from other sub-pixels, so that Crosstalk between the second color sub-pixel and adjacent sub-pixels is avoided.
  • any two adjacent annular partitions among the plurality of first annular partitions 141 , the plurality of second annular partitions 142 and the plurality of third annular partitions 143 part share a partition edge part. Therefore, only one partition structure is provided between two adjacent sub-pixels, so that the width of the interval between two adjacent sub-pixels can be reduced to increase the pixel density.
  • FIG. 11 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • a plurality of sub-pixels 200 includes a plurality of first color sub-pixels 201, a plurality of second color sub-pixels 202, and a plurality of third color sub-pixels 203;
  • the partition structure 140 includes a plurality of first ring-shaped partitions 141 and a plurality of second ring-shaped partitions 142 , each first ring-shaped partition 141 is arranged around a sub-pixel 202 of the second color, and each second ring-shaped partition 142 is arranged around a sub-pixel 201 of the first color.
  • the partition structure 140 includes a plurality of first annular partitions 141, a plurality of second annular partitions 142 and a plurality of third annular partitions 143;
  • Each partition 141 is arranged around one second color sub-pixel 202;
  • each second ring-shaped partition 142 is arranged around a first-color sub-pixel 201;
  • each third ring-shaped partition 143 is arranged around a third-color sub-pixel 203 .
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first annular partition 141, the second annular partition 142, and the third annular partition 143, and the first annular partition 141 can
  • the second color sub-pixel 202 is separated from other sub-pixels, so that crosstalk between the second color sub-pixel and adjacent sub-pixels can be avoided;
  • the first annular partition 141 can separate the first color sub-pixel 201 from other sub-pixels
  • the third ring-shaped partition 143 can separate the third color sub-pixel 203 from other sub-pixels, thereby avoiding the crosstalk between the second color sub-pixel 203 and the adjacent sub-pixel. Crosstalk between a pixel and adjacent subpixels.
  • FIG. 11 there are two annular partitions between any two adjacent sub-pixels 200 , so that crosstalk between adjacent sub-pixels can be further avoided.
  • a plurality of sub-pixels 200 are divided into a plurality of sub-pixel groups 350, each sub-pixel group 350 includes a first color sub-pixel 201, a second color sub-pixel 202 and a third color sub-pixel Pixel 203; in each sub-pixel group 350, the first color sub-pixel 201 or the second color sub-pixel 202 and the third color sub-pixel 203 are arranged along the first direction, the first color sub-pixel 201 and the second color sub-pixel 202 aligned along the second direction.
  • FIG. 12 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure.
  • a plurality of sub-pixels 200 includes a plurality of first color sub-pixels 201, a plurality of second color sub-pixels 202, and a plurality of third color sub-pixels 203;
  • the partition structure 140 includes a plurality of first ring-shaped partitions 141 and a plurality of second ring-shaped partitions 142; a plurality of first ring-shaped partitions 141 are set in one-to-one correspondence with a plurality of second color sub-pixels 202, and each first ring-shaped partition 141 surrounds one of the second color sub-pixels
  • the sub-pixels 202 are arranged; a plurality of second ring-shaped partitions 142 are arranged in one-to-one correspondence with a plurality of first-color sub-pixels 201 , and each second ring-shaped partition 142 is arranged around one first-color sub-pixel 201 .
  • the charge generation layer 129 in the light-emitting functional layer 120 can be disconnected at the first ring-shaped partition 141, the second ring-shaped partition 142, and the third ring-shaped partition 143, and the first ring-shaped partition 141 can separate
  • the second color sub-pixel 202 is separated from other sub-pixels, so that crosstalk between the second color sub-pixel and adjacent sub-pixels can be avoided;
  • the first annular partition 141 can separate the first color sub-pixel 201 from other sub-pixels
  • the third ring-shaped partition 143 can separate the third color sub-pixel 203 from other sub-pixels, thereby avoiding the crosstalk between the second color sub-pixel 203 and the adjacent sub-pixel. Crosstalk between a pixel and adjacent subpixels.
  • a plurality of sub-pixels 200 are divided into a plurality of sub-pixel groups 350, each sub-pixel group 350 includes a first color sub-pixel 201, a second color sub-pixel 202 and a third color sub-pixel Pixel 203; in each sub-pixel group 350, the first color sub-pixel 201 or the second color sub-pixel 202 and the third color sub-pixel 203 are arranged along the first direction, the first color sub-pixel 201 and the second color sub-pixel 202 aligned along the second direction.
  • the first annular partition 141 includes at least one notch 1410
  • the second annular partition 142 includes at least one notch 1420; at this time, the partition structure 140 also includes a plurality of L-shaped partitions 146 , a plurality of L-shaped partitions 146 are arranged in one-to-one correspondence with a plurality of third-color sub-pixels 203 , and each L-shaped partition 146 is arranged around one third-color sub-pixel 203 .
  • the L-shaped partition 146 is connected to the gap 1410 on the first annular partition 141 close to the sub-pixel 203 of the third color and the gap 1420 on the second circular partition 142 close to the sub-pixel 203 of the third color.
  • the orthographic projection of the L-shaped partition 146 on the reference straight line extending along the second direction Y is respectively on the reference straight line with the notch 1410 on the first annular partition 141 close to the third color sub-pixel 20
  • the orthographic projection on the reference line overlaps with the orthographic projection of the notch 1420 on the second annular partition 142 close to the third color sub-pixel 203 on the reference line.
  • FIG. 13 is a schematic partial cross-sectional view of a display substrate provided by an embodiment of the present disclosure.
  • the partition structure 140 includes a groove 1401 and a shielding portion 1402; the shielding portion 1402 is located at the edge of the groove 1401 and protrudes into the groove 1401 to form a protrusion 1403 covering a part of the opening of the groove 1401, The conductive sublayer 129 of the light emitting functional layer 120 is disconnected at the protruding portion 1403 of the shielding portion 1402 .
  • the shielding portion 1402 protrudes into the groove 1401 relative to the edge of the groove 1401 to form a protrusion 1403; at this time, the protrusion 1403 of the shielding portion 1402 is suspended, and the protrusion 1403 blocks the groove 1401 edge portion of the opening.
  • shielding portions 1402 are respectively provided on two edges of the groove 1401 in the arrangement direction of two adjacent sub-pixels 200 .
  • the second electrode 132 is disconnected where the isolation structure 140 is located.
  • the display substrate 100 further includes a planar layer 180; the groove 1401 is disposed in the planar layer 180; the part of the shielding portion 1402 except the protruding portion 1403 can be located in the planar layer 180 and the pixel Defined between layers 150 .
  • the ratio of the size of the protruding portion 1403 of the shielding portion 1402 protruding into the groove 1401 to the size of the shielding portion 1402 may be 0.1-0.5.
  • the ratio of the size of the protruding portion 310 of the shielding portion 1402 protruding into the groove 1401 to the size of the shielding portion 1402 may be 0.2-0.4.
  • the size of the protruding portion 1403 of the shielding portion 1402 protruding into the groove 1401 is not less than 0.1 micron.
  • the size of the protruding portion 1403 of the shielding portion 1402 protruding into the groove 1401 is not less than 0.2 microns.
  • the distance between two shielding parts 1402 between adjacent sub-pixels may be 2-15 microns.
  • the distance between two shielding parts 1402 between adjacent sub-pixels may be 5-10 microns.
  • the distance between two shielding parts 1402 between adjacent sub-pixels may be 3-7 microns.
  • the distance between two shielding parts 1402 between adjacent sub-pixels may be 4-12 microns.
  • the part of the shielding part 1402 except the protruding part 1403 is attached to the surface of the flat layer 180 away from the base substrate 110 .
  • the material of the shielding portion 1402 may be the same as that of the first electrode 131 and be located in the same film layer.
  • the shielding portion 1402 can be formed together in the process of patterning the first electrode 131 , thereby saving masking process.
  • the embodiments of the present disclosure include but are not limited thereto, and the shielding part can also be made of other materials, such as inorganic materials.
  • the material of the flat layer 180 can be an organic material, such as one or more of resin, acrylic or polyethylene terephthalate, polyimide, polyamide, polycarbonate, epoxy resin, etc. combinations etc.
  • other film layers are provided between the flat layer 180 and the base substrate 110, and these other film layers may include a gate insulating layer, an interlayer insulating layer, a pixel circuit (such as a structure including a thin film transistor, a storage capacitor, etc. ) in each film layer, data line, gate line, power signal line, reset power signal line, reset control signal line, light emission control signal line and other film layers or structures.
  • a gate insulating layer such as a structure including a thin film transistor, a storage capacitor, etc.
  • a pixel circuit such as a structure including a thin film transistor, a storage capacitor, etc.
  • FIG. 14 is a schematic diagram of a display device provided by an embodiment of the present disclosure.
  • the display device 500 further includes a display substrate 100 .
  • an isolation structure is provided between adjacent sub-pixels, and the charge generation layer in the light-emitting functional layer is disconnected at the position where the isolation structure is located, so as to prevent the charge generation layer with higher conductivity from causing damage to adjacent sub-pixels. crosstalk between. Therefore, the display device including the display substrate can also avoid crosstalk between adjacent sub-pixels, thus having a higher product yield and higher display quality.
  • the display substrate can increase the pixel density while adopting a double-layer light-emitting (Tandem EL) design. Therefore, the display device including the display substrate has the advantages of long life, low power consumption, high brightness, high resolution and the like.
  • the display device can be a display device such as an organic light-emitting diode display device, and any product or component with a display function such as a TV, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, etc. that include the display device. Examples are not limited to this.
  • FIG. 15 is a schematic plan view of another display substrate provided by an embodiment of the present disclosure
  • FIG. 16 is a schematic cross-sectional view of a display substrate provided by an embodiment of the present disclosure along line EF in FIG. 15 .
  • the display substrate 100 includes a base substrate 110 and a plurality of sub-pixels 200 located on the base substrate 110; a plurality of sub-pixels 200 are arrayed on the base substrate 110, and each sub-pixel 200 includes a light emitting element 210 and a pixel driving circuit 250 for driving the light emitting element 210 to emit light.
  • Each light-emitting element 210 includes a light-emitting functional layer, a first electrode, and a second electrode; the light-emitting functional layer may include multiple sub-functional layers, and the multiple sub-functional layers may include a charge generation layer with relatively high conductivity. It should be noted that for the cross-sectional structure of the light emitting element, reference may be made to the relevant description of FIG. 2 , which will not be repeated here.
  • the pixel driving circuit 250 can be electrically connected with the first electrode 131 in the correspondingly arranged light-emitting element 210 , so as to drive the light-emitting element 210 to emit light.
  • the first electrode 131 can be an anode
  • the second electrode 132 can be a cathode; multiple sub-pixels 200 can share one second electrode 132 , that is, multiple sub-pixels 200 can share one cathode.
  • the cathode can be formed of a material with high conductivity and low work function, for example, the cathode can be made of a metal material.
  • the anode may be formed of a transparent conductive material having a high work function.
  • the display substrate 100 also includes an isolation structure 140, which is located on the base substrate 110 and between adjacent sub-pixels 200; thus, the charges in the light-emitting functional layer 120 The generation layer 129 is broken where the partition structure 140 is located.
  • a plurality of sub-pixels 200 includes a plurality of first color sub-pixels 201, a plurality of second color sub-pixels 202, and a plurality of third color sub-pixels 203
  • the partition structure 140 includes a plurality of ring-shaped partitions 1400, and each ring-shaped partition 1400 Surround one of a first color sub-pixel 201, a second color sub-pixel 202, and a third color sub-pixel 203; that is, each annular partition 1400 surrounds a first color sub-pixel 201, a second color sub-pixel A sub-pixel 202, or a sub-pixel 203 of a third color.
  • the above-mentioned annular partition part may be a closed ring or a non-closed ring, such as a ring including at least one gap.
  • the isolation structure is provided between adjacent sub-pixels, and the charge generation layer in the light-emitting functional layer is disconnected at the location of the isolation structure, so as to avoid the high conductivity.
  • the charge generation layer causes crosstalk between adjacent subpixels.
  • the partition structure includes a plurality of ring-shaped partitions, and each ring-shaped partition surrounds a sub-pixel of the first color, a sub-pixel of the second color or a sub-pixel of the third color, the partition structure can The isolation part can realize the isolation of most adjacent sub-pixels, thereby avoiding crosstalk between adjacent sub-pixels.
  • the display substrate can avoid crosstalk between adjacent sub-pixels through the isolation structure, the display substrate can increase pixel density while adopting a double-layer light emitting (Tandem EL) design. Therefore, the display substrate can have the advantages of long life, low power consumption, high brightness, and high resolution.
  • Tandem EL double-layer light emitting
  • the number of sub-pixels 202 of the second color is greater than the number of sub-pixels 201 of the first color; or, the number of sub-pixels 202 of the second color is greater than the number of sub-pixels of the first color
  • the number of sub-pixels 203 of three colors; or, the number of sub-pixels 202 of the second color is greater than the number of sub-pixels 201 of the first color and the number of sub-pixels 203 of the third color.
  • first ring-shaped pixel partitioning portion 141A outside the small number of first color sub-pixels 201 and the second ring-shaped pixel partitioning portion 142B outside the small number of third color sub-pixels 203, it is possible to Most adjacent sub-pixels on the display substrate are separated, thereby effectively avoiding crosstalk between adjacent sub-pixels.
  • the number of sub-pixels 202 of the second color is roughly twice the number of sub-pixels 201 of the first color or the number of sub-pixels 203 of the third color.
  • the partition structure 140 also does not need to be provided with a strip-shaped partition as shown in FIG. and separate adjacent sub-pixels of the first color and sub-pixels of the third color.
  • the light-emitting functional layer includes a first light-emitting layer and a second light-emitting layer located on both sides of the conductive sublayer in a direction perpendicular to the base substrate, and the conductive sublayer is a charge generation layer.
  • the display substrate can implement a double-layer light-emitting (Tandem EL) design, so it has the advantages of long life, low power consumption, and high brightness. It should be noted that, for the cross-sectional structure of the light-emitting functional layer, reference may be made to the related description of FIG. 2 , which will not be repeated here.
  • the conductivity of the conductive sublayer 129 is greater than the conductivity of the first light emitting layer 121 and the second light emitting layer 122 , and is less than that of the second electrode 132 .
  • the first light emitting layer 121 is located on the side of the conductive sublayer 129 close to the base substrate 110 ; the second light emitting layer 122 is located on the side of the conductive sublayer 129 away from the base substrate 110 .
  • the multiple annular partitions 1400 include multiple first circular pixel partitions 141A and multiple second circular pixel partitions 142A, and the multiple first circular pixel partitions 1400
  • the pixel partition part 141A is set correspondingly to the multiple first color sub-pixels 201
  • the multiple second ring-shaped pixel partition parts 142A are correspondingly set up to the multiple third-color sub-pixels 203; each first ring-shaped pixel partition part 141A surrounds a first color sub-pixel In a sub-pixel 201 of one color
  • each second ring-shaped pixel 142A is surrounded by a partition portion of a sub-pixel 203 of a third color.
  • the plurality of first ring-shaped pixel partitions 141A can separate the plurality of first-color sub-pixels 201 from other adjacent sub-pixels, and the plurality of second ring-shaped pixel partitions 142 can separate the plurality of third-color sub-pixels.
  • the sub-pixel 203 is separated from other adjacent sub-pixels, so that the display substrate can effectively avoid crosstalk between adjacent sub-pixels.
  • the partition structure 140 between adjacent first-color sub-pixels 201 and second-color sub-pixels 202 only includes the first ring-shaped pixel partition 141A.
  • the partition structure 140 between the adjacent third-color sub-pixel 203 and the second-color sub-pixel 202 only includes the second annular pixel partition 142A.
  • the display substrate can effectively isolate the charge generation layer of adjacent sub-pixels through the above-mentioned isolation structure, and at the same time maximize the continuity of the second electrode, thereby facilitating the transmission of cathode signals.
  • the first annular pixel partition 141A includes a notch 1410A, and the notch 1410A is located on the extension line of the diagonal of the effective light emitting area of the first color sub-pixel 201 .
  • the first electrode 131 of the first color sub-pixel 201 includes a first body part 1311A and a first connection part 1311B, the first connection part 1311B is connected to the first body part 1311A, and is configured to be connected to the pixel driving circuit 250; the first The connection portion 1311B is located at the position where the notch 1410A of the first ring-shaped pixel isolation portion 141A is located.
  • the notch of the first ring-shaped pixel isolating part can be used to provide a first connecting part, and the first connecting part is used to connect with a corresponding pixel driving circuit.
  • the space between the opposite edges of the effective light-emitting areas of adjacent sub-pixels is small, and the space between the opposite corners of the effective light-emitting areas of adjacent sub-pixels
  • the space of the display substrate is relatively large, and the display substrate can make full use of the effective light-emitting areas of the adjacent sub-pixels by setting the gap of the first ring-shaped pixel partition on the extension line of the diagonal of the effective light-emitting area of the first color sub-pixel The space between the opposite corners.
  • the display substrate can increase the pixel arrangement density while avoiding crosstalk between adjacent sub-pixels through the above arrangement.
  • the first connecting portion 1311B is located on the extension line of the diagonal of the first main body portion 1311A, that is, the first connecting portion 1311B extends from a corner of the first main body portion 1311A. Protrude outward.
  • the first notches 1410A are arranged in an array, forming a first notch row and a first notch column along the first direction X and the second direction Y; the first notch row extends along the first direction, The first notch column extends along the second direction; the second notch 1420A is arranged in an array, forming a second notch row and a second notch column along the first direction X and the second direction Y; the first notch row extends along the first direction X, The first notch row extends along the second direction Y; the first notch row and the second notch row are roughly parallel, and the first notch row and the second notch row are roughly parallel.
  • the first notch row is located between the first color sub-pixel 201 and the third color sub-pixel 203
  • the second notch row is located between the first color sub-pixel 201 and the third color sub-pixel 203. between.
  • the shape of the orthographic projection of the first main body portion 1311A on the base substrate 110 includes a rounded rectangle, and the first connecting portion 1311B starts from a rounded corner of the first main body portion 1311A. It protrudes outward along the extending direction of the diagonal of the rounded rectangle.
  • the second annular pixel partition 142A includes a notch 1420A, and the notch 1420A is located on the extension line of the diagonal of the effective light emitting area of the third color sub-pixel 203 .
  • the first electrode 131 of the third color sub-pixel 203 includes a second body part 1312A and a second connection part 1312B, the second connection part 1312B is connected to the second body part 1312A, and is configured to be connected to the pixel driving circuit 250; the first The connecting portion 1312B is located at the position where the notch 1420A of the first annular pixel isolating portion 142A is located.
  • the gap of the second ring-shaped pixel isolating part can be used to provide a second connecting part, and the second connecting part is used to connect with a corresponding pixel driving circuit.
  • the pixel density of the display substrate is high and the sub-pixels are closely arranged, the space between the opposite edges of the effective light-emitting areas of adjacent sub-pixels is small, and the space between the opposite corners of the effective light-emitting areas of adjacent sub-pixels
  • the space of the display substrate is relatively large, and the display substrate can make full use of the effective light-emitting area of the adjacent sub-pixel by setting the gap of the second ring-shaped pixel partition on the extension line of the diagonal of the effective light-emitting area of the third-color sub-pixel The space between the opposite corners.
  • the display substrate can increase the pixel arrangement density while avoiding crosstalk between adjacent sub-pixels through the above arrangement.
  • the second connecting portion 1312B is located on the extension line of the diagonal of the second main body portion 1312A, that is, the second connecting portion 1312B extends from a corner of the second main body portion 1312A. Protrude outward.
  • the shape of the orthographic projection of the second main body portion 1312A on the base substrate 110 includes a rounded rectangle, and the second connecting portion 1312B is formed from a rounded corner of the second main body portion 1312A. It protrudes outward along the extending direction of the diagonal of the rounded rectangle.
  • the direction in which the first connection portion 1311B protrudes from the first body portion 1311A is the same as the direction in which the second connection portion 1312B protrudes from the second body portion 1312A.
  • the first electrode 131 of the second color sub-pixel 202 includes a third body portion 1313A and a third connection portion 1313B, and the third connection portion 1313B is connected to the third body portion 1313A. , and is configured to be connected to the pixel driving circuit 250 .
  • the third connecting portion 1313B is located on the extension line of the diagonal of the third main body portion 1313A, that is, the third connecting portion 1313B extends from a corner of the third main body portion 1313A. Protrude outward.
  • the display substrate 100 further includes a pixel defining layer 150 on the base substrate 110; the pixel defining layer 150 is partially located on the side of the first electrode 131 away from the base substrate 110
  • the pixel defining layer 150 includes a plurality of pixel openings 152 and pixel spacing openings 154; the plurality of pixel openings 152 correspond to the plurality of sub-pixels 200 to define the effective light-emitting areas of the plurality of sub-pixels 200; the pixel openings 152 are configured to expose the first electrode 131 so that the first electrode 131 is in contact with the subsequently formed light-emitting functional layer 120 .
  • the pixel spacing opening 154 is located between adjacent first electrodes 131, and at least part of the isolation structure 140 is located between the pixel defining layer 150 and the base substrate 110, that is, at least part of the isolation structure 140 is covered by the pixel defining layer 150 .
  • the charge generation layer in the light-emitting functional layer is only disconnected once at the position where the partition structure is located outside the pixel defining layer;
  • the second electrode is only disconnected once at the position where the partition structure is located outside the pixel defining layer, and not disconnected twice at both sides of the partition structure in the direction in which adjacent sub-pixels are arranged. Therefore, the continuity of the second electrode can be better maintained, so that the cathodic quote can be better delivered.
  • the second electrode is only disconnected once at the position where the partition structure is located outside the pixel defining layer, and the second electrode can also reduce or even avoid the formation of the tip structure, thereby avoiding the tip discharge phenomenon.
  • the above-mentioned arrangement direction of the adjacent sub-pixels may be the extending direction of the line connecting the brightness centers of the effective light-emitting regions of the adjacent sub-pixels.
  • one edge of the partition structure 140 in the arrangement direction is located between the pixel defining layer 150 and the base substrate 110 , while the other One side edge is located in the pixel interval opening 154 .
  • the second electrode is only disconnected once at the edge of the partition structure located in the opening of the pixel interval, and not disconnected twice at both sides of the partition structure along the direction in which adjacent sub-pixels are arranged. Therefore, the continuity of the second electrode can be better maintained, so that the cathodic quote can be better delivered.
  • one side of the partition structure 140 in the arrangement direction includes a partition surface 1490 , and the partition surface 1490 is in contact with the plane where the base substrate 110 is located.
  • the value range of the included angle is 80-100 degrees.
  • the partition surface can effectively disconnect the charge generation layer.
  • the isolation structure provided by the embodiments of the present disclosure may also adopt other structures, as long as the charge generation layer can be disconnected.
  • the value range of the size of the isolation structure 140 in the direction perpendicular to the base substrate 110 is of course, the embodiments of the present disclosure include but are not limited thereto, and the size of the isolation structure in a direction perpendicular to the base substrate can be set according to actual conditions.
  • the material of the pixel defining layer may include organic materials such as polyimide, acrylic or polyethylene terephthalate.
  • a plurality of first color sub-pixels 201 and a plurality of third color sub-pixels 203 are alternately arranged along the first direction and the second direction to form a plurality of first pixel rows 310 and a plurality of a first pixel row 320
  • a plurality of second color sub-pixels 202 are arrayed along the first direction and the second direction to form a plurality of second pixel rows 330 and a plurality of second pixel columns 340
  • a plurality of first pixels The row 310 and the plurality of second pixel rows 330 are alternately arranged along the second direction and staggered from each other in the first direction
  • the plurality of first pixel columns 320 and the plurality of second pixel columns 340 are alternately arranged along the first direction and are arranged alternately in the second direction.
  • the partition structure 140 is located between the adjacent first color sub-pixel 201 and the third color sub-pixel 203, and/or, the partition structure 140 is located between the adjacent second color sub-pixel 202 and the third color sub-pixel 203, And/or, the isolation structure 140 is located between the adjacent sub-pixels 201 of the first color and the sub-pixels 202 of the second color.
  • the luminous efficiency of the sub-pixels of the third color is smaller than that of the sub-pixels of the second color.
  • the first color sub-pixel 201 is configured to emit red light
  • the second color sub-pixel 202 is configured to emit green light
  • the third color sub-pixel 203 is configured to emit blue light.
  • embodiments of the present disclosure include but are not limited thereto.
  • the area of the orthographic projection of the effective light emitting area of the third color subpixel 203 on the base substrate 110 is larger than the area of the effective light emitting area of the first color subpixel 201 on the base substrate 110
  • the area of the orthographic projection: the area of the orthographic projection of the effective light-emitting area of the first color sub-pixel 201 on the base substrate 110 is larger than the area of the orthographic projection of the effective light-emitting area of the second-color sub-pixel 202 on the base substrate 110 .
  • the embodiments of the present disclosure include but are not limited thereto, and the area of the effective light-emitting region of each sub-pixel can be set according to actual needs.
  • the display substrate 100 further includes a planar layer 180 , a plurality of data lines 191 and a plurality of power lines 192 ; side, that is, the first electrode 131 is disposed on the side of the planar layer 180 away from the base substrate 110; a plurality of data lines 191 are located between the planar layer 180 and the base substrate 110, and the plurality of data lines 191 extend along the first direction and along the Arranged in the second direction, the first direction and the second direction intersect; a plurality of power lines 192 are located between the flat layer 180 and the base substrate 110, and the plurality of power lines 192 extend along the first direction and are arranged along the second direction; In the direction of the base substrate 110 , the isolation structure 140 overlaps with at least one of the data line 191 and the power line 192 .
  • a plurality of data lines 191 and a plurality of power lines 192 are arranged alternately.
  • FIG. 17A is a schematic partial cross-sectional view of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate 100 further includes a flat layer 180 and a protective structure 270; the flat layer 180 is located between the base substrate 110 and the first electrode 131; the protective structure 270 is located between the flat layer 180 and the first electrode 131 .
  • the isolation structure is formed after the flat layer is formed, and an etching process is required; although the etching process is selective, the etching process still has an adverse effect on the flatness of the flat layer, thus As a result, the flatness of the first electrode formed on the flat layer is poor, thereby affecting the display effect.
  • the display substrate shown in FIG. 17A protects the flat layer under the first electrode during the etching process of the isolation structure by forming a protective structure between the flat layer and the first electrode, so as to ensure that the second electrode is not etched.
  • the flatness of the flat layer under the first electrode can ensure the flatness of the first electrode and improve the display quality.
  • the protective structure 270 and the isolation structure 140 are provided on the same layer. Therefore, when the protective structure 270 is formed, the protective structure 270 can protect the flat layer under the first electrode from being etch. In addition, the protection structure does not need to add an additional film layer or mask process, thereby reducing the cost.
  • the protection structure and the isolation structure are formed using the same material and undergoing the same patterning process.
  • the orthographic projection of the first electrode 131 on the base substrate 110 falls within the orthographic projection of the protection structure 270 on the base substrate 110 .
  • the protection structure 270 can fully protect the planar layer under the first electrode, thereby ensuring the planarity of the entire first electrode.
  • FIG. 17B is a cross-sectional electron microscope view of a display substrate provided by an embodiment of the present disclosure.
  • one edge of the partition structure 140 in the arrangement direction is located between the pixel defining layer 150 and the base substrate 110 , while the other edge is located at the pixel spacing opening. among.
  • one side edge of the partition structure can function as a partition, while the other side edge is covered by the pixel defining layer.
  • the second electrode is also only disconnected once at the edge of the partition structure located in the opening of the pixel interval, and not disconnected twice at both sides of the partition structure in the direction in which adjacent sub-pixels are arranged. As a result, the continuity of the second electrode can be better maintained, so that the cathodic signal can be better transmitted.
  • FIG. 18 is a schematic diagram of a display device provided by an embodiment of the present disclosure.
  • the display device 500 further includes a display substrate 100 .
  • an isolation structure is provided between adjacent sub-pixels, and the charge generation layer in the light-emitting functional layer is disconnected at the position where the isolation structure is located, so as to prevent the charge generation layer with higher conductivity from causing damage to adjacent sub-pixels. crosstalk between. Therefore, the display device including the display substrate can also avoid crosstalk between adjacent sub-pixels, so it has higher product yield and higher display quality.
  • the display substrate can increase the pixel density while adopting a double-layer light-emitting (Tandem EL) design. Therefore, the display device including the display substrate has the advantages of long life, low power consumption, high brightness, high resolution and the like.
  • the display device can be a display device such as an organic light-emitting diode display device, and any product or component with a display function such as a TV, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, etc. that include the display device. Examples are not limited to this.
  • An embodiment of the present disclosure also provides a method for manufacturing a display substrate, which is used for manufacturing the above-mentioned display substrate.
  • the manufacturing method includes: forming a plurality of first electrodes on the base substrate; forming an isolation structure on the base substrate; forming a light-emitting functional layer on the side of the isolation structure and the plurality of first electrodes away from the base substrate, and the light-emitting functional layer Including a conductive sub-layer; and forming a second electrode on the side of the light-emitting functional layer away from the base substrate, the second electrode, the light-emitting functional layer and a plurality of first electrodes form a light-emitting element of multiple sub-pixels, and the isolation structure is located in the adjacent sub-pixel Between the pixels, the conductive sub-layer in the light-emitting functional layer is disconnected at the position where the partition structure is located, and the multiple sub-pixels include multiple sub-pixels of the first color, multiple sub-pixels of the second color, and multiple sub-pixel
  • FIG. 19 is a schematic partial cross-sectional view of a display substrate provided by an embodiment of the present disclosure.
  • the display substrate 100 includes a base substrate 110 and a plurality of sub-pixels 200; a plurality of sub-pixels 200 are located on the base substrate 110, and each sub-pixel 200 includes a light-emitting element 210; each light-emitting element 210 includes a light-emitting functional layer 120 and the first electrode 131 and the second electrode 132 located on both sides of the luminescent functional layer 120, the first electrode 131 is located between the luminescent functional layer 120 and the base substrate 110; the second electrode 132 is at least partially located on the luminescent functional layer 120 away from One side of an electrode 131 ; that is, the first electrode 131 and the second electrode 132 are located on two sides in a direction perpendicular to the light emitting functional layer 120 .
  • the light-emitting functional layer 120 includes multiple sub-functional layers, and the multiple sub-functional layers include a conductive sub-layer 129 with relatively high conductivity. It should be noted that the above-mentioned light-emitting functional layer does not only include film layers that directly emit light, but also includes functional film layers used to assist light emission, such as hole transport layers, electron transport layers, and the like.
  • the conductive sublayer 129 may be a charge generation layer.
  • the first electrode 131 may be an anode
  • the second electrode 132 may be a cathode.
  • the cathode can be formed of a material with high conductivity and low work function, for example, the cathode can be made of a metal material.
  • the anode may be formed of a transparent conductive material having a high work function.
  • the display substrate 100 further includes an isolation structure 140, which is located on the base substrate 110 and between adjacent sub-pixels 200; The position where 140 is located is disconnected. It should be noted that the above “adjacent sub-pixels” means that no other sub-pixels are arranged between two sub-pixels.
  • the isolation structure is provided between adjacent sub-pixels, and the charge generation layer in the light-emitting functional layer is disconnected at the location of the isolation structure, so as to avoid the high conductivity.
  • the charge generation layer causes crosstalk between adjacent subpixels.
  • the display substrate can avoid crosstalk between adjacent sub-pixels through the partition structure, the display substrate can increase pixel density while adopting a double-layer light emitting (Tandem EL) design. Therefore, the display substrate can have the advantages of long life, low power consumption, high brightness, and high resolution.
  • each partition structure 140 includes a first sub-partition structure 741 and a second sub-partition structure 742 stacked; the first sub-partition structure 741 is located between the second sub-partition structure 742 and the base substrate Between 110, the material of the second sub-interval structure 742 includes an inorganic non-metallic material.
  • the edge of the second sub-isolation structure 742 in the isolation structure 140 between the adjacent sub-pixels 200 is relatively opposite to the first sub-isolation structure.
  • the edge of 741 protrudes to form a partition protrusion 7420 where at least one of the plurality of sub-functional layers included in the light emitting functional layer 120 is disconnected.
  • at least one layer of the light-emitting functional layer can be disconnected at the partition protrusion of the second sub-block structure, which is beneficial to reduce the gap between adjacent sub-pixels. chance of crosstalk.
  • the plurality of sub-pixels 200 may include two adjacent sub-pixels 200 .
  • at least one edge of the second sub-partition structure 742 protrudes relative to a corresponding edge of the first sub-partition structure 741 to form at least one partition protrusion 7420 .
  • both side edges of the second sub-partition structure 742 protrude relative to corresponding edges of the first sub-partition structure 741 to form two partition protrusions 7420 .
  • Figure 19 schematically shows that a partition structure 140 is provided between two adjacent sub-pixels 200, and the partition structure 140 includes two partition protrusions 7420, but it is not limited thereto, and two adjacent sub-pixels can also be provided between two One or more partition structures, each partition structure includes at least one partition protrusion, by setting the number of partition structures and the number of partition protrusions, at least one sub-functional layer of the light-emitting functional layer can be disconnected by the partition structure .
  • the orthographic projection of the surface of the first sub-partition structure 741 facing the second sub-partition structure 742 on the base substrate 110 is completely located on the side of the second sub-partition structure 742 facing the base substrate 110.
  • An orthographic projection of the surface on the base substrate 110 is greater than the size of the surface of the first sub-isolation structure 741 facing the second sub-isolation structure 742 in the direction of the arrangement of adjacent sub-pixels.
  • the thickness of the first sub-isolation structure 741 is greater than the thickness of the second sub-isolation structure 742 .
  • the light-emitting functional layer 120 may include a first light-emitting layer 121, a charge generation layer (CGL) 129, and a second light-emitting layer 122 that are stacked.
  • the charge generation layer 129 is located between the first light-emitting layer 121 and the second light-emitting layer. between the light emitting layers 122 .
  • the charge generation layer has strong conductivity, which can make the luminescent functional layer have the advantages of long life, low power consumption and high brightness. For example, compared with the luminescent functional layer without the charge Setting the charge generation layer in the layer can nearly double the luminous brightness.
  • the light emitting functional layer 120 may further include a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL) and an electron injection layer (EIL).
  • HIL hole injection layer
  • HTL hole transport layer
  • ETL electron transport layer
  • EIL electron injection layer
  • the hole injection layer, the hole transport layer, the electron transport layer, the electron injection layer, and the charge generation layer are all common film layers of multiple sub-pixels, and may be referred to as common layers.
  • at least one sub-functional layer disconnected at the partition protrusion in the light-emitting functional layer may be at least one of the above-mentioned common layers.
  • the first light-emitting layer 121 and the second light-emitting layer 122 may be light-emitting layers that emit light of the same color.
  • the first light emitting layer 121 (or the second light emitting layer 122 ) in the sub-pixels 200 emitting light of different colors emits light of different colors.
  • the embodiments of the present disclosure are not limited thereto.
  • the first light-emitting layer 121 and the second light-emitting layer 122 can be light-emitting layers that emit light of different colors.
  • the light-emitting layer can make the light emitted by the multi-layer light-emitting layers included in the sub-pixel 200 mix into white light, and the color of the light emitted by each sub-pixel can be adjusted by setting a color filter layer.
  • the light-emitting layers located on the same side of the charge generation layer 129 may be spaced apart from each other, or may overlap or connect at the interval between two sub-pixels 200, which is not limited by the embodiments of the present disclosure. .
  • the material of the charge generation layer 129 may be the same as that of the electron transport layer.
  • the material of the electron transport layer can include aromatic heterocyclic compounds, such as imidazole derivatives such as benzimidazole derivatives, imidazopyridine derivatives, benzimidazopyridine derivatives; pyrimidine derivatives, triazine derivatives, etc. Ozine derivatives; quinoline derivatives, isoquinoline derivatives, phenanthroline derivatives, and other compounds containing a nitrogen-containing six-membered ring structure (compounds having a phosphine oxide-based substituent on the heterocycle are also included.) and the like.
  • the material of the charge generation layer 129 may be a material containing phosphine groups, or a material containing triazine.
  • the common layers such as the charge generation layer 129 in the light-emitting functional layer 120 of the two adjacent sub-pixels 200 may be connected or be a whole film layer, for example
  • the charge generation layer 129 has relatively high conductivity. For a display device with high resolution, the high conductivity of the charge generation layer 129 may easily cause crosstalk between adjacent sub-pixels 200 .
  • At least one layer of the light-emitting functional layer formed at the partition protrusion can be disconnected by disposing the partition structure with the partition protrusion between the two adjacent sub-pixels.
  • At least one film layer (such as a charge generation layer) in the light-emitting functional layers of the two adjacent sub-pixels is arranged at intervals, which can increase the resistance of the light-emitting functional layer between adjacent sub-pixels, thereby reducing the resistance between the two adjacent sub-pixels. While generating the probability of crosstalk, it does not affect the normal display of sub-pixels.
  • the material of the second sub-isolation structure 742 may include any one or more of silicon nitride, silicon oxide, or silicon oxynitride.
  • the second electrode 132 in multiple sub-pixels 200 may be a common electrode shared by multiple sub-pixels 200. for the entire film layer.
  • the size of the standoff protrusions 7420 may be in the range of 0.1-5 microns.
  • the size of the blocking protrusion 7420 may be in the range of 0.2-2 microns.
  • the ratio of the thickness of the isolation structure 140 to the thickness of the light emitting functional layer 120 is 0.8 ⁇ 1.2.
  • the ratio of the thickness of the partition structure 140 to the thickness of the light emitting functional layer 120 is 0.9 ⁇ 1.1.
  • the thickness of the second sub-isolation structure 742 may be 100-10000 angstroms.
  • the thickness of the second sub-isolation structure 742 may be 200 ⁇ 1500 angstroms.
  • the thickness of the first sub-isolation structure 741 may be 100-10000 angstroms.
  • the thickness of the first sub-isolation structure 741 may be 200 ⁇ 2000 angstroms.
  • An example of an embodiment of the present disclosure can be set by setting the thickness of the partition structure, for example, setting the ratio of the thickness of the partition structure to the thickness of the light-emitting functional layer to be 0.8-1.2, so that the light-emitting functional layer 120 is placed on the partition protrusion of the partition structure 140 7420 is disconnected, while the second electrode 132 remains continuous without being interrupted, so as to prevent crosstalk between adjacent sub-pixels, and at the same time, the second electrode is not interrupted to ensure display uniformity.
  • the thickness of the isolation structure 140 can be 300-5000 angstroms, the above-mentioned thickness (300-5000 angstroms) of the isolation structure 140 can make the light-emitting functional layer 120 disconnected at the edge of the isolation structure, and whether the second electrode 132 is disconnected depends on the The thickness of the partition structure 140 is further determined.
  • At least one film layer of the light-emitting functional layer can be disconnected at the partition protrusion.
  • FIG. 20 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the difference between the display substrate in the example shown in FIG. 20 and the display substrate in the example shown in FIG. 19 is that the thickness of the partition structure is different.
  • the thickness of the partition structure 140 in the display substrate shown in FIG. 20 is greater than that of the display substrate shown in FIG. 19
  • the thickness of the partition structure 140 for example, as shown in FIG. 20 , the thickness of the partition structure 140 can be set larger (for example, the ratio of the thickness of the partition structure to the thickness of the light-emitting functional layer is greater than 1.5), so that the light-emitting functional layer and
  • the second electrodes are all disconnected at the partition protrusions of the partition structure.
  • FIG. 19 schematically shows that all the film layers included in the light-emitting functional layer 120 are disconnected at the partition protrusion 7420 of the partition structure 140 , and the second electrode 132 is not disconnected at the partition protrusion 7420 of the partition structure 140 .
  • the thickness of the partition structure can be set so that part of the film layer on the side of the light-emitting functional layer close to the substrate is disconnected at the partition protrusion, and the part of the film layer far away from the substrate in the light-emitting functional layer Part of the film layer on one side is not disconnected at the partition protrusion, and the second electrode is not disconnected at the partition protrusion.
  • the material of the first sub-interval structure 741 includes an organic material.
  • the display substrate further includes an organic layer 180 located between the second sub-isolation structure 742 and the base substrate 110 .
  • the organic layer 180 may serve as a planarization layer.
  • the first sub-interval structure 741 and the organic layer 180 are an integrated structure.
  • the first sub-interval structure 741 may be a part of the organic layer 180 .
  • the first sub-interval structure 741 may be a part of the organic layer 180 that protrudes to a side away from the base substrate 110 .
  • the organic layer 180 includes a planarization (PLN, Planarization) layer.
  • PPN planarization
  • the material of the first sub-block structure 741 includes photoresist, polyimide (PI) resin, acrylic resin, silicon compound or polyacrylic resin.
  • the first cross-section of the first sub-interval structure 741 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 includes a rectangle.
  • the first section of the first sub-isolation structure 741 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 includes a trapezoid, and the side of the trapezoid is the same as the side of the trapezoid close to the base substrate 110.
  • the angle between the bottom edges is not greater than 90 degrees.
  • the cross section of the first sub-partition structure 741 may be trapezoidal, the upper base of the trapezoid is located on the side of the lower base of the trapezoid away from the substrate 110, and the angle between the side of the trapezoid and the lower base is Not greater than 90 degrees.
  • the length of the upper base of the trapezoidal cross-section of the first sub-interval structure 741 is shorter than the length of the side of the cross-section of the second sub-interval structure 742 near the substrate 110 so that the second sub-interval structure
  • the edge 742 forms an undercut structure with the edge of the upper bottom of the first sub-partition structure 741 , that is, the edge of the second sub-partition structure 742 includes the partition protrusion 7420 .
  • FIG. 19 schematically shows that the sides of the first sub-interval structure 741 are straight sides, but it is not limited thereto.
  • the sides of the formed first sub-interval structure 741 may also be curved sides, for example, The curved side bends to the side away from the center of the first sub-partition structure 741 where it is located, or the curved side bends to the side close to the center of the first sub-partition structure 741 where it is located.
  • the first sub-partition structure 741 The angle between the curved side and the lower bottom can refer to the angle between the tangent line at the midpoint of the curved side and the lower bottom, or the angle between the tangent line at the intersection point of the curved side and the lower bottom and the lower bottom.
  • the second section of the second sub-interval structure 742 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 includes a rectangle or a trapezoid.
  • FIG. 19 schematically shows that the shape of the second section of the second sub-interval structure 742 is a rectangle.
  • the angle between the long sides is a right angle or approximately a right angle (for example, approximately a right angle can mean that the difference between the angle between the two sides and 90 degrees is not more than 10 degrees), which can facilitate the formation of the light-emitting functional layer 120 in the second sub-interval structure 742. Broken at the edges.
  • the shape of the second section of the second sub-isolation structure 742 taken along the arrangement direction of adjacent sub-pixels and perpendicular to the plane of the base substrate 110 may be a trapezoid, and the sides of the trapezoid are as far away from the base substrate 110 as the trapezoid.
  • the angle between the bases of the sides is not less than 70 degrees.
  • the angle between the side of the second sub-interval structure 742 and the bottom edge of the trapezoid away from the substrate can be set so that the light-emitting functional layer 120 is at the edge of the second sub-interval structure 742 disconnect.
  • the second section of the second sub-interval structure 742 may be a trapezoid, and the length of the bottom of the trapezoid away from the base substrate 110 is smaller than the length of the bottom of the trapezoid near the base substrate 110 .
  • FIG. 21A is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the difference between the display substrate shown in FIG. 21A and the display substrate shown in FIG. 19 is that the first sub-interval structure 741 is cut along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 in the first section.
  • the shapes are different.
  • the shape of the first section of the first sub-isolation structure 741 taken perpendicular to the plane of the base substrate 110 can be rectangular, and the second sub-isolation structure 742 is perpendicular to the plane of the base substrate 110.
  • the shape of the cut first section is also rectangular, which can facilitate the disconnection of the light-emitting functional layer 120 at the edge of the isolation structure 140 .
  • FIG. 21B is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the difference between the display substrate shown in FIG. 21B and the display substrate shown in FIG. 21A is that the first sub-interval structure 741 is cut along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 in the first section.
  • the shapes are different. For example, as shown in FIG.
  • the shape of the first section of the first sub-interval structure 741 taken by a plane perpendicular to the base substrate 110 may be a trapezoid, and the length of the bottom edge of the trapezoid away from the side of the base substrate 110 The length greater than the bottom of the trapezoidal side close to the base substrate 110 may facilitate the disconnection of the light emitting functional layer 120 at the edge of the isolation structure 140 .
  • the first electrode 131 is in contact with the surface of the organic layer 180 on a side away from the base substrate 110 .
  • the first electrode 131 may be an anode
  • the second electrode 132 may be a cathode.
  • the cathode can be formed of a material with high conductivity and low work function, for example, the cathode can be made of a metal material.
  • the anode may be formed of a transparent conductive material having a high work function.
  • the display substrate further includes a pixel defining layer 150 located on the side of the organic layer 180 away from the base substrate 110.
  • the pixel defining layer 150 includes a plurality of first openings 152, and the plurality of first openings 152 is arranged in one-to-one correspondence with the plurality of sub-pixels 200 to define light emitting areas of the plurality of sub-pixels 200 , and the first opening 152 is configured to expose the first electrode 131 .
  • at least part of the first electrode 131 is located between the pixel defining layer 150 and the base substrate 110 .
  • the first electrode 131 and the second electrode 132 located on both sides of the light emitting functional layer 120 can drive the light emitting functional layer in the first opening 152 120 for lighting.
  • the above-mentioned light emitting region may refer to the region where the sub-pixel effectively emits light
  • the shape of the light emitting region refers to a two-dimensional shape, for example, the shape of the light emitting region may be the same as the shape of the first opening 152 of the pixel defining layer 150 .
  • the part of the pixel defining layer 150 except the first opening 152 is a pixel defining part
  • the material of the pixel defining part may include polyimide, acrylic or polyethylene terephthalate. Esters etc.
  • the pixel defining layer 150 further includes a plurality of second openings 154 configured to expose the isolation structures 140 .
  • a space is provided between the partition structure 140 and the pixel defining portion of the pixel defining layer 150 .
  • the second sub-partition structure 742 includes at least one partition layer.
  • the second sub-isolation structure 742 may include a single-layer isolation layer, and the material of the single-layer film layer may be silicon oxide or silicon nitride.
  • the second sub-isolation structure 742 may include two isolation layers, and the materials of the two isolation layers are silicon oxide and silicon nitride respectively.
  • the embodiment of the present disclosure is not limited thereto.
  • the second sub-partition structure may include three or more partition layers, and the number of partition layers included in the second sub-partition structure may be set according to product requirements.
  • the thickness of the isolation structure 140 is smaller than the thickness of the pixel defining portion.
  • the dimension of the partition protrusion 7420 is not less than 0.01 ⁇ m.
  • the size of the partition protrusion 7420 is not less than 0.1 micrometer.
  • the size of the partition protrusion 7420 may be 0.01 ⁇ 5 ⁇ m.
  • the size of the partition protrusion 7420 may be 0.05 ⁇ 4 ⁇ m.
  • the size of the partition protrusion 7420 may be 0.1 ⁇ 2 ⁇ m.
  • the second section of the second sub-isolation structure 742 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 includes a rectangle or a trapezoid.
  • the second cross-sectional shape of the second sub-interval structure 742 is a rectangle, and the angle between the short side of the second cross-section of the second sub-interval structure 742 and the long side close to the base substrate 110 is set to be A right angle or a substantially right angle (for example, a substantially right angle may mean that the difference between the angle between the two sides and 90 degrees is not more than 10 degrees) may facilitate the disconnection of the light-emitting functional layer 120 at the edge of the second sub-blocking structure 742 .
  • the second section of the second sub-interval structure 742 may be a trapezoid, and the angle between the side of the trapezoid and the bottom of the trapezoid on the side close to the base substrate 110 is not less than 70 degrees.
  • the second section can be trapezoidal, and the angle between the side of the trapezoid and the bottom of the trapezoid on the side close to the base substrate 110 is not less than 90 degrees so that the side of the second sub-interval structure 742 is away from the trapezoid.
  • the included angle between the bases of one side of the base substrate 110 is an acute angle, which can facilitate the disconnection of the light-emitting functional layer 120 at the edge of the second sub-interval structure 742 .
  • the display substrate further includes a pixel circuit
  • the first electrode 131 of the organic light emitting element 210 can be connected to one of the source and drain of the thin film transistor in the pixel circuit through a via hole penetrating through the organic layer 180 and other film layers.
  • the pixel circuit also includes a storage capacitor.
  • the film layer between the organic layer 180 and the base substrate 110 may include one layer of power signal lines, or may include two layers of power signal lines.
  • a side surface of the organic layer 180 facing the base substrate 110 may be in contact with the interlayer insulating layer.
  • a spacer may be provided on the side of the pixel defining portion of the pixel defining layer 150 away from the base substrate 110 , and the spacer is configured to support an evaporation mask for forming the light emitting layer.
  • an embodiment of the present disclosure provides a manufacturing method for forming the display substrate shown in FIG.
  • a first electrode 131, a light-emitting functional layer 120, and a second electrode 132 are sequentially formed on the substrate; a first material layer is formed on the base substrate 110; a second material layer is formed on the first material layer, and the second material layer is Inorganic non-metallic material layer; simultaneously pattern the first material layer and the second material layer to form the isolation structure 140 .
  • Forming the isolation structure 140 includes patterning the second material layer to form the second sub-isolation structure 742, and at the same time, the part of the first material layer directly below the second sub-isolation structure 742 is etched to form the first sub-isolation structure 741;
  • the functional layer 120 is formed after the partition structure 140 is formed.
  • the light-emitting functional layer 120 includes a plurality of film layers, at least one of which is disconnected at the partition protrusion 7420 .
  • the second material layer is an organic material layer.
  • Simultaneously patterning the first material layer and the second material layer to form the isolation structure 140 includes: using dry etching to etch the second material layer to form the second sub-isolation structure. 742 , the part of the organic material layer directly below the second sub-isolation structure 742 is dry-etched to form the first sub-isolation structure 741 .
  • FIG. 22A to FIG. 22D are schematic flow charts of the manufacturing method of the display substrate before forming the display substrate shown in FIG. 19 .
  • the manufacturing method of the display substrate includes: forming a plurality of sub-pixels 200 on the base substrate 110, wherein forming the sub-pixels 200 includes sequentially forming sub-pixels 200 in a direction perpendicular to the base substrate 110
  • the first electrode 131, the light-emitting functional layer 120, and the second electrode 132 are stacked; an organic material layer 180 (that is, the first material layer) is formed on the base substrate 110; an inorganic non-metallic material layer 030 is formed on the organic material layer 180 (i.e.
  • a first sub-block structure 741 is formed.
  • the partition structure 140 includes a first sub-partition structure 741 and a second sub-partition structure 742, along the arrangement direction of adjacent sub-pixels 200, the edge of the second sub-partition structure 742 in the partition structure 140 between adjacent sub-pixels 200 Protrude relative to the edge of the first sub-interval structure 741 to form the partition protrusion 7420; the light-emitting functional layer 120 is formed after the partition structure 140 is formed, the light-emitting functional layer 120 includes a plurality of film layers, at least one of the multiple film layers is The blocking tab 7420 is broken.
  • the manufacturing method of a display substrate may include preparing a base substrate 110 on a glass carrier.
  • the substrate substrate 110 may be a flexible substrate substrate.
  • forming the base substrate 110 may include sequentially forming a stacked first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer and a second inorganic material layer on a glass carrier.
  • Materials such as the first flexible material layer and the second flexible material layer are polyimide (PI), polyethylene terephthalate (PET) or surface-treated polymer soft film.
  • the materials of the first inorganic material layer and the second inorganic material layer are silicon nitride (SiNx) or silicon oxide (SiOx), etc., which are used to improve the water and oxygen resistance of the base substrate.
  • the first inorganic material layer, the second inorganic material layer The layer is also called the barrier (Barrier) layer.
  • a driving structure layer of a pixel circuit may be formed on the base substrate 110 .
  • the driving structure layer includes a plurality of pixel circuits, and each pixel circuit includes a plurality of transistors and at least one storage capacitor.
  • the pixel circuit may adopt a 2T1C, 3T1C or 7T1C design.
  • forming the driving structure layer may include sequentially depositing a first insulating film and an active layer film on the base substrate 110, patterning the active layer film through a patterning process to form a first insulating layer covering the entire base substrate 110, And an active layer pattern disposed on the first insulating layer, the active layer pattern at least includes an active layer.
  • the second insulating film and the first metal film are deposited in sequence, and the first metal film is patterned by a patterning process to form a second insulating layer covering the pattern of the active layer, and a first gate metal layer disposed on the second insulating layer layer pattern, the first gate metal layer pattern at least includes a gate electrode and a first capacitor electrode.
  • a third insulating film and a second metal film are deposited in sequence, and the second metal film is patterned by a patterning process to form a third insulating layer covering the first gate metal layer, and a second gate electrode disposed on the third insulating layer.
  • the metal layer pattern, the second gate metal layer pattern at least includes a second capacitor electrode, and the position of the second capacitor electrode corresponds to the position of the first capacitor electrode.
  • a fourth insulating film is deposited, and the fourth insulating film is patterned through a patterning process to form a fourth insulating layer covering the second gate metal layer. At least two first via holes are opened on the fourth insulating layer, and two second via holes are opened.
  • the fourth insulating layer, the third insulating layer and the second insulating layer in a via hole are etched away, exposing the surface of the active layer of the active layer pattern.
  • the source-drain metal layer pattern includes at least a source electrode and a drain electrode located in the display area.
  • the source electrode and the drain electrode may be connected to the active layer in the active layer pattern through the first via holes, respectively.
  • the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer may use any one of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON) or More kinds, can be single layer, multilayer or composite layer.
  • the first insulating layer may be a buffer (Buffer) layer, which is used to improve the water and oxygen resistance of the base substrate 110;
  • the second insulating layer and the third insulating layer may be gate insulating (GI, Gate Insulator) layers;
  • the fourth insulating layer It may be an interlayer insulation (ILD, Interlayer Dielectric) layer.
  • the first metal film, the second metal film and the third metal film adopt metal materials, such as any one of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo) or more Multiple or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), can have a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti and the like.
  • metal materials such as any one of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo) or more Multiple or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb)
  • AlNd aluminum-neodymium alloy
  • MoNb molybdenum-niobium alloy
  • the active layer film is made of amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polysilicon (p-Si), One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic technology.
  • a-IGZO amorphous indium gallium zinc oxide
  • ZnON zinc oxynitride
  • IZTO indium zinc tin oxide
  • a-Si amorphous silicon
  • p-Si polysilicon
  • One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic technology.
  • the inorganic non-metal material layer 030 is patterned.
  • patterning the inorganic non-metallic material layer 030 includes etching the inorganic non-metallic material layer 030 by dry etching so that when the second sub-isolation structure 742 is formed, the organic material layer 180 located in the second sub-isolation structure Part of the organic material layer 180 directly below 742 is dry-etched to form the first sub-isolation structure 741 .
  • a mask can be used to block the inorganic non-metallic material layer 030 at the position where the second sub-interval structure 742 is to be formed, so that the inorganic non-metallic material layer at other positions other than the position where the second sub-interval structure 742 is to be formed 030 is etched, during the process of dry etching the inorganic non-metal material layer 030, the etching gas will etch the part of the organic material layer 180 that is not covered by the mask, so that the remaining inorganic material after etching
  • An organic material layer namely the first sub-isolation structure 741) with a certain thickness is reserved directly under the non-metallic material layer (ie the second sub-isolation structure 742), so that the side of the organic material layer 180 away from the base substrate 110 forms a
  • the protrusion located directly below the second sub-partition structure 742 is the first sub-partition structure 741 .
  • the etched thickness of the organic material layer 180 may be 100-10000 angstroms, and the formed first sub-isolation structure
  • the thickness of 741 can be 100-10000 Angstroms.
  • the etched thickness of the organic material layer 180 may be 200-2000 angstroms, and the thickness of the formed first sub-isolation structure 741 may be 200-2000 angstroms. .
  • the first electrode 131 of the sub-pixel is patterned on the planar layer 180 .
  • the first electrode 131 is connected to the drain electrode of the transistor through the second via hole in the flat layer 180 .
  • the first electrode 131 can be made of a metal material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo). , or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), can be single-layer structure, or multi-layer composite structure, such as Ti/Al/Ti, etc., or, it is metal and transparent conductive A stack structure formed by materials, such as reflective materials such as ITO/Ag/ITO, Mo/AlNd/ITO, etc.
  • a metal material such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo).
  • alloy materials of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy
  • the pixel defining layer 150 may be formed.
  • a pixel-defining film is coated on the base substrate 110 formed with the aforementioned pattern, and the pixel-defining layer 150 is formed through masking, exposure, and development processes.
  • the pixel definition layer 150 of the display area includes a plurality of pixel definition parts 158, the first opening 152 or the second opening 154 is formed between adjacent pixel definition parts 401, and the pixels in the first opening 152 and the second opening 154 define The film is developed away, the first opening 152 exposes at least part of the surface of the first electrode 131 of the plurality of sub-pixels, and the second opening 154 exposes the partition structure 140 .
  • spacers may be formed on the pixel defining portion.
  • an organic material film is coated on the base substrate 110 formed with the aforementioned pattern, and spacers are formed through masking, exposure, and development processes.
  • the spacer can serve as a support layer configured to support the FMM (high precision mask) during the evaporation process.
  • the light emitting functional layer 120 and the second electrode 132 are sequentially formed.
  • the second electrode 132 may be a transparent cathode.
  • the light-emitting functional layer 120 can emit light from the side away from the base substrate 110 through the transparent cathode to achieve top emission.
  • the second electrode 132 can use any one or more of magnesium (Mg), silver (Ag), aluminum (Al), or an alloy made of any one or more of the above metals, or use A transparent conductive material, such as indium tin oxide (ITO), or a multi-layer composite structure of metal and transparent conductive material.
  • ITO indium tin oxide
  • forming the light-emitting functional layer 120 may include: using an open mask (Open Mask) to sequentially vapor-deposit to form a hole injection layer and a hole-transport layer; using FMM to sequentially vapor-deposit to form a first light-emitting layer 131 that emits light of different colors, for example A blue light-emitting layer, a green light-emitting layer, and a red light-emitting layer; the electron transport layer, the charge generation layer 133, and the hole transport layer are sequentially evaporated by using an open mask; Layer 132, such as a blue light-emitting layer, a green light-emitting layer, and a red light-emitting layer; an electron transport layer, a second electrode, and an optical coupling layer are sequentially evaporated using an open mask to form an electron transport layer.
  • the hole injection layer, the hole transport layer, the electron transport layer, the charge generation layer, the second electrode, and the light coupling layer are all common layers of multiple sub-pixels.
  • the formed light-emitting functional layer 120 will be broken at the partition protrusion 7420 of the partition structure 140, so that a part of the light-emitting functional layer 120 located in the second opening 154 of the pixel defining layer 150 is located in the partition structure. 140 , and another portion is located on the organic layer 180 .
  • the manufacturing method of the display substrate further includes forming an encapsulation layer, and the encapsulation layer may include a stacked first encapsulation layer, a second encapsulation layer and a third encapsulation layer.
  • the first encapsulation layer is made of inorganic materials and covers the second electrode 132 in the display area.
  • the second encapsulation layer adopts organic materials.
  • the third encapsulation layer is made of inorganic material and covers the first encapsulation layer and the second encapsulation layer.
  • the encapsulation layer may also adopt a five-layer structure of inorganic/organic/inorganic/organic/inorganic.
  • the display substrate provided with the partition structure provided by the embodiments of the present disclosure only needs to add one mask process, which has a relatively low impact on the process throughput.
  • FIG. 23 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the difference between the display substrate in the example shown in FIG. 23 and the display substrate in the example shown in FIG. 19 is that the material of the first sub-partition structure 741 in the display substrate shown in FIG. 23 includes an inorganic non-metallic material.
  • the sub-pixel 200, the base substrate 110, and the pixel definition layer 150 in the display substrate shown in FIG. Layer 150 has the same features, which will not be repeated here.
  • the material of the first sub-partition structure 741 is different from that of the second sub-partition structure 742 .
  • the material of the second sub-isolation structure 742 may include any one or more of silicon nitride, silicon oxide, or silicon oxynitride, and the material of the first sub-isolation structure 741 may also include silicon nitride, silicon oxide, or nitrogen. Any one or more of silicon oxides, and the material of the first sub-isolation structure 741 is different from that of the second sub-isolation structure 742 .
  • the plurality of sub-pixels 200 may include two adjacent sub-pixels 200 arranged along the arrangement direction of adjacent sub-pixels.
  • at least one edge of the second sub-partition structure 742 protrudes relative to a corresponding edge of the first sub-partition structure 741 to form at least one partition protrusion 7420 .
  • both side edges of the second sub-partition structure 742 protrude relative to corresponding edges of the first sub-partition structure 741 to form two partition protrusions 7420 .
  • two partition protrusions 7420 are arranged along the arrangement direction of adjacent sub-pixels.
  • FIG. 23 schematically shows that a partition structure 140 is provided between two adjacent sub-pixels 200, and the partition structure 140 includes two partition protrusions 7420, but it is not limited thereto.
  • Two or more partition structures are provided, and each partition structure includes at least one partition protrusion.
  • the orthographic projection of the surface of the first sub-partition structure 741 facing the second sub-partition structure 742 on the base substrate 110 is entirely located on the side of the second sub-partition structure 742 facing the base substrate 110.
  • the surface is in an orthographic projection on the base substrate 110 .
  • the thickness of the first sub-isolation structure 741 is greater than the thickness of the second sub-isolation structure 742 .
  • the thickness of the isolation structure 140 is smaller than the thickness of the pixel defining portion 401 .
  • a space is provided between the isolation structure 140 and the pixel defining portion 401 .
  • the surface of the organic layer 180 exposed by the second opening 154 of the pixel defining layer 150 on the side away from the base substrate 110 may be a flat surface, that is, the surface of the organic layer 180 on the side away from the base substrate 110 The surface does not include protrusions.
  • the first sub-interval structure 741 is disposed on the surface of the organic layer 180 away from the base substrate 110 .
  • the thickness of the second sub-interval structure 742 is not greater than the thickness of the light emitting functional layer 120 .
  • the thickness of the second sub-isolation structure 742 may be 500 ⁇ 8000 angstroms.
  • the ratio of the thickness of the partition structure 140 to the thickness of the light emitting functional layer 120 is 0.8 ⁇ 1.2.
  • the ratio of the thickness of the partition structure 140 to the thickness of the light emitting functional layer 120 is 0.9 ⁇ 1.1.
  • An example of an embodiment of the present disclosure can be set by setting the thickness of the partition structure, for example, setting the ratio of the thickness of the partition structure to the thickness of the light-emitting functional layer to be 0.8-1.2, so that the light-emitting functional layer 120 is placed on the partition protrusion of the partition structure 140 7420 is disconnected, while the second electrode 132 remains continuous without being interrupted, so as to prevent crosstalk between adjacent sub-pixels, and at the same time, the second electrode is not interrupted to ensure display uniformity.
  • FIG. 23 schematically shows that all the film layers included in the luminescent functional layer 120 are disconnected at the partition protrusion 7420 of the partition structure 140, but it is not limited thereto.
  • the partition protrusion 7420 of the structure 140 is disconnected, and another part of the film layer is continuous at the partition protrusion 7420 .
  • the film layer disconnected at the partition protrusion 7420 can be regarded as a misplaced film layer, and dislocation of the film layer at the partition protrusion 7420 is beneficial to reduce the lateral crosstalk of the film layer.
  • the thickness of the partition structure can also be set to be greater than the thickness of the light-emitting functional layer, so that both the light-emitting functional layer and the second electrode are disconnected at the edge of the partition structure.
  • the first cross-section of the first sub-interval structure 741 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 includes a rectangle or a trapezoid.
  • the first section is a trapezoid, and the length of the base of the trapezoid on a side away from the base substrate 110 is greater than the length of the base of the trapezoid on a side close to the base substrate 110 .
  • the angle between the side of the trapezoid and the bottom of the trapezoid on the side close to the base substrate 110 is not less than 70 degrees.
  • the size of the partition protrusion 7420 is not less than 0.01 microns.
  • the size of the partition protrusion 7420 is not less than 0.1 micrometer.
  • the size of the blocking protrusion 7420 may be in the range of 0.01-5 microns.
  • the included angle between the side of the trapezoid and the bottom of the trapezoid near the base substrate 110 is not less than 90 degrees.
  • the size of the blocking protrusion 7420 may be in the range of 0.1-2 microns.
  • the side of the first sub-partition structure 741 can be a straight side or a curved side.
  • the angle between the curved side of the structure 741 and the bottom side near the substrate 110 may refer to the angle between the tangent line at the midpoint of the curved side and the bottom side, or may refer to the intersection point between the curved side and the bottom side The angle between the tangent at and the base.
  • At least one film layer of the light-emitting functional layer can be disconnected at the partition protrusion.
  • the second section of the second sub-interval structure 742 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 includes a rectangle or a trapezoid.
  • the second cross-sectional shape of the second sub-interval structure 742 is a rectangle, and the angle between the short side of the second cross-section of the second sub-interval structure 742 and the long side close to the base substrate 110 is set to be A right angle or a substantially right angle (for example, a substantially right angle may mean that the difference between the angle between the two sides and 90 degrees is not more than 10 degrees) may facilitate the disconnection of the light-emitting functional layer 120 at the edge of the second sub-blocking structure 742 .
  • the second section of the second sub-interval structure 742 may be a trapezoid, and the angle between the side of the trapezoid and the bottom of the trapezoid on the side close to the base substrate 110 is not less than 70 degrees.
  • the second section can be trapezoidal, and the angle between the side of the trapezoid and the bottom of the trapezoid on the side close to the base substrate 110 is not less than 90 degrees so that the side of the second sub-interval structure 742 is away from the trapezoid.
  • the included angle between the bases of one side of the base substrate 110 is an acute angle, which can facilitate the disconnection of the light-emitting functional layer 120 at the edge of the second sub-interval structure 742 .
  • FIG. 23 schematically shows that the first sub-partition structure 741 includes a film layer, and the second sub-partition structure 742 includes a film layer, but not limited thereto.
  • the first sub-partition structure 741 and the second sub-partition structure At least one of the 742 may include a multi-layer film layer, and at least the edge of the second sub-blocking structure 742 protrudes relative to the edge of the first sub-blocking structure 741 to form a blocking protrusion for disconnecting at least one layer of the light-emitting functional layer.
  • the side edge angle of the partition structure is relatively large (such as the angle between the side edge of the first section and the bottom edge of the side close to the substrate, and/or, the side plate of the second section is the same as the bottom edge of the side close to the substrate
  • the thickness of the light-emitting functional layer deposition is reduced overall, and at least one film layer of the light-emitting functional layer located between adjacent sub-pixels is disconnected, so that the resistance of the film layer increases, and further Reduce crosstalk between adjacent subpixels.
  • an embodiment of the present disclosure provides a manufacturing method for forming the display substrate shown in FIG.
  • a first electrode 131, a light-emitting functional layer 120, and a second electrode 132 are sequentially formed on the substrate; a first material layer is formed on the base substrate 110; a second material layer is formed on the first material layer, and the second material layer is Inorganic non-metallic material layer; simultaneously pattern the first material layer and the second material layer to form the isolation structure 140 .
  • Forming the isolation structure 140 includes patterning the second material layer to form the second sub-isolation structure 742, and at the same time, the part of the first material layer directly below the second sub-isolation structure 742 is etched to form the first sub-isolation structure 741;
  • the functional layer 120 is formed after the partition structure 140 is formed.
  • the light-emitting functional layer 120 includes a plurality of film layers, at least one of which is disconnected at the partition protrusion 7420 .
  • the second material layer is an inorganic material layer
  • simultaneously patterning the first material layer and the second material layer to form the isolation structure 140 includes: using etching solutions with different etching selectivity ratios for the first material layer and the second material layer Simultaneous etching of the first material layer and the second material layer, wherein the etching selectivity of the etching solution to the first material layer is greater than the etching selectivity of the etching solution to the second material layer, so that the first material layer
  • the edge of the first sub-isolation structure 741 formed after being etched is retracted relative to the edge of the second sub-isolation structure 742 formed after the second material layer is etched to form an undercut structure.
  • FIG. 24A to FIG. 24D are schematic flow charts of the manufacturing method of the display substrate before forming the display substrate shown in FIG. 23 .
  • the manufacturing method of the display substrate includes: forming a plurality of sub-pixels 200 on the base substrate 110, wherein forming the sub-pixels 200 includes sequentially forming sub-pixels 200 in a direction perpendicular to the base substrate 110
  • the first electrode 131, the light-emitting functional layer 120, and the second electrode 132 are stacked; an organic material layer 180 is formed on the base substrate 110; an inorganic non-metallic material layer 030 is formed on the organic material layer 180, and the inorganic non-metallic material layer 030
  • the isolation structure 140 includes a first sub isolation structure 741 and a second sub isolation structure 742, the first sub isolation structure 741 is located between the second sub isolation structure 742 and the base substrate 110;
  • the edge of the second sub-isolation structure 742 in the isolation structure 140 between the adjacent sub-pixels 200 protrudes relative to the edge of the first sub-isolation structure 741 to form an isolation protrusion 7420;
  • the light emitting function layer 120 is formed after the isolation structure 140 is formed , the light-emitting functional layer 120 includes a plurality of film layers, and at least one layer of the plurality of film layers is disconnected at the partition protrusion 7420 .
  • the manufacturing method for forming the base substrate 110, the sub-pixel 200, and the pixel defining layer 150 in the display substrate shown in FIG. The fabrication methods of the pixel 200 and the pixel defining layer 150 are the same, and will not be repeated here.
  • the inorganic non-metal material layer 030 is patterned.
  • the inorganic non-metallic material layer 030 may include two film layers, such as the first inorganic non-metallic material layer 031 and the second inorganic non-metallic material layer 032, and the patterning of the inorganic non-metallic material layer 030 includes a process of wet etching Etching the two film layers included in the inorganic non-metallic material layer 030, the etching selectivity ratio of the etching solution or etching gas to the first inorganic non-metallic material layer 031 is greater than that to the second inorganic non-metallic material layer 032 The etch selectivity ratio, so that the edge of the first sub-isolation structure 741 formed by etching the first inorganic non-metal material layer 031 is relative to the edge of the second sub-isolation structure
  • the first electrode 131 of the organic light emitting element 210 of the sub-pixel is patterned on the flat layer 180 .
  • the method and material for forming the first electrode 131 in this example may be the same as the method and material for forming the first electrode 131 shown in FIG. 22C , and will not be repeated here.
  • the pixel defining layer 150 may be formed.
  • the method and material for forming the pixel defining layer 150 in this example may be the same as the method and material for forming the pixel defining layer 150 shown in FIG. 22D , which will not be repeated here.
  • the steps after forming the pixel defining layer in this example may be the same as the steps after forming the pixel defining layer on the display substrate shown in FIG. 19 , which will not be repeated here.
  • FIG. 25 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the partition structure 140 further includes a third sub-partition structure 743 .
  • the pixel definition layer 150 has the same features, which will not be repeated here.
  • the materials, shapes, and dimensional relationships are the same and will not be repeated here.
  • the third sub-isolation structure 743 is located between the first sub-isolation structure 741 and the base substrate 110, along the arrangement direction of the adjacent sub-pixels 200, the partition between the adjacent sub-pixels 200
  • the edge of the first sub-isolation structure 741 protrudes relative to the edge of the third sub-isolation structure 743 in the structure 140
  • the third sub-isolation structure 743 and the organic layer 180 are an integrated structure.
  • the third sub-interval structure 743 may be a part of the organic layer 180 .
  • the third sub-interval structure 743 may be a part of the organic layer 180 protruding to a side away from the base substrate 110 .
  • the first sub-isolation structure 741 may be located on a portion of the organic layer 180 protruding away from the base substrate 110 .
  • the material of the third sub-interval structure 743 includes materials of photoresist, polyimide (PI) resin, acrylic resin, silicon compound or polyacrylic resin.
  • the thickness of the third sub-isolation structure 743 may be 100 ⁇ 10000 angstroms.
  • the thickness of the third sub-isolation structure 743 may be 200 ⁇ 2000 angstroms.
  • the cross-section of the third sub-isolation structure 743 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the base substrate 110 includes a rectangle.
  • the cross-section of the third sub-isolation structure 743 taken along the arrangement direction of the adjacent sub-pixels 200 and perpendicular to the plane of the substrate 110 includes a trapezoid, and the sides of the trapezoid and the bottom of the trapezoid on the side close to the substrate 110 The angle between them is not more than 90 degrees.
  • the length of the upper base of the trapezoidal cross-section of the third sub-interval structure 743 is shorter than the length of the side of the cross-section of the first sub-interval structure 741 near the base substrate 110 .
  • the side of the third sub-partition structure 743 can be a straight side or a curved side.
  • the curved side is curved to a side away from the center of the third sub-partition structure 743 where it is located, or the curved side is curved toward the center of the third sub-partition structure 743.
  • One side of the center of the third sub-partition structure 743 where it is located is curved.
  • the angle between the curved side and the lower bottom of the third sub-partition structure 743 can refer to the angle between the tangent line at the midpoint of the curved side and the lower bottom.
  • the included angle can also refer to the included angle between the tangent line at the intersection point of the curved edge and the lower bottom and the lower bottom.
  • a mask can be used to block the inorganic non-metal material layer 030 at the position where the first sub-interval structure 741 and the second sub-interval structure 742 are to be formed, so that the first sub-interval structure 741 and the second sub-interval structure are to be formed
  • the inorganic non-metallic material layer 030 at positions other than the position 742 is etched.
  • the etching gas will Etching is performed partially, so that an organic material layer with a certain thickness (ie, the third sub-isolation structure 743), so that the side of the organic material layer 180 away from the base substrate 110 forms a protrusion located directly below the first sub-isolation structure 741 and the second sub-isolation structure 742, and the protrusion is the third sub-isolation structure. Structure 743.
  • first sub-isolation structure 741 and the second sub-isolation structure 742 may also be formed by using a wet etching process first, and then the third sub-isolation structure 743 is formed by a dry etching process; process to form the first sub-isolation structure 741 , the second sub-isolation structure 742 and the third sub-isolation structure 743 .
  • the etched thickness of the organic material layer 180 may be 100-10000 angstroms, and the formed third sub-isolation structure
  • the thickness of 743 can be 100-10000 Angstroms.
  • the etched thickness of the organic material layer 180 may be 200-2000 angstroms, and the thickness of the formed third sub-interval structure 743 may be 200-2000 angstroms. .
  • FIG. 26 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate 100 includes a base substrate 110 and a plurality of sub-pixels (not shown); a plurality of sub-pixels are located on the base substrate 110, and each sub-pixel includes a light-emitting element; each light-emitting element includes a light-emitting functional layer and A first electrode 131 and a second electrode (not shown) located on both sides of the luminescent functional layer, the first electrode 131 is located between the luminescent functional layer and the base substrate 110; the second electrode is at least partially located on the luminescent functional layer away from the first One side of the electrode 131.
  • the specific structures of sub-pixels, light-emitting elements, and light-emitting functional layers can be referred to in FIG. 1 and FIG. 2 , which will not be repeated in this disclosure.
  • the display substrate 100 also includes a pixel isolation structure 140, which is located on the base substrate 110 and between adjacent sub-pixels; At least one is disconnected at the position where the pixel isolation structure 140 is located.
  • the display substrate 100 also includes a pixel definition layer 150; the pixel definition layer 150 is partially located on the side of the first electrode 131 away from the base substrate 110; the pixel definition layer 150 includes a plurality of pixel openings 152; the plurality of pixel openings 152 and the plurality of sub-pixels 200 are in one-to-one correspondence to define effective light-emitting areas of a plurality of sub-pixels 200; the pixel opening 152 is configured to expose the first electrode 131, so that the first electrode 131 contacts with the subsequently formed light-emitting functional layer 120.
  • the pixel isolation structure 140 includes a recessed structure 140C and a shielding portion 140S.
  • the recessed structure 140C is located at the edge of the first electrode 131 and is recessed toward the pixel defining layer 150 .
  • the shielding portion 140S is located in the groove 140C.
  • the side away from the base substrate 110 is a part of the pixel defining layer 150 .
  • the conductive sublayer of the light-emitting functional layer is disconnected at the position where the shielding portion is located. Therefore, by disposing the above-mentioned pixel isolation structure between adjacent sub-pixels, the display substrate can avoid crosstalk between adjacent sub-pixels caused by sub-functional layers with higher conductivity in the light-emitting functional layer.
  • the display substrate can avoid crosstalk between adjacent sub-pixels through the pixel isolation structure, the display substrate can increase the pixel density while adopting a double-layer light emitting (Tandem EL) design. Therefore, the display substrate can have the advantages of long life, low power consumption, high brightness, and high resolution.
  • Tandem EL double-layer light emitting
  • the orthographic projection of the concave structure 140C on the base substrate 110 overlaps with the orthographic projection of the shielding portion 140S on the base substrate 110 .
  • FIG. 27 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the concave structure 140C includes a residual structure 140R located at a position of the concave structure 140 close to the pixel defining layer 150 .
  • the material of the residual structure 140R includes metal, such as silver.
  • FIG. 28 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate shown in FIG. 28 provides another pixel isolation structure.
  • the display substrate 100 also includes a pixel defining layer 150 on the base substrate 110; the pixel defining layer 150 is partially located on the side of the first electrode 131 away from the base substrate 110; the pixel defining layer 150 includes a plurality of The pixel opening 152 and the pixel interval opening 154; the plurality of pixel openings 152 correspond one-to-one with the plurality of sub-pixels 200 to define the effective light-emitting area of the plurality of sub-pixels 200; the pixel opening 152 is configured to expose the first electrode 131, so that the first electrode 131 It is in contact with the subsequently formed light-emitting functional layer 120 .
  • the pixel spacing openings 154 are located between adjacent first electrodes 131 , and at least part of the isolation structure 140 is located in the pixel
  • the pixel isolation structure 140 includes a concave structure 140C and a shielding portion 140S.
  • the concave structure 140C is located at the edge of the pixel spacing opening 154 and is concave toward the pixel defining layer 150 .
  • the concave structure 140C may be concave toward the pixel defining layer 150 along a direction parallel to the base substrate 110 .
  • the shielding portion 140S is located on a side of the groove 140C away from the base substrate 110 , and is a part of the pixel defining layer 150 .
  • the conductive sublayer of the light-emitting functional layer is disconnected at the position where the shielding portion is located. Therefore, by disposing the above-mentioned pixel isolation structure between adjacent sub-pixels, the display substrate can avoid crosstalk between adjacent sub-pixels caused by sub-functional layers with higher conductivity in the light-emitting functional layer.
  • FIG. 29 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the concave structure 140C includes a residual structure 140R located at a position of the concave structure 140 close to the pixel defining layer 150 .
  • the material of the residual structure 140R includes at least one of metal, metal oxide, and organic matter;
  • the above-mentioned metal can be silver
  • the above-mentioned metal oxide can be indium zinc oxide
  • the above-mentioned The organic matter can be an amino polymer.
  • the material of the planar layer includes photoresist, polyimide (PI) resin, acrylic resin, silicon compound or polyacrylic resin. Therefore, the solvent of the flat layer is mainly composed of non-fluorinated organic solvents. Although these photoresists may contain a small amount of fluorination, they have not reached the level of being basically soluble in fluorinated liquids or perfluorinated solvents, so they can be used Orthogonal characteristics (the solution and the solvent do not react with each other), the above-mentioned pixel isolation structure can be formed by an etching process.
  • FIGS. 30A-30C are schematic steps of another method for manufacturing a display substrate provided by an embodiment of the present disclosure.
  • the method for manufacturing a display substrate includes:
  • the first electrode 131 and the sacrificial structure 430 are formed on the side of the flat layer 180 away from the base substrate 110 . It should be noted that the above residual structure may be a part of the sacrificial structure.
  • a pixel defining layer 150 is formed on a side of the first electrode 131 and the sacrificial structure 430 away from the base substrate 110 .
  • the pixel defining layer 150 includes a plurality of pixel openings 152 and pixel interval openings 154; the plurality of pixel openings 152 are arranged in one-to-one correspondence with the plurality of first electrodes 131; the pixel openings 152 are configured to expose the first electrodes 131, so that the first electrodes 131 It is in contact with the subsequently formed light-emitting functional layer 120 .
  • the pixel spacing opening 154 is located between adjacent first electrodes 131 , and the sacrificial structure 430 is partially exposed by the pixel spacing opening 154 .
  • the display substrate is etched using the pixel defining layer 150 as a mask to remove the sacrificial structure 430 to form the above-mentioned pixel isolation structure 140 .
  • 31A-31C are schematic steps of another method for manufacturing a display substrate provided by an embodiment of the present disclosure.
  • the method for manufacturing a display substrate includes:
  • the first electrode 131 , the protection structure 240 and the sacrificial structure 430 are formed on the side of the planar layer 180 away from the base substrate 110 , and the protection structure 240 and the first electrode 131 are arranged on the same layer.
  • the material of the protection structure 240 is the same as that of the first electrode 131 , and the material of the protection structure 240 is different from that of the sacrificial structure 430 .
  • a pixel defining layer 150 is formed on a side of the first electrode 131 and the sacrificial structure 430 away from the base substrate 110 .
  • the pixel defining layer 150 includes a plurality of pixel openings 152 and pixel interval openings 154; the plurality of pixel openings 152 are arranged in one-to-one correspondence with the plurality of first electrodes 131; the pixel openings 152 are configured to expose the first electrodes 131, so that the first electrodes 131 It is in contact with the subsequently formed light-emitting functional layer 120 .
  • the pixel spacing opening 154 is located between adjacent first electrodes 131 , and the sacrificial structure 430 is partially exposed by the pixel spacing opening 154 .
  • the display substrate is etched using the pixel defining layer 150 as a mask to remove the sacrificial structure 430 to form the above-mentioned pixel isolation structure 140 .

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种显示基板和显示装置。该显示基板包括衬底基板、多个子像素和隔断结构；多个子像素位于衬底基板上，各子像素包括发光元件，发光元件包括发光功能层和位于发光功能层的两侧的第一电极和第二电极，第二电极位于发光功能层和衬底基板之间，发光功能层包括电荷生成层；隔断结构位于衬底基板上，隔断结构位于相邻的子像素之间，发光功能层中的电荷生成层在隔断结构所在的位置断开。由此，该显示基板可通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。

Description

显示基板和显示装置
本申请要求于2021年11月30日递交的中国专利申请202111450504.X号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开实施例涉及一种显示基板和显示装置。
背景技术
随着显示技术的不断发展，有机发光二极管显示装置(OLED)因其广色域、高对比度、轻薄设计、自发光、以及宽视角等优点已经成为当前各大厂商的研究热点和技术发展的方向。
目前，有机发光二极管显示装置(OLED)已经广泛地应用到各种电子产品中，小到智能手环、智能手表、智能手机、平板电脑等电子产品，大到笔记本电脑、台式电脑、电视机等电子产品。因此，市场对于有源矩阵有机发光二极管显示装置的需求也日益旺盛。
发明内容
本公开实施例提供一种显示基板和显示装置。该显示基板包括衬底基板、多个子像素和隔断结构；多个子像素位于衬底基板上，各子像素包括发光元件，发光元件包括发光功能层和位于发光功能层的两侧的第一电极和第二电极，第二电极位于发光功能层和衬底基板之间，发光功能层包括电荷生成层；隔断结构位于衬底基板上，隔断结构位于相邻的子像素之间，发光功能层中的电荷生成层在隔断结构所在的位置断开。由此，该显示基板可通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。
本公开至少一个实施例提供一种显示基板，其包括：衬底基板；多个子像素，位于所述衬底基板上，各所述子像素包括发光元件，所述发光元件包括发光功能层和位于所述发光功能层的两侧的第二电极和第一电极，所述第一电极位于所述发光功能层和所述衬底基板之间，所述发光功能层包括导电子层；以 及隔断结构，位于所述衬底基板上，所述隔断结构位于相邻的所述子像素之间，所述发光功能层中的所述导电子层在所述隔断结构所在的位置断开。
例如，在本公开一实施例提供的显示基板中，所述隔断结构包括：第一子隔断结构；以及第二子隔断结构，所述第一子隔断结构和所述第二子隔断结构在相邻的所述子像素的排列方向上依次设置。
例如，本公开一实施例提供的显示基板还包括：像素限定层，位于所述衬底基板上，所述像素限定层部分位于所述第一电极远离所述衬底基板的一侧，所述像素限定层包括多个像素开口和像素间隔开口，所述多个像素开口与所述多个子像素一一对应以限定所述多个子像素的有效发光区域，所述像素开口被配置为暴露所述第一电极，所述像素间隔开口位于相邻的所述第一电极之间，所述隔断结构的至少部分位于所述像素间隔开口之中。
例如，在本公开一实施例提供的显示基板中，多个子像素包括多个第一颜色子像素、多个第二颜色子像素以及多个第三颜色子像素，所述隔断结构包括多个环状隔断部，各所述环状隔断部围绕一个所述第一颜色子像素、一个所述第二颜色子像素和一个所述第三颜色子像素中的一个。
例如，在本公开一实施例提供的显示基板中，所述多个环状隔断部包括多个第一环状隔断部，各所述第一环状隔断部围绕一个所述第二颜色子像素设置。
例如，在本公开一实施例提供的显示基板中，所述第一环状隔断部包括至少一个第一缺口。
例如，在本公开一实施例提供的显示基板中，所述隔断结构还包括：多个第一条状隔断部，各所述第一条状隔断部沿第一方向延伸；以及多个第二条状隔断部，各所述第二条状隔断部沿第二方向延伸；所述第一条状隔断部将在所述第一方向上相邻的两个第一环状隔断部相连，所述第二条状隔断部将在所述第二方向上相邻的两个第一环状隔断部相连，所述多个第一条状隔断部和所述多个第二条状隔断部将所述多个第一环状隔断部相连以在所述多个第一环状隔断部之外的区域形成多个第一网格结构和多个第二网格结构，所述第一网格结构围绕一个所述第一颜色子像素设置，所述第二网格结构围绕一个所述第三颜色子像素设置。
例如，本公开一实施例提供的显示基板还包括：隔垫物，所述多个第一条状隔断部和所述多个第二条状隔断部将所述多个第一环状隔断部相连还形成 多个第三网格结构，所述第三网格结构围绕相邻的一个所述第一颜色子像素和一个所述第三颜色子像素设置，所述隔垫物位于所述第三网格结构之内，且位于所述第一颜色子像素和所述第三颜色子像素之间。
例如，本公开一实施例提供的显示基板还包括：隔垫物，所述隔垫物位于所述第一网格结构或所述第二网格结构之内，且位于相邻的所述第一颜色子像素和所述第三颜色子像素之间。
例如，在本公开一实施例提供的显示基板中，所述隔断结构还包括：多个第二环状隔断部，各所述第二环状隔断部围绕一个所述第一颜色子像素设置；以及多个第三环状隔断部，各所述第三环状隔断部围绕一个所述第三颜色子像素设置。
例如，在本公开一实施例提供的显示基板中，所述隔断结构还包括：多个第二环状隔断部，各所述第二环状隔断部围绕一个所述第一颜色子像素设置；以及多个第三环状隔断部，各所述第三环状隔断部围绕一个所述第三颜色子像素设置，所述第三环状隔断部包括第二缺口，所述第三环状隔断部的第二缺口处的两端分别与在所述第一方向或所述第二方向上相邻的两个第一环状隔断部相连。
例如，本公开一实施例提供的显示基板还包括：隔垫物，所述隔垫物位于所述第三环状隔断部的第二缺口处。
例如，在本公开一实施例提供的显示基板中，所述多个第一颜色子像素和所述多个第三颜色子像素沿第一方向和第二方向均交替设置以形成多个第一像素行和多个第一像素列，所述多个第二颜色子像素沿所述第一方向和所述第二方向均阵列排布以形成多个第二像素行和多个第二像素列，所述多个第一像素行和所述多个第二像素行沿所述第二方向交替设置且在所述第一方向上彼此错开，所述多个第一像素列和所述多个第二像素列沿所述第一方向交替设置且在所述第二方向上彼此错开，所述隔断结构位于相邻的所述第一颜色子像素和所述第三颜色子像素之间，和/或，所述隔断结构位于相邻的所述第二颜色子像素与所述第三颜色子像素之间，和/或，所述隔断结构位于相邻的所述第一颜色子像素和所述第二颜色子像素之间。
例如，在本公开一实施例提供的显示基板中，所述多个子像素包括多个第一颜色子像素、多个第二颜色子像素以及多个第三颜色子像素，所述隔断结构包括多个第一环状隔断部，各所述第一环状隔断部围绕相邻的两个所述第二颜 色子像素设置。
例如，在本公开一实施例提供的显示基板中，所述隔断结构还包括：多个第二环状隔断部，各所述第二环状隔断部围绕一个所述第一颜色子像素设置；以及多个第三环状隔断部，各所述第三环状隔断部围绕一个所述第三颜色子像素设置。
例如，在本公开一实施例提供的显示基板中，所述多个第一环状隔断部、所述多个第二环状隔断部和所述多个第三环状隔断部中任意两个相邻的环状隔断部共用一个隔断边缘部。
例如，在本公开一实施例提供的显示基板中，所述多个子像素划分为多个子像素组，各子像素组包括一个第一颜色子像素、两个第二颜色子像素和一个第三颜色子像素，在各子像素组中，所述第一颜色子像素和所述第三颜色子像素沿第一方向排列，两个所述第二颜色子像素在第二方向上相邻设置，且位于所述第一颜色子像素和所述第三颜色子像素之间。
例如，在本公开一实施例提供的显示基板中，所述隔断结构包括：凹槽；遮挡部，所述遮挡部位于所述凹槽边缘且向所述凹槽内突出以形成覆盖所述凹槽的开口的一部分的突出部，所述发光功能层的导电子层在所述遮挡部的所述突出部处断开。
例如，在本公开一实施例提供的显示基板中，所述凹槽在相邻两个所述子像素的排列方向上的两个边缘分别设置有所述遮挡部。
例如，在本公开一实施例提供的显示基板中，所述隔断结构包括隔断柱，所述隔断柱包括层叠设置的第一隔离部和第二隔离部，所述第一隔离部位于所述第二隔离部的靠近所述衬底基板的一侧，所述第二隔离部在相邻两个所述子像素的排列方向上具有超出所述第一隔离部的突出部，所述发光功能层的导电子层在所述第二隔离部的所述突出部处断开。
例如，在本公开一实施例提供的显示基板中，所述发光功能层包括位于所述导电子层在垂直于所述衬底基板的方向上的两侧的第一发光层和第二发光层，所述导电子层为电荷生成层。
例如，在本公开一实施例提供的显示基板中，所述第二电极在所述隔断结构所在的位置断开。
例如，本公开一实施例提供的显示基板还包括：平坦层，位于所述第一电极靠近所述衬底基板的一侧；多条数据线，位于所述平坦层与所述衬底基板之 间，所述多条数据线沿第一方向延伸且沿第二方向排列，所述第一方向和所述第二方向相交；多条电源线，位于所述平坦层与所述衬底基板之间，所述多条电源线沿所述第一方向延伸且沿所述第二方向排列，沿垂直于所述衬底基板的方向，所述隔断结构与所述数据线和所述电源线的至少之一交叠。
本公开至少一个实施例还提供一种显示装置，其包括上述任一项的显示基板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为本公开一实施例提供的一种显示基板的平面示意图；
图2为本公开一实施例提供的一种显示基板沿图1中AB方向的剖面示意图；
图3为本公开一实施例提供的另一种显示基板的平面示意图；
图4为本公开一实施例提供的另一种显示基板的平面示意图；
图5为本公开一实施例提供的一种显示基板沿图4中CD方向的剖面示意图；
图6为本公开一实施例提供的另一种显示基板的平面示意图；
图7为本公开一实施例提供的另一种显示基板的平面示意图；
图8为本公开一实施例提供的另一种显示基板的平面示意图；
图9为本公开一实施例提供的另一种显示基板的平面示意图；
图10为本公开一实施例提供的另一种显示基板的平面示意图；
图11为本公开一实施例提供的另一种显示基板的平面示意图；
图12为本公开一实施例提供的另一种显示基板的平面示意图；
图13为本公开一实施例提供的一种显示基板的局部剖面示意图；
图14为本公开一实施例提供的一种显示装置的示意图；
图15为本公开一实施例提供的另一种显示基板的平面示意图；
图16为本公开一实施例提供的一种显示基板沿图15中EF线的剖面示意图；
图17A为本公开一实施例提供的另一种显示基板的局部剖面示意图；
图17B为本公开一实施例提供的一种显示基板的剖面电镜图；
图18为本公开一实施例提供的另一种显示装置的示意图；
图19为本公开一实施例提供的一种显示基板的局部截面示意图；
图20为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图21A为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图21B为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图22A至图22D为形成图19所示显示基板之前的显示基板的制作方法流程示意图；
图23为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图24A至图24D为形成图23所示显示基板之前的显示基板的制作方法流程示意图；
图25为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图26为本公开一实施例提供的另一种显示基板的结构示意图；
图27为本公开一实施例提供的另一种显示基板的结构示意图；
图28为本公开一实施例提供的另一种显示基板的结构示意图；
图29为本公开一实施例提供的另一种显示基板的结构示意图；
图30A-图30C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图；以及
图31A-图31C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所 有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
本公开实施例中使用的“平行”、“垂直”以及“相同”等特征均包括严格意义的“平行”、“垂直”、“相同”等特征，以及“大致平行”、“大致垂直”、“大致相同”等包含一定误差的情况，考虑到测量和与特定量的测量相关的误差(例如，测量系统的限制)，表示在本领域的普通技术人员所确定的对于特定值的可接受的偏差范围内。例如，“大致”能够表示在一个或多个标准偏差内，或者在所述值的10％或者5％内。在本公开实施例的下文中没有特别指出一个成分的数量时，意味着该成分可以是一个也可以是多个，或可理解为至少一个。“至少一个”指一个或多个，“多个”指至少两个。本公开实施例中的“同层”指同一材料在经过同一步骤(例如一步图案化工艺)后形成的多个膜层之间的关系。这里的“同层”并不总是指多个膜层的厚度相同或者多个膜层在截面图中的高度相同。
随着显示技术的不断发展，人们对于显示品质的追求也越来越高。为了进一步降低功耗并实现高亮度，可将OLED中的发光元件中的单层发光层替换为两层发光层，并在双层发光层之间增加电荷生成层(CGL)，以实现一种双层发光(Tandem EL)设计。由于采用双层发光(Tandem EL)设计的显示装置具有两个发光层，因此其发光亮度可近似等价于单个发光层的两倍。由此，采用双层发光设计的显示装置具有寿命长、功耗低、亮度高等优点。
然而，本申请的发明人注意到，对于高分辨率的产品而言，由于电荷生成层具有较强的导电性而相邻的子像素的发光功能层(这里指包括两个发光层和电荷生成层的膜层)是相连的，因此电荷生成层容易导致相邻子像素之间的串扰，从而严重地影响显示品质。
对此，本公开实施例提供一种显示基板和显示装置。该显示基板包括衬底基板、多个子像素和隔断结构；多个子像素位于衬底基板上，各子像素包括发光元件，发光元件包括发光功能层和位于发光功能层的两侧的第一电极和第二 电极，第二电极位于发光功能层和衬底基板之间，发光功能层包括电荷生成层；隔断结构位于衬底基板上，隔断结构位于相邻的子像素之间，发光功能层中的电荷生成层在隔断结构所在的位置断开。由此，该显示基板可通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。
下面，结合附图对本公开实施例提供的显示基板和显示装置进行详细的说明。
本公开一实施例提供一种显示基板。图1为本公开一实施例提供的一种显示基板的平面示意图；图2为本公开一实施例提供的一种显示基板沿图1中AB方向的剖面示意图。
如图1和图2所示，该显示基板100包括衬底基板110和多个子像素200；多个子像素200位于衬底基板110上，各子像素200包括发光元件210；各发光元件210包括发光功能层120和位于发光功能层120的两侧的第一电极131和第二电极132，第一电极131位于发光功能层120与衬底基板110之间；第二电极132至少部分位于发光功能层120远离第一电极131的一侧；也就是说，第一电极131和第二电极132位于在垂直于发光功能层120的方向上的两侧。发光功能层120包括多个子功能层，多个子功能层包括导电率较高的导电子层129。需要说明的是，上述的发光功能层并非仅包括直接进行发光的膜层，还包括用于辅助发光的功能膜层，例如：空穴传输层、电子传输层等。
例如，导电子层129可为电荷生成层。例如，第一电极131可为阳极，第二电极132可为阴极。例如，阴极可由高导电性和低功函数的材料形成，例如，阴极可采用金属材料制成。例如，阳极可由具有高功函数的透明导电材料形成。
如图1和图2所示，该显示基板100还包括隔断结构140，隔断结构140位于衬底基板110上，且位于相邻的子像素200之间；发光功能层120中的电荷生成层129在隔断结构140所在的位置断开。需要说明的是，发光功能层中的电荷生成层在断开的位置为非连续结构或者非一体结构。
在本公开实施例提供的显示基板中，通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。另一方面，由于该显示基板可通过隔断结构避免相邻子像素之间的串扰，因此该显示基板可在采用双层发光(Tandem EL)设计的同时，提高像素密度。所以，该显示基板可具有 寿命长、功耗低、亮度高、分辨率高等优点。
在一些示例中，“相邻子像素”指两个子像素之间没有设置其他子像素。
在一些示例中，如图1和图2所示，相邻的两个子像素200的亮度中心的连线穿过该隔断结构140。由于电荷生成层在该连线的延伸方向上的尺寸较小，电荷生成层在该连线的延伸方向上的电阻也较小，电荷容易从相邻的两个子像素中的一个通过电荷生成层沿该连线的延伸方向转移到相邻的两个子像素中的另一个。因此，该显示基板使该连线穿过该隔断结构，可让隔断结构有效地阻断电荷的最短传播路径，从而可有效地避免相邻子像素之间的串扰。需要说明的是，各个子像素的亮度中心可为该子像素的有效发光区域的几何中心。当然，本公开实施例包括但不限于此，各个子像素的亮度中心也可为该子像素的发光亮度最大值所在的位置。
在一些示例中，如图1和图2所示，该显示基板100还包括位于衬底基板110上的像素限定层150；像素限定层150部分位于第一电极131远离衬底基板110的一侧；像素限定层150包括多个像素开口152和像素间隔开口154；多个像素开口152与多个子像素200一一对应以限定多个子像素200的有效发光区域；像素开口152被配置为暴露第一电极131，以便第一电极131与后续形成的发光功能层120接触。像素间隔开口154位于相邻的第一电极131之间，隔断结构140的至少部分位于像素间隔开口154之中。由此，该显示基板可避免在像素限定层上制作隔断结构，从而避免增加该显示基板的厚度。当然，本公开实施例包括但不限于此，像素限定层也可不设置上述的像素间隔开口，从而隔断结构可直接设置在像素限定层上，或者利用像素限定层制作隔断结构。
例如，像素限定层的材料可包括有机材料，例如聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等。
在一些示例中，如图2所示，隔断结构140可为隔断柱；此时，隔断结构140包括层叠设置的第一隔离部1405和第二隔离部1406，第一隔离部1405位于第二隔离部1406的靠近衬底基板110的一侧；第二隔离部1406在相邻两个子像素200的排列方向上具有超出第一隔离部1405的突出部1407，发光功能层120的导电子层129在突出部1407处断开。由此，该隔断结构可实现将发光功能层的导电子层断开。需要说明的是，本公开实施例提供的隔断结构并不限于上述的隔断柱的形式，隔断结构也可采用其他可以实现将发光功能层的导电子层断开的结构；另外，上述的排列方向可为相邻两个子像素的亮度中心的 连线的延伸方向。
在一些示例中，如图2所示，多个子像素200共用第二电极132，并且第二电极132在隔断结构140所在的位置处断开。然而，本公开实施例包括但不限于此，第二电极也可在隔断结构所在的位置处不断开。
在一些示例中，如图2所示，发光功能层120包括位于导电子层129在垂直于衬底基板110的方向上的两侧的第一发光层121和第二发光层122，导电子层129为电荷生成层。由此，该显示基板可实现一种双层发光(Tandem EL)设计，因此具有寿命长、功耗低、亮度高等优点。
在一些示例中，如图2所示，发光功能层120中的第一发光层121和第二发光层122也在隔断结构140所在的位置处断开。然而，本公开实施例包括但不限于此，发光功能层中的第一发光层和第二发光层也可不在隔断结构所在的位置处断开，而仅仅导电子层在隔断结构所在的位置处断开。
在一些示例中，导电子层129的导电率大于第一发光层121的导电率和第二发光层122的导电率，且小于第二电极132的导电率。
例如，如图2所示，第一发光层121位于导电子层129靠近衬底基板110的一侧；第二发光层122位于导电子层129远离衬底基板110的一侧。
需要说明的是，发光功能层还可包括除了导电子层、第一发光层和第二发光层之外的其他子功能层，例如，空穴注入层、空穴传输层、电子注入层和电子传输层。
例如，第一发光层和第二发光层的材料可选自芘衍生物、蒽衍生物、芴衍生物、苝衍生物、苯乙烯基胺衍生物、金属配合物等。
例如，空穴注入层的材料可包括氧化物，例如：钼氧化物、钛氧化物、钒氧化物、铼氧化物、钌氧化物、铬氧化物、锆氧化物、铪氧化物、钽氧化物、银氧化物、钨氧化物、锰氧化物。
例如，空穴注入层的材料也可包括有机材料，例如：六氰基六氮杂三亚苯基、2,3,5,6-四氟-7,7,8,8-四氰基对醌二甲烷(F4TCNQ)、1,2,3-三[(氰基)(4-氰基-2,3,5,6-四氟苯基)亚甲基]环丙烷。
例如，空穴传输层的材料可包括具有空穴传输特性的芳胺类以及二甲基芴或者咔唑材料，例如：4,4’-双[N-(1-萘基)-N-苯基氨基]联苯(NPB)、N,N’-双(3-甲基苯基)-N,N’-二苯基-[1,1’-联苯]-4,4’-二胺(TPD)、4-苯基-4’-(9-苯基芴-9-基)三苯基胺(BAFLP)、4,4’-双[N-(9,9-二甲基芴-2-基)-N-苯基氨基] 联苯(DFLDPBi)、4,4’-二(9-咔唑基)联苯(CBP)、9-苯基-3-[4-(10-苯基-9-蒽基)苯基]-9H-咔唑(PCzPA)。
例如，电子传输层的材料可包括芳族杂环化合物，例如：苯并咪唑衍生物、咪唑衍生物、嘧啶衍生物、嗪衍生物、喹啉衍生物、异喹啉衍生物、菲咯啉衍生物等。
例如，电子注入层的材料可为碱金属或者金属及其它们的化合物，例如：氟化锂(LiF)、镱(Yb)、镁(Mg)、钙(Ca)。
在一些示例中，第一电极131可以采用金属材料，如镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等，或者，是金属和透明导电材料形成的堆栈结构，如ITO/Ag/ITO、Mo/AlNd/ITO等反射型材料。
在一些示例中，第二电极132可以采用镁(Mg)、银(Ag)、铝(Al)中的任意一种或更多种，或采用上述金属中任意一种或多种制成的合金，或者采用透明导电材料，例如，氧化铟锡(ITO)，或者，金属与透明导电材料的多层复合结构。
在一些示例中，电荷生成层129可以被配置为产生载流子、传输载流子和注入载流子。例如，电荷生成层129的材料可包括n型掺杂的有机层/无机金属氧化物，如Alq 3:Mg/WO 3，Bphen:Li/MoO 3，BCP:Li/V 2O 5和BCP:Cs/V 2O 5；或者，n型掺杂的有机层/有机层，如Alq 3:Li/HAT-CN；或者，n型掺杂的有机层/p型掺杂的有机层，如BPhen:Cs/NPB:F4-TCNQ，Alq 3:Li/NPB:FeCl 3，TPBi:Li/NPB:FeCl 3和Alq 3:Mg/m-MTDATA:F4-TCNQ；或者，非掺杂型，如F 16CuPc/CuPc和Al/WO 3/Au。
在一些示例中，衬底基板110的材料可以由玻璃、聚酰亚胺、聚碳酸酯、聚丙烯酸酯、聚醚酰亚胺、聚醚砜中的一种或多种材料制成，本实施例包括但不限于此。
在一些示例中，衬底基板可为刚性基板或者柔性基板；当衬底基板为柔性基板时，衬底基板可以包括依次层叠设置的第一柔性材料层、第一无机材料层、半导体层、第二柔性材料层和第二无机材料层。第一柔性材料层、第二柔性材料层的材料采用聚酰亚胺(PI)、聚对苯二甲酸乙二酯(PET)或经表面处理的聚合物软膜等材料。第一无机材料层、第二无机材料层的材料采用氮化硅 (SiNx)或氧化硅(SiOx)等，用于提高衬底基板的抗水氧能力，第一无机材料层、第二无机材料层也称之为阻挡(Barrier)层。半导体层的材料采用非晶硅(a-si)。
例如，以衬底基板为叠层结构PI1/Barrier1/a-si/PI2/Barrier2为例，该衬底基板的制备过程包括：先在玻璃载板上涂布一层聚酰亚胺，固化成膜后形成第一柔性(PI1)层；随后在第一柔性层上沉积一层阻挡薄膜，形成覆盖第一柔性层的第一阻挡(Barrier1)层；然后在第一阻挡层上沉积一层非晶硅薄膜，形成覆盖第一阻挡层的非晶硅(a-si)层；然后在非晶硅层上再涂布一层聚酰亚胺，固化成膜后形成第二柔性(PI2)层；然后在第二柔性层上沉积一层阻挡薄膜，形成覆盖第二柔性层的第二阻挡(Barrier2)层，最终完成衬底基板的制备。
在一些示例中，如图1所示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203；隔断结构140包括多个第一环状隔断部141，第一环状隔断部141围绕至少一个所述第二颜色子像素202设置。由此，发光功能层120中的电荷生成层129可在第一环状隔断部141断开，第一环状隔断部141可将第二颜色子像素202与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰。需要说明的是，虽然图2示出的第一环状隔断部仅围绕一个第二颜色子像素设置，但本公开实施例包括但不限于此，各第一环状隔断部也可围绕两个或者更多第二颜色子像素。
例如，如图1所示，各第一环状隔断部141围绕一个所述第二颜色子像素202设置。由此，发光功能层120中的电荷生成层129可在第一环状隔断部141断开，第一环状隔断部141可将每个第二颜色子像素202与其他子像素隔开。
例如，如图1所示，在显示基板100中，第二颜色子像素202的数量大于第一颜色子像素201的数量；或者，第二颜色子像素202的数量大于第三颜色子像素203的数量；或者，第二颜色子像素202的数量大于第一颜色子像素201的数量和第三颜色子像素203的数量。由此，通过在第二颜色子像素202的外侧设置第一环状隔断部141，就可以将显示基板上大部分相邻的子像素隔开，从而可有效地避免相邻子像素之间的串扰。
例如，如图1所示，在显示基板100中，第二颜色子像素202的数量大致为第一颜色子像素201的数量或第三颜色子像素203的两倍。
在一些示例中，如图1所示，隔断结构140还包括多个第一条状隔断部144 和多个第二条状隔断部145；第一条状隔断部144沿第一方向延伸，第二条状隔断部145沿第二方向延伸；第一条状隔断部144将在第一方向上相邻的两个第一环状隔断部141相连，第二条状隔断部145将在第二方向上相邻的两个第一环状隔断部141相连。多个第一条状隔断部144和多个第二条状隔断部145将多个第一环状隔断部141相连以在多个第一环状隔断部141之外的区域形成多个第一网格结构161和多个第二网格结构162，第一网格结构161围绕一个第一颜色子像素201设置，第二网格结构162围绕一个第三颜色子像素203设置。由此，第一条状隔断部可将在第二方向上相邻的第一颜色子像素和第三颜色子像素隔开，使得发光功能层中的电荷生成层在第一条状隔断部所在的位置处断开，从而可有效地避免在第二方向上相邻的第一颜色子像素和第三颜色子像素之间的串扰；第二条状隔断部可将在第一方向上相邻的第一颜色子像素和第三颜色子像素隔开，使得发光功能层中的电荷生成层在第二条状隔断部所在的位置处断开，从而可有效地避免在第一方向上相邻的第一颜色子像素和第三颜色子像素之间的串扰。
例如，第一方向和第二方向相交，例如，第一方向和第二方向相互垂直。
在一些示例中，如图1所示，该显示基板100还包括隔垫物170；多个第一条状隔断部144和多个第二条状隔断部145将多个第一环状隔断部141相连还形成多个第三网格结构163，第三网格结构163围绕相邻的一个第一颜色子像素201和一个第三颜色子像素203设置，隔垫物170位于第三网格结构163之内，且位于第一颜色子像素201和第三颜色子像素203之间。由此，当第一网格结构和第二网格结构之内的空间不足以放置隔垫物时，通过设置上述的第三网格结构可为隔垫物提供足够的放置空间；另外，由于隔垫物具有一定的高度，并且位于第三网格结构中的第一颜色子像素和第三颜色子像素之间，因此隔垫物也可起到防止第三网格结构中的第一颜色子像素和第三颜色子像素之间的串扰。需要说明的是，隔垫物用于支撑制作上述的发光层的蒸镀掩模板。
在一些示例中，如图1所示，多个第一颜色子像素201和多个第三颜色子像素203沿第一方向和第二方向均交替设置以形成多个第一像素行310和多个第一像素列320，多个第二颜色子像素202沿第一方向和第二方向均阵列排布以形成多个第二像素行330和多个第二像素列340，多个第一像素行310和多个第二像素行330沿第二方向交替设置且在第一方向上彼此错开，多个第一像素列320和多个第二像素列340沿第一方向交替设置且在第二方向上彼此错 开。隔断结构140位于相邻的第一颜色子像素201和第三颜色子像素203之间，和/或，隔断结构140位于相邻的第二颜色子像素202与第三颜色子像素203之间，和/或，隔断结构140位于相邻的第一颜色子像素201和第二颜色子像素202之间。
在一些示例中，第三颜色子像素的发光效率小于第二颜色子像素的发光效率。
例如，第一颜色子像素201被配置为发红光，第二颜色子像素202被配置为发绿光，第三颜色子像素203被配置为发蓝光。当然，本公开实施例包括但不限于此。
在一些示例中，如图1所示，第一颜色子像素201的有效发光区域在衬底基板110上的正投影的形状包括圆角矩形；第二颜色子像素202的有效发光区域在衬底基板110上的正投影的形状包括圆角矩形；第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括圆角矩形。需要说明的是，上述的有效发光区域大致可为子像素对应的像素开口所限定的区域。
在一些示例中，如图1所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括多个圆角部，多个圆角部包括第一圆角部2031，第一圆角部2031的圆弧半径大于其他圆角部的圆弧半径。此时，由于第一圆角部2031的圆弧半径较大，使得第一圆角部2031占据的空间较小，因此可将隔垫物170设置在第一圆角部2031附近，从而可充分利用显示基板上的面积，提高像素密度。此时，第一圆角部2031为第三颜色子像素203的多个圆角部中与第一颜色子像素201的距离最小的圆角部。
在一些示例中，如图1所示，隔垫物170在衬底基板110上的正投影位于第一圆角部2031的中点与第一颜色子像素201的亮度中心的连线上。
在一些示例中，如图1所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括多个圆角部，多个圆角部包括第一圆角部2031和第二圆角部2032，第一圆角部2031的圆弧半径大于第二圆角部2031的圆弧半径；并且，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状关于第一圆角部2031和第二圆角部2032的连线呈轴对称。
图3为本公开一实施例提供的另一种显示基板的平面示意图。如图3所示，第一环状隔断部141包括至少一个缺口1410。当第二颜色子像素外部设置有第一环状隔断部时，不仅发光功能层中的电荷生成层会在第一环状隔断部产生断 裂，发光功能层之上的第二电极也有可能在第一环状隔断部所在的位置断裂，从而导致阴极信号无法传递给该第二颜色子像素。因此，通过在第一环状隔断部上设置至少一个缺口，该显示基板可避免第一环状隔断部将第二颜色子像素完全隔离，从而可避免阴极信号无法传递的现象。
在一些示例中，如图3所示，第二颜色子像素202被两个第一颜色子像素201和两个第三颜色子像素203围绕；此时，第一环状隔断部141包括四个缺口1410，分别位于该第二颜色子像素202与相邻的四个子像素200之间。由此，通过设置上述的缺口，可使得第二颜色子像素与周围的四个子像素之间的第二电极或阴极不会断开，从而便于传递阴极信号。需要说明的是，虽然第一环状隔断部设置了上述的缺口，但是由于缺口的尺寸相对较小，可大大增加缺口位置处的导电子层(例如电荷生成层)的电阻，从而有效地阻碍电流的通过，进而有效地避免相邻子像素之间的串扰。并且，由于第二电极的导电率大于导电子层的导电率，并且多个子像素共用第二电极，存在多个导电通道，因此即使缺口的尺寸相对较小，也不会阻碍阴极信号的传递。
在一些示例中，如图3所示，第二颜色子像素202的第一电极131包括电极连接部1312，电极连接部1312在衬底基板110上的正投影与第一环状隔断部141的缺口1410在衬底基板110上的正投影至少部分交叠。由此，该显示基板可利用第一环状隔断部的缺口所在的位置来设置电极连接部，从而可使得子像素布局更加紧凑，提高像素密度。需要说明的是，各个子像素的亮度中心可为该子像素的有效发光区域的几何中心。当然，本公开实施例包括但不限于此，各个子像素的亮度中心也可为该子像素的发光亮度最大值所在的位置。
在一些示例中，如图3所示，第一颜色子像素201的第一电极131也包括电极连接部1312，第三颜色子像素203的第一电极131也包括电极连接部1312；第一颜色子像素201和第三颜色子像素203的电极连接部1312在衬底基板110上的正投影也与第一环状隔断部141的缺口1410在衬底基板110上的正投影至少部分交叠。由此，该显示基板可进一步利用第一环状隔断部的缺口所在的位置来设置第一颜色子像素和第三颜色子像素的电极连接部，从而可使得子像素布局更加紧凑，提高像素密度。
在一些示例中，如图3所示，隔断结构140还包括多个第一条状隔断部144和多个第二条状隔断部145；各第一条状隔断部144沿第一方向延伸，各第二条状隔断部145沿第二方向延伸；第一条状隔断部144将在第一方向上相邻的 两个第一环状隔断部141相连，第二条状隔断部145将在第二方向上相邻的两个第一环状隔断部141相连。多个第一条状隔断部144和多个第二条状隔断部145将多个第一环状隔断部141相连以在多个第一环状隔断部141之外的区域形成多个第一网格结构161和多个第二网格结构162，第一网格结构161围绕一个第一颜色子像素201设置，第二网格结构162围绕一个第三颜色子像素203设置。由此，第一条状隔断部可将在第二方向上相邻的第一颜色子像素和第三颜色子像素隔开，使得发光功能层中的电荷生成层在第一条状隔断部所在的位置处断开，从而可有效地避免在第二方向上相邻的第一颜色子像素和第三颜色子像素之间的串扰；第二条状隔断部可将在第一方向上相邻的第一颜色子像素和第三颜色子像素隔开，使得发光功能层中的电荷生成层在第二条状隔断部所在的位置处断开，从而可有效地避免在第一方向上相邻的第一颜色子像素和第三颜色子像素之间的串扰。
例如，第一方向和第二方向相交，例如，第一方向和第二方向相互垂直。
在一些示例中，如图3所示，第一环状隔断部141的缺口1410也作为第一网格结构161的缺口和第二网格结构162的缺口。由此，位于第一网格结构161中的第一颜色子像素201的第二电极和位于第二网格结构162中的第三颜色子像素203的第二电极不会完全断开，从而便于传递阴极信号。
在一些示例中，如图3所示，该显示基板100还包括隔垫物170；隔垫物170位于第一网格结构161之内，且位于第一颜色子像素201和第三颜色子像素203之间。当第一网格结构中的空间足够放置隔垫物时，可直接在第一网格结构中放置隔垫物。需要说明的是，本公开实施例包括但不限于此，隔垫物也可位于第二网格结构之内；另外，上述的“网格结构之内”是指被网格结构包围的空间之内，并非网格结构本身之内。
图4为本公开一实施例提供的另一种显示基板的平面示意图。如图4所示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203；隔断结构140包括多个第一环状隔断部141，多个第二环状隔断部142和多个第三环状隔断部143；各第一环状隔断部141围绕一个所述第二颜色子像素202设置；各第二环状隔断部142围绕一个第一颜色子像素201设置；各第三环状隔断部143围绕一个第三颜色子像素203设置。
在图4所示的显示基板中，发光功能层120中的电荷生成层129可在第一环状隔断部141、第二环状隔断部142和第三环状隔断部143断开，第一环状 隔断部141可将第二颜色子像素202与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰；第二环状隔断部142可将第一颜色子像素201与其他子像素隔开，从而可避免第一颜色子像素与相邻子像素之间的串扰；第三环状隔断部143可将第三颜色子像素203与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰。
图5为本公开一实施例提供的一种显示基板沿图4中CD方向的剖面示意图。如图5所示，第一颜色子像素201和第二颜色子像素202之间的隔断结构140包括第一环状隔断部141的一部分和第二环状隔断部142的一部分；此时，第一环状隔断部141的一部分可作为该隔断结构140的第一子隔断结构140A，第二环状隔断部142的一部分可作为该隔断结构140的第二子隔断结构140B。第一子隔断结构140A和第二子隔断结构140B在相邻的子像素200的排列方向上依次设置。当发光功能层中的电荷生成层在第一子隔断结构所在的位置处没有断开或者彻底断开时，发光功能层中的电荷生成层可在第二子隔断结构所在的位置处断开。由此，通过在相邻的子像素的排列方向上依次设置第一子隔断结构和第二子隔断结构，该显示基板可更好地使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而进一步避免导电性较高的电荷生成层造成相邻子像素之间的串扰。当然，本公开实施例包括但不限于此，当相邻子像素之间的间隔距离较小时，也可仅设置一个子隔断结构。
在一些示例中，如图4所示，第一环状隔断部141和第二环状隔断部142均为完整的环状结构，不包括缺口；而第三环状隔断部143包括缺口1430，第三环状隔断部143的缺口1430处的两端分别与在第一方向或第二方向上相邻的两个第一环状隔断部141相连。由此，当显示基板的像素密度较高，且隔断结构包括上述的第一环状隔断部、第二环状隔断部和第三环状隔断部时，相邻环状隔断部之间的间隔可能不足以设置隔垫物；此时，通过在第三环状隔断部设置缺口，该显示基板可在缺口所在的位置设置隔垫物；并且，由于第三环状隔断部的缺口处的两端分别与在第一方向或第二方向上相邻的两个第一环状隔断部相连，该显示基板可更好地避免相邻子像素之间的串扰。
需要说明的是，虽然图4所示的显示基板的第三环状隔断部上设置有缺口，但本公开实施例包括但不限于此，第三环状隔断部也可为完整的环状结构。另外，当第一环状隔断部、第二环状隔断部或第三环状隔断部为完整的环状结构时，可通过控制环状隔断结构的高度、深度或者其他参数来使得发光功能层中 的导电子层在环状隔断结构所在的位置处断开，而第二电极在环状隔断结构所在的位置不断开。
在一些示例中，如图4所示，第一颜色子像素201的有效发光区域在衬底基板110上的正投影的形状包括圆角矩形；第二颜色子像素202的有效发光区域在衬底基板110上的正投影的形状包括圆角矩形；第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括圆角矩形。
在一些示例中，如图4所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括多个圆角部，多个圆角部包括第一圆角部2031，第一圆角部2031的圆弧半径大于其他圆角部的圆弧半径。此时，由于第一圆角部2031的圆弧半径较大，使得第一圆角部2031占据的空间较小，因此可将第三环状隔断部143的缺口1430设置在第一圆角部2031附近，隔垫物170也对应设置在第一圆角部2031附件，从而可充分利用显示基板上的面积，提高像素密度。此时，第一圆角部2031为第三颜色子像素203的多个圆角部中与第一颜色子像素201的距离最小的圆角部。
在一些示例中，如图4所示，隔垫物170在衬底基板110上的正投影位于第一圆角部2031的中点与第一颜色子像素201的亮度中心的连线上。
在一些示例中，如图4所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括多个圆角部，多个圆角部包括第一圆角部2031和第二圆角部2032，第一圆角部2031的圆弧半径大于第二圆角部2031的圆弧半径；并且，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状关于第一圆角部2031和第二圆角部2032的连线呈轴对称。
在一些示例中，如图4所示，第一颜色子像素201的有效发光区域在衬底基板110上的正投影的形状也包括多个圆角部，并且这些圆角部的圆弧半径相等。
在一些示例中，如图4所示，第二颜色子像素202的有效发光区域在衬底基板110上的正投影的形状也包括多个圆角部，并且这些圆角部的圆弧半径相等。
在一些示例中，如图4所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的面积大于第一颜色子像素201的有效发光区域在衬底基板110上的正投影的面积；第一颜色子像素201的有效发光区域在衬底基板110上的正投影的面积大于第二颜色子像素202的有效发光区域在衬底基板110上 的正投影的面积。当然，本公开实施例包括但不限于此，各子像素的有效发光区域的面积可根据实际需要进行设置。
在一些示例中，如图4所示，多个第一颜色子像素201和多个第三颜色子像素203沿第一方向和第二方向均交替设置以形成多个第一像素行310和多个第一像素列320，多个第二颜色子像素202沿第一方向和第二方向均阵列排布以形成多个第二像素行330和多个第二像素列340，多个第一像素行310和多个第二像素行330沿第二方向交替设置且在第一方向上彼此错开，多个第一像素列320和多个第二像素列340沿第一方向交替设置且在第二方向上彼此错开。隔断结构140位于相邻的第一颜色子像素201和第三颜色子像素203之间，和/或，隔断结构140位于相邻的第二颜色子像素202与第三颜色子像素203之间，和/或，隔断结构140位于相邻的第一颜色子像素201和第二颜色子像素202之间。
在一些示例中，第三颜色子像素的发光效率小于第二颜色子像素的发光效率。
例如，第一颜色子像素201被配置为发红光，第二颜色子像素202被配置为发绿光，第三颜色子像素203被配置为发蓝光。当然，本公开实施例包括但不限于此。
图6为本公开一实施例提供的另一种显示基板的平面示意图。如图6所示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203；多个第一颜色子像素201和多个第三颜色子像素203沿第一方向和第二方向均交替设置以形成多个第一像素行310和多个第一像素列320，多个第二颜色子像素202沿第一方向和第二方向均阵列排布以形成多个第二像素行330和多个第二像素列340，多个第一像素行310和多个第二像素行330沿第二方向交替设置且在第一方向上彼此错开，多个第一像素列320和多个第二像素列340沿第一方向交替设置且在第二方向上彼此错开。隔断结构140包括多个第一环状隔断部141，多个第二环状隔断部142和多个第三环状隔断部143；各第一环状隔断部141围绕一个所述第二颜色子像素202设置；各第二环状隔断部142围绕一个第一颜色子像素201设置；各第三环状隔断部143围绕一个第三颜色子像素203设置。
在图6所示的显示基板中，发光功能层120中的电荷生成层129可在第一环状隔断部141、第二环状隔断部142和第三环状隔断部143断开，第一环状 隔断部141可将第二颜色子像素202与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰；第二环状隔断部142可将第一颜色子像素201与其他子像素隔开，从而可避免第一颜色子像素与相邻子像素之间的串扰；第三环状隔断部143可将第三颜色子像素203与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰。
在一些示例中，如图6所示，第一环状隔断部141包括至少一个缺口1410，第二环状隔断部142包括至少一个缺口1420，第三环状隔断部143包括至少一个缺口1430。当发光功能层之上的第二电极有可能在第一环状隔断部、第二环状隔断部和第三环状隔断部所在的位置断裂时，通过在第一环状隔断部上设置至少一个缺口，在第二环状隔断部上设置至少一个缺口，在第三环状隔断部上设置至少一个缺口，该显示基板可避免第一环状隔断部、第二环状隔断部和第三环状隔断部将子像素完全隔离，从而可避免阴极信号无法传递的现象。
在一些示例中，如图6所示，第一环状隔断部141、第二环状隔断部142和第三环状隔断部143中任意相邻的两个环状隔断部的缺口错位设置，以保证相邻两个子像素之间至少存在隔断结构，从而可有效地避免相邻子像素之间的串扰。
在一些示例中，如图6所示，在相邻设置的第一颜色子像素201和第二颜色子像素202之间，电荷从第一颜色子像素201传播到第二颜色子像素202的最短路径为第一颜色子像素201的有效发光区域和第二颜色子像素202的有效发光区域的中心连线所在的位置。为了有效地避免第一颜色子像素201和第二颜色子像素202之间的串扰，第一颜色子像素201的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上需要设置隔断结构。因此，第二颜色子像素202外侧的第一环状隔断部141的缺口1410和第一颜色子像素201外侧的第二环状隔断部142的缺口1420不能同时位于第一颜色子像素201的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上。需要说明的是，当电荷无法沿最短路径从第一颜色子像素201传播到第二颜色子像素202，并且至少需要绕开第一环状隔断部141或者第二环状隔断部142时，由于电荷的传播路径较长，发光功能层中的电荷生成层的电阻较大，也能有效避免相邻子像素之间的串扰。
例如，如图6所示，在相邻设置的第一颜色子像素201和第二颜色子像素202之间，第二环状隔断部142的缺口1420与第一颜色子像素201的有效发光 区域和第二颜色子像素202的有效发光区域的中心连线间隔设置。也就是说，第二环状隔断部142的缺口1420不设置在第一颜色子像素201的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上。
在一些示例中，如图6所示，类似地，在相邻设置的第三颜色子像素203和第二颜色子像素202之间，为了有效地避免第三颜色子像素203和第二颜色子像素202之间的串扰，第三颜色子像素203的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上也需要设置隔断结构。因此，第三颜色子像素202外侧的第一环状隔断部141的缺口1410和第三颜色子像素203外侧的第三环状隔断部143的缺口1430不能同时位于第三颜色子像素203的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上。
例如，如图6所示，在相邻设置的第三颜色子像素203和第二颜色子像素202之间，第二环状隔断部142的缺口1420与第三颜色子像素203的有效发光区域和第二颜色子像素202的有效发光区域的中心连线间隔设置。也就是说，第二环状隔断部142的缺口1420不设置在第三颜色子像素203的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上。
在一些示例中，如图6所示，在第三方向Z上相邻设置的第一环状隔断部141和第二环状隔断部142中，第一环状隔断部141的至少一个缺口1410中距离第二环状隔断部142最近的一个缺口1410与第二环状隔断部142的至少一个缺口1420中距离第一环状隔断部141最近的一个缺口1420在第三方向上错位设置。
需要说明的是，第三方向分别与第一方向和第二方向相交，并与第一方向和第二方向相交位于同一平面上；例如，第三方向可为相邻的第一颜色子像素的有效发光区域和第二颜色子像素的有效发光区域的中心连线的延伸方向。
在一些示例中，如图6所示，在第三方向Z上相邻设置的第一环状隔断部141和第三环状隔断部143中，第一环状隔断部141的至少一个缺口1410中距离第三环状隔断部143最近的一个缺口1410与第三环状隔断部143的至少一个缺口1430中距离第一环状隔断部141最近的一个缺口1430也在第三方向上错位设置。
在一些示例中，如图6所示，第二颜色子像素202的有效发光区域在衬底基板110上的正投影的形状包括圆角矩形，其包括四个圆角；此时，第一环状隔断部141包括四个缺口1410，并且这四个缺口1410与第二颜色子像素202 的有效发光区域的四个圆角分别对应设置。第一颜色子像素201的有效发光区域在衬底基板上的正投影的形状包括圆角矩形，其包括四个边；此时，第二环状隔断部142包括四个缺口1420，并且这四个缺口1420与第一颜色子像素201的有效发光区域的四个边分别对应设置。第一颜色子像素203的有效发光区域在衬底基板上的正投影的形状包括圆角矩形，其包括四个边；此时，第三环状隔断部143包括四个缺口1430，并且这四个缺口1430与第三颜色子像素203的有效发光区域的四个边分别对应设置。如此设置，该显示基板可保证相邻的两个子像素外侧的环状隔断部的缺口错开，从而保证相邻两个子像素之间至少存在隔断结构。
在一些示例中，如图6所示，该显示基板100还包括隔垫物170；此时，隔垫物170附近的环状隔断部与其他位置处的环状隔断部不同。隔垫物170被一个第一颜色子像素201、两个第二颜色子像素202和一个第三颜色子像素203围绕；第一颜色子像素201和第三颜色子像素203分别设置在隔垫物170沿第二方向Y上的两侧；两个第二颜色子像素202分别设置在隔垫物170沿第一方向X上的两侧。
在一些示例中，如图6所示，第一颜色子像素201外侧的第二环状隔断部142靠近隔垫物170的位置包括隔垫物缺口1425，第三颜色子像素203外侧的第三环状隔断部143靠近隔垫物170的位置包括隔垫物缺口1435。由此，该显示基板可提供足够的空间，用于放置隔垫物。并且，由于隔垫物本身也又具有一定的隔断作用，上述的隔垫物缺口并不会导致第一颜色子像素和第三颜色子像素之间发生串扰。
在一些示例中，如图6所示，由于第二环状隔断部142设置了上述的隔垫物缺口1425，第三状隔断部143设置在上述的隔垫物缺口1435；位于隔垫物170两侧的两个第一环状隔断部141靠近隔垫物170的位置均不设置缺口，从而可有效避免相邻子像素之间的串扰。
在一些示例中，如图6所示，隔垫物170在第二方向Y上的尺寸大于隔垫物170在第一方向X上的尺寸。
例如，如图6所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括多个圆角部，多个圆角部包括第一圆角部2031，第一圆角部2031的圆弧半径大于其他圆角部的圆弧半径。此时，由于第一圆角部2031的圆弧半径较大，使得第一圆角部2031占据的空间较小，因此可将隔垫物缺 口1435设置在第一圆角部2031附近，从而可充分利用显示基板上的面积，提高像素密度。此时，第一圆角部2031为第三颜色子像素203的多个圆角部中与第一颜色子像素201的距离最小的圆角部。
在一些示例中，如图6所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状包括多个圆角部，多个圆角部包括第一圆角部2031和第二圆角部2032，第一圆角部2031的圆弧半径大于第二圆角部2031的圆弧半径；并且，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的形状关于第一圆角部2031和第二圆角部2032的连线呈轴对称。
图7为本公开一实施例提供的另一种显示基板的平面示意图。如图7所示，图7所示的显示基板和图6所示的显示基板采用相同的像素排列。在这种情况下，隔断结构140包括多个第一环状隔断部141，多个第二环状隔断部142和多个第三环状隔断部143；各第一环状隔断部141围绕一个所述第二颜色子像素202设置；各第二环状隔断部142围绕一个第一颜色子像素201设置；各第三环状隔断部143围绕一个第三颜色子像素203设置，从而可避免第二颜色子像素与相邻子像素之间的串扰。
在一些示例中，如图7所示，第一环状隔断部141包括至少一个缺口1410，第二环状隔断部142包括至少一个缺口1420，第三环状隔断部143包括至少一个缺口1430。并且，第一环状隔断部141、第二环状隔断部142和第三环状隔断部143中任意相邻的两个环状隔断部的缺口错位设置，以保证相邻两个子像素之间至少存在隔断结构，从而可有效地避免相邻子像素之间的串扰。
在一些示例中，如图7所示，在相邻设置的第一颜色子像素201和第二颜色子像素202之间，第一环状隔断部141的缺口1410与第一颜色子像素201的有效发光区域和第二颜色子像素202的有效发光区域的中心连线间隔设置。也就是说，第一环状隔断部141的缺口1410不设置在第一颜色子像素201的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上。
在一些示例中，如图7所示，在相邻设置的第三颜色子像素203和第二颜色子像素202之间，第三环状隔断部143的缺口1430与第三颜色子像素203的有效发光区域和第二颜色子像素202的有效发光区域的中心连线间隔设置。也就是说，第三环状隔断部143的缺口1430不设置在第三颜色子像素203的有效发光区域和第二颜色子像素202的有效发光区域的中心连线上。
在一些示例中，如图7所示，第二颜色子像素202的有效发光区域在衬底 基板110上的正投影的形状包括圆角矩形，其包括四个边；此时，第一环状隔断部141包括四个缺口1410，并且这四个缺口1410与第二颜色子像素202的有效发光区域的四个边分别对应设置。第一颜色子像素201的有效发光区域在衬底基板上的正投影的形状包括圆角矩形，其包括四个圆角；此时，第二环状隔断部142包括四个缺口1420，并且这四个缺口1420与第一颜色子像素201的有效发光区域的四个圆角分别对应设置。第一颜色子像素203的有效发光区域在衬底基板上的正投影的形状包括圆角矩形，其包括四个圆角；此时，第三环状隔断部143包括四个缺口1430，并且这四个缺口1430与第三颜色子像素203的有效发光区域的四个圆角分别对应设置。如此设置，该显示基板可保证相邻的两个子像素外侧的环状隔断部的缺口错开，从而保证相邻两个子像素之间至少存在隔断结构。
在一些示例中，如图7所示，该显示基板100还包括隔垫物170；此时，隔垫物170附近的环状隔断部与其他位置处的环状隔断部不同。隔垫物170被一个第一颜色子像素201、两个第二颜色子像素202和一个第三颜色子像素203围绕；第一颜色子像素201和第三颜色子像素203分别设置在隔垫物170沿第二方向Y上的两侧；两个第二颜色子像素202分别设置在隔垫物170沿第一方向X上的两侧。
在一些示例中，如图7所示，第一颜色子像素201外侧的第二环状隔断部142靠近隔垫物170的位置包括隔垫物缺口1425，隔垫物缺口1425所在的位置不设置隔断结构；隔垫物缺口1425从第一颜色子像素201和一个第二颜色子像素202之间的间隔，经过第一颜色子像素201与隔垫物170之间的间隔，一直延伸至第一颜色子像素201和另一个第二颜色子像素202之间的间隔。也就是说，隔垫物附近的第一颜色子像素201外侧的第二环状隔断部142进包括两个条状的隔断部。第三颜色子像素203外侧的第三环状隔断部143靠近隔垫物170的位置包括隔垫物缺口1435，隔垫物缺口1435所在的位置不设置隔断结构；隔垫物缺口1435从第三颜色子像素203和一个第二颜色子像素202之间的间隔，经过第三颜色子像素203与隔垫物170之间的间隔，一直延伸至第三颜色子像素203和另一个第二颜色子像素202之间的间隔。也就是说，隔垫物附近的第三颜色子像素203外侧的第三环状隔断部143仅包括两个条状的隔断部。由此，该显示基板可提供足够的空间，用于放置隔垫物。并且，由于隔垫物本身也又具有一定的隔断作用，上述的隔垫物缺口并不会导致第一颜色子 像素和第三颜色子像素之间发生串扰。
在一些示例中，如图7所示，由于第二环状隔断部142设置了上述的隔垫物缺口1425，第三状隔断部143设置在上述的隔垫物缺口1435；位于隔垫物170两侧的两个第一环状隔断部141靠近隔垫物170的位置均不设置缺口，从而可有效避免相邻子像素之间的串扰。
在一些示例中，如图7所示，隔垫物170在第二方向Y上的尺寸大于隔垫物170在第一方向X上的尺寸。
图8为本公开一实施例提供的另一种显示基板的平面示意图。如图8所示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203；隔断结构140包括第三条状隔断部147和第四条状隔断部148；第三条状隔断部147位于相邻的第一颜色子像素201和第二颜色子像素202之间；第四条状隔断部148位于相邻的第三颜色子像素203和第二颜色子像素202之间。
在一些示例中，如图8所示，第三条状隔断部147的延伸方向与相邻的第一颜色子像素201的有效发光区域和第二颜色子像素202的有效发光区域的中心连线垂直；第四条状隔断部148的延伸方向与相邻的第三颜色子像素203的有效发光区域和第二颜色子像素202的有效发光区域的中心连线垂直。
在一些示例中，如图8所示，第一颜色子像素201的有效发光区域在衬底基板110上的正投影为圆角矩形，第三条状隔断部147在其延伸方向上的尺寸(即长度)为第一颜色子像素201的有效发光区域的边长的0.8-1倍。
在一些示例中，如图8所示，第三颜色子像素201的有效发光区域在衬底基板110上的正投影为圆角矩形，第四条状隔断部148在其延伸方向上的尺寸(即长度)为第三颜色子像素203的有效发光区域的边长的0.8-1倍。
在一些示例中，如图8所示，该显示基板100还包括隔垫物170；此时，隔垫物170附近的隔断结构与其他位置处的隔断结构不同。隔垫物170被一个第一颜色子像素201、两个第二颜色子像素202和一个第三颜色子像素203围绕；第一颜色子像素201和第三颜色子像素203分别设置在隔垫物170沿第二方向Y上的两侧；两个第二颜色子像素202分别设置在隔垫物170沿第一方向X上的两侧。
在一些示例中，如图8所示，隔断结构140包括弧线状隔断部149，弧线状隔断部149位于第二颜色子像素202与隔垫物170之间；并且，弧线状隔断 部149从第二颜色子像素202和第三颜色子像素203之间的间隔延伸至第二颜色子像素202和第一颜色子像素201之间的间隔；也就是说，弧线状隔断部149的一端位于第二颜色子像素202和第三颜色子像素203之间，可起到第四条状隔断部148的作用；弧线状隔断部149的另一端位于第二颜色子像素202和第一颜色子像素201之间，可起到第三条状隔断部147的作用；弧线状隔断部149的中间部位于第二颜色子像素202与隔垫物170之间。
图9为本公开一实施例提供的另一种显示基板的平面示意图。如图9所示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203；隔断结构140包括多个第一环状隔断部141，多个第二环状隔断部142和多个第三环状隔断部143；各第一环状隔断部141围绕相邻的两个第二颜色子像素202设置；各第二环状隔断部142围绕一个第一颜色子像素201设置；各第三环状隔断部143围绕一个第三颜色子像素203设置。由此，发光功能层120中的电荷生成层129可在第一环状隔断部141、第二环状隔断部142和第三环状隔断部143断开，第一环状隔断部141可将相邻的两个第二颜色子像素202与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰；第一环状隔断部141可将第一颜色子像素201与其他子像素隔开，从而可避免第一颜色子像素与相邻子像素之间的串扰；第三环状隔断部143可将第三颜色子像素203与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰。
在一些示例中，如图9所示，在任意两个相邻的子像素200之间存在两个环状隔断部，从而可进一步避免相邻子像素之间的串扰。
在一些示例中，如图9所示，多个子像素200划分为多个子像素组350，各子像素组350包括一个第一颜色子像素201、两个第二颜色子像素202和一个第三颜色子像素203；在各子像素组350中，第一颜色子像素201和第三颜色子像素203沿第一方向排列，两个第二颜色子像素202在第二方向上相邻设置，且位于第一颜色子像素201和第三颜色子像素203之间。需要说明的是，上述的像素组的概念仅用于描述多个子像素的像素排列结构，并不限定一个像素组用于显示一个像素点，或者被同一栅线所驱动。
例如，如图9所示，在虚线框360中的四个子像素可被同一栅线驱动。当然，本公开实施例包括但不限于此，子像素的驱动可根据实际需要进行设置。
图10为本公开一实施例提供的另一种显示基板的平面示意图。如图10所 示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203。隔断结构140包括多个第一环状隔断部141，多个第二环状隔断部142和多个第三环状隔断部143；各第一环状隔断部141围绕相邻的两个第二颜色子像素202设置；各第二环状隔断部142围绕一个第一颜色子像素201设置；各第三环状隔断部143围绕一个第三颜色子像素203设置。由此，发光功能层120中的电荷生成层129可在第一环状隔断部141、第二环状隔断部142和第三环状隔断部143断开，第一环状隔断部141可将相邻的两个第二颜色子像素202与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰；第一环状隔断部141可将第一颜色子像素201与其他子像素隔开，从而可避免第一颜色子像素与相邻子像素之间的串扰；第三环状隔断部143可将第三颜色子像素203与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰。
在一些示例中，如图10所示，多个第一环状隔断部141、多个第二环状隔断部142和多个第三环状隔断部143中任意两个相邻的环状隔断部共用一个隔断边缘部。由此，在相邻的两个子像素之间，仅设置有一个隔断结构，从而可减小相邻两个子像素之间的间隔的宽度，以提高像素密度。
图11为本公开一实施例提供的另一种显示基板的平面示意图。如图11所示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203；隔断结构140包括多个第一环状隔断部141和多个第二环状隔断部142，各第一环状隔断部141围绕一个第二颜色子像素202设置，各第二环状隔断部142围绕一个第一颜色子像素201设置。
在一些示例中，如图11所示，隔断结构140包括多个第一环状隔断部141，多个第二环状隔断部142和多个第三环状隔断部143；各第一环状隔断部141围绕一个所述第二颜色子像素202设置；各第二环状隔断部142围绕一个第一颜色子像素201设置；各第三环状隔断部143围绕一个第三颜色子像素203设置。由此，发光功能层120中的电荷生成层129可在第一环状隔断部141、第二环状隔断部142和第三环状隔断部143断开，第一环状隔断部141可将第二颜色子像素202与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰；第一环状隔断部141可将第一颜色子像素201与其他子像素隔开，从而可避免第一颜色子像素与相邻子像素之间的串扰；第三环状隔断部143可将第三颜色子像素203与其他子像素隔开，从而可避免第二颜色子像素与相邻 子像素之间的串扰。
在一些示例中，如图11所示，在任意两个相邻的子像素200之间存在两个环状隔断部，从而可进一步避免相邻子像素之间的串扰。
在一些示例中，如图11所示，多个子像素200划分为多个子像素组350，各子像素组350包括一个第一颜色子像素201、一个第二颜色子像素202和一个第三颜色子像素203；在各子像素组350中，第一颜色子像素201或第二颜色子像素202和第三颜色子像素203沿第一方向排列，第一颜色子像素201和第二颜色子像素202沿第二方向排列。
图12为本公开一实施例提供的另一种显示基板的平面示意图。如图12所示，多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203；隔断结构140包括多个第一环状隔断部141和多个第二环状隔断部142；多个第一环状隔断部141与多个第二颜色子像素202一一对应设置，各第一环状隔断部141围绕一个所述第二颜色子像素202设置；多个第二环状隔断部142与多个第一颜色子像素201一一对应设置，各第二环状隔断部142围绕一个第一颜色子像素201设置。由此，发光功能层120中的电荷生成层129可在第一环状隔断部141和第二环状隔断部142和第三环状隔断部143断开，第一环状隔断部141可将第二颜色子像素202与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰；第一环状隔断部141可将第一颜色子像素201与其他子像素隔开，从而可避免第一颜色子像素与相邻子像素之间的串扰；第三环状隔断部143可将第三颜色子像素203与其他子像素隔开，从而可避免第二颜色子像素与相邻子像素之间的串扰。
在一些示例中，如图12所示，多个子像素200划分为多个子像素组350，各子像素组350包括一个第一颜色子像素201、一个第二颜色子像素202和一个第三颜色子像素203；在各子像素组350中，第一颜色子像素201或第二颜色子像素202和第三颜色子像素203沿第一方向排列，第一颜色子像素201和第二颜色子像素202沿第二方向排列。
在一些示例中，如图12所示，第一环形隔断部141包括至少一个缺口1410，第二环状隔断部142包括至少一个缺口1420；此时，隔断结构140还包括多个L形隔断部146，多个L形隔断部146与多个第三颜色子像素203一一对应设置，各L形隔断部146围绕一个第三颜色子像素203设置。在各像素组350中，L形隔断部146与第一环状隔断部141上靠近第三颜色子像素203的缺口1410 和第二环状隔断部142上靠近第三颜色子像素203的缺口1420正对；也就是说，L形隔断部146在沿第二方向Y延伸的参考直线上的正投影分别与第一环状隔断部141上靠近第三颜色子像素20的缺口1410在该参考直线上的正投影和第二环状隔断部142上靠近第三颜色子像素203的缺口1420在该参考直线上的正投影分别交叠。
图13为本公开一实施例提供的一种显示基板的局部剖面示意图。如图13所示，该隔断结构140包括凹槽1401和遮挡部1402；遮挡部1402位于凹槽1401的边缘且向凹槽1401内突出以形成覆盖凹槽1401的开口的一部分的突出部1403，发光功能层120的导电子层129在遮挡部1402的突出部1403处断开。
例如，如图13所示，遮挡部1402相对于凹槽1401的边缘向凹槽1401内突出以形成突出部1403；此时，遮挡部1402的突出部1403悬空设置，突出部1403遮挡了凹槽1401的开口的边缘部分。
在一些示例中，如图13所示，凹槽1401在相邻两个子像素200的排列方向上的两个边缘分别设置有遮挡部1402。
在一些示例中，如图13所示，第二电极132在隔断结构140所在的位置处断开。
在一些示例中，如图13所示，该显示基板100还包括平坦层180；凹槽1401设置在平坦层180之内；遮挡部1402中除突出部1403外的部分可位于平坦层180和像素限定层150之间。
例如，遮挡部1402向凹槽1401内突出的突出部1403的尺寸与该遮挡部1402的尺寸之比可以为0.1-0.5。例如，遮挡部1402向凹槽1401内突出的突出部310的尺寸与该遮挡部1402的尺寸之比可以为0.2-0.4。例如，遮挡部1402向凹槽1401内突出的突出部1403的尺寸不小于0.1微米。例如，遮挡部1402向凹槽1401内突出的突出部1403的尺寸不小于0.2微米。
例如，位于相邻子像素之间的两个遮挡部1402之间的距离可以为2～15微米。例如，位于相邻子像素之间的两个遮挡部1402之间的距离可以为5～10微米。例如，位于相邻子像素之间的两个遮挡部1402之间的距离可以为3～7微米。例如，位于相邻子像素之间的两个遮挡部1402之间的距离可以为4～12微米。
例如，如图13所示，遮挡部1402中除突出部1403外的部分与平坦层180远离衬底基板110的表面贴合。
例如，遮挡部1402的材料可与第一电极131的材料相同，且位于同一膜层。由此，遮挡部1402可在图案化形成第一电极131的工艺中一起形成，从而可节省掩膜工艺。当然，本公开实施例包括但不限于此，遮挡部也可采用其他材料制作，例如无机材料。
例如，平坦层180的材料可为有机材料，例如树脂、亚克力或聚对苯二甲酸乙二醇酯、聚酰亚胺、聚酰胺、聚碳酸酯、环氧树脂等中的一种或几种的组合等。
在一些示例中，平坦层180与衬底基板110之间还设置有其他膜层，这些其他膜层可以包括栅极绝缘层、层间绝缘层、像素电路(例如包括薄膜晶体管、存储电容等结构)中的各膜层、数据线、栅线、电源信号线、复位电源信号线、复位控制信号线、发光控制信号线等膜层或者结构。
本公开至少一个实施例还提供一种显示装置。图14为本公开一实施例提供的一种显示装置的示意图。如图14所示，该显示装置500还包括显示基板100。该显示基板通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。由此，包括该显示基板的显示装置因此也可避免相邻子像素之间的串扰，因此具有较高的产品良率和较高的显示品质。
另一方面，由于显示基板可在采用双层发光(Tandem EL)设计的同时，提高像素密度。因此，包括该显示基板的显示装置具有寿命长、功耗低、亮度高、分辨率高等优点。
例如，该显示装置可以为有机发光二极管显示装置等显示器件以及包括该显示装置的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本实施例不限于此。
为了更好地在保证有效隔断相邻子像素的电荷生成层的同时保证第二电极的连续性，本公开一实施例还提出了另一种显示基板。图15为本公开一实施例提供的另一种显示基板的平面示意图；图16为本公开一实施例提供的一种显示基板沿图15中EF线的剖面示意图。
如图15和图16所示，该显示基板100包括衬底基板110和位于衬底基板110上的多个子像素200；多个子像素200阵列设置在衬底基板110上，各子像素200包括发光元件210和驱动发光元件210进行发光的像素驱动电路250。各发光元件210包括发光功能层、第一电极和第二电极；发光功能层可包括多 个子功能层，多个子功能层可包括导电率较高的电荷生成层。需要说明的，发光元件的剖面结构可参见图2的相关描述，在此不再赘述。
例如，像素驱动电路250可与对应设置的发光元件210中的第一电极131电性相连，从而可驱动发光元件210进行发光。第一电极131可为阳极，第二电极132可为阴极；多个子像素200可共用一个第二电极132，即多个子像素200可共用一个阴极。
例如，阴极可由高导电性和低功函数的材料形成，例如，阴极可采用金属材料制成。例如，阳极可由具有高功函数的透明导电材料形成。
如图15和图16所示，该显示基板100还包括隔断结构140，隔断结构140位于衬底基板110上，且位于相邻的子像素200之间；由此，发光功能层120中的电荷生成层129在隔断结构140所在的位置断开。多个子像素200包括多个第一颜色子像素201、多个第二颜色子像素202以及多个第三颜色子像素203，隔断结构140包括多个环状隔断部1400，各环状隔断部1400围绕一个第一颜色子像素201、一个第二颜色子像素202和一个第三颜色子像素203中一个；也就是说，各环状隔断部1400围绕一个第一颜色子像素201、一个第二颜色子像素202、或者一个第三颜色子像素203。另外，上述的环状隔断部可为封闭的环形，也可为非封闭的环形，例如包括至少一个缺口的环形。
在本公开实施例提供的显示基板中，通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。并且，由于隔断结构包括多个环状隔断部，各环状隔断部围绕一个第一颜色子像素、一个第二颜色子像素或者一个第三颜色子像素，因此该隔断结构可通过简单的环状隔断部就可实现大多数相邻子像素的隔断，从而避免相邻子像素之间的串扰。另一方面，由于该显示基板可通过隔断结构避免相邻子像素之间的串扰，因此该显示基板可在采用双层发光(Tandem EL)设计的同时，提高像素密度。所以，该显示基板可具有寿命长、功耗低、亮度高、分辨率高等优点。
在一些示例中，如图15和图16所示，在显示基板100中，第二颜色子像素202的数量大于第一颜色子像素201的数量；或者，第二颜色子像素202的数量大于第三颜色子像素203的数量；或者，第二颜色子像素202的数量大于第一颜色子像素201的数量和第三颜色子像素203的数量。由此，通过在数量较少的第一颜色子像素201的外侧设置第一环状像素隔断部141A和数量较少 第三颜色子像素203的外侧设置第二环状像素隔断部142B，就可以将显示基板上大部分相邻的子像素隔开，从而可有效地避免相邻子像素之间的串扰。
在一些示例中，如图15和图16所示，在显示基板100中，第二颜色子像素202的数量大致为第一颜色子像素201的数量或第三颜色子像素203的两倍。
在一些示例中，如图15和图16所示，隔断结构140同样也无需设置如图1所示的条状隔断部，也可将相邻的第一颜色子像素和第三颜色子像素隔开，并将相邻的第一颜色子像素和第三颜色子像素隔开。
在一些示例中，发光功能层包括位于导电子层在垂直于衬底基板的方向上的两侧的第一发光层和第二发光层，导电子层为电荷生成层。由此，该显示基板可实现一种双层发光(Tandem EL)设计，因此具有寿命长、功耗低、亮度高等优点。需要说明的是，关于发光功能层的剖面结构可参见图2的相关说明，在此不再赘述。
在一些示例中，导电子层129的导电率大于第一发光层121的导电率和第二发光层122的导电率，且小于第二电极132的导电率。
在一些示例中，如图15和16所示，第一发光层121位于导电子层129靠近衬底基板110的一侧；第二发光层122位于导电子层129远离衬底基板110的一侧。
在一些示例中，如图15和图16所示，多个环状隔断部1400包括多个第一环状像素隔断部141A和多个第二环状像素隔断部142A，多个第一环状像素隔断部141A和多个第一颜色子像素201对应设置，多个第二环状像素隔断部142A和多个第三颜色子像素203对应设置；各第一环状像素隔断部141A围绕一个第一颜色子像素201，各第二环状像素142A隔断部围绕一个第三颜色子像素203。由此，多个第一环状像素隔断部141A可将多个第一颜色子像素201与相邻的其他子像素隔开，多个第二环状像素隔断部142可将多个第三颜色子像素203与相邻的其他子像素隔开，由此，该显示基板可有效地避免相邻子像素之间的串扰。
在一些示例中，如图15和图16所示，在相邻的第一颜色子像素201和第二颜色子像素202之间的隔断结构140仅包括第一环状像素隔断部141A，在相邻的第三颜色子像素203和第二颜色子像素202之间的隔断结构140仅包括第二环状像素隔断部142A。此时，第二颜色子像素的周围不用设置环状隔断结构，第二电极可在第二颜色子像素的周围连续设置。由此，该显示基板可通 过上述的隔断结构在有效隔断相邻子像素的电荷生成层的同时，使得第二电极的连续性最大化，从而便于传递阴极信号。
在一些示例中，如图15和图16所示，第一环状像素隔断部141A包括缺口1410A，缺口1410A位于第一颜色子像素201的有效发光区域的对角线的延长线上。第一颜色子像素201的第一电极131包括第一主体部1311A和第一连接部1311B，第一连接部1311B与第一主体部1311A相连，并被配置为与像素驱动电路250相连；第一连接部1311B位于第一环状像素隔断部141A的缺口1410A所在的位置。
在这种情况下，第一环状像素隔断部的缺口可用于设置第一连接部，该第一连接部用于与对应的像素驱动电路相连。当显示基板的像素密度较高，子像素排列比较紧密时，相邻子像素的有效发光区域的相对的边缘之间的空间较小，而相邻子像素的有效发光区域的相对的角之间的空间较大，通过将第一环状像素隔断部的缺口设置在第一颜色子像素的有效发光区域的对角线的延长线上，该显示基板可充分利用相邻子像素的有效发光区域的相对的角之间的空间。另一方面，该显示基板可通过上述设置在避免相邻子像素之间的串扰的同时提高像素排列的密度。
在一些示例中，如图15和图16所示，第一连接部1311B位于第一主体部1311A的对角线的延长线上，即第一连接部1311B从第一主体部1311A的一个角部向外凸出。
在一些示例中，如图15所示，第一缺口1410A阵列排布，沿第一方向X和第二方向Y形成第一缺口行和第一缺口列；第一缺口行沿第一方向延伸，第一缺口列沿第二方向延伸；第二缺口1420A阵列排布，沿第一方向X和第二方向Y形成第二缺口行和第二缺口列；第一缺口行沿第一方向X延伸，第一缺口列沿第二方向Y延伸；第一缺口行和第二缺口行大致平行，第一缺口列和第二缺口列大致平行。
在一些示例中，如图15所示，第一缺口行位于第一颜色子像素201和第三颜色子像素203之间，第二缺口行位于第一颜色子像素201和第三颜色子像素203之间。
在一些示例中，如图15和图16所示，第一主体部1311A在衬底基板110上的正投影的形状包括圆角矩形，第一连接部1311B从第一主体部1311A的一个圆角沿该圆角矩形的对角线的延伸方向向外凸出。
在一些示例中，如图15和图16所示，第二环状像素隔断部142A包括缺口1420A，缺口1420A位于第三颜色子像素203的有效发光区域的对角线的延长线上。第三颜色子像素203的第一电极131包括第二主体部1312A和第二连接部1312B，第二连接部1312B与第二主体部1312A相连，并被配置为与像素驱动电路250相连；第一连接部1312B位于第一环状像素隔断部142A的缺口1420A所在的位置。
在这种情况下，第二环状像素隔断部的缺口可用于设置第二连接部，该第二连接部用于与对应的像素驱动电路相连。当显示基板的像素密度较高，子像素排列比较紧密时，相邻子像素的有效发光区域的相对的边缘之间的空间较小，而相邻子像素的有效发光区域的相对的角之间的空间较大，通过将第二环状像素隔断部的缺口设置在第三颜色子像素的有效发光区域的对角线的延长线上，该显示基板可充分利用相邻子像素的有效发光区域的相对的角之间的空间。另一方面，该显示基板可通过上述设置在避免相邻子像素之间的串扰的同时提高像素排列的密度。
在一些示例中，如图15和图16所示，第二连接部1312B位于第二主体部1312A的对角线的延长线上，即第二连接部1312B从第二主体部1312A的一个角部向外凸出。
在一些示例中，如图15和图16所示，第二主体部1312A在衬底基板110上的正投影的形状包括圆角矩形，第二连接部1312B从第二主体部1312A的一个圆角沿该圆角矩形的对角线的延伸方向向外凸出。
在一些示例中，如图15和图16所示，第一连接部1311B从第一主体部1311A凸出的方向与第二连接部1312B从第二主体部1312A凸出的方向相同。
在一些示例中，如图15和图16所示，第二颜色子像素202的第一电极131包括第三主体部1313A和第三连接部1313B，第三连接部1313B与第三主体部1313A相连，并被配置为与像素驱动电路250相连。
在一些示例中，如图15和图16所示，第三连接部1313B位于第三主体部1313A的对角线的延长线上，即第三连接部1313B从第三主体部1313A的一个角部向外凸出。
在一些示例中，如图15和图16所示，该显示基板100还包括位于衬底基板110上的像素限定层150；像素限定层150部分位于第一电极131远离衬底基板110的一侧；像素限定层150包括多个像素开口152和像素间隔开口154； 多个像素开口152与多个子像素200一一对应以限定多个子像素200的有效发光区域；像素开口152被配置为暴露第一电极131，以便第一电极131与后续形成的发光功能层120接触。像素间隔开口154位于相邻的第一电极131之间，隔断结构140的至少部分位于像素限定层150与衬底基板110之间，也就是说，隔断结构140的至少部分被像素限定层150覆盖。
在相邻子像素的排列方向，由于隔断结构的至少部分位于像素限定层与衬底基板之间，发光功能层中的电荷生成层仅在隔断结构位于像素限定层之外的位置断开一次；同样地，第二电极也仅在隔断结构位于像素限定层之外的位置处断开一次，而不在隔断结构在相邻子像素的排列方向上的两侧断开两次。因此，第二电极可更好地保持连续性，从而可更好地传递阴极引号。另外，第二电极仅在隔断结构位于像素限定层之外的位置断开一次，第二电极也可减少甚至避免形成尖端结构，从而可避免尖端放电现象。需要说明的是，上述的相邻子像素的排列方向可为相邻子像素的有效发光区域的亮度中心的连线的延伸方向。
在一些示例中，如图15和图16所示，在相邻子像素的排列方向上，隔断结构140在排列方向上的一侧边缘位于像素限定层150与衬底基板110之间，而另一侧边缘位于像素间隔开口154之中。此时，第二电极也仅在隔断结构位于像素间隔开口之中的边缘断开一次，而不在隔断结构在相邻子像素的排列方向上的两侧断开两次。因此，第二电极可更好地保持连续性，从而可更好地传递阴极引号。
在一些示例中，如图15和图16所示，在相邻子像素的排列方向上，隔断结构140在排列方向上的一侧包括隔断面1490，隔断面1490与衬底基板110所在的平面之间的夹角的取值范围为80-100度。由此，隔断面可有效地将电荷生成层断开。当然，本公开实施例提供的隔断结构也可采用其他结构，只要可以将电荷生成层断开即可。
在一些示例中，如图15和图16所示，隔断结构140在垂直于衬底基板110的方向上的尺寸的取值范围为
Figure PCTCN2022124653-appb-000001
当然，本公开实施例包括但不限于此，隔断结构在垂直于衬底基板的方向上的尺寸可根据实际情况进行设置。
例如，像素限定层的材料可包括有机材料，例如聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等。
在一些示例中，如图15所示，多个第一颜色子像素201和多个第三颜色 子像素203沿第一方向和第二方向均交替设置以形成多个第一像素行310和多个第一像素列320，多个第二颜色子像素202沿第一方向和第二方向均阵列排布以形成多个第二像素行330和多个第二像素列340，多个第一像素行310和多个第二像素行330沿第二方向交替设置且在第一方向上彼此错开，多个第一像素列320和多个第二像素列340沿第一方向交替设置且在第二方向上彼此错开。隔断结构140位于相邻的第一颜色子像素201和第三颜色子像素203之间，和/或，隔断结构140位于相邻的第二颜色子像素202与第三颜色子像素203之间，和/或，隔断结构140位于相邻的第一颜色子像素201和第二颜色子像素202之间。
在一些示例中，第三颜色子像素的发光效率小于第二颜色子像素的发光效率。
例如，第一颜色子像素201被配置为发红光，第二颜色子像素202被配置为发绿光，第三颜色子像素203被配置为发蓝光。当然，本公开实施例包括但不限于此。
在一些示例中，如图15所示，第三颜色子像素203的有效发光区域在衬底基板110上的正投影的面积大于第一颜色子像素201的有效发光区域在衬底基板110上的正投影的面积；第一颜色子像素201的有效发光区域在衬底基板110上的正投影的面积大于第二颜色子像素202的有效发光区域在衬底基板110上的正投影的面积。当然，本公开实施例包括但不限于此，各子像素的有效发光区域的面积可根据实际需要进行设置。
在一些示例中，如图15和16所示，该显示基板100还包括平坦层180、多条数据线191和多条电源线192；平坦层180位于第一电极131靠近衬底基板110的一侧，即第一电极131设置在平坦层180远离衬底基板110的一侧；多条数据线191位于平坦层180与衬底基板110之间，多条数据线191沿第一方向延伸且沿第二方向排列，第一方向和第二方向相交；多条电源线192位于平坦层180与衬底基板110之间，多条电源线192沿第一方向延伸且沿第二方向排列；沿垂直于衬底基板110的方向，隔断结构140与数据线191和电源线192的至少之一交叠。
在一些示例中，如图15所示，多条数据线191和多条电源线192交替排列。
图17A为本公开一实施例提供的另一种显示基板的局部剖面示意图。如图 17A所示，该显示基板100还包括平坦层180和保护结构270；平坦层180位于衬底基板110和第一电极131之间；保护结构270位于平坦层180和第一电极131之间。
在该显示基板的制作过程中，隔断结构在平坦层形成之后形成，并且需要进行刻蚀工艺；虽然刻蚀工艺具有选择性，但是刻蚀工艺仍然会对平坦层的平坦度造成不利影响，从而导致在平坦层上形成的第一电极的平坦性不佳，从而影响显示效果。而图17A所示的显示基板通过在平坦层和第一电极之间形成保护结构，在隔断结构的刻蚀工艺中对第一电极下方的平坦层进行保护，避免被刻蚀，从而可保证第一电极下方的平坦层的平坦度，进而可保证第一电极的平坦度并提高显示质量。
在一些示例中，如图17A所示，保护结构270和隔断结构140同层设置，因此，在形成保护结构270的同时，保护结构270就可以对第一电极下方的平坦层进行保护，避免被刻蚀。另外，保护结构也无需增加额外的膜层或者掩膜工艺，从而也可降低成本。
在一些示例中，保护结构和隔断结构采用同样的材料并经过同一图案化工艺形成。
在一些示例中，如图17A所示，第一电极131在衬底基板110上的正投影落入保护结构270在衬底基板110上的正投影之内。由此，保护结构270可充分地对第一电极下方的平坦层进行保护，从而保证整个第一电极的平坦度。
图17B为本公开一实施例提供的一种显示基板的剖面电镜图。如图17B所示，在相邻子像素200的排列方向上，隔断结构140在排列方向上的一侧边缘位于像素限定层150与衬底基板110之间，而另一侧边缘位于像素间隔开口之中。此时，隔断结构的一侧边缘可起到隔断作用，而另一侧边缘被像素限定层覆盖。第二电极也仅在隔断结构位于像素间隔开口之中的边缘断开一次，而不在隔断结构在相邻子像素的排列方向上的两侧断开两次。因此，第二电极可更好地保持连续性，从而可更好地传递阴极信号。
本公开至少一个实施例还提供一种显示装置。图18为本公开一实施例提供的一种显示装置的示意图。如图18所示，该显示装置500还包括显示基板100。该显示基板通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。由此，包括该显示基板的显示装置因此也可避 免相邻子像素之间的串扰，因此具有较高的产品良率和较高的显示品质。
另一方面，由于显示基板可在采用双层发光(Tandem EL)设计的同时，提高像素密度。因此，包括该显示基板的显示装置具有寿命长、功耗低、亮度高、分辨率高等优点。
例如，该显示装置可以为有机发光二极管显示装置等显示器件以及包括该显示装置的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本实施例不限于此。
本公开一实施例还提供一种显示基板的制作方法，用于制作上述的显示基板。该制作方法包括：在衬底基板上形成多个第一电极；在衬底基板上形成隔断结构；在隔断结构和多个第一电极远离衬底基板的一侧形成发光功能层，发光功能层包括导电子层；以及在发光功能层远离衬底基板的一侧形成第二电极，第二电极、发光功能层和多个第一电极形成多个子像素的发光元件，隔断结构位于相邻的子像素之间，发光功能层中的导电子层在隔断结构所在的位置断开,多个子像素包括多个第一颜色子像素、多个第二颜色子像素以及多个第三颜色子像素，隔断结构包括多个环状隔断部，环状隔断部围绕一个第一颜色子像素、一个第二颜色子像素、和一个第三颜色子像素中的一个。
本公开一实施例提供一种显示基板。图19为本公开一实施例提供的一种显示基板的局部截面示意图。如图19所示，该显示基板100包括衬底基板110和多个子像素200；多个子像素200位于衬底基板110上，各子像素200包括发光元件210；各发光元件210包括发光功能层120和位于发光功能层120的两侧的第一电极131和第二电极132，第一电极131位于发光功能层120与衬底基板110之间；第二电极132至少部分位于发光功能层120远离第一电极131的一侧；也就是说，第一电极131和第二电极132位于在垂直于发光功能层120的方向上的两侧。发光功能层120包括多个子功能层，多个子功能层包括导电率较高的导电子层129。需要说明的是，上述的发光功能层并非仅包括直接进行发光的膜层，还包括用于辅助发光的功能膜层，例如：空穴传输层、电子传输层等。
例如，导电子层129可为电荷生成层。例如，第一电极131可为阳极，第二电极132可为阴极。例如，阴极可由高导电性和低功函数的材料形成，例如，阴极可采用金属材料制成。例如，阳极可由具有高功函数的透明导电材料形成。
如图19所示，该显示基板100还包括隔断结构140，隔断结构140位于衬 底基板110上，且位于相邻的子像素200之间；发光功能层120中的电荷生成层129在隔断结构140所在的位置断开。需要说明的是，上述的“相邻的子像素”指两个子像素之间没有设置其他子像素。
在本公开实施例提供的显示基板中，通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的电荷生成层在隔断结构所在的位置断开，从而避免导电性较高的电荷生成层造成相邻子像素之间的串扰。另一方面，由于该显示基板可通过隔断结构避免相邻子像素之间的串扰，因此该显示基板可在采用双层发光(Tandem EL)设计的同时，提高像素密度。所以，该显示基板可具有寿命长、功耗低、亮度高、分辨率高等优点。
在一些示例中，如图19所示，各隔断结构140包括层叠设置的第一子隔断结构741和第二子隔断结构742；第一子隔断结构741位于第二子隔断结构742与衬底基板110之间，第二子隔断结构742的材料包括无机非金属材料。
在一些示例中，如图19所示，沿相邻子像素200的排列方向，位于该相邻子像素200之间的隔断结构140中第二子隔断结构742的边缘相对于第一子隔断结构741的边缘突出以形成隔断突出部7420，发光功能层120包括的多个子功能层中的至少一个在隔断突出部7420处断开。本公开实施例通过在显示基板中相邻子像素之间设置隔断结构，可以使得发光功能层的至少一层在第二子隔断结构的隔断突出部处断开，有利于降低相邻子像素之间产生串扰的几率。
例如，如图19所示，多个子像素200可以包括相邻两个子像素200。例如，第二子隔断结构742的至少一个边缘相对于第一子隔断结构741的相应边缘突出以形成至少一个隔断突出部7420。
例如，如图19所示，第二子隔断结构742的两侧边缘均相对于第一子隔断结构741的相应边缘突出以形成两个隔断突出部7420。
图19示意性的示出相邻两个子像素200之间设置有一个隔断结构140，该隔断结构140包括两个隔断突出部7420，但不限于此，相邻两个子像素之间还可以设置两个或者更多个隔断结构，每个隔断结构包括至少一个隔断突出部，通过对隔断结构的数量以及隔断突出部的数量的设置，可以使得发光功能层的至少一个子功能层被隔断结构断开。
例如，如图19所示，第一子隔断结构741面向所述第二子隔断结构742的表面在衬底基板110上的正投影完全位于第二子隔断结构742面向衬底基板 110一侧的表面在衬底基板110上的正投影。例如，第二子隔断结构742在相邻子像素的排列方向上的尺寸大于第一子隔断结构741面向所述第二子隔断结构742的表面在相邻子像素的排列方向上的尺寸。
例如，如图19所示，在垂直于衬底基板110的方向，第一子隔断结构741的厚度大于第二子隔断结构742的厚度。
例如，如图19所示，发光功能层120可以包括层叠设置的第一发光层121、电荷生成层(CGL)129以及第二发光层122，电荷生成层129位于第一发光层121与第二发光层122之间。电荷生成层具有较强的导电性，可以使得发光功能层具有寿命长、功耗低以及可实现高亮度的优点，例如，相对于没有设置电荷生成层的发光功能层，子像素通过在发光功能层中设置电荷生成层可以将发光亮度提高近一倍。
例如，各子像素200中，发光功能层120还可以包括空穴注入层(HIL)、空穴传输层(HTL)、电子传输层(ETL)和电子注入层(EIL)。
例如，空穴注入层、空穴传输层、电子传输层、电子注入层以及电荷生成层均为多个子像素的共用膜层，可以称为共通层。例如，发光功能层中在隔断突出部处断开的至少一个子功能层可以为上述共通层中的至少一个。通过将上述共通层中的至少一个子功能层在位于相邻子像素之间的隔断突出部处断开，可以有利于降低相邻子像素之间产生串扰的几率。
例如，同一个子像素200中，第一发光层121和第二发光层122可以为发射相同颜色光的发光层。例如，发不同颜色光的子像素200中的第一发光层121(或第二发光层122)发射不同颜色光。当然，本公开实施例不限于此，例如，同一子像素200中，第一发光层121和第二发光层122可以为发射不同颜色光的发光层，通过在同一子像素200中设置发射不同颜色光的发光层可以使得子像素200包括的多层发光层发射的光混合为白光，通过设置彩膜层来调节每个子像素出射光的颜色。
例如，相邻子像素200中，位于电荷生成层129同一侧的发光层可以彼此间隔设置，也可以在两个子像素200之间的间隔处交叠或者相接，本公开实施例对此不作限制。
例如，电荷生成层129的材料可以与电子传输层的材料相同。例如，电子传输层的材料可以包括芳族杂环化合物，例如苯并咪唑衍生物、咪唑并吡啶衍生物、苯并咪唑并菲啶衍生物等咪唑衍生物；嘧啶衍生物、三嗪衍生物等嗪衍 生物；喹啉衍生物、异喹啉衍生物、菲咯啉衍生物等包含含氮六元环结构的化合物(也包括在杂环上具有氧化膦系的取代基的化合物。)等。
例如，电荷生成层129的材料可以是含有磷氧基团的材料，也可以是含有三嗪的材料。
例如，在上述相邻两个子像素200之间没有设置隔断结构140时，该相邻两个子像素200的发光功能层120中的电荷生成层129等共通层可能连接或者为整层膜层，例如电荷生成层129具有较高的导电率，对于具有高分辨率的显示装置而言，电荷生成层129的高导电性容易导致相邻子像素200发生串扰。
本公开实施例提供的显示基板中，通过在该相邻两个子像素之间设置具有隔断突出部的隔断结构，可以使得形成在隔断突出部处的发光功能层的至少一层断开，此时，该相邻两个子像素的发光功能层中至少一个膜层(如电荷生成层)间隔设置，可以增加相邻子像素之间发光功能层的电阻，从而在降低该相邻两个子像素之间产生串扰的几率的同时，又不影响子像素的正常显示。
例如，如图19所示，第二子隔断结构742的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种。
例如，如图19所示，多个子像素200中的第二电极132可以为多个子像素200共用的公共电极，在上述相邻两个子像素200之间没有设置隔断结构140时，第二电极132为整层膜层。
例如，如图19所示，隔断突出部7420的尺寸可以在0.1-5微米的范围内。例如，隔断突出部7420的尺寸可以在0.2-2微米的范围内。
例如，如图19所示，沿垂直于衬底基板110的方向，隔断结构140的厚度与发光功能层120的厚度之比为0.8～1.2。例如，隔断结构140的厚度与发光功能层120的厚度之比为0.9～1.1。例如，沿垂直于衬底基板110的方向，第二子隔断结构742的厚度可以为100～10000埃。例如，第二子隔断结构742的厚度可以为200～1500埃。例如，沿垂直于衬底基板110的方向，第一子隔断结构741的厚度可以为100～10000埃。例如，第一子隔断结构741的厚度可以为200～2000埃。本公开实施例的一示例可以通过对隔断结构的厚度进行设置，例如隔断结构的厚度与发光功能层的厚度之比设置为0.8～1.2，以使发光功能层120在隔断结构140的隔断突出部7420处断开，而第二电极132保持连续不被隔断，从而起到防止相邻子像素间串扰的作用，同时第二电极不隔断又保证了显示的均一性。
例如，隔断结构140的厚度可以为300～5000埃，隔断结构140的上述厚度(300～5000埃)可以使得发光功能层120在隔断结构边缘必然断开，而第二电极132是否断开则根据隔断结构140的厚度进一步决定。
本公开实施例通过对隔断结构的厚度以及隔断突出部的尺寸的设置，可以实现发光功能层的至少一个膜层在隔断突出部处断开。
图20为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图20所示示例中的显示基板与图19所示示例中的显示基板的不同之处在于隔断结构的厚度不同，图20所示显示基板中的隔断结构140的厚度大于图19所示显示基板中的隔断结构140的厚度，例如，如图20所示，可以通过将隔断结构140的厚度设置的较大(例如隔断结构的厚度与发光功能层的厚度比大于1.5)，使得发光功能层和第二电极均在隔断结构的隔断突出部处断开。
例如，图19示意性的示出发光功能层120包括的所有膜层均在隔断结构140的隔断突出部7420处断开，第二电极132在隔断结构140的隔断突出部7420处没有断开。但不限于此，其他示例中，可以通过对隔断结构的厚度进行设置，使得发光功能层中靠近衬底基板一侧的部分膜层在隔断突出部处断开，发光功能层中远离衬底基板一侧的部分膜层在隔断突出部处没有断开，且第二电极在隔断突出部处没有断开。
例如，如图19所示，第一子隔断结构741的材料包括有机材料。
例如，如图19所示，显示基板还包括有机层180，位于第二子隔断结构742与衬底基板110之间。有机层180可作为平坦层。
例如，如图19所示，第一子隔断结构741与有机层180为一体化的结构。例如，第一子隔断结构741可以为有机层180中的一部分。例如，第一子隔断结构741可以为有机层180中向远离衬底基板110一侧突出的部分。
例如，如图19所示，有机层180包括平坦(PLN，Planarization)层。例如，第一子隔断结构741的材料包括光致抗蚀剂，聚酰亚胺(PI)树脂，丙烯酸树脂，硅化合物或聚丙烯酸树脂的材料。
例如，如图19所示，第一子隔断结构741被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第一截面包括矩形。例如，第一子隔断结构741被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第一截面包括梯形，梯形的侧边与梯形靠近衬底基板110一侧的底边之间的夹角不大于90度。
例如，如图19所示，第一子隔断结构741的截面可以为梯形，梯形的上底位于梯形的下底远离衬底基板110的一侧，梯形的侧边与下底之间的夹角不大于90度。
例如，如图19所述，第一子隔断结构741的梯形截面的上底的长度小于第二子隔断结构742的截面的靠近衬底基板110一侧的边的长度以使得第二子隔断结构742的边缘与第一子隔断结构741的上底的边缘形成底切结构，即第二子隔断结构742的边缘包括隔断突出部7420。
图19示意性的示出第一子隔断结构741的侧边为直边，但不限于此，在实际工艺过程中，形成的第一子隔断结构741的侧边也可以为曲边，例如，曲边向远离其所在的第一子隔断结构741的中心的一侧弯曲，或者曲边向靠近其所在的第一子隔断结构741的中心的一侧弯曲，此时，第一子隔断结构741的曲边与下底之间的夹角可以指曲边中点处切线与下底之间的夹角，也可以指曲边与下底交点处切线与下底之间的夹角。
例如，如图19所示，第二子隔断结构742被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第二截面包括矩形或梯形。例如，图19示意性的示出第二子隔断结构742的第二截面的形状为矩形，通过将第二子隔断结构742的第二截面的短边设置为与其靠近衬底基板110一侧的长边之间的夹角为直角或大致直角(例如大致直角可以指两边之间的夹角与90度之差不大于10度)，可以有利于发光功能层120在第二子隔断结构742的边缘处断开。
例如，第二子隔断结构742被沿相邻子像素的排列方向且垂直于衬底基板110的平面所截的第二截面的形状可以为梯形，梯形的侧边与梯形远离衬底基板110一侧的底边之间的夹角不小于70度。本公开实施例可以通过对第二子隔断结构742的侧边和梯形远离衬底基板一侧的底边之间的夹角进行设置，使得发光功能层120在第二子隔断结构742的边缘处断开。
例如，第二子隔断结构742的第二截面的形状可以为梯形，梯形的远离衬底基板110一侧的底边的长度小于梯形的靠近衬底基板110一侧的底边的长度。
图21A为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图21A所示显示基板与图19所示显示基板的不同之处在于第一子隔断结构741被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第一截面的形状不同。例如，如图21A所示，第一子隔断结构741被垂直于 衬底基板110的平面所截的第一截面的形状可以为矩形，第二子隔断结构742被垂直于衬底基板110的平面所截的第一截面的形状也为矩形，可以有利于发光功能层120在隔断结构140的边缘处断开。
图21B为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图21B所示显示基板与图21A所示显示基板的不同之处在于第一子隔断结构741被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第一截面的形状不同。例如，如图21B所示，第一子隔断结构741被垂直于衬底基板110的平面所截的第一截面的形状可以为梯形，且该梯形远离衬底基板110一侧的底边的长度大于梯形靠近衬底基板110一侧的底边的长度，可以有利于发光功能层120在隔断结构140的边缘处断开。
例如，如图19至图21B所示，第一电极131与有机层180远离衬底基板110的一侧表面接触。例如，第一电极131可以为阳极，第二电极132可以为阴极。例如，阴极可由高导电性和低功函数的材料形成，例如，阴极可采用金属材料制成。例如，阳极可由具有高功函数的透明导电材料形成。
例如，如图19至图21B所示，显示基板还包括像素限定层150，位于有机层180远离衬底基板110的一侧，像素限定层150包括多个第一开口152，多个第一开口152与多个子像素200一一对应设置以限定多个子像素200的发光区，第一开口152被配置为暴露第一电极131。例如，第一电极131的至少部分位于像素限定层150与衬底基板110之间。例如，当发光功能层120形成在像素限定层150的第一开口152中时，位于发光功能层120两侧的第一电极131和第二电极132能够驱动的第一开口152中的发光功能层120进行发光。例如，上述发光区可以指子像素有效发光的区域，发光区的形状指二维形状，例如发光区的形状可以与像素限定层150的第一开口152的形状相同。
例如，如图19至图21B所示，像素限定层150除第一开口152外的部分为像素限定部，像素限定部的材料可以包括聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等。
例如，如图19至图21B所示，像素限定层150还包括多个第二开口154，第二开口154被配置为暴露隔断结构140。例如，隔断结构140与像素限定层150的像素限定部之间设置有间隔。
例如，如图19至图21B所示，第二子隔断结构742包括至少一层隔断层。例如，第二子隔断结构742可以包括单层隔断层，该单层膜层的材料可以为氧 化硅或者氮化硅。例如，第二子隔断结构742可以包括两层隔断层，两层隔断层的材料分别为氧化硅和氮化硅。本公开实施例不限于此，第二子隔断结构可以包括三层或者更多层隔断层，第二子隔断结构包括的隔断层的数量可以根据产品需求进行设置。
例如，如图19至图21B所示，沿垂直于衬底基板110的方向，隔断结构140厚度小于像素限定部的厚度。
例如，如图19至图21B所示，沿平行于衬底基板110的方向，隔断突出部7420的尺寸不小于0.01微米。例如，沿平行于衬底基板110的方向，隔断突出部7420的尺寸不小于0.1微米。例如，沿平行于衬底基板110的方向，隔断突出部7420的尺寸可以为0.01～5微米。例如，沿平行于衬底基板110的方向，隔断突出部7420的尺寸可以为0.05～4微米。例如，沿平行于衬底基板110的方向，隔断突出部7420的尺寸可以为0.1～2微米。
例如，如图19至图21B所示，第二子隔断结构742被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第二截面包括矩形或梯形。例如，第二子隔断结构742的第二截面形状为矩形，通过将第二子隔断结构742的第二截面的短边设置为与其靠近衬底基板110一侧的长边之间的夹角为直角或大致直角(例如大致直角可以指两边之间的夹角与90度之差不大于10度)，可以有利于发光功能层120在第二子隔断结构742的边缘处断开。
例如，第二子隔断结构742的第二截面可以为梯形，梯形的侧边与梯形的靠近衬底基板110一侧的底边之间的夹角不小于70度。例如，第二截面可以为梯形，梯形的侧边与梯形的靠近衬底基板110一侧的底边之间的夹角不小于90度以使得第二子隔断结构742的侧边与梯形的远离衬底基板110一侧的底边之间的夹角为锐角，可以有利于发光功能层120在第二子隔断结构742的边缘处断开。
例如，显示基板还包括像素电路，有机发光元件210的第一电极131可以通过贯穿有机层180等膜层的过孔与像素电路中的薄膜晶体管的源极和漏极之一连接。例如，像素电路还包括存储电容。例如，有机层180与衬底基板110之间还可以设置栅极绝缘层、层间绝缘层、像素电路中的各膜层、数据线、栅线、电源信号线、复位电源信号线、复位控制信号线、发光控制信号线等膜层或者结构。例如，有机层180与衬底基板110之间的膜层可以包括一层电源信号线，也可以包括两层电源信号线。例如，有机层180面向衬底基板110的一 侧表面可以与层间绝缘层接触。
例如，像素限定层150的像素限定部远离衬底基板110的一侧还可以设置隔垫物，隔垫物被配置为支撑制作发光层的蒸镀掩模板。
例如，本公开一实施例提供一种形成图19所示显示基板的制作方法，包括在衬底基板110上形成多个子像素200，其中，形成子像素200包括在垂直于衬底基板110的方向上依次形成层叠设置的第一电极131、发光功能层120以及第二电极132；在衬底基板110上形成第一材料层；在第一材料层上形成第二材料层，第二材料层为无机非金属材料层；对第一材料层和第二材料层同时图案化形成隔断结构140。形成隔断结构140包括对第二材料层图案化形成第二子隔断结构742的同时，第一材料层中位于第二子隔断结构742正下方的部分被刻蚀形成第一子隔断结构741；沿相邻子像素200的排列方向，位于该相邻子像素200之间的隔断结构140中第二子隔断结构742的边缘相对于第一子隔断结构741的边缘突出以形成隔断突出部7420；发光功能层120在形成隔断结构140后形成，发光功能层120包括多个膜层，多个膜层中的至少一层在隔断突出部7420处断开。
例如，第二材料层为有机材料层，对第一材料层和第二材料层同时图案化形成隔断结构140包括：采用干刻法对第二材料层进行刻蚀以在形成第二子隔断结构742的同时，有机材料层中位于第二子隔断结构742正下方的部分被干刻形成第一子隔断结构741。
例如，图22A至图22D为形成图19所示显示基板之前的显示基板的制作方法流程示意图。如图19、图22A至图22D所示，显示基板的制作方法包括：在衬底基板110上形成多个子像素200，其中，形成子像素200包括在垂直于衬底基板110的方向上依次形成层叠设置的第一电极131、发光功能层120以及第二电极132；在衬底基板110上形成有机材料层180(即第一材料层)；在有机材料层180上形成无机非金属材料层030(即第二材料层)；对无机非金属材料层030图案化形成第二子隔断结构742的同时，有机材料层180中位于第二子隔断结构742正下方的部分有机材料层180被刻蚀形成第一子隔断结构741。隔断结构140包括第一子隔断结构741和第二子隔断结构742，沿相邻子像素200的排列方向，位于该相邻子像素200之间的隔断结构140中第二子隔断结构742的边缘相对于第一子隔断结构741的边缘突出以形成隔断突出部7420；发光功能层120在形成隔断结构140后形成，发光功能层120包括多个 膜层，多个膜层中的至少一层在隔断突出部7420处断开。
例如，如图19和图22A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板110。例如，衬底基板110可以为柔性衬底基板。例如，形成衬底基板110可以包括在玻璃载板上依次形成叠设的第一柔性材料层、第一无机材料层、半导体层、第二柔性材料层和第二无机材料层。第一柔性材料层、第二柔性材料层的材料采用聚酰亚胺(PI)、聚对苯二甲酸乙二酯(PET)或经表面处理的聚合物软膜等材料。第一无机材料层、第二无机材料层的材料采用氮化硅(SiNx)或氧化硅(SiOx)等，用于提高衬底基板的抗水氧能力，第一无机材料层、第二无机材料层也称之为阻挡(Barrier)层。
例如，在形成有机材料层180之前，可以在衬底基板110上形成像素电路的驱动结构层。驱动结构层包括多个像素电路，每个像素电路包括多个晶体管和至少一个存储电容，例如像素电路可以采用2T1C、3T1C或7T1C设计。例如，形成驱动结构层可以包括在衬底基板110上依次沉积第一绝缘薄膜和有源层薄膜，通过构图工艺对有源层薄膜进行构图，形成覆盖整个衬底基板110的第一绝缘层，以及设置在第一绝缘层上的有源层图案，有源层图案至少包括有源层。例如，依次沉积第二绝缘薄膜和第一金属薄膜，通过构图工艺对第一金属薄膜进行构图，形成覆盖有源层图案的第二绝缘层，以及设置在第二绝缘层上的第一栅金属层图案，第一栅金属层图案至少包括栅电极和第一电容电极。例如，依次沉积第三绝缘薄膜和第二金属薄膜，通过构图工艺对第二金属薄膜进行构图，形成覆盖第一栅金属层的第三绝缘层，以及设置在第三绝缘层上的第二栅金属层图案，第二栅金属层图案至少包括第二电容电极，第二电容电极的位置与第一电容电极的位置相对应。随后，沉积第四绝缘薄膜，通过构图工艺对第四绝缘薄膜进行构图，形成覆盖第二栅金属层的第四绝缘层，第四绝缘层上开设有至少两个第一过孔，两个第一过孔内的第四绝缘层、第三绝缘层和第二绝缘层被刻蚀掉，暴露出有源层图案的有源层的表面。随后，沉积第三金属薄膜，通过构图工艺对第三金属薄膜进行构图，在第四绝缘层上形成源漏金属层图案，源漏金属层图案至少包括位于显示区域的源电极和漏电极。源电极和漏电极可以分别通过第一过孔与有源层图案中的有源层连接。
例如，上述第一绝缘层、第二绝缘层、第三绝缘层和第四绝缘层可以采用硅氧化物(SiOx)、硅氮化物(SiNx)和氮氧化硅(SiON)中的任意一种或更多种，可以是单层、多层或复合层。第一绝缘层可以为缓冲(Buffer)层，用 于提高衬底基板110的抗水氧能力；第二绝缘层和第三绝缘层可以为栅绝缘(GI，Gate Insulator)层；第四绝缘层可以为层间绝缘(ILD，Interlayer Dielectric)层。第一金属薄膜、第二金属薄膜和第三金属薄膜采用金属材料，如银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等。有源层薄膜采用非晶态氧化铟镓锌材料(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩、聚噻吩等一种或多种材料，即本公开适用于基于氧化物(Oxide)技术、硅技术以及有机物技术制造的晶体管。
例如，如图22A和图22B所示，在形成无机非金属材料层030后，对无机非金属材料层030进行图案化。例如，对无机非金属材料层030进行图案化包括采用干刻法对无机非金属材料层030进行刻蚀以在形成第二子隔断结构742的同时，有机材料层180中位于第二子隔断结构742正下方的部分有机材料层180被干刻形成第一子隔断结构741。例如，可以采用掩模板对待形成第二子隔断结构742的位置处的无机非金属材料层030进行遮挡，以使待形成第二子隔断结构742的位置处以外的其他位置的无机非金属材料层030被刻蚀，在对无机非金属材料层030进行干刻的过程中，刻蚀气体会对有机材料层180中没有被掩模板遮挡的部分进行刻蚀，以使在刻蚀后保留的无机非金属材料层(即第二子隔断结构742)的正下方保留了具有一定厚度的有机材料层(即第一子隔断结构741)，使得有机材料层180远离衬底基板110的一侧形成了位于第二子隔断结构742正下方的突出部，该突出部即为第一子隔断结构741。
例如，如图22A和图22B所示，在对无机非金属材料层030进行干刻的过程中，有机材料层180被刻蚀的厚度可以为100～10000埃，则形成的第一子隔断结构741的厚度可以为100～10000埃。例如，在对无机非金属材料层030进行干刻的过程中，有机材料层180被刻蚀的厚度可以为200～2000埃，则形成的第一子隔断结构741的厚度可以为200～2000埃。
例如，如图19和图22C所示，在形成隔断结构140后，在平坦层180上图案化形成子像素的第一电极131。例如，第一电极131通过平坦层180中的第二过孔与晶体管的漏电极连接。
例如，第一电极131可以采用金属材料，如镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材 料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等，或者，是金属和透明导电材料形成的堆栈结构，如ITO/Ag/ITO、Mo/AlNd/ITO等反射型材料。
例如，如图19和图22D所示，在形成第一电极131后，可以形成像素限定层150。例如，在形成前述图案的衬底基板110上涂覆像素限定薄膜，通过掩膜、曝光、显影工艺，形成像素限定层150。例如，显示区域的像素限定层150包括多个像素限定部158，相邻像素限定部401之间形成有第一开口152或者第二开口154，第一开口152和第二开口154内的像素限定膜被显影掉，第一开口152暴露多个子像素的第一电极131的至少部分表面，第二开口154暴露隔断结构140。
例如，形成像素限定层150后，可以在像素限定部上形成隔垫物。例如，在形成前述图案的衬底基板110上涂覆有机材料薄膜，通过掩膜、曝光、显影工艺，形成隔垫物。隔垫物可以作为支撑层，配置为在蒸镀过程中支撑FMM(高精度掩模板)。
例如，如图19所示，在形成隔垫物之后，依次形成发光功能层120以及第二电极132。例如，第二电极132可以为透明阴极。发光功能层120可以通过透明阴极从远离衬底基板110一侧出光，实现顶发射。例如，第二电极132可以采用镁(Mg)、银(Ag)、铝(Al)中的任意一种或更多种，或采用上述金属中任意一种或多种制成的合金，或者采用透明导电材料，例如，氧化铟锡(ITO)，或者，金属与透明导电材料的多层复合结构。
例如，形成发光功能层120可以包括：采用开口掩模板(Open Mask)依次蒸镀形成空穴注入层和空穴传输层；采用FMM依次蒸镀形成发不同颜色光的第一发光层131，例如蓝色发光层、绿色发光层和红色发光层；采用开口掩模板依次蒸镀形成电子传输层、电荷生成层133、以及空穴传输层；采用FMM依次蒸镀形成发不同颜色光的第二发光层132，例如蓝色发光层、绿色发光层和红色发光层；采用开口掩模板依次蒸镀形成电子传输层、第二电极以及光耦合层。例如，空穴注入层、空穴传输层、电子传输层、电荷生成层、第二电极以及光耦合层均为多个子像素的共通层。
例如，如图19所示，形成的发光功能层120会在隔断结构140的隔断突出部7420处断开，使得位于像素限定层150的第二开口154内的发光功能层120的一部分位于隔断结构140上，另一部分位于有机层180上。
例如，形成第二电极132以后，显示基板的制作方法还包括形成封装层，封装层可以包括叠设的第一封装层、第二封装层和第三封装层。第一封装层采用无机材料，在显示区域覆盖第二电极132。第二封装层采用有机材料。第三封装层采用无机材料，覆盖第一封装层和第二封装层。然而，本实施例对此并不限定。例如，封装层也可以采用无机/有机/无机/有机/无机的五层结构。
例如，相对于没有形成隔断结构的显示基板，本公开实施例提供的形成有隔断结构的显示基板只增加一道掩模工艺，对工艺产能的影响较低。
图23为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图23所示示例中的显示基板与图19所示示例中的显示基板的不同之处在于图23所示显示基板中的第一子隔断结构741的材料包括无机非金属材料。图23所示显示基板中的子像素200、衬底基板110以及像素限定层150可以与图19至图21B所示任一示例中的显示基板中的子像素200、衬底基板110以及像素限定层150具有相同的特征，在此不再赘述。
例如，如图23所示，第一子隔断结构741的材料与第二子隔断结构742的材料不同。例如，第二子隔断结构742的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种，第一子隔断结构741的材料也可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种，且第一子隔断结构741的材料与第二子隔断结构742的材料不同。
例如，如图23所示，多个子像素200可以包括沿相邻子像素的排列方向上排列的相邻两个子像素200。例如，第二子隔断结构742的至少一个边缘相对于第一子隔断结构741的相应边缘突出以形成至少一个隔断突出部7420。例如，如图23所示，第二子隔断结构742的两侧边缘均相对于第一子隔断结构741的相应边缘突出以形成两个隔断突出部7420。例如，两个隔断突出部7420沿相邻子像素的排列方向上排列。
例如，图23示意性的示出相邻两个子像素200之间设置有一个隔断结构140，该隔断结构140包括两个隔断突出部7420，但不限于此，相邻两个子像素之间还可以设置两个或者更多个隔断结构，每个隔断结构包括至少一个隔断突出部，通过对隔断结构的数量以及隔断突出部的数量的设置，有利于发光功能层的至少一层起到较好的断开效果。
例如，如图23所示，第一子隔断结构741面向所述第二子隔断结构742的表面在衬底基板110上的正投影完全位于第二子隔断结构742面向衬底基板 110一侧的表面在衬底基板110上的正投影内。
例如，如图23所示，在垂直于衬底基板110的方向，第一子隔断结构741的厚度大于第二子隔断结构742的厚度。
例如，如图23所示，在垂直于衬底基板110的方向，隔断结构140的厚度小于像素限定部401的厚度。例如，隔断结构140与像素限定部401之间设置有间隔。
例如，如图23所示，像素限定层150的第二开口154暴露的有机层180的远离衬底基板110一侧的表面可以为平坦的表面，即有机层180远离衬底基板110一侧的表面没有包括突出部。例如，如图23所示，第一子隔断结构741设置在有机层180远离衬底基板110一侧的表面上。
例如，如图23所示，在垂直于衬底基板110的方向，第二子隔断结构742的厚度不大于发光功能层120的厚度。例如，第二子隔断结构742的厚度可以为500～8000埃。
例如，如图23所示，沿垂直于衬底基板110的方向，隔断结构140的厚度与发光功能层120的厚度之比为0.8～1.2。例如，隔断结构140的厚度与发光功能层120的厚度之比为0.9～1.1。本公开实施例的一示例可以通过对隔断结构的厚度进行设置，例如隔断结构的厚度与发光功能层的厚度之比设置为0.8～1.2，以使发光功能层120在隔断结构140的隔断突出部7420处断开，而第二电极132保持连续不被隔断，从而起到防止相邻子像素间串扰的作用，同时第二电极不隔断又保证了显示的均一性。
例如，图23示意性的示出发光功能层120包括的全部膜层均在隔断结构140的隔断突出部7420处断开，但不限于此，还可以是发光功能层120的一部分膜层在隔断结构140的隔断突出部7420处断开，另一部分膜层在隔断突出部7420处连续。在隔断突出部7420处断开的膜层可以视为发生错位的膜层，通过使得膜层在隔断突出部7420处错位设置，有利于降低该膜层的横向串扰。
当然，图23所示示例不限于此，还可以设置隔断结构的厚度大于发光功能层的厚度，以使发光功能层和第二电极均在隔断结构的边缘断开。
例如，如图23所示，第一子隔断结构741被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第一截面包括矩形或梯形。例如，第一截面为梯形，梯形远离衬底基板110一侧的底边长度大于梯形靠近衬底基板110一侧的底边长度。例如，梯形的侧边与梯形靠近衬底基板110一侧的底边之间 的夹角不小于70度。例如，沿平行于衬底基板110的方向，隔断突出部7420的尺寸不小于0.01微米。例如，沿平行于衬底基板110的方向，隔断突出部7420的尺寸不小于0.1微米。
例如，如图23所示，隔断突出部7420的尺寸可以在0.01～5微米的范围内。例如，梯形的侧边与梯形靠近衬底基板110一侧的底边之间的夹角不小于90度。例如，隔断突出部7420的尺寸可以在0.1～2微米的范围内。
例如，第一子隔断结构741的侧边可以为直边，也可以为曲边，例如曲边向靠近其所在的第一子隔断结构741的中心的一侧弯曲，此时，第一子隔断结构741的曲边与靠近衬底基板110一侧的底边之间的夹角可以指曲边中点处切线与该底边之间的夹角，也可以指曲边与该底边的交点处切线与该底边之间的夹角。
本公开实施例通过对隔断结构的厚度、隔断突出部的尺寸以及第一子隔断结构的侧边角度的设置，可以实现发光功能层的至少一个膜层在隔断突出部处断开。
例如，如图23所示，第二子隔断结构742被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的第二截面包括矩形或梯形。例如，第二子隔断结构742的第二截面形状为矩形，通过将第二子隔断结构742的第二截面的短边设置为与其靠近衬底基板110一侧的长边之间的夹角为直角或大致直角(例如大致直角可以指两边之间的夹角与90度之差不大于10度)，可以有利于发光功能层120在第二子隔断结构742的边缘处断开。
例如，第二子隔断结构742的第二截面可以为梯形，梯形的侧边与梯形的靠近衬底基板110一侧的底边之间的夹角不小于70度。例如，第二截面可以为梯形，梯形的侧边与梯形的靠近衬底基板110一侧的底边之间的夹角不小于90度以使得第二子隔断结构742的侧边与梯形的远离衬底基板110一侧的底边之间的夹角为锐角，可以有利于发光功能层120在第二子隔断结构742的边缘处断开。
例如，图23示意性的示出第一子隔断结构741包括一层膜层，第二子隔断结构742包括一层膜层，但不限于此，第一子隔断结构741和第二子隔断结构742的至少之一可以包括多层膜层，至少第二子隔断结构742的边缘相对于第一子隔断结构741的边缘突出以形成用于断开发光功能层的至少一层的隔断突出部即可。
在隔断结构的侧边角度较大时(如第一截面的侧边与其靠近衬底基板一侧的底边之间的夹角，和/或，第二截面的侧板与其靠近衬底基板一侧的底边之间的夹角)，发光功能层沉积的厚度整体减薄，位于相邻子像素之间的发光功能层的至少一个膜层断开，使得该膜层的电阻增大，进一步减小相邻子像素间的串扰。
例如，本公开一实施例提供一种形成图23所示显示基板的制作方法，包括在衬底基板110上形成多个子像素200，其中，形成子像素200包括在垂直于衬底基板110的方向上依次形成层叠设置的第一电极131、发光功能层120以及第二电极132；在衬底基板110上形成第一材料层；在第一材料层上形成第二材料层，第二材料层为无机非金属材料层；对第一材料层和第二材料层同时图案化形成隔断结构140。形成隔断结构140包括对第二材料层图案化形成第二子隔断结构742的同时，第一材料层中位于第二子隔断结构742正下方的部分被刻蚀形成第一子隔断结构741；沿相邻子像素200的排列方向，位于该相邻子像素200之间的隔断结构140中第二子隔断结构742的边缘相对于第一子隔断结构741的边缘突出以形成隔断突出部7420；发光功能层120在形成隔断结构140后形成，发光功能层120包括多个膜层，多个膜层中的至少一层在隔断突出部7420处断开。
例如，第二材料层为无机材料层，对第一材料层和第二材料层同时图案化形成隔断结构140包括：采用对第一材料层和第二材料层刻蚀选择比不同的刻蚀液对第一材料层和第二材料层同时刻蚀，其中，刻蚀液对第一材料层的刻蚀选择比大于刻蚀液对第二材料层的刻蚀选择比，以使第一材料层被刻蚀后形成的第一子隔断结构741的边缘相对于第二材料层被刻蚀后形成的第二子隔断结构742的边缘内缩以形成底切结构。
例如，图24A至图24D为形成图23所示显示基板之前的显示基板的制作方法流程示意图。如图23、图24A至图24D所示，显示基板的制作方法包括：在衬底基板110上形成多个子像素200，其中，形成子像素200包括在垂直于衬底基板110的方向上依次形成层叠设置的第一电极131、发光功能层120以及第二电极132；在衬底基板110上形成有机材料层180；在有机材料层180上形成无机非金属材料层030，无机非金属材料层030包括至少两层膜层，例如膜层031(即第一材料层)和膜层032(即第二材料层)；对无机非金属材料层030图案化形成隔断结构140。隔断结构140包括第一子隔断结构741和第 二子隔断结构742，第一子隔断结构741位于第二子隔断结构742与衬底基板110之间；沿相邻子像素200的排列方向，位于该相邻子像素200之间的隔断结构140中第二子隔断结构742的边缘相对于第一子隔断结构741的边缘突出以形成隔断突出部7420；发光功能层120在形成隔断结构140后形成，发光功能层120包括多个膜层，多个膜层中的至少一层在隔断突出部7420处断开。
例如，形成图23所示显示基板中的衬底基板110、子像素200、以及像素限定层150等结构的制作方法可以与图22A至图22D所示形成显示基板中的衬底基板110、子像素200、以及像素限定层150等结构的制作方法相同，在此不再赘述。
例如，如图24A和图24B所示，在形成无机非金属材料层030后，对无机非金属材料层030进行图案化。例如，无机非金属材料层030可以包括两层膜层，例如第一无机非金属材料层031和第二无机非金属材料层032，对无机非金属材料层030进行图案化包括采用湿刻的工艺对无机非金属材料层030包括的两层膜层进行刻蚀，刻蚀液或者刻蚀气体对第一无机非金属材料层031的刻蚀选择比大于对第二无机非金属材料层032的刻蚀选择比，从而使得第一无机非金属材料层031被刻蚀形成的第一子隔断结构741的边缘相对于第二无机非金属材料层032被刻蚀形成的第二子隔断结构742的边缘内缩以形成底切结构，即形成隔断突出部7420。
例如，如图24C所示，在形成隔断结构140后，在平坦层180上图案化形成子像素的有机发光元件210的第一电极131。本示例形成第一电极131的方法以及材料可以与图22C所示形成第一电极131的方法以及材料相同，在此不再赘述。
例如，如图24D所示，在形成第一电极131后，可以形成像素限定层150。本示例形成像素限定层150的方法以及材料可以与图22D所示形成像素限定层150的方法以及材料相同，在此不再赘述。例如，本示例形成像素限定层以后的步骤可以与图19所示显示基板形成像素限定层以后的步骤相同，在此不再赘述。
例如，图25为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图25所示示例中的显示基板与图23所示示例中的显示基板的不同之处在于隔断结构140还包括第三子隔断结构743。图25所示显示基板中的子像素200、衬底基板110以及像素限定层150可以与图19至图21B以及图 23所示任一示例中的显示基板中的子像素200、衬底基板110以及像素限定层150具有相同的特征，在此不再赘述。图25所示显示基板中第一子隔断结构741与第二子隔断结构742的材料、形状以及尺寸关系可以与图5所示显示基板中第一子隔断结构741与第二子隔断结构742的材料、形状以及尺寸关系相同，在此不再赘述。
例如，如图25所示，第三子隔断结构743位于第一子隔断结构741与衬底基板110之间，沿相邻子像素200的排列方向，位于该相邻子像素200之间的隔断结构140中第一子隔断结构741的边缘相对于第三子隔断结构743的边缘突出，且第三子隔断结构743与有机层180为一体化的结构。
例如，如图25所示，第三子隔断结构743可以为有机层180中的一部分。例如，第三子隔断结构743可以为有机层180中向远离衬底基板110一侧突出的部分。例如，第一子隔断结构741可以位于该有机层180中向远离衬底基板110一侧突出的部分上。
例如，如图25所示，第三子隔断结构743的材料包括光致抗蚀剂，聚酰亚胺(PI)树脂，丙烯酸树脂，硅化合物或聚丙烯酸树脂的材料。
例如，如图25所示，第三子隔断结构743的厚度可以为100～10000埃。例如，第三子隔断结构743的厚度可以为200～2000埃。
例如，第三子隔断结构743被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的截面包括矩形。例如，第三子隔断结构743被沿相邻子像素200的排列方向且垂直于衬底基板110的平面所截的截面包括梯形，梯形的侧边与梯形靠近衬底基板110一侧的底边之间的夹角不大于90度。
例如，如图25所示，第三子隔断结构743的梯形截面的上底的长度小于第一子隔断结构741的截面的靠近衬底基板110一侧的边的长度。
例如，第三子隔断结构743的侧边可以为直边，也可以为曲边，例如，曲边向远离其所在的第三子隔断结构743的中心的一侧弯曲，或者，曲边向靠近其所在的第三子隔断结构743的中心的一侧弯曲，此时，第三子隔断结构743的曲边与下底之间的夹角可以指曲边中点处切线与下底之间的夹角，也可以指曲边与下底交点处切线与下底之间的夹角。
例如，形成图25所示隔断结构与形成图23所示隔断结构的不同之处在于，采用干刻法对无机非金属材料层030进行刻蚀以在形成第一子隔断结构741和第二子隔断结构742的同时，有机材料层180中位于第一子隔断结构741正下 方的部分有机材料层180被干刻形成第三子隔断结构743。例如，可以采用掩模板对待形成第一子隔断结构741和第二子隔断结构742的位置处的无机非金属材料层030进行遮挡，以使待形成第一子隔断结构741和第二子隔断结构742的位置处以外的其他位置的无机非金属材料层030被刻蚀，在对无机非金属材料层030进行干刻的过程中，刻蚀气体会对有机材料层180中没有被掩模板遮挡的部分进行刻蚀，以使在刻蚀后保留的无机非金属材料层(即第一子隔断结构741和第二子隔断结构742)的正下方保留了具有一定厚度的有机材料层(即第三子隔断结构743)，使得有机材料层180远离衬底基板110的一侧形成了位于第一子隔断结构741和第二子隔断结构742正下方的突出部，该突出部即为第三子隔断结构743。本示例不限于此，还可以先采用湿刻工艺形成第一子隔断结构741和第二子隔断结构742，然后采用干刻工艺形成第三子隔断结构743；或者采用先干刻后湿刻的工艺形成上述第一子隔断结构741、第二子隔断结构742以及第三子隔断结构743。
例如，如图22A和图22B所示，在对无机非金属材料层030进行干刻的过程中，有机材料层180被刻蚀的厚度可以为100～10000埃，则形成的第三子隔断结构743的厚度可以为100～10000埃。例如，在对无机非金属材料层030进行干刻的过程中，有机材料层180被刻蚀的厚度可以为200～2000埃，则形成的第三子隔断结构743的厚度可以为200～2000埃。
本公开至少一个实施例还提供一种显示基板。图26为本公开一实施例提供的另一种显示基板的结构示意图。如图26所示，该显示基板100包括衬底基板110和多个子像素(未示出)；多个子像素位于衬底基板110上，各子像素包括发光元件；各发光元件包括发光功能层和位于发光功能层的两侧的第一电极131和第二电极(未示出)，第一电极131位于发光功能层与衬底基板110之间；第二电极至少部分位于发光功能层远离第一电极131的一侧。需要说明的，子像素、发光元件和发光功能层的具体结构可参见图1和图2，本公开在此不再赘述。
如图26所示，该显示基板100还包括像素隔断结构140，像素隔断结构140位于衬底基板110上，且位于相邻的子像素之间；发光功能层中的多个子功能膜层中的至少一个在像素隔断结构140所在的位置断开。该显示基板100还包括像素限定层150；像素限定层150部分位于第一电极131远离衬底基板110的一侧；像素限定层150包括多个像素开口152；多个像素开口152与多 个子像素200一一对应以限定多个子像素200的有效发光区域；像素开口152被配置为暴露第一电极131，以便第一电极131与后续形成的发光功能层120接触。
如图26所示，像素隔断结构140包括内凹结构140C和遮挡部140S，内凹结构140C位于第一电极131的边缘，且向所述像素限定层150凹入，遮挡部140S位于凹槽140C远离衬底基板110的一侧，且为所述像素限定层150的一部分。由此，发光功能层的导电子层在遮挡部所在的位置处断开。由此，通过在相邻的子像素之间设置上述的像素隔断结构，该显示基板可避免发光功能层中导电性较高的子功能层造成相邻子像素之间的串扰。
另一方面，由于该显示基板可通过像素隔断结构避免相邻子像素之间的串扰，因此该显示基板可在采用双层发光(Tandem EL)设计的同时，提高像素密度。所以，该显示基板可具有寿命长、功耗低、亮度高、分辨率高等优点。
在一些示例中，如图26所示，内凹结构140C在衬底基板110上的正投影与遮挡部140S在衬底基板110上的正投影交叠。
图27为本公开一实施例提供的另一种显示基板的结构示意图。如图27所示，该内凹结构140C包括残留结构140R，位于内凹结构140靠近像素限定层150的位置。
在一些示例中，如图27所示，该残留结构140R的材料包括金属，例如银。
本公开一实施例还提供一种显示基板。图28为本公开一实施例提供的另一种显示基板的结构示意图。图28所示的显示基板提供了另一种像素隔断结构。如图28所示，该显示基板100还包括位于衬底基板110上的像素限定层150；像素限定层150部分位于第一电极131远离衬底基板110的一侧；像素限定层150包括多个像素开口152和像素间隔开口154；多个像素开口152与多个子像素200一一对应以限定多个子像素200的有效发光区域；像素开口152被配置为暴露第一电极131，以便第一电极131与后续形成的发光功能层120接触。像素间隔开口154位于相邻的第一电极131之间，隔断结构140的至少部分位于像素间隔开口154之中。
如图28所示，像素隔断结构140包括内凹结构140C和遮挡部140S，内凹结构140C位于像素间隔开口154的边缘，且向像素限定层150凹入。例如，内凹结构140C可沿平行与衬底基板110的方向向像素限定层150凹入。遮挡部140S位于凹槽140C远离衬底基板110的一侧，且为所述像素限定层150的 一部分。由此，发光功能层的导电子层在遮挡部所在的位置处断开。由此，通过在相邻的子像素之间设置上述的像素隔断结构，该显示基板可避免发光功能层中导电性较高的子功能层造成相邻子像素之间的串扰。
图29为本公开一实施例提供的另一种显示基板的结构示意图。如图29所示，该内凹结构140C包括残留结构140R，位于内凹结构140靠近像素限定层150的位置。
在一些示例中，如图29所示，该残留结构140R的材料包括金属、金属氧化物、有机物中的至少一种；上述的金属可为银，上述的金属氧化物可为氧化铟锌，上述的有机物可为氨基聚合物。
在一些示例中，当残留结构140的材料为氨基聚合物时，由于平坦层的材料包括光致抗蚀剂、聚酰亚胺(PI)树脂、丙烯酸树脂，硅化合物或聚丙烯酸树脂的材料。因此平坦层的溶剂以非氟化有机溶剂作为主要成分，这些光致抗蚀剂虽然可能含有少量氟化，但未能达到基本可溶于氟化液或全氟溶剂的程度，因此可利用他们正交的特性(溶液和溶剂不会相互反应)，可以利用刻蚀工艺形成上述的像素隔断结构。
图30A-图30C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图，该显示基板的制作方法包括：
如图30A所示，在平坦层180远离衬底基板110的一侧形成第一电极131和牺牲结构430。需要说明的是，上述的残留结构可为牺牲结构的一部分。
如图30B所示，在第一电极131和牺牲结构430远离衬底基板110的一侧形成像素限定层150。像素限定层150包括多个像素开口152和像素间隔开口154；多个像素开口152与多个第一电极131一一对应设置；像素开口152被配置为暴露第一电极131，以便第一电极131与后续形成的发光功能层120接触。像素间隔开口154位于相邻的第一电极131之间，牺牲结构430被像素间隔开口154部分暴露。
如图30C所示，以像素限定层150为掩膜对显示基板进行刻蚀，以将牺牲结构430去除，以形成上述的像素隔断结构140。
图31A-图31C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图，该显示基板的制作方法包括：
如图31A所示，在平坦层180远离衬底基板110的一侧形成第一电极131、保护结构240和牺牲结构430，保护结构240与第一电极131同层设置。保护 结构240的材料与第一电极131的材料相同，保护结构240的材料与牺牲结构430的材料不同。
如图31B所示，在第一电极131和牺牲结构430远离衬底基板110的一侧形成像素限定层150。像素限定层150包括多个像素开口152和像素间隔开口154；多个像素开口152与多个第一电极131一一对应设置；像素开口152被配置为暴露第一电极131，以便第一电极131与后续形成的发光功能层120接触。像素间隔开口154位于相邻的第一电极131之间，牺牲结构430被像素间隔开口154部分暴露。
如图31C所示，以像素限定层150为掩膜对显示基板进行刻蚀，以将牺牲结构430的去除，以形成上述的像素隔断结构140。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (24)

  1. 一种显示基板，包括：
    衬底基板；
    多个子像素，位于所述衬底基板上，各所述子像素包括发光元件，所述发光元件包括发光功能层和位于所述发光功能层的两侧的第二电极和第一电极，所述第一电极位于所述发光功能层和所述衬底基板之间，所述发光功能层包括导电子层；以及
    隔断结构，位于所述衬底基板上，
    其中，所述隔断结构位于相邻的所述子像素之间，所述发光功能层中的所述导电子层在所述隔断结构所在的位置断开。
  2. 根据权利要求1所述的显示基板，其中，所述隔断结构包括：
    第一子隔断结构；以及
    第二子隔断结构，
    其中，所述第一子隔断结构和所述第二子隔断结构在相邻的所述子像素的排列方向上依次设置。
  3. 根据权利要求1所述的显示基板，还包括：
    像素限定层，位于所述衬底基板上，
    其中，所述像素限定层部分位于所述第一电极远离所述衬底基板的一侧，所述像素限定层包括多个像素开口和像素间隔开口，所述多个像素开口与所述多个子像素一一对应以限定所述多个子像素的有效发光区域，所述像素开口被配置为暴露所述第一电极，
    所述像素间隔开口位于相邻的所述第一电极之间，所述隔断结构的至少部分位于所述像素间隔开口之中。
  4. 根据权利要求1-3中任一项所述的显示基板，其中，多个子像素包括多个第一颜色子像素、多个第二颜色子像素以及多个第三颜色子像素，
    所述隔断结构包括多个环状隔断部，所述环状隔断部围绕一个所述第一颜色子像素、一个所述第二颜色子像素和一个所述第三颜色子像素中的一个。
  5. 根据权利要求4所述的显示基板，其中，所述多个环状隔断部包括多个第一环状隔断部，所述第一环状隔断部围绕一个所述第二颜色子像素设置。
  6. 根据权利要求5所述的显示基板，其中，所述第一环状隔断部包括至 少一个第一缺口。
  7. 根据权利要求5所述的显示基板，其中，所述隔断结构还包括：
    多个第一条状隔断部，各所述第一条状隔断部沿第一方向延伸；以及
    多个第二条状隔断部，各所述第二条状隔断部沿第二方向延伸；
    其中，所述第一条状隔断部将在所述第一方向上相邻的两个第一环状隔断部相连，所述第二条状隔断部将在所述第二方向上相邻的两个第一环状隔断部相连，
    所述多个第一条状隔断部和所述多个第二条状隔断部将所述多个第一环状隔断部相连以在所述多个第一环状隔断部之外的区域形成多个第一网格结构和多个第二网格结构，所述第一网格结构围绕一个所述第一颜色子像素设置，所述第二网格结构围绕一个所述第三颜色子像素设置。
  8. 根据权利要求7所述的显示基板，还包括：
    隔垫物，
    其中，所述多个第一条状隔断部和所述多个第二条状隔断部将所述多个第一环状隔断部相连还形成多个第三网格结构，所述第三网格结构围绕相邻的一个所述第一颜色子像素和一个所述第三颜色子像素设置，所述隔垫物位于所述第三网格结构之内，且位于所述第一颜色子像素和所述第三颜色子像素之间。
  9. 根据权利要求7所述的显示基板，还包括：
    隔垫物，
    其中，所述隔垫物位于所述第一网格结构或所述第二网格结构之内，且位于相邻的所述第一颜色子像素和所述第三颜色子像素之间。
  10. 根据权利要求5所述的显示基板，其中，所述隔断结构还包括：
    多个第二环状隔断部，各所述第二环状隔断部围绕一个所述第一颜色子像素设置；以及
    多个第三环状隔断部，各所述第三环状隔断部围绕一个所述第三颜色子像素设置。
  11. 根据权利要求5所述的显示基板，其中，所述隔断结构还包括：
    多个第二环状隔断部，各所述第二环状隔断部围绕一个所述第一颜色子像素设置；以及
    多个第三环状隔断部，各所述第三环状隔断部围绕一个所述第三颜色子像素设置，
    其中，所述第三环状隔断部包括第二缺口，所述第三环状隔断部的第二缺口处的两端分别与在所述第一方向或所述第二方向上相邻的两个第一环状隔断部相连。
  12. 根据权利要求11所述的显示基板，还包括：
    隔垫物，
    其中，所述隔垫物位于所述第三环状隔断部的第二缺口处。
  13. 根据权利要求5所述的显示基板，其中，所述多个第一颜色子像素和所述多个第三颜色子像素沿第一方向和第二方向均交替设置以形成多个第一像素行和多个第一像素列，所述多个第二颜色子像素沿所述第一方向和所述第二方向均阵列排布以形成多个第二像素行和多个第二像素列，所述多个第一像素行和所述多个第二像素行沿所述第二方向交替设置且在所述第一方向上彼此错开，所述多个第一像素列和所述多个第二像素列沿所述第一方向交替设置且在所述第二方向上彼此错开，
    所述隔断结构位于相邻的所述第一颜色子像素和所述第三颜色子像素之间，和/或，所述隔断结构位于相邻的所述第二颜色子像素与所述第三颜色子像素之间，和/或，所述隔断结构位于相邻的所述第一颜色子像素和所述第二颜色子像素之间。
  14. 根据权利要求1-13中任一项所述的显示基板，其中，所述多个子像素包括多个第一颜色子像素、多个第二颜色子像素以及多个第三颜色子像素，
    所述隔断结构包括多个第一环状隔断部，各所述第一环状隔断部围绕相邻的两个所述第二颜色子像素设置。
  15. 根据权利要求14所述的显示基板，其中，所述隔断结构还包括：
    多个第二环状隔断部，各所述第二环状隔断部围绕一个所述第一颜色子像素设置；以及
    多个第三环状隔断部，各所述第三环状隔断部围绕一个所述第三颜色子像素设置。
  16. 根据权利要求15所述的显示基板，其中，所述多个第一环状隔断部、所述多个第二环状隔断部和所述多个第三环状隔断部中任意两个相邻的环状隔断部共用一个隔断边缘部。
  17. 根据权利要求14所述的显示基板，其中，所述多个子像素划分为多个子像素组，各子像素组包括一个第一颜色子像素、两个第二颜色子像素和一 个第三颜色子像素，
    在各子像素组中，所述第一颜色子像素和所述第三颜色子像素沿第一方向排列，两个所述第二颜色子像素在第二方向上相邻设置，且位于所述第一颜色子像素和所述第三颜色子像素之间。
  18. 根据权利要求1-17中任一项所述的显示基板，其中，所述隔断结构包括：
    凹槽；
    遮挡部，
    其中，所述遮挡部位于所述凹槽边缘且向所述凹槽内突出以形成覆盖所述凹槽的开口的一部分的突出部，所述发光功能层的导电子层在所述遮挡部的所述突出部处断开。
  19. 根据权利要求18所述的显示基板，其中，所述凹槽在相邻两个所述子像素的排列方向上的两个边缘分别设置有所述遮挡部。
  20. 根据权利要求1-19中任一项所述的显示基板，其中，所述隔断结构包括隔断柱，
    所述隔断柱包括层叠设置的第一隔离部和第二隔离部，所述第一隔离部位于所述第二隔离部的靠近所述衬底基板的一侧，
    其中，所述第二隔离部在相邻两个所述子像素的排列方向上具有超出所述第一隔离部的突出部，所述发光功能层的导电子层在所述第二隔离部的所述突出部处断开。
  21. 根据权利要求1-20中任一项所述的显示基板，其中，所述发光功能层包括位于所述导电子层在垂直于所述衬底基板的方向上的两侧的第一发光层和第二发光层，所述导电子层为电荷生成层。
  22. 根据权利要求1-21中任一项所述的显示基板，其中，所述第二电极在所述隔断结构所在的位置断开。
  23. 根据权利要求1-22任一项所述的显示基板，还包括：
    平坦层，位于所述第一电极靠近所述衬底基板的一侧；
    多条数据线，位于所述平坦层与所述衬底基板之间，所述多条数据线沿第一方向延伸且沿第二方向排列，所述第一方向和所述第二方向相交；
    多条电源线，位于所述平坦层与所述衬底基板之间，所述多条电源线沿所述第一方向延伸且沿所述第二方向排列，
    其中，沿垂直于所述衬底基板的方向，所述隔断结构与所述数据线和所述电源线的至少之一交叠。
  24. 一种显示装置，包括权利要求1-23任一项所述的显示基板。
PCT/CN2022/124653 2021-11-30 2022-10-11 显示基板和显示装置 WO2023098301A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202111450504.X 2021-11-30
CN202111450504.XA CN114628451B (zh) 2021-11-30 2021-11-30 显示基板和显示装置

Publications (1)

Publication Number Publication Date
WO2023098301A1 true WO2023098301A1 (zh) 2023-06-08

Family

ID=81897983

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/124653 WO2023098301A1 (zh) 2021-11-30 2022-10-11 显示基板和显示装置

Country Status (2)

Country Link
CN (2) CN117529148A (zh)
WO (1) WO2023098301A1 (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117560956A (zh) * 2023-11-14 2024-02-13 惠科股份有限公司 显示面板及显示装置
CN117560953A (zh) * 2023-12-19 2024-02-13 惠科股份有限公司 显示面板
CN117560952A (zh) * 2023-12-19 2024-02-13 惠科股份有限公司 显示面板
CN117750816A (zh) * 2023-11-16 2024-03-22 惠科股份有限公司 显示面板及显示装置

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117529148A (zh) * 2021-11-30 2024-02-06 京东方科技集团股份有限公司 显示基板和显示装置
CN116209314A (zh) * 2021-11-30 2023-06-02 京东方科技集团股份有限公司 显示基板以及显示装置
CN114628448A (zh) * 2021-11-30 2022-06-14 京东方科技集团股份有限公司 显示基板及其制作方法和显示装置
CN117981496A (zh) * 2022-08-30 2024-05-03 京东方科技集团股份有限公司 显示基板及其制作方法、以及显示装置
CN118285170A (zh) * 2022-11-01 2024-07-02 京东方科技集团股份有限公司 显示基板以及显示装置
WO2024109196A1 (zh) * 2022-11-22 2024-05-30 京东方科技集团股份有限公司 显示基板以及显示装置
US20240306434A1 (en) * 2022-11-22 2024-09-12 Chengdu Boe Optoelectronics Technology Co., Ltd. Display substrate and display device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3081484U (ja) * 2001-05-01 2001-11-02 凌巨科技股▲ふん▼有限公司 カラー液晶ディスプレイ
CN107895736A (zh) * 2017-12-15 2018-04-10 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板及其制作方法
CN110783382A (zh) * 2019-08-30 2020-02-11 昆山国显光电有限公司 显示面板、显示装置及显示面板的制作方法
CN111668380A (zh) * 2020-06-12 2020-09-15 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN212874542U (zh) * 2020-08-24 2021-04-02 合肥视涯技术有限公司 一种显示面板和显示装置
CN113314579A (zh) * 2021-05-26 2021-08-27 京东方科技集团股份有限公司 显示面板及显示装置
CN114628451A (zh) * 2021-11-30 2022-06-14 京东方科技集团股份有限公司 显示基板和显示装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN205844685U (zh) * 2016-07-14 2016-12-28 京东方科技集团股份有限公司 一种显示面板及显示装置
CN108493228B (zh) * 2018-05-23 2021-01-22 京东方科技集团股份有限公司 阵列基板及其制造方法、显示面板
CN112542495B (zh) * 2020-11-26 2023-11-24 合肥维信诺科技有限公司 显示面板与显示装置
CN113540194B (zh) * 2021-07-12 2022-08-23 武汉华星光电半导体显示技术有限公司 一种显示面板及显示装置
CN114628448A (zh) * 2021-11-30 2022-06-14 京东方科技集团股份有限公司 显示基板及其制作方法和显示装置
CN216749902U (zh) * 2021-11-30 2022-06-14 京东方科技集团股份有限公司 显示基板和显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3081484U (ja) * 2001-05-01 2001-11-02 凌巨科技股▲ふん▼有限公司 カラー液晶ディスプレイ
CN107895736A (zh) * 2017-12-15 2018-04-10 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板及其制作方法
CN110783382A (zh) * 2019-08-30 2020-02-11 昆山国显光电有限公司 显示面板、显示装置及显示面板的制作方法
CN111668380A (zh) * 2020-06-12 2020-09-15 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN212874542U (zh) * 2020-08-24 2021-04-02 合肥视涯技术有限公司 一种显示面板和显示装置
CN113314579A (zh) * 2021-05-26 2021-08-27 京东方科技集团股份有限公司 显示面板及显示装置
CN114628451A (zh) * 2021-11-30 2022-06-14 京东方科技集团股份有限公司 显示基板和显示装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117560956A (zh) * 2023-11-14 2024-02-13 惠科股份有限公司 显示面板及显示装置
CN117750816A (zh) * 2023-11-16 2024-03-22 惠科股份有限公司 显示面板及显示装置
CN117560953A (zh) * 2023-12-19 2024-02-13 惠科股份有限公司 显示面板
CN117560952A (zh) * 2023-12-19 2024-02-13 惠科股份有限公司 显示面板
CN117560952B (zh) * 2023-12-19 2024-08-30 惠科股份有限公司 显示面板

Also Published As

Publication number Publication date
CN114628451B (zh) 2024-01-09
CN114628451A (zh) 2022-06-14
CN117529148A (zh) 2024-02-06

Similar Documents

Publication Publication Date Title
WO2023098301A1 (zh) 显示基板和显示装置
WO2023098089A1 (zh) 显示基板及其制作方法和显示装置
CN216749902U (zh) 显示基板和显示装置
WO2022068409A1 (zh) 显示基板及其制备方法、显示装置
WO2022042059A1 (zh) Oled显示面板及其制备方法、显示装置
WO2023098253A1 (zh) 显示基板及其制作方法和显示装置
KR20180075958A (ko) 유기 발광 표시 장치
CN114628405B (zh) 显示基板及其制作方法、以及显示装置
CN114628449B (zh) 显示基板及其制作方法、以及显示装置
CN115280537A (zh) 显示基板及其制备方法、显示装置
WO2023098285A1 (zh) 显示基板以及显示装置
CN111668380B (zh) 显示基板及其制备方法、显示装置
US9214503B2 (en) Organic light emitting display panel including a protective spacer and method of manufacturing the same
CN109564931B (zh) 堆叠式有机发光装置、有机发光二极管显示装置和制造堆叠式有机发光装置的方法
WO2022222084A1 (zh) 显示基板及其制备方法、显示装置
WO2022222070A1 (zh) 显示基板及其制备方法、显示装置
WO2022222078A1 (zh) 显示基板及其制备方法、显示装置
WO2023098298A9 (zh) 显示基板和显示装置
US20240224599A1 (en) Display substrate, manufacturing method thereof and display device
WO2024000489A1 (zh) 显示面板及其制备方法、显示装置
CN115623822A (zh) 显示基板、显示面板
CN117643197A (zh) 显示基板和显示装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 18578514

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE