WO2023093208A1 - 一种芯片双积分球测试装置及测试方法 - Google Patents

一种芯片双积分球测试装置及测试方法 Download PDF

Info

Publication number
WO2023093208A1
WO2023093208A1 PCT/CN2022/117443 CN2022117443W WO2023093208A1 WO 2023093208 A1 WO2023093208 A1 WO 2023093208A1 CN 2022117443 W CN2022117443 W CN 2022117443W WO 2023093208 A1 WO2023093208 A1 WO 2023093208A1
Authority
WO
WIPO (PCT)
Prior art keywords
test
testing
chip
integrating sphere
station
Prior art date
Application number
PCT/CN2022/117443
Other languages
English (en)
French (fr)
Inventor
张智峰
牛超凡
伊克木·伊力夏提
徐虎子
韩凯音
赵兴华
王泽明
Original Assignee
河北圣昊光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 河北圣昊光电科技有限公司 filed Critical 河北圣昊光电科技有限公司
Publication of WO2023093208A1 publication Critical patent/WO2023093208A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2887—Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2891—Features relating to contacting the IC under test, e.g. probe heads; chucks related to sensing or controlling of force, position, temperature

Definitions

  • the present application relates to the technical field of chip testing, in particular to a chip double integrating sphere testing device and testing method.
  • Chips are widely used in mobile terminals, computer equipment, face recognition, smart home, unmanned driving, aerospace and other fields. In the process of chip development and use, it is generally necessary to test a number of parameters of the chip (such as beam divergence angle, optical power, current, voltage, and wavelength of the spectrum, etc.) to determine whether the photoelectric characteristics and working status of the chip meet the requirements. .
  • the existing chip test system can only test chips with a single range and range of power and wavelength.
  • test system configuration structure needs to be dismantled, and then another set of test system configuration structure with the corresponding range and range needs to be replaced; the other is that a test that only applies to the range and range of the chip under test needs to be purchased separately equipment.
  • the above two methods have not only greatly increased the equipment investment cost, but also are extremely inconvenient to replace and use, which affects the test efficiency and test accuracy.
  • the technical problem to be solved in this application is to overcome the defects that the chip testing device in the prior art cannot measure chips of different powers and wavelengths at the same time, the operation is complicated, and the testing efficiency is low, thereby providing a low-cost, high testing efficiency , convenient and flexible, a double integrating sphere test device and a test method that can measure chips of different powers and wavelengths arbitrarily.
  • the application provides a chip double integrating sphere testing device, including:
  • the driving structure is arranged on one side of the turntable, and includes a bracket, a driving member connected to the bracket, and a slide rail slidingly connected to the bracket, and two installation stations are arranged side by side on the bracket;
  • the first test structure and the second test structure are respectively arranged on the two installation stations, and under the action of the driving part, the distance between the first test structure or the second test structure and the two installation stations Test station alignment.
  • the first test structure is a first integrating sphere with a first power
  • the second test structure is a second integrating sphere with a second power
  • both the first integrating sphere and the second integrating sphere are provided with two spectral output terminals and one PD output terminal.
  • a pair of probes is also included, and a pair of probes corresponds to the setting of the testing station between the two installation stations.
  • it also includes a first camera and a second camera set corresponding to the test station between the two installation stations, the first camera is set perpendicular to the test station, and the second camera is perpendicular to the test station Describe the first camera settings.
  • a temperature control structure is provided on the test station, and a test platform is provided on the temperature control structure.
  • a test method comprising the following steps:
  • the chip to be tested is transported to the test station, and the corresponding first test structure or the second test structure is driven to align with the chip to be tested on the test station according to the power and wavelength of the chip to be tested for testing.
  • it also includes applying required current or voltage to a pair of probes according to the test requirements of the chip to be tested.
  • the chip double integrating sphere test device provided by this application, when it is necessary to test chips with different powers and wavelengths, only the driving part drives the bracket to move to the corresponding first test structure or the second test structure and the two installation workers It is only necessary to align the test stations between the stations, and there is no need to disassemble the test structure, so the test is convenient and the efficiency is high.
  • the device is suitable for measuring chips of different powers and wavelengths, reduces the investment cost of the equipment for users, and plays the role of one machine with multiple functions, which can meet the test of high-power and low-power chips with one device
  • the wavelength range of the spectrometer on the test structure can be freely selected and does not overlap, thereby expanding the test range of wavelengths.
  • the chip double integrating sphere test device provided by the application can determine the magnitude of the current or voltage applied to a pair of probes according to the test requirements of the chip to be tested, and correspondingly select the first test structure or the second test structure for testing, thereby Guarantee the accuracy of the test.
  • the first camera is set perpendicular to the test station, and can clearly observe whether a pair of probes are aligned with the corresponding positions of the electrode area of the chip, so as to ensure normal power-on and the second camera
  • the vertical distance between the pair of probes and the chip can be clearly observed by being set perpendicular to the first camera, so as to ensure that the pair of probes can accurately press down and contact the electrodes of the chip for testing without damaging the chip.
  • Fig. 1 is the schematic diagram of the chip double integrating sphere testing device provided by the application;
  • FIG. 2 is a partially enlarged schematic diagram of FIG. 1 .
  • a kind of specific implementation of the chip double integrating sphere testing device as shown in Figure 1 and 2 comprise turntable 1, the drive structure that is arranged on the side of described turntable 1 and the first test structure 2 that is arranged on the drive structure, Second Test Structure 3.
  • the turntable 1 has two test stations oppositely arranged, one test station is used to accept the chip transferred by the suction nozzle, and correct the position of the chip, and the other test station is used to perform related photoelectric tests on the corrected chip. test.
  • the turntable 1 is driven by a motor to rotate to transfer the calibrated chips to the testing station, and after the tested chips are delivered to the calibration station, they are transferred to the next station by the suction nozzle.
  • a temperature control structure 4 is provided on the test station, a test platform is set on the temperature control structure 4, and chips are placed on the test platform.
  • a drive structure including a bracket 5, a driver connected to the bracket 5, and a slide rail 6 slidingly connected to the bracket 5.
  • the slide rail 6 is Linear slide rail, the bottom of the bracket 5 is provided with a slide seat 7 slidingly connected with the slide rail 6, and the upper part is provided with two installation stations side by side; the driving part is a motor, which is used to drive the slide seat 7 to reciprocate on the slide rail 6 Slide to toggle the position of the two mounting stations.
  • the first test structure 2 and the second test structure 3 are separately arranged on the two installation stations, specifically, the first test structure 2 is a first integrating sphere with the first power, and the second test structure 3 is a second integrating sphere with a second power, where the first power is greater than the second power.
  • Two spectral output terminals 8 and one PD output terminal 9 are provided on the spherical surfaces of the first integrating sphere and the second integrating sphere away from the turntable 1 .
  • the first test structure 2 is aligned with the test station between the two installation stations;
  • the second test structure 3 is aligned with the test station between the two installation stations.
  • a pair of mounting frames 10 are also provided on both sides of the testing station between the two mounting stations, and a pair of probes 11 are respectively arranged on the pair of mounting frames 10 .
  • a driving current is applied to a pair of probes 11 at the same time; when the power of the chip to be tested is low, only one of the probes 11 is applied with a driving current, and the other probe 11 only plays an auxiliary role. Press the chip to improve the contact effect between the chip and the test bench.
  • a first camera 12 and a second camera 13 are also arranged above the test station between the two installation stations. 12 is arranged perpendicular to the testing station, and the second camera 13 is arranged perpendicular to the first camera 12 between two installation stations.
  • a test method comprising the steps of:
  • the motor drives the turntable 1 to rotate 180° until the chip to be tested reaches another test station between the two installation stations , the probe 11 is pressed down to contact with the chip to be tested.
  • the power of the chip to be tested is high and the wavelength is between 750nm-1100nm, current must be applied to the two probes 11 at the same time to drive the corresponding pair of first integrating spheres.
  • the chip to be tested on the quasi-test station is scanned for optical power characteristics and spectral characteristics. At the same time, positioning alignment correction is performed after the suction nozzle transfers another chip of the supply station to the test station far away from the driving structure.
  • the test results are judged, that is, whether the chip is qualified or not. After the test of the chip is completed, the probe 11 is lifted, and the turntable 1 is reversely rotated by 180° to test the next chip, and transfer the tested chip to the next station.
  • the second integrating sphere is aligned with the chip to be tested on the test station to perform a scanning test of optical power characteristics and spectral characteristics.
  • brackets 5 are arranged side by side, and each bracket 5 is provided with an installation station.
  • two groups of test stations are oppositely arranged on the turntable 1, and the connecting lines of the two groups of test stations are arranged perpendicular to each other.
  • a group of test stations can place high-power chips, and another group of test stations can place low-power chips to improve detection efficiency.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

一种芯片双积分球测试装置及测试方法。一种芯片双积分球测试装置，包括：转盘（1），具有相对设置的至少两个测试工位；驱动结构，设于转盘（1）的一侧，包括支架（5）、与支架（5）连接的驱动件和与支架（5）滑动连接的滑轨（6），支架（5）上并排设有两个安装工位；第一测试结构（2）和第二测试结构（3），分设于两个安装工位上，在驱动件的作用下，第一测试结构（2）或第二测试结构（3）与两个安装工位之间的测试工位对准。这种芯片双积分球测试装置及测试方法可以同时测量不同功率和波长的芯片，测试效率较高。

Description

一种芯片双积分球测试装置及测试方法
相关申请的交叉引用
本申请要求在2021年11月25日提交中国专利局、申请号为202111408116.5、发明名称为“一种芯片双积分球测试装置及测试方法”的中国专利申请的优先权，其全部内容通过引用的方式并入本文中。
技术领域
本申请涉及芯片测试技术领域，具体涉及一种芯片双积分球测试装置及测试方法。
背景技术
芯片广泛应用于移动终端、计算机设备、人脸识别、智能家居、无人驾驶、航空航天等各个领域当中。在芯片的研发和使用过程中，一般需要对芯片的多项参数(如光束发散角、光功率、电流、电压以及光谱的波长等)进行测试，以确定芯片的光电特性和工作状态是否满足要求。但现有的芯片测试系统只能针对单一量程和范围的功率和波长的芯片进行测试，当需要对超出测试系统的量程和范围的功率和波长的芯片进行测试时，只能采取如下两种方法：一种是需要将现有的测试系统配置结构拆除，再更换相应量程和范围的另一套测试系统配置结构；另一种是需要单独购买只能适用于待测芯片的量程和范围的测试设备。上述两种方法既大幅增加了设备投资成本，且更换使用中极其不方便，影响测试效率和测试精度。
发明内容
因此，本申请要解决的技术问题在于克服现有技术中的芯片测试装置不能同时测量不同功率和波长的芯片，操作复杂，测试效率较低的缺陷，从而提供一种成本低廉，测试效率极高，方便灵活，可以任意测量不同功率和波长芯片的双积分球测试装置及测试方法。
为了解决上述技术问题，本申请提供了一种芯片双积分球测试装置，包括：
转盘，具有相对设置的至少两个测试工位；
驱动结构，设于所述转盘的一侧，包括支架、与支架连接的驱动件和与所述支架滑动连接的滑轨，所述支架上并排设有两个安装工位；
第一测试结构和第二测试结构，分设于两个所述安装工位上，在所述驱动件的作用下，所述第一测试结构或第二测试结构与两个安装工位之间的测试工位对准。
可选地，所述第一测试结构为具有第一功率的第一积分球，所述第二测试结构为具有第二功率的第二积分球。
可选地，所述第一积分球和第二积分球均设有两个光谱输出端和一个PD输出端。
可选地，还包括一对探针，一对探针对应两个安装工位之间的测试工位设置。
可选地，还包括对应两个安装工位之间的测试工位设置的第一相机和第二相机，所述第一相机垂直于所述测试工位设置，所述第二相机垂直于所述第一相机设置。
可选地，所述测试工位上设有温控结构，测试台设于所述温控结构上。
还提供了一种测试方法，包括以下步骤：
将待测芯片运送至测试工位，根据待测芯片的功率和波长驱动相应的第一测试结构或第二测试结构对准测试工位上的待测芯片进行测试。
可选地，还包括根据待测芯片的测试要求向一对探针施加所需要的电流或电压。
本申请技术方案，具有如下优点：
1.本申请提供的芯片双积分球测试装置，当需要对不同功率和波长的芯片进行测试时，只需驱动件驱动支架移动至相应的第一测试结构或第二测试结构与两个安装工位之间的测试工位对准即可，不需 要拆装测试结构，测试方便，效率较高。该装置适用于任意测量不同功率和波长的芯片，降低用户对于设备的投资成本，起到一机多用的作用，可满足一台设备可适用于大功率和小功率芯片的测试，同时由于两个测试结构上的光谱仪波长范围可自由选配且不重叠，从而扩展了波长的测试范围。
2.本申请提供的芯片双积分球测试装置，可以根据待测芯片的测试要求确定对一对探针施加的电流或电压的大小，对应选择第一测试结构或第二测试结构进行测试，从而保证测试的准确性。
3.本申请提供的芯片双积分球测试装置，第一相机垂直于测试工位设置，可以清晰观察一对探针与芯片的电极区相应位置是否对准，以保证加电正常且第二相机垂直于第一相机设置，可以清晰观察一对探针与芯片之间的垂直距离，从而保证一对探针可以准确下压接触到芯片的电极进行测试，且不会损坏芯片。
附图说明
为了更清楚地说明本申请具体实施方式或现有技术中的技术方案，下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施方式，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请提供的芯片双积分球测试装置的示意图；
图2为图1的局部放大示意图。
附图标记说明：
1、转盘；2、第一测试结构；3、第二测试结构；4、温控结构；5、支架；6、滑轨；7、滑座；8、光谱输出端；9、PD输出端；10、安装架；11、探针；12、第一相机；13、第二相机。
具体实施方式
下面将结合附图对本申请的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。 基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
此外，下面所描述的本申请不同实施方式中所涉及的技术特征只要彼此之间未构成冲突就可以相互结合。
如图1和2所示的芯片双积分球测试装置的一种具体实施方式，包括转盘1、设于所述转盘1的一侧的驱动结构和设于驱动结构上的第一测试结构2、第二测试结构3。
转盘1具有相对设置的两个测试工位，一个测试工位用于承接经吸嘴转移的芯片，并对芯片的位置进行校正，另一个测试工位用于对校正后的芯片进行相关的光电测试。转盘1由电机驱动进行旋转，以将校正后的芯片转移至测试工位，并在将测试完成的芯片输送至校正工位后由吸嘴转移至下一工位。具体地，测试工位上设有温控结构4，测试台设于所述温控结构4上，芯片放置在测试台上。
为实现对不同功率和波长的芯片的高效测试，本实施例中设置了驱动结构，包括支架5、与支架5连接的驱动件和与所述支架5滑动连接的滑轨6，滑轨6为直线滑轨，所述支架5的底部设有与滑轨6滑动连接的滑座7，上部并排设有两个安装工位；驱动件为电机，用于驱动滑座7在滑轨6上往复滑动，以切换两个安装工位的位置。
第一测试结构2和第二测试结构3分设于两个所述安装工位上，具体地，所述第一测试结构2为具有第一功率的第一积分球，所述第二测试结构3为具有第二功率的第二积分球，其中，第一功率大于第二功率。所述第一积分球和第二积分球远离转盘1的球面上均设有两个光谱输出端8和一个PD输出端9。在所述驱动件的作用下，当待测芯片的功率和波长(750nm-1100nm之间)较大时，所述第一测试结构2与两个安装工位之间的测试工位对准；当待测芯片的功率和波长(300nm-750nm之间)较小时，所述第二测试结构3与两个安装工位之间的测试工位对准。这是由于若使用大功率积分球测试小功率芯片，分辨率较低，测试准确度也较低；而若用小功率积分球测试大功率芯片，当大功率芯片上施加的驱动电流较大时，会产生很大的峰值功率，平均功率也会很高，对积分球造成损害，甚至烧毁。
在两个安装工位之间的测试工位的两侧还设有一对安装架10，一对探针11分设在一对安装架10上。当待测芯片的功率较大时，同时对一对探针11施加驱动电流；当待测芯片的功率较小时，只对其中一个探针11施加驱动电流，另一个探针11只起到辅助按压芯片，以提高芯片与测试台的接触效果的作用。
为保证一对探针11既能准确按压芯片，又不至于损坏芯片，在两个安装工位之间的测试工位上方还设置有第一相机12和第二相机13，所述第一相机12垂直于所述测试工位设置，所述第二相机13垂直于所述第一相机12设置在两个安装工位之间。
一种测试方法，包括以下步骤：
在将待测芯片运送至远离驱动结构的测试工位，并进行定位、对准校正之后，电机驱动转盘1旋转180°，直到待测芯片到达两个安装工位之间的另一测试工位，探针11下压至与待测芯片接触，当待测芯片的功率较大且波长在750nm-1100nm之间时，必须对两个探针11同时施加电流，驱动相应的第一积分球对准测试工位上的待测芯片进行光功率特性和光谱特性扫描测试。与此同时，在吸嘴将供给工位的另一芯片转移至远离驱动结构的测试工位之后进行定位对准校正。根据客户需求，对测试结果进行判定，即判定芯片是否合格。当该芯片测试完成后，探针11抬起，转盘1反向旋转180°，进行下一芯片的测试，并将测试完成的芯片转移至下一工位。
当待测芯片的功率较小且波长在300nm-750nm之间时，只需要对一个探针11施加电流，另一个探针11只需要保持与芯片的接触，但不需要施加电流，驱动相应的第二积分球对准测试工位上的待测芯片进行光功率特性和光谱特性扫描测试。
作为替代的实施方式，支架5为并排设置的两个，每个支架5上各设有一个安装工位。
作为替代的实施方式，转盘1上相对设置有两组测试工位，两组测试工位的连线相互垂直设置。一组测试工位可以放置大功率芯片，另一组测试工位则可以放置小功率芯片，以提高检测效率。
显然，上述实施例仅仅是为清楚地说明所作的举例，而并非对实 施方式的限定。对于所属领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动和自由组合积分球功率量程和光谱仪测量范围。这里无需也无法对所有的实施方式予以穷举。而由此所引申出的显而易见的变化或变动仍处于本发明创造的保护范围内。

Claims (8)

  1. 一种芯片双积分球测试装置，其特征在于，包括：
    转盘(1)，具有相对设置的至少两个测试工位；
    驱动结构，设于所述转盘(1)的一侧，包括支架(5)、与支架(5)连接的驱动件和与所述支架(5)滑动连接的滑轨(6)，所述支架(5)上并排设有两个安装工位；
    第一测试结构(2)和第二测试结构(3)，分设于两个所述安装工位上，在所述驱动件的作用下，所述第一测试结构(2)或第二测试结构(3)与两个安装工位之间的测试工位对准。
  2. 根据权利要求1所述的芯片双积分球测试装置，其特征在于，所述第一测试结构(2)为具有第一功率的第一积分球，所述第二测试结构(3)为具有第二功率的第二积分球。
  3. 根据权利要求2所述的芯片双积分球测试装置，其特征在于，所述第一积分球和第二积分球均设有两个光谱输出端(8)和一个PD输出端(9)。
  4. 根据权利要求1-3任一项所述的芯片双积分球测试装置，其特征在于，还包括一对探针(11)，一对探针(11)对应两个安装工位之间的测试工位设置。
  5. 根据权利要求4所述的芯片双积分球测试装置，其特征在于，还包括对应两个安装工位之间的测试工位设置的第一相机(12)和第二相机(13)，所述第一相机(12)垂直于所述测试工位设置，所述第二相机(13)垂直于所述第一相机(12)设置。
  6. 根据权利要求1-3任一项所述的芯片双积分球测试装置，其特征在于，所述测试工位上设有温控结构(4)，测试台设于所述温控结构(4)上。
  7. 一种测试方法，其特征在于，包括以下步骤：
    将待测芯片运送至测试工位，根据待测芯片的功率和波长驱动相应的第一测试结构(2)或第二测试结构(3)对准测试工位上的待测芯片进行测试。
  8. 根据权利要求7所述的测试方法，其特征在于，还包括根据待测芯片的测试要求向一对探针(11)施加所需要的电流或电压。
PCT/CN2022/117443 2021-11-25 2022-09-07 一种芯片双积分球测试装置及测试方法 WO2023093208A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202111408116.5A CN113848464B (zh) 2021-11-25 2021-11-25 一种芯片双积分球测试装置及测试方法
CN202111408116.5 2021-11-25

Publications (1)

Publication Number Publication Date
WO2023093208A1 true WO2023093208A1 (zh) 2023-06-01

Family

ID=78982135

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/117443 WO2023093208A1 (zh) 2021-11-25 2022-09-07 一种芯片双积分球测试装置及测试方法

Country Status (2)

Country Link
CN (1) CN113848464B (zh)
WO (1) WO2023093208A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113848464B (zh) * 2021-11-25 2022-02-15 河北圣昊光电科技有限公司 一种芯片双积分球测试装置及测试方法
CN113865835B (zh) * 2021-12-06 2022-02-18 河北圣昊光电科技有限公司 一种基于双积分球的芯片测试设备及测试方法
CN114280463B (zh) * 2021-12-31 2023-08-08 武汉锐科光纤激光技术股份有限公司 一种芯片测试系统
CN114803452B (zh) * 2022-04-29 2024-04-09 河北圣昊光电科技有限公司 一种同步传动组件及具有其的裂片机

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5384531A (en) * 1991-09-05 1995-01-24 Mitsubishi Electrical Engineering Co. Ltd. Apparatus for inspecting characteristics of semiconductor chips
US20050253609A1 (en) * 2004-05-14 2005-11-17 Innolux Display Corp. Testing apparatus with electronic camera
JP2012093112A (ja) * 2010-10-25 2012-05-17 Mitsubishi Electric Corp 半導体チップテスト装置及び半導体チップテスト装置の操作手順
CN104483617A (zh) * 2014-12-31 2015-04-01 华中科技大学 一种倒装led芯片在线检测装置
JP2016157804A (ja) * 2015-02-24 2016-09-01 株式会社東京精密 プローバ
CN106644402A (zh) * 2016-09-06 2017-05-10 深圳清华大学研究院 一种积分球及其测量方法
CN108627762A (zh) * 2018-06-08 2018-10-09 深圳瑞波光电子有限公司 一种测试系统
CN110333051A (zh) * 2019-09-03 2019-10-15 江西德瑞光电技术有限责任公司 一种半导体激光芯片的测试设备及方法
CN111965520A (zh) * 2020-07-24 2020-11-20 武汉锐科光纤激光技术股份有限公司 一种芯片测试设备
CN112687563A (zh) * 2020-12-09 2021-04-20 深圳市盛世智能装备有限公司 芯片检测设备
CN113848464A (zh) * 2021-11-25 2021-12-28 河北圣昊光电科技有限公司 一种芯片双积分球测试装置及测试方法
CN113865835A (zh) * 2021-12-06 2021-12-31 河北圣昊光电科技有限公司 一种基于双积分球的芯片测试设备及测试方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7837348B2 (en) * 2004-05-05 2010-11-23 Rensselaer Polytechnic Institute Lighting system using multiple colored light emitting sources and diffuser element
CN202329814U (zh) * 2011-11-08 2012-07-11 杭州中为光电技术股份有限公司 一种对流水线上的led灯进行测试的机构
CN102538968B (zh) * 2011-12-29 2013-07-03 中国科学院长春光学精密机械与物理研究所 真空紫外半球反射率测试装置
CN106291304B (zh) * 2016-07-29 2019-04-05 深圳清华大学研究院 一种led测试装置及测试方法
CN208299940U (zh) * 2018-07-03 2018-12-28 深圳眼千里科技有限公司 一种双工位摄像头模组的检测装置
CN210835134U (zh) * 2019-08-15 2020-06-23 佛山市多谱光电科技有限公司 一种cob加热高压测试机
CN110646725A (zh) * 2019-09-02 2020-01-03 深圳市极致兴通科技有限公司 一种激光器芯片半成品的快速测试装置及测试方法
CN110426380B (zh) * 2019-09-29 2020-01-21 常州星宇车灯股份有限公司 一种透射式可控温的激光激发远程荧光材料的测试装置
CN214583968U (zh) * 2021-05-07 2021-11-02 上海力兹照明电气有限公司 一种功率型led光源器件积分球光学测试装置

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5384531A (en) * 1991-09-05 1995-01-24 Mitsubishi Electrical Engineering Co. Ltd. Apparatus for inspecting characteristics of semiconductor chips
US20050253609A1 (en) * 2004-05-14 2005-11-17 Innolux Display Corp. Testing apparatus with electronic camera
JP2012093112A (ja) * 2010-10-25 2012-05-17 Mitsubishi Electric Corp 半導体チップテスト装置及び半導体チップテスト装置の操作手順
CN104483617A (zh) * 2014-12-31 2015-04-01 华中科技大学 一种倒装led芯片在线检测装置
JP2016157804A (ja) * 2015-02-24 2016-09-01 株式会社東京精密 プローバ
CN106644402A (zh) * 2016-09-06 2017-05-10 深圳清华大学研究院 一种积分球及其测量方法
CN108627762A (zh) * 2018-06-08 2018-10-09 深圳瑞波光电子有限公司 一种测试系统
CN110333051A (zh) * 2019-09-03 2019-10-15 江西德瑞光电技术有限责任公司 一种半导体激光芯片的测试设备及方法
CN111965520A (zh) * 2020-07-24 2020-11-20 武汉锐科光纤激光技术股份有限公司 一种芯片测试设备
CN112687563A (zh) * 2020-12-09 2021-04-20 深圳市盛世智能装备有限公司 芯片检测设备
CN113848464A (zh) * 2021-11-25 2021-12-28 河北圣昊光电科技有限公司 一种芯片双积分球测试装置及测试方法
CN113865835A (zh) * 2021-12-06 2021-12-31 河北圣昊光电科技有限公司 一种基于双积分球的芯片测试设备及测试方法

Also Published As

Publication number Publication date
CN113848464A (zh) 2021-12-28
CN113848464B (zh) 2022-02-15

Similar Documents

Publication Publication Date Title
WO2023093208A1 (zh) 一种芯片双积分球测试装置及测试方法
WO2023103493A1 (zh) 一种基于双积分球的芯片测试设备及测试方法
KR101749888B1 (ko) 디스플레이 패널 검사장치 및 검사방법
CN115274484B (zh) 一种晶圆检测装置及其检测方法
CN108983460B (zh) 一种探针压接装置的定位精度补偿系统及方法
CN110501539A (zh) 用于探针卡制造、检测及维修的设备及其使用方法
TWM611776U (zh) 架橋連接式的自動化測試系統
CN107807431A (zh) 一种大口径高功率激光倍频晶体边缘自锁夹持装置和方法
TWI421513B (zh) 陣列基板檢測裝置及方法
CN218726587U (zh) 一种用于电源芯片质检装置
CN109814025A (zh) 一种对晶圆进行测试的设备、方法和系统
CN204013397U (zh) 一种i-v不均匀性测试工装
CN115184777B (zh) 一种含soa的eml芯片全自动测试机及测试方法
CN111060288A (zh) 偏光片光学性能检测系统及其检测方法
CN212569024U (zh) 一种晶圆探针台
CN208207070U (zh) 一种自动探针测试装置及系统
CN113945585A (zh) 一种高精度光缆外表面检测装置及其检测方法
CN115407234A (zh) 光伏电池的检测系统和检测方法
TW200925585A (en) Automatic defect inspection device for substrate laser repair and method thereof
CN216772143U (zh) 一种cell产品的压接治具及测试设备
JP2769372B2 (ja) Ｌｃｄプローブ装置
TWI670503B (zh) 晶粒之光電特性及外觀檢測系統
TWI750984B (zh) 架橋連接式的自動化測試系統
CN211563726U (zh) 半导体激光芯片双温度光电特性测试与外观检测一体机
TW583403B (en) Automatic detection system of conductive particle bonding and its automatic detection method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22897299

Country of ref document: EP

Kind code of ref document: A1