WO2023090013A1 - ヒートシンク付回路基板およびその製造方法、ならびに半導体装置およびその製造方法 - Google Patents

ヒートシンク付回路基板およびその製造方法、ならびに半導体装置およびその製造方法 Download PDF

Info

Publication number
WO2023090013A1
WO2023090013A1 PCT/JP2022/038417 JP2022038417W WO2023090013A1 WO 2023090013 A1 WO2023090013 A1 WO 2023090013A1 JP 2022038417 W JP2022038417 W JP 2022038417W WO 2023090013 A1 WO2023090013 A1 WO 2023090013A1
Authority
WO
WIPO (PCT)
Prior art keywords
heat sink
circuit board
insulating layer
circuit
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/038417
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
茂幸 八木
昭仁 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
Original Assignee
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Bakelite Co Ltd filed Critical Sumitomo Bakelite Co Ltd
Priority to JP2023522512A priority Critical patent/JP7424542B2/ja
Publication of WO2023090013A1 publication Critical patent/WO2023090013A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/10—Arrangements for heating

Definitions

  • the present invention relates to a circuit board with a heat sink and its manufacturing method, as well as a semiconductor device and its manufacturing method.
  • a circuit board with a heat sink is known in which a conductor layer forming a circuit and one surface of a large-capacity heat sink are integrated via an insulating layer (for example, Patent Document 1).
  • a heat sink with fins is known from the viewpoint of improving heat dissipation.
  • Patent Document 2 discloses an insulating circuit board in which a circuit layer is formed on one surface of a ceramic substrate and a metal layer is formed on the other surface; and a heat sink having a plurality of fins on the surface of the heat sink.
  • circuit boards with heat sinks have attracted more and more attention.
  • the present inventor focused on the development of a new circuit board with a heatsink, and for the first time realized flattening of the circuit surface of the circuit board with a heatsink by embedding sealing resin between the circuits constituting the circuit layers.
  • workability, manufacturing stability, positional accuracy, etc., of electrical and electronic devices using circuit boards with heat sinks are improved, and electrical and electronic devices, etc. with excellent reliability and durability can be obtained. .
  • the present invention relates to a circuit board with a heat sink in which a circuit layer and a heat sink are integrated via an insulating layer,
  • the heat sink has a flat base plate,
  • a circuit board with a heat sink wherein a sealing resin is embedded between the circuits forming the circuit layer, and the top surface of the circuit layer and the top surface of the sealing resin are substantially flush with each other.
  • the present invention provides a step of preparing a heat sink comprising a flat base plate; laminating an insulating layer on one surface of the base plate and arranging a circuit layer on the insulating layer; embedding a sealing resin between the circuits forming the circuit layer; including Provided is a method for manufacturing a circuit board with a heat sink, wherein the upper surface of the circuit layer and the upper surface of the sealing resin are substantially flush.
  • a step of mounting a semiconductor chip on the circuit layer exposed on the circuit board with a heat sink using the circuit board with a heat sink; sealing the semiconductor chip with a second sealing resin; A method of manufacturing a semiconductor device is provided.
  • the present invention provides a heat sink having a flat base plate, an insulating layer laminated on one surface of the base plate; a circuit layer disposed on the insulating layer; a first sealing body embedded between the circuits forming the circuit layer and having an upper surface substantially flush with the upper surface of the circuit layer; a semiconductor chip mounted on the circuit layer exposed on the upper surface of the first sealing body; a second sealing body covering the semiconductor chip; with A semiconductor device having an interface between the first encapsulant and the second encapsulant is provided.
  • a circuit board with a heat sink having a flat circuit surface and a semiconductor device using the same can be provided.
  • FIG. 4 is a cross-sectional view schematically showing one process of a method for manufacturing a circuit board with a heatsink according to an embodiment
  • BRIEF DESCRIPTION OF THE DRAWINGS It is sectional drawing which showed typically the semiconductor device using the circuit board with a heat sink which concerns on embodiment.
  • FIG. 5 is a cross-sectional view schematically showing a modification of the circuit board with a heat sink according to the embodiment
  • FIG. 10 is a cross-sectional view schematically showing a modified example of a semiconductor device using the circuit board with a heat sink according to the embodiment;
  • FIG. 1 is a cross-sectional view of a circuit board 50 with a heat sink according to this embodiment.
  • a circuit board with a heatsink 50 is formed by integrating a conductor layer 30 (circuit layer) forming a circuit and a heatsink 10 with an insulating layer 20 interposed therebetween.
  • the heat sink 10 has a flat base plate 11, and in this embodiment, further includes a plurality of fins 12 protruding from the surface opposite to the insulating layer 20 side.
  • the sealing resin 40 is embedded between the circuits of the conductor layer 30, and the upper surface of the conductor layer 30 and the upper surface of the sealing resin 40 are substantially flush with each other.
  • the term “substantially the same” is intended to exclude minute irregularities that occur during the manufacturing process of the circuit board 50 with a heat sink.
  • the heat sink 10 has a function of releasing heat generated in the conductor layer 30 and the like to the outside. That is, the heat sink 10 has thermal conductivity.
  • the heat sink 10 of this embodiment includes a flat base plate 11 and a plurality of fins 12 protruding from the surface of the base plate 11 opposite to the insulating layer 20 side.
  • the flat base plate 11 and the fins 12 may be joined by a known method, or may be integrally formed.
  • the heat sink 10 is preferably made of at least one selected from copper and aluminum, and is more preferably made of copper from the viewpoint of improving thermal conductivity, workability, and the like.
  • the thickness of the base plate 11 can be appropriately set according to the application, but is preferably 0.2 to 1.5 mm, for example. Further, by setting the thickness of the base plate 11 to be 0.5 to 1.5 times the thickness of the conductor layer 30, warping of the entire circuit board with heat sink 50 can be suppressed, and adhesion can be easily improved.
  • the heat sink 10 is provided with a plurality of fins 12 erected from one surface of the base plate 11, thereby increasing the surface area of the heat sink 10 and enhancing heat radiation efficiency. Also, the plurality of fins 12 are flush with each other. Since the height of the plurality of fins 12 is uniform and the upper surfaces of the fins 12 are flat, the surface can be formed, so that the circuit board 50 with a heat sink can be manufactured stably.
  • the shape of the fins 12 is not particularly limited.
  • the square columnar shape may be a columnar shape having a square cross section, a columnar shape exhibiting a rectangle, a columnar shape exhibiting a rhombus, a columnar shape exhibiting a parallelogram, or the like.
  • the cylindrical shape may have a cross-sectional shape such as a circular shape, an elliptical shape, or an oval shape.
  • the number of fins 12 is not particularly limited, and is appropriately set from the viewpoint of usage, mechanical strength, and the like.
  • the shapes of the plurality of fins 12 may be the same, different, or partially different.
  • the arrangement of the plurality of fins 12 is not particularly limited, but it is preferable that the area surrounded by the outline connecting the outer ends of the fins 12 be included in the area covered with the insulating layer 20 of the base plate 11 . . Moreover, it is preferable that the base plate 11 does not have the fins 12 at the outer peripheral edge thereof. By doing so, it is possible to improve the adhesiveness while maintaining the mechanical strength against pressure in the manufacturing process of the circuit board with heat sink 50 .
  • the interval between the plurality of fins 12 is not particularly limited, but is preferably 0.5 to 2.0 mm.
  • the fins 12 can be efficiently cut, and the mechanical strength can be maintained against pressure during the manufacturing process of the circuit board 50 with a heat sink. become. Further, by setting the interval between the fins 12 to 2.0 mm or less, the heat dissipation performance of the heat sink 10 can be further improved.
  • the insulating layer 20 is arranged between the conductor layer 30 and the heat sink 10 and used to insulate the electricity passing through the conductor layer 30 from leaking to the heat sink 10 side. Also, the outer peripheral edge of the insulating layer 20 is covered with a sealing resin 40 . This makes it easier to improve the reliability of the circuit board 50 with a heat sink.
  • the insulating layer 20 is preferably made of a material containing a thermosetting resin and boron nitride particles. This provides good thermal conductivity and insulation. In addition, when pressure is applied to the insulating layer 20 during the manufacturing process of the circuit board with a heat sink 50, the boron nitride particles are dispersed and the insulating layer 20 can efficiently improve the thermal conductivity and the adhesiveness.
  • thermosetting resins examples include epoxy resins having a dicyclopentadiene skeleton, epoxy resins having a biphenyl skeleton, epoxy resins having an adamantane skeleton, epoxy resins having a phenol aralkyl skeleton, epoxy resins having a biphenylaralkyl skeleton, naphthalene aralkyl
  • One or more selected from epoxy resins having a skeleton, epoxy resins having a naphthalene skeleton, epoxy resins having a methoxynaphthalene aralkyl skeleton, and cyanate resins can be used. This makes it easier to improve the dispersibility of the boron nitride particles.
  • a cyanate ester resin can be used as the cyanate resin.
  • cyanate ester resins include bisphenol A dicyanate, polyphenolcyanate (oligo(3-methylene-1,5-phenylenecyanate), 4,4'-methylenebis(2,6-dimethylphenylcyanate), 4, 4′-ethylidene diphenyl dicyanate, hexafluorobisphenol A dicyanate, 2,2-bis(4-cyanate)phenylpropane, 1,1-bis(4-cyanatophenylmethane), bis(4-cyanate-3,5- Bifunctional cyanate resins such as dimethylphenyl)methane, 1,3-bis(4-cyanatophenyl-1-(methylethylidene))benzene, bis(4-cyanatophenyl)thioether, bis(4-cyanatophenyl)ether; phenol Polyfunctional cyanate resins derived from novolak, cresol novolak, dicyclopenta
  • the content of the thermosetting resin is preferably in the range of 1% by mass to 30% by mass, more preferably in the range of 5% by mass to 28% by mass, based on the total amount of the material (solid content) constituting the insulating layer 20. preferable.
  • the boron nitride particles are preferably aggregated particles in which primary particles are aggregated.
  • the primary particles of the boron nitride particles may be plate-like, scale-like or spherical, preferably scale-like.
  • the boron nitride particles used in the present embodiment are preferably scaly aggregated particles of boron nitride. As a result, the boron nitride particles are arranged and the thermal conductivity is easily improved.
  • the scale-like (or plate-like) primary particles of boron nitride have an average longitudinal length (maximum length in the direction perpendicular to the thickness direction of the scale) of, for example, 1 to 100 ⁇ m, preferably 3 to 90 ⁇ m. . Further, the average longitudinal length of the boron nitride particles is 5 ⁇ m or more, preferably 10 ⁇ m or more, more preferably 20 ⁇ m or more, particularly preferably 30 ⁇ m or more, and most preferably 40 ⁇ m or more. It is 100 ⁇ m or less, preferably 90 ⁇ m or less.
  • the average thickness of the scale-like boron nitride primary particles (the length in the thickness direction of the scales, that is, the length in the transverse direction of the particles) is, for example, 0.01 to 20 ⁇ m, preferably 0.1 to 15 ⁇ m. be.
  • the aspect ratio (longitudinal length/thickness) of the primary particles of scale-like boron nitride is, for example, 2 to 10,000, preferably 10 to 5,000.
  • the average primary particle size measured by the light scattering method is the volume average particle size measured by a dynamic light scattering particle size distribution analyzer. If the average primary particle diameter of the boron nitride particles measured by light scattering method is less than the above range, the insulating layer 20 may become brittle and the handleability may deteriorate.
  • boron nitride particles include, for example, Momentive Performance Materials Japan's "PT” series (e.g., "PT-110"), Showa Denko's "Show BN” UHP” series (for example, “ShowBN UHP-1", etc.).
  • PT Momentive Performance Materials Japan's "PT” series
  • Showa Denko's "Show BN” UHP” series for example, “ShowBN UHP-1", etc.
  • the content of the boron nitride particles is 60% by mass or more and 80% by mass or less, more preferably 65% by mass or more and 75% by mass or less, relative to the total amount of the material (solid content) constituting the insulating layer 20. quantity.
  • the volume-based content ratio of the boron nitride particles is preferably 50 to 70% by volume, more preferably 55 to 65% by volume, with respect to the total volume of the material (solid content) constituting the insulating layer 20. is more preferred.
  • the material forming the insulating layer 20 may further contain components other than the thermally conductive resin and boron nitride particles.
  • an epoxy resin when using an epoxy resin as a thermosetting resin, it is preferable to use a curing agent.
  • a curing catalyst or a phenol-based curing agent is preferably used as the curing agent.
  • curing catalysts include organic metal salts such as zinc naphthenate, cobalt naphthenate, tin octylate, cobalt octylate, bisacetylacetonate cobalt (II), and trisacetylacetonate cobalt (III); triethylamine, tributylamine, Tertiary amines such as 1,4-diazabicyclo[2.2.2]octane; 2-phenyl-4-methylimidazole, 2-ethyl-4-methylimidazole, 2,4-diethylimidazole, 2-phenyl-4 - imidazoles such as methyl-5-hydroxyimidazole and 2-phenyl-4,5-dihydroxymethylimidazole; triphenylphosphine, tri-p-tolylphosphine, tetraphenylphosphonium/tetraphenylborate, triphenylphosphine/triphenylborane
  • the content thereof is preferably 0.001 parts by mass or more and 1 part by mass or less with respect to the total amount of the material (solid content) constituting the insulating layer 20 .
  • Phenol-based curing agents include phenol novolak resins, cresol novolak resins, naphthol novolak resins, aminotriazine novolak resins, novolac resins, trisphenylmethane-type phenol novolak resins, and other novolak-type phenol resins; terpene-modified phenol resins; Modified phenol resins such as cyclopentadiene-modified phenol resins; phenol aralkyl resins having a phenylene skeleton and/or biphenylene skeleton, aralkyl resins such as naphthol aralkyl resins having a phenylene skeleton and/or biphenylene skeleton; bisphenols such as bisphenol A and bisphenol F Compounds; resol-type phenolic resins, etc., may be mentioned, and these may be used singly or in combination of two or more.
  • the content of the phenol-based curing agent is preferably 0.1% by mass or more and 30% by mass or less, more preferably 0.3% by mass or more and 15% by mass or less with respect to the total amount of the material (solid content) constituting the insulating layer 20. .
  • the material forming the insulating layer 20 may further contain a leveling agent, a coupling agent, an antioxidant, and the like.
  • leveling agents include acrylic copolymers.
  • the leveling agent is preferably used in an amount of 2% by mass or less, more preferably 0.01% by mass or more and 1.0% by mass or less, based on the total amount of the material (solid content) constituting the insulating layer 20. is more preferred.
  • the coupling agent epoxysilane coupling agents, cationic silane coupling agents, aminosilane coupling agents, titanate coupling agents, silicone oil coupling agents, and the like can be used.
  • the amount of the coupling agent compounded is preferably 0.1 to 10 parts by mass, particularly preferably 0.5 to 7 parts by mass, based on 100 parts by mass of the boron nitride particles.
  • the material (solid content) constituting the insulating layer 20 of the present embodiment is obtained by blending the above-described thermosetting resin, boron nitride particles, other components, and solvent in the above-described ratio, and stirring and mixing by a known method. can be prepared by
  • solvents examples include organic solvents such as ketones such as acetone and methyl ethyl ketone, esters such as ethyl acetate, and amides such as N,N-dimethylformamide.
  • Solvents also include aqueous solvents such as water, alcohols such as methanol, ethanol, propanol, and isopropanol.
  • the insulating layer 20 of the present embodiment can be produced by molding into a B-stage sheet. That is, the insulating layer 20 is completely cured when integrated with the heat sink 10 and the conductor layer 30 under heat and pressure in the manufacturing process of the circuit board with heat sink 50 .
  • the base material include metal foils that constitute heat radiation members, lead frames, peelable carrier materials, and the like, and may be applied directly onto the heat sink 10 .
  • the heat treatment for drying the coating film is performed, for example, at 80 to 150° C. for 5 minutes to 1 hour.
  • the thickness of the insulating layer 20 can be, for example, 60 ⁇ m or more and 500 ⁇ m or less.
  • the specific gravity of the sheet-like insulating layer 20 in the B-stage state is preferably 1.0 to 2.0.
  • the conductor layer 30 is arranged on the heat sink 10 via the insulating layer 20 to form a circuit.
  • a known material obtained by a known method can be used.
  • a circuit board can be obtained by laminating the conductor layer 30 on the insulating layer 20 by a known method, and then subjecting the conductor layer 30 to circuit processing or the like.
  • Metals such as copper, aluminum, nickel, gold, silver, and stainless steel can be used as the metal forming the conductor layer 30 .
  • the conductor layer 30 in plan view is appropriately set, the area surrounded by the outer peripheral edge of the conductor layer 30 is preferably included in the area covered with the insulating layer 20 of the base plate 11 . That is, the conductor layer 30 is preferably arranged within the region of the insulating layer 20 , that is, on the insulating layer 20 . Thereby, the conductor layer 30 and the insulating layer 20 can be adhered more reliably.
  • the sealing resin 40 is used to fill the space between the circuits forming the conductor layer 30 .
  • the sealing resin 40 a known resin for sealing semiconductor devices can be used.
  • the sealing resin 40 is obtained using a sealing resin composition containing a thermosetting resin, an inorganic filler, a curing agent, a curing accelerator, a coupling agent, and the like.
  • the sealing resin 40 of the circuit board 50 with a heat sink may be in either a B-stage state or a C-stage state, and is preferably semi-cured after molding such as transfer or compression.
  • Epoxy resin is preferable as the above thermosetting resin.
  • Specific examples of epoxy resins include biphenyl type epoxy resins, bisphenol A type epoxy resins, bisphenol F type epoxy resins, bisphenol type epoxy resins such as tetramethylbisphenol F type epoxy resins, stilbene type epoxy resins, and hydroquinone type epoxy resins.
  • crystalline epoxy resins cresol novolac type epoxy resins, phenol novolac type epoxy resins, naphthol novolac type epoxy resins and other novolac type epoxy resins; phenylene skeleton-containing phenol aralkyl type epoxy resins, biphenylene skeleton-containing phenol aralkyl type epoxy resins, Aralkyl epoxy resins such as skeleton-containing naphthol aralkyl epoxy resins and alkoxynaphthalene skeleton-containing phenol aralkyl epoxy resins; trifunctional epoxy resins such as triphenolmethane-type epoxy resins and alkyl-modified triphenolmethane-type epoxy resins; dicyclopentadiene-modified modified phenol-type epoxy resins such as phenol-type epoxy resins and terpene-modified phenol-type epoxy resins; and heterocyclic ring-containing epoxy resins such as triazine nucleus-containing epoxy resins. These may be used individually by 1 type, and may
  • Examples of the above-mentioned inorganic filler include silicates such as talc, calcined clay, uncalcined clay, mica and glass; oxides such as titanium oxide, alumina, boehmite and silica; calcium carbonate, magnesium carbonate and hydrotalcite.
  • silicates such as talc, calcined clay, uncalcined clay, mica and glass
  • oxides such as titanium oxide, alumina, boehmite and silica
  • calcium carbonate, magnesium carbonate and hydrotalcite examples of the above-mentioned inorganic filler.
  • carbonates such as; hydroxides such as aluminum hydroxide, magnesium hydroxide, calcium hydroxide; sulfates or sulfites such as barium sulfate, calcium sulfate, calcium sulfite; zinc borate, barium metaborate, aluminum borate, borate salts such as calcium borate and sodium borate; nitrides such as aluminum nitride, boron nitride, silicon nitride and carbon nitride; titanates such as strontium titanate and barium titanate. These may be used individually by 1 type, and may use 2 or more types together.
  • the above-mentioned curing agent is not particularly limited as long as it is cured by reacting with the thermosetting resin.
  • thermosetting resin as well as metaphenylenediamine, paraphenylenediamine, paraxylenediamine, 4,4'-diaminodiphenylmethane, 4,4'-diaminodiphenylpropane, 4,4'-diaminodiphenyl ether, 4,4' -diaminodiphenylsulfone, 4,4'-diaminodicyclohexane, bis(4-aminophenyl)phenylmethane, 1,5-diaminonaphthalene, metaxylenediamine, paraxylenediamine, 1,1-bis(4-aminophenyl) Amines such as cyclohexane and dicyanodiamide; resol-type phenol resins such as aniline-modified resole resin and dimethyl ether resole
  • polymercaptan compounds such as polysulfides, thioesters and thioethers
  • isocyanate compounds such as isocyanate prepolymers and blocked isocyanates
  • organic acids such as carboxylic acid-containing polyester resins.
  • the curing accelerator examples include phosphorus atom-containing compounds such as organic phosphines, tetrasubstituted phosphonium compounds, phosphobetaine compounds, adducts of phosphine compounds and quinone compounds, or adducts of phosphonium compounds and silane compounds; 1,8-diazabicyclo(5,4,0)undecene-7, amidine compounds such as imidazole; tertiary amines such as benzyldimethylamine; nitrogen atom-containing compounds such as amidinium salts or ammonium salts; phenol, bisphenol A, Phenol compounds such as nonylphenol and 2,3-dihydroxynaphthalene are included.
  • phosphorus atom-containing compounds such as organic phosphines, tetrasubstituted phosphonium compounds, phosphobetaine compounds, adducts of phosphine compounds and quinone compounds, or adducts of phosphonium compounds
  • organic phosphine examples include triphenylphosphine, tri-p-tolylphosphine, tetraphenylphosphonium/tetraphenylborate, triphenylphosphine/triphenylborane, 1,2-bis-(diphenylphosphino)ethane, and the like. be done.
  • the coupling agent examples include various silane-based compounds such as epoxysilane, mercaptosilane, aminosilane, alkylsilane, ureidosilane, and vinylsilane, titanium-based compounds, aluminum chelates, aluminum/zirconium-based compounds, and other known coupling agents. agent can be used.
  • thermosetting resins such as phenol resins other than the above epoxy resins, epoxy resins, unsaturated polyester resins, melamine resins, and polyurethanes; colorants such as carbon black; natural waxes, synthetic waxes, Release agents such as higher fatty acids or metal salts thereof, paraffin, and polyethylene oxide; ion scavengers such as hydrotalcite; low-stress agents such as silicone oil and silicone rubber; flame retardants such as aluminum hydroxide; Various additives can be included.
  • Such a sealing resin composition can be obtained by a known method.
  • it can be prepared as a varnish-like composition by dissolving, mixing, and stirring in a solvent using various mixers such as a rotation-revolution dispersion system.
  • the manufacturing method of the circuit board 50 with a heat sink of this embodiment includes the following steps.
  • the circuit board 50 with a heat sink is obtained in which the upper surface of the conductor layer 30 and the upper surface of the sealing resin 40 are substantially flush.
  • the method for making the upper surface of the conductor layer 30 and the upper surface of the sealing resin 40 approximately the same is not particularly limited. After burying the sealing resin 40 in the inner surface, part of the sealing resin 40 may be polished to expose the upper surface of the conductor layer 30 so that the top surface of the conductor layer 30 is substantially flush.
  • the heat sink 10 the one described above can be used.
  • the insulating layer 20 is laminated on the surface opposite to the fins 12 of the base plate 11 of the heat sink 10 , and the conductor layer 30 is arranged on the insulating layer 20 .
  • the sealing resin 40 is embedded between the circuits forming the conductor layer 30 .
  • a resin composition for the sealing resin 40 using a selected method such as a transfer molding method, a compression molding method, or an injection molding method, the resin composition is filled between the circuits, and the sealing resin 40 to be buried.
  • a sealing resin 40 may be embedded so as to cover the entire insulating layer 20 and conductor layer 30 .
  • the upper surface of the sealing resin 40 and the upper surface of the conductor layer 30 can be made flush with each other by polishing and grinding the upper surface of the sealing resin 40 to expose the upper surface of the conductor layer 30 .
  • the upper surface of the conductor layer 30 can be exposed by scraping off a portion of the sealing resin 40 by polishing and matching the height of the conductor layer 30 .
  • the polishing method is not particularly limited, and a known method can be used. Examples thereof include methods such as grinding and chemical etching. As a grinding method, for example, mechanical polishing (buff, polishing roll, etc.) or chemical mechanical polishing (CMP) can be used.
  • the semiconductor device 100 of this embodiment includes a heat sink 10 having a flat base plate 11, an insulating layer 20 laminated on one surface of the base plate 11 of the heat sink 10, an insulating layer 20 and the cured body of the sealing resin 40 embedded between the circuit forming the conductor layer 30 and configured such that the upper surface is substantially flush with the upper surface of the conductor layer 30 (second a first sealing body 41), a semiconductor chip 81 mounted on the conductor layer 30 exposed on the upper surface of the sealing resin 40, and a second sealing body 42 covering the semiconductor chip 81; There is an interface between body 41 and second encapsulant 42 .
  • the heat sink 10 further has a plurality of fins 12 projecting from the other surface of the base plate 11 .
  • a region surrounded by the outer edge of the insulating layer 20 is covered with the first sealing body 41 .
  • the semiconductor chip 81 is connected to the lead frame 82 via the wire 83 .
  • the interface between the first sealing body 41 and the second sealing body 42 is formed by bonding after the first sealing body 41 and the second sealing body 42 are obtained by different processes. Boundary.
  • the interface may be visible and is not limited to being visible. In this embodiment, the interface is a substantially horizontal plane.
  • the second sealing body 42 can be obtained using a known sealing resin material.
  • the first sealing body 41 and the second sealing body 42 may be made of different resin materials or may be made of the same material, but are made of different resin materials. is preferred.
  • the method for manufacturing the semiconductor device 100 includes steps of mounting a semiconductor chip 81 on the conductor layer 30 exposed on the circuit board 50 with a heat sink using the circuit board 50 with a heat sink, and mounting the semiconductor chip 81 with a second sealing resin. Including the step of sealing. The second sealing resin is cured to form the second sealing body 42 .
  • a known method can be used for both the step of mounting the semiconductor chip 81 and the step of forming the second sealing body 42 .
  • the semiconductor device 100 of the present embodiment uses the circuit board 50 with a heat sink, workability, manufacturing stability, position accuracy, etc. are improved, and reliability, durability, etc. can be improved.
  • the heatsink 10 of the circuit board 51 with heatsink may not have the fins 12 .
  • the heat sink 10 of the semiconductor device 101 may not have the fins 12 .
  • a circuit board with a heat sink in which a circuit layer and a heat sink are integrated via an insulating layer, The heat sink has a flat base plate, A circuit board with a heat sink, wherein a sealing resin is embedded between the circuits forming the circuit layer, and the upper surface of the circuit layer and the upper surface of the sealing resin are substantially flush with each other.
  • thermosetting resin contained in the insulating layer is an epoxy resin having a dicyclopentadiene skeleton, an epoxy resin having a biphenyl skeleton, an epoxy resin having an adamantane skeleton, an epoxy resin having a phenol aralkyl skeleton, and an epoxy resin having a biphenylaralkyl skeleton.
  • an epoxy resin having a naphthalene aralkyl skeleton an epoxy resin having a naphthalene skeleton, an epoxy resin having a methoxynaphthalene aralkyl skeleton, and a cyanate resin.
  • 5. 1. to 4. A circuit board with a heat sink according to any one of the above, A circuit board with a heat sink, wherein the insulating layer contains boron nitride particles. 6. 1. to 5. A circuit board with a heat sink according to any one of the above, A circuit board with a heat sink, wherein the specific gravity of the insulating layer in B stage is 1.0 to 2.0. 7. 1. to 6.
  • 8. 1. to 7. A circuit board with a heat sink according to any one of the above, A circuit board with a heat sink, wherein the heat sink further has a plurality of fins protruding from a surface of the base plate opposite to the insulating layer. 9. 8. A circuit board with a heat sink according to A circuit board with a heat sink, wherein a region surrounded by outlines connecting outer ends of the fins is included in a region of the base plate covered with the insulating layer. 10.
  • a heat sink comprising a flat base plate; laminating an insulating layer on one surface of the base plate and arranging a circuit layer on the insulating layer; embedding a sealing resin between the circuits forming the circuit layer; including A method for manufacturing a circuit board with a heat sink, wherein the upper surface of the circuit layer and the upper surface of the sealing resin are substantially flush with each other. 11. 10. A method for manufacturing a circuit board with a heat sink according to 1., In the step of embedding the sealing resin, After disposing the sealing resin on the circuit layer and embedding the sealing resin between the circuits, a part of the sealing resin is polished to expose the upper surface of the circuit layer, and the circuit layer is covered with the sealing resin.
  • a method for manufacturing a circuit board with a heat sink according to 1. A method for manufacturing a circuit board with a heat sink, wherein the step of embedding the sealing resin employs one selected from the group consisting of a transfer molding method, a compression molding method and an injection molding method. 13. 10. 12. A method for manufacturing a circuit board with a heat sink according to any one of the above, A method of manufacturing a circuit board with a heat sink, wherein the heat sink further has a plurality of fins protruding from a surface of the base plate opposite to the insulating layer. 14. 1. to 9.
  • a method of manufacturing a semiconductor device comprising: 15. a heat sink having a flat base plate; an insulating layer laminated on one surface of the base plate; a circuit layer disposed on the insulating layer; a first sealing body embedded between the circuits forming the circuit layer and having an upper surface substantially flush with the upper surface of the circuit layer; a semiconductor chip mounted on the circuit layer exposed on the upper surface of the first sealing body; a second sealing body covering the semiconductor chip; with A semiconductor device, wherein an interface is present between the first encapsulant and the second encapsulant. 16.
  • the semiconductor device according to The semiconductor device wherein the first sealing body and the second sealing body are made of different resin materials. 17. 15. or 16. The semiconductor device according to The semiconductor device, wherein an outer peripheral edge of the insulating layer is covered with the first sealing body. 18. 15. 17. Any one semiconductor device, The semiconductor device, wherein the heat sink further includes a plurality of fins protruding from a surface of the base plate opposite to the insulating layer.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Thermal Sciences (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Structure Of Printed Boards (AREA)
PCT/JP2022/038417 2021-11-19 2022-10-14 ヒートシンク付回路基板およびその製造方法、ならびに半導体装置およびその製造方法 Ceased WO2023090013A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023522512A JP7424542B2 (ja) 2021-11-19 2022-10-14 ヒートシンク付回路基板およびその製造方法、ならびに半導体装置およびその製造方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2021-188502 2021-11-19
JP2021188502 2021-11-19
JP2022-007786 2022-01-21
JP2022007786 2022-01-21

Publications (1)

Publication Number Publication Date
WO2023090013A1 true WO2023090013A1 (ja) 2023-05-25

Family

ID=86396839

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2022/038417 Ceased WO2023090013A1 (ja) 2021-11-19 2022-10-14 ヒートシンク付回路基板およびその製造方法、ならびに半導体装置およびその製造方法

Country Status (2)

Country Link
JP (1) JP7424542B2 (https=)
WO (1) WO2023090013A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2025013919A1 (https=) * 2023-07-12 2025-01-16

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001057406A (ja) * 1999-06-11 2001-02-27 Matsushita Electric Ind Co Ltd 放熱基板及びその製造方法
JP2001210764A (ja) * 2000-01-26 2001-08-03 Matsushita Electric Works Ltd 熱伝導基板及びその製造方法
JP2007311770A (ja) * 2006-04-17 2007-11-29 Mitsubishi Electric Corp 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001203313A (ja) 1999-11-09 2001-07-27 Matsushita Electric Ind Co Ltd 熱伝導基板およびその製造方法
JP2014090103A (ja) 2012-10-31 2014-05-15 Denso Corp モールドパッケージおよびその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001057406A (ja) * 1999-06-11 2001-02-27 Matsushita Electric Ind Co Ltd 放熱基板及びその製造方法
JP2001210764A (ja) * 2000-01-26 2001-08-03 Matsushita Electric Works Ltd 熱伝導基板及びその製造方法
JP2007311770A (ja) * 2006-04-17 2007-11-29 Mitsubishi Electric Corp 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2025013919A1 (https=) * 2023-07-12 2025-01-16
WO2025013919A1 (ja) * 2023-07-12 2025-01-16 住友ベークライト株式会社 基板の製造方法

Also Published As

Publication number Publication date
JPWO2023090013A1 (https=) 2023-05-25
JP7424542B2 (ja) 2024-01-30

Similar Documents

Publication Publication Date Title
TW201930074A (zh) 積層體及電子裝置
CN105377980A (zh) 半导体装置的制造方法以及半导体装置
WO2019229962A1 (ja) 樹脂組成物、樹脂部材、樹脂シート、ｂステージシート、ｃステージシート、樹脂付金属箔、金属基板及びパワー半導体装置
JP2016027144A (ja) 熱伝導性シート、熱伝導性シートの硬化物および半導体装置
JP2025120356A (ja) パワーモジュール
KR102377281B1 (ko) 반도체 장치의 제조 방법
JP2016094599A (ja) 熱伝導性シート用樹脂組成物、基材付き樹脂層、熱伝導性シートおよび半導体装置
JP7424542B2 (ja) ヒートシンク付回路基板およびその製造方法、ならびに半導体装置およびその製造方法
WO2022019089A1 (ja) パワーモジュール
JP2020152844A (ja) 封止用樹脂組成物および電子装置
JP6536129B2 (ja) 半導体装置及びそれを備えるパワーモジュール
JP7568173B2 (ja) 半導体装置
TW201903989A (zh) 密封薄膜、電子零件裝置的製造方法及電子零件裝置
JP6579105B2 (ja) 熱伝導性シートおよび半導体装置
JP7647983B1 (ja) 熱伝導性部材、金属ベース基板、回路基板、電子装置および熱伝導性部材の製造方法
JP6579106B2 (ja) 熱伝導性シートおよび半導体装置
JP7401037B1 (ja) ヒートシンク付回路基板およびその製造方法、ならびにこれを用いた半導体装置およびその製造方法
JP6572643B2 (ja) 熱伝導性シート、熱伝導性シートの硬化物および半導体装置
JP7589576B2 (ja) 回路基板の製造方法
JP6635034B2 (ja) 半導体装置
JP2024054495A (ja) 半導体装置製造方法および構造体
WO2025262832A1 (ja) ヒートシンク付回路基板およびその製造方法
WO2022163763A1 (ja) 電子部品実装基板の封止方法および熱硬化性シート
JP2024135038A (ja) 樹脂組成物、半導体装置、ヒートシンク付回路基板
JP2024136642A (ja) 基板および半導体装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 2023522512

Country of ref document: JP

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22895299

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 22895299

Country of ref document: EP

Kind code of ref document: A1