WO2023071625A1 - 一种显示面板、其制作方法及显示装置 - Google Patents

一种显示面板、其制作方法及显示装置 Download PDF

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Publication number
WO2023071625A1
WO2023071625A1 PCT/CN2022/120042 CN2022120042W WO2023071625A1 WO 2023071625 A1 WO2023071625 A1 WO 2023071625A1 CN 2022120042 W CN2022120042 W CN 2022120042W WO 2023071625 A1 WO2023071625 A1 WO 2023071625A1
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Prior art keywords
layer
base substrate
source
drain metal
orthographic projection
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PCT/CN2022/120042
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English (en)
French (fr)
Inventor
董向丹
胡明
樊聪
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Publication of WO2023071625A1 publication Critical patent/WO2023071625A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display panel, a manufacturing method thereof, and a display device.
  • display panels with a full-screen design are becoming more and more popular among consumers.
  • the full-screen design adopts ultra-narrow borders around the design, combined with a panel structure designed by digging holes in the display area to place cameras and other devices.
  • the full-screen is a panel Panel architecture with the highest display-to-body ratio.
  • Embodiments of the present disclosure provide a display panel, a manufacturing method thereof, and a display device, which are used to solve major adverse problems such as severe corrosion and formation of bubbles on the isolation posts around the camera hole area of the full screen.
  • a base substrate, the display panel has a through hole through the thickness direction of the base substrate, the base substrate has a display area and a through hole packaging area between the display area and the through hole;
  • the first source-drain metal layer is located on one side of the base substrate
  • the second source-drain metal layer is located on a side of the first source-drain metal layer away from the base substrate;
  • At least one isolation column is located on one side of the base substrate, and is located in the through-hole packaging area, and is arranged around the through hole; wherein, the isolation column is arranged in a different layer from the second source-drain metal layer .
  • the isolation column and the first source-drain metal layer are provided in the same layer and in the same material.
  • the above-mentioned display panel provided by the embodiments of the present disclosure further includes: at least one transparent wiring layer located on the side of the second source-drain metal layer away from the base substrate, and at least one transparent wiring layer located on the side of the transparent The wiring layer is away from the anode on the side of the base substrate; the orthographic projection of the transparent wiring layer on the base substrate does not overlap with the orthographic projection of the isolation column on the base substrate, so The orthographic projection of the anode on the base substrate does not overlap with the orthographic projection of the spacer column on the base substrate.
  • the above display panel provided by the embodiments of the present disclosure further includes: a first passivation layer located between the second source-drain metal layer and the first source-drain metal layer, and a passivation layer located between the second source-drain metal layer and the first source-drain metal layer, A first planar layer between the first passivation layer and the second source-drain metal layer; the orthographic projection of the first planar layer on the base substrate is the same as that of the spacer column on the base substrate The orthographic projections of the first passivation layer cover the through-hole package area, and the orthographic projections of the first passivation layer on the substrate substrate and the isolation columns on the substrate The orthographic projections on the substrate do not overlap.
  • the above display panel provided by the embodiments of the present disclosure, it further includes: a second passivation layer located between the transparent wiring layer and the anode, the second passivation layer on the lining
  • the orthographic projection on the base substrate does not overlap the orthographic projection of the spacer posts on the base substrate.
  • the above display panel provided by the embodiments of the present disclosure, it further includes: at least one transparent wiring layer located on the side of the second source-drain metal layer away from the base substrate, located on the side of the transparent wiring layer The line layer is away from the anode on the side of the base substrate, and the first film layer between the transparent wiring layer and the anode; the orthographic projection of the transparent wiring layer on the base substrate and The orthographic projection of the spacer on the base substrate does not overlap, and the orthographic projection of the anode on the base substrate does not overlap with the orthographic projection of the spacer on the base substrate;
  • the isolation column and the first film layer are arranged in the same layer and the same material.
  • the material of the first film layer is the same as that of the first source-drain metal layer, or the material of the first film layer is negative light resistance.
  • the above display panel provided by the embodiments of the present disclosure, it further includes: at least one transparent wiring layer located on the side of the second source-drain metal layer away from the base substrate, located on the side of the transparent wiring layer The anode on the side of the wiring layer away from the base substrate, the second flat layer between the transparent wiring layer and the second source-drain metal layer, and the second flat layer between the second source-drain metal layer and the A negative photoresist layer between the second planar layers; the orthographic projection of the transparent wiring layer on the base substrate does not overlap with the orthographic projection of the spacer columns on the base substrate, the The orthographic projection of the anode on the base substrate does not overlap with the orthographic projection of the spacer on the base substrate;
  • the isolation column and the negative photoresist layer are arranged in the same layer and the same material.
  • the above display panel provided by the embodiments of the present disclosure further includes: a first planar layer located between the first source-drain metal layer and the second source-drain metal layer.
  • the material of the spacer column when the material of the spacer column is a negative photoresist, it further includes: The first passivation layer in between, the first passivation layer covers the through-hole encapsulation area, and the orthographic projection of the first passivation layer on the base substrate is the same as that of the isolation column on the substrate The orthographic projections on the base substrate do not overlap.
  • the above-mentioned display panel provided by the embodiment of the present disclosure further includes: a light-emitting layer located on the side of the anode away from the base substrate, and a cathode located on the side of the light-emitting layer away from the base substrate , and an encapsulation layer located on the side of the cathode away from the base substrate; the light-emitting layer is disconnected at the position of the isolation column;
  • the encapsulation layer includes a first inorganic layer, an organic layer, and a second inorganic layer stacked, wherein the front surface of the first inorganic layer, the organic layer, and the second inorganic layer on the base substrate is The projections both cover the display area and the through-hole packaging area.
  • an embodiment of the present disclosure further provides a display device, including the display panel described in any one of the above.
  • an embodiment of the present disclosure also provides a method for manufacturing the display panel described in any one of the above, including:
  • a base substrate is provided, the base substrate has a display area, a through-hole area, and a through-hole packaging area between the display area and the through-hole area;
  • At least one isolation column disposed around the through hole area is formed on the side of the through hole packaging area of the base substrate, and the isolation column is arranged in a different layer from the second source-drain metal layer;
  • the via region is cut to form a via.
  • At least one isolation column disposed around the through-hole area is formed on the side of the through-hole packaging area of the substrate, specifically including:
  • the first source-drain metal layer is formed in the display area and the isolation column is formed in the through-hole packaging area through one patterning process.
  • the orthographic projection of the first planar layer on the base substrate is the same The orthographic projections on the base substrate do not overlap;
  • the second source-drain metal layer After forming the second source-drain metal layer, it further includes:
  • the first passivation film layer and the second passivation film layer are patterned by a patterning process to form the first passivation layer and completely remove the second passivation film layer; the first passivation layer Covering the through-hole packaging area, and the orthographic projection of the first passivation layer on the base substrate does not overlap with the orthographic projection of the isolation pillars on the base substrate; or, adopt one patterning
  • the process is to pattern the first passivation film layer and the second passivation film layer to form a first passivation layer and a second passivation layer; the first passivation layer covers the through-hole packaging area, And the orthographic projection of the first passivation layer on the base substrate does not overlap with the orthographic projection of the spacer columns on the base substrate, and the second passivation layer on the base substrate
  • the orthographic projection on and the orthographic projection of the isolation posts on the base substrate do not overlap.
  • the first source-drain metal layer and before forming the second source-drain metal layer further comprising: forming a first planar layer;
  • the orthographic projection of the first planar layer on the base substrate does not overlap the orthographic projection of the spacer posts on the base substrate;
  • the second source-drain metal layer After forming the second source-drain metal layer, it also includes: forming at least one transparent wiring layer; the orthographic projection of the transparent wiring layer on the base substrate and the spacer column on the substrate The orthographic projections on the substrate do not overlap;
  • Forming at least one isolation column around the through-hole area on the side of the through-hole packaging area of the base substrate specifically including:
  • the first material film layer is patterned to form the first film layer located in the display area and the isolation column located in the through-hole packaging area.
  • the orthographic projection of the first passivation layer on the base substrate does not overlap with the orthographic projection of the spacer columns on the base substrate, and the first flat layer is on the base substrate
  • the orthographic projection on the base substrate does not overlap with the orthographic projection of the spacer on the base substrate
  • the second source-drain metal layer After forming the second source-drain metal layer, it also includes: forming at least one transparent wiring layer; the orthographic projection of the transparent wiring layer on the base substrate and the spacer column on the substrate The orthographic projections on the substrate do not overlap;
  • the second material film layer is patterned to form the first film layer located in the display area and the isolation column located in the through-hole packaging area.
  • FIG. 1 is a schematic diagram of a top view structure of a display panel
  • FIG. 2 is an enlarged schematic diagram of the through-hole packaging area in FIG. 1;
  • Fig. 3 is a schematic layout diagram of the DD' direction in Fig. 2;
  • FIG. 4 is a schematic structural diagram of a display panel in the related art
  • FIG. 5 is a schematic structural diagram of another display panel in the related art.
  • FIG. 6A is a schematic structural diagram of another display panel in the related art.
  • FIG. 6B is a schematic structural diagram of transparent wiring
  • FIG. 7 is a schematic structural diagram of another display panel in the related art.
  • FIG. 8 is a schematic diagram of bubbles generated in the isolation column area in the related art.
  • Fig. 9 is a schematic cross-sectional view of the display area in Fig. 1;
  • FIGS. 10-19 are schematic structural diagrams of a display panel provided by an embodiment of the present disclosure.
  • the current flexible mobile phone display can be divided into: Liu Haiping, AA Hole digging screen/blind hole screen and the most popular under display camera (UDC) screen.
  • Figure 1 there is a through-hole packaging area BB between the display area AA and the through hole 01, as shown in Figures 2 and 3,
  • Figure 2 is an enlarged schematic diagram of the through-hole packaging area BB in Figure 1
  • the figure 3 is a schematic diagram of the layout (layout) along the DD' direction in FIG.
  • the through-hole packaging area BB includes: at least one crack dam 04 (Crack Dam) arranged around the through-hole 01 , and a dam arranged around the crack dam 04 05 (Dam), at least one isolation column 06 arranged around the retaining wall 05, and the wiring 07 located on the periphery of the isolation column 06; wherein, the position of the through hole 01 is used to place the camera, and the crack retaining wall 04 is used to prevent the digging of the through hole
  • the crack generated at 01 spreads to the display area AA
  • the retaining wall 05 is used to prevent the organic layer in the encapsulation layer from flowing to the through hole 01
  • the isolation column 06 is used to isolate the light-emitting layer to prevent the water vapor at the through-hole 01 from entering the display area from the light-emitting layer AA, since the through hole 01 is dug in the display area AA, the wiring 07 (such as a data line) originally arranged in the through hole 01 needs to bypass the through hole 01 .
  • Figure 4 and Figure 5 are schematic cross-sectional views along the CC' direction in Figure 1, including the substrate substrate 10, which are sequentially stacked on the substrate Inorganic film layer 20 (barrier layer+buffer layer), gate insulating layer 30 (such as first gate insulating layer, second gate insulating layer, and third gate insulating layer) on base substrate 10, interlayer insulating layer 40, first A source-drain metal layer (not shown), a first planar layer (not shown), a second source-drain metal layer 50 (Ti/Al/Ti sandwich structure), a second planar layer 60, and the isolation column 06 uses a second source
  • the drain metal layer 50 is designed, that is, the Ti/Al/Ti film layer is evaporated, and the isolation column 06 and the second source-drain metal layer 50 are formed by dry etching.
  • the through-hole packaging area BB only shows the isolation column 06, which is generally designed as an undercut (undercut) structure.
  • vapor deposition is used to make the metal film layer 70 of anode, coats the first photoresist 80 on the metal film layer 70, the first photoresist 80 is exposed and developed, and the The metal film layer 70 is wet-etched to form an anode (not shown) in the display area AA, and the metal film layer 70 in the remaining areas is removed.
  • the wet etching solution of the metal film layer 70 is a dilute acid
  • Etch the Al in the isolation column 06 (Ti/Al/Ti sandwich structure) to form an isolation column 06 with an undercut (undercut) structure as shown in Figure 5, the bottom Ti layer is represented by 061, and the Al layer is represented by 062 Indicates that the top Ti layer is indicated by 063.
  • the structure in Figure 4 and Figure 5 is the isolation column 06 made by the display screen that does not adopt the TOF face unlocking design at present, but for the display screen that adopts the TOF face unlocking design, that is, the "TOF+AA hole” technology under the screen, Because the receiving hole 02 and the emitting hole 03 of the under-screen TOF technology keep the light-emitting device to emit light, but the driving circuit that drives the light-emitting device to emit light is moved to the display area AA or the frame area, and the driving circuit connects with the light-emitting device through transparent wiring (such as ITO) The anode is electrically connected, and the transparent trace is located between the anode and the second source-drain layer.
  • transparent wiring such as ITO
  • multi-layer transparent wiring is generally used, as shown in FIG. 6A , for example, three layers of transparent wiring (not shown in FIG. out), and planar layers (such as the third planar layer 90, the fourth planar layer 100, and the fifth planar layer 110) are arranged between the film layers where the transparent wirings are located, as shown in FIG. 6B, which is shown in FIG. 1 Schematic diagram of the pixel arrangement of the emission hole 02.
  • the emission hole 02 includes a plurality of pixel units P, and each pixel unit P includes a light-emitting device, and the light-emitting device includes a stacked anode, a light-emitting layer, and a cathode for driving the
  • the driving circuit for the light-emitting device to emit light is moved to the display area AA or the frame area, and the anode of the light-emitting device is electrically connected to the peripheral driving circuit through the transparent wiring 300.
  • FIG. 6B only shows a layer of transparent wiring. Of course, in order to save wiring space, no It is limited to one layer of transparent wiring, and can be two or three layers of transparent wiring...
  • the transparent wiring used to improve the transmittance it can only be carried out by wet etching at present, and the wet etching
  • the etching solution is similar to the anode wet etching solution, and both use dilute acid. Therefore, the etching solution used in the process of forming the transparent line will definitely corrode the Al in the isolation column 06 (Ti/Al/Ti sandwich structure), As a result, major adverse problems such as severe corrosion of the isolation column 06 (as shown in Figure 7) and the formation of Bubbles (bubbles, as shown in Figure 8) at the AA Hole position during the transparent wiring and subsequent processes (anodic etching), This makes it difficult to combine the under-screen camera with the AA hole isolation column design.
  • the embodiment of the present disclosure provides a display panel, as shown in the figure 1.
  • Figure 12, Figure 15, Figure 17, and Figure 18, Figure 12, Figure 15, Figure 17, and Figure 18 are respectively schematic cross-sectional views along the CC' direction in Figure 1, and the through-hole packaging area BB is only schematic Isolating columns, the display panel includes:
  • the base substrate 10 the display panel has a through hole 01 through the thickness direction of the base substrate 10, the base substrate 10 has a display area AA and a through hole packaging area BB between the display area AA and the through hole 01;
  • the first source-drain metal layer 11 is located on one side of the base substrate;
  • the second source-drain metal layer 50 is located on the side of the first source-drain metal layer 11 away from the base substrate 10;
  • At least one isolation column 06 takes two isolation columns 06 as an example, the isolation column 06 is located on one side of the base substrate 10, and is located in the through-hole packaging area BB, and is arranged around the through hole 01; wherein, the isolation column 06 and The second source-drain metal layer 50 is arranged in different layers.
  • the isolation column 06 is arranged in a different layer from the second source-drain metal layer 50, that is, the isolation column 06 and the second source-drain metal layer 50 are located at different layers, so that the isolation column 06 is set on the same layer as the first source-drain metal layer 11, and then a passivation layer is deposited on the side of the first source-drain metal layer 11 facing away from the base substrate 10 to protect the isolation column 06, and then subsequent processes such as in the under-screen TOF technology are performed.
  • the etching of the multi-layer transparent wiring, the setting of the passivation layer can avoid the problem of severe corrosion of the Al layer of the isolation column during the etching process of the transparent wiring, and the isolation column 06 will be protected after the etching of the transparent wiring is completed.
  • the passivation layer is removed, and then anodic etching is performed. During the anode etching process, the Al layer in the isolation column 06 is etched to form an isolation column with an undercut structure; in addition, the isolation column 06 can also be used in the second
  • the source-drain metal layer 50 is disposed on the same layer as the film layer on the side away from the base substrate 10 (for example, the third source-drain metal layer, etc.), and the third source-drain metal layer is disposed on a side of the multi-layer transparent wiring away from the base substrate 10.
  • the isolation column 06 is formed at the same time as the third source-drain metal layer, so that the problem of severe corrosion of the Al layer of the isolation column during the etching process of the transparent wiring can also be avoided. Then anodic etching is performed, and the Al layer in the isolation column 06 is etched during the anode etching process, thereby forming an isolation column with an undercut structure. Therefore, the display panel provided by the embodiment of the present disclosure can avoid the serious corrosion of the isolation column 06 during the etching process of the transparent wiring in the "under-display TOF+AA hole" technology and avoid the undesirable problems of Bubble formation at the AA Hole position.
  • FIG. 9 is a schematic cross-sectional view of a pixel in the display area AA in FIG. 20), active layer 400, first gate insulating layer 500, first gate layer 600, second gate insulating layer 700, second gate layer 800, interlayer insulating layer 40, first source-drain metal layer 900 , passivation layer 1000, first flat layer 31, second source-drain metal layer 50, second flat layer 60, anode 70, pixel defining layer 1100, light emitting layer 190, cathode 1200, first inorganic layer 2001, organic layer 2002 and the second inorganic layer 2003, the first inorganic layer 2001, the organic layer 2002 and the second inorganic layer 2003 constitute the encapsulation layer 200; the first source-drain metal layer 900 and the second source-drain metal layer 50 pass through the first planar layer 31 is electrically connected to the first via hole V1 of the passivation layer 1000 , and the anode 70 is electrically connected to the second source-drain metal layer 50 through the second via hole
  • the isolation column 06 can be provided with the same layer and the same material as the first source-drain metal layer 11. During specific fabrication, as shown in FIG.
  • gate insulating layer 30 (such as the first gate insulating layer, the second gate insulating layer and the third gate insulating layer), interlayer insulating layer 40, on the interlayer insulating layer 40 deposit a layer of Ti/Al/Ti metal film layer
  • a first patterning process is used to form the first source-drain metal layer 11 located in the display area AA and the isolation column 06 located in the through-hole packaging area BB, and then a layer of the first source-drain metal layer 11 is deposited on the side away from the base substrate 10.
  • a passivation film layer 21, the first passivation film layer 21 covers the through-hole packaging area BB to protect the isolation column, and then a first planar layer 31 is formed on the side of the first passivation film layer 21 away from the base substrate 10, the first The orthographic projection of the flat layer 31 on the base substrate 10 does not overlap with the orthographic projection of the spacer column 06 on the base substrate 10 , and then a second source-drain metal layer is formed on the side of the first flat layer 31 away from the base substrate 10 50, and then form a second planar layer 60 on the side of the second source-drain metal layer 50 away from the base substrate 10, and then form a multilayer transparent wiring (not shown) on the side of the second planar layer 60 away from the base substrate 10 , the transparent wiring in the multi-layer transparent wiring is used to electrically connect the anode of the light-emitting device located in the receiving hole 02 and the emitting hole 03 in FIG.
  • FIG. 10 shows that the third flat layer 90 and the fourth flat layer 100 are stacked in sequence on the side of the second flat layer 60 facing away from the base substrate 10. and the fifth planar layer 110, the orthographic projection of the second planar layer 60, the third planar layer 90, the fourth planar layer 100 and the fifth planar layer 110 on the base substrate 10 is the same as that of the isolation column 06 on the base substrate 10
  • the orthographic projections do not overlap, there is a layer of transparent wiring between the second flat layer 60 and the third flat layer 90, there is a layer of transparent wiring between the third flat layer 90 and the fourth flat layer 100, and the fourth flat layer
  • the second passivation film layer 120 is completely removed .
  • the metal film layer 70 for making the anode is evaporated, and the first photoresist 80 is coated on the metal film layer 70, and the first photoresist 80 is processed.
  • the metal film layer 70 Expose and develop, and wet-etch the metal film layer 70 to form an anode (not shown) in the display area AA, and remove the metal film layer 70 in the remaining area, that is, the orthographic projection of the anode on the base substrate 10 and the isolation column
  • the orthographic projections of 06 on the base substrate 10 do not overlap; since the wet etching solution of the metal film layer 70 is a dilute acid, Al in the isolation column 06 (Ti/Al/Ti sandwich structure) is produced during the etching process Etching, so as to form the undercut (undercut) structure isolation column 06, as shown in FIG. 12, the bottom Ti layer is represented by 061, the Al layer is represented by 062, and the top Ti layer is represented by 063.
  • the setting of the first passivation film layer 21 in the scheme of Fig. 10-Fig. 12 can avoid the problem of severe corrosion to the Al layer of the isolation column during the etching process of the transparent wiring, and isolate the protection after the etching of the transparent wiring is completed.
  • the passivation layer of the column 06 is removed, and then anodic etching is performed, and the Al layer in the isolation column 06 is etched during the anode etching process, thereby forming the isolation column 06 with an undercut structure.
  • the fifth flat layer 110 is formed and the second passivation film layer 120 is completely removed as an example.
  • the fifth flat layer 110 may not be provided, and the second passivation layer 110 may be directly used.
  • the film layer 120 replaces the fifth planar layer 110 , and the second passivation film layer 120 remains at a position corresponding to the display area AA, and is removed at a position corresponding to the through-hole packaging area BB.
  • the etching of the first passivation film layer 21 is performed by setting a second passivation film layer 120.
  • the second passivation film layer 120 may not be provided.
  • the transparent wiring layer is The orthographic projection on the base substrate 10 does not overlap with the orthographic projection of the isolation column 06 on the base substrate 10, and the orthographic projection of the anode on the base substrate 10 does not overlap with the orthographic projection of the isolation column 06 on the base substrate 10 stack;
  • the spacer column 06 and the first film layer 140 are arranged in the same layer and the same material.
  • an inorganic film layer 20 (barrier layer+buffer layer), a gate insulating layer 30 (for example, a first gate insulating layer, a second gate insulating layer, and a third gate insulating layer) are sequentially fabricated on a base substrate 10.
  • an interlayer insulating layer 40 deposit a layer of Ti/Al/Ti metal film layer on the interlayer insulating layer 40, adopt patterning process to form the first source-drain metal layer 11 located in the display area AA, and then A source-drain metal layer 11 forms a first planar layer 31 on the side away from the base substrate 10, and the orthographic projection of the first planar layer 31 on the base substrate 10 does not overlap with the orthographic projection of the spacer column 06 on the base substrate 10.
  • FIG. 1 A multi-layer transparent wiring (not shown), and the transparent wiring in the multi-layer transparent wiring is used for the light emission in the receiving hole 02 and the emitting hole 03 in FIG. 1
  • the anode of the device is electrically connected to the peripheral driving circuit (for example, located in the display area or frame area). Taking the three-layer transparent wiring as an example, there is a flat layer between two adjacent transparent wiring layers.
  • the third flat layer 90, the fourth flat layer 100, and the fifth flat layer 110 are stacked in sequence on the side away from the base substrate 10, and the second flat layer 60, the third flat layer 90, the fourth flat layer 100, and the fifth flat layer
  • the orthographic projection of the layer 110 on the base substrate 10 does not overlap with the orthographic projection of the spacer column 06 on the base substrate 10, there is a layer of transparent wiring between the second flat layer 60 and the third flat layer 90, and the third
  • There is a layer of transparent wiring between the flat layer 90 and the fourth flat layer 100 there is a layer of transparent wiring between the fourth flat layer 100 and the fifth flat layer 110, and the orthographic projection of the transparent wiring on the base substrate 10 Do not overlap with the orthographic projection of the isolation column 06 on the base substrate 10, and then deposit a first material film layer (Ti/Al/Ti) 140' on the side of the fifth planar layer 110 away from the base substrate 10, Coating the third photoresist 150 on the side of the first material film layer 140' facing away from the base substrate 10, exposing
  • the first film layer 140 is formed in the region AA and the isolation column 06 is formed in the via packaging region BB. Then on the side of the first film layer 140 away from the base substrate 10, the metal film layer 70 for making the anode is evaporated, and the first photoresist 80 is coated on the metal film layer 70, and the first photoresist 80 is processed.
  • the metal film layer 70 Expose and develop, and wet-etch the metal film layer 70 to form an anode (not shown) in the display area AA, and remove the metal film layer 70 in the remaining area, that is, the orthographic projection of the anode on the base substrate 10 and the isolation column
  • the orthographic projections of 06 on the base substrate 10 do not overlap; since the wet etching solution of the metal film layer 70 is a dilute acid, Al in the isolation column 06 (Ti/Al/Ti sandwich structure) is produced during the etching process Etching to form an undercut (undercut) structure of the isolation column 06, as shown in FIG. 15, the bottom Ti layer is represented by 061, the Al layer is represented by 062, and the top Ti layer is represented by 063.
  • FIG. 6B only shows one Layer transparent wiring 300 . Of course, it can also be 2 layers, 3 layers or even more layers.
  • a flat layer (the third layer) is set between two adjacent layers of transparent wiring 300. flat layer 90, fourth flat layer 100 or fifth flat layer 110).
  • the material of the first film layer 140 is negative photoresist.
  • the difference between the manufacturing process of the isolation column 06 in FIG. 17 and the manufacturing process of FIG. 15 is that, as shown in FIG. 16, there is a first passivation layer 21' between the first flat layer 31 and the first source-drain metal layer 11.
  • the first passivation layer 21' covers the through-hole packaging area BB, and the orthographic projection of the first passivation layer 21' on the base substrate 10 does not overlap with the orthographic projection of the isolation column 06 on the base substrate 10, in
  • a second material film layer 160 of a negative photoresist material is coated on the side of the fifth flat layer 110 away from the base substrate 10, and the second material film layer 160 is away from the base substrate.
  • One side of 10 is coated with a fourth photoresist 170, and the fourth photoresist 170 is exposed and developed.
  • a first film made of a negative photoresist is formed in the AA region
  • the layer 140 and the isolation pillar 06 of the Undercut structure are formed in the through-hole packaging area BB.
  • the subsequent process of making the anode in FIG. 17 is the same as that in FIG. 15 , and will not be repeated here. Therefore, in the scheme shown in Fig. 16-Fig. 17, the first film layer 140 whose material is a negative photoresist is made after the transparent traces are made, and the isolation column 06 is set on the same layer as the first film layer 140, so as to avoid transparent traces. During the wire etching process, the Al layer of the isolation column is severely corroded.
  • the display panel provided by the embodiment of the present invention, as shown in FIG. 18 , it further includes: at least one transparent wiring layer (not shown), the anode (not shown) located on the side of the transparent wiring layer away from the base substrate 10, the second flat layer 60 located between the transparent wiring layer and the second source-drain metal layer 50, and the The negative photoresist layer 180 between the two source-drain metal layers 50 and the second planar layer 60; also includes: a first passivation layer 21' between the first planar layer 31 and the first source-drain metal layer 11, The first passivation layer 21' covers the through-hole packaging area BB, and the orthographic projection of the first passivation layer 21' on the base substrate 10 does not overlap with the orthographic projection of the isolation column 06 on the base substrate 10; The orthographic projection of the line layer on the base substrate 10 does not overlap with the orthographic projection of the isolation column 06 on the base substrate 10, and the orthographic projection of the anode on the base substrate and the orthographic projection of the
  • the spacer column 06 and the negative photoresist layer 180 are arranged in the same layer and the same material.
  • the second source-drain metal layer 50 is formed, the second The side is coated with a layer of negative photoresist material film layer, and the fifth photoresist is coated on the side of the negative photoresist material film layer away from the base substrate 10, and the fifth photoresist is exposed and developed.
  • a negative photoresist layer 180 is formed in the region AA and an isolation column 06 of the Undercut structure is formed in the through-hole packaging region BB. Then proceed to the subsequent transparent wiring and anode manufacturing process.
  • the structure in FIG. 18 can also avoid the problem of severe corrosion of the Al layer of the isolation post during the etching process of the transparent wiring.
  • the first film layer 140 formed in the AA region in FIG. 140 can play a flat role
  • the negative photoresist layer 180 formed in the AA region in FIG. 18 can play a flat role.
  • the number of isolation columns 06 is generally set to be more than three, and the number of isolation columns 06 can also be reduced to two.
  • the packaging layer The organic layer material will overflow during inkjet printing, so the isolation groove 001 is set around the isolation column, and one or two isolation grooves 001 can be added between the two isolation columns 06, of course, the isolation groove 001 is not required.
  • the base substrate 10 may include a first flexible substrate, a first barrier layer, and a second flexible substrate stacked in layers, the second flexible substrate is close to the barrier layer and the buffer layer 20, and the isolation groove 001 may be formed through the following film Layer formation: interlayer insulating layer 40, second gate insulating layer 700, first gate insulating layer 500, barrier layer and buffer layer 20, second flexible substrate, first barrier layer, part of the first flexible substrate, of course Not limited thereto, the through film layer can be selected according to actual needs to form the isolation groove 001 .
  • the luminescent layer 190 is disconnected at the position of the isolation column 06;
  • the encapsulation layer 200 includes a first inorganic layer 2001, an organic layer 2002, and a second inorganic layer 2003 that are stacked, wherein the orthographic projections of the first inorganic layer 2001, the organic layer 2002, and the second inorganic layer 2003 on the base substrate 10 are uniform. Covering the display area AA and the via packaging area BB.
  • the above-mentioned display panel provided by the embodiments of the present disclosure may also include other functional film layers well known to those skilled in the art, such as an active layer, a first gate layer, a second gate layer, a third The gate layer, and the touch layer, cover plate, etc. located on the side of the package layer away from the base substrate.
  • other functional film layers well known to those skilled in the art, such as an active layer, a first gate layer, a second gate layer, a third The gate layer, and the touch layer, cover plate, etc. located on the side of the package layer away from the base substrate.
  • an embodiment of the present disclosure also provides a manufacturing method for manufacturing the above-mentioned display panel, including:
  • a base substrate is provided, and the base substrate has a display area, a via area, and a via packaging area between the display area and the via area;
  • At least one isolation column arranged around the through hole area is formed on the side of the through hole packaging area of the base substrate, and the isolation column is arranged in a different layer from the second source and drain metal layer;
  • the via region is cut to form a via.
  • At least one isolation column arranged around the through-hole area is formed on the side of the through-hole packaging area of the substrate, specifically including:
  • a first source-drain metal layer is formed in the display area and an isolation column is formed in the through-hole packaging area through one patterning process.
  • the first source-drain metal layer and before forming the second source-drain metal layer after forming the first source-drain metal layer and before forming the second source-drain metal layer, it further includes: forming a first passivation film layer and a second A flat film layer, and the first flat film layer is patterned to form a first flat layer; the orthographic projection of the first flat layer on the base substrate does not overlap with the orthographic projection of the spacer on the base substrate;
  • the second source-drain metal layer After forming the second source-drain metal layer, it also includes:
  • At least one transparent wiring layer is formed; the orthographic projection of the transparent wiring layer on the base substrate does not overlap with the orthographic projection of the isolation column on the base substrate;
  • the first passivation film layer and the second passivation film layer are patterned by a patterning process to form the first passivation layer and the second passivation film layer is completely removed; the first passivation layer covers the through-hole packaging area, and the second passivation layer is completely removed.
  • the orthographic projection of a passivation layer on the base substrate does not overlap with the orthographic projection of the spacer on the base substrate; or, the first passivation film layer and the second passivation film layer are patterned by one patterning process, Forming a first passivation layer and a second passivation layer; the first passivation layer covers the through-hole packaging area, and the orthographic projection of the first passivation layer on the base substrate is different from the orthographic projection of the isolation column on the base substrate Overlap, the orthographic projection of the second passivation layer on the base substrate does not overlap with the orthographic projection of the isolation pillars on the base substrate.
  • the first source-drain metal layer and before forming the second source-drain metal layer it further includes: forming a first planar layer;
  • the orthographic projection of the layer on the backing substrate does not overlap the orthographic projection of the spacer posts on the backing substrate;
  • the second source-drain metal layer After forming the second source-drain metal layer, it also includes: forming at least one transparent wiring layer; the orthographic projection of the transparent wiring layer on the base substrate does not overlap with the orthographic projection of the isolation column on the base substrate;
  • Forming at least one isolation column around the through-hole area on the side of the through-hole packaging area of the base substrate specifically including:
  • the first material film layer is patterned to form the first film layer located in the display area and the isolation column located in the through-hole packaging area.
  • the first source-drain metal layer and before forming the second source-drain metal layer after forming the first source-drain metal layer and before forming the second source-drain metal layer, it further includes: forming a first passivation layer and a first Flat layer; the orthographic projection of the first passivation layer on the base substrate does not overlap with the orthographic projection of the isolation column on the base substrate, and the orthographic projection of the first flat layer on the base substrate and the isolation column on the base substrate The orthographic projections on do not overlap;
  • the second source-drain metal layer After forming the second source-drain metal layer, it also includes: forming at least one transparent wiring layer; the orthographic projection of the transparent wiring layer on the base substrate does not overlap with the orthographic projection of the isolation column on the base substrate;
  • Forming at least one isolation column around the through-hole area on the side of the through-hole packaging area of the base substrate specifically including:
  • the second material film layer is patterned to form the first film layer located in the display area and the isolation column located in the through-hole packaging area.
  • an embodiment of the present disclosure further provides a display device, including any one of the above-mentioned display panels provided by the embodiments of the present disclosure.
  • the display device may be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.
  • a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.
  • the embodiments of the present disclosure provide a display panel, a manufacturing method thereof, and a display device.
  • the isolation column is arranged in a different layer from the second source-drain metal layer, that is, the isolation column and the second source-drain metal layer are located in different layers, so that The isolation column and the first source-drain metal layer can be set on the same layer, and then a passivation layer is deposited on the side of the first source-drain metal layer away from the substrate to protect the isolation column, and then subsequent processes such as the under-screen TOF technology are performed.
  • the setting of the passivation layer can avoid the problem of serious corrosion of the Al layer of the isolation column during the etching process of the transparent line, and the passivation of the isolation column will be protected after the etching of the transparent line is completed.
  • the isolation column can also be used in conjunction with the second source-drain metal layer
  • the film layers on the side facing away from the base substrate for example, the third source-drain metal layer, etc.
  • the isolation column is formed at the same time as the third source and drain metal layer, so as to avoid the serious corrosion of the Al layer of the isolation column during the etching process of the transparent wiring, and then perform anode etching, and the anode During the etching process, the Al layer in the isolation column is etched, thereby forming the isolation column of the undercut structure.
  • the display panel provided by the embodiments of the present disclosure can avoid the serious corrosion of the isolation column during the etching process of the transparent wiring in the “under-screen TOF+AA hole” technology and avoid the undesirable problems of forming bubbles at the AA Hole position.

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Abstract

本公开实施例公开了一种显示面板、其制作方法及显示装置，包括：衬底基板，显示面板具有贯穿衬底基板厚度方向的通孔，衬底基板具有显示区以及位于显示区和通孔之间的通孔封装区；第一源漏金属层，位于衬底基板的一侧，且位于显示区；第二源漏金属层，位于第一源漏金属层远离衬底基板的一侧，且位于显示区；至少一个隔离柱，位于衬底基板的一侧，且位于通孔封装区，且围绕通孔设置；其中，隔离柱与第二源漏金属层异层设置。

Description

一种显示面板、其制作方法及显示装置
相关申请的交叉引用
本申请要求在2021年10月27日提交中国专利局、申请号为202111257710.9、申请名称为“一种显示面板、其制作方法及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，特别涉及一种显示面板、其制作方法及显示装置。
背景技术
相关技术中，全面屏设计的显示面板越来越深得消费者的欢迎，全面屏是采用四周超窄边框设计，再结合在显示区域挖孔放置摄像头等装置设计的面板架构，全面屏是面板显示屏占比最高的面板构架。
发明内容
本公开实施例提供了一种显示面板、其制作方法及显示装置，用于解决全面屏摄像孔区域四周的隔离柱产生严重腐蚀和形成Bubble(气泡)等重大不良问题。
本公开实施例提供的一种显示面板，包括：
衬底基板，所述显示面板具有贯穿所述衬底基板厚度方向的通孔，所述衬底基板具有显示区以及位于所述显示区和所述通孔之间的通孔封装区；
第一源漏金属层，位于所述衬底基板的一侧；
第二源漏金属层，位于所述第一源漏金属层远离所述衬底基板的一侧；
至少一个隔离柱，位于所述衬底基板的一侧，且位于所述通孔封装区， 且围绕所述通孔设置；其中，所述隔离柱与所述第二源漏金属层异层设置。
可选地，在本公开实施例提供的上述显示面板中，所述隔离柱与所述第一源漏金属层同层同材料设置。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述第二源漏金属层远离所述衬底基板一侧的至少一层透明走线层，以及位于所述透明走线层远离所述衬底基板一侧的阳极；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述阳极在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述第二源漏金属层和所述第一源漏金属层之间的第一钝化层，以及位于所述第一钝化层和所述第二源漏金属层之间的第一平坦层；所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述透明走线层和所述阳极之间的第二钝化层，所述第二钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述第二源漏金属层远离所述衬底基板一侧的至少一层透明走线层，位于所述透明走线层远离所述衬底基板一侧的阳极，以及位于所述透明走线层和所述阳极之间的第一膜层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述阳极在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
所述隔离柱与所述第一膜层同层同材料设置。
可选地，在本公开实施例提供的上述显示面板中，所述第一膜层的材料与所述第一源漏金属层的材料相同，或所述第一膜层的材料为负性光阻。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述第 二源漏金属层远离所述衬底基板一侧的至少一层透明走线层，位于所述透明走线层远离所述衬底基板一侧的阳极，位于所述透明走线层和所述第二源漏金属层之间的第二平坦层，以及位于所述第二源漏金属层和所述第二平坦层之间的负性光阻层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述阳极在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
所述隔离柱与所述负性光阻层同层同材料设置。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述第一源漏金属层和所述第二源漏金属层之间的第一平坦层。
可选地，在本公开实施例提供的上述显示面板中，当所述隔离柱的材料为负性光阻时，还包括：位于所述第一平坦层和所述第一源漏金属层之间的第一钝化层，所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述阳极远离所述衬底基板一侧的发光层，位于所述发光层远离所述衬底基板一侧的阴极，以及位于所述阴极远离所述衬底基板一侧的封装层；所述发光层在所述隔离柱的位置处断开；
所述封装层包括层叠设置的第一无机层、有机层和第二无机层，其中，所述第一无机层、所述有机层和所述第二无机层在所述衬底基板上的正投影均覆盖所述显示区和所述通孔封装区。
相应地，本公开实施例还提供了一种显示装置，包括上述任一项所述的显示面板。
相应地，本公开实施例还提供了一种用于制作上述任一项所述的显示面板的制作方法，包括：
提供衬底基板，所述衬底基板具有显示区、通孔区以及位于所述显示区和所述通孔区之间的通孔封装区；
在所述衬底基板的一侧形成第一源漏金属层；
在所述第一源漏金属层远离所述衬底基板的一侧形成第二源漏金属层；
在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，所述隔离柱与所述第二源漏金属层异层设置；
对所述通孔区进行切割，以便形成通孔。
可选地，在本公开实施例提供的上述制作方法中，在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，具体包括：
通过一次构图工艺在所述显示区形成所述第一源漏金属层以及在所述通孔封装区形成所述隔离柱。
可选地，在本公开实施例提供的上述制作方法中，在形成所述第一源漏金属层之后，且在形成所述第二源漏金属层之前，还包括：形成第一钝化膜层和第一平坦膜层，并对所述第一平坦膜层进行构图形成第一平坦层；所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
在形成所述第二源漏金属层之后，还包括：
形成至少一层透明走线层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
在所述透明走线层远离所述衬底基板的一侧形成第二钝化膜层；
采用一次构图工艺对所述第一钝化膜层和所述第二钝化膜层进行构图，形成第一钝化层以及所述第二钝化膜层完全去除；所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；或，采用一次构图工艺对所述第一钝化膜层和所述第二钝化膜层进行构图，形成第一钝化层和第二钝化层；所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述第二钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
可选地，在本公开实施例提供的上述制作方法中，在形成所述第一源漏金属层之后，且在形成所述第二源漏金属层之前，还包括：形成第一平坦层； 所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
在形成所述第二源漏金属层之后，还包括：形成至少一层透明走线层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，具体包括：
在所述透明走线层背离所述衬底基板的一侧形成与所述第一源漏金属层的材料相同的第一材料膜层；
对所述第一材料膜层进行构图，形成位于所述显示区的第一膜层以及位于所述通孔封装区的隔离柱。
可选地，在本公开实施例提供的上述制作方法中，在形成所述第一源漏金属层之后，且在形成所述第二源漏金属层之前，还包括：形成第一钝化层和第一平坦层；所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
在形成所述第二源漏金属层之后，还包括：形成至少一层透明走线层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，具体包括：
在所述透明走线层背离所述衬底基板的一侧形成材料为负性光阻的第二材料膜层；
对所述第二材料膜层进行构图，形成位于所述显示区的第一膜层以及位于所述通孔封装区的隔离柱。
附图说明
图1为显示面板的俯视结构示意图；
图2为图1中通孔封装区的放大示意图；
图3为图2中DD’方向的layout示意图；
图4为相关技术中的一种显示面板的结构示意图；
图5为相关技术中的又一种显示面板的结构示意图；
图6A为相关技术中的又一种显示面板的结构示意图；
图6B为透明走线的结构示意图；
图7为相关技术中的又一种显示面板的结构示意图；
图8为相关技术中的隔离柱区产生气泡的示意图；
图9为图1中显示区的截面示意图；
图10-图19为本公开实施例提供的显示面板的结构示意图。
具体实施方式
为了使本公开的目的，技术方案和优点更加清楚，下面结合附图，对本公开实施例提供的显示面板、其制作方法及显示装置的具体实施方式进行详细地说明。应当理解，下面所描述的优选实施例仅用于说明和解释本公开，并不用于限定本公开。并且在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
附图中各层薄膜厚度、大小和形状不反映显示面板的真实比例，目的只是示意说明本公开内容。
随着有源矩阵有机发光二极体(Active-matrix organic light emitting diode，AMOLED)的快速发展与应用，当前的柔性手机显示屏按其下摄像头放置方式的异形变化可分为：刘海屏、AA hole挖孔屏/盲孔屏以及当下最为热门的屏下相机(under display camera，UDC)屏。
然而，尽管当前的屏下摄像头被认为是AMOLED技术发展最为前沿的一种全面屏摄像头技术，但该技术的发展依然受限于摄像孔位置的透过率低、 发光像素寿命低、拍照显示效果差等缺陷。因此，一种将UDC技术应用于人脸解锁的TOF面部解锁技术结合用于摄像头拍照的AA hole技术即“屏下TOF+AA hole”技术被随之提出，如图1所示在显示面板的显示区AA设置AA hole摄像头通孔01，在通孔01两侧设置屏下TOF人脸解锁发射孔02和接收孔03。该技术的应用集成了当下最为前沿的屏下摄像头技术以及最为成熟且被广泛应用的AA hole摄像头拍照技术。
具体地，如图1所示，显示区AA和通孔01之间具有通孔封装区BB，如图2和图3所示，图2为图1中通孔封装区BB的放大示意图，图3为图2中沿DD’方向的layout(版图)示意图，该通孔封装区BB包括：围绕通孔01设置的至少一个裂缝挡墙04(Crack Dam)，围绕裂缝挡墙04设置的挡墙05(Dam)，围绕挡墙05设置的至少一个隔离柱06，以及位于隔离柱06外围的走线07；其中，通孔01位置处用于放置摄像头，裂缝挡墙04用于阻止挖通孔01时产生的裂纹向显示区AA扩散，挡墙05用于防止封装层中的有机层流向通孔01，隔离柱06用于隔断发光层，防止通孔01处的水汽从发光层进入显示区AA，由于显示区AA挖通孔01，原本设置在通孔01的走线07(如数据线)就需要绕过通孔01。
相关技术中，目前常规AA Hole产品的隔离柱结构如图4和图5所示，图4和图5为图1中沿CC’方向的截面示意图，包括衬底基板10、依次层叠设置在衬底基板10上的无机膜层20(阻挡层+缓冲层)、栅绝缘层30(例如第一栅绝缘层、第二栅绝缘层和第三栅绝缘层)、层间绝缘层40、第一源漏金属层(未示出)、第一平坦层(未示出)、第二源漏金属层50(Ti/Al/Ti三明治结构)、第二平坦层60，隔离柱06采用第二源漏金属层50设计，即蒸镀Ti/Al/Ti膜层，采用干法刻蚀形成隔离柱06与第二源漏金属层50。通孔封装区BB仅示意隔离柱06，隔离柱06一般设计为undercut(底切)结构。图4中在第二平坦层60上蒸镀用于制作阳极的金属膜层70，在金属膜层70上涂覆第一光刻胶80，对第一光刻胶80进行曝光显影，并对金属膜层70进行湿法刻蚀，在显示区AA形成阳极(未示出)，其余区域的金属膜层70去除，由于金属 膜层70的湿法刻蚀液为稀酸，刻蚀过程中对隔离柱06(Ti/Al/Ti三明治结构)中的Al产生刻蚀，从而形成undercut(底切)结构的隔离柱06，如图5所示，底Ti层用061表示，Al层用062表示，顶Ti层用063表示。由于图4和图5的结构为目前未采用TOF人脸解锁设计的显示屏制作得的隔离柱06，但对于采用TOF人脸解锁设计得显示屏，即“屏下TOF+AA hole”技术，由于屏下TOF技术的接收孔02与发射孔03内保留发光器件发光，但驱动发光器件发光的驱动电路移至显示区AA或边框区，驱动电路通过透明走线(例如ITO)与发光器件的阳极电连接，集透明走线位于阳极和第二源漏层之间。为了避免透明走线的占用空间，一般采用多层透明走线，如图6A所示，例如还包括位于第二平坦层60和金属膜层70之间的三层透明走线(图6A未示出)，各透明走线所在膜层之间分别设置平坦层(例如第三平坦层90、第四平坦层100和第五平坦层110)，如图6B所示，以图6B为图1中发射孔02的像素排布示意图，发射孔02内包括多个像素单元P，每一像素单元P包括发光器件，发光器件包括层叠设置的阳极、发光层和阴极，用于驱动像素单元P内的发光器件发光的驱动电路移至显示区AA或边框区，发光器件的阳极通过透明走线300与外围的驱动电路电连接，图6B仅示意出一层透明走线，当然为了节省布线空间，不限制于一层透明走线，可以为两层、三层透明走线……然而由于为提升透过率使用的透明走线，目前只能使用湿法刻蚀方式进行，且该湿法刻蚀液与阳极湿法刻蚀液类似，均采用稀酸，因此，在透明走线形成过程中采用的刻蚀液必将对隔离柱06(Ti/Al/Ti三明治结构)中的Al产生腐蚀，从而在透明走线及后续工艺(阳极刻蚀)过程中对隔离柱06产生严重腐蚀(如图7所示)以及在AA Hole位置形成Bubble(气泡，如图8所示)等重大不良问题，从而使得屏下摄像头结合AA hole隔离柱设计方案难以进行。
为了解决“屏下TOF+AA hole”技术中在透明走线刻蚀过程中对隔离柱产生严重腐蚀以及在AA Hole位置形成Bubble的不良问题，本公开实施例提供了一种显示面板，如图1、图3、图12、图15、图17、图18所示，图12、图15、图17和图18分别为图1中沿CC’方向的截面示意图，通孔封装区BB 仅示意隔离柱，该显示面板包括：
衬底基板10，显示面板具有贯穿衬底基板10厚度方向的通孔01，衬底基板10具有显示区AA以及位于显示区AA和通孔01之间的通孔封装区BB；
第一源漏金属层11，位于衬底基板的一侧；
第二源漏金属层50，位于第一源漏金属层11远离衬底基板10的一侧；
至少一个隔离柱06，本公开以两个隔离柱06为例，隔离柱06位于衬底基板10的一侧，且位于通孔封装区BB，且围绕通孔01设置；其中，隔离柱06与第二源漏金属层50异层设置。
本公开实施例提供的上述显示面板，通过将隔离柱06设置成与第二源漏金属层50异层设置，即隔离柱06与第二源漏金属层50位于不同层，这样可以将隔离柱06与第一源漏金属层11同层设置，然后在第一源漏金属层11背离衬底基板10一侧沉积一层钝化层保护隔离柱06，然后进行后续工艺如屏下TOF技术中的多层透明走线的刻蚀，钝化层的设置可以避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题，在透明走线刻蚀完成之后将保护隔离柱06的钝化层去除，然后进行阳极刻蚀，在阳极刻蚀过程中对隔离柱06中的Al层产生刻蚀，从而形成undercut结构的隔离柱；另外，还可以将隔离柱06采用与位于第二源漏金属层50背离衬底基板10一侧的膜层(例如第三源漏金属层等)同层设置，第三源漏金属层设置成位于多层透明走线背离衬底基板10的一侧，即在透明走线刻蚀完之后，在制作第三源漏金属层的同时制作隔离柱06，从而也可以避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题，然后进行阳极刻蚀，在阳极刻蚀过程中对隔离柱06中的Al层产生刻蚀，从而形成undercut结构的隔离柱。因此本公开实施例提供的显示面板可以避免“屏下TOF+AA hole”技术中在透明走线刻蚀过程中对隔离柱06产生严重腐蚀以及避免在AA Hole位置形成Bubble的不良问题。
如图9所示，图9为图1中显示区AA的一个像素的截面示意图，包括依次层叠设置在衬底基板10上的阻挡层、缓冲层(阻挡层和缓冲层采用前文中无机膜层20表示)、有源层400、第一栅绝缘层500、第一栅极层600、第 二栅绝缘层700、第二栅极层800、层间绝缘层40、第一源漏金属层900、钝化层1000、第一平坦层31、第二源漏金属层50、第二平坦层60、阳极70、像素界定层1100、发光层190、阴极1200、第一无机层2001、有机层2002和第二无机层2003，第一无机层2001、有机层2002和第二无机层2003构成封装层200；第一源漏金属层900和第二源漏金属层50之间通过贯穿第一平坦层31和钝化层1000的第一过孔V1电连接，阳极70通过贯穿第二平坦层60的第二过孔V2与第二源漏金属层50电连接。
在具体实施时，在本发明实施例提供的上述显示面板中，如图12所示，隔离柱06与位于衬底基板10和第二源漏金属层50之间的至少一个膜层同层同材料设置。具体地，隔离柱06可以与第一源漏金属层11同层同材料设置，具体制作时，如图10所示，在衬底基板10上依次制作无机膜层20(阻挡层+缓冲层)、栅绝缘层30(例如第一栅绝缘层、第二栅绝缘层和第三栅绝缘层)、层间绝缘层40，在层间绝缘层40上沉积一层Ti/Al/Ti金属膜层，采用一次构图工艺形成位于显示区AA的第一源漏金属层11和位于通孔封装区BB的隔离柱06，接着在第一源漏金属层11背离衬底基板10一侧沉积一层第一钝化膜层21，第一钝化膜层21覆盖通孔封装区BB以保护隔离柱，接着在第一钝化膜层21背离衬底基板10一侧形成第一平坦层31，第一平坦层31在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，接着在第一平坦层31背离衬底基板10一侧形成第二源漏金属层50，接着在第二源漏金属层50背离衬底基板10一侧形成第二平坦层60，接着在第二平坦层60背离衬底基板10一侧形成多层透明走线(未示出)，多层透明走线中的透明走线用于将位于图1中接收孔02和发射孔03内的发光器件阳极与外围驱动电路(例如位于显示区或边框区)电连接，以三层透明走线为例，相邻两层透明走线之间具有平坦层，图10示意出位于第二平坦层60背离衬底基板10一侧依次层叠设置的第三平坦层90、第四平坦层100和第五平坦层110，第二平坦层60、第三平坦层90、第四平坦层100和第五平坦层110在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，第二平坦层60和 第三平坦层90之间具有一层透明走线，第三平坦层90和第四平坦层100之间具有一层透明走线，第四平坦层100和第五平坦层110之间具有一层透明走线，透明走线在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，接着在第五平坦层110背离衬底基板10的一侧沉积一层第二钝化膜层120，接着在第二钝化膜层120背离衬底基板10的一侧涂覆第二光刻胶130，对第二光刻胶130进行曝光显影，对第一钝化膜层21和第二钝化膜层120进行刻蚀，如图11所示，形成第一钝化层21’，第一钝化层21’覆盖通孔封装区BB，且第一钝化层21’在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，第二钝化膜层120完全去除。接着在第五平坦层110背离衬底基板10的一侧蒸镀用于制作阳极的金属膜层70，在金属膜层70上涂覆第一光刻胶80，对第一光刻胶80进行曝光显影，并对金属膜层70进行湿法刻蚀，在显示区AA形成阳极(未示出)，其余区域的金属膜层70去除，即阳极在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠；由于金属膜层70的湿法刻蚀液为稀酸，刻蚀过程中对隔离柱06(Ti/Al/Ti三明治结构)中的Al产生刻蚀，从而形成undercut(底切)结构的隔离柱06，如图12所示，底Ti层用061表示，Al层用062表示，顶Ti层用063表示。因此图10-图12的方案中第一钝化膜层21的设置可以避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题，在透明走线刻蚀完成之后将保护隔离柱06的钝化层去除，然后进行阳极刻蚀，在阳极刻蚀过程中对隔离柱06中的Al层产生刻蚀，从而形成undercut结构的隔离柱06。
需要说明的是，如图11所示，是以形成第五平坦层110，第二钝化膜层120完全去除为例，当然，也可以不设置第五平坦层110，直接采用第二钝化膜层120代替第五平坦层110，第二钝化膜层120在对应显示区AA的位置保留，在对应通孔封装区BB的位置去除。另外，图11是以设置一层第二钝化膜层120来进行第一钝化膜层21的刻蚀，当然也可以不设置第二钝化膜层120，在形成第五平坦层110之后，直接对第一钝化膜层21进行刻蚀。
在具体实施时，在本发明实施例提供的上述显示面板中，如图15和图17 所示，还包括：位于第二源漏金属层50远离衬底基板10一侧的至少一层透明走线层(未示出)，位于透明走线层远离衬底基板10一侧的阳极(未示出)，以及位于透明走线层和阳极之间的第一膜层140；透明走线层在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，阳极在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠；
隔离柱06与第一膜层140同层同材料设置。
在具体实施时，在本发明实施例提供的上述显示面板中，如图15所示，第一膜层140的材料与第一源漏金属层11的材料相同，即第一膜层140的材料为Ti/Al/Ti。具体制作时，如图13所示，在衬底基板10上依次制作无机膜层20(阻挡层+缓冲层)、栅绝缘层30(例如第一栅绝缘层、第二栅绝缘层和第三栅绝缘层)、层间绝缘层40，在层间绝缘层40上沉积一层Ti/Al/Ti金属膜层，采用构图工艺形成位于显示区AA的第一源漏金属层11，接着在第一源漏金属层11背离衬底基板10一侧形成第一平坦层31，第一平坦层31在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，接着在第一平坦层31背离衬底基板10一侧形成第二源漏金属层50，接着在第二源漏金属层50背离衬底基板10一侧形成第二平坦层60，接着在第二平坦层60背离衬底基板10一侧形成多层透明走线(未示出)，多层透明走线中的透明走线用于将位于图1中接收孔02和发射孔03内的发光器件阳极与外围驱动电路(例如位于显示区或边框区)电连接，以三层透明走线为例，相邻两层透明走线之间具有平坦层，图10示意出位于第二平坦层60背离衬底基板10一侧依次层叠设置的第三平坦层90、第四平坦层100和第五平坦层110，第二平坦层60、第三平坦层90、第四平坦层100和第五平坦层110在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，第二平坦层60和第三平坦层90之间具有一层透明走线，第三平坦层90和第四平坦层100之间具有一层透明走线，第四平坦层100和第五平坦层110之间具有一层透明走线，透明走线在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，接着在第五平坦层110背离衬底基板10的一侧沉积一层第一 材料膜层(Ti/Al/Ti)140’，在第一材料膜层140’背离衬底基板10的一侧涂覆第三光刻胶150，对第三光刻胶150进行曝光显影，对第一材料膜层140’进行刻蚀，如图14所示，在AA区形成第一膜层140以及在通孔封装区BB形成隔离柱06。接着在第一膜层140背离衬底基板10的一侧蒸镀用于制作阳极的金属膜层70，在金属膜层70上涂覆第一光刻胶80，对第一光刻胶80进行曝光显影，并对金属膜层70进行湿法刻蚀，在显示区AA形成阳极(未示出)，其余区域的金属膜层70去除，即阳极在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠；由于金属膜层70的湿法刻蚀液为稀酸，刻蚀过程中对隔离柱06(Ti/Al/Ti三明治结构)中的Al产生刻蚀，从而形成undercut(底切)结构的隔离柱06，如图15所示，底Ti层用061表示，Al层用062表示，顶Ti层用063表示。因此图13-图15的方案中在透明走线制作完之后在制作一层材料与第一源漏金属11材料相同的第一膜层140，隔离柱06与第一膜层140同层设置，从而避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题。
具体地，如图6B所示，本公开实施例提供的图1中的发射孔02和接收孔02内的发光器件的阳极通过透明走线300和外围的驱动电路电连接，图6B仅示意一层透明走线300。当然，还可以为2层、3层甚至更多层，当透明走线层为2层、3层甚至更多层时，相邻两层透明走线300之间设置一层平坦层(第三平坦层90、第四平坦层100或第五平坦层110)。
在具体实施时，在本发明实施例提供的上述显示面板中，如图17所示，第一膜层140的材料为负性光阻。图17中隔离柱06的制作过程与图15的制作过程中，区别在于：如图16所示，在第一平坦层31和第一源漏金属层11之间具有第一钝化层21’，第一钝化层21’覆盖通孔封装区BB，且第一钝化层21’在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，在形成第五平坦层110之后，在第五平坦层110背离衬底基板10的一侧涂覆一层负性光阻材料的第二材料膜层160，在第二材料膜层160背离衬底基板10的一侧涂覆第四光刻胶170，对第四光刻胶170进行曝光显影，通过控 制曝光显影条件，如图17所示，在AA区形成材料为负性光阻的第一膜层140以及在通孔封装区BB形成Undercut结构的隔离柱06。图17后续制作阳极的过程与图15相同，在此不做赘述。因此图16-图17的方案中在透明走线制作完之后再制作一层材料为负性光阻的第一膜层140，隔离柱06与第一膜层140同层设置，从而避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题。
在具体实施时，在本发明实施例提供的上述显示面板中，如图18所示，还包括：位于第二源漏金属层50远离衬底基板10一侧的至少一层透明走线层(未示出)，位于透明走线层远离衬底基板10一侧的阳极(未示出)，位于透明走线层和第二源漏金属层50之间的第二平坦层60，以及位于第二源漏金属层50和第二平坦层60之间的负性光阻层180；还包括：位于第一平坦层31和第一源漏金属层11之间的第一钝化层21’，第一钝化层21’覆盖通孔封装区BB，且第一钝化层21’在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠；透明走线层在衬底基板10上的正投影与隔离柱06在衬底基板10上的正投影不交叠，阳极在衬底基板上的正投影与隔离柱06在衬底基板10上的正投影不交叠；
隔离柱06与负性光阻层180同层同材料设置。
在具体实施时，在本发明实施例提供的上述显示面板中，如图18所示，在形成第二源漏金属层50之后，在第二源漏金属层50背离衬底基板的10的一侧涂覆一层负性光阻材料膜层，在负性光阻材料膜层背离衬底基板10的一侧涂覆第五光刻胶，对第五光刻胶进行曝光显影，通过控制曝光显影条件，如图18所示，在AA区形成负性光阻层180以及在通孔封装区BB形成Undercut结构的隔离柱06。然后进行后续的透明走线和阳极制作过程，图18的结构也可以避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题。
需要说明的是，图15中在AA区形成的第一膜层140可以排布走线(例如数据线等)，可以缩小走线的占用面积；图17中在AA区形成的第一膜层140可以起到平坦的作用，图18中在AA区形成的负性光阻层180可以起到 平坦的作用。
具体地，如图12、图15、图17和图18所示，隔离柱06的数量一般设置为3个以上，也可以将隔离柱06减少为两个，隔离柱06减少后，封装层中的有机层材料在喷墨打印时会出现Overflow，因此在隔离柱四周设置隔离槽001，可以在两个隔离柱06之间加一个或2个隔离槽001，当然也可以不设置隔离槽001。具体，衬底基板10可以包括叠层设置的第一柔性衬底、第一阻挡层和第二柔性衬底，第二柔性衬底靠近阻挡层和缓冲层20，隔离槽001可以由贯穿以下膜层形成：层间绝缘层40、第二栅绝缘层700、第一栅绝缘层500、阻挡层和缓冲层20、第二柔性衬底、第一阻挡层、部分的第一柔性衬底，当然不限于此，可以根据实际需要选择贯穿的膜层以形成隔离槽001。
在具体实施时，在本发明实施例提供的上述显示面板中，如图19所示，还包括：位于阳极远离衬底基板10一侧的发光层190，位于发光层190远离衬底基板10一侧的阴极(未示出)，以及位于阴极远离衬底基板10一侧的封装层200；发光层190在隔离柱06的位置处断开；
封装层200包括层叠设置的第一无机层2001、有机层2002和第二无机层2003，其中，第一无机层2001、有机层2002和第二无机层2003在衬底基板10上的正投影均覆盖显示区AA和通孔封装区BB。
在具体实施时，在本公开实施例提供的上述显示面板中，还可以包括本领域技术人员熟知的其它功能性膜层，例如有源层、第栅极层、第二栅极层、第三栅极层，以及位于封装层背离衬底基板一侧的触控层、盖板等。
基于同一发明构思，本公开实施例还提供了一种用于制作上述显示面板的制作方法，包括：
提供衬底基板，衬底基板具有显示区、通孔区以及位于显示区和通孔区之间的通孔封装区；
在衬底基板的显示区一侧形成第一源漏金属层；
在第一源漏金属层远离衬底基板的一侧形成第二源漏金属层；
在衬底基板的通孔封装区一侧形成围绕通孔区设置的至少一个隔离柱， 隔离柱与第二源漏金属层异层设置；
对通孔区进行切割，以便形成通孔。
在具体实施时，在本发明实施例提供的上述制作方法中，在衬底基板的通孔封装区一侧形成围绕通孔区设置的至少一个隔离柱，具体包括：
通过一次构图工艺在显示区形成第一源漏金属层以及在通孔封装区形成隔离柱。
在具体实施时，在本发明实施例提供的上述制作方法中，在形成第一源漏金属层之后，且在形成第二源漏金属层之前，还包括：形成第一钝化膜层和第一平坦膜层，并对第一平坦膜层进行构图形成第一平坦层；第一平坦层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠；
在形成第二源漏金属层之后，还包括：
形成至少一层透明走线层；透明走线层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠；
在透明走线层远离衬底基板的一侧形成第二钝化膜层；
采用一次构图工艺对第一钝化膜层和第二钝化膜层进行构图，形成第一钝化层以及第二钝化膜层完全去除；第一钝化层覆盖通孔封装区，且第一钝化层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠；或，采用一次构图工艺对第一钝化膜层和第二钝化膜层进行构图，形成第一钝化层和第二钝化层；第一钝化层覆盖通孔封装区，且第一钝化层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠，第二钝化层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠。
在具体实施时，在本发明实施例提供的上述制作方法中，在形成第一源漏金属层之后，且在形成第二源漏金属层之前，还包括：形成第一平坦层；第一平坦层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠；
在形成第二源漏金属层之后，还包括：形成至少一层透明走线层；透明走线层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠；
在衬底基板的通孔封装区一侧形成围绕通孔区设置的至少一个隔离柱， 具体包括：
在透明走线层背离衬底基板的一侧形成与第一源漏金属层的材料相同的第一材料膜层；
对第一材料膜层进行构图，形成位于显示区的第一膜层以及位于通孔封装区的隔离柱。
在具体实施时，在本发明实施例提供的上述制作方法中，在形成第一源漏金属层之后，且在形成第二源漏金属层之前，还包括：形成第一钝化层和第一平坦层；第一钝化层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠，第一平坦层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠；
在形成第二源漏金属层之后，还包括：形成至少一层透明走线层；透明走线层在衬底基板上的正投影与隔离柱在衬底基板上的正投影不交叠；
在衬底基板的通孔封装区一侧形成围绕通孔区设置的至少一个隔离柱，具体包括：
在透明走线层背离衬底基板的一侧形成材料为负性光阻的第二材料膜层；
对第二材料膜层进行构图，形成位于显示区的第一膜层以及位于通孔封装区的隔离柱。
需要说明的是，本公开实施例提供的上述显示面板的制作方法可以参见前述一种显示面板实施例的显示面板制作过程，在此不做赘述。
基于同一发明构思，本公开实施例还提供了一种显示装置，包括本公开实施例提供的上述任一种显示面板。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述显示面板的实施例，重复之处不再赘述。
本公开实施例提供的一种显示面板、其制作方法及显示装置，通过将隔离柱设置成与第二源漏金属层异层设置，即隔离柱与第二源漏金属层位于不同层，这样可以将隔离柱与第一源漏金属层同层设置，然后在第一源漏金属 层背离衬底基板一侧沉积一层钝化层保护隔离柱，然后进行后续工艺如屏下TOF技术中的多层透明走线的刻蚀，钝化层的设置可以避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题，在透明走线刻蚀完成之后将保护隔离柱的钝化层去除，然后进行阳极刻蚀，在阳极刻蚀过程中对隔离柱中的Al层产生刻蚀，从而形成undercut结构的隔离柱；另外，还可以将隔离柱采用与位于第二源漏金属层背离衬底基板一侧的膜层(例如第三源漏金属层等)同层设置，第三源漏金属层设置成位于多层透明走线背离衬底基板的一侧，即在透明走线刻蚀完之后，在制作第三源漏金属层的同时制作隔离柱，从而也可以避免透明走线刻蚀过程中对隔离柱的Al层产生严重腐蚀的问题，然后进行阳极刻蚀，在阳极刻蚀过程中对隔离柱中的Al层产生刻蚀，从而形成undercut结构的隔离柱。因此本公开实施例提供的显示面板可以避免屏下TOF+AA hole”技术中在透明走线刻蚀过程中对隔离柱产生严重腐蚀以及避免在AA Hole位置形成Bubble的不良问题。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (18)

  1. 一种显示面板，其中，包括：
    衬底基板，所述显示面板具有贯穿所述衬底基板厚度方向的通孔，所述衬底基板具有显示区以及位于所述显示区和所述通孔之间的通孔封装区；
    第一源漏金属层，位于所述衬底基板的一侧；
    第二源漏金属层，位于所述第一源漏金属层远离所述衬底基板的一侧；
    至少一个隔离柱，位于所述衬底基板的一侧，且位于所述通孔封装区，且围绕所述通孔设置；其中，所述隔离柱与所述第二源漏金属层异层设置。
  2. 根据权利要求1所述的显示面板，其中，所述隔离柱与位于所述衬底基板和所述第二源漏金属层之间的至少一个膜层同层同材料设置。
  3. 根据权利要求2所述的显示面板，其中，所述隔离柱与所述第一源漏金属层同层同材料设置。
  4. 根据权利要求3所述的显示面板，其中，还包括：位于所述第二源漏金属层远离所述衬底基板一侧的至少一层透明走线层，以及位于所述透明走线层远离所述衬底基板一侧的阳极；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述阳极在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
  5. 根据权利要求4所述的显示面板，其中，还包括：位于所述第二源漏金属层和所述第一源漏金属层之间的第一钝化层，以及位于所述第一钝化层和所述第二源漏金属层之间的第一平坦层；所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
  6. 根据权利要求5所述的显示面板，其中，还包括：位于所述透明走线层和所述阳极之间的第二钝化层，所述第二钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
  7. 根据权利要求1所述的显示面板，其中，还包括：位于所述第二源漏金属层远离所述衬底基板一侧的至少一层透明走线层，位于所述透明走线层远离所述衬底基板一侧的阳极，以及位于所述透明走线层和所述阳极之间的第一膜层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述阳极在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    所述隔离柱与所述第一膜层同层同材料设置。
  8. 根据权利要求7所述的显示面板，其中，所述第一膜层的材料与所述第一源漏金属层的材料相同，或所述第一膜层的材料为负性光阻。
  9. 根据权利要求1所述的显示面板，其中，还包括：位于所述第二源漏金属层远离所述衬底基板一侧的至少一层透明走线层，位于所述透明走线层远离所述衬底基板一侧的阳极，位于所述透明走线层和所述第二源漏金属层之间的第二平坦层，以及位于所述第二源漏金属层和所述第二平坦层之间的负性光阻层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述阳极在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    所述隔离柱与所述负性光阻层同层同材料设置。
  10. 根据权利要求7-9任一项所述的显示面板，其中，还包括：位于所述第一源漏金属层和所述第二源漏金属层之间的第一平坦层。
  11. 根据权利要求8或9所述的显示面板，其中，当所述隔离柱的材料为负性光阻时，还包括：位于所述第一平坦层和所述第一源漏金属层之间的第一钝化层，所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
  12. 根据权利要求4、7、9任一项所述的显示面板，其中，还包括：位于所述阳极远离所述衬底基板一侧的发光层，位于所述发光层远离所述衬底基板一侧的阴极，以及位于所述阴极远离所述衬底基板一侧的封装层；所述发光层在所述隔离柱的位置处断开；
    所述封装层包括层叠设置的第一无机层、有机层和第二无机层，其中，所述第一无机层、所述有机层和所述第二无机层在所述衬底基板上的正投影均覆盖所述显示区和所述通孔封装区。
  13. 一种显示装置，其中，包括根据权利要求1-12任一项所述的显示面板。
  14. 一种用于制作如权利要求1-12任一项所述的显示面板的制作方法，其中，包括：
    提供衬底基板，所述衬底基板具有显示区、通孔区以及位于所述显示区和所述通孔区之间的通孔封装区；
    在所述衬底基板的一侧形成第一源漏金属层；
    在所述第一源漏金属层远离所述衬底基板的一侧形成第二源漏金属层；
    在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，所述隔离柱与所述第二源漏金属层异层设置；
    对所述通孔区进行切割，以便形成通孔。
  15. 根据权利要求14所述的制作方法，其中，在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，具体包括：
    通过一次构图工艺在所述显示区形成所述第一源漏金属层以及在所述通孔封装区形成所述隔离柱。
  16. 根据权利要求15所述的制作方法，其中，在形成所述第一源漏金属层之后，且在形成所述第二源漏金属层之前，还包括：形成第一钝化膜层和第一平坦膜层，并对所述第一平坦膜层进行构图形成第一平坦层；所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    在形成所述第二源漏金属层之后，还包括：
    形成至少一层透明走线层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    在所述透明走线层远离所述衬底基板的一侧形成第二钝化膜层；
    采用一次构图工艺对所述第一钝化膜层和所述第二钝化膜层进行构图，形成第一钝化层以及所述第二钝化膜层完全去除；所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；或，采用一次构图工艺对所述第一钝化膜层和所述第二钝化膜层进行构图，形成第一钝化层和第二钝化层；所述第一钝化层覆盖所述通孔封装区，且所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述第二钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠。
  17. 根据权利要求14所述的制作方法，其中，在形成所述第一源漏金属层之后，且在形成所述第二源漏金属层之前，还包括：形成第一平坦层；所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    在形成所述第二源漏金属层之后，还包括：形成至少一层透明走线层；所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，具体包括：
    在所述透明走线层背离所述衬底基板的一侧形成与所述第一源漏金属层的材料相同的第一材料膜层；
    对所述第一材料膜层进行构图，形成位于所述显示区的第一膜层以及位于所述通孔封装区的隔离柱。
  18. 根据权利要求14所述的制作方法，其中，在形成所述第一源漏金属层之后，且在形成所述第二源漏金属层之前，还包括：形成第一钝化层和第一平坦层；所述第一钝化层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠，所述第一平坦层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    在形成所述第二源漏金属层之后，还包括：形成至少一层透明走线层； 所述透明走线层在所述衬底基板上的正投影与所述隔离柱在所述衬底基板上的正投影不交叠；
    在所述衬底基板的通孔封装区一侧形成围绕所述通孔区设置的至少一个隔离柱，具体包括：
    在所述透明走线层背离所述衬底基板的一侧形成材料为负性光阻的第二材料膜层；
    对所述第二材料膜层进行构图，形成位于所述显示区的第一膜层以及位于所述通孔封装区的隔离柱。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120062111A1 (en) * 2010-09-14 2012-03-15 Goto Denshi Co., Ltd. Sealing for panels of an organic electroluminescence display and lighting apparatus
CN110676302A (zh) * 2019-11-20 2020-01-10 京东方科技集团股份有限公司 显示面板及其制造方法、显示装置
CN112531002A (zh) * 2020-12-04 2021-03-19 京东方科技集团股份有限公司 电致发光显示基板、显示装置以及制作方法
CN113497089A (zh) * 2020-03-20 2021-10-12 京东方科技集团股份有限公司 阵列基板及其制备方法、显示装置
CN114744015A (zh) * 2022-04-20 2022-07-12 合肥京东方卓印科技有限公司 显示基板和显示装置
CN217035640U (zh) * 2021-10-27 2022-07-22 京东方科技集团股份有限公司 一种显示面板及显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120062111A1 (en) * 2010-09-14 2012-03-15 Goto Denshi Co., Ltd. Sealing for panels of an organic electroluminescence display and lighting apparatus
CN110676302A (zh) * 2019-11-20 2020-01-10 京东方科技集团股份有限公司 显示面板及其制造方法、显示装置
CN113497089A (zh) * 2020-03-20 2021-10-12 京东方科技集团股份有限公司 阵列基板及其制备方法、显示装置
CN112531002A (zh) * 2020-12-04 2021-03-19 京东方科技集团股份有限公司 电致发光显示基板、显示装置以及制作方法
CN217035640U (zh) * 2021-10-27 2022-07-22 京东方科技集团股份有限公司 一种显示面板及显示装置
CN114744015A (zh) * 2022-04-20 2022-07-12 合肥京东方卓印科技有限公司 显示基板和显示装置

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