WO2023063046A1 - 窒化物半導体基板及びその製造方法 - Google Patents

窒化物半導体基板及びその製造方法 Download PDF

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WO2023063046A1
WO2023063046A1 PCT/JP2022/035314 JP2022035314W WO2023063046A1 WO 2023063046 A1 WO2023063046 A1 WO 2023063046A1 JP 2022035314 W JP2022035314 W JP 2022035314W WO 2023063046 A1 WO2023063046 A1 WO 2023063046A1
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layer
substrate
crystal silicon
nitride semiconductor
single crystal
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French (fr)
Japanese (ja)
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一平 久保埜
和徳 萩本
康 水澤
達夫 阿部
寿樹 松原
温 鈴木
剛 大槻
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信越半導体株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy

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  • the present invention relates to a nitride semiconductor substrate and its manufacturing method.
  • the MOCVD method which is one of the semiconductor thin film manufacturing methods, is widely used because it is excellent in large diameter and mass production, and can form homogeneous thin film crystals.
  • Nitride semiconductors typified by GaN are expected to be next-generation semiconductor materials that surpass the limitations of Si (silicon) as a material.
  • GaN has a high saturation electron velocity, making it possible to fabricate devices that can operate at high frequencies, and since it also has a large breakdown electric field, it can operate at high output. In addition, weight reduction, miniaturization, and low power consumption can be expected. In recent years, GaN HEMTs that can operate at high frequencies and high power have been attracting attention due to the demand for higher communication speeds, as typified by 5G, and higher power.
  • Si substrates are the cheapest and advantageous for increasing the diameter. SiC substrates are also used because of their high thermal conductivity and good heat dissipation. However, since these substrates have different coefficients of thermal expansion from GaN, stress is applied in the cooling process after the epitaxial film formation, and cracks are likely to occur. In addition, the application of strong stress may cause wafer cracking during the device process. In addition, it is impossible to form a thick GaN film, and even if a complicated stress relaxation layer is formed in the epitaxial layer, the crack-free thickness is at most about 5 ⁇ m.
  • the GaN substrate has the same (or very close to) thermal expansion coefficient as the GaN epitaxial layer, the above-mentioned problems are less likely to occur. It is not suitable for mass production because substrates with large diameters cannot be produced.
  • Patent Document 1 discloses a large-diameter substrate for GaN epitaxial use (hereinafter referred to as a support substrate for GaN) having a large diameter and a coefficient of thermal expansion close to that of GaN.
  • This support substrate for GaN comprises a support structure including a polycrystalline ceramic core, a first adhesion layer, a conductive layer, a second adhesion layer, and a barrier layer; It is composed of a single crystal silicon layer laminated on a silicon layer.
  • this growth supporting substrate By using this growth supporting substrate, a nitride semiconductor substrate having a large diameter, a thick epitaxial layer, and no cracks can be produced.
  • the difference in thermal expansion coefficient from GaN is extremely small, warping is less likely to occur during GaN growth and cooling. Since there is no need to provide a layer, the epitaxial film formation time is shortened, and the cost of epitaxial growth can be greatly reduced.
  • the substrate since most of the growth support substrate is made of ceramics, the substrate itself is very hard and resistant to plastic deformation.
  • GaN on Si devices used for high-frequency applications use high-resistance single-crystal silicon substrates.
  • Al and Ga diffuse into the single crystal silicon substrate, and the surface layer of the single crystal silicon substrate (near the interface with the nitride semiconductor epitaxial layer) has a low resistance, resulting in deterioration of high-frequency characteristics.
  • the surface layer of the GaN support substrate is also a single-crystal silicon layer, when used for high-frequency applications, Al and Ga are diffused into the single-crystal silicon layer during the growth of AlN, AlGaN, GaN, etc., resulting in similar high-frequency loss. problem occurs.
  • the present invention has been made to solve the above problems, and is a nitride semiconductor in which Al is diffused into a single-crystal silicon layer during the growth of the nitride semiconductor to lower the resistivity, thereby suppressing deterioration of high-frequency characteristics.
  • An object of the present invention is to provide a semiconductor substrate and a method for manufacturing the same.
  • a nitride comprising a growth substrate in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers are laminated, and a nitride semiconductor thin film formed on the single crystal silicon layer of the growth substrate A semiconductor substrate, A nitride semiconductor substrate is provided, wherein the single crystal silicon layer has a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
  • the carbon concentration of the single crystal silicon layer is 5E17 atoms/cm 3 or more, the diffusion of Al and Ga into the single crystal silicon layer can be suppressed, and the resistance of the single crystal silicon layer can be suppressed from decreasing.
  • the carbon concentration of the single crystal silicon layer is 1E22 atoms/cm 3 or less, deterioration of crystallinity can be prevented, so that the substrate can have good crystallinity. As a result, it is possible to provide a nitride semiconductor substrate with good high frequency characteristics.
  • the nitride semiconductor thin film preferably contains one or more of GaN, AlN, and AlGaN.
  • the single crystal silicon layer has a thickness of 100 to 500 nm, and the total thickness of the nitride semiconductor thin film is 2 ⁇ m or more and 10 ⁇ m or less.
  • the single crystal silicon layer and the nitride semiconductor thin film can have such thicknesses.
  • the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated over the entire polycrystalline ceramic core, a second adhesive layer laminated over the first adhesive layer, and the second adhesive layer laminated over the entire first adhesive layer. a barrier layer laminated over the adhesive layer of 2, and It is preferable that the single-crystal silicon layer is formed on a planarization layer laminated only on one side of the composite substrate.
  • the composite substrate may have, between the first adhesive layer and the second adhesive layer, a conductive layer laminated over the entire first adhesive layer.
  • the composite substrate can be given conductivity as needed.
  • the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated on the entire polycrystalline ceramic core, a barrier layer laminated on the entire first adhesive layer, and a rear surface of the barrier layer. and a conductive layer laminated to the back surface of the second adhesive layer, and Preferably, the single-crystal silicon layer is formed on a planarization layer laminated on the surface of the barrier layer of the composite substrate.
  • a nitride semiconductor substrate using such a growth substrate does not generate a leak path due to the surface-side conductive layer of the growth substrate, and can have excellent high-frequency characteristics.
  • the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated over the entire polycrystalline ceramic core, a conductive layer laminated on the back surface of the first adhesive layer, and the conductive layer.
  • the single-crystal silicon layer is formed on a planarization layer laminated on the surface of the barrier layer of the composite substrate.
  • the conductive layer preferably includes a polysilicon layer.
  • the conductive layer can be such a layer.
  • the polycrystalline ceramic core preferably contains aluminum nitride.
  • the difference in thermal expansion coefficient from the nitride semiconductor can be made extremely small.
  • the first adhesive layer and the second adhesive layer include a tetraethylorthosilicate (TEOS) layer or a silicon oxide (SiO 2 ) layer, and the barrier layer includes silicon nitride.
  • TEOS tetraethylorthosilicate
  • SiO 2 silicon oxide
  • the first adhesive layer, the second adhesive layer, and the barrier layer can be such layers.
  • the planarization layer preferably contains tetraethylorthosilicate (TEOS) or silicon oxide (SiO 2 ) and has a thickness of 500 to 3000 nm.
  • TEOS tetraethylorthosilicate
  • SiO 2 silicon oxide
  • the planarization layer can be such a layer.
  • a method for manufacturing a nitride semiconductor substrate comprising a growth substrate and a nitride semiconductor thin film formed on the growth substrate, comprising: (1) forming a single crystal silicon layer having a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less on a composite substrate in which a plurality of layers are laminated to prepare a growth substrate; ) A method for manufacturing a nitride semiconductor substrate, comprising the step of epitaxially growing the nitride semiconductor thin film on the single crystal silicon layer of the growth substrate to manufacture the nitride semiconductor substrate.
  • a method for manufacturing a nitride semiconductor substrate using a growth substrate having a single crystal silicon layer with a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less is used, a nitride semiconductor having good high frequency characteristics can be produced relatively easily.
  • a substrate can be manufactured.
  • the step (1) is (1-1)
  • the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated over the polycrystalline ceramic core, and a second adhesive layer laminated over the first adhesive layer. and a barrier layer laminated over the second adhesive layer; (1-2) a step of laminating a planarization layer only on one side of the composite substrate; and (1-3) the planarization layer has a thickness of 100 to 500 nm and is 5E17 atoms/cm 3 or more;
  • the step preferably includes a step of forming a single crystal silicon layer by bonding a donor substrate having a single crystal silicon layer doped with carbon at a concentration of 1E22 atoms/cm 3 or less.
  • the substrate for growth is made of ceramics, the substrate itself is very hard and resistant to plastic deformation. can be manufactured to
  • the composite substrate has a conductive layer laminated on the entire first adhesive layer between the first adhesive layer and the second adhesive layer.
  • the composite substrate can be given conductivity as needed.
  • the step (1) is (1-1) As the composite substrate, a polycrystalline ceramic core, a first adhesive layer laminated over the entire polycrystalline ceramic core, a barrier layer laminated over the entire first adhesive layer, and the barrier providing a composite substrate comprising a second adhesive layer laminated to the backside of a layer and a conductive layer laminated to the backside of the second adhesive layer; (1-2) a step of laminating a planarization layer on the surface of the barrier layer of the composite substrate; and (1-3) the planarization layer has a thickness of 100 to 500 nm and 5E17 atoms/cm
  • the step preferably includes a step of forming a single crystal silicon layer by bonding a donor substrate having a single crystal silicon layer doped with carbon at a concentration of 3 or more and 1E22 atoms/cm 3 or less.
  • the step (1) is (1-1) As the composite substrate, a polycrystalline ceramic core, a first adhesive layer laminated over the entire polycrystalline ceramic core, a conductive layer laminated on the rear surface of the first adhesive layer, and the A second adhesive layer laminated on the back surface of the conductive layer, a barrier layer laminated on the front and side surfaces of the first adhesive layer, the side surfaces of the conductive layer, and the side and back surfaces of the second adhesive layer.
  • the step preferably includes a step of forming a single crystal silicon layer by bonding a donor substrate having a single crystal silicon layer doped with carbon at a concentration of 3 or more and 1E22 atoms/cm 3 or less.
  • the carbon-doped single crystal silicon thin film of the donor substrate is processed to have a desired thickness to form a single crystal silicon layer having a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less. It is preferable that the process includes a forming process.
  • a donor substrate having a single-crystal silicon thin film with a high carbon concentration be relatively easily and reliably manufactured, but also a single-crystal silicon layer having a desired thickness can be easily formed on the planarizing layer. can do.
  • Al and Ga are diffused into the single-crystal silicon layer during the growth of the nitride semiconductor to lower the resistivity, thereby suppressing the deterioration of the high-frequency characteristics of the nitride semiconductor substrate. and a method for producing the same.
  • FIG. 4 is a schematic diagram showing another example of the growth substrate used in the present invention.
  • FIG. 4 is a schematic diagram showing still another example of the growth substrate used in the present invention.
  • the inventors of the present invention conducted repeated studies on a method for suppressing the deterioration of high-frequency characteristics due to the diffusion of Al and Ga into the single crystal silicon layer during the growth of GaN, resulting in a low resistivity.
  • the carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less the diffusion of Al and Ga into the single crystal silicon layer can be suppressed, and the resistance of the single crystal silicon layer can be suppressed from decreasing. It was found that a nitride semiconductor substrate having good high-frequency characteristics can be obtained by combining a substrate with good crystallinity and a carbon diffusion barrier, and the present invention has been completed.
  • the present invention provides a growth substrate in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers are laminated, and a nitride semiconductor thin film formed on the single crystal silicon layer of the growth substrate.
  • the single crystal silicon layer has a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
  • the present invention also provides a method for manufacturing a nitride semiconductor substrate comprising a growth substrate and a nitride semiconductor thin film formed on the growth substrate, comprising: (1) a composite in which a plurality of layers are laminated; forming a single crystal silicon layer having a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less on a substrate to fabricate a growth substrate; and (2) the single crystal silicon layer of the growth substrate.
  • a method for manufacturing a nitride semiconductor substrate comprising the step of epitaxially growing the nitride semiconductor thin film thereon to manufacture a nitride semiconductor substrate.
  • the nitride semiconductor substrate of the present invention includes, for example, a growth substrate 100 in which a single crystal silicon layer 7 is formed on a composite substrate 200 in which a plurality of layers are laminated as shown in FIG. and a nitride semiconductor thin film 8 formed on the single crystal silicon layer 7, wherein the carbon concentration of the single crystal silicon layer 7 is 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
  • the carbon concentration of the single-crystal silicon layer 7 is 5E17 atoms/cm 3 or more, the diffusion of Al and Ga into the single-crystal silicon layer 7 is suppressed, and the resistance of the single-crystal silicon layer 7 is suppressed. can do things Further, if the carbon concentration of the single-crystal silicon layer 7 is 1E22 atoms/cm 3 or less, deterioration of crystallinity can be prevented, and a substrate with good crystallinity can be obtained. As a result, it is possible to provide a nitride semiconductor substrate with good high frequency characteristics.
  • the carbon concentration of the single crystal silicon layer 7 is preferably 1E18 atoms/cm 3 or more.
  • Substrate for growth As shown in FIG. A composite substrate 200 (support structure), a planarization layer 6 laminated only on one side of the composite substrate 200, and a single crystal silicon layer 7 (substantially single crystal silicon layer) having the above carbon concentration laminated on the planarization layer 6. be.
  • the conductive layer 3 and the first adhesive layer 2 are formed as necessary, and are not necessarily present, and may be formed only on one side.
  • the polycrystalline ceramic core 1 contains aluminum nitride, is sintered at a high temperature of, for example, 1800 degrees with a sintering aid, and has a thickness of about 600-1150 ⁇ m. Basically, it is often formed with a thickness of the SEMI standard for the silicon substrate.
  • the first adhesion layer 2 and the second adhesion layer 4 are layers including a tetraethylorthosilicate (TEOS) layer, a silicon oxide ( SiO2 ) layer, or both, and are deposited by an LPCVD process, a CVD process, or the like. It has a thickness of 50-200 nm.
  • TEOS tetraethylorthosilicate
  • SiO2 silicon oxide
  • the conductive layer 3 contains polysilicon, is deposited by an LPCVD process or the like, and has a thickness of about 150-500 nm. This is a layer for imparting electrical conductivity, and is doped with, for example, boron (B) or phosphorus (P).
  • the conductive layer 3 containing polysilicon is provided as required, and may be omitted or may be formed only on one side.
  • the barrier layer 5 includes a silicon nitride layer, is deposited by an LPCVD process or the like, and has a thickness of, for example, 100-1000 nm.
  • the planarization layer 6 is deposited by an LPCVD process or the like, and has a thickness of approximately 500 to 3000 nm.
  • This planarization layer 6 is deposited for planarization of the top surface and preferably comprises tetraethylorthosilicate (TEOS) or silicon oxide ( SiO2 ), but also SiO2 , Al2O3 , Si3N4 , or Ordinary ceramic film materials such as silicon oxynitride (Si x O y N z ) may be used.
  • the single crystal silicon layer 7 has a thickness of, for example, about 100 to 500 nm and is a layer used as a growth surface for epitaxial growth of other materials such as GaN. is spliced to As described above, the monocrystalline silicon layer 7 is doped with carbon at a predetermined concentration.
  • each layer the manufacturing method, the materials used, etc. are not limited to those described above, and all layers do not necessarily need to be present.
  • a composite substrate comprising a barrier layer 5 bonded over the adhesive layer, a second adhesive layer 4 bonded to the back surface of said barrier layer, and a conductive layer 3 bonded to the back surface of said second adhesive layer. , a planarization layer 6 bonded only to the surface of said composite substrate, and a monocrystalline silicon layer 7 bonded to said planarization layer.
  • a conductive layer 3 bonded to the back surface of the adhesive layer of the second adhesive layer 4 bonded to the back surface of the conductive layer; the front and side surfaces of the first adhesive layer; the side surfaces of the conductive layer; 2, a planarization layer 6 bonded only to the surface of said composite substrate, and a monocrystalline silicon layer bonded to said planarization layer. 7.
  • the nitride semiconductor thin film 8 formed on the single crystal silicon layer 7 of the nitride semiconductor thin film growth substrate 100 is not particularly limited, but may contain, for example, one or more of GaN, AlN, and AlGaN. .
  • the nitride semiconductor thin film can be an epitaxially grown layer of AlN, AlGaN, GaN, or the like, but the structure of the epitaxial layer is not limited to this. sometimes. In some cases, multiple layers of AlGaN with different Al compositions are deposited.
  • a device layer can be provided on the surface layer side of the epitaxial layer.
  • the device layer can have a structure comprising a highly crystalline layer (channel layer) for generating a two-dimensional electron gas, a layer (barrier layer) for generating a two-dimensional electron gas, and a cap layer as the outermost layer.
  • the channel layer can be, for example, a GaN layer, but is not limited to this.
  • AlGaN with an Al composition of about 20% can be used for the barrier layer, but, for example, InGaN or the like can also be used, and the material is not limited to this.
  • the Cap layer can be, for example, a GaN layer or a SiN layer, but is not limited to this.
  • the thickness of these device layers and the Al composition of the barrier layer can be changed according to the design of the device.
  • the thickness of the nitride semiconductor thin film is not particularly limited because it changes depending on the application, but the total thickness of the nitride semiconductor thin film is preferably 2 ⁇ m or more and 10 ⁇ m or less.
  • the nitride semiconductor substrate of the present invention described above can be manufactured as follows. A method for manufacturing a nitride semiconductor substrate according to the present invention will be described below.
  • the step (1) is a step of forming a single crystal silicon layer having a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less on a composite substrate having a plurality of layers laminated to manufacture a growth substrate.
  • Embodiments of step (1) include the following first, second, and third aspects.
  • the first aspect of the first aspect step (1) can be a step including the following steps (1-1) to (1-3).
  • the step (1-1) includes a composite substrate including a polycrystalline ceramic core, a first adhesive layer laminated over the polycrystalline ceramic core, and a second adhesive laminated over the first adhesive layer. providing a composite substrate including a layer and a barrier layer laminated over the second adhesive layer.
  • the composite substrate prepared here may be the one described above.
  • Step (1-2) is a step of laminating a planarizing layer only on one side of the composite substrate.
  • the planarization layer may be deposited using the materials and methods described above.
  • the planarizing layer includes a single-crystal silicon layer having a thickness of 100 to 500 nm and being doped with carbon at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
  • This is a step of forming a single crystal silicon layer by bonding the substrates together.
  • the step (1-3) can be a step including the following steps (1-3-1) to (1-3-3).
  • the step (1-3-1) is a step of forming a carbon-doped single-crystal silicon thin film on a single-crystal silicon substrate by a CVD method to produce a donor substrate. More specifically, the donor substrate can be produced as follows.
  • a single crystal silicon substrate is prepared, and a single crystal silicon thin film (layer) with a high carbon concentration is deposited on the single crystal silicon substrate using a CVD film deposition device.
  • Monomethylsilane or trimethylsilane is used as a carbon source for the raw material gas used for film formation.
  • Dichlorosilane or monosilane is used as the silicon source.
  • the raw material gas is not limited to this.
  • the film formation temperature can be, for example, 600 to 1200° C., but is not limited to this.
  • the concentration of carbon with which the silicon layer is doped can be adjusted by the flow rate of the raw material gas and the film formation temperature.
  • the thickness of the single-crystal silicon thin film to be deposited can be controlled by the film-forming time or the like, and is not limited to a thicker one. be.
  • the conductivity type of the donor substrate manufactured in this step may be non-doped, n-type, or p-type, but is preferably an n-type single crystal silicon substrate.
  • Step (1-3-2) is a step of bonding the carbon-doped single-crystal silicon thin film of the donor substrate to the planarization layer.
  • the substrate used as the donor substrate is a single crystal silicon substrate having a single crystal silicon thin film formed on the surface produced in the above step (1-3-1). Bonding is performed so as to be in contact with the planarization layer on the composite substrate.
  • step (1-3-3) the single crystal silicon substrate of the donor substrate is removed, and the carbon-doped single crystal silicon thin film of the donor substrate is processed to a desired thickness so that the carbon concentration is 5E17 atoms. /cm 3 or more and 1E22 atoms/cm 3 or less.
  • the single crystal silicon substrate and the unnecessary single crystal silicon thin film were separated and left while leaving the carbon-doped single crystal silicon thin film with the desired thickness.
  • the surface of the single crystal silicon thin film is polished to improve flatness.
  • a known technique such as a hydrogen ion implantation delamination method may be used.
  • the thickness of the high-carbon-concentration single-crystal silicon layer of the surface layer of the growth substrate formed on the flattening layer in this step is preferably 100 to 500 nm. As described above, a deposition substrate can be manufactured.
  • the second aspect of the second aspect step (1) can be a step including the following steps (1-1) to (1-3).
  • the step (1-1) comprises a composite substrate comprising a polycrystalline ceramic core, a first adhesive layer laminated over the polycrystalline ceramic core, a barrier layer laminated over the first adhesive layer, A step of preparing a composite substrate including a second adhesive layer laminated on the back surface of the barrier layer and a conductive layer laminated on the back surface of the second adhesive layer.
  • the composite substrate prepared here may be the one described above.
  • Step (1-2) is a step of laminating a planarization layer on the surface of the barrier layer of the composite substrate.
  • the planarization layer may be deposited using the materials and methods described above.
  • the planarizing layer includes a single-crystal silicon layer having a thickness of 100 to 500 nm and being doped with carbon at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
  • This is a step of forming a single crystal silicon layer by bonding the substrates together.
  • Step (1-3) may be performed in the same manner as in the first aspect.
  • the third aspect of the third aspect step (1) can be a step including the following steps (1-1) to (1-3).
  • the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated over the entire polycrystalline ceramic core, and a conductive layer laminated on the back surface of the first adhesive layer. a second adhesive layer laminated on the back surface of the conductive layer; a barrier layer laminated on the front and side surfaces of the first adhesive layer, the side surfaces of the conductive layer, and the side surfaces and the back surface of the second adhesive layer; It is a step of preparing a composite substrate including The composite substrate prepared here may be the one described above.
  • Step (1-2) is a step of laminating a planarization layer on the surface of the barrier layer of the composite substrate.
  • the planarization layer may be deposited using the materials and methods described above.
  • the planarizing layer includes a single-crystal silicon layer having a thickness of 100 to 500 nm and being doped with carbon at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
  • This is a step of forming a single crystal silicon layer by bonding the substrates together.
  • Step (1-3) may be performed in the same manner as in the first aspect.
  • Step (2) is a step of epitaxially growing a nitride semiconductor thin film on the single crystal silicon layer of the growth substrate to manufacture a nitride semiconductor substrate.
  • a nitride semiconductor thin film such as AlN, AlGaN and GaN is formed on the single crystal silicon layer having a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less in the growth substrate produced in step (1).
  • the nitride semiconductor thin film as described above can be epitaxially grown.
  • TMAl can be used as an Al source
  • TMGa can be used as a Ga source
  • NH3 can be used as an N source.
  • the carrier gas can be N 2 and H 2 or any of them, and the process temperature can be about 900-1200.degree.
  • a nitride semiconductor substrate can be manufactured by depositing a nitride semiconductor thin film as described above.
  • Example 2 A single crystal silicon substrate was prepared, and a high carbon concentration single crystal silicon thin film was formed on the single crystal silicon substrate in a CVD deposition furnace.
  • the material gas used for film formation trimethylsilane was used as the carbon source and dichlorosilane was used as the silicon source.
  • the deposition temperature of the high carbon concentration single crystal silicon layer was set to 1130.degree.
  • a single crystal silicon thin film with a high carbon concentration of 2 ⁇ m was formed by controlling the film thickness depending on the film formation time.
  • the concentration of carbon to be doped into the single-crystal silicon thin film with a high carbon concentration was set to the following eight levels by adjusting the flow rate of the raw material gas and the film formation temperature. ⁇ 5E17 atoms/ cm3 ⁇ 2E18 atoms/ cm3 ⁇ 7E18 atoms/ cm3 ⁇ 2E19 atoms/ cm3 ⁇ 2E20 atoms/ cm3 ⁇ 4E20 atoms/ cm3 ⁇ 2E21 atoms/ cm3 ⁇ 4E21 atoms/ cm3
  • the substrate for growth includes a polycrystalline ceramic core (aluminum nitride core), a first adhesion layer (silicon oxide layer) laminated over the entire polycrystalline ceramic core, and a conductive layer ( a support structure comprising a polysilicon layer), a second adhesion layer (silicon oxide layer) laminated over the conductive layer, and a barrier layer (silicon nitride layer) laminated over the second adhesion layer;
  • a planarization layer (silicon oxide layer) was constructed which was laminated to only one side of the support structure.
  • each of the single crystal silicon substrates on which the eight levels of high carbon concentration single crystal silicon thin films were formed was bonded to the flattening layer as a donor substrate.
  • hydrogen ions were implanted from the surface of the single crystal thin film in advance, and then the flattening layer and the high carbon concentration single crystal silicon thin film were bonded together so as to be in contact with each other.
  • the ion-implanted layer was peeled off, leaving a single-crystal silicon thin film with a high carbon concentration of 450 nm.
  • polishing was performed so that the high-carbon-concentration single-crystal silicon thin film had a thickness of 300 nm, thereby forming a single-crystal silicon layer on the surface of the substrate for growth.
  • a growth substrate was produced as described above.
  • This growth substrate was placed in an MOCVD reactor, and group III nitride semiconductor thin films such as AlN, AlGaN and GaN were epitaxially grown on the growth substrate.
  • a growth substrate was placed in a wafer pocket called a satellite.
  • TMAl was used as an Al source
  • TMGa was used as a Ga source
  • NH3 was used as an N source.
  • Both N2 and H2 were used as the carrier gas.
  • the process temperature was about 900-1200°C.
  • AlN and AlGaN were deposited in order from the substrate side toward the growth direction, and then GaN was epitaxially grown.
  • a device layer was provided on the surface layer side of the epitaxial layer.
  • the device layer consists of a highly crystalline GaN layer (channel layer) of about 400 nm for generating a two-dimensional electron gas, a layer (barrier layer) for generating a two-dimensional electron gas of about 20 nm, and a cap of about 3 nm on the outermost layer. It has a layered structure. AlGaN with an Al composition of 20% was used for the barrier layer. A GaN layer was used as the cap layer. Moreover, the thickness of these device layers and the Al composition of the barrier layer are not limited to these, since they are changed depending on the design of the device.
  • the total film thickness of the epitaxial layers including the device layer was set to 3.5 ⁇ m.
  • Comparative example 1 Except that a single crystal silicon substrate on which a single crystal silicon thin film with a high carbon concentration was not formed was used as a donor substrate in the step of bonding the outermost single crystal silicon layer in the process of manufacturing the growth substrate of the example.
  • a nitride semiconductor substrate was produced by epitaxially growing a nitride semiconductor thin film in the same manner as in the example.
  • the secondary harmonic characteristics of the produced nitride semiconductor substrate were evaluated by the same method as in the example. Also, the concentration of Al diffused into the single crystal silicon layer of the growth substrate was measured by the same method as in the example. Results are shown in FIGS.
  • each of the single crystal silicon substrates having the following two levels of carbon concentration in the single crystal silicon thin film was used as the donor substrate.
  • a nitride semiconductor substrate was fabricated by epitaxially growing a nitride semiconductor thin film in the same manner as in Example except for the above. ⁇ 4E16 atoms/ cm3 ⁇ 1E17 atoms/ cm3
  • the carbon concentration of the single-crystal silicon layer, which is the growth surface of the nitride semiconductor thin film is set to 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less, so that the second harmonic characteristics are improved. It's getting better.
  • Comparative Example 1 in which the single crystal silicon layer, which is the growth surface of the nitride semiconductor thin film, was not doped with carbon
  • Comparative Example 2 in which the carbon concentration of the single crystal silicon layer was less than 5E17 atoms/cm 3 good 2 Order harmonic characteristics are not obtained.
  • Al is diffused into the single-crystal silicon layer during the growth of the nitride semiconductor to lower the resistivity, thereby deteriorating the high-frequency characteristics. was found to be able to be suppressed.
  • the present invention is not limited to the above embodiments.
  • the above-described embodiment is an example, and any device having substantially the same configuration as the technical idea described in the claims of the present invention and exhibiting the same effect is the present invention. included in the technical scope of

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JP2013080776A (ja) * 2011-10-03 2013-05-02 Covalent Materials Corp 窒化物半導体基板
JP2014229872A (ja) * 2013-05-27 2014-12-08 シャープ株式会社 窒化物半導体エピタキシャルウェハ
JP2019523994A (ja) * 2016-06-14 2019-08-29 クロミス，インコーポレイテッド 電力およびｒｆ用途用の設計された基板構造
JP2020184616A (ja) * 2019-05-03 2020-11-12 世界先進積體電路股▲ふん▼有限公司 基板およびその形成方法
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JP2005203666A (ja) * 2004-01-19 2005-07-28 Kansai Electric Power Co Inc:The 化合物半導体デバイスの製造方法
JP2006196713A (ja) * 2005-01-13 2006-07-27 National Institute Of Advanced Industrial & Technology 半導体装置及びその作製方法並びに重水素処理装置
JP2012151401A (ja) * 2011-01-21 2012-08-09 Sumco Corp 半導体基板及びその製造方法
JP2013080776A (ja) * 2011-10-03 2013-05-02 Covalent Materials Corp 窒化物半導体基板
JP2014229872A (ja) * 2013-05-27 2014-12-08 シャープ株式会社 窒化物半導体エピタキシャルウェハ
JP2019523994A (ja) * 2016-06-14 2019-08-29 クロミス，インコーポレイテッド 電力およびｒｆ用途用の設計された基板構造
JP2020184616A (ja) * 2019-05-03 2020-11-12 世界先進積體電路股▲ふん▼有限公司 基板およびその形成方法
WO2022181163A1 (ja) * 2021-02-26 2022-09-01 信越半導体株式会社 窒化物半導体基板およびその製造方法

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