WO2023051598A1 - 半导体工艺设备及其阻抗匹配方法 - Google Patents

半导体工艺设备及其阻抗匹配方法 Download PDF

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Publication number
WO2023051598A1
WO2023051598A1 PCT/CN2022/122085 CN2022122085W WO2023051598A1 WO 2023051598 A1 WO2023051598 A1 WO 2023051598A1 CN 2022122085 W CN2022122085 W CN 2022122085W WO 2023051598 A1 WO2023051598 A1 WO 2023051598A1
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Prior art keywords
parameter
impedance matching
parameter adjustment
adjustment bit
impedance
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PCT/CN2022/122085
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English (en)
French (fr)
Inventor
李文庆
韦刚
杨京
蒋书棋
张迪
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北京北方华创微电子装备有限公司
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Priority to KR1020247007747A priority Critical patent/KR20240042647A/ko
Publication of WO2023051598A1 publication Critical patent/WO2023051598A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32174—Circuits specially adapted for controlling the RF discharge
    • H01J37/32183—Matching circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks
    • H03H7/40—Automatic matching of load impedance to source impedance

Definitions

  • the present application relates to the field of semiconductor technology, in particular to a semiconductor process equipment and an impedance matching method thereof.
  • Inductively coupled plasma sources are used in etching, thin film deposition, ion implantation and doping in the field of semiconductor process equipment manufacturing.
  • the main principle of the inductively coupled plasma source is: RF current flows through the inductively coupled coil, thereby generating an electromagnetic field in the reaction chamber, and the electromagnetic field excites the reaction chamber.
  • the injected gas generates plasma, and the bias source controls the ion bombardment energy to accelerate the plasma to reach the wafer to achieve etching.
  • the wafer is fixed on the electrostatic chuck through electrostatic adsorption.
  • the output impedance of the radio frequency power supply is generally 50 ohms, while the equivalent impedance of the plasma reaction chamber is generally not 50 ohms, and under different process conditions, the plasma reaction chamber The equivalent impedances are also different from each other.
  • the transmission line theory points out that when the output impedance of the RF power supply is different from the load impedance (that is, the equivalent impedance of the plasma reaction chamber), the output power of the RF power supply will be lost, and the output efficiency cannot be maximized, resulting in energy waste and damage to the The radio frequency power source itself causes damage, and even causes safety problems such as local overheating and fire.
  • the matching device can change the actual value of the parameter adjustable device (such as an adjustable capacitor) through the built-in sensor and control system of the impedance matching device, so that the load impedance is equal to 50 ohms, to achieve impedance matching to avoid the above problems.
  • the parameter adjustable device such as an adjustable capacitor
  • the existing impedance matcher usually works as follows: the sensor inside the impedance matcher will monitor the current impedance value in the circuit in real time, when the energy of the RF power is transmitted into the impedance matcher, the impedance matcher will feedback the current Impedance modulus and phase size, under the action of the preset algorithm of the impedance matcher, control the capacitance value of the adjustable capacitor, so that the impedance value of the impedance matcher and the plasma reaction chamber can be adjusted to 50 ohms to achieve impedance matching.
  • the realization of impedance matching is closely related to the selection of the initial capacitance value of the adjustable capacitor.
  • the initial capacitance value of the adjustable capacitor is not selected properly, problems such as failure to achieve impedance matching and low impedance matching efficiency may occur. Moreover, since the consumable devices inside the plasma reaction chamber are gradually consumed during use, the impedance value will change continuously under the same process conditions. Therefore, when the initial capacitance value of the adjustable capacitor is fixed, impedance matching will occur. The process is gradually inconsistent, and the impedance matching efficiency is getting lower and lower.
  • the purpose of the embodiments of the present application is to provide a semiconductor process equipment and an impedance matching method thereof, so as to solve the problem of low impedance matching efficiency in the existing semiconductor process.
  • an embodiment of the present application provides an impedance matching method applied to semiconductor process equipment, the method comprising:
  • Process preparation step Obtain the impedance matching data corresponding to the currently stored process start-up step, the impedance matching data includes the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matcher of the semiconductor process equipment; according to the parameter adjustment bit, adjusting the parameter value of the parameter adjustable device;
  • Process start-up step applying RF power to the process chamber of the semiconductor process equipment through the impedance matcher, and performing impedance matching through the impedance matcher at the same time, and determining the parameter adjustable device when impedance matching is achieved
  • the current parameter adjustment bit update the impedance matching data according to the current parameter adjustment bit.
  • an embodiment of the present application provides a semiconductor process equipment, including a radio frequency power supply, an impedance matcher, and a process chamber; wherein,
  • the radio frequency power supply is used to apply radio frequency power to the process chamber through the impedance matcher;
  • the impedance matching device includes a controller and a parameter-adjustable device, and the controller is used to obtain the currently stored impedance matching data corresponding to the start-up step of the process in the process preparation step, and the impedance matching data includes the semiconductor
  • the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matching device of the process equipment; according to the parameter adjustment bit, adjust the parameter value of the parameter adjustable device;
  • the matcher loads radio frequency power to the process chamber of the semiconductor process equipment, adjust the parameter adjustable device to achieve impedance matching, and determine the current parameter adjustment position of the parameter adjustable device when impedance matching is achieved; according to the The current parameter adjustment bit is updated to update the impedance matching data.
  • an embodiment of the present application provides an impedance matching device, including a processor and a memory electrically connected to the processor, the memory stores a computer program, and the processor is used to call and execute the computer program from the memory.
  • the above computer program is used to realize the above impedance matching method applied in semiconductor process equipment.
  • an embodiment of the present application provides a storage medium for storing a computer program, and the computer program can be executed by a processor to implement the above-mentioned impedance matching method applied to semiconductor process equipment.
  • the impedance matching data corresponding to the currently stored process start-up step is obtained, and the impedance matching data includes the parameter adjustment bits corresponding to the parameter adjustable devices in the impedance matching device of the semiconductor process equipment , so as to adjust the parameter adjustable device according to the parameter adjustment bit. Since different parameter adjustment bits of the parameter-adjustable device correspond to different parameter values, the adoption of this technical solution realizes the effect of automatically adjusting the parameter value of the parameter-adjustable device in the process preparation step.
  • the RF power is applied to the process chamber of the semiconductor process equipment through the impedance matcher, and the impedance matching is performed through the impedance matcher at the same time, and the current parameter adjustment position of the parameter adjustable device is determined when the impedance matching is achieved. , according to the current parameter adjustment bit, update the impedance matching data.
  • this technical solution can continuously update the parameter adjustment bits in the impedance matching data corresponding to the process start-up step according to the parameter adjustment bits of the parameter-adjustable device at the time of impedance matching when the process start-up step reaches impedance matching, so that Before performing the same process start-up step, the parameter adjustable device can be accurately and automatically adjusted according to the parameter adjustment bit in the impedance matching data, which realizes the effect of feedback adjusting the parameter adjustment bit in the impedance matching data during the semiconductor process, greatly shortening the The impedance matching time is shortened, and the impedance matching efficiency is improved.
  • FIG. 1 is a schematic flow chart of an impedance matching method applied to semiconductor process equipment according to an embodiment of the present application
  • FIG. 2 is a schematic flow chart of an impedance matching method applied to semiconductor process equipment according to another embodiment of the present application
  • FIG. 3 is a schematic structural diagram of a semiconductor process equipment according to an embodiment of the present application.
  • FIG. 4 is a schematic block diagram of a semiconductor process equipment according to an embodiment of the present application.
  • Fig. 5 is a schematic structural diagram of an impedance matching device according to an embodiment of the present application.
  • Embodiments of the present application provide a semiconductor process equipment and an impedance matching method thereof, so as to solve the problem of low impedance matching efficiency in the existing semiconductor process.
  • FIG. 1 is a schematic flowchart of an impedance matching method applied to semiconductor process equipment according to an embodiment of the present application. As shown in Figure 1, the method in Figure 1 may include:
  • process preparation step obtain the impedance matching data corresponding to the currently stored process start-up step, the impedance matching data includes the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matcher of the semiconductor process equipment; according to the parameter adjustment bit, adjust Parameter values for parameter-tunable devices.
  • each process step involving plasma ignition in the semiconductor process is generally composed of a process preparation step and a process ignition step.
  • Each process startup step corresponds to its own impedance matching data.
  • the process preparation step is used to set the process gas and air pressure in the process chamber, heat the temperature of the electrostatic chuck, adjust the parameter adjustable devices in the impedance matching device and other process conditions, when the process conditions meet the requirements in the process formula , enter the craft enlightenment step.
  • the parameter adjustable device includes an adjustable capacitor and/or an adjustable inductor.
  • the parameter value of the parameter adjustable device may include the capacitance value of the adjustable capacitor, the inductance value of the adjustable inductor, etc.
  • the parameter adjustment position of the parameter adjustable device may include the capacitance position of the adjustable capacitor, the inductance position of the adjustable inductor, etc.
  • different parameter adjustment positions of the parameter adjustable device correspond to different parameter values, that is, different capacitance positions of the adjustable capacitor correspond to different capacitance values, and different inductance positions of the adjustable inductor correspond to different inductance values.
  • the parameter adjustable device is an adjustable capacitor.
  • the capacitance value of the adjustable capacitor is adjustable between 50pf (picofarad)-500pf, and the corresponding capacitance position is from 0 to 1000.
  • the capacitance position is 0, the capacitance value of the adjustable capacitor
  • the capacitance value is 50pf
  • the capacitance position is 1000
  • the capacitance value of the adjustable capacitor is 500pf
  • the capacitance position changes linearly between 0-1000, then the capacitance value of the adjustable capacitor varies between 50pf-500pf the linear change.
  • process start-up step load radio frequency power to the process chamber of the semiconductor process equipment through the impedance matcher, and perform impedance matching through the impedance matcher at the same time, and determine the current parameter adjustment position of the parameter adjustable device when the impedance matching is achieved; according to Current parameter adjustment bit, update impedance matching data.
  • the impedance matching data corresponding to the currently stored process start-up step is obtained, and the impedance matching data includes the parameters corresponding to the parameter adjustable device in the impedance matcher of the semiconductor process equipment
  • the adjustment bit is used to adjust the parameter value of the parameter-adjustable device according to the parameter adjustment bit. Since different parameter adjustment bits of the parameter-adjustable device correspond to different parameter values, the adoption of this technical solution realizes the effect of automatically adjusting the parameter value of the parameter-adjustable device in the process preparation step.
  • the RF power is applied to the process chamber of the semiconductor process equipment through the impedance matcher, and the impedance matching is performed through the impedance matcher at the same time, and the current parameter adjustment position of the parameter adjustable device is determined when the impedance matching is achieved. , according to the current parameter adjustment bit, update the impedance matching data.
  • this technical solution can continuously update the parameter adjustment bits in the impedance matching data corresponding to the process start-up step according to the parameter adjustment bits of the parameter-adjustable device at the time of impedance matching when the process start-up step reaches impedance matching, so that Before performing the same process start-up step, the parameter adjustable device can be accurately and automatically adjusted according to the parameter adjustment bit in the impedance matching data, which realizes the effect of feedback adjusting the parameter adjustment bit in the impedance matching data during the semiconductor process, greatly shortening the The impedance matching time is shortened, and the impedance matching efficiency is improved.
  • the semiconductor process equipment before executing S102, can read the process recipe of the semiconductor process currently being executed, and determine whether the working mode of the impedance matcher is Auto Preset mode (automatically preset) when performing each process step of the semiconductor process. mode), when the working mode of the impedance matcher recorded in the process recipe and the execution of the current process step is Auto Preset mode, the above S102-S104 will be executed.
  • the Auto Preset mode can include manual mode (manual mode) and Auto mode (automatic mode).
  • the working modes of the impedance matcher may include an automatic matching mode and a non-automatic matching mode.
  • set the impedance matcher to non-automatic matching mode in the process preparation step, set the impedance matcher to non-automatic matching mode; in the process start-up step, set the impedance matcher to automatic matching mode.
  • the non-automatic matching mode may be the aforementioned manual mode
  • the automatic matching mode may be the aforementioned Auto mode.
  • Impedance matching data corresponding to the start-up step of the process so as to adjust the parameter value of the parameter adjustable device according to the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matching data.
  • the working mode of the impedance matcher is manual mode, the impedance matcher cannot perform automatic matching.
  • the parameter adjustment bit of the parameter adjustable device remains unchanged. Change.
  • the semiconductor process equipment can obtain the target learn file corresponding to the current process step from the stored learn file (used to store impedance matching data) according to the identification information of the current process step, so as to obtain the parameter adjustable device recorded in the target learn file Corresponding parameter adjustment bit.
  • the identification information of the current process step may be the process step name and step number of the process step.
  • the semiconductor process is an etching process, and the etching process includes a deposition step 1-1, an etching step 1-1, a deposition step 2-1 and an etching step 2-1. If the current process step is etching step 1-1, the identification information of the process step is etching step 1-1.
  • each process step corresponds to its own learn file.
  • the learn file corresponding to C1 can include the following parameters: (1) C1PresetLearned, the meaning of this parameter is the matching position of C1, that is, when impedance matching is realized, C1 (2) C1PresetConstl, the meaning of this parameter is that C1 presets the recommended parameter, and this parameter is a negative number; this parameter can be obtained by preset, or measured through experiments (described in detail in subsequent embodiments), It can realize the fine-tuning of the parameter adjustment bits corresponding to all process steps of the semiconductor process; (3) C1PresetOffset, the meaning of this parameter is C1 preset position correction, and this parameter can be the same or different for different process steps, so that it can realize the adjustment of a single Flexible fine-tuning of the parameter adjustment bit corresponding to the process step.
  • this parameter can be set to 0 or other values; (4) C1Calculate, the meaning of this parameter is the recommended value of the C1 preset position. This parameter is determined by C1PresetLearned, The sum of C1PresetConstl and C1PresetOffset is obtained.
  • the semiconductor process equipment can create a new learn file corresponding to each process step according to the identification information of each process step in the process formula.
  • each learn file The parameter adjustment bit corresponding to the parameter adjustable device recorded in is the default value set.
  • the parameter adjustment bit corresponding to the parameter adjustable device recorded in each learn file is the value after multiple updates.
  • the working mode of the impedance matcher needs to be set to Auto mode.
  • the working mode of the impedance matcher is Auto mode, it can pass through the impedance
  • the matcher performs impedance matching, and determines the current parameter adjustment position of the parameter adjustable device when the impedance matching is achieved, and updates the impedance matching data according to the current parameter adjustment position.
  • the working mode of the impedance matcher is adjusted to a non-automatic matching mode, which not only saves power, but also avoids turning on the impedance in the process preparation step.
  • the process disturbance caused by the matching work ensures the accurate execution of the semiconductor process.
  • the parameter adjustment bits in the impedance matching data may include a first parameter adjustment bit, a parameter correction value, and a second parameter adjustment bit.
  • the second parameter adjustment bit is the sum of the first parameter adjustment bit and the parameter correction value.
  • the first parameter adjustment bit may be C1PresetLearned in the above-mentioned learn file
  • the parameter correction value may be C1PresetOffset in the above-mentioned learn file.
  • the parameter correction value can realize the flexible fine-tuning of the parameter adjustment bit corresponding to the corresponding process step, so according to the second parameter adjustment bit, the parameter value of the parameter adjustable device can be adjusted to obtain a more suitable The parameter value of the actual parameter value of the parameter adjustable device in the process step, so that when the subsequent impedance matching device performs impedance matching, the impedance matching time is shortened and the impedance matching efficiency is improved.
  • the first parameter adjustment bit when the parameter adjustment bit includes the first parameter adjustment bit, the parameter correction value and the second parameter adjustment bit, when executing S104, the first parameter adjustment bit can be updated according to the current parameter adjustment bit, so that according to The updated first parameter adjustment bit and parameter correction value update the second parameter adjustment bit.
  • the second parameter adjustment bit is updated synchronously, so that when the process step is executed again, the parameter-adjustable device can be adjusted according to the updated second parameter adjustment bit.
  • the parameter value makes the adjustment of the parameter value of the parameter-adjustable device more accurate, and realizes the effect of accurately automatically adjusting the parameter value of the parameter-adjustable device.
  • the parameter adjustment bit may also include a preset parameter matching value.
  • the second parameter adjustment bit is the sum of the first parameter adjustment bit, the preset parameter matching value and the parameter correction value.
  • the impedance matching information of the impedance matching device satisfies the preset condition.
  • the impedance matching information includes at least one of the following items: the total duration of impedance matching, and the difference between the impedance matching durations corresponding to the start-up steps of each process.
  • the preset conditions include at least one of the following: the shortest total duration of impedance matching, and the smallest difference between impedance matching durations corresponding to each process start-up step.
  • the preset parameter matching value may be C1PresetConstl in the above-mentioned learn file, so the second parameter adjustment bit may be C1Calculate in the above-mentioned learn file.
  • the following steps A1-A4 can be used to determine the preset parameter matching value when the total duration of impedance matching is the shortest and the difference between the impedance matching durations corresponding to each process start-up step is the smallest :
  • Step A1 determining a plurality of parameter matching values to be screened corresponding to the adjustable parameter device.
  • a sample process component may be used to conduct an experiment to determine a preset parameter matching value.
  • a plurality of sample process components can be selected, so as to improve the applicability of the finally determined preset parameter matching value; one sample process component can also be selected, so as to increase the speed of determining the preset parameter matching value.
  • Step A2 adjusting the parameter adjustment bits of the parameter adjustable device respectively according to the second parameter adjustment bits corresponding to the matching values of the parameters to be screened.
  • the second parameter adjustment bit corresponding to each parameter matching value to be screened is the first parameter adjustment bit. bit, the sum of the parameter matching value to be screened and the parameter correction value; when the parameter adjustment bit corresponding to the parameter adjustable device includes the first parameter adjustment bit and the preset parameter matching value, the second corresponding to each parameter matching value to be screened
  • the parameter adjustment bit is the sum of the first parameter adjustment bit and the matching value of the parameter to be filtered.
  • step A3 after each adjustment of the parameter adjustment bit of the parameter-adjustable device, an ignition is performed to determine the impedance matching duration corresponding to each parameter matching value to be screened.
  • step A4 according to the determined plurality of impedance matching durations, it is determined that the parameter matching value to be screened corresponding to the impedance matching duration meeting the preset condition is a preset parameter matching value.
  • the parameter matching value to be screened when the total impedance matching duration is the shortest and the difference between the impedance matching durations corresponding to each process start-up step is the smallest is used as the preset parameter matching value, so that according to adding the preset
  • the second parameter adjustment bit of the parameter matching value is set, and after the parameter adjustable device is adjusted, the impedance matching information of the impedance matcher can meet the preset condition when performing impedance matching.
  • the impedance matching device achieves the shortest total impedance matching duration, and the difference between the impedance matching durations corresponding to the start-up steps of each process is the smallest.
  • Fig. 2 is a schematic flowchart of an impedance matching method applied to semiconductor process equipment according to another embodiment of the present application. As shown in Figure 2, the method in Figure 2 may include:
  • S201 read the process recipe of the semiconductor process currently being executed, and determine whether the working mode of the impedance matcher is Auto Preset mode when executing the current process step of the semiconductor process; if so, execute S202; if not, end the process.
  • radio frequency power value when the radio frequency power value is equal to 0, it can be determined that it is currently in the process preparation step; when the radio frequency power value is greater than 0, it can be determined that it is currently in the process start step.
  • the non-automatic matching mode may be a manual mode.
  • the impedance matching data includes the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matcher of the semiconductor process equipment, so as to adjust the parameter of the parameter adjustable device according to the parameter adjustment bit value.
  • the parameter adjustment bits may include a first parameter adjustment bit, a parameter correction value, and a second parameter adjustment bit.
  • the second parameter adjustment bit is the sum of the first parameter adjustment bit and the parameter correction value.
  • the parameter adjustment bits may include a first parameter adjustment bit, a parameter correction value, a second parameter adjustment bit, and a preset parameter matching value.
  • the second parameter adjustment bit is the sum of the first parameter adjustment bit, the preset parameter matching value and the parameter correction value.
  • the automatic matching mode may be an Auto mode.
  • the impedance matching data corresponding to the currently stored process start-up step is obtained, and the impedance matching data includes the parameter adjustment bits corresponding to the parameter adjustable devices in the impedance matching device of the semiconductor process equipment , so as to adjust the parameter value of the parameter-adjustable device according to the parameter adjustment bit. Since different parameter adjustment bits of the parameter-adjustable device correspond to different parameter values, the adoption of this technical solution realizes the effect of automatically adjusting the parameter value of the parameter-adjustable device in the process preparation step.
  • the RF power is applied to the process chamber of the semiconductor process equipment through the impedance matcher, and the impedance matching is performed through the impedance matcher at the same time, and the current parameter adjustment position of the parameter adjustable device is determined when the impedance matching is achieved. , according to the current parameter adjustment bit, update the impedance matching data.
  • this technical solution can continuously update the parameter adjustment bits in the impedance matching data corresponding to the process start-up step according to the parameter adjustment bits of the parameter-adjustable device at the time of impedance matching when the process start-up step reaches impedance matching, so that Before performing the same process start-up step, the parameter adjustable device can be accurately and automatically adjusted according to the parameter adjustment bit in the impedance matching data, which realizes the effect of feedback adjusting the parameter adjustment bit in the impedance matching data during the semiconductor process, greatly shortening the The impedance matching time is shortened, and the impedance matching efficiency is improved.
  • the embodiment of the present application also provides a semiconductor process equipment.
  • FIG. 3 is a schematic structural diagram of a semiconductor process equipment according to an embodiment of the present application.
  • the semiconductor process equipment may include a radio frequency power supply 310, an impedance matching device 320 and a process chamber 330; wherein,
  • a radio frequency power supply 310 configured to apply radio frequency power to the process chamber 330 through an impedance matcher 320;
  • the impedance matching device 320 includes a controller 321 and a parameter adjustable device 322.
  • the controller 321 is used to obtain the impedance matching data corresponding to the currently stored process startup step in the process preparation step.
  • the impedance matching data includes semiconductor process equipment impedance matching
  • the parameter adjustment position corresponding to the parameter adjustable device 322 in the parameter adjustable device 320 According to the parameter adjustment position, adjust the parameter value of the parameter adjustable device 322;
  • the process chamber 330 is loaded with RF power, adjust the parameter adjustable device 322 to achieve impedance matching, and determine the current parameter adjustment position of the parameter adjustable device 322 when impedance matching is achieved; update the impedance matching data according to the current parameter adjustment position.
  • the working modes of the impedance matcher 320 include an automatic matching mode and a non-automatic matching mode
  • the controller 321 is also used to set the impedance matcher 320 to a non-automatic matching mode in the process preparation step; to set the impedance matcher 320 to an automatic matching mode in the process start-up step.
  • the parameter adjustment bit includes a first parameter adjustment bit, a parameter correction value and a second parameter adjustment bit, and the second parameter adjustment bit is the sum of the first parameter adjustment bit and the parameter correction value;
  • the controller 321 is further configured to adjust the parameter value of the parameter adjustable device 322 according to the second parameter adjustment bit.
  • controller 321 is also used for:
  • the second parameter adjustment bit is updated according to the updated first parameter adjustment bit and the parameter correction value.
  • the parameter adjustment bit also includes a preset parameter matching value;
  • the second parameter adjustment bit is the sum of the first parameter adjustment bit, the preset parameter matching value and the parameter correction value;
  • the impedance matching information of the impedance matching device 320 meets the preset condition
  • the impedance matching information includes at least one of the following: the total duration of impedance matching, and the gap between the impedance matching durations corresponding to the start-up steps of each process;
  • the preset conditions include at least one of the following: the shortest total duration of impedance matching, and the smallest difference between impedance matching durations corresponding to each process start-up step.
  • controller 321 is also used for:
  • an ignition is performed to determine the impedance matching duration corresponding to each parameter matching value to be screened;
  • the parameter matching value to be screened corresponding to the impedance matching duration meeting the preset condition is a preset parameter matching value.
  • controller 321 can be implemented based on various hardware with processing capabilities such as PLC (Programmable Logic Controller, programmable logic controller), lower computer, and upper computer, or a combination thereof.
  • PLC Process Control Controller
  • programmable logic controller programmable logic controller
  • the parameter adjustable device 322 includes an adjustable capacitor and/or an adjustable inductor.
  • the impedance matching data corresponding to the currently stored process start-up step is obtained, and the impedance matching data includes the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matcher of the semiconductor process equipment, Therefore, according to the parameter adjustment bit, the parameter value of the parameter adjustable device is adjusted. Since different parameter adjustment bits of the parameter-adjustable device correspond to different parameter values, the device realizes the effect of automatically adjusting the parameter value of the parameter-adjustable device in the process preparation step.
  • the RF power is applied to the process chamber of the semiconductor process equipment through the impedance matcher, and the impedance matching is performed through the impedance matcher at the same time, and the current parameter adjustment position of the parameter adjustable device is determined when the impedance matching is achieved. , according to the current parameter adjustment bit, update the impedance matching data.
  • the device can continuously update the parameter adjustment bits in the impedance matching data corresponding to the process start-up step according to the parameter adjustment bits of the parameter-adjustable device at the time of impedance matching when the process start-up step reaches impedance matching, so that when the process is executed again Before the start-up step of the same process, the parameter adjustable device can be accurately and automatically adjusted according to the parameter adjustment bit in the impedance matching data, which realizes the effect of feedback adjusting the parameter adjustment bit in the impedance matching data during the semiconductor process, and greatly shortens the Impedance matching time improves impedance matching efficiency.
  • FIG. 4 is a schematic block diagram of a semiconductor process equipment according to an embodiment of the present application.
  • the semiconductor process equipment may include a radio frequency power supply 310 , an impedance matcher 320 and a process chamber 330 connected in sequence.
  • the impedance matching device 320 includes a sensor 323 , a controller 321 and a parameter adjustable device connected to each other.
  • the sensor 323 is connected to the radio frequency power supply 310 and connected to the process chamber 330 through a parameter adjustable device.
  • the parameter adjustable device includes a first adjustable capacitor 3221 and a second adjustable capacitor 3222 .
  • the first adjustable capacitor 3221 is connected in parallel between the sensor 323 and the ground
  • the second adjustable capacitor 3222 is connected in series between the sensor 323 and the process chamber 330
  • the first adjustable capacitor 3221 and the second adjustable capacitor 3222 are respectively connected to the controller 321 connections.
  • An inductor 324 is also connected between the second adjustable capacitor 3222 and the process chamber 330 . Under the action of the inductor 324 , the impedance characteristic of the impedance matching device 320 is consistent with the impedance characteristic of the process chamber 330 .
  • the controller 321 determines the target capacitance value of the adjustable capacitor according to the difference between the first impedance and the output impedance of the RF power supply 310, and transmits the target capacitance value to the capacitance control module (not shown in FIG. 4 ) in the adjustable capacitor. ), so that the capacitance control module adjusts the capacitance value of the adjustable capacitor to the target capacitance value to achieve impedance matching.
  • FIG. 3 and FIG. 4 can be used to implement the above-mentioned impedance matching method applied in semiconductor process equipment, and the detailed description thereof should be similar to the description of the method part above, To avoid tediousness, details are not repeated here.
  • Impedance matching equipment may have relatively large differences due to different configurations or performances, and may include one or more processors 501 and memory 502, and one or more storage applications or data may be stored in the memory 502.
  • the storage 502 may be a short-term storage or a persistent storage.
  • the application program stored in the memory 502 may include one or more modules (not shown), and each module may include a series of computer-executable instructions for the impedance matching device.
  • the processor 501 may be configured to communicate with the memory 502, and execute a series of computer-executable instructions in the memory 502 on the impedance matching device.
  • the impedance matching device may also include one or more power sources 503 , one or more wired or wireless network interfaces 504 , one or more input and output interfaces 505 , and one or more keyboards 506 .
  • the impedance matching device includes a memory, and one or more programs, wherein one or more programs are stored in the memory, and one or more programs may include one or more modules, and each The module may include a series of computer-executable instructions in the impedance matching device, and the one or more programs configured to be executed by one or more processors include computer-executable instructions for performing the following:
  • Process preparation step Obtain the impedance matching data corresponding to the currently stored process start-up step.
  • the impedance matching data includes the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matcher of the semiconductor process equipment; adjust the parameter adjustable device according to the parameter adjustment bit. parameter value;
  • Process start-up step load RF power to the process chamber of the semiconductor process equipment through the impedance matcher, and perform impedance matching through the impedance matcher at the same time, and determine the current parameter adjustment position of the parameter adjustable device when the impedance match is reached; according to the current parameter Adjust the bit to update the impedance matching data.
  • the impedance matching data includes the parameter adjustment bit corresponding to the parameter adjustable device in the impedance matcher of the semiconductor process equipment, Thereby adjusting the bit according to the parameter and adjusting the parameter adjustable device. Since different parameter adjustment bits of the parameter-adjustable device correspond to different parameter values, the device realizes the effect of automatically adjusting the parameter value of the parameter-adjustable device in the process preparation step.
  • the RF power is applied to the process chamber of the semiconductor process equipment through the impedance matcher, and the impedance matching is performed through the impedance matcher at the same time, and the current parameter adjustment position of the parameter adjustable device is determined when the impedance matching is achieved. , according to the current parameter adjustment bit, update the impedance matching data.
  • the device can continuously update the parameter adjustment bits in the impedance matching data corresponding to the process start-up step according to the parameter adjustment bits of the parameter-adjustable device at the time of impedance matching when the process start-up step reaches impedance matching, so that when the process is executed again Before the start-up step of the same process, the parameter adjustable device can be accurately and automatically adjusted according to the parameter adjustment bit in the impedance matching data, which realizes the effect of feedback adjusting the parameter adjustment bit in the impedance matching data during the semiconductor process, and greatly shortens the Impedance matching time improves impedance matching efficiency.
  • the embodiment of the present application also proposes a storage medium, the storage medium stores one or more computer programs, and the one or more computer programs include instructions, and when the instructions are executed by an electronic device including multiple application programs, the The electronic equipment executes the various processes of the above embodiment of the impedance matching method applied in the semiconductor process equipment, and can achieve the same technical effect. To avoid repetition, details are not repeated here.
  • a typical implementing device is a computer.
  • the computer may be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or Combinations of any of these devices.
  • the embodiments of the present application may be provided as methods, systems, or computer program products. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
  • computer-usable storage media including but not limited to disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture comprising instruction means, the instructions
  • the device realizes the function specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.
  • a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
  • processors CPUs
  • input/output interfaces network interfaces
  • memory volatile and non-volatile memory
  • Memory may include non-permanent storage in computer-readable media, in the form of random access memory (RAM) and/or nonvolatile memory such as read-only memory (ROM) or flash RAM. Memory is an example of computer readable media.
  • RAM random access memory
  • ROM read-only memory
  • flash RAM flash random access memory
  • Computer-readable media including both permanent and non-permanent, removable and non-removable media, can be implemented by any method or technology for storage of information.
  • Information may be computer readable instructions, data structures, modules of a program, or other data.
  • Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Flash memory or other memory technology, Compact Disc Read-Only Memory (CD-ROM), Digital Versatile Disc (DVD) or other optical storage, Magnetic tape cartridge, tape magnetic disk storage or other magnetic storage device or any other non-transmission medium that can be used to store information that can be accessed by a computing device.
  • computer-readable media excludes transitory computer-readable media, such as modulated data signals and carrier waves.
  • program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types.
  • the application may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network.
  • program modules may be located in both local and remote computer storage media including storage devices.

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Abstract

本申请实施例公开了一种半导体工艺设备及其阻抗匹配方法，用以解决现有的半导体工艺过程中阻抗匹配效率较低的问题。所述方法包括：工艺准备步：获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位；根据参数调节位，调节参数可调器件的参数值；工艺启辉步：通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位；根据当前参数调节位，更新阻抗匹配数据。该技术方案能够根据阻抗匹配数据中的参数调节位准确的自动调节参数可调器件的参数值，缩短了阻抗匹配时间，提高了阻抗匹配效率。

Description

半导体工艺设备及其阻抗匹配方法 技术领域
本申请涉及半导体技术领域，尤其涉及一种半导体工艺设备及其阻抗匹配方法。
背景技术
电感耦合等离子体源应用于半导体工艺装备制造领域的刻蚀、薄膜沉积、离子注入掺杂等领域。等离子体反应腔室内有电感耦合线圈及静电卡盘，在刻蚀领域，电感耦合等离子体源的主要原理为：射频电流流经电感耦合线圈，从而在反应腔室内产生电磁场，电磁场激发反应腔室内通入的气体产生等离子体，偏压源控制离子轰击能量使等离子体加速到达晶圆，实现刻蚀。其中，晶圆通过静电吸附固定在静电卡盘上。
典型的射频放电等离子体发生系统中，射频电源的输出阻抗一般为50欧姆，而等离子体反应腔室的等效阻抗一般不会是50欧姆，且在不同工艺条件下，等离子体反应腔室的等效阻抗也互不相同。传输线理论指出，当射频电源的输出阻抗与负载阻抗(即等离子体反应腔室的等效阻抗)不同时，射频电源输出功率会产生损耗，无法使输出效率达到最大，导致能源浪费，还会对射频电源本身造成损害，甚至导致局部热量过高引发火灾等安全问题。且由于负载阻抗的大小与产生等离子体的工艺条件相关，因此在使用电感耦合等离子体源过程中，需要在射频电源和等离子体反应腔室之间增加能自动调节负载阻抗的阻抗匹配器，阻抗匹配器可根据等离子体反应腔室在不同工艺条件下的实际阻抗，通过阻抗匹配器内置的传感器及控制系统控制改变参数可调器件(如可调电容器)的实际值，从而使负载阻抗等于50欧姆，实现 阻抗匹配，以避免出现上述问题。
现有的阻抗匹配器通常的工作方式为：位于阻抗匹配器内部的传感器会实时监测电路中当前阻抗值，当射频电源的能量传输入阻抗匹配器时，阻抗匹配器会根据传感器实时反馈的当前阻抗模值及相位大小，在阻抗匹配器预置算法作用下，控制可调电容器的电容值，从而实现将阻抗匹配器和等离子体反应腔室的阻抗值调节为50欧姆，以实现阻抗匹配。采用此种工作方式，实现阻抗匹配与可调电容器的初始电容值选取紧密相关，若可调电容器的初始电容值选取不合适，则可能出现无法实现阻抗匹配、阻抗匹配效率低等问题。并且，由于等离子体反应腔室内部易损耗器件在使用过程中逐渐被消耗，导致相同工艺条件下其阻抗值会不断变化，因此当可调电容器的初始电容值固定不变时，会出现阻抗匹配过程逐渐不一致的情况，且使得阻抗匹配效率越来越低。
发明内容
本申请实施例的目的是提供一种半导体工艺设备及其阻抗匹配方法，用以解决现有的半导体工艺过程中阻抗匹配效率较低的问题。
为解决上述技术问题，本申请实施例是这样实现的：
一方面，本申请实施例提供一种应用于半导体工艺设备中的阻抗匹配方法，所述方法包括：
工艺准备步：获取当前存储的工艺启辉步对应的阻抗匹配数据，所述阻抗匹配数据包括所述半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位；根据所述参数调节位，调节所述参数可调器件的参数值；
工艺启辉步：通过所述阻抗匹配器向所述半导体工艺设备的工艺腔室加载射频功率，同时通过所述阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定所述参数可调器件的当前参数调节位；根据所述当前参数调节位，更新所述阻抗匹配数据。
另一方面，本申请实施例提供一种半导体工艺设备，包括射频电源、阻抗匹配器和工艺腔室；其中，
所述射频电源，用于通过所述阻抗匹配器向所述工艺腔室加载射频功率；
所述阻抗匹配器包括控制器和参数可调器件，所述控制器，用于在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，所述阻抗匹配数据包括所述半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位；根据所述参数调节位，调节所述参数可调器件的参数值；在工艺启辉步中，在所述射频电源通过所述阻抗匹配器向所述半导体工艺设备的工艺腔室加载射频功率时，调节所述参数可调器件以达到阻抗匹配，并在达到阻抗匹配时确定所述参数可调器件的当前参数调节位；根据所述当前参数调节位，更新所述阻抗匹配数据。
再一方面，本申请实施例提供一种阻抗匹配设备，包括处理器和与所述处理器电连接的存储器，所述存储器存储有计算机程序，所述处理器用于从所述存储器调用并执行所述计算机程序以实现上述应用于半导体工艺设备中的阻抗匹配方法。
再一方面，本申请实施例提供一种存储介质，用于存储计算机程序，所述计算机程序能够被处理器执行以实现上述应用于半导体工艺设备中的阻抗匹配方法。
采用本申请实施例的技术方案，通过在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位，从而根据参数调节位，调节参数可调器件。由于参数可调器件的不同参数调节位对应不同的参数值，因此，采用该技术方案实现了在工艺准备步自动调节参数可调器件的参数值的效果。并且，在工艺启辉步中，通过阻抗匹配器向半导体工艺设备的工艺腔室加载 射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位，根据当前参数调节位，更新阻抗匹配数据。可见，该技术方案能够在工艺启辉步达到阻抗匹配时，根据阻抗匹配时的参数可调器件的参数调节位，不断更新工艺启辉步对应的阻抗匹配数据中的参数调节位，从而在再次执行相同的工艺启辉步之前，能够根据阻抗匹配数据中的参数调节位准确的自动调节参数可调器件，实现了在半导体工艺过程中反馈调节阻抗匹配数据中的参数调节位的效果，大大缩短了阻抗匹配时间，提高了阻抗匹配效率。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请中记载的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1是根据本申请一实施例的一种应用于半导体工艺设备中的阻抗匹配方法的示意性流程图；
图2是根据本申请另一实施例的一种应用于半导体工艺设备中的阻抗匹配方法的示意性流程图；
图3是根据本申请一实施例的一种半导体工艺设备的结构示意图；
图4是根据本申请一实施例的一种半导体工艺设备的示意性框图；
图5是根据本申请一实施例的一种阻抗匹配设备的结构示意图。
具体实施方式
本申请实施例提供一种半导体工艺设备及其阻抗匹配方法，用以解决现有的半导体工艺过程中阻抗匹配效率较低的问题。
为了使本技术领域的人员更好地理解本申请中的技术方案，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都应当属于本申请保护的范围。
图1是根据本申请一实施例的一种应用于半导体工艺设备中的阻抗匹配方法的示意性流程图。如图1所示，图1的方法可包括：
S102，工艺准备步：获取当前存储的工艺启辉步对应的阻抗匹配数据，该阻抗匹配数据包括半导体工艺设备的阻抗匹配器中参数可调器件对应的参数调节位；根据该参数调节位，调节参数可调器件的参数值。
其中，半导体工艺中每一涉及等离子体启辉的工艺步一般都是由工艺准备步与工艺启辉步组成。各工艺启辉步对应各自的阻抗匹配数据。通过调节参数可调器件的参数调节位，可实现对参数可调器件的参数值的调整。本实施例中，工艺准备步用于设置工艺腔室中的工艺气体及气压、加热静电卡盘温度、调节阻抗匹配器中参数可调器件等工艺条件，当工艺条件达到工艺配方中的要求后，进入工艺启辉步。
在一个实施例中，参数可调器件包括可调电容器和/或可调电感。参数可调器件的参数值可包括可调电容器的电容值、可调电感的电感值等，参数可调器件的参数调节位可包括可调电容器的电容位置、可调电感的电感位置等。其中，参数可调器件不同的参数调节位对应不同的参数值，即可调电容器不同的电容位置对应不同的电容值，可调电感不同的电感位置对应不同的电感值。例如，参数可调器件为可调电容器，可调电容器的电容值在50pf(皮法)-500pf之间可调，对应的电容位置为0至1000，在电容位置为0时，可调电容器的电容值为50pf，在电容位置为1000时，可调电容器的电容值为500pf，以此类推，电容位置在0-1000之间线性变化，则可调电容器的电容值在 50pf-500pf之间随之线性改变。
S104，工艺启辉步：通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位；根据当前参数调节位，更新阻抗匹配数据。
其中，通过阻抗匹配器进行阻抗匹配的原理会在图4对应的实施例中、结合阻抗匹配器内部的具体器件进行说明，此处不另赘述。
采用本申请实施例的技术方案，通过在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，该阻抗匹配数据包括半导体工艺设备的阻抗匹配器中参数可调器件对应的参数调节位，从而根据参数调节位，调节参数可调器件的参数值。由于参数可调器件的不同参数调节位对应不同的参数值，因此，采用该技术方案实现了在工艺准备步自动调节参数可调器件的参数值的效果。并且，在工艺启辉步中，通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位，根据当前参数调节位，更新阻抗匹配数据。可见，该技术方案能够在工艺启辉步达到阻抗匹配时，根据阻抗匹配时的参数可调器件的参数调节位，不断更新工艺启辉步对应的阻抗匹配数据中的参数调节位，从而在再次执行相同的工艺启辉步之前，能够根据阻抗匹配数据中的参数调节位准确的自动调节参数可调器件，实现了在半导体工艺过程中反馈调节阻抗匹配数据中的参数调节位的效果，大大缩短了阻抗匹配时间，提高了阻抗匹配效率。
在一个实施例中，执行S102之前，半导体工艺设备可读取当前执行的半导体工艺的工艺配方，确定执行半导体工艺的各工艺步时，阻抗匹配器的工作模式是否为Auto Preset模式(自动预设模式)，当工艺配方中记录的、执行当前工艺步时阻抗匹配器的工作模式为Auto Preset模式时，才执行上述的S102-S104。其中，Auto Preset模式下可包括manual模式(手动模式)和 Auto模式(自动模式)。
在一个实施例中，阻抗匹配器的工作模式可包括自动匹配模式和非自动匹配模式。在工艺准备步中，将阻抗匹配器设置为非自动匹配模式；在工艺启辉步中，将阻抗匹配器设置为自动匹配模式。
其中，非自动匹配模式可为上述的manual模式，自动匹配模式可为上述的Auto模式。在工艺配方中记录的、执行当前工艺步时阻抗匹配器的工作模式为Auto Preset模式后，可根据工艺配方中记录的射频功率值，确定当前工艺步处于工艺准备步还是工艺启辉步。在射频功率值等于0时，可确定当前工艺步处于工艺准备步，此时，需将阻抗匹配器的工作模式设置为manual模式，当阻抗匹配器的工作模式为manual模式时，可获取当前存储的工艺启辉步对应的阻抗匹配数据，从而根据阻抗匹配数据中参数可调器件对应的参数调节位，调节参数可调器件的参数值。需要说明的是，当阻抗匹配器的工作模式为manual模式时，阻抗匹配器无法进行自动匹配，在根据参数调节位调节参数可调器件的参数值之后，参数可调器件的参数调节位保持不变。
其中，半导体工艺设备可根据当前工艺步的标识信息，从存储的learn文件(用于存储阻抗匹配数据)中获取当前工艺步对应的目标learn文件，从而获取目标learn文件中记录的参数可调器件对应的参数调节位。当前工艺步的标识信息可为该工艺步的工艺步名称和步数。例如，半导体工艺为刻蚀工艺，该刻蚀工艺包括沉积步1-1、刻蚀步1-1、沉积步2-1和刻蚀步2-1。若当前工艺步为刻蚀步1-1，则该工艺步的标识信息为刻蚀步1-1。
其中，各工艺步分别对应各自的learn文件。以阻抗匹配器中的参数可调器件为可调电容器C1为例，C1对应的learn文件中可包括如下参数：(1)C1PresetLearned，该参数的含义为C1匹配位置，即实现阻抗匹配时，C1的电容位置；(2)C1PresetConstl，该参数的含义为C1预设推荐参数，该参数为负数；该参数可通过预设得到，或者通过实验测得(在后续实施例中进行 了详细说明)，能够实现对半导体工艺的所有工艺步对应的参数调节位的微调；(3)C1PresetOffset，该参数的含义为C1预设位置修正，对于不同的工艺步该参数可相同或不同，从而能够实现对单个工艺步对应的参数调节位的灵活微调，在具体的半导体工艺过程中该参数可以设置为0或其他值；(4)C1Calculate，该参数的含义为C1预设位置推荐值，该参数由C1PresetLearned、C1PresetConstl和C1PresetOffset三者加和得到。
针对首次执行的半导体工艺，半导体工艺设备通过读取当前执行的半导体工艺的工艺配方，可根据工艺配方中各工艺步的标识信息，新建各工艺步分别对应的learn文件，此时，各learn文件中记录的参数可调器件对应的参数调节位为设定的默认值。针对多次执行过的半导体工艺，各learn文件中记录的参数可调器件对应的参数调节位为多次更新后的值。
在射频功率值大于0时，可确定当前工艺步处于工艺启辉步，此时，需将阻抗匹配器的工作模式设置为Auto模式，当阻抗匹配器的工作模式为Auto模式时，能够通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位，根据当前参数调节位，更新阻抗匹配数据。
在本实施例中，由于在工艺准备步，阻抗匹配器不需要进行阻抗匹配工作，因此将阻抗匹配器的工作模式调整到非自动匹配模式，不仅节省电能，还可避免在工艺准备步开启阻抗匹配工作所导致的工艺错乱，确保了半导体工艺的准确执行。
在一个实施例中，阻抗匹配数据中的参数调节位可包括第一参数调节位、参数修正值和第二参数调节位。第二参数调节位为第一参数调节位和参数修正值之和。其中，各工艺步分别对应各自的参数修正值。
本实施例中，第一参数调节位可为上述learn文件中的C1PresetLearned，参数修正值可为上述learn文件中的C1PresetOffset。在执行S102时，可根据第二参数调节位，调节参数可调器件的参数值。
在本实施例中，由于参数修正值能够实现对相应的工艺步所对应的参数调节位的灵活微调，因此根据第二参数调节位，调节参数可调器件的参数值，能够得到更加贴合各工艺步中参数可调器件实际参数值的参数值，从而在后续阻抗匹配器进行阻抗匹配时，缩短阻抗匹配时间，提高阻抗匹配效率。
在一个实施例中，在参数调节位包括第一参数调节位、参数修正值和第二参数调节位的情况下，执行S104时，可根据当前参数调节位，更新第一参数调节位，从而根据更新后的第一参数调节位和参数修正值，更新第二参数调节位。
在本实施例中，通过在第一参数调节位更新之后，同步更新第二参数调节位，从而当再次执行该工艺步时，能够根据更新后的第二参数调节位，调节参数可调器件的参数值，使得对参数可调器件的的参数值调节更加准确，实现了准确的自动调节参数可调器件的参数值的效果。
在上一实施例的基础上，参数调节位还可包括预设参数匹配值。此时，第二参数调节位为第一参数调节位、预设参数匹配值和参数修正值之和。在根据第二参数调节位，调节参数可调器件的参数值后，阻抗匹配器的阻抗匹配信息满足预设条件。其中，阻抗匹配信息包括以下至少一项：阻抗匹配总时长、各工艺启辉步对应的阻抗匹配时长之间的差距。预设条件包括以下至少一项：阻抗匹配总时长最短、各工艺启辉步对应的阻抗匹配时长之间的差距最小。
本实施例中，预设参数匹配值可为上述learn文件中的C1PresetConstl，从而第二参数调节位可为上述learn文件中的C1Calculate。
在一个实施例中，在执行S102之前，可通过下述步骤A1-A4，确定出阻抗匹配总时长最短、各工艺启辉步对应的阻抗匹配时长之间的差距最小时的预设参数匹配值：
步骤A1，确定参数可调器件对应的多个待筛选参数匹配值。
本实施例中，可采用样本工艺元件进行实验，以确定出预设参数匹配值。其中，可选取多个样本工艺元件，从而提高最终确定出的预设参数匹配值的适用性；也可选取一个样本工艺元件，以提高预设参数匹配值的确定速度。
步骤A2，分别根据各待筛选参数匹配值对应的第二参数调节位调节参数可调器件的参数调节位。
其中，在参数可调器件对应的参数调节位包括第一参数调节位、预设参数匹配值和参数修正值的情况下，各待筛选参数匹配值对应的第二参数调节位为第一参数调节位、待筛选参数匹配值和参数修正值之和；在参数可调器件对应的参数调节位包括第一参数调节位和预设参数匹配值的情况下，各待筛选参数匹配值对应的第二参数调节位为第一参数调节位和待筛选参数匹配值之和。
步骤A3，在每次调节参数可调器件的参数调节位之后，进行一次启辉，确定各个待筛选参数匹配值对应的阻抗匹配时长。
步骤A4，根据确定的多个阻抗匹配时长，确定符合预设条件的阻抗匹配时长对应的待筛选参数匹配值为预设参数匹配值。
在本实施例中，通过将阻抗匹配总时长最短、各工艺启辉步对应的阻抗匹配时长之间的差距最小时对应的待筛选参数匹配值作为预设参数匹配值，使得根据加入了该预设参数匹配值的第二参数调节位，调节参数可调器件后，在进行阻抗匹配时，阻抗匹配器的阻抗匹配信息能够满足预设条件。
在一个实施例中，根据上述步骤A1-A4，经过大量样本工艺元件的实验，在阻抗匹配器中的参数可调器件包括第一可调电容器C1和第二可调电容器C2的情况下，C1PresetConstl＝-45、C2PresetConst2＝-75时，阻抗匹配器实现阻抗匹配的阻抗匹配总时长最短、各工艺启辉步对应的阻抗匹配时长之间的差距最小。
图2是根据本申请另一实施例的一种应用于半导体工艺设备中的阻抗匹 配方法的示意性流程图。如图2所示，图2的方法可包括：
S201，读取当前执行的半导体工艺的工艺配方，确定执行该半导体工艺的当前工艺步时，阻抗匹配器的工作模式是否为Auto Preset模式；若是，则执行S202；若否，则结束流程。
S202，根据工艺配方中记录的射频功率值，确定当前是否处于工艺启辉步；若否，则执行S203；若是，则执行S205。
其中，在射频功率值等于0时，可确定当前处于工艺准备步；在射频功率值大于0时，可确定当前处于工艺启辉步。
S203，将阻抗匹配器的工作模式设置为非自动匹配模式。
其中，非自动匹配模式可为manual模式。
S204，获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位，从而根据参数调节位，调节参数可调器件的参数值。
其中，在S204执行完毕后，结束流程。然后，根据S202，当工艺配方中记录的射频功率值大于0时，执行S205。
在一个实施例中，参数调节位可包括第一参数调节位、参数修正值和第二参数调节位。第二参数调节位为第一参数调节位和参数修正值之和。在执行S204时，可根据第二参数调节位，调节参数可调器件的参数值。
在一个实施例中，参数调节位可包括第一参数调节位、参数修正值、第二参数调节位和预设参数匹配值。第二参数调节位为第一参数调节位、预设参数匹配值和参数修正值之和。在根据第二参数调节位，调节参数可调器件的参数值后，阻抗匹配器的阻抗匹配总时长最短、各工艺启辉步对应的阻抗匹配时长之间的差距最小。
S205，将阻抗匹配器的工作模式设置为自动匹配模式。
其中，自动匹配模式可为Auto模式。
S206，通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位；根据当前参数调节位，更新S204中的阻抗匹配数据。然后结束流程。
上述S201-S206的具体过程在上述实施例中已进行详细说明，此处不再赘述。
采用本申请实施例的技术方案，通过在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位，从而根据参数调节位，调节参数可调器件的参数值。由于参数可调器件的不同参数调节位对应不同的参数值，因此，采用该技术方案实现了在工艺准备步自动调节参数可调器件的参数值的效果。并且，在工艺启辉步中，通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位，根据当前参数调节位，更新阻抗匹配数据。可见，该技术方案能够在工艺启辉步达到阻抗匹配时，根据阻抗匹配时的参数可调器件的参数调节位，不断更新工艺启辉步对应的阻抗匹配数据中的参数调节位，从而在再次执行相同的工艺启辉步之前，能够根据阻抗匹配数据中的参数调节位准确的自动调节参数可调器件，实现了在半导体工艺过程中反馈调节阻抗匹配数据中的参数调节位的效果，大大缩短了阻抗匹配时间，提高了阻抗匹配效率。
综上，已经对本主题的特定实施例进行了描述。其它实施例在所附权利要求书的范围内。在一些情况下，在权利要求书中记载的动作可以按照不同的顺序来执行并且仍然可以实现期望的结果。另外，在附图中描绘的过程不一定要求示出的特定顺序或者连续顺序，以实现期望的结果。在某些实施方式中，多任务处理和并行处理可以是有利的。
以上为本申请实施例提供的应用于半导体工艺设备中的阻抗匹配方法，基于同样的思路，本申请实施例还提供一种半导体工艺设备。
图3是根据本申请一实施例的一种半导体工艺设备的结构示意图。如图3所示，半导体工艺设备可包括射频电源310、阻抗匹配器320和工艺腔室330；其中，
射频电源310，用于通过阻抗匹配器320向工艺腔室330加载射频功率；
阻抗匹配器320包括控制器321和参数可调器件322，控制器321，用于在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器320中参数可调器件322对应的参数调节位；根据参数调节位，调节参数可调器件322的参数值；在工艺启辉步中，在射频电源310通过阻抗匹配器320向半导体工艺设备的工艺腔室330加载射频功率时，调节参数可调器件322以达到阻抗匹配，并在达到阻抗匹配时确定参数可调器件322的当前参数调节位；根据当前参数调节位，更新阻抗匹配数据。
在一个实施例中，阻抗匹配器320的工作模式包括自动匹配模式和非自动匹配模式；
控制器321，还用于在工艺准备步中，将阻抗匹配器320设置为非自动匹配模式；在工艺启辉步中，将阻抗匹配器320设置为自动匹配模式。
在一个实施例中，参数调节位包括第一参数调节位、参数修正值和第二参数调节位，第二参数调节位为第一参数调节位和参数修正值之和；
控制器321，还用于根据第二参数调节位，调节参数可调器件322的参数值。
在一个实施例中，控制器321还用于：
根据当前参数调节位，更新第一参数调节位；
根据更新后的第一参数调节位和参数修正值，更新第二参数调节位。
在一个实施例中，参数调节位还包括预设参数匹配值；第二参数调节位为第一参数调节位、预设参数匹配值和参数修正值之和；
在根据第二参数调节位，调节参数可调器件322后，阻抗匹配器320的阻抗匹配信息满足预设条件；
阻抗匹配信息包括以下至少一项：阻抗匹配总时长、各工艺启辉步对应的阻抗匹配时长之间的差距；
预设条件包括以下至少一项：阻抗匹配总时长最短、各工艺启辉步对应的阻抗匹配时长之间的差距最小。
在一个实施例中，控制器321还用于：
确定参数可调器件322对应的多个待筛选参数匹配值；
分别根据各待筛选参数匹配值对应的第二参数调节位调节参数可调器件322的参数调节位；
在每次调节参数可调器件322的参数调节位之后，进行一次启辉，确定各个待筛选参数匹配值对应的阻抗匹配时长；
根据确定的多个阻抗匹配时长，确定符合预设条件的阻抗匹配时长对应的待筛选参数匹配值为预设参数匹配值。
具体的，控制器321可以基于PLC(Programmable Logic Controller，可编程逻辑控制器)、下位机、上位机等各种具有处理能力的硬件或它们的组合实现。
在一个实施例中，参数可调器件322包括可调电容器和/或可调电感。
采用本申请实施例的装置，通过在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位，从而根据参数调节位，调节参数可调器件的参数值。由于参数可调器件的不同参数调节位对应不同的参数值，因此，采用该装置实现了在工艺准备步自动调节参数可调器件的参数值的效果。并 且，在工艺启辉步中，通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位，根据当前参数调节位，更新阻抗匹配数据。可见，该装置能够在工艺启辉步达到阻抗匹配时，根据阻抗匹配时的参数可调器件的参数调节位，不断更新工艺启辉步对应的阻抗匹配数据中的参数调节位，从而在再次执行相同的工艺启辉步之前，能够根据阻抗匹配数据中的参数调节位准确的自动调节参数可调器件，实现了在半导体工艺过程中反馈调节阻抗匹配数据中的参数调节位的效果，大大缩短了阻抗匹配时间，提高了阻抗匹配效率。
图4是根据本申请一实施例的一种半导体工艺设备的示意性框图，如图4所示，半导体工艺设备可包括依次连接的射频电源310、阻抗匹配器320和工艺腔室330。
其中，阻抗匹配器320包括相互连接的传感器323、控制器321以及参数可调器件。传感器323与射频电源310连接，且通过参数可调器件与工艺腔室330连接。
其中，射频电源310和工艺腔室330分别接地。参数可调器件包括第一可调电容器3221和第二可调电容器3222。第一可调电容器3221并联于传感器323和地之间，第二可调电容器3222串联于传感器323和工艺腔室330之间，第一可调电容器3221和第二可调电容器3222分别与控制器321连接。第二可调电容器3222和工艺腔室330之间还连接有电感324，在电感324的作用下，阻抗匹配器320的阻抗特性和工艺腔室330的阻抗特性一致。
采用图4所示的半导体工艺设备在实现阻抗匹配时，通过传感器323采集阻抗匹配器320和工艺腔室330的阻抗之和，作为第一阻抗，并将第一阻抗发送至控制器321，控制器321根据第一阻抗与射频电源310的输出阻抗之间的差异，确定可调电容器的目标电容值，并将目标电容值传输至可调电 容器中的电容控制模块(未在图4中示出)，以使电容控制模块将可调电容器的电容值调整为目标电容值，实现阻抗匹配。
需要说明的是，图4和图3所示的半导体工艺设备中标号相同的各器件所起到的作用一致，为避免重复，此处不另赘述。
本领域的技术人员应可理解，图3和图4中的半导体工艺设备能够用来实现前文所述的应用于半导体工艺设备中的阻抗匹配方法，其中的细节描述应与前文方法部分描述类似，为避免繁琐，此处不另赘述。
基于同样的思路，本申请实施例还提供一种阻抗匹配设备，如图5所示。阻抗匹配设备可因配置或性能不同而产生比较大的差异，可以包括一个或一个以上的处理器501和存储器502，存储器502中可以存储有一个或一个以上存储应用程序或数据。其中，存储器502可以是短暂存储或持久存储。存储在存储器502的应用程序可以包括一个或一个以上模块(图示未示出)，每个模块可以包括对阻抗匹配设备中的一系列计算机可执行指令。更进一步地，处理器501可以设置为与存储器502通信，在阻抗匹配设备上执行存储器502中的一系列计算机可执行指令。阻抗匹配设备还可以包括一个或一个以上电源503，一个或一个以上有线或无线网络接口504，一个或一个以上输入输出接口505，一个或一个以上键盘506。
具体在本实施例中，阻抗匹配设备包括有存储器，以及一个或一个以上的程序，其中一个或者一个以上程序存储于存储器中，且一个或者一个以上程序可以包括一个或一个以上模块，且每个模块可以包括对阻抗匹配设备中的一系列计算机可执行指令，且经配置以由一个或者一个以上处理器执行该一个或者一个以上程序包含用于进行以下计算机可执行指令：
工艺准备步：获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位；根据参数调节位，调节参数可调器件的参数值；
工艺启辉步：通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位；根据当前参数调节位，更新阻抗匹配数据。
采用本申请实施例的设备，通过在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，阻抗匹配数据包括半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位，从而根据参数调节位，调节参数可调器件。由于参数可调器件的不同参数调节位对应不同的参数值，因此，采用该设备实现了在工艺准备步自动调节参数可调器件的参数值的效果。并且，在工艺启辉步中，通过阻抗匹配器向半导体工艺设备的工艺腔室加载射频功率，同时通过阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定参数可调器件的当前参数调节位，根据当前参数调节位，更新阻抗匹配数据。可见，该设备能够在工艺启辉步达到阻抗匹配时，根据阻抗匹配时的参数可调器件的参数调节位，不断更新工艺启辉步对应的阻抗匹配数据中的参数调节位，从而在再次执行相同的工艺启辉步之前，能够根据阻抗匹配数据中的参数调节位准确的自动调节参数可调器件，实现了在半导体工艺过程中反馈调节阻抗匹配数据中的参数调节位的效果，大大缩短了阻抗匹配时间，提高了阻抗匹配效率。
本申请实施例还提出了一种存储介质，该存储介质存储一个或多个计算机程序，该一个或多个计算机程序包括指令，该指令当被包括多个应用程序的电子设备执行时，能够使该电子设备执行上述应用于半导体工艺设备中的阻抗匹配方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
上述实施例阐明的系统、装置、模块或单元，具体可以由计算机芯片或实体实现，或者由具有某种功能的产品来实现。一种典型的实现设备为计算机。具体的，计算机例如可以为个人计算机、膝上型计算机、蜂窝电话、相 机电话、智能电话、个人数字助理、媒体播放器、导航设备、电子邮件设备、游戏控制台、平板计算机、可穿戴设备或者这些设备中的任何设备的组合。
为了描述的方便，描述以上装置时以功能分为各种单元分别描述。当然，在实施本申请时可以把各单元的功能在同一个或多个软件和/或硬件中实现。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步 骤。
在一个典型的配置中，计算设备包括一个或多个处理器(CPU)、输入/输出接口、网络接口和内存。
内存可能包括计算机可读介质中的非永久性存储器，随机存取存储器(RAM)和/或非易失性内存等形式，如只读存储器(ROM)或闪存(flash RAM)。内存是计算机可读介质的示例。
计算机可读介质包括永久性和非永久性、可移动和非可移动媒体可以由任何方法或技术来实现信息存储。信息可以是计算机可读指令、数据结构、程序的模块或其他数据。计算机的存储介质的例子包括，但不限于相变内存(PRAM)、静态随机存取存储器(SRAM)、动态随机存取存储器(DRAM)、其他类型的随机存取存储器(RAM)、只读存储器(ROM)、电可擦除可编程只读存储器(EEPROM)、快闪记忆体或其他内存技术、只读光盘只读存储器(CD-ROM)、数字多功能光盘(DVD)或其他光学存储、磁盒式磁带，磁带磁磁盘存储或其他磁性存储设备或任何其他非传输介质，可用于存储可以被计算设备访问的信息。按照本文中的界定，计算机可读介质不包括暂存电脑可读媒体(transitory media)，如调制的数据信号和载波。
还需要说明的是，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、商品或者设备中还存在另外的相同要素。
本申请可以在由计算机执行的计算机可执行指令的一般上下文中描述，例如程序模块。一般地，程序模块包括执行特定任务或实现特定抽象数据类型的例程、程序、对象、组件、数据结构等等。也可以在分布式计算环境中 实践本申请，在这些分布式计算环境中，由通过通信网络而被连接的远程处理设备来执行任务。在分布式计算环境中，程序模块可以位于包括存储设备在内的本地和远程计算机存储介质中。
本说明书中的各个实施例均采用递进的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于系统实施例而言，由于其基本相似于方法实施例，所以描述的比较简单，相关之处参见方法实施例的部分说明即可。
以上所述仅为本申请的实施例而已，并不用于限制本申请。对于本领域技术人员来说，本申请可以有各种更改和变化。凡在本申请的精神和原理之内所作的任何修改、等同替换、改进等，均应包含在本申请的权利要求范围之内。

Claims (10)

  1. 一种应用于半导体工艺设备中的阻抗匹配方法，其特征在于，所述方法包括：
    工艺准备步：获取当前存储的工艺启辉步对应的阻抗匹配数据，所述阻抗匹配数据包括所述半导体工艺设备的阻抗匹配器中参数可调器件对应的参数调节位；根据所述参数调节位，调节所述参数可调器件的参数值；
    工艺启辉步：通过所述阻抗匹配器向所述半导体工艺设备的工艺腔室加载射频功率，同时通过所述阻抗匹配器进行阻抗匹配，并在达到阻抗匹配时确定所述参数可调器件的当前参数调节位；根据所述当前参数调节位，更新所述阻抗匹配数据。
  2. 根据权利要求1所述的方法，其特征在于，所述阻抗匹配器的工作模式包括自动匹配模式和非自动匹配模式；
    在所述工艺准备步中，将所述阻抗匹配器设置为所述非自动匹配模式；
    在所述工艺启辉步中，将所述阻抗匹配器设置为所述自动匹配模式。
  3. 根据权利要求1所述的方法，其特征在于，所述参数调节位包括第一参数调节位、参数修正值和第二参数调节位，所述第二参数调节位为所述第一参数调节位和所述参数修正值之和；
    所述根据所述参数调节位，调节所述参数可调器件的参数值，包括：
    根据所述第二参数调节位，调节所述参数可调器件的参数值。
  4. 根据权利要求3所述的方法，其特征在于，所述根据所述当前参数调节位，更新所述阻抗匹配数据，包括：
    根据所述当前参数调节位，更新所述第一参数调节位；
    根据更新后的所述第一参数调节位和所述参数修正值，更新所述第二参 数调节位。
  5. 根据权利要求3或4所述的方法，其特征在于，所述参数调节位还包括预设参数匹配值；所述第二参数调节位为所述第一参数调节位、所述预设参数匹配值和所述参数修正值之和；
    在根据所述第二参数调节位，调节所述参数可调器件的参数值后，所述阻抗匹配器的阻抗匹配信息满足预设条件；
    所述阻抗匹配信息包括以下至少一项：阻抗匹配总时长、各所述工艺启辉步对应的所述阻抗匹配时长之间的差距；
    所述预设条件包括以下至少一项：所述阻抗匹配总时长最短、各所述工艺启辉步对应的所述阻抗匹配时长之间的差距最小。
  6. 根据权利要求5所述的方法，其特征在于，还包括：
    确定所述参数可调器件对应的多个待筛选参数匹配值；
    分别根据各所述待筛选参数匹配值对应的所述第二参数调节位调节所述参数可调器件的参数调节位；
    在每次调节所述参数可调器件的参数调节位之后，进行一次启辉，确定各个所述待筛选参数匹配值对应的阻抗匹配时长；
    根据确定的多个所述阻抗匹配时长，确定符合所述预设条件的所述阻抗匹配时长对应的所述待筛选参数匹配值为所述预设参数匹配值。
  7. 根据权利要求1所述的方法，其特征在于，所述参数可调器件包括可调电容器和/或可调电感。
  8. 一种半导体工艺设备，其特征在于，包括射频电源、阻抗匹配器和工艺腔室；其中，
    所述射频电源，用于通过所述阻抗匹配器向所述工艺腔室加载射频功 率；
    所述阻抗匹配器包括控制器和参数可调器件，所述控制器，用于在工艺准备步中，获取当前存储的工艺启辉步对应的阻抗匹配数据，所述阻抗匹配数据包括所述半导体工艺设备阻抗匹配器中参数可调器件对应的参数调节位；根据所述参数调节位，调节所述参数可调器件的参数值；在工艺启辉步中，在所述射频电源通过所述阻抗匹配器向所述半导体工艺设备的工艺腔室加载射频功率时，调节所述参数可调器件以达到阻抗匹配，并在达到阻抗匹配时确定所述参数可调器件的当前参数调节位；根据所述当前参数调节位，更新所述阻抗匹配数据。
  9. 根据权利要求8所述的半导体工艺设备，其特征在于，所述阻抗匹配器的工作模式包括自动匹配模式和非自动匹配模式；
    所述控制器，还用于在所述工艺准备步中，将所述阻抗匹配器设置为所述非自动匹配模式；在所述工艺启辉步中，将所述阻抗匹配器设置为所述自动匹配模式。
  10. 根据权利要求8所述的半导体工艺设备，其特征在于，所述参数调节位包括第一参数调节位、参数修正值和第二参数调节位，所述第二参数调节位为所述第一参数调节位和所述参数修正值之和；
    所述控制器，还用于根据所述第二参数调节位，调节所述参数可调器件的参数值。
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