WO2023044925A1 - 时间码同步方法、装置、摄像装置和计算机可读存储介质 - Google Patents

时间码同步方法、装置、摄像装置和计算机可读存储介质 Download PDF

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WO2023044925A1
WO2023044925A1 PCT/CN2021/121077 CN2021121077W WO2023044925A1 WO 2023044925 A1 WO2023044925 A1 WO 2023044925A1 CN 2021121077 W CN2021121077 W CN 2021121077W WO 2023044925 A1 WO2023044925 A1 WO 2023044925A1
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Prior art keywords
time code
frame period
actual
clock
camera
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PCT/CN2021/121077
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English (en)
French (fr)
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杨磊
余良
王黎
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深圳市大疆创新科技有限公司
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Priority to PCT/CN2021/121077 priority Critical patent/WO2023044925A1/zh
Publication of WO2023044925A1 publication Critical patent/WO2023044925A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/06Generation of synchronising signals
    • H04N5/067Arrangements or circuits at the transmitter end

Definitions

  • the embodiments of the present application relate to the field of computer technology, and in particular to a time code synchronization method, device, camera and computer-readable storage medium.
  • Time code (time code, TC) is the time code recorded by the camera for each frame of image when recording video.
  • TC time code
  • the same time code synchronization device is usually inserted into each camera device one by one for a certain period of time, so that the time code of each camera device is synchronized with the same reference source.
  • frame drift may occur in the time code generated by the camera device, so the state of time code synchronization cannot be maintained for a long time.
  • the embodiment of the present application proposes a time code synchronization method, device, camera, and computer-readable storage medium to solve the problem of frame drift in the time code generated by the camera in the prior art, resulting in the camera device being unable to keep track of time for a long time.
  • the embodiment of the present application provides a time code synchronization method, including: after the time code synchronization device is inserted into the camera device, detecting the reference frame period of the reference time code generated by the time code synchronization device; After the time code synchronization device pulls out the camera device, based on the reference frame cycle, the actual frame cycle of the actual time code generated by the camera device is compensated, so that the actual frame cycle is different from the reference frame cycle Synchronize.
  • the embodiment of the present application provides a time code synchronization device, including: a detection unit configured to detect the reference time code generated by the time code synchronization device after the time code synchronization device is inserted into the camera device. frame period; a compensation unit configured to compensate the actual frame period of the actual time code generated by the camera device based on the reference frame period after the time code synchronization device is unplugged from the camera device, so as to The actual frame period is synchronized with the reference frame period.
  • an embodiment of the present application provides an imaging device, including: a processor and a memory; the memory is used to store program instructions; the processor executes the program instructions stored in the memory, and when the program instructions are During execution, the processor is used to perform the following steps: after the time code synchronization device is inserted into the camera device, detect the reference frame period of the reference time code generated by the time code synchronization device; After the imaging device, based on the reference frame period, the actual frame period of the actual time code generated by the imaging device is compensated, so that the actual frame period is synchronized with the reference frame period.
  • the embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the time code synchronization method as described in the first aspect above is implemented.
  • the embodiment of the present application provides a time code synchronization method, device, camera and computer-readable storage medium, by detecting the reference frame period of the reference time code generated by the time code synchronization device after the time code synchronization device is inserted into the camera device, and After the time code synchronization device pulls out the camera device, based on the reference frame cycle, the actual frame cycle of the actual time code generated by the camera device is compensated, so that the actual frame cycle is synchronized with the reference frame cycle.
  • the actual frame period of the actual time code generated by the camera device will be compensated based on the reference frame period of the reference time code generated by the time code synchronization device, avoiding the actual time code Frame drift occurs, so that the actual time code and the reference time code can be kept in sync for a long time, and further, the time code can be kept in sync between different camera devices for a long time.
  • the time code can be synchronized for a long time, there is no need to repeatedly plug and unplug the time code synchronization device during video shooting, and there is no need to use more time code synchronization devices, which reduces the cost of video shooting.
  • Fig. 1 is the waveform schematic diagram of the time code according to the time code synchronization method of the present application
  • Fig. 2 is a flowchart according to an embodiment of the time code synchronization method of the present application
  • Fig. 3 is the partial waveform schematic diagram of the time code according to the time code synchronization method of the present application
  • FIG. 4 is a schematic diagram of a detection window according to the time code synchronization method of the present application.
  • FIG. 5 is a schematic structural diagram of an embodiment of a time code synchronization device according to the present application.
  • Fig. 6 is a schematic structural diagram of an embodiment of an electronic device according to the present application.
  • the embodiments of the present application can be applied to video recording scenarios.
  • one or more camera devices such as video cameras, cameras, etc.
  • the time code is the time code recorded by the camera device for each frame of image when recording video, which can be used to synchronize various media materials in the later stage.
  • multi-camera shooting that is, when multiple camera devices are used for video recording
  • a time code synchronization device can be used to synchronize the time code.
  • the time code synchronization device can generate time code with high time precision and accurate time period, which can be used as a reference source.
  • the time code can adopt LTC (linear time code, linear time code) format or VITC (vertical interval time code, vertical interval time code) format, etc.
  • the time code may include a synchronization word and time information. As shown in FIG. 1, bit0 to bit63 of the time code may be time information, and bit64 to bit79 may be synchronization words.
  • the synchronization word is used for aligning data during data transmission and processing, and judging whether the data is valid or not.
  • the time information may include, but not limited to, time-related information such as hours, minutes, seconds, frames, time zones, and user-defined information.
  • the camera device can receive and analyze the time code, and synchronize the locally maintained time code according to the analyzed time information.
  • the camera device can count and generate a time code according to a local clock. Because there is usually a frequency offset between the local clock and the clock of the time code synchronization device, as time increases, the difference of the time code data stream also gradually increases, causing the time code to be out of sync. It is necessary to repeat the plugging and unplugging operation of the time code synchronization device at regular intervals to synchronize the time code. This increases the labor cost and time cost of video recording.
  • time code synchronization device In the prior art, it is also possible to first use the same time code synchronization device to synchronize multiple sub-time code synchronization devices, and then use these sub-time code synchronization devices to synchronize multiple camera devices one-to-one, so as to always keep the time generated by each camera device. Timecode sync. However, this method needs to use more time code synchronization devices, and the cost is higher.
  • the method provided in the embodiment of the present application can detect the reference frame period of the reference time code generated by the time code synchronization device after the time code synchronization device is inserted into the camera device, and after the time code synchronization device is pulled out of the camera device, based on the reference frame cycle
  • the period is to compensate the actual frame period of the actual time code generated by the camera device, so that the actual frame period is synchronized with the reference frame period.
  • the actual frame period of the actual time code generated by the camera device will be compensated based on the reference frame period of the reference time code generated by the time code synchronization device, avoiding the actual time code Frame drift occurs, thereby realizing the synchronization of the actual time code and the reference time code for a long time, and further enabling the time code synchronization between different camera devices to be maintained for a long time.
  • only one time code synchronization device can be used to maintain time code synchronization for a long time, and there is no need to repeatedly insert and remove the time code synchronization device, so various costs are controlled.
  • FIG. 2 shows a flowchart according to an embodiment of the time code synchronization method according to the present application.
  • the time code synchronization method of the present application can be run on various camera devices with video recording functions, which may include but not limited to: video cameras, camera heads, smart phones, tablet computers, laptop computers, vehicle-mounted computers, desktop computers , wearable devices, and more.
  • the flow of the time code synchronization method includes the following steps:
  • Step 201 after the time code synchronization device is inserted into the camera device, detect the reference frame period of the reference time code generated by the time code synchronization device.
  • the execution body of the time code synchronization method can use the time code generated by the time code synchronization device as a reference time code, and after the time code synchronization device is inserted into the camera device, detect the time code of the reference time code frame period, and use the detected frame period as the reference frame period of the reference time code.
  • the frame period may be represented by a clock count, or may be represented by a time, which is not specifically limited here.
  • the execution subject may first derive a high-speed clock based on the local clock of the camera device, and use the high-speed clock as the sampling clock.
  • the frequency of the high-speed clock may be greater than or equal to 200 MHz, that is, the duration of each sampling is less than or equal to 5 ns.
  • the execution subject can detect the reference frame period of the reference time code generated by the time code synchronization device based on the clock frequency of the high-speed clock.
  • the reference frame period of the reference time code can be determined by counting the high-speed clock (that is, the number of pulses of the high-speed clock), and the reference period here can be directly counted by the high-speed clock (that is, the number of pulses of the high-speed clock) characterization. Since the high-speed clock frequency is higher, the accuracy is higher. By using the high-speed clock as the sampling clock to calculate the reference frame period, the accuracy of the reference frame period can be improved, and the subsequent compensation accuracy for the actual frame period can be further improved.
  • the following sub-steps S11 and S12 may be performed:
  • Sub-step S11 determine the target bit in the synchronization word of the reference time code, and detect the transition edge in the target bit.
  • the target bit can be preset, for example, it can be set as the last bit of the synchronization word.
  • the transition edge may be a rising edge or a falling edge, which is not specifically limited here.
  • FIG. 3 is a schematic diagram of a partial waveform of a time code.
  • the LTC serial digital signal 1, 0 is specified in the LTC time code specification.
  • 0bit has transition edges at the beginning and end of the signal
  • 1bit has transition edges at the beginning, end and middle of the signal.
  • the target bit of the synchronization word of the time code may be the last bit in the synchronization word
  • the target bit is 1 bit
  • the transition edge in the middle of the target bit may be captured.
  • Sub-step S12 based on the clock frequency of the high-speed clock and the number of pulses of the high-speed clock between two adjacent transition edges, determine the reference frame period of the reference time code.
  • the two adjacent transition edges are the transition edges of the target bits in the synchronization words of the two adjacent time codes in the time code data stream.
  • the occurrence moment of the jump edge can be used as the frame header in the time code data stream.
  • the frame sync moment is determined by capturing the transition edge in the target bit of the sync word of the time code.
  • the frame period can be determined by counting the high-speed clock (that is, the number of pulses of the high-speed clock) separated by every two captured frame synchronization moments.
  • the execution subject may detect transition edges in the target bit by setting a detection window.
  • the detection window may first be configured within the target bits of the synchronization word of the reference time code. After that, detect the initial level detected in the window.
  • n consecutive initial levels, m other consecutive levels, and n consecutive reverse initial levels are sequentially detected, it is determined that a transition edge is detected.
  • both m and n are positive integers, and other levels are not initial levels and are not reverse initial levels.
  • Fig. 4 shows a schematic diagram of a detection window.
  • the starting moment of the detection window can be set after the previous jump edge, and the window period can be determined according to the frame rate (such as 25Hz, 30Hz, etc.) of the time code synchronization device to ensure that the middle jump edge can was captured.
  • the frame rate such as 25Hz, 30Hz, etc.
  • 3 consecutive initial levels, 6 consecutive other levels, and 3 consecutive reverse initial levels are sequentially detected through the detection window, it can be determined that a transition edge is detected.
  • the problem of inaccurate sampling by using a high-speed clock due to the long transition time of the original signal can be avoided (for example, when a glitch is collected, it is wrongly judged as a transition edge), and the accuracy of transition edge detection is improved. sex.
  • the execution subject may eliminate the frame period error by counting the average value of multiple frame sampling periods. Specifically, the number of transition edges (that is, the number of frames) detected from the time the time code synchronization device is inserted into the camera device to the time the time code synchronization device is pulled out of the camera device can be counted first. Then, the frame period of each sampling frame is determined based on the clock frequency of the high-speed clock and the number of pulses of the high-speed clock between two adjacent transition edges.
  • the number of pulses of the high-speed clock (that is, the count value of the high-speed clock) between every two adjacent transition edges can be directly taken as the frame period of a sampling frame.
  • a reference frame period of the reference time code is determined.
  • the average value of the frame period of each sampling frame can be counted (may be referred to as the first average value), and use the first average value as the reference frame period of the reference time code.
  • S1 and S2 can be set as required, and are not specifically limited here.
  • S1 can be 128, and S2 can be 512.
  • the average value of the frame periods of the sampling frames whose number is the second preset threshold can be counted according to the order of sampling time from back to first (may be referred to as the second average value), and use the second average value as the reference frame period of the reference time code.
  • the average value of the latest S2 frame periods as the reference frame period can reduce the amount of calculated data, thereby increasing the calculation speed.
  • the user may be prompted to reinsert the timecode synchronization device.
  • the frame period error can be eliminated, the accuracy of the reference frame period is improved, and the compensation accuracy of the actual frame period of the actual time code generated by the camera device is improved.
  • Step 202 after the time code synchronization device pulls out the camera device, based on the reference frame cycle, compensate the actual frame cycle of the actual time code generated by the camera device, so that the actual frame cycle is synchronized with the reference frame cycle.
  • the execution subject can also compensate the actual frame cycle of the actual time code generated by the camera device based on the reference frame cycle, so that the actual frame cycle is consistent with the reference frame cycle.
  • Frame period synchronization according to the difference of the local clock crystal oscillator of the camera device, different compensation methods can be adopted.
  • the local clock crystal oscillator is a clock such as VCXO (voltage-controlled crystal oscillator, voltage-controlled crystal oscillator), TCVCXO (temperature-compensated VCXO, temperature-compensated voltage-controlled crystal oscillator)
  • VCXO voltage-controlled crystal oscillator, voltage-controlled crystal oscillator
  • TCVCXO temperature-compensated VCXO, temperature-compensated voltage-controlled crystal oscillator
  • the actual frame period can be compensated by compensating the local clock frequency.
  • the frame rate of the reference time code may be firstly determined based on the reference frame period, and the theoretical frame period of the reference time code may be determined based on the frame rate.
  • the theoretical frame period can also be represented by a count value of the high-speed clock (that is, the number of pulses of the high-speed clock). Then, the actual frame period can be compensated based on the deviation between the theoretical frame period and the actual frame period of the actual time code generated by the camera.
  • the standard frame periods of the frame rates of different gears may be acquired first.
  • the standard frame period can be represented by the count value of the local clock (that is, the number of pulses of the local clock).
  • the standard frame period of a time code with a frame rate of 25 Hz can be marked as X
  • the standard frame period of a time code with a frame rate of 30 Hz can be marked as Y.
  • the frame rate corresponding to the standard frame period closest to the reference frame period may be used as the frame rate of the reference time code. If the reference frame period is Z, and Z is closest to X, then the frame rate of the reference time code is 25Hz.
  • the reference frame period may deviate from the theoretical frame period of the reference time code generated by the time code synchronization device.
  • the theoretical value of the sampling frequency of the sampling clock is 200MHz, and the actual value may be 200.1MHz (that is, there is a frequency offset of 0.1MHz).
  • the theoretical frame period of one frame needs to be determined based on the reference frame period.
  • the frame rate of the reference time code (such as 25Hz)
  • the theoretical value (such as 200MHz) of the sampling frequency of the sampling clock is determined.
  • the specific steps can be performed as follows: first, determine the ratio of the actual frame period to the theoretical frame period, and based on the ratio and the local clock Clock Frequency, which determines the target clock frequency for the local clock.
  • the ratio of the actual frame period to the theoretical frame period is the ratio of the current clock frequency of the local clock to the target clock frequency.
  • the clock frequency of the local clock is adjusted to the target clock frequency, so that the frame period of the time code generated by the camera device is synchronized with the theoretical frame period.
  • the actual time code and the reference time code can be synchronized for a long time, and the time code synchronization between different camera devices can be maintained for a long time. Since the time code can be synchronized for a long time, there is no need to repeatedly plug and unplug the time code synchronization device during video shooting, and there is no need to use more time code synchronization devices, which reduces the cost of video shooting.
  • the local clock crystal oscillator is a crystal oscillator with an unadjustable clock frequency such as a TCXO (Temperature Compensate X'tal (crystal) Oscillator, temperature-compensated crystal oscillator)
  • the actual frame period can be adjusted. Compensation for the actual frame period is performed in a manner corresponding to the count value of the local clock (that is, the number of pulses of the local clock).
  • both the reference frame period and the actual frame period of the actual time code generated by the camera device can be represented by the number of pulses of the included local clock.
  • the execution subject may be based on the deviation between the reference frame period and the actual frame period of the actual time code generated by the imaging device (that is, the difference in the number of pulses of the included local clock) , to compensate the actual frame period (that is, to compensate the difference in the number of pulses).
  • the actual time code and the reference time code can be synchronized for a long time, and the time code synchronization between different camera devices can be maintained for a long time. Since the time code can be synchronized for a long time, there is no need to repeatedly plug and unplug the time code synchronization device during video shooting, and there is no need to use more time code synchronization devices, which reduces the cost of video shooting.
  • the reference frame period of the reference time code generated by the time code synchronization device is detected, and the time code synchronization device is pulled out of the camera device Finally, based on the reference frame period, the actual frame period of the actual time code generated by the camera device is compensated, so that the actual frame period is synchronized with the reference frame period.
  • the actual frame period of the actual time code generated by the camera device will be compensated based on the reference frame period of the reference time code generated by the time code synchronization device, avoiding the actual time code Frame drift occurs, so that the actual time code and the reference time code can be kept in sync for a long time, and further, the time code can be kept in sync between different camera devices for a long time. Since the time code can be synchronized for a long time, there is no need to repeatedly plug and unplug the time code synchronization device during video shooting, and there is no need to use more time code synchronization devices, which reduces the cost of video shooting.
  • the present application provides an embodiment of a time code synchronization device, and the device embodiment corresponds to the method embodiment shown in FIG. 5 .
  • This electronic device can be used in various imaging devices.
  • the above-mentioned time code synchronization device 500 in this embodiment includes: a detection unit 501 configured to detect the reference frame of the reference time code generated by the above-mentioned time code synchronization device after the time code synchronization device is inserted into the camera device Period; the compensation unit 502 is configured to compensate the actual frame period of the actual time code generated by the above-mentioned camera device based on the above-mentioned reference frame period after the above-mentioned time code synchronization device pulls out the above-mentioned camera device, so that the above-mentioned actual frame The cycle is synchronized with the reference frame cycle mentioned above.
  • the detection unit 501 is further configured to: configure a high-speed clock based on the local clock of the above-mentioned camera device; The reference frame period of the reference timecode.
  • the detection unit 501 is further configured to: determine the target bit in the synchronization word of the reference time code generated by the time code synchronization device, and detect the target bit in the target bit Jumping edge: Based on the clock frequency of the above-mentioned high-speed clock and the number of pulses of the high-speed clock between two adjacent jumping edges, determine the reference frame period of the above-mentioned reference time code.
  • the detection unit 501 is further configured to: configure a detection window in the target bit of the synchronization word of the reference time code; the initial level detected in the detection window is When successively detecting n consecutive initial levels, consecutive m other levels, and consecutive n reverse initial levels, it is determined that a transition edge has been detected, where m and n are both positive integers, and the above-mentioned other levels are not initial levels. Flat and non-inverted initial level.
  • the detection unit 501 is further configured to: collect statistics from the time the time code synchronization device is inserted into the camera device until the time code synchronization device is pulled out of the camera device The number of jumping edges; based on the clock frequency of the above-mentioned high-speed clock and the number of pulses of the high-speed clock between two adjacent jumping edges, determine the frame period of each sampling frame; based on the frame period of at least one sampling frame, determine the above reference The reference frame period for the timecode.
  • the detection unit 501 is further configured to: in response to the number of sampling frames being greater than the first preset threshold and less than the second preset threshold, counting the number of frame periods of each sampling frame The first average value, and use the above first average value as the reference frame period of the reference time code.
  • the detection unit 501 is further configured to: in response to the number of sampling frames being greater than or equal to the second preset threshold, according to the order of sampling time from last to first, the statistical quantity is A second average value of the frame period of the sampling frame of the second preset threshold, and use the second average value as the reference frame period of the reference time code.
  • the above-mentioned compensation unit 502 is further configured to: determine the frame of the above-mentioned reference time code based on the above-mentioned reference frame period in response to the adjustable clock frequency of the local clock of the above-mentioned camera device rate, and determine the theoretical frame period of the reference time code based on the frame rate; based on the deviation between the theoretical frame period and the actual frame period of the actual time code generated by the camera device, the actual frame period is compensated.
  • the compensation unit 502 is further configured to: determine the ratio of the actual frame period to the theoretical frame period, and determine the local A target clock frequency of the clock: adjusting the clock frequency of the above-mentioned local clock to the above-mentioned target clock frequency, so that the frame period of the time code generated by the above-mentioned camera device is synchronized with the above-mentioned theoretical frame period.
  • the above-mentioned compensation unit 502 is further configured to: in response to the fact that the clock frequency of the local clock of the above-mentioned camera device is not adjustable, based on the above-mentioned reference frame period and the actual The deviation of the actual frame period of the time code is compensated for the above-mentioned actual frame period.
  • the detection unit 501 and the compensation unit 502 may be hardware circuits, or software computer program instructions.
  • the device provided by the above-mentioned embodiments of the present application detects the reference frame period of the reference time code generated by the time code synchronization device after the time code synchronization device is inserted into the camera device, and after the time code synchronization device is pulled out of the camera device, based on The reference frame period is used to compensate the actual frame period of the actual time code generated by the camera device, so that the actual frame period is synchronized with the reference frame period.
  • the actual frame period of the actual time code generated by the camera device will be compensated based on the reference frame period of the reference time code generated by the time code synchronization device, avoiding the actual time code Frame drift occurs, so that the actual time code and the reference time code can be kept in sync for a long time, and further, the time code can be kept in sync between different camera devices for a long time. Since the time code can be synchronized for a long time, there is no need to repeatedly plug and unplug the time code synchronization device during video shooting, and there is no need to use more time code synchronization devices, which reduces the cost of video shooting.
  • the present application provides an embodiment of an imaging device, which corresponds to the method embodiment shown in FIG. 2 .
  • the camera device may specifically include: a processor 601 and a memory 602 .
  • the aforementioned memory 601 may be used to store program instructions.
  • the above-mentioned processor 602 can be used to execute the program instructions stored in the above-mentioned memory.
  • the above-mentioned processor can be used to perform the following steps: after the time code synchronization device is inserted into the camera device, detect the The reference frame cycle of the generated reference time code; after the above-mentioned time code synchronization device pulls out the above-mentioned camera device, based on the above-mentioned reference frame cycle, the actual frame cycle of the actual time code generated by the above-mentioned camera device is compensated, so that the above-mentioned actual The frame period is synchronized with the aforementioned reference frame period.
  • the above-mentioned processor is further configured to: configure a high-speed clock based on the local clock of the above-mentioned camera device; based on the clock frequency of the above-mentioned high-speed clock, detect the reference time generated by the above-mentioned time code synchronization device Code reference frame period.
  • the processor is further configured to: determine a target bit in the synchronization word of the reference time code generated by the time code synchronization device, and detect a transition edge in the target bit ; Based on the clock frequency of the above-mentioned high-speed clock and the number of pulses of the high-speed clock between two adjacent transition edges, determine the reference frame period of the above-mentioned reference time code.
  • the processor is further configured to: configure a detection window in the target bit of the synchronization word of the reference time code; the initial level detected in the detection window is sequentially detected When there are n consecutive initial levels, m other consecutive levels, and n consecutive reverse initial levels, it is determined that a transition edge is detected, where m and n are both positive integers, and the above other levels are not initial levels and are not Reverse initial level.
  • the processor is further configured to: count the jumps detected from the time the time code synchronization device is inserted into the camera device until the time code synchronization device is pulled out of the camera device The number of edges; based on the clock frequency of the above-mentioned high-speed clock and the number of pulses of the high-speed clock between two adjacent jump edges, determine the frame period of each sampling frame; based on the frame period of at least one sampling frame, determine the period of the above-mentioned reference time code Reference frame period.
  • the above-mentioned processor is further configured to: in response to the number of sampling frames being greater than the first preset threshold and less than the second preset threshold, counting the first average of the frame periods of each sampling frame value, and use the first average value above as the reference frame period of the reference time code.
  • the above processor is further configured to: respond to the number of sampling frames being greater than or equal to a second preset threshold, according to the order of sampling time from back to first, the statistical quantity is the above second A second average value of the frame period of the sampling frame of the preset threshold value, and use the second average value as the reference frame period of the reference time code.
  • the processor is further configured to: determine the frame rate of the reference time code based on the reference frame period in response to the adjustable clock frequency of the local clock of the camera device, and determining the theoretical frame period of the reference time code based on the frame rate; and compensating the actual frame period based on the deviation between the theoretical frame period and the actual frame period of the actual time code generated by the camera device.
  • the processor is further configured to: determine the ratio of the actual frame period to the theoretical frame period, and determine the target of the local clock based on the ratio and the clock frequency of the local clock Clock frequency: adjusting the clock frequency of the local clock to the target clock frequency, so that the frame period of the time code generated by the camera device is synchronized with the theoretical frame period.
  • the processor is further configured to: respond to the unadjustable clock frequency of the local clock of the camera device, based on the difference between the reference frame period and the actual time code generated by the camera device The deviation of the actual frame period is compensated for the above-mentioned actual frame period.
  • the camera device detects the reference frame period of the reference time code generated by the time code synchronization device after the time code synchronization device is inserted into the camera device, and after the time code synchronization device pulls out the camera device , based on the reference frame period, compensate the actual frame period of the actual time code generated by the camera device, so that the actual frame period is synchronized with the reference frame period.
  • the actual frame period of the actual time code generated by the camera device will be compensated based on the reference frame period of the reference time code generated by the time code synchronization device, avoiding the actual time code Frame drift occurs, so that the actual time code and the reference time code can be kept in sync for a long time, and further, the time code can be kept in sync between different camera devices for a long time. Since the time code can be synchronized for a long time, there is no need to repeatedly plug and unplug the time code synchronization device during video shooting, and there is no need to use more time code synchronization devices, which reduces the cost of video shooting.
  • the description is relatively simple, and for related parts, please refer to the part of the description of the embodiment of the method.
  • the embodiment of the present application also provides a computer-readable storage medium.
  • a computer program is stored on the computer-readable storage medium.
  • the computer program is executed by a processor, each process of the embodiment of the above-mentioned time code synchronization method can be realized, and the same can be achieved. technical effect.
  • the various processes of the embodiments of the above-mentioned methods are implemented, which will not be repeated here.
  • the embodiments of the present application may be provided as methods, apparatuses, or computer program products. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
  • computer-readable storage media including but not limited to disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture comprising instruction means, the The instruction means implements the functions specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

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Abstract

本申请实施例公开了时间码同步方法、装置、摄像装置和计算机可读存储介质。在时间码同步装置插入摄像装置后,检测时间码同步装置所产生的参考时间码的参考帧周期;在时间码同步装置拔出摄像装置后,基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,以使实际帧周期与参考帧周期同步。该实现方式可使摄像装置长时间保持与时间码参考源同步,降低了视频拍摄的成本。

Description

时间码同步方法、装置、摄像装置和计算机可读存储介质 技术领域
本申请实施例涉及计算机技术领域,具体涉及时间码同步方法、装置、摄像装置和计算机可读存储介质。
背景技术
时间码(time code,TC)是摄像装置在录制视频时针对每一帧图像记录的时间编码。在视频拍摄场景中,为了使各摄像装置采集的视频帧同步,各摄像装置需在视频录制前与同一时间码参考源进行同步。
现有技术中,通常将同一个时间码同步装置逐一插入至各摄像装置一定时长,使各摄像装置的时间码与同一参考源同步。然而,在摄像装置使用过程中,摄像装置所产生的时间码会出现帧漂移的情况,因此时间码同步的状态无法长时间保持。
发明内容
本申请实施例提出了时间码同步方法、装置、摄像装置和计算机可读存储介质,以解决现有技术中因摄像装置所产生的时间码出现帧漂移情况,导致摄像装置无法长时间保持与时间码参考源同步的技术问题。
第一方面,本申请实施例提供了一种时间码同步方法,包括:在时间码同步装置插入摄像装置后,检测所述时间码同步装置所产生的参考时间码的参考帧周期;在所述时间码同步装置拔出所述摄像装置后,基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使所述实际帧周期与所述参考帧周期同步。
第二方面,本申请实施例提供了一种时间码同步装置,包括:检测单元,被配置成在时间码同步装置插入摄像装置后,检测所述时间码同步装置所产生的参考时间码的参考帧周期;补偿单元,被配置成在所述时间码同步装置拔出所述摄像装置后,基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使所述实际帧周期与所述参考帧周期同步。
第三方面,本申请实施例提供了一种摄像装置,包括:处理器和存储器;所述存储器,用于存储程序指令;所述处理器,执行所述存储器存储的程序指令,当程序指令被执行时,所述处理器用于执行如下步骤:在时间码同步装置插入摄像装置后,检测所述时间码同步装置所产生的参考时间码的参考帧周期;在所述时间码同步装置拔出所述摄像装置后,基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使所述实际帧周期与所述参考帧周期同步。
第四方面,本申请实施例提供了一种计算机可读存储介质,其上存储有计算机程序,该程序被处理器执行时实现如上述第一方面中所描述的时间码同步方法。
本申请实施例提供了时间码同步方法、装置、摄像装置和计算机可读存储介质,通过在时间码同步装置插入摄像装置后,检测时间码同步装置所产生的参考时间码的参考帧周期,并在时间码同步装置拔出摄像装置后,基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,使得实际帧周期与参考帧周期同步。由于在将时间码同步装置拔出摄像装置后,摄像装置所产生的实际时间码的实际帧周期会基于时间码同步装置所产生的参考时间码的的参考帧周期得到补偿,避免了实际时间码发生帧漂移,由此可实现实际时间码与参考时间码长时间保持同步,并进一步使得不同摄像装置间能够长时间保持时间码同步。此外,由于时间码可长时间保持同步,因此视频拍摄过程中无需重复进行时间码同步装置的插拔操作,也无需使用更多的时间码同步装置,降低了视频拍摄的成本。
附图说明
通过阅读参照以下附图所作的对非限制性实施例所作的详细描述,本申请的其它特征、目的和优点将会变得更明显:
图1是根据本申请的时间码同步方法的时间码的波形示意图;
图2是根据本申请的时间码同步方法的一个实施例的流程图;
图3是根据本申请的时间码同步方法的时间码的局部波形示意图;
图4是根据本申请的时间码同步方法的检测窗口的示意图;
图5是根据本申请的时间码同步装置的一个实施例的结构示意图;
图6是根据本申请的电子设备的一个实施例的结构示意图。
具体实施例
下面结合附图和实施例对本申请作进一步的详细说明。可以理解的是,此处所描述的具体实施例仅仅用于解释相关发明,而非对该发明的限定。另外还需要说明的是,为了便于描述,附图中仅示出了与有关发明相关的部分。
需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。下面将参考附图并结合实施例来详细说明本申请。
本申请实施例可应用于视频录制场景。在该场景下,可采用一个或多个摄像装置(如摄像机、摄像头等)同时进行视频录制。其中,时间码(time code,TC)是摄像装置在录制视频时针对每一帧图像记录的时间编码,可用于后期同步各种媒体素材。当进行多镜头拍摄时(即采用多个摄像装置进行视频录制时),通常需要对各个摄像装置进行时间码的同步,以便于视频数据的后期处理。
通常,可以采用时间码同步装置进行时间码的同步。时间码同步装置可产生高时间精度及准确时间周期的时间码,该时间码可用作参考源。实践中,时间码可采用LTC(linear time code,线性时间码)格式或者VITC(vertical interval time code,垂直间隔时间码)格式等。以LTC格式的时间码为例,时间码中可包括同步字和时间信息。如图1所示,时间码的bit0至bit63可以是时间信息,bit64至bit79可以是同步字。同步字用于在数据传输、处理过程中对齐数据,判断数据是否有效数据。时间信息中可包括但不限于时、分、秒、帧、时区、用户自定义信息等时间相关的信息。
在将时间码同步装置插入至摄像装置后,摄像装置即可接收并解析时间码,并根据解析的时间信息同步本地所维护的时间码。一种实现方式中,当时间码同步装置拔出后,摄像装置可根据本地时钟计数产生时间码。由于本地时钟和时间码同步装置的时钟通常存在频偏,因此随着时间增加,时间码数据流的差异也逐渐增加,造成时间码不同步。需要 每隔一段时间重复进行时间码同步装置的插拔操作,以进行时间码的同步。由此增加了视频录制的人力成本和时间成本。现有技术中,也可首先采用同一个时间码同步装置同步多个子时间码同步装置,再利用这些子时间码同步装置一对一地同步多个摄像装置,以始终保持各摄像装置所产生的时间码同步。但这种方式需要使用较多的时间码同步装置,成本较高。
本申请实施例提供的方法,可在时间码同步装置插入摄像装置后,检测时间码同步装置所产生的参考时间码的参考帧周期,并在时间码同步装置拔出摄像装置后,基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,使得实际帧周期与参考帧周期同步。由于在将时间码同步装置拔出摄像装置后,摄像装置所产生的实际时间码的实际帧周期会基于时间码同步装置所产生的参考时间码的的参考帧周期得到补偿,避免了实际时间码发生帧漂移,由此实现实际时间码与参考时间码长时间保持同步,进一步使得不同摄像装置间能够长时间保持时间码同步。此外,由于仅采用一个时间码同步装置即可长时间保持时间码同步,且无需重复进行时间码同步装置的插拔,因此控制了各项成本。
请参考图2,其示出了根据本申请的其示出了根据本申请的时间码同步方法的一个实施例的流程图。本申请的时间码同步方法可运行于各种具有视频录制功能的摄像装置,上述摄像装置可以包括但不限于:摄像机、摄像头、智能手机、平板电脑、膝上型便携计算机、车载电脑、台式计算机、可穿戴设备等等。该时间码同步方法的流程包括以下步骤:
步骤201,在时间码同步装置插入摄像装置后,检测时间码同步装置所产生的参考时间码的参考帧周期。
在本实施例中,时间码同步方法的执行主体(如上述摄像装置)可以将时间码同步装置所产生的时间码作为参考时间码,在时间码同步装置插入摄像装置后,检测参考时间码的帧周期,并将检测出的帧周期作为参考时间码的参考帧周期。其中,帧周期可以采用时钟计数来表征,也可以采用时间来表征,此处不作具体限定。
在本实施例的一些可选的实现方式中,执行主体可以首先基于摄像 装置的本地时钟派生高速时钟,将高速时钟作为采样时钟。例如,高速时钟的频率可以大于或等于200MHz,即每次采样时长小于或等于5ns。
在派生出高速时钟后,上述执行主体可基于高速时钟的时钟频率,检测时间码同步装置所产生的参考时间码的参考帧周期。实践中,可通过对高速时钟计数(即高速时钟的脉冲个数)来确定参考时间码的参考帧周期,且此处的参考周期可直接用高速时钟计数(即高速时钟的脉冲个数)来表征。由于高速时钟频率更高,因此精度更高,通过将高速时钟作为采样时钟来进行参考帧周期的计算,可以提高参考帧周期的准确性,进一步提高后续对实际帧周期的补偿精度。
在本实施例的一些可选的实现方式中,在通过高速时钟的时钟频率检测参考时间码的参考帧周期时,可以按照如下子步骤S11和S12执行:
子步骤S11,确定参考时间码的同步字中的目标比特,并检测目标比特内的跳变沿。
此处,目标比特可以预先设定,如可设定为同步字的最后一个比特。跳变沿可以是上升沿或下降沿,此处不作具体限定。作为示例,图3是时间码的局部波形示意图。LTC时间码规范中规定了LTC串行数字信号1、0。如图3所示,0bit在信号首尾有跳变沿,1bit在信号首尾及中间均有跳变沿。在一些示例中,时间码的同步字的目标比特可以是同步字中的最后一个比特,该目标比特为1bit,可捕获该目标比特中的中间的跳变沿。
子步骤S12,基于高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定参考时间码的参考帧周期。
此处,相邻两个跳变沿即时间码数据流中相邻两个时间码的同步字中的目标比特中的跳变沿。跳变沿的发生时刻可以作为时间码数据流中的帧头。通过捕获时间码的同步字的目标比特中的跳变沿,即可确定帧同步时刻。通过每两次捕获到的帧同步时刻所间隔的高速时钟计数(即高速时钟的脉冲个数),即可确定帧周期。
由于时间码的数据流的沿跳变时间在40us左右,采用5ns以内的采样时钟易出现错误采集到毛刺等问题。为解决此问题,在子步骤S11的一些可选的实现方式中,上述执行主体可以通过设置检测窗口的方式, 检测目标比特中的跳变沿。具体地,可以首先在参考时间码的同步字的目标比特内配置检测窗口。之后,检测窗口中检测的初始电平。在依次检测到连续n个初始电平、连续m个其他电平、连续n个反向初始电平时,确定检测到跳变沿。其中,m和n均为正整数,其他电平非初始电平且非反向初始电平。
作为示例,图4示出了检测窗口的示意图。如图4所示,检测窗口的起始时刻可设为前一个跳变沿后,窗口周期可以根据时间码同步装置的帧率(如25Hz、30Hz等)确定,以保证中间的跳变沿能够被捕捉到。在通过检测窗口依次检测到连续3个初始电平、连续6个其他电平、连续3个反向初始电平时,可确定检测到跳变沿。通过这种方式,可避免因原始信号的跳变沿时间过长以致采用高速时钟采样不准确(如采集到毛刺时错误判定为采集到跳变沿)的问题,提高了跳变沿检测的精准性。
此外,由于时间码的数据流的沿跳变时间在40us左右,采用5ns以内的采样时钟还易出现采样时刻不准确的问题。为解决此问题,在子步骤S12的一些可选的实现方式中,上述执行主体可以通过统计多帧采样周期的平均值的方式消除帧周期误差。具体地,可以首先统计从时间码同步装置插入摄像装置起至时间码同步装置拔出摄像装置止所检测出的跳变沿数量(即帧数)。而后,基于高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定各采样帧的帧周期。此处,可直接将每相邻两个跳变沿间隔的高速时钟的脉冲个数(即高速时钟计数值)作为一个采样帧的帧周期。最后,基于至少一个采样帧的帧周期,确定参考时间码的参考帧周期。
作为示例,若采样帧数大于第一预设阈值(可记为S1)且小于第二预设阈值(可记为S2),可以统计各采样帧的帧周期的平均值(可称为第一平均值),并将第一平均值作为参考时间码的参考帧周期。上述S1和S2的具体取值可以根据需要进行设定,此处不作具体限定。例如,S1可以为128,S2可以为512。
作为又一示例,若采样帧数大于或等于第二预设阈值(即S2),可以按照采样时间从后到先的顺序,统计数量为第二预设阈值的采样帧的帧周期的平均值(可称为第二平均值),并将第二平均值作为参考时间码的 参考帧周期。采用最近的S2个帧周期的平均值作为参考帧周期,可减少计算的数据量,从而提高计算速度。
需要说明的是,当采样帧数小于第一预设阈值(即S1)时,可以认为采样帧数过少,采样误差较大,不适合进行补偿。此时,可提示用户重新插入时间码同步装置。
通过统计多帧采样周期的平均值的方式,可消除帧周期误差,提高了参考帧周期的准确性,进而提高了对摄像装置所产生的实际时间码的实际帧周期的补偿的精准性。
步骤202,在时间码同步装置拔出摄像装置后,基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,以使实际帧周期与参考帧周期同步。
在本实施例中,在时间码同步装置拔出摄像装置后,上述执行主体还可以基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,以使实际帧周期与参考帧周期同步。此处,根据摄像装置的本地时钟晶振的不同,可采用不同的补偿方式。
在本实施例的一些可选的实现方式中,当本地时钟晶振为VCXO(voltage-controlled crystal oscilator,压控晶体振荡器)、TCVCXO(temperature-compensated VCXO,温度补偿压控石英振荡器)等时钟频率可调节的晶振时,可采用补偿本地时钟频率的方式进行实际帧周期的补偿。具体地,响应于摄像装置的本地时钟的时钟频率可调节,可以首先基于参考帧周期,确定参考时间码的帧率,并基于帧率确定参考时间码的理论帧周期。此处,理论帧周期也可以采用高速时钟计数值(即高速时钟的脉冲个数)来表征。而后,可以基于理论帧周期与摄像装置所产生的实际时间码的实际帧周期的偏差,对实际帧周期进行补偿。
此处,在基于参考帧周期确定参考时间码的帧率时,可以首先获取不同档位的帧率的标准帧周期。标准帧周期可用本地时钟计数值(即本地时钟的脉冲个数)来表征。如帧率为25Hz的时间码的标准帧周期可记为X,30Hz的时间码的标准帧周期可记为Y。而后,可将参考帧周期最为接近的标准帧周期对应的帧率,作为参考时间码的帧率。如参考帧周期为Z,Z与X最为接近,则参考时间码的帧率即为25Hz。
此处,由于执行主体的采样时钟与理论值存在频偏,因此参考帧周期可能与时间码同步装置所产生的参考时间码的理论帧周期存在偏差。例如,采样时钟采样频率的理论值为200MHz,实际值可能为200.1MHz(即存在0.1MHz的频偏),一帧的理论帧周期需要基于参考帧周期确定参考时间码的帧率(如25Hz)以及采样时钟采样频率的理论值(如200MHz)确定。此示例中,一帧的理论采样计数周期即为200M/25=8M个高速时钟计数值(即高速时钟的脉冲数量)。
此处,在基于理论帧周期与实际帧周期的偏差,对实际帧周期进行补偿时,具体可按照如下步骤执行:首先,确定实际帧周期与理论帧周期的比值,基于该比值和本地时钟的时钟频率,确定本地时钟的目标时钟频率。此处,实际帧周期和理论帧周期的比值,即为本地时钟当前的时钟频率和目标时钟频率的比值。之后,将本地时钟的时钟频率调整为目标时钟频率,以使摄像装置所产生的时间码的帧周期与理论帧周期同步。由此,可实现实际时间码与参考时间码长时间保持同步,并进一步使得不同摄像装置间能够长时间保持时间码同步。由于时间码可长时间保持同步,因此视频拍摄过程中无需重复进行时间码同步装置的插拔操作,也无需使用更多的时间码同步装置,降低了视频拍摄的成本。
在本实施例的一些可选的实现方式中,当本地时钟晶振为TCXO(Temperature Compensate X'tal(crystal)Oscillator,温补型晶振)等时钟频率不可调节的晶振时,可采用调整实际帧周期对应的本地时钟计数值(即本地时钟的脉冲个数)的方式,进行实际帧周期的补偿。具体地,参考帧周期与摄像装置所产生的实际时间码的实际帧周期均可采用所包含本地时钟的脉冲个数表示。响应于摄像装置的本地时钟的时钟频率不可调节,上述执行主体可以基于参考帧周期与摄像装置所产生的实际时间码的实际帧周期的偏差(即所包含的本地时钟的脉冲个数差值),对实际帧周期进行补偿(即补偿脉冲个数差值)。由此,可实现实际时间码与参考时间码长时间保持同步,并进一步使得不同摄像装置间能够长时间保持时间码同步。由于时间码可长时间保持同步,因此视频拍摄过程中无需重复进行时间码同步装置的插拔操作,也无需使用更多的时间码同步装置,降低了视频拍摄的成本。
本申请的上述实施例提供的时间码同步方法,通过在时间码同步装置插入摄像装置后,检测时间码同步装置所产生的参考时间码的参考帧周期,并在时间码同步装置拔出摄像装置后,基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,使得实际帧周期与参考帧周期同步。由于在将时间码同步装置拔出摄像装置后,摄像装置所产生的实际时间码的实际帧周期会基于时间码同步装置所产生的参考时间码的的参考帧周期得到补偿,避免了实际时间码发生帧漂移,由此可实现实际时间码与参考时间码长时间保持同步,并进一步使得不同摄像装置间能够长时间保持时间码同步。由于时间码可长时间保持同步,因此视频拍摄过程中无需重复进行时间码同步装置的插拔操作,也无需使用更多的时间码同步装置,降低了视频拍摄的成本。
进一步参考图5,作为对上述各图所示方法的实现,本申请提供了一种时间码同步装置的一个实施例,该装置实施例与图5所示的方法实施例相对应。该电子设备可以各种摄像装置中。
如图5所示,本实施例上述的时间码同步装置500包括:检测单元501,被配置成在时间码同步装置插入摄像装置后,检测上述时间码同步装置所产生的参考时间码的参考帧周期;补偿单元502,被配置成在上述时间码同步装置拔出上述摄像装置后,基于上述参考帧周期,对上述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使上述实际帧周期与上述参考帧周期同步。
在本实施例的一些可选的实现方式中,上述检测单元501,进一步被配置成:基于上述摄像装置的本地时钟配置高速时钟;基于上述高速时钟的时钟频率,检测上述时间码同步装置所产生的参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述检测单元501,进一步被配置成:确定上述时间码同步装置所产生的参考时间码的同步字中的目标比特,并检测上述目标比特内的跳变沿;基于上述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定上述参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述检测单元501,进一步被配置成:在上述参考时间码的同步字的目标比特内配置检测窗口;上述检测窗口中检测的初始电平,在依次检测到连续n个初始电平、连续m个其他电平、连续n个反向初始电平时,确定检测到跳变沿,其中,m和n均为正整数,上述其他电平非初始电平且非反向初始电平。
在本实施例的一些可选的实现方式中,上述检测单元501,进一步被配置成:统计从上述时间码同步装置插入上述摄像装置起至上述时间码同步装置拔出上述摄像装置止所检测出的跳变沿数量;基于上述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定各采样帧的帧周期;基于至少一个采样帧的帧周期,确定上述参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述检测单元501,进一步被配置成:响应于采样帧数大于第一预设阈值且小于第二预设阈值,统计各采样帧的帧周期的第一平均值,并将上述第一平均值作为参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述检测单元501,进一步被配置成:响应于采样帧数大于或等于第二预设阈值,按照采样时间从后到先的顺序,统计数量为上述第二预设阈值的采样帧的帧周期的第二平均值,并将上述第二平均值作为上述参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述补偿单元502,进一步被配置成:响应于上述摄像装置的本地时钟的时钟频率可调节,基于上述参考帧周期,确定上述参考时间码的帧率,并基于上述帧率确定上述参考时间码的理论帧周期;基于上述理论帧周期与上述摄像装置所产生的实际时间码的实际帧周期的偏差,对上述实际帧周期进行补偿。
在本实施例的一些可选的实现方式中,上述补偿单元502,进一步被配置成:确定上述实际帧周期与上述理论帧周期的比值,基于上述比值和上述本地时钟的时钟频率,确定上述本地时钟的目标时钟频率;将上述本地时钟的时钟频率调整为上述目标时钟频率,以使上述摄像装置所产生的时间码的帧周期与上述理论帧周期同步。
在本实施例的一些可选的实现方式中,上述补偿单元502,进一步被 配置成:响应于上述摄像装置的本地时钟的时钟频率不可调节,基于上述参考帧周期与上述摄像装置所产生的实际时间码的实际帧周期的偏差,对上述实际帧周期进行补偿。
其中,检测单元501和补偿单元502可以是硬件电路,也可以是软件的计算机程序指令。
本申请的上述实施例提供的装置,通过在时间码同步装置插入摄像装置后,检测时间码同步装置所产生的参考时间码的参考帧周期,并在时间码同步装置拔出摄像装置后,基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,使得实际帧周期与参考帧周期同步。由于在将时间码同步装置拔出摄像装置后,摄像装置所产生的实际时间码的实际帧周期会基于时间码同步装置所产生的参考时间码的的参考帧周期得到补偿,避免了实际时间码发生帧漂移,由此可实现实际时间码与参考时间码长时间保持同步,并进一步使得不同摄像装置间能够长时间保持时间码同步。由于时间码可长时间保持同步,因此视频拍摄过程中无需重复进行时间码同步装置的插拔操作,也无需使用更多的时间码同步装置,降低了视频拍摄的成本。
作为对上述图2所示方法的实现,本申请提供了一种摄像装置的一个实施例,该实施例与图2所示的方法实施例相对应。该摄像装置具体可以包括:处理器601和存储器602。
上述存储器601,可以用于存储程序指令。
上述处理器602,可以用于执行上述存储器存储的程序指令,当程序指令被执行时,上述处理器可以用于执行如下步骤:在时间码同步装置插入摄像装置后,检测上述时间码同步装置所产生的参考时间码的参考帧周期;在上述时间码同步装置拔出上述摄像装置后,基于上述参考帧周期,对上述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使上述实际帧周期与上述参考帧周期同步。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:基于上述摄像装置的本地时钟配置高速时钟;基于上述高速时钟的时钟频率,检测上述时间码同步装置所产生的参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:确定上述时间码同步装置所产生的参考时间码的同步字中的目标比特,并检测上述目标比特内的跳变沿;基于上述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定上述参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:在上述参考时间码的同步字的目标比特内配置检测窗口;上述检测窗口中检测的初始电平,在依次检测到连续n个初始电平、连续m个其他电平、连续n个反向初始电平时,确定检测到跳变沿,其中,m和n均为正整数,上述其他电平非初始电平且非反向初始电平。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:统计从上述时间码同步装置插入上述摄像装置起至上述时间码同步装置拔出上述摄像装置止所检测出的跳变沿数量;基于上述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定各采样帧的帧周期;基于至少一个采样帧的帧周期,确定上述参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:响应于采样帧数大于第一预设阈值且小于第二预设阈值,统计各采样帧的帧周期的第一平均值,并将上述第一平均值作为参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:响应于采样帧数大于或等于第二预设阈值,按照采样时间从后到先的顺序,统计数量为上述第二预设阈值的采样帧的帧周期的第二平均值,并将上述第二平均值作为上述参考时间码的参考帧周期。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:响应于上述摄像装置的本地时钟的时钟频率可调节,基于上述参考帧周期,确定上述参考时间码的帧率,并基于上述帧率确定上述参考时间码的理论帧周期;基于上述理论帧周期与上述摄像装置所产生的实际时间码的实际帧周期的偏差,对上述实际帧周期进行补偿。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:确定上述实际帧周期与上述理论帧周期的比值,基于上述比值和上述本地 时钟的时钟频率,确定上述本地时钟的目标时钟频率;将上述本地时钟的时钟频率调整为上述目标时钟频率,以使上述摄像装置所产生的时间码的帧周期与上述理论帧周期同步。
在本实施例的一些可选的实现方式中,上述处理器进一步用于:响应于上述摄像装置的本地时钟的时钟频率不可调节,基于上述参考帧周期与上述摄像装置所产生的实际时间码的实际帧周期的偏差,对上述实际帧周期进行补偿。
本申请的上述实施例所提供的摄像装置,通过在时间码同步装置插入摄像装置后,检测时间码同步装置所产生的参考时间码的参考帧周期,并在时间码同步装置拔出摄像装置后,基于参考帧周期,对摄像装置所产生的实际时间码的实际帧周期进行补偿,使得实际帧周期与参考帧周期同步。由于在将时间码同步装置拔出摄像装置后,摄像装置所产生的实际时间码的实际帧周期会基于时间码同步装置所产生的参考时间码的的参考帧周期得到补偿,避免了实际时间码发生帧漂移,由此可实现实际时间码与参考时间码长时间保持同步,并进一步使得不同摄像装置间能够长时间保持时间码同步。由于时间码可长时间保持同步,因此视频拍摄过程中无需重复进行时间码同步装置的插拔操作,也无需使用更多的时间码同步装置,降低了视频拍摄的成本。
对于摄像装置实施例而言,由于其与方法实施例基本相似,所以描述的比较简单,相关之处参见方法实施例的部分说明即可。
本申请实施例还提供一种计算机可读存储介质,计算机可读存储介质上存储有计算机程序,该计算机程序被处理器执行时实现上述时间码同步方法的实施例的各个过程,且能达到相同的技术效果。为避免重复,该计算机程序被处理器执行时实现上述各方法的实施例的各个过程,这里不再赘述。
本说明书中的各个实施例均采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似的部分互相参见即可。
本领域内的技术人员应明白,本申请的实施例可提供为方法、装置、 或计算机程序产品。因此,本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可读存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请的方法、终端设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理终端设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理终端设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理终端设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理终端设备上,使得在计算机或其他可编程终端设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程终端设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本申请的优选实施例,但本领域内的技术人员一旦得知了基本创造性概念,则可对这些实施例做出另外的变更和修改。所以,所附权利要求意欲解释为包括优选实施例以及落入本申请范围的所有变更和修改。
最后,还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺 序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者终端设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者终端设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、物品或者终端设备中还存在另外的相同要素。
以上对本申请所提供的时间码同步方法、装置、电子设备和计算机可读存储介质,进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的方法及其核心思想;同时,对于本领域的一般技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。

Claims (31)

  1. 一种时间码同步方法,其特征在于,包括:
    在时间码同步装置插入摄像装置后,检测所述时间码同步装置所产生的参考时间码的参考帧周期;
    在所述时间码同步装置拔出所述摄像装置后,基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使所述实际帧周期与所述参考帧周期同步。
  2. 根据权利要求1所述的方法,其特征在于,所述检测所述时间码同步装置所产生的参考时间码的参考帧周期,包括:
    基于所述摄像装置的本地时钟配置高速时钟;
    基于所述高速时钟的时钟频率,检测所述时间码同步装置所产生的参考时间码的参考帧周期。
  3. 根据权利要求2所述的方法,其特征在于,所述基于所述高速时钟的时钟频率,检测所述时间码同步装置所产生的参考时间码的参考帧周期,包括:
    确定所述时间码同步装置所产生的参考时间码的同步字中的目标比特,并检测所述目标比特内的跳变沿;
    基于所述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定所述参考时间码的参考帧周期。
  4. 根据权利要求3所述的方法,其特征在于,所述检测所述目标比特内的跳变沿,包括:
    在所述参考时间码的同步字的目标比特内配置检测窗口;
    所述检测窗口中检测的初始电平,在依次检测到连续n个初始电平、连续m个其他电平、连续n个反向初始电平时,确定检测到跳变沿,其中,m和n均为正整数,所述其他电平非初始电平且非反向初始电平。
  5. 根据权利要求3所述的方法,其特征在于,所述基于所述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定所述参考时间码的参考帧周期,包括:
    统计从所述时间码同步装置插入所述摄像装置起至所述时间码同步装置拔出所述摄像装置止所检测出的跳变沿数量;
    基于所述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定各采样帧的帧周期;
    基于至少一个采样帧的帧周期,确定所述参考时间码的参考帧周期。
  6. 根据权利要求5所述的方法,其特征在于,所述基于至少一个采样帧的帧周期,确定所述参考时间码的参考帧周期,包括:
    响应于采样帧数大于第一预设阈值且小于第二预设阈值,统计各采样帧的帧周期的第一平均值,并将所述第一平均值作为参考时间码的参考帧周期。
  7. 根据权利要求5所述的方法,其特征在于,所述基于所述相邻采样帧的帧周期,确定所述参考时间码的参考帧周期,包括:
    响应于采样帧数大于或等于第二预设阈值,按照采样时间从后到先的顺序,统计数量为所述第二预设阈值的采样帧的帧周期的第二平均值,并将所述第二平均值作为所述参考时间码的参考帧周期。
  8. 根据权利要求1所述的方法,其特征在于,所述基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,包括:
    响应于所述摄像装置的本地时钟的时钟频率可调节,基于所述参考帧周期,确定所述参考时间码的帧率,并基于所述帧率确定所述参考时间码的理论帧周期;
    基于所述理论帧周期与所述摄像装置所产生的实际时间码的实际帧周期的偏差,对所述实际帧周期进行补偿。
  9. 根据权利要求8所述的方法,其特征在于,所述基于所述理论帧周期与所述摄像装置所产生的实际时间码的实际帧周期的偏差,对所述实际帧周期进行补偿,包括:
    确定所述实际帧周期与所述理论帧周期的比值,基于所述比值和所述本地时钟的时钟频率,确定所述本地时钟的目标时钟频率;
    将所述本地时钟的时钟频率调整为所述目标时钟频率,以使所述摄像装置所产生的时间码的帧周期与所述理论帧周期同步。
  10. 根据权利要求1所述的方法,其特征在于,所述基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,包括:
    响应于所述摄像装置的本地时钟的时钟频率不可调节,基于所述参考帧周期与所述摄像装置所产生的实际时间码的实际帧周期的偏差,对所述实际帧周期进行补偿。
  11. 一种时间码同步装置,其特征在于,包括:
    检测单元,被配置成在时间码同步装置插入摄像装置后,检测所述时间码同步装置所产生的参考时间码的参考帧周期;
    补偿单元,被配置成在所述时间码同步装置拔出所述摄像装置后,基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使所述实际帧周期与所述参考帧周期同步。
  12. 根据权利要求11所述的装置,其特征在于,所述检测单元,进一步被配置成:
    基于所述摄像装置的本地时钟配置高速时钟;
    基于所述高速时钟的时钟频率,检测所述时间码同步装置所产生的参考时间码的参考帧周期。
  13. 根据权利要求12所述的装置,其特征在于,所述检测单元,进一步被配置成:
    确定所述时间码同步装置所产生的参考时间码的同步字中的目标比特,并检测所述目标比特内的跳变沿;
    基于所述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定所述参考时间码的参考帧周期。
  14. 根据权利要求13所述的装置,其特征在于,所述检测单元,进一步被配置成:
    在所述参考时间码的同步字的目标比特内配置检测窗口;
    所述检测窗口中检测的初始电平,在依次检测到连续n个初始电平、连续m个其他电平、连续n个反向初始电平时,确定检测到跳变沿,其中,m和n均为正整数,所述其他电平非初始电平且非反向初始电平。
  15. 根据权利要求13所述的装置,其特征在于,所述检测单元,进一步被配置成:
    统计从所述时间码同步装置插入所述摄像装置起至所述时间码同步装置拔出所述摄像装置止所检测出的跳变沿数量;
    基于所述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定各采样帧的帧周期;
    基于至少一个采样帧的帧周期,确定所述参考时间码的参考帧周期。
  16. 根据权利要求15所述的装置,其特征在于,所述检测单元,进一步被配置成:
    响应于采样帧数大于第一预设阈值且小于第二预设阈值,统计各采样帧的帧周期的第一平均值,并将所述第一平均值作为参考时间码的参考帧周期。
  17. 根据权利要求15所述的装置,其特征在于,所述检测单元,进一步被配置成:
    响应于采样帧数大于或等于第二预设阈值,按照采样时间从后到先的顺序,统计数量为所述第二预设阈值的采样帧的帧周期的第二平均值, 并将所述第二平均值作为所述参考时间码的参考帧周期。
  18. 根据权利要求11所述的装置,其特征在于,所述补偿单元,进一步被配置成:
    响应于所述摄像装置的本地时钟的时钟频率可调节,基于所述参考帧周期,确定所述参考时间码的帧率,并基于所述帧率确定所述参考时间码的理论帧周期;
    基于所述理论帧周期与所述摄像装置所产生的实际时间码的实际帧周期的偏差,对所述实际帧周期进行补偿。
  19. 根据权利要求18所述的装置,其特征在于,所述补偿单元,进一步被配置成:
    确定所述实际帧周期与所述理论帧周期的比值,基于所述比值和所述本地时钟的时钟频率,确定所述本地时钟的目标时钟频率;
    将所述本地时钟的时钟频率调整为所述目标时钟频率,以使所述摄像装置所产生的时间码的帧周期与所述理论帧周期同步。
  20. 根据权利要求11所述的装置,其特征在于,所述补偿单元,进一步被配置成:
    响应于所述摄像装置的本地时钟的时钟频率不可调节,基于所述参考帧周期与所述摄像装置所产生的实际时间码的实际帧周期的偏差,对所述实际帧周期进行补偿。
  21. 一种摄像装置,其特征在于,包括:
    处理器和存储器;
    所述存储器,用于存储程序指令;
    所述处理器,执行所述存储器存储的程序指令,当程序指令被执行时,所述处理器用于执行如下步骤:
    在时间码同步装置插入摄像装置后,检测所述时间码同步装置所产生的参考时间码的参考帧周期;
    在所述时间码同步装置拔出所述摄像装置后,基于所述参考帧周期,对所述摄像装置所产生的实际时间码的实际帧周期进行补偿,以使所述实际帧周期与所述参考帧周期同步。
  22. 根据权利要求21所述的摄像装置,其特征在于,所述处理器进一步用于:
    基于所述摄像装置的本地时钟配置高速时钟;
    基于所述高速时钟的时钟频率,检测所述时间码同步装置所产生的参考时间码的参考帧周期。
  23. 根据权利要求22所述的摄像装置,其特征在于,所述处理器进一步用于:
    确定所述时间码同步装置所产生的参考时间码的同步字中的目标比特,并检测所述目标比特内的跳变沿;
    基于所述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定所述参考时间码的参考帧周期。
  24. 根据权利要求23所述的摄像装置,其特征在于,所述处理器进一步用于:
    在所述参考时间码的同步字的目标比特内配置检测窗口;
    所述检测窗口中检测的初始电平,在依次检测到连续n个初始电平、连续m个其他电平、连续n个反向初始电平时,确定检测到跳变沿,其中,m和n均为正整数,所述其他电平非初始电平且非反向初始电平。
  25. 根据权利要求23所述的摄像装置,其特征在于,所述处理器进一步用于:
    统计从所述时间码同步装置插入所述摄像装置起至所述时间码同步装置拔出所述摄像装置止所检测出的跳变沿数量;
    基于所述高速时钟的时钟频率和相邻两个跳变沿间隔的高速时钟的脉冲个数,确定各采样帧的帧周期;
    基于至少一个采样帧的帧周期,确定所述参考时间码的参考帧周期。
  26. 根据权利要求25所述的摄像装置,其特征在于,所述处理器进一步用于:
    响应于采样帧数大于第一预设阈值且小于第二预设阈值,统计各采样帧的帧周期的第一平均值,并将所述第一平均值作为参考时间码的参考帧周期。
  27. 根据权利要求25所述的摄像装置,其特征在于,所述处理器进一步用于:
    响应于采样帧数大于或等于第二预设阈值,按照采样时间从后到先的顺序,统计数量为所述第二预设阈值的采样帧的帧周期的第二平均值,并将所述第二平均值作为所述参考时间码的参考帧周期。
  28. 根据权利要求21所述的摄像装置,其特征在于,所述处理器进一步用于:
    响应于所述摄像装置的本地时钟的时钟频率可调节,基于所述参考帧周期,确定所述参考时间码的帧率,并基于所述帧率确定所述参考时间码的理论帧周期;
    基于所述理论帧周期与所述摄像装置所产生的实际时间码的实际帧周期的偏差,对所述实际帧周期进行补偿。
  29. 根据权利要求28所述的摄像装置,其特征在于,所述处理器进一步用于:
    确定所述实际帧周期与所述理论帧周期的比值,基于所述比值和所述本地时钟的时钟频率,确定所述本地时钟的目标时钟频率;
    将所述本地时钟的时钟频率调整为所述目标时钟频率,以使所述摄像装置所产生的时间码的帧周期与所述理论帧周期同步。
  30. 根据权利要求21所述的摄像装置,其特征在于,所述处理器进 一步用于:
    响应于所述摄像装置的本地时钟的时钟频率不可调节,基于所述参考帧周期与所述摄像装置所产生的实际时间码的实际帧周期的偏差,对所述实际帧周期进行补偿。
  31. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质中存储有计算机程序,所述计算机程序被处理器执行时实现如权利要求1-10中任一所述的方法。
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JP2015233262A (ja) * 2014-06-11 2015-12-24 キヤノン株式会社 信号処理装置
CN107439000A (zh) * 2017-06-12 2017-12-05 深圳市瑞立视多媒体科技有限公司 一种同步曝光的方法、装置及终端设备
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JP2020072300A (ja) * 2018-10-29 2020-05-07 キヤノン株式会社 撮像装置、撮像装置の制御方法およびプログラム
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JP2015233262A (ja) * 2014-06-11 2015-12-24 キヤノン株式会社 信号処理装置
CN107439000A (zh) * 2017-06-12 2017-12-05 深圳市瑞立视多媒体科技有限公司 一种同步曝光的方法、装置及终端设备
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