WO2022262111A1 - Circuit d'élimination du bruit de motif fixe, et capteur d'image - Google Patents

Circuit d'élimination du bruit de motif fixe, et capteur d'image Download PDF

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Publication number
WO2022262111A1
WO2022262111A1 PCT/CN2021/113956 CN2021113956W WO2022262111A1 WO 2022262111 A1 WO2022262111 A1 WO 2022262111A1 CN 2021113956 W CN2021113956 W CN 2021113956W WO 2022262111 A1 WO2022262111 A1 WO 2022262111A1
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WIPO (PCT)
Prior art keywords
switch
circuit
pixel
operational amplifier
resistor
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PCT/CN2021/113956
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English (en)
Chinese (zh)
Inventor
王凯
刘笑霖
苏奎任
齐一泓
李前
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中山大学
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Publication of WO2022262111A1 publication Critical patent/WO2022262111A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array

Definitions

  • the invention relates to the technical field of image sensor signal processing, in particular to a circuit for eliminating fixed pattern noise and an image sensor.
  • CMOS complementary metal oxide semiconductor
  • CIS complementary metal oxide semiconductor
  • CMOS complementary metal oxide semiconductor
  • CIS CMOS image sensor
  • CMOS complementary metal oxide semiconductor
  • CDS complementary metal oxide semiconductor
  • AMP correlated double sampling circuit
  • ADC analog-to-digital converter
  • the pixel array is composed of m ⁇ n pixels arranged in an array
  • the pixel circuits of the existing CIS mainly include passive pixels, active pixels or random read active pixel circuits.
  • a typical passive pixel circuit is usually composed of a MOS tube and a photodiode; a typical active pixel circuit is mainly composed of a photodiode, a reset MOS tube, a source follower MOS tube and a selection switch MOS tube; a random read active
  • the pixel circuit is mainly composed of a photodiode, a MOS amplifier tube, and a switch MOS tube.
  • the noise of the image sensor mainly includes the inherent noise of the device itself and some additional noise introduced by the process flow, circuit structure and working mode. Generally speaking, the former introduces thermal noise and flicker noise, while the latter manifests as KTC noise and fixed pattern noise (Fixed Pattern Noise, FPN).
  • the present invention provides a circuit for eliminating the fixed pattern noise.
  • a circuit for eliminating fixed pattern noise comprising:
  • a bright pixel which is any pixel in the image sensor pixel array, is used to sense incident light and output an analog image signal voltage
  • the dark pixel has the same size, structure and pixel circuit as the bright pixel, and its output voltage is used as the reference voltage of the variable gain differential amplifier circuit;
  • a variable gain differential amplifier circuit which is respectively connected to the bright pixel and the dark pixel, and compares the reference voltage output by the dark pixel and the signal voltage output by the bright pixel to realize the removal of noise in the pixel array of the image sensor and the bright pixel Reading of the sensed incident light intensity signal;
  • the switch circuit is respectively connected between the dark pixel and the variable gain differential amplifier circuit and between the bright pixel and the variable gain differential amplifier circuit, and is used to control the connection or disconnection of the circuit.
  • variable gain differential amplifier circuit includes a sampling capacitor, a second capacitor, and an operational amplifier
  • the switch circuit includes a switch S 1 , a switch S 2 , a switch S 3 , a switch S 4 , and is used to generate a switching circuit sequence to Control the two-phase non-overlapping clock signal generator of each switch
  • the two ends of the second capacitor are respectively connected to the reverse input terminal and the positive output terminal of the operational amplifier, and are connected to the sampling capacitor through the switch S2 ;
  • One end is connected between
  • variable gain differential amplifier circuit includes a first resistor, a variable resistor, and an operational amplifier;
  • the switch circuit includes a switch S0 and a dual-phase non-interconnecting circuit for generating the timing sequence of the switch circuit to control the switch S0 Stacked clock signal generator;
  • the switch S0 is two, wherein the first switch S0 is connected in series with the first resistor between the bright pixel and the inverting input terminal of the operational amplifier, and the second switch S0 is connected in series Between the dark pixel and the positive input of the operational amplifier; one end of the variable resistor is connected in series with the first resistor and connected to the negative input of the operational amplifier, and the other end of the variable resistor is connected to the positive input of the operational amplifier. Connect to the output.
  • the variable resistor is composed of a second resistor connected in series with a third resistor.
  • Another object of the present invention is to provide an image sensor provided with the above-mentioned circuit for eliminating fixed pattern noise.
  • the circuit of the present invention can be applied to the existing CIS pixel structure, including passive pixel, active pixel or random read active pixel circuit.
  • the passive pixel is generally composed of a MOS transistor and a photodiode.
  • the active pixel is mainly composed of a photodiode, a reset MOS transistor, a source follower MOS transistor and a selection switch MOS transistor.
  • the random read active pixel circuit structure includes a photodiode, a MOS amplifier tube and a switch MOS tube; the cathode of the photodiode is controlled by a reset signal, and its anode is connected to the substrate of the MOS amplifier tube; the MOS amplifier tube The source is connected to the drain of the switching MOS transistor, and the gate thereof is controlled by a bias voltage; the source of the switching MOS transistor is connected to a constant current source to convert the output current of the bright pixel or the dark pixel into an output voltage.
  • the constant current source clamps the change of the current magnitude, and converts the current change of bright and dark pixels into the change of the output terminal voltage.
  • the signal voltage of the randomly read bright pixel under the light condition and the output voltage of the randomly read dark pixel under the dark condition are passed through a variable gain differential amplifier circuit By making a difference, the fixed pattern noise can be eliminated or greatly reduced, and the voltage signal of the current light intensity change can be output at the same time.
  • the present invention introduces the difference between the randomly read bright pixel voltage under light conditions and the randomly read dark pixel voltage under dark conditions, and eliminates or minimizes the fixed pattern noise through the design of a variable gain differential amplifier circuit, and reads light strong size. At the same time, by changing the value of the capacitor or the value of the resistor, the gain of the operational amplifier can be changed.
  • FIG. 1 is a schematic structural diagram of an existing image sensor
  • Fig. 2 is a structural schematic diagram of the image sensor of the present invention
  • Fig. 3 shows the block diagram of the circuit principle of the present invention working in the switched capacitor variable gain amplification mode
  • Fig. 4 shows the block diagram of the circuit principle of the present invention working under the variable gain amplification mode of the resistor network
  • Fig. 5 shows the circuit diagram of Embodiment 1 of the present invention
  • Fig. 6 shows the circuit diagram of Embodiment 2 of the present invention
  • Fig. 7 shows the circuit diagram of Embodiment 3 of the present invention.
  • FIG. 8 shows a timing diagram of a switching circuit generated by the dual-phase non-overlapping clock signal generator of the present invention.
  • FIG. 2 shows a schematic structural diagram of the image sensor described in this application.
  • the image sensor of the present invention includes a bright pixel 02, a dark pixel 01, a variable gain differential amplifier circuit and a switch circuit.
  • the bright pixel 02 is any pixel in the pixel array of the image sensor, which is used to sense incident light and output an analog image signal voltage.
  • the dark pixel 01 is a pixel set in the bright pixel 02 array under non-illumination conditions. Its size, structure and pixel circuit are exactly the same as the bright pixel 02.
  • the output voltage of the dark pixel 01 is used as the reference voltage of the variable gain differential amplifier circuit.
  • variable gain differential amplifier circuit is respectively connected to the bright pixel 02 and the dark pixel 01, and is used for differential comparison between the reference voltage output by the dark pixel 01 and the signal voltage output by the bright pixel 02, thereby realizing the removal of noise in the pixel array of the image sensor And read out the incident light intensity signal sensed by the bright pixel 02;
  • the switch circuit is connected between the dark pixel 01 and the variable gain differential amplifier circuit, and between the bright pixel 02 and the variable gain differential amplifier circuit, and is used to control the connection or disconnection of the circuit.
  • the structure of the bright pixel 02 in the present invention can be any pixel structure of the existing complementary metal oxide semiconductor (CMOS) image sensor (CIS), including passive pixels, active pixels or random read active pixel circuits , also including any known pixel structure not listed in this embodiment.
  • the passive pixel is generally composed of a MOS transistor and a photodiode.
  • the active pixel is mainly composed of a photodiode, a reset MOS transistor, a source follower MOS transistor and a selection switch MOS transistor.
  • the structure of the random read active pixel circuit is mainly composed of a photodiode, a MOS amplifier tube, and a switch MOS tube.
  • the structure of the dark pixel 01 is consistent with the bright pixel 02 listed above.
  • Fig. 3 and Fig. 4 wherein Fig. 3 has shown the circuit principle block diagram that the present invention works under the switched capacitor variable gain amplification mode, and Fig. 4 shows the circuit principle that the present invention works under the resistance network variable gain amplification
  • the working mode of the variable gain differential amplifier circuit described in this embodiment includes a switched capacitor variable gain amplification mode and a resistor network variable gain amplification mode; the switched capacitor variable gain amplification mode is mainly realized by a switched capacitor variable gain amplifier circuit , the resistor network variable gain amplification mode is mainly realized by a resistor network variable gain amplifier circuit.
  • the image sensor of the present invention can adopt any one of the above-mentioned two working modes, and can also include the above-mentioned two working modes at the same time. For the specific circuit structure of the two working modes, please refer to the following embodiments 1-3.
  • Embodiments 1-3 will describe the structure of a random read active pixel circuit as a bright and dark pixel, but the pixel structure of the present invention is not limited to For the structures described in Embodiments 1 to 3, using any existing pixel structure to replace the random read active pixel circuit structure described in this embodiment also falls within the protection scope of the present invention.
  • this embodiment exemplarily describes the structure of a switched capacitor variable gain amplifier circuit.
  • a circuit for eliminating fixed pattern noise described in this embodiment includes a dark pixel 01 , a bright pixel 02 , a constant current source Iref, a variable gain differential amplifier circuit, and a switch circuit.
  • the dark pixels 01 are arranged in the pixel array of the image sensor, which can form a column or a row, or be arranged according to actual needs.
  • the bright pixel 02 is any pixel unit under the illumination condition in the image sensor pixel array, and the dark pixel 01 and the bright pixel 02 are respectively connected with the constant current source Iref to convert their output currents into output voltages respectively, and the output is a voltage
  • the pixel structure, this circuit does not need to set the constant current source Iref.
  • the switch circuit is respectively connected between the dark pixel 01 and the variable gain differential amplifier circuit and between the bright pixel 02 and the variable gain differential amplifier circuit, and is used to control the connection or disconnection of the circuit.
  • the dark pixel 01 is mainly composed of a photodiode, a MOS amplifier tube, and a switch MOS tube; the cathode of the photodiode is controlled by a reset signal, and its anode is connected to the substrate of the MOS amplifier tube; the source of the MOS amplifier tube is connected to the drain of the switch MOS tube connected, and its gate is controlled by a bias voltage.
  • the source of the switching MOS transistor is connected to a constant current source Iref to convert the output current of the dark pixel into an output voltage.
  • the size structure and circuit design of the bright pixel 02 are exactly the same as those of the dark pixel 01 , and will not be repeated here.
  • the gate bias voltage controls the MOS amplifier tube to work in the subthreshold region
  • an inversion layer channel is formed.
  • the incident light enters from the photodiode, it is absorbed by the photodiode and converted into photogenerated electron-hole pairs.
  • the holes are swept into the p-type substrate region, which increases the potential of the substrate, which in turn produces a forward body bias on the MOS amplifier tube and reduces the threshold voltage of the MOS amplifier tube.
  • using the principle of high transconductance amplification in the subthreshold region can realize the multiplication of current.
  • the source output terminal of the switching MOS tube is connected to a constant current source, and the current change generated by the light is converted into a voltage change.
  • the variable gain differential amplifier circuit in this embodiment includes a sampling capacitor, a second capacitor C2 and an operational amplifier OPA1.
  • the switching circuit includes a switch S 1 , a switch S 2 , a switch S 3 , a switch S 4 and a dual-phase non-overlapping clock signal generator (not shown in FIG. 4 ) for generating switching circuit timing to control each switch.
  • the timing diagram of the switching circuit generated by the bi-phase non-overlapping clock signal generator is shown in Fig. 8 .
  • One end of the second capacitor C2 is connected to the positive output end of the operational amplifier OPA1, the other end is connected to the inverting input end of the operational amplifier OPA1, and connected to the sampling capacitor through the switch S2.
  • the sampling capacitor is composed of a first capacitor C1 and a third capacitor C3 connected in parallel.
  • the constant current source Iref of the bright pixel 02 is used to represent the constant current source Iref connected to the bright pixel 02
  • the constant current source Iref of the dark pixel 01 is used to represent the constant current source Iref connected to the dark pixel 01, the same below.
  • the output voltage of the bright pixel under the light condition and the output voltage of the dark pixel under the dark condition charge the sampling capacitor composed of the first capacitor and the third capacitor, and the light intensity
  • the information is converted into a voltage signal across a sampling capacitor composed of the first capacitor and the third capacitor.
  • the switch circuit controls the sampling capacitor composed of the first capacitor and the third capacitor to discharge, and charges the amplifying capacitor composed of the second capacitor. Finally, the light intensity signal is transferred to the output terminal.
  • the size and circuit design of the bright and dark pixels are exactly the same as those of the dark pixels, through the differential comparison of the variable gain amplifier, by changing the capacitance value of the sampling capacitor composed of the first capacitor and the third capacitor and the amplifying capacitor composed of the second capacitor
  • the change of the gain value can be realized by the ratio of the capacitance value, so as to eliminate the fixed pattern noise and read the current light intensity change.
  • the switch S 1 , switch S 2 , switch S 3 , and switch S 4 described in this embodiment are mainly composed of MOS complementary transistor switching circuits.
  • Bi-phase non-overlapping clocks provide the corresponding timing signals for switching circuit operation.
  • this embodiment exemplarily describes the structure of a resistor network variable gain amplifier circuit.
  • the circuit for eliminating fixed pattern noise described in this embodiment includes a dark pixel 01 , a bright pixel 02 , a constant current source Iref, a variable gain differential amplifier circuit, and a switch circuit.
  • the dark pixel 01 and the bright pixel 02 are respectively connected to a constant current source Iref to convert their output currents into output voltages, but for a pixel structure whose output is a voltage, this circuit does not need to set a constant current source Iref.
  • the switch circuit is respectively connected between the dark pixel 01 and the variable gain differential amplifier circuit and between the bright pixel 02 and the variable gain differential amplifier circuit, and is used to control the connection or disconnection of the circuit.
  • the structures and arrangements of the dark pixels 01 and the bright pixels 02 in this embodiment are as described in Embodiment 1.
  • the variable gain differential amplifier circuit includes a first resistor R 1 , a variable resistor, and an operational amplifier OPA2.
  • the switching circuit includes a switch S 0 and a dual-phase non-overlapping clock signal generator (not shown in FIG. 6 ) for generating switching circuit timing to control the switch S 0 .
  • There are two switches S0 wherein the first switch S0 is connected in series with the first resistor R1 between the constant current source Iref of the bright pixel 02 and the inverting input terminal of the operational amplifier OPA2, and the second switch S0 is connected in series It is connected between the constant current source Iref of the dark pixel 01 and the positive input terminal of the operational amplifier OPA2.
  • variable resistor One end of the variable resistor is connected in series with the first resistor R1 to the inverting input end of the operational amplifier OPA2, and the other end is connected to the positive output end of the operational amplifier OPA.
  • the variable resistor consists of a second resistor R2 connected in series with a third resistor R3.
  • the constant current source Iref of the bright pixel 02 is used to represent the constant current source Iref connected to the bright pixel 02
  • the constant current source Iref of the dark pixel 01 is used to represent the constant current source Iref connected to the dark pixel 01, the same below.
  • the operational amplifier OPA2 adopted in this embodiment has the same structure and function as the operational amplifier OPA1 described in Embodiment 1.
  • the analog image signal voltage output by bright pixels under light conditions and the reference voltage output by dark pixels under dark conditions are differentially output.
  • the size of the gain is the ratio of the sum of the resistance values of the second resistor and the third resistor to the resistance value of the first resistor.
  • a circuit for eliminating fixed pattern noise described in this embodiment includes a dark pixel 01 , a bright pixel 02 , a constant current source Iref, a variable gain differential amplifier circuit, and a switch circuit.
  • the dark pixel 01 and the bright pixel 02 are respectively connected to a constant current source Iref to convert their output currents into output voltages, but for a pixel structure whose output is a voltage, this circuit does not need to set a constant current source Iref.
  • the switch circuit is respectively connected between the dark pixel 01 and the variable gain differential amplifier circuit and between the bright pixel 02 and the variable gain differential amplifier circuit, and is used to control the connection or disconnection of the circuit.
  • the circuit structure and arrangement of the dark pixel 01 and the bright pixel 02 in this embodiment are as described in Embodiment 1.
  • variable gain differential amplifier circuit in this embodiment includes both a switched capacitor variable gain amplifier circuit and a resistor network variable gain amplifier circuit.
  • the switched capacitor variable gain amplifier circuit includes a sampling capacitor, a second capacitor C2 and an operational amplifier OPA1.
  • the switch circuit includes a switch S 1 , a switch S 2 , a switch S 3 , a switch S 4 and a two-phase non-overlapping clock signal generator used to generate the switching circuit timing to control each switch.
  • the switching circuit timing diagram generated by it is shown in Fig. 8.
  • Both ends of the second capacitor C2 are respectively connected to the inverting input terminal and the positive output terminal of the operational amplifier OPA1, and connected to the sampling capacitor through the switch S2.
  • One end of the switch S3 is connected between the first switch S1 and the sampling capacitor, and the other end is connected between the second switch S1 and the positive input end of the operational amplifier OPA1.
  • the sampling capacitor is composed of a first capacitor C1 and a third capacitor C3 connected in parallel.
  • the resistor network variable gain amplifier circuit in this embodiment includes a first resistor R 1 , a variable resistor, and an operational amplifier OPA2.
  • the switching circuit includes a switch S 0 and a dual-phase non-overlapping clock signal generator for generating the timing sequence of the switching circuit to control the switch S 0 ; the timing diagram of the switching circuit generated by it is shown in FIG. 8 .
  • the variable resistor consists of a second resistor R2 connected in series with a third resistor R3.
  • the structures and functions of the operational amplifier OPA1 and the operational amplifier OPA2 are completely the same.
  • variable gain differential amplifier circuit works in the switched capacitor variable gain amplifier mode.
  • the switches S 1 4 is turned on, the switches S 2 and S 3 are turned off, the voltage across the first capacitor C 1 and the third capacitor C 3 is equal to the output voltage of the randomly read bright pixel 02 under light conditions and the random read dark under dark conditions.
  • the magnitude of charge at the input terminal of the operational amplifier OPA1 is
  • the switches S 1 and S 4 are turned off, and the switches S 2 and S 3 are turned on. At this time, the charge at the input terminal is transferred to C 2 . Due to the charge conservation
  • the output voltage of the randomly read bright pixel 02 under the light condition and the output voltage of the randomly read dark pixel 01 under the dark condition are differentially output.
  • the output voltage gain is the ratio of the sum of the capacitance values of the first capacitor C 1 and the third capacitor C 3 to the capacitance value of the second capacitor C 2 (C 1 +C 3 )/C 2 .
  • the output voltage of the operational amplifier and the output voltage of the randomly read bright pixel under the light condition and the dark condition can be adjusted Randomly read the magnification of the output voltage difference of the dark pixel under, and realize that the voltage gain changes with the change of the proportional coefficient.
  • the sum of the capacitance values of the first capacitor and the third capacitor may also be set to be smaller than the capacitance value of the second capacitor.
  • the variable gain amplifier circuit in the embodiment of the present application can be implemented independently without a dedicated amplification or reduction circuit.
  • variable gain differential amplifier circuit works in the resistor network variable gain amplifier mode.
  • the output voltage of the randomly read bright pixel 02 under the light condition and the output voltage of the randomly read dark pixel 01 under the dark condition are differentially output.
  • the magnitude of the voltage gain is the ratio of the sum of the resistance values of the second resistor and the third resistor to the resistance value of the first resistor (R 2 +R 3 )/R 1 .
  • the output voltage of the operational amplifier and the output voltage of the random read bright pixel 02 under illumination conditions can be adjusted And the magnification of the output voltage of the random read dark pixel 01 under the dark condition, the realization gain changes with the change of the proportional coefficient.
  • the sum of the resistance values of the second resistor and the third resistor may also be set to be smaller than the resistance value of the first resistor.
  • the variable gain amplifier circuit in the embodiment of the present application can be implemented independently without a dedicated amplification or reduction circuit.

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Abstract

La présente demande concerne un circuit d'élimination du bruit de motif fixe. Le circuit comprend : des pixels clairs, qui sont utilisés pour détecter une lumière incidente et délivrer en sortie une tension de signal d'image analogique ; des pixels sombres dont une tension de sortie sert de tension de référence d'un circuit d'amplification différentiel à gain variable ; le circuit d'amplification différentiel à gain variable, qui effectue une comparaison différentielle sur la tension de référence délivrée en sortie à partir des pixels sombres et la tension de signal délivrée en sortie à partir des pixels clairs, de façon à réaliser l'élimination du bruit dans un réseau de pixels d'un capteur d'image et la lecture d'un signal d'intensité de lumière incidente détectée par les pixels clairs ; et un circuit de commutation, qui est connecté aux pixels sombres, aux pixels clairs et au circuit d'amplification différentiel à gain variable, et est utilisé pour commander la connexion ou la déconnexion du circuit. Dans la présente demande, la différenciation est effectuée sur la tension de pixels sombres lus de manière aléatoire dans un état sombre et une tension de signal de pixels clairs, et un circuit d'amplification différentiel à gain variable est conçu, de sorte que le bruit de motif fixe est éliminé ou réduit au maximum ; de plus, l'amplitude de l'intensité lumineuse est lue. La présente demande concerne en outre un capteur d'image comprenant le circuit.
PCT/CN2021/113956 2021-06-17 2021-08-23 Circuit d'élimination du bruit de motif fixe, et capteur d'image WO2022262111A1 (fr)

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CN202110672840.2A CN113271420A (zh) 2021-06-17 2021-06-17 一种用于消除固定图案噪声的电路和图像传感器
CN202110672840.2 2021-06-17

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CN113271420A (zh) * 2021-06-17 2021-08-17 中山大学 一种用于消除固定图案噪声的电路和图像传感器

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JP2002185702A (ja) * 2000-12-19 2002-06-28 Matsushita Electric Ind Co Ltd イメージセンサおよびイメージセンサユニット
CN101883211A (zh) * 2010-03-11 2010-11-10 香港应用科技研究院有限公司 使用开环采样校正放大器的光学传感器的光学暗电平消除
CN102595062A (zh) * 2012-03-01 2012-07-18 西北工业大学 Cmos图像传感器黑光噪声抑制方法
CN111095915A (zh) * 2019-08-29 2020-05-01 深圳市汇顶科技股份有限公司 暗电流相关双采样器、图像传感器和暗电流补偿方法
CN113271420A (zh) * 2021-06-17 2021-08-17 中山大学 一种用于消除固定图案噪声的电路和图像传感器

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002185702A (ja) * 2000-12-19 2002-06-28 Matsushita Electric Ind Co Ltd イメージセンサおよびイメージセンサユニット
CN101883211A (zh) * 2010-03-11 2010-11-10 香港应用科技研究院有限公司 使用开环采样校正放大器的光学传感器的光学暗电平消除
CN102595062A (zh) * 2012-03-01 2012-07-18 西北工业大学 Cmos图像传感器黑光噪声抑制方法
CN111095915A (zh) * 2019-08-29 2020-05-01 深圳市汇顶科技股份有限公司 暗电流相关双采样器、图像传感器和暗电流补偿方法
CN113271420A (zh) * 2021-06-17 2021-08-17 中山大学 一种用于消除固定图案噪声的电路和图像传感器

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