WO2022252137A1 - 发光二极管及其制作方法 - Google Patents

发光二极管及其制作方法 Download PDF

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Publication number
WO2022252137A1
WO2022252137A1 PCT/CN2021/097810 CN2021097810W WO2022252137A1 WO 2022252137 A1 WO2022252137 A1 WO 2022252137A1 CN 2021097810 W CN2021097810 W CN 2021097810W WO 2022252137 A1 WO2022252137 A1 WO 2022252137A1
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Prior art keywords
substrate
cutting
light
emitting diode
diode according
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PCT/CN2021/097810
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English (en)
French (fr)
Inventor
黄苡叡
林宗民
邓有财
张中英
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泉州三安半导体科技有限公司
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Priority to CN202180003024.0A priority Critical patent/CN113795931B/zh
Priority to PCT/CN2021/097810 priority patent/WO2022252137A1/zh
Priority to KR1020237024899A priority patent/KR20230145322A/ko
Priority to US17/990,567 priority patent/US20230081600A1/en
Publication of WO2022252137A1 publication Critical patent/WO2022252137A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/38—Removing material by boring or cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/70—Auxiliary operations or equipment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/5446—Located in scribe lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0091—Scattering means in or on the semiconductor body or semiconductor body package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements

Definitions

  • the invention relates to the technical field of semiconductors, in particular to a light emitting diode and a manufacturing method thereof.
  • Light emitting diode (light emitting diode, referred to as LED) is a semiconductor device that uses carrier recombination to release energy to form light, especially the flip-chip LED chip, because of its low energy consumption, long life, energy saving and environmental protection, etc. more and more widely.
  • the industry usually adopts laser implicit cutting to form a series of laser scratches inside the sapphire substrate of the LED wafer, and then uses splitting to cut the LED wafer to form LED chips.
  • Most of the sapphire substrates used are wafers whose large surface is c-plane (0001).
  • the entire circular wafer needs to be divided into several rectangles single core particle.
  • Two mutually perpendicular cutting directions are perpendicular to the C-plane of sapphire, generally corresponding to the and because sliding surface and the slip surface
  • the surface and the c-plane are not perpendicular and have a certain oblique angle.
  • FIG. 2 shows the side of the LED chip, which is easy to cause problems such as large and small edges and irregular shapes on the edges outside the luminescent epitaxial stack.
  • Fig. 3 has shown the real photograph figure that arranges the LED chip 100 shown in Fig. 2 on the substrate, it can be seen from the figure that the back side of the LED chip (the back side of the substrate) is irregular in shape, when the light emitted by the light-emitting epitaxial stack is emitted from the substrate The light distribution is not uniform as it exits.
  • Fig. 4 shows the light distribution curve of the LED chip shown in Fig. 2, and the light pattern is asymmetrical due to the distorted edge of the chip.
  • the present invention provides a method for manufacturing a light emitting diode, comprising the steps of:
  • An LED wafer includes a substrate and a light-emitting epitaxial stack on the upper surface of the substrate, and the light-emitting epitaxial stack includes a first-type semiconductor layer, an active layer, and a second semiconductor layer from one side of the substrate.
  • Type II semiconductor layer
  • the cutting line includes a first cutting direction and a second cutting direction perpendicular to each other;
  • the above production method adopts double-sided asymmetrical multi-focus invisible cutting method, aiming at sliding surface Using multi-focus laser stealth cutting pairs Vertical multi-point damage in the lattice direction, to avoid subsequent cracks in the splitting process along the slip surface direction to obtain a substantially vertical LED chip, and the angle between the side surface of the chip substrate and the upper surface is 90+/-5 degrees.
  • the present invention provides a light-emitting diode, including a substrate and a light-emitting epitaxial stack on the upper surface of the substrate, the light-emitting epitaxial stack includes a first type semiconductor layer from one side of the substrate, an active layer and the second type semiconductor layer, characterized in that: the substrate includes adjacent first side and second side, the first side has X first cutting marks arranged laterally, and the second surface has Y The second cutting marks arranged horizontally, where y>x>0, and y ⁇ 3.
  • the light-emitting diodes form different numbers of cutting marks on different sides, for example, forming fewer cutting marks on the cutting surface of the non-cracking surface, which is conducive to using a laser beam with a larger pulse energy to form a smaller number of cutting marks inside the substrate.
  • the large metamorphic part prevents the laser beam spot from irradiating the epitaxial layer or the cut marks extend to the light-emitting epitaxial structure, thereby damaging the epitaxial structure or the electrode and causing the chip to fail. face to face Vertical multi-point damage in the lattice direction, to avoid subsequent cracks in the splitting process along the slip surface Cracking in the same direction can obtain a substantially vertical side wall.
  • the present invention provides a method for manufacturing a light emitting diode, comprising the steps of:
  • An LED wafer includes a substrate and a light-emitting epitaxial stack on the upper surface of the substrate, and the light-emitting epitaxial stack includes a first-type semiconductor layer, an active layer, and a second semiconductor layer from one side of the substrate.
  • Type II semiconductor layer
  • the cutting line includes a first cutting direction and a second cutting direction perpendicular to each other;
  • the pulse energy of the laser beam used in the first cutting direction is greater than the pulse energy of the laser beam in the second cutting direction, wherein y ⁇ x>0, and y ⁇ 3;
  • the present invention provides a light emitting diode, including a substrate and a light emitting epitaxial stack on the upper surface of the substrate, the light emitting epitaxial stack includes a first type semiconductor layer, an active layer from one side of the substrate and the second type semiconductor layer, characterized in that: the substrate includes a first side adjacent to a second side, the first side has a first cutting mark, and the second side is connected to the upper surface of the substrate.
  • the included angle is between 85° and 95°, and there are at least five second cutting marks arranged laterally, the distance between the second cutting lines between two adjacent lines is greater than 0 and less than or equal to 30 ⁇ m, and the second cutting lines
  • the marks include a series of explosion points located on the center line of the cutting line and cracks derived from each of the explosion points, and the cracks of two adjacent cutting marks have a certain distance or are connected.
  • the substrate of the above-mentioned light-emitting diode is a crystal structure, and its upper surface is a C-plane, and has a slip surface with the upper surface of the substrate at an included angle, wherein the second side is perpendicular to the C-plane and close to the slip surface Therefore, at least five rows of second cutting lines arranged laterally are arranged on the second side, and the distance between two adjacent lines of the second cutting lines is greater than 0 and less than or equal to 30 ⁇ m, and furthermore Vertical multi-point damage in the lattice direction, to avoid subsequent cracks in the splitting process along the slip surface direction to obtain substantially vertical sidewalls.
  • the present invention provides a light-emitting diode, including a substrate and a light-emitting epitaxial stack on the upper surface of the base, the light-emitting epitaxial stack includes a first-type semiconductor layer, an active layer, and
  • the second type of semiconductor layer is characterized in that: the substrate includes adjacent first and second sides, the first side has X first cutting marks, and the second side has Y second cutting marks , wherein the texture roughness of the first cut marks is greater than the texture roughness of the second cut marks.
  • thicker cut marks are formed on the difficult-to-crack surface, which is conducive to cutting on the one hand, and on the other hand, helps to improve light extraction efficiency, and forms thinner cut marks on the easy-to-crack surface, which can avoid larger cracks.
  • the internal stress thereby reducing the cracks that occur during the cracking process, reaches the first surface of the substrate and damages the functional layers of the LED chip.
  • the present invention provides a light-emitting diode, including a substrate and a light-emitting epitaxial stack on the upper surface of the base, the light-emitting epitaxial stack includes a first type semiconductor layer, an active layer from one side of the substrate and the second type of semiconductor layer, characterized in that: the substrate is a crystal structure, including adjacent first side and second side, wherein the second side is a crackable surface, including Y parallel cuts, wherein close to The cutting texture of the first row on one side of the light-emitting epitaxial stack is smaller than the cutting marks of other rows.
  • the present invention provides a light-emitting diode, including a substrate and a light-emitting epitaxial stack on the upper surface of the base, the light-emitting epitaxial stack includes a first type semiconductor layer, an active layer from one side of the substrate and the second type of semiconductor layer, characterized in that: the substrate is a crystalline structure, including a first side and a second side adjacent to each other, wherein the first side is a non-crackable surface, and includes at least three first cutting marks arranged laterally , the adjacent first cutting marks are not connected or connected, but basically do not intersect each other.
  • Figure 1 shows a diagram of the lattice structure of a sapphire substrate.
  • Figure 2 shows a real photo of an existing LED chip.
  • FIG. 3 shows a photograph of the actual LED chips shown in FIG. 2 arranged on a substrate.
  • FIG. 4 shows a light distribution curve of the LED chip shown in FIG. 2 .
  • Fig. 5 shows a flow chart of manufacturing an LED chip according to the present invention.
  • FIG. 6-9 are structural schematic diagrams of a manufacturing process flow of an LED chip shown in FIG. 5 .
  • Fig. 6 shows a side cross-sectional view of an LED epitaxial structure
  • Fig. 7 defines the size of the LED chip and the cutting line in the epitaxial structure shown in Fig. 6
  • Fig. 9 illustrates the cutting line formed inside the substrate along the second direction by using the laser beam
  • Fig. 10 illustrates the cutting mark formed on the first side of the substrate (corresponding to the first direction) after splitting
  • Fig. 11 The cutting marks formed on the second side of the substrate (corresponding to the second direction) after splitting are illustrated.
  • Figures 12 to 13 show the SEM photographs of LED chips formed by the LED manufacturing method described in Figure 5, wherein Figure 12 shows the cutting marks formed on the first side of the LED substrate, and Figure 13 shows the cutting marks formed on the second side of the LED substrate. of cut marks.
  • Fig. 14 shows a top view of an LED chip implemented according to the present invention.
  • Fig. 15 shows a flow chart of manufacturing an LED chip according to the present invention.
  • FIG. 16 and 17 are SEM photos of the LED chips formed by the LED chip manufacturing method shown in FIG. 15, wherein FIG. 16 shows the cutting marks on the first side of the substrate of the LED chip, and FIG. Cut marks on both sides.
  • FIG. 18 shows a photograph of an actual LED chip formed by the LED manufacturing method shown in FIG. 15 arranged on a substrate.
  • FIG. 19 shows the light distribution curve of the LED chip shown in FIG. 18 .
  • Figure 20 shows another light emitting diode practiced in accordance with the present invention.
  • Figure 21 shows another light emitting diode practiced in accordance with the present invention.
  • Figure 22 shows another light emitting diode practiced in accordance with the present invention.
  • FIG. 23 shows a SEM photograph of the LED chip shown in FIG. 22 .
  • This embodiment discloses the following manufacturing method of an LED chip and the LED chip formed by the manufacturing method, which uses lasers of different powers for different crystal planes to perform multi-focus implicit cutting, and uses intensive And small multi-point implicit cutting, forming approximately continuous multi-point cutting, prevents cracks along the The surface is cracked.
  • FIG. 5 shows the flow of the manufacturing method, which mainly includes the following steps S110-S140, which will be described in detail below in conjunction with FIGS. 7-12. It should be noted that the different power lasers in this embodiment refer to the power of a single focal point.
  • Step S110 providing an LED wafer, the LED wafer includes a substrate 110 and a light-emitting epitaxial stack 120 thereon, as shown in FIG. 6 .
  • the substrate 110 is preferably a transparent or translucent material through which the light emitted by the light-emitting epitaxial stack 120 can pass through the substrate 110, and is a growth substrate for the growth of the light-emitting epitaxial stack 120, such as a sapphire substrate, GaN substrate, AlN substrate, etc.
  • the substrate 110 includes a first surface S11, a second surface S12 and sidewalls, wherein the first surface S11 and the second surface S22 are opposite, and the substrate 110 may include a plurality of protrusions formed at least in at least a part of the first surface S11.
  • the substrate 110 may be a patterned sapphire substrate.
  • the epitaxy of the light-emitting epitaxial stack 120 can be achieved by physical vapor deposition (Physical Vapor Deposition, PVD), chemical vapor deposition (Chemical Vapor Deposition, CVD), epitaxial growth (Epitaxy Growth Technology) and atomic beam deposition (Atomic Layer Deposition, ALD).
  • the specific light-emitting epitaxial stack 120 may include a III-V type nitride semiconductor, for example, may include Nitride-based semiconductors such as (Al, Ga, In)N or phosphide-based semiconductors including (Al, Ga, In)P or arsenide-based semiconductors including (Al, Ga, In)As.
  • the first conductive type semiconductor layer 121 may include n-type impurities (eg, Si, Ge, Sn), and the second conductive type semiconductor layer 123 may include p-type impurities (eg, Mg, Sr, Ba). Also, the above impurity types may be reversed.
  • the active layer 122 may include a multi-quantum well structure (MQW), and the element composition ratio of the semiconductor may be adjusted to emit a desired wavelength.
  • MQW multi-quantum well structure
  • Step S120 Define dicing lines on the surface of the LED wafer, including the first dicing lines in the first cutting direction D1 and the second dicing lines in the second cutting direction D2 perpendicular to each other.
  • the substrate 110 has a crystal structure, wherein the first surface S11 of the substrate 100 is a C-plane, and the crystal structure includes a slip plane forming a certain angle with the C-plane, wherein the crystal plane corresponding to the second direction D2 is perpendicular to the C-plane and close to the slip surface.
  • the substrate 110 is made of sapphire material, wherein the first direction D1 corresponds to the non-crackable surface of the sapphire crystal, and the second direction D2 corresponds to the easy-crack surface of the sapphire crystal.
  • the circle is divided into a series of light-emitting units, and an electrode area is defined on each light-emitting unit.
  • the second conductivity type semiconductor layer 123 and the active layer 122 in the electrode area are etched to expose the first conductivity type through a photomask or multiple photomasks. Part of the surface of the semiconductor layer 121 is etched from the second conductivity type semiconductor layer 123 , the active layer 122 , the first conductivity type semiconductor layer 121 in the scribe line region, until the first surface S11 of the substrate 110 .
  • an insulating layer 130 is covered on the exposed surface and sidewall of the light-emitting epitaxial stack 120 .
  • the thickness of the insulating layer 130 on the sidewall of the light-emitting epitaxial stack is usually lower than that on the top surface of the light-emitting epitaxial stack and the first surface of the substrate due to the shadow effect , causing the thickness on the sidewall of the light-emitting epitaxial stack to be 40-90% of the thickness on the top surface of the semiconductor sequence.
  • the contact electrode 150 is firstly formed on the surface of the second conductivity type semiconductor layer 123, and the material may be ITO, GTO, GZO, ZnO or a combination thereof, and then the insulating layer 130 is formed.
  • the first electrode 141 and the second electrode 142 are formed on the insulating layer by photolithography and evaporation process.
  • the minimum horizontal distance between the first electrode 141 and the second electrode 142 on the insulating layer 130 is preferably more than 5 ⁇ m, for example, it can be 20-40 ⁇ m, or 40-60 ⁇ m or 60-80 ⁇ m, and the material can be Cr, Pt, Au, Ti , Ni, Al and other metal combinations.
  • the electrode has a multilayer structure, and its surface layer is preferably made of Au material.
  • the first electrode 141 is electrically connected to the first conductivity type semiconductor layer 121 through the opening structure 171 penetrating the insulating layer 130
  • the second electrode 142 is electrically connected to the contact electrode 150 through the opening structure 172 penetrating the insulating layer 130 .
  • Step S130 Provide laser beams to focus on the inside of the substrate 110, form X cutting lines on the same section inside the substrate 110 along the first direction D1, and form Y cutting lines on the same section inside the substrate 110 along the second direction D2 ( y ⁇ x ⁇ 1).
  • the laser beam with the first pulse energy forms X first cutting lines on the same section inside the substrate 110, as shown in FIG.
  • Form Y second cutting lines on the same cross section of as shown in FIG. 9 .
  • the first direction D1 corresponds to the non-crackable surface, so a relatively high-power laser beam is used to form at least one continuous first cutting line 1110 inside the substrate 110, and the first cutting line 1110 is connected to the substrate.
  • the distance between the first surface of 110 is preferably 15 ⁇ m or more to ensure that the epitaxial layer will not be damaged when laser etching the inside of substrate 110 , for example, it can be 20 ⁇ m to 60 ⁇ m, and the distance between adjacent first cutting lines 1110 can be 10 to 50 ⁇ m.
  • the first cutting line 1110 includes a series of first detonation points 1111 arranged at substantially equal intervals and an etching texture 1112 (degenerated area) connected to each first detonation point 1111.
  • the etching texture 1112 is a texture with irregular distribution.
  • the distance between adjacent first burst points 1111 in the first row is preferably more than 1 ⁇ m and less than 12 ⁇ m.
  • the second direction D2 corresponds to the easy-to-crack surface, so a plurality of discontinuous second cutting lines 1120 are formed inside the substrate 110 using a laser beam with a lower power.
  • the distance between the second cutting lines 1120 and the first surface S11 of the substrate 110 It is preferably more than 10 ⁇ m, preferably 15-50 ⁇ m.
  • the cutting line 1120 consists of a series of spaced textures, which are relatively regularly arranged.
  • the cutting line 112 includes a series of second explosive points and textures extending outward from the second explosive points. The distance between them is preferably more than 5 ⁇ m and less than 20 ⁇ m, and in a specific embodiment, the distance is 8 ⁇ 12 ⁇ m.
  • a single-pole multi-focus laser beam is preferably used in the first direction D1 and the second direction D2, wherein the average power of the single focus of the first laser beam can be 0.07-5 milliwatts, and the single focus of the second laser beam The average power can be 0.03 ⁇ 3 milliwatts.
  • Step S140 separating the LED wafer into several LED chips along the dicing line. 10 and 11, the first side of the formed LED chip (corresponding to the first cutting direction) has at least two rows of parallel first cutting marks 111, the first cutting marks 111 include the first cutting line 1110 upward , a crack 1113 extending downward; the second side of the LED chip (corresponding to the second cutting direction) has at least two parallel second cutting marks 112 and a transverse crack 113, and the texture of the second cutting marks 112 is larger than that of the first cutting marks The texture of 111 is relatively regular and fine.
  • FIG. 12 shows a SEM photo of the first side of the LED chip formed according to the manufacturing method of this embodiment, and the first side includes two parallel first cutting marks 111 .
  • the first cutting mark 111 includes a first cutting line 1110 and cracks 1113 extending upward and downward from the first cutting line 1110 , wherein the first first cutting mark is close to the upper surface of the substrate 110
  • the distance H11 between the first explosion point 1111 and the upper surface S11 of the substrate is 30-60 ⁇ m, for example, 40 ⁇ m.
  • the second first cut 111 is close to the second surface S12 of the substrate 110.
  • the distance H12 between the point 1111 and the second surface S12 of the substrate 110 is 20 ⁇ 50 ⁇ m, for example, 30 ⁇ m or 50 ⁇ m.
  • FIG. 13 shows a SEM photo of the second side of the LED chip formed according to the manufacturing method of this embodiment, and the second side includes a plurality of parallel second cutting marks 112 . It can be seen from the figure that the second cutting mark 112 includes the second cutting line 1120 and the crack 1122 extending upward and downward from the second cutting line 1120, wherein the first second cutting mark 112 is close to the substrate 110.
  • the first surface S11, the distance H21 between the second explosion point and the first surface S11 of the substrate 110 is 20-60 ⁇ m
  • the second cutting mark is close to the second surface S12 of the substrate 110, and the explosion point inside it is close to the substrate 110.
  • the distance H22 of the second surface S12 is 10-60 ⁇ m, for example, 30 ⁇ m-50 ⁇ m, wherein the crack of the first cutting mark does not reach the first surface S11 of the substrate 110, and the size of the crack is smaller than that of the second cutting mark
  • the crack of the second cutting mark extends toward the second surface S12 of the substrate 110 , and partially reaches or approaches the second surface S12 of the substrate 110 .
  • a transverse texture 113 is further included under the first cutting mark, and the crack 1122 of the first cutting mark extends toward the second surface S12 of the substrate 110 and ends at the transverse texture 113 .
  • different laser energies are used to form cutting marks on different sides during the cutting process.
  • the large metamorphic part ensures the subsequent smooth splitting and avoids the double crystal problem (that is, there is no separation between the two chips) during cutting.
  • a laser beam with a smaller pulse energy is used on the substrate. Smaller metamorphic parts are formed inside the substrate 110 to prevent subsequent cracks from extending to the first surface S11 of the substrate 110 to damage the structure of the semiconductor epitaxial stack 120 or the electrode, resulting in chip failure.
  • Fig. 14 shows a top view of an LED chip implemented according to the present invention, specifically a rectangular or square flip-chip LED chip.
  • the LED chip includes the following stacked layers: a substrate 110 , a light-emitting epitaxial stack 120 , an insulating layer 130 , a first electrode 141 and a second electrode 142 .
  • the substrate 110 includes four sides A1 - A4 that surround clockwise, wherein the sides A1 and A3 are parallel and short sides, and the sides A2 and A4 are parallel and long sides.
  • the LED chip can be a small-sized LED chip with a smaller horizontal area, for example, it can have a horizontal cross-sectional area of about 62500 ⁇ m or less, and can further have a horizontal cross-sectional area of about 900 ⁇ m or more and about 62500 ⁇ m or less.
  • the size of the LED chip It can be reflected by the size of the first surface S11 of the substrate 110.
  • the side length of the first surface S11 of the transparent substrate 110 is preferably less than or equal to 300 ⁇ m, preferably between 200-300 ⁇ m, or 100-200 ⁇ m, or The size is smaller than 100 ⁇ m, preferably between 30 ⁇ m and 150 ⁇ m.
  • the thickness of the substrate 110 is preferably between 30-160 ⁇ m, such as 50-80 ⁇ m, or 80-120 ⁇ m, or 120-160 ⁇ m.
  • the thickness of the light-emitting epitaxial stack 120 is between 4-10 ⁇ m.
  • the LED chip of this embodiment has the above-mentioned size and thickness, so the LED chip can be easily applied to various electronic devices requiring small and/or thin light emitting devices.
  • Figure 12 simply illustrates the side surface corresponding to the side A1 or A3 of the substrate 110 of an LED chip implemented according to the present invention
  • the side surface of the substrate includes two parallel first cutting marks 111
  • Figure 13 illustrates the side A2 or
  • the side surface corresponding to A4 includes two parallel second cutting marks 112 and a transverse crack 113 located below the first second cutting mark 112 . It can be seen from the figure that the size and roughness of the first cutting mark 111 are greater than the size and roughness of the second cutting mark 112 .
  • a larger-sized metamorphic part is formed inside the substrate 110 to ensure the subsequent smooth splitting and avoid the twin crystal problem (that is, two chips) that often occurs during cutting. There is no separation between them), for the crackable surface where the sides A2 and A4 are located, a smaller metamorphic portion is formed inside the substrate 110, so as to avoid subsequent cracks extending to the first surface of the substrate 110 and damaging the semiconductor during the splitting process. Epitaxial stack structures or electrodes lead to chip failure.
  • the insulating layer 130 is an insulating reflective layer covering the top surface and sidewall of the light-emitting epitaxial stack.
  • the insulating layer 130 can be reflected by the insulating layer 130 to a large extent. Part of the light returns to the light-emitting epitaxial stack 120 , and most of the light exits through the second surface S11 of the substrate 110 , reducing light loss caused by light passing through the surface and sidewalls of the light-emitting epitaxial stack 120 .
  • the insulating layer 130 is capable of reflecting at least 80% or further at least 90% of the light intensity of the light radiated by the light-emitting layer reaching its surface.
  • the insulating layer 130 may include a Bragg reflector.
  • the Bragg reflector can be formed by repeated stacking of at least two insulating media with different refractive indices, and can be formed in 4 to 20 pairs.
  • the insulating layer can include TiO 2 , SiO 2 , HfO 2 , ZrO 2 , Nb 2 O 5 , MgF 2 , etc.
  • the insulating layer 130 may be alternately deposited TiO 2 layer/SiO 2 layer.
  • Each layer of the Bragg reflector may have an optical thickness of 1/4 of the peak wavelength of the radiation band of the luminescent layer.
  • the uppermost layer of the Bragg reflector may be formed of SiNx.
  • the layer formed of SiNx has excellent moisture resistance and can protect the light emitting diode from moisture.
  • the insulating layer 230 includes a Bragg reflector
  • the lowermost layer of the insulating layer 130 may have an underlying or interfacial layer that improves the film quality of the distributed Bragg reflector.
  • the insulating layer 130 may include an interface layer formed of SiO 2 with a thickness of about 0.2 ⁇ 1.0 ⁇ m and stack layers of TiO 2 /SiO 2 on the interface layer in a specific period.
  • the insulating layer 130 can also be only a single layer of insulating layer, preferably, the reflectivity is generally lower than the Bragg reflective layer, at least 40% of the light is emitted from the insulating layer 130, preferably at least 1 ⁇ m Or more preferably a thickness of 2 ⁇ m or more, such as SiO 2 , has excellent moisture resistance and can protect the LED from moisture.
  • the contact electrode 150 may make ohmic-contact with the second conductive type semiconductor layer 123 .
  • the contact electrode 150 may include a transparent conductive layer.
  • the transparent conductive layer may also include, for example, indium tin oxide, zinc oxide, zinc indium tin oxide, indium zinc oxide, zinc tin oxide, gallium indium tin oxide, indium gallium oxide, zinc gallium oxide, aluminum doped zinc oxide, fluorine doped At least one of a translucent conductive oxide such as tin oxide, and a translucent metal layer such as Ni/Au.
  • the conductive oxide may also include various dopants.
  • the thickness of the contact electrode 150 is 20 ⁇ 300 nm.
  • the surface contact resistance between the contact electrode 150 and the second conductivity type semiconductor layer 123 is preferably lower than the surface contact resistance of the metal electrode on the second conductivity type semiconductor layer 123 , so the forward voltage can be reduced and the luminous efficiency can be improved.
  • the first electrode 141 and the second electrode 142 have a multi-layer structure, and the bottom layer is one or more stacked combinations of Cr, Al, Ti, Ni, Pt, and Au metal materials.
  • the surface layers of the first and second electrodes are made of Sn-containing metal material, and in other embodiments, the surface layers of the first and second electrodes may also be made of Au metal material.
  • Fig. 15 shows another LED chip manufacturing method according to the present invention, which mainly includes the following four steps:
  • Step S210 providing an LED wafer, the LED wafer includes a substrate 110 and a light-emitting epitaxial stack 120 located on the first surface S11 of the substrate 110;
  • Step S220 defining dicing lines on the surface of the LED wafer, including a first cutting direction D1 and a second cutting direction D2 perpendicular to each other;
  • Step S230 providing a laser beam focused on the inside of the substrate 110, forming X cutting lines on the same section inside the substrate along the first direction, and forming Y cutting lines on the same section inside the substrate along the second direction, where y>x >0, and y ⁇ 3;
  • Step S240 Separating the LED wafer into several LED chips along the dicing lines.
  • Steps S210, S220, and S240 can be performed with reference to steps S110, S120, and S140 in Embodiment 1, and the following will focus on step S230 for detailed description.
  • the number of implicit cutting points is preferably greater than or equal to 3 and less than or equal to 20.
  • dense and small multi-point invisible cutting an approximately continuous multiple point is formed in the thickness direction of the same cutting surface. point cut, yes The lattice direction of the surface is vertically damaged at multiple points, so that the subsequent cracks in the splitting process can extend Cracking is carried out in the direction, and then the LED chip verticality of 90+/-5 degrees is achieved.
  • a laser beam is first provided to focus on the inside of the substrate 110, X cutting lines are formed on the same section inside the substrate along the first direction D1, and Y cutting lines are formed on the same section inside the substrate 110 along the second direction D2.
  • the first direction D1 corresponds to the hard-to-crack surface, so a relatively high-power laser beam is used to form 1 to 10 cutting lines, preferably 2 to 5, when forming one cutting line (that is, single focus Cutting), it is necessary to use a higher power laser beam for etching, the cutting marks formed at this time may be difficult to control, on the one hand, the probability of twin crystal problems (that is, no separation between the two chips) increases during cutting, and on the other hand On the one hand, cracks may reach above the first surface S11 of the substrate 110 during the cracking process, thereby damaging the semiconductor light emitting stack 120 , insulating layer or electrodes, resulting in failure of the LED chip.
  • the distance between the position of the central line of the first cutting line 111 (that is, the focal point) and the first surface S11 of the substrate 110 is preferably more than 10 ⁇ m, more preferably more than 15 ⁇ m, for example, 20 ⁇ m or 30 ⁇ m or 35 ⁇ m or 50 ⁇ m, when the distance is less than
  • the texture formed by laser etching at 10 ⁇ m or the cracks generated during the slitting process are relatively easy to reach the first surface S11 of the substrate 110, thereby damaging the semiconductor light emitting stack 120, insulating layer or electrodes, and causing LED chips to fail.
  • the second direction D1 corresponds to the easy-to-crack surface, so a lower power laser beam is used to form 3 to 20 cutting lines, preferably 5 to 16, so that the effect of vertical cutting can be achieved.
  • the direction of the top view shown in Figure 18 The appearance of the seen chip is square without waves. The distance between the position of the centerline (i.e.
  • the focal point) of the second cutting line 112 and the upper surface S11 of the substrate is preferably more than 5 ⁇ m, more preferably more than 15 ⁇ m, such as 16 ⁇ m, 20 ⁇ m or 30 ⁇ m or 35 ⁇ m, when the distance is less than 5 ⁇ m Textures formed by laser etching or cracks in the cracking process can easily reach the first surface S11 of the substrate 110, thereby damaging the semiconductor light emitting stack, insulating layer or electrode, thereby causing LED chips to fail. When the distance exceeds 50 ⁇ m, then Cracks easily along the lobes Oblique cleft occurs.
  • the Y second cutting lines are formed by single-knife multi-focus, so that on the one hand, the splitting appearance of double lines can be avoided, and on the other hand, the efficiency of laser cutting can be improved.
  • the substrate 110 has a thickness of 120 ⁇ m to 150 ⁇ m, two first cutting lines 111 are formed on the same cutting plane in the first direction D1, and the first cutting line closest to the first surface S11 of the substrate 111
  • the distance between the position of the central line (that is, the focal point) and the first surface S11 of the substrate 110 is 35-50 ⁇ m
  • 7-9 second cutting lines 112 are formed on the same cut in the second direction D2, which are closest to the first surface of the substrate 10
  • the distance between the position of the centerline (i.e. the focal point) of the second cutting line 112 of S11 and the first surface S11 of the substrate 10 is 20-35 ⁇ m, and FIG. 16 and FIG.
  • first One side has two first cutting marks 111
  • second side has seven second cutting marks 112 and six transverse cracks 113 .
  • the single first cutting mark 111 is thicker than the second cutting mark 112, specifically, it has a wider dimension in the thickness direction of the substrate and a greater depth in the direction perpendicular to the thickness of the substrate 110, and
  • the shape of the first cut marks 111 is irregular zigzag up and down
  • the second cut marks 112 are composed of a series of equidistant textures, and there is a transverse crack 113 between two adjacent second cut marks 112 .
  • the structural layers of the LED chip formed by the LED chip manufacturing method described in this embodiment are basically the same as the structural layers of the LED chip described in Embodiment 1, and will not be repeated here.
  • the main difference lies in the different shapes of the substrate 110: (1)
  • the second side (long side) of the substrate 110 is basically perpendicular to the first surface S11 of the substrate 110, and the angle ⁇ between the two is 90+/- Within 5°, it can be referred to as shown in Figure 16;
  • the shape of the LED chip is more regular, and Figure 18 shows the photo of the LED chip formed by the LED manufacturing method described in this embodiment arranged on the substrate, it can be seen that each The LED chips are all distributed in a rectangular shape, and there is no obvious distortion at the edge; (3) the second side of the LED chip substrate 110 is a flat area except the upper and lower areas, and the middle area is a roughened area, which is formed by the second cutting mark 112 and the transverse crack.
  • the adjacent second cut 112 basically reaches the transverse crack between them, forming a nearly continuous longitudinal cut 114 (thickness direction), wherein the area of the roughened area accounts for 60% of the area of the side Above, it is preferably 60% to 80%. On the one hand, it can reduce the risk of leakage (laser cutting or splitting damages the functional layers of the LED). It is beneficial for the light emitted by the active layer of the LED chip to take light from the side, thereby increasing the light taking efficiency.
  • Fig. 19 shows the light distribution curve of the LED chip shown in Fig. 18, and it can be seen that the light pattern is symmetrical.
  • different numbers of cutting marks are formed on different sides of the substrate 110, and a small number of cutting marks (for example, 2 to 5) are formed on the cutting surface located on the non-crackable surface, which is beneficial to the use of a laser with a larger pulse energy.
  • the light beam forms a larger metamorphic part inside the substrate, avoiding the cutting marks from extending to the light-emitting epitaxial structure, thereby damaging the epitaxial structure or the electrode and causing the chip to fail, and forming a larger number of cuts on the cutting surface located on the m-plane and other easy-to-crack surfaces marks (for example, 5 to 20), forming approximately continuous longitudinal cutting lines in the thickness direction of the substrate 110, and further Vertical multi-point damage in the lattice direction, to avoid subsequent cracks in the splitting process along the slip surface direction to obtain substantially vertical sidewalls.
  • the beneficial effects of this embodiment will be described below in conjunction with comparative examples.
  • sample A and sample B (comparative example) respectively and measure their light output efficiency, wherein sample 1 is produced by the method described in this embodiment, what needs to be explained here is that sample A and sample B use LED crystals with the same structure circle, and the processes and conditions of steps S210, S220, and S240 are the same.
  • step S230 sample A adopts a specific double-focus laser beam along the first direction to form two second strips on the same section inside the D1 substrate 110.
  • step S230 a single focus is used to form cutting marks on the same section inside the substrate 110 along the first direction D1 and the second direction D2 respectively, and then split to form LED chips, as shown in FIG. 2 .
  • a single focus is used to form cutting marks on the same section inside the substrate 110 along the first direction D1 and the second direction D2 respectively, and then split to form LED chips, as shown in FIG. 2 .
  • samples B, C, and D were made respectively.
  • the number of laser focal points used for stealth cutting was different for the three samples, and the rest were the same.
  • the non-crackable surface (D1 direction) is cut with a single focus on the inside of the substrate;
  • sample C uses laser beams with 9 focal points on the brittle surface, and laser beams with 2 focal points on the non-crackable surface;
  • sample D Both the crackable surface (D2 direction) and the non-crackable surface (D1 direction) are laser cut with 9 focus laser beams, and the leakage current test is performed after splitting. When IR>0.1 ⁇ A, it is judged as leakage current.
  • the test results are as follows Table II.
  • Fig. 20 shows a schematic structural view of an LED chip implemented according to the present invention.
  • the LED chip is also a flip-chip LED chip, and the light emitted by the active layer 122 is emitted from the substrate 110 .
  • the main difference from the LED chip shown in Embodiment 1 is that the LED chip is provided with a reflective layer 160 on the second surface S12 of the substrate 110 .
  • the reflective layer 160 can be a single-layer or multi-layer structure, so that the light-emitting angle of the LED chip can be increased, and the light-emitting angle can reach more than 160°.
  • the reflective layer 160 at least covers the middle area of the second surface S12 of the substrate 110 , and may also completely cover the second surface of the substrate.
  • the reflective layer 160 is an insulating reflective layer, which can be formed by alternately stacking high and low refractive index materials, such as alternately stacking SiO 2 and TiO 2 .
  • the LED chip described in this embodiment can be applied to the backlight module of a display device.
  • the light-emitting path of the LED chip can be changed to increase the light-emitting angle of the LED chip, which is beneficial Reduce the thickness of the backlight module and reduce the size of the backlight module.
  • Fig. 21 shows a schematic structural diagram of an LED chip implemented according to the present invention.
  • the light-emitting epitaxial stack 120 of the LED chips shown in the previous embodiments is formed on the substrate 110 by epitaxial growth.
  • the light-emitting epitaxial stack 120 is formed on the substrate 110 through the bonding layer 180 .
  • the light-emitting epitaxial stack 120 is an AlGaInP-based semiconductor layer.
  • the AlGaInP-based epitaxial structure is first grown on a gallium arsenide substrate, and then the AlGaInP-based epitaxial structure is transferred to the transparent substrate 110 by means of transfer. .
  • Fig. 22 shows a schematic structural diagram of an LED chip implemented according to the present invention.
  • the difference from the LED chip shown in Embodiment 1 is that a relatively small power laser beam is used to form at least three rows of cutting marks on the difficult-to-crack surface of the substrate.
  • the series of cutting marks can be disconnected or connected, but basically not connected to each other. staggered.
  • the cutting marks 111A close to the first and second surfaces S11 and S12 of the substrate 110 are zigzag-shaped, have a series of burst points 111A-1 and extend from the burst points to the first surface S11 and the second surface S12
  • the crack 111A-2 and the cutting mark 111-B located in the middle area are explosion points formed by a series of laser etching.
  • Figure 23 shows the SEM photo of the side.
  • the non-crackable surface formed in this way forms a fine and dense concave-convex structure, and the area ratio of the concave-convex structure on the side can reach more than 50%.
  • This aspect has It is beneficial to chip dicing and reduces the risk of damaging each functional layer of the chip, and on the other hand, it is beneficial to increase the light extraction efficiency of the LED chip from the side of the substrate.
  • This embodiment discloses a deep-ultraviolet LED chip, wherein the substrate 110 has a thickness of 200 ⁇ m to 750 ⁇ m, so the crackable surface needs to be laser cut with multiple knives and multiple focal points.
  • the thickness of the substrate 110 of the LED chip is 350-500 ⁇ m.
  • a laser beam with a single knife and 9 focal points is used for cutting in the first direction D1 (non-crackable surface), and the second direction D2 (easy-crackable surface) is cut. surface) is cut with 3 knives and 9 focus laser beams.
  • the thickness of the substrate exceeds 500 ⁇ m, so a laser beam with 3 knives and 9 focal points is used for cutting in the first direction (non-crackable surface), and a laser beam with 5 knives is used in the second direction (easy to crack) 9 focus laser beams for cutting.

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Abstract

本发明公开了一种发光二极管及其制作方法，其中制作方法包括步骤：一、提供一个LED晶圆，该LED晶圆包含基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层；二、在所述LED晶圆的上表面定义切割道，该切割道包括相互垂直的第一切割方向和第二切割方向；三、提供激光光束聚焦于所述基板内部，沿第一方向在所述基板内部的同一截面上形成X条切割线，沿第二方向在所述基板内部的同一截面上形成Y条切割线，其中y>x>0，且y≥3；四、将该LED晶圆沿着所述切割道分离为若干个LED芯片。

Description

发光二极管及其制作方法 技术领域
本发明涉及半导体技术领域，具体为一种发光二极管及其制作方法。
背景技术
发光二极管(light emitting diode，简称LED)是一种利用载流子复合时释放能量形成发光的半导体器件，尤其其中的倒装LED芯片，因耗能低、寿命长、节能环保等诸多优势，应用越来越广泛。
LED芯片制作过程中，业内通常采用激光隐切的方式在LED晶圆的蓝宝石基板内部形成一系列的激光划痕，然后采用劈裂的方式切割LED晶圆形成LED芯片。其中采用的蓝宝石基板大多是大面为c面(0001)的晶圆片，如图1所示，在LED晶圆激光切割工艺中，需要将整片圆形的晶圆片分割成若干个矩形的单个芯粒。两个相互垂直的切割方向垂直于蓝宝石的C面，一般对应蓝宝石晶体的
Figure PCTCN2021097810-appb-000001
和
Figure PCTCN2021097810-appb-000002
由于
Figure PCTCN2021097810-appb-000003
面靠近滑移面
Figure PCTCN2021097810-appb-000004
Figure PCTCN2021097810-appb-000005
并且滑移面
Figure PCTCN2021097810-appb-000006
面与c面不垂直且有一定的斜角，激光切割后的单个成品芯粒在
Figure PCTCN2021097810-appb-000007
面实际的裂开方向沿着
Figure PCTCN2021097810-appb-000008
面进行晶格移动，导致实际裂纹偏离切割道中间，当切割道的宽度较大时可以保证裂纹位置没有延伸到芯片发光电极区(电极)处，但在实际加工需要尽可能的增加产量，使得切割道的宽度越来越小，由于裂纹偏离切割道中间位置，将会划伤芯片发光电极区，导致发生漏电问题。如图2所示，LED晶圆裂片后LED芯片侧边形成有一夹角现象90+/-10度，如此容易致发光外延叠层周外的边缘出现大、小边缘、形状不规则等问题。图3显示了将图2所示的LED芯片100排列于基板上的实物照片图，从图中可以看出LED芯片背面(基板的背面)形状不规则，当发光外延叠层发射的光线从基板向外射出时，光线分布不均匀。图4显示了图2所示LED芯片的配光曲线图，由于芯片的边缘歪曲造成光型不对称。
发明内容
因此，本发明之目的，即在提供一种能够克服先前技术的至少一个缺点的发光二极管及其制作方法。
在一些实施例中，本发明提供一种发光二极管的制作方法，包括步骤：
一、提供一LED晶圆，该LED晶圆包含基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层；
二、在所述LED晶圆的表面定义切割道，该切割道包括相互垂直的第一切割方向和第二切割方向；
三、提供激光光束聚焦于所述基板内部，沿第一方向在所述基板内部的同一截面上形成X条切割线，沿第二方向在所述基板内部的同一截面上形成Y条切割线，其中y>x>0，且y≥3；
四、将该LED晶圆沿着所述切割道分离为若干个LED芯片。
上述制作方法采用双面非对称多焦点的隐形切割方式，针对
Figure PCTCN2021097810-appb-000009
面靠近滑移面
Figure PCTCN2021097810-appb-000010
Figure PCTCN2021097810-appb-000011
利用多焦点的激光隐形切割对
Figure PCTCN2021097810-appb-000012
的晶格方向进行垂直多点破坏，避免后续在劈裂过程中的裂纹会沿着滑移面
Figure PCTCN2021097810-appb-000013
方向进行龟裂，从而获得基本垂直的LED芯片，芯片基板的侧面与上表面的夹角为90+/-5度。
在一些实施例中，本发明提供了一种发光二极管，包括基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板包括相邻的第一侧面和第二侧面，所述第一侧面具有X条横向排列的第一切割痕，所述第二表面具有Y条横向排列的第二切割痕，其中y>x>0，且y≥3。
上述发光二极管通过在不同的侧面形成不同数量的切割痕，例如针对非易裂面的切割面形成较少条数的切割痕，有利于采用较大脉冲能量的激光光束在该基板内部以形成较大的变质部，避免激光束的光斑照射到外延层或者切割痕延伸到发光外延结构，从而损伤外延结构或者电极导致芯片失效，针对易裂面的切割面形成较多条数的切割痕，一方面对
Figure PCTCN2021097810-appb-000014
的晶格方向进行垂直多点破坏，避免后续在劈裂过程中的裂纹会沿着滑移面
Figure PCTCN2021097810-appb-000015
方向进行龟裂，获得基本垂直的侧壁，另一方面有利于在基板的侧壁形成细密的凹凸结构，增加LED芯片的侧面出光效率。
在一些实施例中，本发明提供了一种发光二极管的制作方法，包括步骤：
一、提供一LED晶圆，该LED晶圆包含基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层；
二、在所述LED晶圆的表面定义切割道，该切割道包括相互垂直的第一切割方向和第二切割方向；
三、提供激光光束聚焦于所述基板内部，沿第一切割方向在所述基板内部的同一截面上形成 X条切割线，沿第二切割方向在所述基板内部的同一截面上形成Y条切割线，用于第一切割方向的激光光束的脉冲能量大于第二切割方向的激光光束的脉能量，其中y≥x>0，且y≥3；
四、将该LED晶圆沿着所述切割道分离为若干个LED芯片。
上述发光二极管的制作方法，在切割过程中采用不同的激光能量分别在不同的侧面形成切割痕，例如针对位于非易裂面的切割面采用较大脉冲能量的激光光束在该基板内部以形成较大的变质部，确保后续顺利进行裂片，针对位于易裂面的切割面则采用较小脉冲能量的激光光束在该基板内部形成较小的变质部，避免激光蚀刻过程损伤外延层或者在劈裂过程中的裂纹延伸至基板的上表面之上损伤半导体外延叠层结构、绝缘层或者电极导致芯片失效。
在一些实施例中，本发明提供一种发光二极管，包括基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板包括相邻的第一侧面和第二侧面，所述第一侧面具有第一切割痕，所述第二侧面与所述基板的上表面的夹角为85～95°之间，且至少具有五条横向排列的第二切割痕，相邻的两线所述第二切割线之间的间距大于0且小于或者等于30μm，所述第二切割痕包括一系列位于切割线中心线的爆点及各个所述爆点引出的裂纹，相邻的两条切割痕的裂纹具有一定的间距或者相连。
上述发光二极管的基板为晶体结构，其上表面为C平面，具有一基板上表面在一夹角的滑裂面，其中第二侧面与C平面垂直并靠近滑裂面
Figure PCTCN2021097810-appb-000016
因此在第二侧面上设置至少五行横向排列的第二切割痕，相邻的两线所述第二切割线之间的间距大于0且小于或者等于30μm，进而对
Figure PCTCN2021097810-appb-000017
的晶格方向进行垂直多点破坏，避免后续在劈裂过程中的裂纹会沿着滑移面
Figure PCTCN2021097810-appb-000018
方向进行龟裂，获得基本垂直的侧壁。
在一些实施例，本发明提供了一种发光二极管，包括基板及位于基上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板包括相邻的第一侧面和第二侧面，所述第一侧面具有X条第一切割痕，所述第二侧面具有Y条第二切割痕，其中第一切割痕的纹理粗糙度大于所述第二切割痕的纹理的粗糙度。
上述发光二极管中，在难裂面形成较粗大的切割痕，一方面有利于进行切割，另一方面有利于提高取光效率，在易裂面形成较细的切割痕，可以避免产生较大的内部应力，进 而减少裂片过程中发生的龟裂达到基板的第一表面之上损伤LED芯片的各功能层。
在一些实施例中，本发明提供了一种发光二极管，包括基板及位于基上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板为晶体结构，包括相邻的第一侧面和第二侧面，其中第二侧面为易裂面，包含Y条平行排列的切割痕，其中靠近发光外延叠层一侧的第一行的切割纹理的尺寸小于其他行的切割痕。
通过在控制靠近发光外延叠层一侧的切割痕尺寸小于其下方的切割痕，可以较好的避免切割痕在裂片过程中采外力作用，裂纹延伸到发光外延结构之上，从而损伤外延结构。
在一些实施例中，本发明提供了一种发光二极管，包括基板及位于基上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板为晶体结构，包括相邻的第一侧面和第二侧面，其中第一侧面为非易裂面，至少包括三条横向排列的第一切割痕，相邻的第一切割痕不相连或者相连接，但基本不相互交错。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
通过参考附图会更加清楚的理解本发明的特征和优点，附图是示意性的而不应理解为对本发明进行任何限制。
图1显示了蓝宝石基板的晶格结构图。
图2显示了现有的LED芯片的实物照片。
图3显示了将图2所示的LED芯片排列于基板上的实物照片图。
图4显示了图2所示LED芯片的配光曲线图。
图5显示了根据本发明实施的一种LED芯片的制作流程图。
图6～9为图5所述的一种LED芯片的制作工艺流程的结构示意图。其中，图6显示了一种LED外延结构的侧面剖视图；图7为在图6所示的外延结构中定义LED芯片尺寸及切割道，图8示意了采用激光束沿第一方向在基板内部形成的切割线；图9示意了采用激光束沿第二方向在基板内部形成的切割线；图10示意了进行裂片后在基板的第一侧面(对应于第一方向)形成的切割痕；图11示意了进行裂片后在基板的第二侧面(对应于第二方向)形成的切割痕。
图12～13显示了采用图5所述LED制作方法形成LED芯片的SEM照片，其中图12显示了在LED的基板第一侧面形成的切割痕，图13显示了在LED基板的第二侧面形成的切割痕。
图14显示了根据本发明实施的一种LED芯片的俯视图。
图15显示了根据本发明实施的一种LED芯片的制作流程图。
图16和图17为采用图15所示LED芯片制作方法形成的LED芯片的SEM照片，其中图16显示了LED芯片的基板第一侧面上的切割痕，图17显示了LED芯片的基板的第二侧面上的切割痕。
图18显示了将图15所示LED制作方法形成的LED芯片排列于基板上的实物照片图。
图19显示了图18所示LED芯片的配光曲线图。
图20显示了根据本发明实施的另一种发光二极管。
图21显示了根据本发明实施的另一种发光二极管。
图22显示了根据本发明实施的另一种发光二极管。
图23显示了图22所示LED芯片的SEM照片。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。
实施例一
本实施例公开如下一种LED芯片的制作方法及采用该制作方法形成的LED芯片，其针对不同的晶面采用不同功率的激光进行多焦点隐切，其中对于靠近滑移面的晶面利用密集且小的多点隐切，形成近似连续性的多点切割，阻止劈裂过程中的裂纹沿
Figure PCTCN2021097810-appb-000019
面进行龟裂。图5显示了该制作方法的流程，主要包括下面步骤S110～S140，下面结合图7～12进行详细说明。需要说明的，本实施例的不同功率的激光是指单个焦点的功率。
步骤S110：提供LED晶圆片，该LED晶圆片包括基板110及位于其上的发光外延叠层120，如图6所示。具体的，基板110优选为透明或者半透明材料，发光外延叠层120发射的光线可以透过该基板110向外射出，且为用于发光外延叠层120生长的生长基板，如蓝宝石基板、GaN基板、AlN基板等。该基板110包括第一表面S11、第二表面S12以及侧壁，其中第一表面S11和第二表面S22相对，基板110可以包括至少形成在第一表面S11的 至少一部分区域的多个突起。例如，基板110可以为经图案化的蓝宝石基板。发光外延叠层120外延可以通过物理气相沉积(Physical Vapor Deposition，PVD)、化学气相沉积(Chemical Vapor Deposition，CVD)、外延生长(Epitaxy Growth Technology)和原子束沉积(Atomic Layer Deposition，ALD)等方式形成在基板210上，通常包括第一导电类型半导体层121、有源层122及第二导电类型半导体层123，具体的发光外延叠层120可包括Ⅲ-Ⅴ型氮化物类半导体，例如可包括如(Al、Ga、In)N的氮化物类半导体或者包括(Al、Ga、In)P的磷化物半导体或者(Al、Ga、In)As的砷化物类半导体。第一导电类型半导体层121可包括n型杂质(例如，Si、Ge、Sn)，第二导电类型半导体层123可包括p型杂质(例如，Mg、Sr、Ba)。并且，上述杂质类型也可以相反。有源层122可包括多量子阱构造(MQW)，可调节半导体的元素组成比，以便射出所期望的波长。
步骤S120：在该LED晶圆的表面定义切割道，包括相互垂直的第一切割方向D1的第一切割道和第二切割方向D2的第二切割道。具体的，基板110为晶体结构，其中基板100的第一表面S11为C平面，该晶体结构包含与C面呈一定夹角的滑裂面，其中第二方向D2对应的晶面与C平面垂直并靠近滑裂面。在一个具体实施例中，所述基板110为蓝宝石材料，其中第一方向D1对应于蓝宝石晶体的非易裂面，第二方向D2对应于蓝宝石晶体的易裂面，通过切割道将该LED晶圆划分为一系列的发光单元，在每个发光单元上定义电极区，通过一次光罩或多次光罩，蚀刻电极区域的第二导电类型半导体层123、有源层122露出第一导电类型半导体层121的部分表面，蚀刻切割道区域的第二导电类型半导体层123、有源层122、第一导电类型半导体层121，直至基板110的第一表面S11。
进一步的在暴露的发光外延叠层120的表面及侧壁上覆盖一层绝缘层130。现有的镀膜工艺，如蒸镀或溅射镀膜，由于阴影效应导致绝缘层130通常在发光外延叠层的侧壁厚度会低于在发光外延叠层的顶表面以及基板的第一表面的厚度，导致发光外延叠层的侧壁上的厚度为半导体序列的顶表面的厚度的40～90％。在一个具体实施例中，先在第二导电类型半导体层123的表面形成接触电极150，材料可以是ITO、GTO、GZO、ZnO或几种的组合，然后形成该绝缘层130。通过光刻和蒸镀工艺在绝缘层制作第一电极141和第二电极142。第一电极141和第二电极142在绝缘层130上的最小水平间距优选地为5μm以上，例如可以为20～40μm，或者40～60μm或者60～80μm，材料可以为Cr、Pt、Au、Ti、Ni、Al等金属的组合。较佳的，该电极为多层结构，其表层优选为Au材料。第一电极141通过贯穿绝缘层130开口结构171与第一导电类型半导体层121形成电连接，第二电极142通过贯穿绝缘层130的开口结构172与接触电极150形成电性连接。
步骤S130：提供激光光束聚焦于基板110内部，沿第一方向D1在基板110内部的同一截面上形成X条切割线，沿第二方向D2在基板110内部的同一截面上形成Y条切割线(y≥x≥1)。具体的，采用第一脉冲能量的激光光束在基板110内部的同一截面上形成X条第一切割线，如图8所示；采用第二脉冲能量的激光光束沿第二方向D2在基板110内部的同一截面上形成Y条第二切割线，如图9所示。在本实施例中，第一方向D1对应于非易裂面，因此采用较大功率的激光束，从而在基板110内部形成至少一条连续的第一切割线1110，该第一切割线1110与基板110的第一表面的距离优选为15μm以上，确保激光蚀刻基板110内部时不会损伤外延层，例如可以为20μm～60μm，相邻的第一切割线1110之间的间距可以为10～50μm。该第一切割线1110包括了一系列基本等间距排列的第一爆点1111以及与各第一爆点1111连接的蚀刻纹理1112(变质区)，该蚀刻纹理1112为不规则分布的纹理。优选地，位于第一行的相邻的第一爆点1111的间距优选为1μm以上且12μm以下，如果低于1μm将影响效率，如果超过12μm则第一切割线1110可能出现没有连续的情况导致后续难以劈裂，该间距可以为3～5μm，或者5～8μm，或者8～12μm，在本实施例中，该间距优选为3～7μm。第二方向D2对应于易裂面，因此采用较小功率的激光束在基板110内部形成非连续的多条第二切割线1120，该第二切割线1120与基板110的第一表面S11的距离优选为10μm以上，较佳为15～50μm，该距离过低一方面激光在蚀刻基板过程中容易损伤外延层，另一方面裂片过程中产生的龟裂也可能超过基板110的第一表面S11达到外延层、绝缘层或者电极，该距离太大则裂片过程中容易沿
Figure PCTCN2021097810-appb-000020
的晶格方向进行斜裂。该切割线1120由一系列间隔的纹理，且相对规则排列，该切割线112包括了一系列第二爆点及由该第二爆点向外进行延伸的纹理，相邻的第二爆点之间的间距优先为5μm以上且20μm以下，在一个具体实施例中该间距为8～12μm。
在本实施例，在第一方向D1和第二方向D2优选采用单刀多焦点的激光束，其中第一激光束的单个焦点的平均功率可以为0.07-5毫瓦，第二激光束的单个焦点的平均功率可以为0.03～3毫瓦。
步骤S140：将该LED晶圆沿着所述切割道分离为若干个LED芯片。请参看图10和11，形成的LED芯片的第一侧面(对应于第一切割方向)具有至少两行平行的第一切割痕111，该第一切割痕111包括了由第一切割线1110向上、下延伸的裂纹1113；LED芯片的第二侧面(对应于第二切割方向)具有至少两条平行的第二切割痕112和横向裂纹113，该第二切割痕112的纹理比第一切割痕111的纹理相对规则且细。图12显示了根据本实施例的制作方法形成的LED芯片的第一侧面的SEM照片，该第一侧面包括了两条平行的第一切割 痕111。从图中可以看出，该第一切割痕111包括第一切割线1110及由该第一切割线1110向上、下方向延伸的裂纹1113，其中第一条第一切割痕靠近基板110的上表面，其内的第一爆点1111与基板上表面S11的距离H11为30～60μm，例如可以为40μm，第二条第一切割痕111靠近基板110的第二表面S12，其内的第一爆点1111与基板110的第二表面S12的距离H12为20～50μm，例如可以为30μm或者50μm。在本实施例中，通过控制第一爆点1111与基板110第一表面S11的距离进而尽可能使得第一裂纹1113不会达到基板的第一表面S11。图13显示了根据本实施例的制作方法形成的LED芯片的第二侧面的SEM照片，该第二侧面包括了多条平行的第二切割痕112。从图中可以看出，该第二切割痕112包括第二切割线1120位于及由该第二切割线1120向上、下方向延伸的裂纹1122，其中第一条第二切割痕112靠近基板110的第一表面S11，其内的第二爆点与基板110第一表面S11的距离H21为20～60μm，第二条切割痕靠近基板110的第二表面S12，其内的爆点与基板110的第二表面S12的距离H22为10～60μm，例如可以为30μm～50μm，其中第一条切割痕的裂纹没有达到基板110的第一表面S11，且尺寸小于第二条切割痕的裂纹的尺寸，第二条切割痕的裂纹向基板110的第二表面S12延伸，部分到达或者接近基板110的第二表面S12。进一步地，在第一条切割痕的下方还包括一条横向纹理113，第一条切割痕的裂纹1122朝向基板110的第二表面S12延伸并截止于该横向纹理113。
在本实施例中，在切割过程中采用不同的激光能量分别在不同的侧面形成切割痕，例如针对位于非易裂面的切割面采用较大脉冲能量的激光光束在该基板110内部以形成较大的变质部，确保后续顺利进行裂片，避免切割时常会出现双晶问题(即两个芯片之间没有分开)，针对位于易裂面的切割面则采用较小脉冲能量的激光光束在该基板110内部形成较小的变质部，避免后续在劈裂过程中的裂纹延伸至基板110的第一表面S11之上损伤半导体外延叠层120结构或者电极导致芯片失效。
图14显示了根据本发明实施的一种LED芯片的俯视图，具体为一矩形或者正方形的倒装型LED芯片。该LED芯片包括该LED芯片包括如下堆叠层：基板110、发光外延叠层120、绝缘层130、第一电极141和第二电极142。其中基板110包含顺时针环绕的四条边A1～A4，其中边A1和A3平行且为短边，边A2和A4平行且为长边。该LED芯片可为具有较小的水平面积的小尺寸LED芯片，例如可具有约62500μm 2以下的水平截面积，进而可具有约900μm 2以上且约62500μm 2以下的水平截面积，LED芯片的尺寸可以通过基板110的第一表面S11的尺寸反映，例如透明基板110的第一表面S11的边长尺寸优选地小于等于300μm，较佳地，介于200～300μm之间，或者100～200μm，或为100μm以下更小 的尺寸，优选的介于30μm～150μm之间。基板110的厚度优选介于30～160μm之间，例如50～80μm，或者80～120μm，或者120～160μm。发光外延叠层120的厚度介于4～10μm之间。本实施例的LED芯片具有上述尺寸及厚度，因此所述LED芯片可容易地应用到要求小型和/或薄型发光装置的各种电子装置。
图12简单示意了根据本发明实施的一种LED芯片的基板110的边A1或者A3对应的侧面，该基板侧面包括两条平行的第一切割痕111，图13示意了基板110的边A2或者A4对应的侧面，包括了两条平行的第二切割痕112及位于第一条第二切割痕112下方的横向裂纹113。从图中可以看出，第一切割痕111的尺寸和粗糙度大于第二切割痕112的尺寸和粗糙度。在本实施例中，对于边A1及A3所在的难裂面，在该基板110内部以形成较大尺寸的变质部，确保后续顺利进行裂片，避免切割时常会出现双晶问题(即两个芯片之间没有分开)，对于边A2和A4所在的易裂面，在该基板110内部形成较小的变质部，避免后续在劈裂过程中的裂纹延伸至基板110的第一表面之上损伤半导体外延叠层结构或者电极导致芯片失效。
进一步地，所述绝缘层130为绝缘反射层，覆盖发光外延叠层的顶表面和侧壁，当发光层辐射的光通过接触电极150到达绝缘层130的表面时，可通过绝缘层130反射大部分的光返回至发光外延叠层120中，并且大部分穿过基板110的第二表面S11侧出光，减少光从发光外延叠层120表面以及侧壁穿出导致光损失。优选地，绝缘层130能够对所述发光层辐射的光到达其表面的至少80％或者进一步的至少90％比例的光强进行反射。绝缘层130具体的可包括布拉格反射器。所述布拉格反射器能够以折射率不同的至少两种绝缘介质重复堆叠的方式形成，可形成为4对至20对，例如所述绝缘层可包括TiO 2、SiO 2、HfO 2、ZrO 2、Nb 2O 5、MgF 2等。在一些实施例中，绝缘层130可呈交替地沉积TiO 2层/SiO 2层。布拉格反射器的每一层可具有发光层辐射波段的峰值波长的1/4的光学厚度。布拉格反射器的最上部层可由SiNx形成。由SiNx形成的层的防湿性优异，可保护发光二极管免受湿气的影响。绝缘层230包括布拉格反射器的情况下，绝缘层130的最下部层可具有提高分布布拉格反射器的膜质量的底层或界面层。例如，绝缘层130可包括约0.2～1.0μm厚度的由SiO 2形成的界面层及在界面层上按照特定周期堆叠层TiO 2/SiO 2。
在一些实施例中，绝缘层130也可以仅仅是单独的一层绝缘层，优选地，反射率通常会低于布拉格反射层，至少40％的光从该绝缘层130射出，优选地，至少1μm或更优选地为2μm以上的厚度，如SiO 2，具有优异的防湿性，可保护发光二极管免受湿气的影响。
接触电极150可与第二导电类型半导体层123欧姆接触。该接触电极150可包括透 明导电层。透明导电层例如还可包括如氧化铟锡、氧化锌、氧化锌铟锡、氧化铟锌、氧化锌锡、氧化镓铟锡、氧化铟镓、氧化锌镓、铝掺杂氧化锌、氟掺杂氧化锡等的透光性导电氧化物、及如Ni/Au等的透光性金属层中的至少一种。该导电性氧化物还可包括各种掺杂剂。优选地，接触电极150的厚度是20～300nm。接触电极150与第二导电类型半导体层123的表面接触电阻优选地低于金属电极在第二导电类型半导体层123的表面接触电阻，因此可以降低顺向电压，提高发光效率。
第一电极141和第二电极142为多层结构，底层为Cr、Al、Ti、Ni、Pt、Au金属材料中一种或多种叠层组合。在一些实施例中，第一、第电极的表层为含Sn金属材料，在另一些实施例中，所述第一、第二电极的表层也可以为Au金属材料。
实施例二
图15显示了根据本发明实施的另一种LED芯片的制作方法，主要包括了下面四个步骤：
步骤S210：提供一个LED晶圆，该LED晶圆包含基板110及位于该基板110第一表面S11之上的发光外延叠层120；
步骤S220：在所述LED晶圆的表面定义切割道，包括相互垂直的第一切割方向D1和第二切割方向D2；
步骤S230：提供激光光束聚焦于基板110内部，沿第一方向在基板内部的同一截面上形成X条切割线，沿第二方向在基板内部的同一截面上形成Y条切割线，其中y>x>0，且y≥3；
步骤S240：将该LED晶圆沿着所述切割道分离为若干个LED芯片。
其中步骤S210、S220和步骤S240可以参照实施例一的步骤S110、S120和S140进行，下面重点针对步骤S230进行详细说明。
在本实施例中，针对于靠近滑移面的切割面
Figure PCTCN2021097810-appb-000021
使用小功率激光进行多焦点隐切，其隐切点数优选为大于或者等于3且小于或者等于20，利用密集且小的多点隐形切割，在同一切割面的厚度方向上形成近似连续性的多点切割，对
Figure PCTCN2021097810-appb-000022
面的晶格方向进行垂直多点破坏，使得后续在劈裂过程中的裂纹可以延着
Figure PCTCN2021097810-appb-000023
方向进行龟裂，进而达到90+/-5度的LED芯片垂直度。
具体的，首先提供激光光束聚焦于基板110内部，沿第一方向D1在基板内部的同一截面上形成X条切割线，沿第二方向D2在基板110内部的同一截面上形成Y条切割线。在本实施例中，第一方向D1对应于难裂面，因此采用较大功率的激光束，形成1至10条的 切割线，优选为2～5条，当形成一条切割线(即单焦点切割)，需要采用更大功率的激光光束进行蚀刻，此时形成的切割痕可能较难控制，一方面切割时出现双晶问题(即两个芯片之间没有分开)的机率升高，另一方面裂片过程中龟裂可能达到基板110的第一表面S11之上进而损伤半导体发光叠层120、绝缘层或者电极导致LED芯片失效。第一切割线111的中心线(即焦点)的位置与基板110的第一表面S11的距离优选为10μm以上，更优选为15μm以上，例如可以20μm或者30μm或者35μm或者50μm，当该距离低于10μm时激光蚀刻形成的纹理或者裂片过程中发生的龟裂相对容易达到基板110的第一表面S11之上，从而损伤半导体发光叠层120、绝缘层或者电极，从而导致LED芯片失效。第二方向D1对应于易裂面，因此采用较小功率的激光束形成3～20条的切割线，优选为5～16条，如此可以达到垂直切割的效果，图18所示的上视图方向看到的芯片外观呈现方正无波浪形状。第二切割线112的中心线(即焦点)的位置与基板的上表面S11的距离优选为5μm以上，更优选为15μm以上，例如可以16μm，20μm或者30μm或者35μm，当该距离低于5μm时激光蚀刻形成的纹理或者裂片过程中发生的龟裂容易达到基板110的第一表面S11之上，从而损伤半导体发光叠层、绝缘层或者电极，从而导致LED芯片失效，当该距离超过50μm，则在裂片时龟裂容易沿
Figure PCTCN2021097810-appb-000024
发生斜裂。优选地，采用单刀多焦点形成该Y条第二切割线，如此一方面可以避免双纹路的劈裂外观，另一方面可以提交激光切割的效率。
在一个具体实施例中，该基板110的厚度为120μm～150μm，在第一方向D1的同一切割面上形成二条第一切割线111，最靠近基板111的第一表面S11的第一切割线的中心线(即焦点)的位置与基板110第一表面S11的距离为35～50μm，在第二方向D2的同一切割上形成7～9条的第二切割线112，最靠近基板10第一表面S11的第二切割线112的中心线(即焦点)的位置与基板10第一表面S11的距离为20～35μm，图16和图17分别显示了基板110的两个侧面的SEM照片，其中第一侧面具有两条第一切割痕111，第二侧面具有七条第二切割痕112及6条横向裂纹113。从图中可以看出，单条第一切割痕111比第二切割痕112粗大，具体为在基板的厚度方向具有更宽的尺寸，在垂直于基板110厚度的方向上具有更大的深度，且第一切割痕111的形状呈上、下不规则的锯齿状，第二切割痕112则由一系列等间距的纹理构成，在相邻的两条第二切割痕112之间均有一横向裂纹113。
采用本实施例所述LED芯片制作方法形成的LED芯片的结构层与实施例一所述LED芯片的结构层基本相同，在此不再赘述。区别主要在于基板110的形貌不一样：(1)基板110的第二侧面(长边侧面)基本垂直于与基板110的第一表面S11，两者之间的夹角α为90+/-5°以内，可以参考图16所示；(2)LED芯片形状更为规则，图18显示了本实施 例所述LED制作方法形成的LED芯片排列于基板上的实物照片图，可以看出各个LED芯片均呈矩形分布，边缘未出现明显歪曲；(3)LED芯片基板110的第二个侧面除上、下区域为平坦区域，中间区域为粗化区，由第二切割痕112及横向裂纹113占据，相邻的第二切割痕112基本达到位于两者之间的横向裂纹，形成近似连续性的纵向切割线114(厚度方向)，其中粗化区的面积占该侧面的面积的60％以上，优选为60％～80％，如此一方面可减少漏电风险(激光切割或者裂片损伤LED的各功能层)，另一方面由于基板110具有透光性，且具有较大的厚度，因此更有利于LED芯片的有源层发射的光线从侧面取光，增加取光效率。图19显示了图18所示LED芯片的配光曲线图，可以看出其光型对称。
本实施例在不同的基板110侧面形成不同数量的切割痕，针对位于非易裂面的切割面形成较少条数的切割痕(例如2～5条)，有利于采用较大脉冲能量的激光光束在该基板内部以形成较大的变质部，避免切割痕延伸到发光外延结构，从而损伤外延结构或者电极导致芯片失效，对于位于m面等易裂面的切割面形成较多条数的切割痕(例如5～20条)，在基板110的厚度方向上形成近似连续性的纵向切割线，进而对
Figure PCTCN2021097810-appb-000025
的晶格方向进行垂直多点破坏，避免后续在劈裂过程中的裂纹会沿着滑移面
Figure PCTCN2021097810-appb-000026
方向进行龟裂，获得基本垂直的侧壁。下面结合对比例对本实施例的有益效果进行说明。
(一)光效测试
分别制作样品A和样品B(对比例)并测度其光输出效率，其中样品一采用本实施例所述的方法进行制作，在此需要说明的是，样品A和样品B采用相同结构的LED晶圆进行制作，且步骤S210、S220和S240的工艺及条件均相同，样品A在步骤S230中采用具体的，采用双焦点激光光束沿第一方向在D1基板110内部的同一截面上形成2条第一切割线，采用多焦点激光光束沿第二方向D2在基板110内部的同一截面上形成7条第一切割线，并进行裂片形成LED芯片，其具体结构参考图16和17。样品B在步骤S230中采用单焦点进行分别沿第一方向D1和第二方向D2在基板110内部的同一截面形成切割痕，然后进行裂片形成LED芯片，如图2所示。各取10颗芯片测试光输出效率，结果参考表一。从表格一可以看出来，本实施例的LED芯片具有更早的发光效率，其发光效率提升约3％。
表一：
Figure PCTCN2021097810-appb-000027
(二)漏电测试
采用具有相同外延结构的LED晶圆，分别制作样品B、C和D，三种样品用于隐形切割的激光焦点数不同，其余均一样，具体如下：样品B在易裂面(D2方向)和非易裂面(D1方向)均采用单焦点聚焦于基板的内部进行切割；样品C在易裂面采用9焦点的激光束，在非易裂面采用2焦点的激光束进行激光切割；样品D在在易裂面(D2方向)和非易裂面(D1方向)均采用9焦点激光束进行激光切割，进行裂片后进行漏电流测试，当IR>0.1μA即判定为漏电流，测试结果如表二。从表二看：样品B的单个LED晶圆裂片的漏电流芯片数量最大，其主要原因之一在于单焦点切割在裂片过程中发生的龟裂较难控制，较容易损伤LED芯片的各功能层，其次是样品D，样品C的单个LED晶圆裂片的平均漏电流芯片数量最少。
表二：
Figure PCTCN2021097810-appb-000028
实施例三
图20显示了根据本发明实施的一种LED芯片的结构示意图。该LED芯片同样为一种倒装型LED芯片，有源层122发光的光线由基板110向外射出。与实施例一所示LED芯片的区别主要在于：该LED芯片在基板110的第二表面S12设置有一反射层160。该反射层160可以是单层或者多层结构，如此可以增加LED芯片的发光角度，其发光角度可以达到160°以上。其中该反射层160至少覆盖基板110的第二表面S12的中间区域，也可以完全覆盖基板的第二表面。较佳的，该反射层160为绝缘反射层，可以由高、低折射率的材料交替堆叠而成，例如由SiO 2和TiO 2交替堆叠而成。
在本实施例所述LED芯片可以适用于显示设备的背光模组，通过在LED芯片基板10的第二表面S12设置反射层160，改变LED芯片的出光途径进而增加LED芯片的发光角，有利于降低背光模组的厚度，缩小背光模组的尺寸。
实施例四
图21显示了根据本发明实施的一种LED芯片的结构示意图。前面各实施例所示LED芯片的发光外延叠层120通过外延生长形成于基板110上，在本实施例中，发光外延叠层120通过结合层180形成于基板110上。在一个具体的本实施例中，发光外延叠层120为AlGaInP系半导体层，该AlGaInP系外延结构先生长于砷化镓基板上，然后通过转移的方式将该AlGaInP系外延结构转移至透基板110上。
实施例五
图22显示了根据本发明实施的一种LED芯片的结构示意图。与实施例一所示LED芯片不同的是：采用相对较小功率的激光束在基板的难裂面形成至少三行的切割痕，该系列的切割痕可以不相连或者相连接，但基本不相互交错。其中靠近基板110的第一、第二表面S11、S12的切割痕111A的切割痕为锯齿状，具有一系列的爆点111A-1及由该爆点向第一表面S11、第二表面S12延伸的裂纹111A-2，位于中间区域的切割痕111-B为一系列的激光蚀刻形成的爆点。
图23显示了该侧面的SEM照片，通过该方式形成的非易裂面上形成细且密聚的凹凸结构，该凹凸结构在该侧面上的面积占比可以达到50％以上，这一方面有利于进行芯片切割且降低损伤芯片各功能层的风险，另一方面有利于增加LED芯片的从基板的侧面的出光效率。
实施例六
本实施例公开了一种深紫外LED芯片，其中基板110的厚度为200μm～750μm，因此易裂 面需要采用多刀且多焦点进行激光切割。在一个具体实施例中，该LED芯片的基板110厚度为350～500μm，此时在第一方向D1(非易裂面)采用可以单刀9焦点的激光束进行切割，第二方向D2(易裂面)采用3刀的9焦点的激光束进行切割。在另一个具体实施例中，该基板的厚度超过500μm，因此在第一方向(非易裂面)采用可以3刀9焦点的激光束进行切割，第二方向(易裂面)采用5刀的9焦点的激光束进行切割。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明，本领域技术人员可以在不脱离本发明的精神和范围的情况下作出各种修改和变型，这样的修改和变型均落入由所附权利要求所限定的范围之内。

Claims (38)

  1. 发光二极管的制作方法，包括步骤：
    一、提供一个LED晶圆，该LED晶圆包含基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层；
    二、在所述LED晶圆的上表面定义切割道，该切割道包括相互垂直的第一切割方向和第二切割方向；
    三、提供激光光束聚焦于所述基板内部，沿第一方向在所述基板内部的同一截面上形成X条切割线，沿第二方向在所述基板内部的同一截面上形成Y条切割线，其中y>x>0，且y≥3；
    四、将该LED晶圆沿着所述切割道分离为若干个LED芯片。
  2. 根据权利要求1所述的发光二极管的制作方法，其特征在于：所述基板为蓝宝石衬底，所述第一方向对应于蓝宝石晶体的非易裂面，所述第二方向对应于蓝宝石晶体的易裂面。
  3. 根据权利要求1所述的发光二极管的制作方法，其特征在于：采用一第一激光光束沿着第一方向在所述基板内部的同一截面上形成所述X条切割线，采用一第二激光束光沿着第二方向在所述基板内部的同一截面上形成所述Y条切割线，其中第一激光光束的脉冲能量大于所述第二激光光束的脉冲能量。
  4. 根据权利要求1所述的发光二极管的制作方法，其特征在于：其中1≤x≤5。
  5. 根据权利要求1所述的发光二极管的制作方法，其特征在于：其中3≤y≤20。
  6. 根据权利要求1所述的发光二极管的制作方法，其特征在于：其中1≤x≤3，5≤y≤20。
  7. 根据权利要求1所述的发光二极管的制作方法，其特征在于：采用单刀多焦点的方式在所述基板内部形成切割线。
  8. 根据权利要求1所述的发光二极管的制作方法，其特征在于：所述基板的厚度大于或者等于80μm且小于或者200μm，或者大于200μm且于小于750μm。
  9. 根据要利要求1所述的发光二极管的制作方法，其特征在于：所述激光光束在所述基板内部的聚焦点与所述基板的上表面的距离大于或者等于10μm。
  10. 发光二极管，包括基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板包括相邻的第一侧面和第二侧面，所述第一侧面具有X条横向排列的第一切割痕，所述第二表面具有Y条横向排列的第二切割痕，其中y>x>0，且y≥3。
  11. 根据权利要求10所述的发光二极管，其特征在于：所述第一侧面和第二侧面与所述基板上表面的夹角为85～95°。
  12. 根据权利要求10所述的发光二极管，其特征在于：所述X条横向排列的第一切割痕相连或者相互交错，所述Y条第二切割痕整齐排列。
  13. 根据权利要求10所述的发光二极管，其特征在于：所述X条横向排列的第一切割痕的纹理比所述Y条第二切割痕的纹理粗。
  14. 根据权利要求10所述的发光二极管，其特征在于：所述X条横向排列的第一切割痕中至少一条切割痕包括位于该条切割痕中心线的第一爆点及由该第一爆点向外不规则延伸的纹理。
  15. 根据权利要求10所述的发光二极管，其特征在于：所述Y条横向排列的第一切割痕的至少一条切割痕包括位于该条切割痕中心线的第二爆点及由该第二爆点向外引出的裂纹，相邻的两条切割痕的裂纹具有一定的间距或者相连。
  16. 根据权利要求10所述的发光二极管，其特征在于：所述至少包括三条横向排列的第一切割痕，相邻的第一切割痕不相连或者相连接，但基本不相互交错。
  17. 根据权利要求16所述的发光二极管，其特征大于：靠近所述基板的上、下表面的第一切割痕为锯齿状，具有一系列的爆点及由该爆点向上、下表面的裂纹，位于中间区域的第一切割痕为一系列的激光蚀刻形成的爆点。
  18. 根据权利要求10所述的发光二极管，其特征在于：所述Y条横向排列的第二切割痕平行排列，相邻的两线第二切割线之间的间距大于0且小于或者等于30μm。
  19. 根据权利要求10所述的发光二极管，其特征在于：所述第二切割痕在第二侧面上的面积占为50％以上。
  20. 根据权利要求10所述的发光二极管，其特征在于：所述基板的厚度为80～200μm，第一侧面具有2～5条第一切割痕，第二侧面具有5～20条切割痕。
  21. 根据权利要求10所述的发光二极管，其特征在于：所述第一切割痕的中心线与所述基板上表面的距离为15μm以上，所述第二切割痕的中心线与所述基板上表面的距离为10μm以上。
  22. 根据权利要求10所述的发光二极管，其特征在于：所述第二侧面还包括一横向裂纹，其与所述基板的上表面基本平行，所这第二切割痕在基板的厚度方向上进行上、下延伸，并止于该横向裂纹。
  23. 根据权利要求10所述的发光二极管，其特征在于：所述基板的上表面具有规则的形状。
  24. 根据权利要求10所述的发光二极管，其特征在于：所述基板的上表面呈矩形，包括第 一边长和第二边长，其中第一边长为短边，其对应于所述基板的第一侧面，所述第二边长对应于所述基板的第二侧面。
  25. 根据权利要求10所述的发光二极管，其特征在于：所述透明基板的上表面的至少一个边缘的边长介于200～300μm或100～200μm或40～100μm。
  26. 根据权利要求10所述的发光二极管，其特征在于：所述发光外延叠层通过外延生长形成于所述基板上。
  27. 根据权利要求10所述的发光二极管，其特征在于：所述发光外延叠层通过一透明结合层与所述基板结合。
  28. 根据权利要求10所述的发光二极管，其特征在于：还包括一第一绝缘性反射层，其形成于所述发光外延叠层之上。
  29. 根据权利要求10所述的发光二极管，其特征在于：还包括一第二反射层，其形成于所述基板的下表面之上。
  30. 发光二极管，包括基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板包括相邻的第一侧面和第二侧面，所述第一侧面具有第一切割痕，所述第二侧面与所述基板的上表面的夹角为85～95°之间，且至少具有五条横向排列的第二切割痕，相邻的两线所述第二切割线之间的间距大于0且小于或者等于30μm，所述第二切割痕包括一系列位于切割线中心线的爆点及各个所述爆点引出的裂纹，相邻的两条切割痕的裂纹具有一定的间距或者相连。
  31. 发光二极管，包括基板及位于基上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板包括相邻的第一侧面和第二侧面，所述第一侧面具有X条第一切割痕，所述第二侧面具有Y条第二切割痕，其中第一切割痕的纹理粗糙度大于所述第二切割痕的纹理的粗糙度。
  32. 根据权利要求31所述的发光二极管，其特征在于：所述第二侧面还包括一横向裂纹，其与所述基板的上表面基本平行。
  33. 根据权利要求31所述的发光二极管，其特征在于：所述第一切割痕包括一系列第一爆点及由第一爆点向外延伸的第一蚀刻纹理，所述第二切割痕包括一系列第二爆点及由第二爆点向外延伸的第二蚀刻纹理，所述第一爆点的间距小于所述第二爆点的间距。
  34. 根据权利要求33所述的发光二极管，其特征在于：所述第一爆点的间距为1μm以上且12μm以下，所述第二爆点的间距大于或者等于5μm且小于或者等于20μm。
  35. 根据权利要求33所述的发光二极管，其特征在于：相邻的第一蚀刻纹理相交，相邻的第二蚀刻纹理不相交。
  36. 发光二极管，包括基板及位于基上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层，其特征在于：所述基板为晶体结构，包括相邻的第一侧面和第二侧面，其中第一侧面为非易裂面，至少包括三条横向排列的第一切割痕，相邻的第一切割痕不相连或者相连接，但基本不相互交错。
  37. 根据权利要求36所壕的发光二极管，其特征大于：靠近所述基板的上、下表面的第一切割痕为锯齿状，具有一系列的爆点及由该爆点向上、下表面的裂纹，位于中间区域的第一切割痕为一系列的激光蚀刻形成的爆点。
  38. 发光二极管的制作方法，包括步骤：
    一、提供一LED晶圆，该LED晶圆包含基板及位于该基板上表面之上的发光外延叠层，该发光外延叠层自基板一侧起包含第一类型半导体层、有源层和第二类型半导体层；
    二、在所述LED晶圆的表面定义切割道，该切割道包括相互垂直的第一切割方向和第二切割方向；
    三、提供激光光束聚焦于所述基板内部，沿第一切割方向在所述基板内部的同一截面上形成X条切割线，沿第二切割方向在所述基板内部的同一截面上形成Y条切割线，用于第一切割方向的激光光束的脉冲能量大于第二切割方向的激光光束的脉能量，其中y≥x>0，且y≥3；
    四、将该LED晶圆沿着所述切割道分离为若干个LED芯片。
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