WO2022239722A1 - 半導体装置、マッチング回路及びフィルタ回路 - Google Patents

半導体装置、マッチング回路及びフィルタ回路 Download PDF

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Publication number
WO2022239722A1
WO2022239722A1 PCT/JP2022/019625 JP2022019625W WO2022239722A1 WO 2022239722 A1 WO2022239722 A1 WO 2022239722A1 JP 2022019625 W JP2022019625 W JP 2022019625W WO 2022239722 A1 WO2022239722 A1 WO 2022239722A1
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Prior art keywords
electrode layer
dielectric film
layer
electrode
semiconductor device
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PCT/JP2022/019625
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English (en)
French (fr)
Japanese (ja)
Inventor
真臣 原田
是清 伊藤
武史 香川
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Priority to CN202280032701.6A priority Critical patent/CN117242538A/zh
Priority to JP2023521008A priority patent/JP7563591B2/ja
Publication of WO2022239722A1 publication Critical patent/WO2022239722A1/ja
Priority to US18/502,482 priority patent/US20240072107A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/33—Thin- or thick-film capacitors (thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01—Frequency selective two-port networks
    • H03H7/0115—Frequency selective two-port networks comprising only inductors and capacitors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/601—Capacitive arrangements

Definitions

  • the present invention relates to semiconductor devices. Furthermore, the present invention relates to a matching circuit and a filter circuit including the above semiconductor device.
  • a MIM (Metal Insulator Metal) capacitor for example, is known as a typical capacitor element used in a semiconductor integrated circuit.
  • a MIM capacitor is a capacitor having a parallel plate type structure in which an insulator is sandwiched between a lower electrode and an upper electrode.
  • Patent Document 1 discloses a lower electrode formed on a substrate, a dielectric thin film formed on the lower electrode, an upper electrode formed on the dielectric thin film, and a substrate including the upper electrode. and a pair of electrode terminals respectively connected to the electrodes and arranged so that their ends are located on the same plane.
  • Patent Document 1 describes the use of, for example, silicon dioxide, tantalum pentoxide, strontium titanate, barium titanate, calcium titanate, etc. as materials for dielectric thin films.
  • the present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor device having high Q characteristics. A further object of the present invention is to provide a matching circuit and a filter circuit including the above semiconductor device.
  • a semiconductor device of the present invention comprises a substrate, a first electrode layer provided on the substrate, a dielectric film provided on the first electrode layer, and a second electrode provided on the dielectric film. a protective layer covering the first electrode layer and the second electrode layer; and external electrodes penetrating the protective layer, wherein the dielectric film is made of silicon nitride and contained in the dielectric film.
  • the atomic concentration ratio of Si to the total amount of Si and N used is 43 atom % or more and 70 atom % or less.
  • the matching circuit of the present invention includes the semiconductor device of the present invention.
  • a filter circuit of the present invention includes the semiconductor device of the present invention.
  • a semiconductor device with high Q characteristics can be provided. Furthermore, according to the present invention, it is possible to provide a matching circuit and a filter circuit including the above semiconductor device.
  • FIG. 1 is a cross-sectional view schematically showing an example of a capacitor according to a first embodiment of the invention.
  • FIG. 2 is a plan view schematically showing an example of the capacitor according to the first embodiment of the invention.
  • FIG. 3 is a graph showing the relationship between the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film and the Q value at a capacitance of 0.2 pF.
  • FIG. 4 is a graph showing the relationship between the content of F contained in the dielectric film and the Q value.
  • FIG. 5A is a schematic cross-sectional view for explaining an example of the process of forming an insulating film.
  • FIG. 5B is a schematic cross-sectional view for explaining an example of the process of forming the first electrode layer.
  • FIG. 5A is a schematic cross-sectional view for explaining an example of the process of forming an insulating film.
  • FIG. 5B is a schematic cross-sectional view for explaining an example of the process of forming the
  • FIG. 5C is a schematic cross-sectional view for explaining an example of the process of forming a dielectric film.
  • FIG. 5D is a schematic cross-sectional view for explaining an example of the process of forming the second electrode layer.
  • FIG. 5E is a schematic cross-sectional view for explaining an example of the process of forming a moisture-resistant film.
  • FIG. 5F is a schematic cross-sectional view for explaining an example of the process of forming a protective layer.
  • FIG. 5G is a schematic cross-sectional view for explaining an example of a step of forming a seed layer.
  • FIG. 5H is a schematic cross-sectional view for explaining an example of the process of forming the first plating layer and the second plating layer.
  • FIG. 5I is a schematic cross-sectional view for explaining an example of the step of removing part of the seed layer.
  • FIG. 5J is a schematic cross-sectional view for explaining an example of the process of forming a photosensitive resin film.
  • FIG. 5K is a schematic cross-sectional view for explaining an example of the process of forming the first resin body and the second resin body.
  • FIG. 6 is a cross-sectional view schematically showing an example of a capacitor according to the second embodiment of the invention.
  • FIG. 7 is an explanatory diagram showing an example of a matching circuit.
  • FIG. 8 is an explanatory diagram showing an example of a filter circuit.
  • a semiconductor device according to the present invention will be described below.
  • the present invention is not limited to the following configurations, and can be appropriately modified and applied without changing the gist of the present invention.
  • a combination of two or more of the individual preferred configurations of the present invention described below is also the present invention.
  • the semiconductor device of the present invention when each embodiment is not particularly distinguished, it is simply referred to as "the semiconductor device of the present invention".
  • the semiconductor device of the present invention and the shape, arrangement, etc. of each component are not limited to the illustrated examples.
  • the semiconductor device of the present invention may be a capacitor itself (that is, a capacitor element) or a device including a capacitor.
  • the external electrodes include first external electrodes connected to the first electrode layer and second external electrodes connected to the second electrode layer.
  • FIG. 1 is a cross-sectional view schematically showing an example of the capacitor according to the first embodiment of the invention.
  • FIG. 2 is a plan view schematically showing an example of the capacitor according to the first embodiment of the invention.
  • FIG. 1 is a cross-sectional view of the capacitor shown in FIG. 2 along line II.
  • the length direction, width direction, and thickness direction of a capacitor are defined by arrows L, W, and T, respectively, as shown in FIGS. direction.
  • the length direction L, the width direction W, and the thickness direction T are orthogonal to each other.
  • the capacitor 1 shown in FIGS. 1 and 2 includes a substrate 10, an insulating film 21 provided on the substrate 10, a first electrode layer 22 provided on the insulating film 21, and a a second electrode layer 24 provided on the dielectric film 23; a moisture-resistant film 25 provided on the dielectric film 23 and the second electrode layer 24; and external electrodes 27 penetrating the protective layer 26 .
  • the external electrodes 27 include first external electrodes 27A connected to the first electrode layer 22 and second external electrodes 27B connected to the second electrode layer 24 .
  • the first external electrode 27A penetrates the protective layer 26, the moisture-resistant film 25 and the dielectric film 23, and the second external electrode 27B penetrates the protective layer 26 and the moisture-resistant film 25. As shown in FIG.
  • the substrate 10 is not particularly limited, but is preferably a semiconductor substrate such as a silicon substrate or a gallium arsenide substrate, or an insulating substrate such as glass or alumina.
  • the insulating film 21 is provided so as to cover the entire one main surface of the substrate 10 .
  • the insulating film 21 may be provided so as to partially cover one main surface of the substrate 10 , but is provided in a region larger than the first electrode layer 22 and overlapping the entire first electrode layer 22 . There is a need.
  • the substrate 10 is an insulating substrate such as glass or alumina, the insulating film 21 may not be provided.
  • the material forming the insulating film 21 is not particularly limited, but preferably includes SiO 2 , SiN, Al 2 O 3 , HfO 2 , Ta 2 O 5 , ZrO 2 and the like.
  • the first electrode layer 22 is provided at a position away from the edge of the substrate 10 . That is, the edge of the first electrode layer 22 is located inside the edge of the substrate 10 .
  • the material forming the first electrode layer 22 is not particularly limited, but Cu, Ag, Au, Al, Ni, Cr, Ti, or alloys containing at least one of these metals are preferred.
  • the dielectric film 23 is provided so as to cover the first electrode layer 22 except for the opening.
  • the edge of the dielectric film 23 is also provided on the surface of the insulating film 21 from the edge of the first electrode layer 22 to the edge of the substrate 10 .
  • the edge of the dielectric film 23 does not have to reach the edge of the substrate 10 .
  • the dielectric film 23 is made of silicon nitride. Specifically, the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film 23 is 43 atom % or more and 70 atom % or less.
  • the thickness of the dielectric film 23 is not particularly limited, but is adjusted according to the desired capacitance value.
  • the thickness of the dielectric film 23 is preferably 0.4 ⁇ m or more, more preferably 0.44 ⁇ m or more.
  • the thickness of the dielectric film 23 is preferably 5 ⁇ m or less, more preferably 4 ⁇ m or less.
  • the second electrode layer 24 is provided facing the first electrode layer 22 with the dielectric film 23 interposed therebetween.
  • the material forming the second electrode layer 24 is not particularly limited, but Cu, Ag, Au, Al, Ni, Cr, Ti, or alloys containing at least one of these metals are preferred.
  • the moisture-resistant film 25 is provided so as to cover the dielectric film 23 and the second electrode layer 24 except for the opening. By providing the moisture-resistant film 25, the moisture resistance of the capacitor element, particularly the dielectric film 23, is enhanced. Note that the moisture resistant film 25 may not be provided.
  • the material forming the moisture-resistant film 25 is not particularly limited, but moisture-resistant materials such as SiO 2 and SiN are preferred.
  • the protective layer 26 has a position overlapping the openings of the dielectric film 23 and the moisture-resistant film 25 (openings overlapping the first electrode layer 22), and a position overlapping the openings of the moisture-resistant film 25 (openings overlapping the second electrode layer 24). is provided with an opening.
  • the provision of the protective layer 26 protects the capacitor element, particularly the dielectric film 23, from moisture.
  • the material constituting the protective layer 26 is not particularly limited, but preferably includes resin materials such as polyimide resin and resin in solder resist.
  • the material that constitutes the external electrode 27 is not particularly limited, but Cu, Ni, Ag, Au, Al, or the like is preferable.
  • the external electrode 27 may have a single layer structure or a multilayer structure.
  • the outermost surface of the external electrode 27 is preferably made of Au or Sn.
  • the first external electrode 27A has a multilayer structure, as shown in FIG. , may have
  • Examples of the seed layer 28a of the first external electrode 27A include a laminate (Ti/Cu) of a conductor layer made of titanium (Ti) and a conductor layer made of copper (Cu).
  • Examples of the constituent material of the first plating layer 28b of the first external electrode 27A include nickel (Ni).
  • Examples of the constituent material of the second plating layer 28c of the first external electrode 27A include gold (Au) and tin (Sn).
  • the second external electrode 27B When the second external electrode 27B has a multilayer structure, as shown in FIG. 1, the second external electrode 27B includes a seed layer 28a, a first plating layer 28b, and a second plating layer 28c in this order from the substrate 10 side. , may have
  • a laminate (Ti/Cu) of a conductor layer made of titanium (Ti) and a conductor layer made of copper (Cu) can be used.
  • Examples of the constituent material of the first plated layer 28b of the second external electrode 27B include nickel (Ni).
  • Examples of the constituent material of the second plating layer 28c of the second external electrode 27B include gold (Au) and tin (Sn).
  • the constituent material of the first external electrode 27A and the constituent material of the second external electrode 27B may be the same as or different from each other.
  • a first resin body 31 may be provided between the first external electrode 27A and the second external electrode 27B in plan view from the thickness direction T.
  • the first resin body 31 is provided on the surface of the protective layer 26, for example.
  • the tip of the first resin body 31 is preferably positioned higher than the tips of the first external electrode 27A and the second external electrode 27B in the thickness direction T, as shown in FIG.
  • the first resin body 31 is mounted on the wiring board side (for example, the upper surface of the wiring board, land, solder, etc.) before the first external electrode 27A and the second external electrode 27B. will come into contact with Therefore, the load is applied to the first resin body 31, and the load applied to the first external electrode 27A and the second external electrode 27B is suppressed.
  • the load is suppressed from being transmitted to the capacitor element via the first external electrode 27A and the second external electrode 27B, so damage to the capacitor element, particularly damage to the dielectric film 23 is suppressed.
  • the first resin body 31 preferably contains at least one resin selected from the group consisting of resin in solder resist, polyimide resin, polyimideamide resin and epoxy resin.
  • the first resin body 31 is preferably a cured product of photosensitive resin.
  • the first resin body 31 includes a first wall portion 31a provided on the first external electrode 27A side and a second wall portion 31b provided on the second external electrode 27B side and separated from the first wall portion 31a. may contain. In plan view as shown in FIG. 2, the first wall portion 31a and the second wall portion 31b are preferably provided in parallel.
  • the first wall portion 31a may be provided with an opening communicating with the space separating the first wall portion 31a and the second wall portion 31b.
  • the second wall portion 31b may be provided with an opening communicating with the space separating the first wall portion 31a and the second wall portion 31b.
  • a second resin body 32 may be provided.
  • the second resin body 32 is provided on the surface of the protective layer 26, for example. Also, the second resin body 32 may be provided outside the protective layer 26 , and in that case, may be provided on the substrate 10 .
  • the tip of the second resin body 32 is preferably positioned higher than the tips of the first external electrode 27A and the second external electrode 27B.
  • the second resin body 32 can disperse the load more widely, so that the load applied to the capacitor element, particularly the dielectric film 23, is sufficiently suppressed.
  • the tip of the second resin body 32 is preferably positioned lower than the tip of the first resin body 31 in the thickness direction T. In this case, for example, when the capacitor 1 is mounted on the wiring board, it can be stably held on the wiring board by the first resin body 31 .
  • the second resin body 32 preferably contains at least one resin selected from the group consisting of resin in the solder resist, polyimide resin, polyimideamide resin and epoxy resin.
  • the second resin body 32 is preferably a cured product of photosensitive resin.
  • the resin contained in the first resin body 31 and the resin contained in the second resin body 32 may be the same as or different from each other.
  • the second resin body 32 is a first resin body provided along the edge of the substrate 10 between the edge of the substrate 10 and the first external electrode 27A in plan view from the thickness direction T. It is preferable to have an outer peripheral portion 32a and a second outer peripheral portion 32b provided along the edge of the substrate 10 between the edge of the substrate 10 and the second external electrode 27B.
  • the first wall portion 31a and the first outer peripheral portion 32a are preferably connected. Moreover, it is preferable that the second wall portion 31b and the second outer peripheral portion 32b are connected to each other.
  • the semiconductor device of the present invention is characterized in that the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film is 43 atom % or more and 70 atom % or less.
  • FIG. 3 is a graph showing the relationship between the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film and the Q value at a capacitance of 0.2 pF.
  • Si3N4 which is a stoichiometric silicon nitride
  • Si/(Si+N) ratio in FIG. 3 the atomic concentration ratio of Si to the total amount of Si and N (referred to as the Si/(Si+N) ratio in FIG. 3) is 42.8 atom%.
  • FIG. 3 shows normalized relative values with the Q value at this time as 100%.
  • the Q value is improved when the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film is 43 atom % or more.
  • the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film is less than 43 atom %, the effect of improving the Q value is small.
  • the leak current increases, and the Q value is considered to decrease.
  • the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film exceeds 60 atom %, the electrostatic breakdown voltage of the dielectric film becomes small. It becomes difficult to meet the ESD (Electrostatic Discharge) withstand voltage. Therefore, the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film is preferably 60 atom % or less.
  • the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film is less than 50 atom %, the relative value of the Q value is less than 125%, and the improvement effect is small. Therefore, the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film is preferably 50 atom % or more.
  • the atomic concentration ratio of Si to the total amount of Si and N contained in the dielectric film can be calculated by analyzing the constituent elements of the dielectric film by X-ray photoelectron spectroscopy (XPS).
  • XPS X-ray photoelectron spectroscopy
  • Measurement device Quantes manufactured by ULVAC-Phi Measurement area: 100 ⁇ m ⁇ Measurement depth: 100nm
  • the content of F contained in the dielectric film is preferably 10 19 cm ⁇ 3 or less.
  • FIG. 4 is a graph showing the relationship between the content of F contained in the dielectric film and the Q value.
  • FIG. 4 shows normalized relative values with the Q value at this time as 100%.
  • the content of F contained in the dielectric film affects the Q value. As shown in FIG. 4, it can be confirmed that when the F content in the dielectric film is 10 19 cm ⁇ 3 or less, the improvement rate of the Q value is 10% or more.
  • the content of F contained in the dielectric film can be measured by secondary ion mass spectrometry (SIMS).
  • SIMS secondary ion mass spectrometry
  • the capacitor 1 shown in FIG. 1 is manufactured, for example, by the following method.
  • 5A to 5K are schematic cross-sectional views for explaining an example of the method for manufacturing the capacitor according to the first embodiment of the present invention.
  • FIG. 5A is a schematic cross-sectional view for explaining an example of the process of forming an insulating film.
  • an insulating film 21 is formed on the substrate 10 by, for example, thermal oxidation, sputtering, or chemical vapor deposition.
  • FIG. 5B is a schematic cross-sectional view for explaining an example of the process of forming the first electrode layer.
  • a conductor layer made of the constituent material of the first electrode layer 22 is formed on the surface of the insulating film 21 opposite to the substrate 10 by, for example, sputtering. After that, patterning of the conductor layer is performed by combining photolithography and etching to form the first electrode layer 22 as shown in FIG. 5B. More specifically, the first electrode layer 22 is formed up to a position away from the edge of the substrate 10 .
  • FIG. 5C is a schematic cross-sectional view for explaining an example of the process of forming a dielectric film.
  • a layer made of a constituent material of the dielectric film 23 is formed so as to cover the first electrode layer 22 by, for example, a sputtering method or a chemical vapor deposition method. Thereafter, this layer is patterned by, for example, a combination of photolithography and etching to form a dielectric film 23 as shown in FIG. 5C. More specifically, the dielectric film 23 is formed so as to provide an opening that partially exposes the first electrode layer 22 .
  • FIG. 5D is a schematic cross-sectional view for explaining an example of the process of forming the second electrode layer.
  • a conductor layer made of the constituent material of the second electrode layer 24 is formed, for example, by sputtering on the surface of the structure shown in FIG. 5C opposite to the substrate 10 . Thereafter, the conductive layer is patterned by, for example, a combination of photolithography and etching to form the second electrode layer 24 as shown in FIG. 5D. More specifically, the second electrode layer 24 is formed so as to face the first electrode layer 22 with the dielectric film 23 interposed therebetween.
  • FIG. 5E is a schematic cross-sectional view for explaining an example of the process of forming a moisture-resistant film.
  • a layer made of a constituent material of the moisture-resistant film 25 is formed on the surface of the structure shown in FIG. 5D opposite to the substrate 10 by, for example, chemical vapor deposition. Thereafter, this layer is patterned by, for example, a combination of photolithography and etching to form a moisture resistant film 25 as shown in FIG. 5E. More specifically, openings are provided at positions overlapping the openings in the dielectric film 23 for exposing a portion of the first electrode layer 22 and at positions exposing a portion of the second electrode layer 24 .
  • a moisture resistant film 25 is formed as follows.
  • FIG. 5F is a schematic cross-sectional view for explaining an example of the process of forming a protective layer.
  • a layer made of a constituent material of the protective layer 26 is formed, for example, by spin coating on the surface of the structure shown in FIG. 5E opposite to the substrate 10 . Thereafter, patterning of this layer is performed, for example, using only photolithographic methods when the constituent material of the protective layer 26 is photosensitive, and using photolithographic methods and photolithographic methods when the constituent material of the protective layer 26 is non-photosensitive. A combination of etching methods forms the protective layer 26 as shown in FIG. 5F.
  • the protective layer 26 is formed so that openings are provided in each of the positions overlapping the openings of .
  • FIG. 5G is a schematic cross-sectional view for explaining an example of a step of forming a seed layer.
  • FIG. 5H is a schematic cross-sectional view for explaining an example of the process of forming the first plating layer and the second plating layer.
  • FIG. 5I is a schematic cross-sectional view for explaining an example of the step of removing part of the seed layer.
  • a seed layer 28a is formed on the surface opposite to the substrate 10 of the structure shown in FIG. 5F. Then, by combining plating and photolithography, a first plating layer 28b and a second plating layer 28c are sequentially formed as shown in FIG. 5H. After that, as shown in FIG. 5I, part of the seed layer 28a is removed by, for example, an etching method.
  • a first external electrode 27A and a second external electrode 27B are formed as shown in FIG. 5I. More specifically, the first external electrode 27A is formed so as to be connected to the first electrode layer 22 through openings provided in the dielectric film 23, the moisture-resistant film 25, and the protective layer 26, respectively. Also, the second external electrode 27B is formed so as to be connected to the second electrode layer 24 through the openings provided in the moisture-resistant film 25 and the protective layer 26, respectively.
  • FIG. 5J is a schematic cross-sectional view for explaining an example of the process of forming a photosensitive resin film.
  • FIG. 5K is a schematic cross-sectional view for explaining an example of the process of forming the first resin body and the second resin body.
  • a photosensitive resin film 35 is formed to cover the protective layer 26 and the external electrodes 27, as shown in FIG. 5J. Then, the photosensitive resin film 35 is patterned by photolithography to form the first resin body 31 and the second resin body 32 as shown in FIG. 5K.
  • the capacitor 1 shown in FIG. 1 is manufactured.
  • a case of manufacturing one capacitor element has been described above, but after forming a plurality of capacitor elements on the same substrate 10, the substrate 10 is cut into individual pieces by dicing or the like, thereby manufacturing a plurality of capacitors.
  • the elements may be manufactured simultaneously.
  • the capacitor according to the second embodiment of the present invention further includes a third electrode layer provided on the dielectric film apart from the second electrode layer, and the external electrode is a first electrode layer connected to the third electrode layer.
  • FIG. 6 is a cross-sectional view schematically showing an example of a capacitor according to the second embodiment of the invention.
  • the capacitor 2 shown in FIG. 6 includes a substrate 10, an insulating film 21 provided on the substrate 10, a first electrode layer 22 provided on the insulating film 21, a dielectric a dielectric film 23, a second electrode layer 24 provided on the dielectric film 23, a third electrode layer 29 provided on the dielectric film 23 away from the second electrode layer 24, the dielectric film 23, A moisture-resistant film 25 provided on the second electrode layer 24 and the third electrode layer 29 , a protective layer 26 provided on the moisture-resistant film 25 , and an external electrode 27 penetrating the protective layer 26 .
  • the external electrodes 27 include second external electrodes 27B connected to the second electrode layer 24 and first external electrodes 27A connected to the third electrode layer 29 .
  • the first external electrode 27A penetrates the protective layer 26 and the moisture-resistant film 25, and the second external electrode 27B penetrates the protective layer 26 and the moisture-resistant film 25.
  • capacitors are formed on the left side, whereas in the configuration of the capacitor 2 shown in FIG. 6, capacitors are formed on the left and right sides.
  • the portion where the first external electrode 27A is connected to the first electrode layer 22 in the structure shown in FIG. It's just replacing the provided components. Therefore, the configuration shown in FIG. 6 does not require additional device formation space with respect to the configuration shown in FIG. Therefore, a capacitor with a low capacitance can be manufactured with the same element area.
  • Such a structure is effective when a dielectric film having a certain thickness or more cannot be formed.
  • the semiconductor device of the present invention is not limited to the above-described embodiments, and various applications and modifications can be made within the scope of the present invention with respect to the configuration, manufacturing conditions, etc. of the semiconductor device such as a capacitor. .
  • the semiconductor device of the present invention Since the semiconductor device of the present invention has high Q characteristics, it can be suitably used as a capacitor for matching circuits or filter circuits.
  • a matching circuit or a filter circuit including the semiconductor device of the present invention is also one aspect of the present invention.
  • FIG. 7 is an explanatory diagram showing an example of a matching circuit.
  • the power consumption of the entire circuit can be suppressed.
  • the power consumption is 100%.
  • the power consumption is suppressed to 89%.
  • FIG. 8 is an explanatory diagram showing an example of a filter circuit.
  • the power consumption of the entire circuit can be suppressed.
  • the power consumption is 100%.
  • the power consumption is suppressed to 95%.

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  • Microelectronics & Electronic Packaging (AREA)
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PCT/JP2022/019625 2021-05-10 2022-05-09 半導体装置、マッチング回路及びフィルタ回路 Ceased WO2022239722A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202280032701.6A CN117242538A (zh) 2021-05-10 2022-05-09 半导体装置、匹配电路以及滤波电路
JP2023521008A JP7563591B2 (ja) 2021-05-10 2022-05-09 半導体装置、マッチング回路及びフィルタ回路
US18/502,482 US20240072107A1 (en) 2021-05-10 2023-11-06 Semiconductor device, matching circuit, and filter circuit

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Application Number Priority Date Filing Date Title
JP2021079849 2021-05-10
JP2021-079849 2021-05-10

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