WO2022206692A1 - 显示模组及电子设备 - Google Patents

显示模组及电子设备 Download PDF

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Publication number
WO2022206692A1
WO2022206692A1 PCT/CN2022/083436 CN2022083436W WO2022206692A1 WO 2022206692 A1 WO2022206692 A1 WO 2022206692A1 CN 2022083436 W CN2022083436 W CN 2022083436W WO 2022206692 A1 WO2022206692 A1 WO 2022206692A1
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WIPO (PCT)
Prior art keywords
light
circuit
display module
emitting
chip
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PCT/CN2022/083436
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English (en)
French (fr)
Inventor
龙浩晖
张立
周洋
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华为技术有限公司
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Publication of WO2022206692A1 publication Critical patent/WO2022206692A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes

Definitions

  • the present application relates to the field of display technology, and in particular, to a display module and an electronic device.
  • Electronic equipment mainly includes display modules and other functional devices (such as cameras, receivers, fingerprint recognition modules, antenna modules, memories, sensors, radio frequency devices, etc.).
  • the functional devices are usually integrated on the main board, and the display module is assembled with the main board with various functional devices to realize related display and interaction functions.
  • the integration degree of the electronic device is low.
  • the integration thickness of the functional devices will be relatively thick, resulting in a relatively thick electronic device, which affects user experience and perception requirements.
  • Embodiments of the present application provide a display module and an electronic device, which are used to solve the problems of low integration and large thickness of the electronic device.
  • a display module comprising: a carrier board having a first surface; a plurality of functional devices carried on the carrier board; and a plurality of light-emitting components disposed on the first surface of the carrier board
  • the light-emitting component comprises a light-emitting chip and a first circuit, the light-emitting chip is coupled with the first circuit, and the light-emitting chip is used for emitting light under the driving of the first circuit.
  • the functional devices and light-emitting components included in the display module are all arranged on the carrier board, making full use of the space and thickness of the carrier board for ultra-thin and high-performance integration. Through this integration, the area of the PCBA motherboard can be further reduced, or even completely removed (no need to set up a PCB). It is a heterogeneous integrated full display system architecture, which can integrate all the devices and modules in the display module in Displaying.
  • the display module has a high degree of integration, which can leave more space for the battery, or reduce the thickness and weight of the display module, improve the human-computer interaction experience, and enhance the competitiveness of the product.
  • all the devices and modules in the display module are integrated into the display, which can remove the main unit interconnection and assembly process in the display module, realize the function integration of the display module, simplify the whole machine process, and save the assembly cost.
  • the display module further includes an insulating layer, and the insulating layer covers the surfaces of the plurality of light-emitting components, and is used to separate the plurality of light-emitting components from each other.
  • Each light-emitting component is an independent light-emitting unit, and during the preparation process of the display module, multiple light-emitting components are directly transferred to the carrier board.
  • the layout of the traces makes the circuit layout on the carrier board more flexible.
  • the light-emitting assembly further includes a chip element, in which the first circuit is integrated.
  • the light-emitting assembly includes a light-emitting chip and a chip element, and the chip element includes a first circuit, which is equivalent to an integrated design of the light-emitting chip and the first circuit for driving the light-emitting chip to emit light, and each light-emitting assembly is an independent light-emitting unit.
  • the display module further includes a second circuit, at least a part of the plurality of chip elements is further integrated with a second circuit, and the second circuit is used to realize functions other than driving the light-emitting chip to emit light.
  • the circuit in the display module can be improved to a certain extent. Integration degree, realize HiSID integrated system.
  • each light-emitting component includes a plurality of light-emitting chips, and the plurality of light-emitting chips are insulated from each other.
  • the area of the light-emitting component can be increased, which facilitates the assembly operation.
  • the integration degree of the plurality of first circuits in the chip element can be further improved.
  • the first circuit is disposed on the first surface, and the first circuits in the plurality of light-emitting assemblies are disposed in the same layer.
  • a plurality of first circuits are arranged on the same layer.
  • the display module further includes a second circuit, and the second circuit is used to realize functions other than driving the light-emitting chip to emit light; the second circuit is arranged on the same layer as the first circuit.
  • a plurality of first circuits and second circuits are arranged on the same layer, and when the first circuit and the second circuit are prepared, each film layer with the same function in the multiple circuit structures in the display module can be formed synchronously and arranged on the same layer, The area occupied by the circuit packaging area is reduced, and the integration level of the display module is further improved.
  • the display module includes a display area; the display area includes a plurality of sub-pixel areas; the light-emitting chip is located in the sub-pixel area; at least part of the plurality of functional devices is disposed on the first surface and located in the sub-pixel area.
  • Both the functional device and the light-emitting component are arranged on the first surface of the carrier board, and the functional device is arranged in the blank area of the sub-pixel area, making full use of the overall area of the display module, the structure is simple, and the thickness of the display module is relatively thin.
  • the carrier board further includes a second surface, and the second surface is disposed opposite to the first surface; at least part of the plurality of functional devices is disposed on the second surface.
  • the light-emitting component and the functional device are respectively arranged on the first surface and the second surface of the carrier board.
  • the process is simple and easy to implement. There is no requirement for the size of the sub-pixel area of the display module, and the pixel density of the display module can be improved. (pixels per inch, PPI).
  • the display module includes a display area; at least part of the plurality of functional devices is embedded in the carrier board and located in the display area.
  • the functional device is embedded in the carrier board, and the functional device does not need to occupy space in the thickness direction, which can improve the integration degree of the display module and reduce the thickness of the display module.
  • the area of the peripheral area will not be increased, and the screen ratio of the display module can be increased.
  • a wiring layer is provided on the carrier, and the functional device and the light-emitting component are respectively coupled to the wiring layer.
  • the wiring layer is directly arranged on the carrier board, the process is simple, no temporary carrier board and other components are needed, and it is easy to implement.
  • the carrier board is a wiring layer; the functional device and the light-emitting component are respectively coupled to the wiring layer.
  • the carrier board can be omitted to make the display module light and thin.
  • the functional device is coupled to the wiring layer through one of eutectic bonding process, low temperature bonding process, anisotropic conductive adhesive film coupling or direct contact coupling.
  • the eutectic bonding process is mature and simple, and has high environmental reliability.
  • the low temperature bonding process can be applied to the coupling of multiple pads with smaller pitches to other components. Due to the coupling of the anisotropic conductive adhesive film, the realization is simple and the cost is low. Direct contact coupling enables multiple pads to be coupled with other components at a smaller pitch by reusing the semiconductor process.
  • the light emitting component is coupled to the wiring layer through one of eutectic bonding process, low temperature bonding process, anisotropic conductive adhesive film coupling or direct contact coupling.
  • the functional devices include a power management module, an image processor, a central processing unit, a flash memory, a double data rate memory, a system-on-chip, a radio frequency module, a photosensitive chip, a fingerprint recognition chip, an iris recognition chip, and a face recognition chip.
  • a sensor chip one of a sensor chip, a power manager, an antenna module, a receiver, a microphone, a timing controller, a touch sensing chip, a wireless controller, a Bluetooth module, an inertial sensor, or a pressure gauge.
  • the second circuit includes one of a power management circuit, an image processing circuit, a fingerprint identification circuit, an iris identification circuit, a face identification circuit, a power management circuit, a processor circuit or a memory circuit.
  • a display module including: a circuit board, which has a third surface and a fourth surface opposite to each other; a functional device disposed on the third surface and coupled to the circuit board; a light-emitting element , which is arranged on the fourth surface and is coupled with the circuit board.
  • the display module further includes a first circuit, the first circuit is disposed on the third surface, the light-emitting element is coupled to the first circuit, and the light-emitting element is configured to emit light under the driving of the first circuit.
  • the circuit board is a rigid circuit board.
  • an electronic device including a battery and the display module according to any one of the first aspects, wherein the battery is located on the back of the display module.
  • the electronic device includes the display module according to any one of the first aspect, and its beneficial effects are the same as those of the display module, which will not be repeated here.
  • a fourth aspect of the embodiments of the present application provides an electronic device including a battery and the display module of the second aspect, wherein the battery is located on the back of the display module.
  • the electronic device includes the display module according to any one of the second aspect, and its beneficial effects are the same as those of the display module, which will not be repeated here.
  • FIG. 1A is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • FIG. 1B is a schematic structural diagram of a display module provided by an embodiment of the present application.
  • 1C is a schematic structural diagram of another display module provided by an embodiment of the present application.
  • FIG. 2A is a schematic structural diagram of another display module provided by an embodiment of the present application.
  • FIG. 2B is a schematic structural diagram of a light-emitting assembly according to an embodiment of the present application.
  • 2C is a schematic layout diagram of a light-emitting chip according to an embodiment of the present application.
  • FIG. 2D is a schematic structural diagram of another light-emitting assembly provided by an embodiment of the present application.
  • 2E is a schematic structural diagram of another display module provided by an embodiment of the present application.
  • FIG. 2F is a schematic structural diagram of another light-emitting assembly provided by an embodiment of the present application.
  • FIG. 2G is a schematic structural diagram of another light-emitting assembly provided by an embodiment of the present application.
  • 2H is a schematic diagram of a preparation process of a display module provided by an embodiment of the present application.
  • 3A is a schematic diagram of a setting position of a functional device provided by an embodiment of the present application.
  • 3B is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • 3C is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • 3D is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • 3E is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • FIG. 3F is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • 3G is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • 3H is a top view of a display module provided by an embodiment of the present application.
  • 4A is a schematic diagram of the arrangement position of a wiring layer provided by an embodiment of the present application.
  • 4B is a schematic diagram of the arrangement position of another wiring layer provided by an embodiment of the present application.
  • 4C is a schematic diagram of the arrangement position of another wiring layer provided by an embodiment of the present application.
  • FIG. 4D is a schematic diagram of another arrangement position of a wiring layer provided by an embodiment of the present application.
  • FIG. 4E is a schematic diagram of another arrangement position of a wiring layer provided by an embodiment of the present application.
  • FIG. 4F is a schematic diagram of another arrangement position of a wiring layer provided by an embodiment of the present application.
  • 5A is a schematic diagram of a manufacturing process of another display module provided by an embodiment of the present application.
  • 5B is a schematic diagram of a preparation process of a wiring layer provided by an embodiment of the present application.
  • 6A is a schematic diagram of the arrangement position of another wiring layer provided by an embodiment of the present application.
  • 6B is a schematic diagram of the arrangement position of another wiring layer provided by an embodiment of the present application.
  • FIG. 7A is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • FIG. 7B is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • FIG. 7C is a schematic diagram of a setting position of another functional device provided by an embodiment of the present application.
  • FIG. 8A is a schematic diagram of a coupling manner of a light-emitting component and a wiring layer according to an embodiment of the present application
  • FIG. 8B is a schematic diagram of another coupling manner of a light-emitting component and a wiring layer provided by an embodiment of the present application.
  • FIG. 8C is a schematic diagram of yet another coupling manner of a light-emitting component and a wiring layer provided by an embodiment of the present application.
  • FIG. 8D is a schematic diagram of yet another coupling manner of a light-emitting component and a wiring layer provided by an embodiment of the present application.
  • FIG. 9A is a schematic structural diagram of another display module provided by an embodiment of the present application.
  • 9B is a schematic structural diagram of another display module provided by an embodiment of the present application.
  • 9C is a schematic diagram of the layout of wiring on a carrier provided by the related art.
  • FIG. 10A is a schematic structural diagram of yet another light-emitting assembly provided by an embodiment of the present application.
  • FIG. 10B is a schematic structural diagram of a TFT according to an embodiment of the present application.
  • FIG. 10C is a schematic structural diagram of another light-emitting assembly provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of another display module provided by an embodiment of the present application.
  • orientation terms such as “upper”, “lower”, “left” and “right” may include, but are not limited to, definitions relative to the orientations in which the components in the drawings are schematically placed. It should be understood that, These directional terms may be relative concepts, and they are used for relative description and clarification, which may vary accordingly depending on the orientation in which the components are placed in the figures.
  • connection should be understood in a broad sense.
  • connection may be a fixed connection, a detachable connection, or an integrated body; it may be a direct connection , or indirectly through an intermediary.
  • phase coupled may be a direct electrical connection or an indirect electrical connection through an intermediate medium.
  • contact can be direct contact or indirect contact through an intermediary.
  • An embodiment of the present application provides an electronic device, which may include a mobile phone (mobile phone), a tablet computer (pad), a TV, a smart wearable product (for example, a smart watch, a smart bracelet), a virtual reality (virtual reality, VR) ) terminal equipment, augmented reality (AR) terminal equipment and other electronic products with display functions.
  • a mobile phone mobile phone
  • a tablet computer pad
  • TV TV
  • a smart wearable product for example, a smart watch, a smart bracelet
  • VR virtual reality
  • AR augmented reality
  • the embodiments of the present application do not specifically limit the specific form of the above electronic device.
  • the above-mentioned electronic device is a mobile phone as shown in FIG. 1A as an example for description.
  • the electronic device may include a display module 01 for displaying images, and a battery 02 located on the back of the display module 01 , and the battery 02 is used to supply power to the display module 01 .
  • the rear surface of the display module 01 is disposed opposite to the light-emitting surface of the display module 01 .
  • display modules that can realize self-illumination, such as display modules using active matrix organic light emitting diode (AMOLED) technology, are provided with organic light emitting diodes (organic light emitting diodes) in their sub pixels.
  • organic light emitting diodes organic light emitting diodes
  • OLED organic light emitting diode
  • the AMOLED display module is provided with a thin film transistor (TFT) backplane, and a printed circuit board (PCB) for carrying the functional device 20 .
  • TFT thin film transistor
  • PCB printed circuit board
  • the functional device 20 may be, for example, a power management unit (PMU), a graphics processing unit (GPU), a central processing unit (CPU), a universal flash storage (UFS), a dual Double data rate (double data rate, DDR) memory, system on chip (system on chip, SOC) or radio frequency unit (remote radio unit, RRU), etc.
  • PMU power management unit
  • GPU graphics processing unit
  • CPU central processing unit
  • UFS universal flash storage
  • DDR dual Double data rate
  • DDR double data rate
  • SOC system on chip
  • RRU radio frequency unit
  • the TFT backplane includes a substrate 03 and a driving circuit disposed on the substrate 03 and mainly composed of TFTs, and the driving circuit is used to drive the OLED device located above the TFT backplane to emit light.
  • the TFT backplane is coupled to the PCB through the FPC to receive the driving signal transmitted by the PCB.
  • the FPC and the PCB can be connected, for example, through a board to board connector (board to board, BTB).
  • the functional devices 20 on the PCB are stacked and assembled (package on package, POP) to form a system-in-package (SIP), so as to realize the integration of the PCB.
  • POP package on package
  • SIP system-in-package
  • stacking assembly for example, can integrate the RF front-end switch, filter, power amplifier (PA) into a single-sided SIP module, and integrate the wireless network (wifi) module into a double-sided SIP module, etc. .
  • RF front-end switch for example, can integrate the RF front-end switch, filter, power amplifier (PA) into a single-sided SIP module, and integrate the wireless network (wifi) module into a double-sided SIP module, etc.
  • PA power amplifier
  • wifi wireless network
  • the above solution is intended to reduce the area of the PCBA (printed bircuit board assembly, integrated functional devices on the printed circuit board), in order to improve the integration degree of the display module 01.
  • the above-mentioned TFT backplane and PCB exist separately, the system integration is limited by the area and thickness of the PCB, which is not conducive to the light and thin design of electronic equipment.
  • the separate structure of PCB and TFT backplane also increases the process steps and costs for interconnection and assembly of the two, which cannot meet the current trend of ultra-thin and high-performance development of the whole machine.
  • an embodiment of the present application further provides a display module 01.
  • the display module 01 includes a circuit board 04, a functional device 20, and a light-emitting element 05 (eg, OLED).
  • a light-emitting element 05 eg, OLED
  • the circuit board 04 has a third surface A3 and a fourth surface A4, and the third surface A3 and the fourth surface A4 are disposed opposite to each other.
  • the functional device 20 is disposed on the third surface A3 of the circuit board 04 and is coupled to the circuit board 04 .
  • the light-emitting element 05 is disposed on the fourth surface A4 of the circuit board 04 and is coupled to the circuit board 04 .
  • a driving circuit mainly composed of TFTs is disposed on the fourth surface A4 of the circuit board 04 and is coupled to the light-emitting element 05 for driving the light-emitting element 05 to emit light. Based on this, the driving circuit is coupled to the circuit board 04, and the light-emitting element 05 is coupled to the circuit board 04 through the driving circuit.
  • the functional device 20 and the light-emitting element 05 are disposed on opposite sides of the circuit board 04, the substrate 03 in the TFT backplane is removed, and the circuit board 04 is directly used as the substrate to form board-level heterogeneous integration. Therefore, compared with the AMOLED display module shown in FIG. 1B , the display module 01 provided by the embodiment of the present application does not need to use the substrate 03 , and the functional device 20 on the PCB and the screen are integrated into one, which can effectively reduce the size of the display module. 01 thickness and weight.
  • the functional device 20 and the light-emitting element 05 are both integrated on the circuit board 04, there is no need to interconnect and assemble the TFT backplane with the circuit board 04, thereby reducing the thickness of the display module 01 and improving the display module 01 integration.
  • the embodiment of the present application further provides a display module 01, and the structure of the display module 01 will be described in detail below through different examples.
  • the display module 01 in the electronic device may include a carrier board 10 , a plurality of functional devices 20 and a plurality of light emitting components 30 carried on the carrier board 10 .
  • the carrier board 10 is a carrier substrate composed of a flexible material or a rigid material.
  • the carrier board 10 may be a flexible carrier board, for example, the material constituting the carrier board is polyimide (PI).
  • the carrier board 10 may also be a rigid carrier board, for example, the material constituting the carrier board 10 is glass, monocrystalline silicon or silicon dioxide.
  • the carrier board 10 is a carrier board composed of wiring layers. That is, the wiring layer directly serves as the carrier board 10 in this example.
  • the wiring layer may include a single-layer metal wire layer, and may also include a multi-layer metal wire layer, and an example is a re-distribution layer (RDL).
  • RDL re-distribution layer
  • the wiring layer includes a multi-layer metal wire layer as an example for description.
  • the carrier board 10 may have a first surface A1 and a second surface A2 arranged opposite to each other, and a plurality of light emitting components 30 are arranged on the first surface A1 of the carrier board 10 .
  • the arrangement of the plurality of light emitting assemblies 30 is not limited. In some embodiments, the plurality of light emitting assemblies 30 are arranged in an array.
  • the light-emitting assembly 30 may include a light-emitting chip 31 and a chip element 32 .
  • the chip element 32 is integrated with a first circuit 321 (or understood as a driving circuit), and the light-emitting chip 31 is coupled to the first circuit 321 to emit light.
  • the chip 31 is used to emit light under the driving of the first circuit 321 .
  • the light-emitting chip 31 refers to a semiconductor chip manufacturing process that forms die arrays on a wafer, and each die has a light-emitting layer. Then, the wafer on which the above-mentioned die is formed is diced, so that each die is independent of each other, and each independent die after dicing is used as the above-mentioned light-emitting chip 31 .
  • the light-emitting chip 31 may be a micro (micro) light-emitting diode (light emitting diode, LED) with a grain size of several tens of microns.
  • the light-emitting chip 31 may be a mini-LED with a grain size of more than 100 microns.
  • the above-mentioned light-emitting chip 31 is a current driving device.
  • each light-emitting chip 31 can be used as a sub pixel (or referred to as a sub pixel) of the display module 01 .
  • a plurality of light-emitting chips 31 constitute a pixel of the display module 01, and a plurality of light-emitting chips 31 located in the same pixel are called a light-emitting group, and a plurality of light-emitting chips 31 in the same light-emitting group can emit light of at least three primary colors (red). , green, blue light), so that the display module 01 can display images.
  • the plurality of light-emitting chips 31 in the same light-emitting group may include a first light-emitting chip 31 a, a second light-emitting chip 31 b and a third light-emitting chip 31 c.
  • the first light-emitting chip 31a, the second light-emitting chip 31b and the third light-emitting chip 31c may be used to emit light of three primary colors, respectively.
  • the first light emitting chip 31a, the second light emitting chip 31b and the third light emitting chip 31c may be used to emit red (red, R) light, blue (blue, B) light and green (green, G) light, respectively.
  • the first light-emitting chip 31a, the second light-emitting chip 31b, and the third light-emitting chip 31c in the same light-emitting group can constitute one pixel.
  • the purpose of controlling the pixel gray scale of the displayed image when the display module 01 performs color display can be achieved. .
  • the power consumption of the micro LED is lower than that of the OLED, which is beneficial to reduce the volume of the battery in the display module 01.
  • micro LEDs are brighter and smaller in size and thus have a smaller aperture ratio. In this way, the component space in the display module 01 can be effectively saved, which is favorable for integrating more electronic components.
  • a first circuit 321 is integrated in the chip element 32 .
  • the above-mentioned first circuit 321 is fabricated using a complementary metal oxide semiconductor (CMOS) process.
  • CMOS complementary metal oxide semiconductor
  • the light-emitting chip 31 is coupled to the first circuit 321, and the first circuit 321 is used to drive the light-emitting chip 31 to emit light.
  • the first circuit 321 may include a plurality of transistors formed by using a CMOS process.
  • the above-mentioned first circuit 321 may include a driving transistor and a plurality of switching transistors. Data voltages related to display data can be written to the driving transistors by controlling on and off of the switching transistors.
  • the driving transistor can generate a driving current matching the data voltage according to the data voltage. Since the above-mentioned light-emitting chip 31 is a current driving device, when the above-mentioned driving current flows through the light-emitting chip 31, the light-emitting chip 31 can be driven to emit light. By controlling the magnitude of the driving current, the light-emitting brightness of the light-emitting chip 31 can be controlled.
  • the present application does not limit the connection manner of the plurality of transistors in the first circuit 321, as long as the purpose of driving the light-emitting chip 31 electrically connected thereto to emit light can be achieved.
  • each light-emitting component 30 may include a light-emitting chip 31 and a chip element 32 , and the chip element 32 is integrated with a first circuit 321 .
  • a light-emitting component 30 is used as a sub-pixel of the display module 01 to realize a display function.
  • each light-emitting assembly 30 includes a plurality of light-emitting chips 31 and a chip element 32 , and the chip element 32 integrates a first light-emitting chip for driving the plurality of light-emitting chips 31 to emit light.
  • a plurality of light-emitting chips 31 constitute the above-mentioned light-emitting group, and one light-emitting component 30 is used as a pixel of the display module 01 to realize a display function.
  • the plurality of light emitting assemblies 30 are independent of each other, and each light emitting assembly 30 is an independent component.
  • the plurality of light emitting components 30 are respectively coupled to the carrier board 10 .
  • the plurality of light-emitting chips 31 may be independent dies, or may be integrated dies. Of course, no matter what kind of structure it is, the plurality of light-emitting chips 31 in the same light-emitting assembly 30 are insulated from each other.
  • the transistors included in the plurality of first circuits 321 in the chip element 32 can be formed simultaneously to simplify the manufacturing process.
  • the chip element 32 is disposed between the light-emitting chip 31 and the carrier board 10 , that is, the light-emitting chip 31 and the chip element 32 are stacked.
  • each light-emitting component 30 can be reduced, so as to improve the integration degree of the light-emitting component 30 .
  • the active surface C1 of the chip element 32 faces the light-emitting chip 31 and is directly coupled to the light-emitting chip 31 .
  • the chip element 32 is provided with a TSV, one end of the TSV is coupled to the active surface C1 of the chip element 32 , and one end is used for coupling the light-emitting assembly 30 with other components.
  • the surface of the chip element 32 on which the transistors are arranged is referred to as the active surface C1.
  • the active surface C1 of the chip element 32 faces away from the light-emitting chip 31 .
  • the chip element 32 is provided with a TSV, two ends of the TSV are respectively coupled to the active surface C1 of the chip element 32 and the light-emitting chip 31 , and the active surface C1 of the chip element 32 is directly coupled to other components.
  • the preparation process of the display module 01 is shown in FIG. 2H .
  • a plurality of light-emitting chips 31 can be bonded on a wafer first, and the wafer includes a plurality of chip components 32 , one chip element 32 corresponds to one light-emitting chip 31 .
  • the bonding process may be, for example, a chip to wafer (C2W) process.
  • C2W chip to wafer
  • the wafer is then diced to form a plurality of light emitting components 30 .
  • the light-emitting component 30 and the functional device 20 are soldered to the carrier board 10, and the soldering method can be, for example, a eutectic bonding process.
  • the embodiment of the present application does not limit the specific type of the functional device 20, and all devices used to enrich the functions of the electronic device are applicable to the present application.
  • the functional device 20 may be, for example, a power management module, an image processor, a central processing unit, a flash memory, a double data rate memory, a system-on-chip, a radio frequency module, a photosensitive chip, a fingerprint identification chip, an iris identification chip, a face Identification chip, sensor chip, power manager, antenna module, receiver, microphone (MIC), timing controller, touch sensing chip, wireless controller, Bluetooth module, inertial sensor, pressure gauge, etc.
  • the functional device 20 is carried on the carrier board 10 .
  • the embodiment of the present application does not limit the location of the functional device 20 on the carrier board 10 , and a separate support board is not required, and the carrier board 10 can be used as the support board.
  • the first possible arrangement of the functional device 20 is: the functional device 20 may be arranged on the first surface A1 of the carrier board 10 .
  • the display module 01 includes a display area (ative area, AA, or called an effective display area), the display area AA includes a plurality of sub-pixel areas B arranged in an array, and each sub-pixel area B is provided with a The sub-pixels, that is, each sub-pixel region B is provided with a light-emitting chip 31 .
  • the functional device 20 is located in the sub-pixel region B. As shown in FIG. 3A , as shown in FIG. 3A , the functional device 20 is located in the sub-pixel region B. As shown in FIG. 3A , as shown in FIG. 3A , the functional device 20 is located in the sub-pixel region B. As shown in FIG. 3A , as shown in FIG. 3A , the functional device 20 is located in the sub-pixel region B. As shown in FIG.
  • the structure of the carrier board 10 may be the above-mentioned carrier substrate or the above-mentioned wiring layer.
  • both the functional device 20 and the light-emitting assembly 30 are arranged on the first surface A1 of the carrier board 10, and the functional device 20 is arranged in the blank area in the sub-pixel area B, so that the overall area of the display module 01 is fully utilized, and the structure is simple. And the thickness of the display module 01 is relatively thin.
  • the second possible arrangement of the functional device 20 is: the functional device 20 may be arranged on the second surface A2 of the carrier board 10 .
  • the light emitting component 30 is disposed on the first surface A1 of the carrier board 10
  • the functional device 20 is disposed on the second surface A2 of the carrier board 10 .
  • the structure of the carrier board 10 may be the above-mentioned carrier substrate or the above-mentioned wiring layer.
  • the light-emitting component 30 and the functional device 20 are respectively arranged on the first surface A1 and the second surface A2 of the carrier board 10 , the process is simple and easy to implement, and there is no requirement for the size of the sub-pixel area of the display module 01, which can be improved.
  • the third possible setting manner of the functional device 20 is: the functional device 20 is embedded in the carrier board 10 .
  • To embed means to firmly or deeply fix or establish, and can be understood as burying, inserting.
  • grooves are formed on the second surface A2 of the carrier board 10, and the functional devices 20 are embedded in the grooves.
  • the functional device 20 is supported by a temporary carrier board, and then the functional device 20 is packaged to form a structure in which the functional device 20 is embedded in the carrier board 10 .
  • the transfer surface of the functional device 20 used for signal transfer with other components may face the first surface A1 of the carrier board 10 or the second surface A2 of the carrier board 10 .
  • the structure of the carrier board 10 may be the above-mentioned carrier substrate, such as a glass substrate or a PI substrate.
  • the structure of the carrier board 10 may be a redistribution layer.
  • the functional device 20 is embedded in the carrier board 10 , and the functional device 20 does not need to occupy space in the thickness direction, which can improve the integration degree of the display module 01 and reduce the thickness of the display module 01 .
  • the display module 01 includes a plurality of functional devices 20 , and the plurality of functional devices 20 may adopt any one of the above-mentioned three setting methods. That is, the arrangement manner of the plurality of functional devices 20 in the display module 01 may be any combination of the above three manners.
  • the plurality of functional devices 20 in the display module 01 are set in the first manner described above. That is, the functional device 20 is disposed on the first surface A1 of the carrier board 10 .
  • the plurality of functional devices 20 in the display module 01 are all set in the second manner described above. That is, the functional device 20 is disposed on the second surface A2 of the carrier board 10 .
  • the plurality of functional devices 20 in the display module 01 are arranged in the third manner described above. That is, the functional device 20 is embedded in the carrier board 10 .
  • some functional devices 20 adopt the above-mentioned first setting method, and some functional devices 20 adopt the above-mentioned second setting method. How to set.
  • some functional devices 20 adopt the above-mentioned first setting method, and some functional devices 20 adopt the above-mentioned third setting method. How to set.
  • some functional devices 20 adopt the above-mentioned second setting method, and some functional devices 20 adopt the above-mentioned third setting method. How to set.
  • some functional devices 20 adopt the above-mentioned first setting method, and some functional devices 20 adopt the above-mentioned second setting method mode, some functional devices 20 adopt the above-mentioned third setting mode.
  • the functional devices 20 and the light-emitting components 30 in the display module 01 are integrated on the carrier board 10 .
  • the display module 01 includes a display area (AA, or called an effective display area), and a peripheral area located at the periphery of the display area.
  • the functional device 20 can be located in the display area AA of the display module 01 , thereby reducing the area of the peripheral area and increasing the screen occupation of the display module 01 Compare.
  • some functional devices 20 (such as radio frequency units) whose performance may be affected by the interference of the light-emitting chip 31 can be arranged at a position farther away from the light-emitting chip 31 , thereby keeping the aforementioned functional devices 20 away from the light-emitting chip 31 .
  • the interference of the light-emitting chip 31 ensures the performance of the functional device 20 .
  • the display module 01 further includes a wiring layer 40 , and the light-emitting component 30 and the functional device 20 are respectively coupled to the wiring layer 40 .
  • the metal wires in the wiring layer 40 transmit the driving signal to the first circuit 321 in the light emitting component 30 to drive the light emitting chip 31 to emit light.
  • the metal wires in the wiring layer 40 are also used to transmit the working signals corresponding to each functional device 20 to each functional device 20, so that the functional device 20 can realize the corresponding function.
  • the wiring layer 40 is used to transmit signals to the light emitting component 30 and the functional device 20 . Therefore, the location of the wiring layer 40 is related to the location of the light emitting component 30 and the functional device 20 , but no matter how the wiring layer 40 is arranged, the wiring layer 40 , the light-emitting component 30 and the functional device 20 are all carried by the carrier board 10 .
  • the wiring layer 40 may include a single-layer metal wire layer, or may include a multi-layer metal wire layer.
  • the embodiments of the present application are described by taking the wiring layer multi-layer metal wire layer as an example.
  • the wiring layer 40 may be arranged on the carrier board 10 .
  • the wiring layer 40 is directly arranged on the carrier board 10 , the process is simple, and components such as a temporary carrier board are not required, which is easy to implement.
  • the functional device 20 and the wiring layer 40 in some embodiments of the present application, as shown in FIG. It may be disposed between the light emitting assembly 30 and the functional device 20 and the carrier board 10 .
  • the wiring layer 40 is disposed on the first surface A1 of the carrier board 10 .
  • the light emitting component 30 is disposed on the first surface A1 of the carrier board 10
  • the functional device 20 is disposed on the second surface A2 of the carrier board 10
  • the light emitting component 30 is connected to the carrier board 10 .
  • a wiring layer 40 is provided between the functional devices 20 and the carrier board 10 .
  • wiring layers 40 are provided on both the first surface A1 and the second surface A2 of the carrier board 10 .
  • the light emitting component 30 is coupled with the wiring layer 40 provided on the first surface A1, and the functional device 20 is coupled with the wiring layer 40 provided on the second surface A2.
  • the structure of the multi-layer wiring layer 40 is not limited to be the same, and the specific structure of each layer of the wiring layer 40 is based on the light-emitting component 30 and the functional device 20. Design adjustments to the distribution.
  • the light-emitting component 30 is arranged on the first surface A1 of the carrier board 10
  • the functional device 20 is arranged on the second surface A2 of the carrier board 10
  • the light-emitting component 30 is connected to the carrier board 10 .
  • a wiring layer 40 is provided between the 10
  • a conductive via 11 is provided in the carrier board 10
  • two ends of the conductive via 11 are respectively coupled to the wiring layer 40 and the functional device 20 .
  • the wiring layer 40 is disposed on the first surface A1 of the carrier board 10 .
  • the carrier 10 is a glass carrier, and the conductive via 11 may be a through glass via (TGV).
  • the carrier 10 is a silicon-based carrier, and the conductive vias 11 may be through silicon vias (TSVs).
  • TSVs through silicon vias
  • the carrier 10 is a PI carrier, and the conductive vias 11 may be conductive pillars disposed in the PI carrier.
  • the number of wiring layers 40 can be reduced, and the display module 01 can be made lighter and thinner.
  • the light-emitting component 30 is disposed on the first surface A1 of the carrier board 10
  • the functional device 20 is embedded in the carrier board 10
  • the transition surface B1 of the functional device 20 faces the carrier board.
  • a wiring layer 40 is disposed between the light emitting component 30 and the carrier board 10 .
  • the wiring layer 40 is disposed on the first surface A1 of the carrier board 10 .
  • conductive vias 11 may be provided in the carrier board 10 , and both ends of the conductive vias 11 are respectively connected to the wiring layer 40 and the functional device 20 . coupled.
  • the pads on the transfer surface B1 of the functional device 20 are directly exposed on the first surface A1 of the carrier board 10. That is, the transfer surface B1 of the functional device 20 is flush with the first surface A1 of the carrier board 10 , and the pad is directly coupled to the wiring layer 40 .
  • the back surface B2 of the functional device 20 (the surface opposite to the transition surface B1 ) is flush with the second surface A2 of the carrier board 10 .
  • FIG. 5A it mainly includes: mounting the functional device 20 on the temporary carrier board, and the transfer surface B1 of the functional device 20 is away from the temporary carrier board. ; Then coat PI to form the encapsulation layer; then expose and develop the encapsulation layer, and form via holes on the encapsulation layer to form the carrier board 10 exposing the pads on the transfer surface B1 of the functional device 20; then form the wiring layer 40,
  • the wiring layer 40 is coupled to the transfer surface B1, and the conductive material is located in the via hole as the conductive via 11; then the light-emitting component 30 is coupled to the wiring layer 40; then the temporary carrier is removed to prepare the display shown in FIG. 4F Module 01.
  • the coupling method between the wiring layer 40 and the transfer surface B1 may be that when the metal wire layer in the wiring layer 40 that is closest to the carrier board 10 is formed, part of the conductive material directly fills the via hole, and the conductive material located in the via hole serves as a conductive material.
  • the through hole 11 and the wiring layer 40 are directly coupled to the pads on the transfer surface B1 of the functional device 20 .
  • the conductive vias 11 are formed before the wiring layers 40 are formed.
  • a physical vapor deposition (PVD) technique can be used to form a seed layer; then the seed layer is photolithographically and developed to expose the pattern of the metal lines to be formed (in order to For convenience of illustration, the patterned seed layer is referred to as patterned seed layer here); electroplating to form metal lines, and filling the via holes on the encapsulation layer; removing redundant seed layers to form metal lines in the wiring layer 40; Encapsulation is performed to expose the pads to be coupled with the light emitting assembly 30 .
  • the wiring layer 40 includes multi-layer metal lines, the above steps of forming metal lines may be repeated, but no via holes need to be filled.
  • the light-emitting component 30 is disposed on the first surface A1 of the carrier board 10 , the functional device 20 is embedded in the carrier board 10 , and the transition surface B1 of the functional device 20 faces the carrier board.
  • the second surface A2 of the carrier board 10, the first surface A1 and the second surface A2 of the carrier board 10 are respectively provided with a wiring layer 40.
  • the pads on the transfer surface B1 of the functional device 20 are directly exposed on the second surface A2 of the carrier board 10 . That is, the transfer surface B1 of the functional device 20 is flush with the second surface A2 of the carrier board 10, and the pad is directly coupled to the wiring layer 40 on the second surface A2.
  • conductive vias 11 may be provided in the carrier board 10 , and two ends of the conductive vias 11 are respectively coupled to the wiring layer 40 and the functional device 20 on the second surface A2 .
  • the transition surface B1 of the functional device 20 faces the second surface A2 of the carrier board 10
  • the first surface A1 and the second surface A2 of the carrier board 10 are respectively provided with a wiring layer 40, which can facilitate the wiring layer 40 and the functional device. 20 coupling.
  • the setting position of the wiring layer 40 is closely related to the setting position of the functional device 20.
  • the above only illustrates the possible positional relationship between the functional device 20 and the wiring layer 40. Any combination of the above methods belongs to the protection of the present application. scope.
  • the structure of the carrier board 10 is a wiring layer 40 , or it can be understood that the wiring layer 40 directly serves as the carrier board 10 of the display module 01 .
  • the functional device 20 and the light emitting assembly 30 may be located on the same side of the wiring layer 40 .
  • the functional device 20 and the light emitting assembly 30 may be located on opposite sides of the wiring layer 40 .
  • some functional devices 20 and light emitting components 30 are located on the same side of wiring layer 40
  • some functional devices 20 and light emitting components 30 are located on opposite sides of wiring layer 40 .
  • the embodiments of the present application do not limit the coupling method of the light emitting component 30 and the functional device 20 and the wiring layer 40 , whether it is the structure in which the wiring layer 40 is provided on the carrier board 10 , or the structure in which the wiring layer 40 is used as the carrier board 10 .
  • the light emitting component 30 and the functional device 20 can be coupled with the wiring layer 40 in the same manner.
  • the wiring layer 40 provided on the carrier board 10 is taken as an example to illustrate the coupling manner of the light emitting component 30 and the functional device 20 and the wiring layer 40 .
  • the coupling method of the light-emitting component 30 and the wiring layer 40 because the eutectic bonding process is mature and simple, and the environmental reliability is high, in some embodiments of the present application, as shown in FIG.
  • the bonding process is coupled to the wiring layer 40 .
  • Eutectic bonding is a low melting point alloy welding, which refers to the phenomenon of eutectic fusion of eutectic solders at relatively low temperatures.
  • the material of the eutectic solder joint can be, for example, Au-In (gold-indium), Au-Ge (gold-germanium), Au-Sn (gold-tin), Au-Si (gold-silicon), Sn-In (tin -Indium), Sn-Ag (tin-silver), Sn-Bi (tin-bismuth), etc.
  • the light-emitting component 30 is subjected to the low-temperature bonding process. It is coupled to the wiring layer 40 .
  • Low-temperature bonding is relative to high-temperature bonding, and usually refers to chip bonding performed below 100°C or even at room temperature. Low-temperature bonding utilizes two very close clean surfaces to have a great range of shale adsorption, and realizes the bonding of heterogeneous material surfaces that are not limited by lattice mismatch and thermal mismatch.
  • the low-temperature bonding process is the direct contact bonding of the light-emitting element 30 and the wiring layer 40 (eg, Cu-Cu bonding)
  • the use of the low-temperature bonding process can avoid interdiffusion of impurities, thermal stress between dissimilar materials, and Creation of holes and defects.
  • the realization is simple and the cost is low.
  • the light emitting element 30 is connected to the light emitting element 30 through an anisotropic conductive film (ACF).
  • ACF anisotropic conductive film
  • ACF is a kind of coating and bonding between the substrate a and the substrate b, which restricts the current to flow between the substrates a and b in the direction of the vertical axis z. It has both unidirectional conductivity and Glue fixed function.
  • the light-emitting element 30 is coupled to the wiring layer 40 through the ACF, in fact, the conductive particles in the ACF are used to connect the pads between the light-emitting element 30 and the wiring layer 40 to make them conductive, and at the same time, it can avoid two adjacent pads. Conduction and short circuit between them, and achieve the purpose of conduction only in the z-axis direction.
  • the light emitting component 30 is directly coupled with the wiring layer 40 .
  • the light emitting component 30 is mounted on a temporary carrier, and then the wiring layer 40 is directly formed on the surface of the light emitting component 30, so that the light emitting component 30 is connected to the wiring layer 40.
  • Layer 40 is directly coupled. In this way, the semiconductor process can be reused to realize the coupling of a plurality of pads with other components with a smaller pitch.
  • FIGS. 8A to 8D schematically illustrate the coupling method of the light-emitting component 30 and the wiring layer 40.
  • the coupling method of the functional device 20 and the wiring layer 40 can be the same as the coupling method of the light-emitting component 30 and the wiring layer 40. According to The above-mentioned coupling methods can be reasonably selected according to the different installation positions of the functional devices 20 , which will not be repeated here.
  • the display module 01 further includes an insulating layer 50, the insulating layer 50 covers the functional device 20 and the light-emitting component 30, and separates the plurality of light-emitting components 30 and the functional device 20 from each other, and As the encapsulation film layer of the display module 01 , it protects the functional device 20 and the light-emitting component 30 to prevent water and oxygen from eroding the functional device 20 and the light-emitting component 30 .
  • the insulating layer 50 covers the surface of the light-emitting components 30, and separates the plurality of light-emitting components 30 from each other, that is to say, the light-emitting components 30 are arranged at intervals through the insulating layer 50, and the adjacent light-emitting components 30 do not share or communicate with each other.
  • the plurality of light emitting assemblies 30 are independent units, each of which is connected to the carrier board 10 .
  • an insulating layer 50 is provided on the first surface A1 side of the carrier board 10 .
  • the insulating layer 50 is provided on both the first surface A1 side and the second surface A2 side of the carrier board 10 .
  • the insulation of the display module 01 provided by the embodiment of the present application is The structure and fabrication process of the layer 50 as an encapsulation film layer are simpler.
  • the functional devices 20 and the light-emitting components 30 included in the display module 01 are all disposed on the carrier board 10 , making full use of the space and thickness on the carrier board 10 for ultra-thin and high-performance integration.
  • the area of the PCBA motherboard can be further reduced, or even completely removed (no need to set up the PCB).
  • It is a heterogeneous integrated full display system architecture (HiSID), which can display the All devices and modules in the display are integrated in the display (all in display).
  • the display module 01 has a high degree of integration, which can leave more space for the battery 02, or reduce the thickness and weight of the display module 01, improve human-computer interaction experience, and enhance product competitiveness.
  • all the devices and modules in the display module 01 are integrated into the display, which can remove the main unit interconnection and assembly process in the display module 01, realize the functional integration of the display module 01, simplify the whole machine process, save money Assembly cost.
  • the light-emitting assembly 30 includes a light-emitting chip 31 and a chip element 32, and the chip element 32 includes a first circuit 321, which is equivalent to an integrated design of the light-emitting chip 31 and the first circuit 321 for driving the light-emitting chip 31 to emit light.
  • Assembly 30 is an independent lighting unit.
  • the wiring layout on the carrier board 10 in the related art needs to consider the wiring and use for signal communication between the first circuit 321 and the light-emitting chip 31.
  • the number of light-emitting chips 31 included in the display module 01 is usually relatively large (for example, 2772 ⁇ 1344), resulting in a large number of wirings and a complicated layout on the carrier board 10 .
  • the display module 01 provided in this example integrates the first circuit 321 with the light-emitting chip 31, as shown in FIG. 9C, when the circuit layout design is performed on the carrier board 10, there is no need to consider the use of the first circuit 321 and the light-emitting chip.
  • the layout of the traces connected to the signals of the chip 31 reduces the number of traces on the carrier board 10 to a certain extent, so that the layout flexibility of the lines on the carrier board 10 is relatively high.
  • Example 2 The difference between Example 2 and Example 1 is that the structure of the light emitting assembly 30 is different.
  • the display module 01 includes a carrier board 10 , a functional device 20 , a light-emitting component 30 and a wiring layer 40 .
  • the structure of the carrier board 10 , the structure and arrangement position of the functional device 20 and the arrangement position of the wiring layer 40 may be the same as those in Example 1. Please refer to the relevant description of the carrier board 10 and the functional device 20 in Example 1, which will not be repeated here. .
  • the light emitting assembly 30 includes a light emitting chip 31 and a chip element 32 .
  • a first circuit 321 is integrated in the chip element 32, and among the plurality of chip elements 32 included in the plurality of light-emitting assemblies 30, at least some (some or all) of the chip elements 32 are further integrated with a second circuit 322, and the second circuit 322 is connected to the chip element 32.
  • the first circuits 321 are formed synchronously and arranged on the same layer.
  • the first circuit 321 and the second circuit 322 include multiple TFTs and other components.
  • the TFT includes a gate electrode layer, a gate insulating layer, a semiconductor active layer, and a source and drain layer.
  • the TFT may be an amorphous silicon TFT, a polysilicon TFT, a metal oxide TFT, an organic thin film TFT, or the like.
  • the TFT may also be a top gate type TFT, a bottom gate type TFT or a double gate type TFT.
  • the bottom-gate TFT in FIG. 10B is only an illustration.
  • the first circuit 321 and the second circuit 322 are formed synchronously. It can be understood that the TFTs included in the first circuit 321 and the TFTs included in the second circuit 322 are formed synchronously.
  • the gate insulating layer has the same layer structure, and the conductive layers (eg gate layer, source and drain layers) and semiconductor active layers in the TFT of the first circuit 321 and the TFT of the second circuit 322 are simultaneously prepared by the same preparation process. , same layer and same material.
  • the first circuit 321 and the second circuit 322 are arranged in the same layer, which can be understood as the layers (gate layer, gate insulating layer, semiconductor active layer and source and drain) in the TFT of the first circuit 321 and the TFT of the second circuit 322 pole layer) are set on the same layer respectively.
  • Standard layer refers to a layer structure in which a film layer for forming a specific pattern is formed by the same film forming process, and then formed by the same patterning process using the same mask.
  • the same patterning process may include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights Or have different thicknesses.
  • the plurality of chip elements 32 included in the plurality of light-emitting assemblies 30 at least some (some or all) of the chip elements 32 are further integrated with a second circuit 322.
  • the first circuit 321 is integrated in some chip components 32
  • the first circuit 321 and the second circuit 322 are integrated in some chip components 322 .
  • the first circuit 321 and the second circuit 322 are respectively integrated in each of the chip elements 32 .
  • the structure of the second circuit 322 integrated in each chip element 32 is not limited to be the same, and may be different.
  • each light-emitting assembly 30 may include one light-emitting chip 31 and one chip element 32 , which are integrated in the chip element 32 There are a first circuit 321 and a second circuit 322 .
  • a light-emitting component 30 is used as a sub-pixel of the display module 01 to realize a display function.
  • each light-emitting assembly 30 includes a plurality of light-emitting chips 31 and a chip element 32 , and the chip element 32 is integrated with a second circuit 322 and is used for driving a plurality of light-emitting chips 32 .
  • the first circuit 321 where the chip 31 emits light Illustratively, a plurality of light-emitting chips 31 constitute the above-mentioned light-emitting group, and one light-emitting component 30 is used as a pixel of the display module 01 to realize a display function.
  • the plurality of light-emitting chips 31 may be independent dies, or may be integrated dies. Of course, no matter what kind of structure it is, the plurality of light-emitting chips 31 in the same light-emitting assembly 30 are insulated from each other.
  • the structure of the second circuit 322 is not limited.
  • the second circuit 322 may be, for example, a power management circuit, an image processing circuit, a fingerprint identification circuit, an iris identification circuit, a human face At least one of an identification circuit, a power management circuit, a processor circuit, or a memory circuit.
  • the second circuit 322 may be any of the above circuits. Or, by way of example, the second circuit 322 includes various circuits described above.
  • each light-emitting component 30 is an independent light-emitting unit, and during the preparation process of the display module 01 , the plurality of light-emitting components 30 may be directly transferred to the carrier board 10 .
  • the first circuit 321 and the second circuit 322 are integrated on the same chip component 32 , and some second circuits 322 (eg, power management circuits) need signal communication with the first circuit 32 .
  • some second circuits 322 eg, power management circuits
  • the wiring layout is performed on the carrier board 10
  • the circuit layout flexibility on the board 10 is relatively high.
  • Example 3 The difference between Example 3 and Example 1 is that the structure of the light emitting assembly 30 is different.
  • the display module 01 includes a carrier board 10 , a functional device 20 , a light-emitting component 30 and a wiring layer 40 .
  • the structure of the carrier board 10 , the structure and arrangement position of the functional device 20 , and the arrangement position of the wiring layer 40 can be the same as those in Example 1. Please refer to the relevant description of the carrier board 10 and the functional device 20 in Example 1, which is not repeated here. Repeat.
  • the light-emitting component 30 includes a light-emitting chip 31 and a first circuit 321 .
  • the first circuit 321 is formed on the first surface A1 of the carrier board 10 , and the first circuits 321 in the plurality of light-emitting components 30 are formed synchronously and at the same layer. set up.
  • the first circuits 321 in the plurality of light-emitting components 30 are formed synchronously and arranged in the same layer. It can be understood that each layer of the TFT (the gate layer, the gate insulating layer, the semiconductor layer and the semiconductor layer) included in the first circuits 321 in the plurality of light-emitting components 30
  • the source layer and the source and drain layers) are respectively prepared through the same patterning process and arranged in the same layer.
  • the first circuit 321 is directly formed on the surface of the wiring layer 40 , and the first circuits 321 corresponding to the plurality of light-emitting chips 31 are formed synchronously, the process is simple, and the integration degree is high.
  • the display module 01 further includes a second circuit 322 , and the second circuit 322 and the first circuit 321 are formed synchronously and arranged at the same layer.
  • the plurality of first circuits 321 are formed synchronously, and the second circuits 322 can also be formed synchronously with the first circuits 321 .
  • the first circuit 321 when preparing the first circuit 321 , a plurality of circuit structures in the display module 01 can be formed simultaneously, thereby reducing the area occupied by the circuit packaging area and improving the integration degree of the display module 01 .

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Abstract

本申请实施例提供一种显示模组及电子设备，涉及显示技术领域，用于解决电子设备集成度低、厚度大的问题。显示模组包括：载板、多个功能器件以及多个发光组件。载板具有第一表面。多个功能器件，承载于载板上，功能器件用于实现除发光以外的功能。多个发光组件，设置于载板的第一表面；发光组件包括发光芯片和第一电路，发光芯片与第一电路相耦接，发光芯片用于在第一电路的驱动下发光。

Description

显示模组及电子设备
本申请要求于2021年3月31日提交国家知识产权局、申请号为202110350643.9、申请名称为“显示模组及电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示模组及电子设备。
背景技术
随着显示技术的发展，电子设备(例如手机、平板等)已经成为当下时代重要的获取信息和互连交互的工具。
电子设备主要包括显示模组和其他功能器件(例如摄像头、受话器、指纹识别模组、天线模组、存储器、传感器、射频器等)。现有的电子设备中，功能器件通常都是集成在主板上，显示模组与带有各种功能器件的主板进行组装，实现相关的显示和交互功能。
然而，这种结构中，一方面由于需要将显示模组与主板组装，会导致电子设备的集成度较低。另一方面由于大量的功能器件需要集成在主板上，会导致功能器件的集成厚度较厚，从而导致电子设备的厚度较大，影响用户体验和感知需求。
发明内容
本申请实施例提供一种显示模组及电子设备，用于解决电子设备集成度低、厚度大的问题。
为达到上述目的，本申请采用如下技术方案：
本申请实施例的第一方面，提供一种显示模组，包括：载板，具有第一表面；多个功能器件，承载于载板上；多个发光组件，设置于载板的第一表面；发光组件包括发光芯片和第一电路，发光芯片与第一电路相耦接，发光芯片用于在第一电路的驱动下发光。
显示模组包括的功能器件和发光组件均设置在载板上，充分利用载板上的空间和厚度，进行超薄化、高性能化集成。通过这种集成，可以实现PCBA主板面积的进一步减少，甚至完全去掉(无需再设置PCB)，是一种异质集成全显示系统架构，可将显示模组中所有的器件和模组全部集成在显示中。显示模组的集成度高，这样能够留有更大的空间给电池，或者降低显示模组的厚度和重量，提升人机交互体验，提升产品竞争力。另外，将显示模组中所有的器件和模组全部集成在显示中，可去除显示模组中主要单元互连及组装工艺，实现显示模组功能一体化，简化整机工艺，节约组装成本。
可选的，显示模组还包括绝缘层，绝缘层覆盖在多个发光组件的表面，用于将多个发光组件相互间隔开。每个发光组件为一个独立的发光单元，在显示模组的制备过 程中，将多个发光组件直接转接至载板上。这样一来，在载板上进行电路布局设计时，无需再考虑用于将第一电路与发光芯片信号连通的第一走线的布局，主要考虑用于将第一电路与主板连通的第二走线的布局，从而使得载板上的线路布局灵活性比较高。
可选的，发光组件还包括芯片元件，芯片元件中集成有第一电路。发光组件包括发光芯片和芯片元件，芯片元件中包括第一电路，相当于将发光芯片和用于驱动发光芯片发光的第一电路一体化设计，每个发光组件为一个独立的发光单元。在显示模组的制备过程中，在载板上进行电路布局设计时，无需再考虑第一电路的布局，使得载板上的线路布局灵活性比较高。
可选的，显示模组还包括第二电路，多个芯片元件中的至少部分内还集成有第二电路，第二电路用于实现除驱动发光芯片发光以外的功能。通过将显示模组中的部分电路(上述用于实现除驱动发光芯片发光以外的功能的第二电路)和第一电路集成在同一芯片元件上，可一定程度上的提高显示模组中电路的集成度，实现HiSID集成系统。
可选的，每个发光组件中包括多个发光芯片，多个发光芯片相互绝缘。一方面可以增大发光组件的面积，便于组装操作。另一方面可以进一步提高芯片元件中多个第一电路的集成度。
可选的，第一电路设置在第一表面，多个发光组件中的第一电路同层设置。将多个第一电路同层设置，在制备第一电路时，可将显示模组中的多个电路结构中相同功能的各膜层同步形成、同层设置，减少电路封装区域所占面积，可提高显示模组的集成度。
可选的，显示模组还包括第二电路，第二电路用于实现除驱动发光芯片发光以外的功能；第二电路与第一电路同层设置。将多个第一电路和第二电路同层设置，在制备第一电路和第二电路时，可将显示模组中的多个电路结构中相同功能的各膜层同步形成、同层设置，减少电路封装区域所占面积，进一步提高显示模组的集成度。
可选的，显示模组包括显示区；显示区包括多个子像素区；发光芯片位于子像素区；多个功能器件中的至少部分设置于第一表面且位于子像素区。将功能器件和发光组件均设置于载板的第一表面，功能器件设置在子像素区中的空白区域，充分利用显示模组整体面积，结构简单，且显示模组的厚度较薄。
可选的，载板还包括第二表面，第二表面与第一表面相对设置；多个功能器件中的至少部分设置于第二表面。本方案中，将发光组件和功能器件分别设置于载板的第一表面和第二表面，工艺简单，易于实现，对显示模组子像素区的大小没有要求，可提高显示模组的像素密度(pixels per inch，PPI)。
可选的，显示模组包括显示区；多个功能器件中的至少部分嵌入载板内，且位于显示区。本方案中，将功能器件嵌入载板内，功能器件无需占用厚度方向上的空间，可提高显示模组的集成度，降低显示模组的厚度。另外，通过将功能器件设置在显示区，不会增大周边区的面积，可提高显示模组的屏占比。
可选的，载板上设置有布线层，功能器件与发光组件分别与布线层相耦接。直接在载板上设置布线层，工艺简单，无需临时载板等部件，易于实现。
可选的，载板为布线层；功能器件与发光组件分别与布线层相耦接。可省去载板， 使显示模组轻薄化。
可选的，功能器件通过共晶键合工艺、低温键合工艺、异方性导电胶膜耦接或者直接接触耦接中的一种与布线层相耦接。共晶键合工艺成熟简单，且环境可靠性高。低温键合工艺可应用于较小间距(pitch)的多个焊盘与其他部件的耦接。由于异方性导电胶膜耦接，实现简单且成本低。直接接触耦接能重复利用半导体工艺实现较小间距(pitch)的多个焊盘与其他部件的耦接。
可选的，发光组件通过共晶键合工艺、低温键合工艺、异方性导电胶膜耦接或者直接接触耦接中的一种与布线层相耦接。
可选的，功能器件包括电源管理模块、图像处理器、中央处理器、闪存存储器、双倍数据速率存储器、系统级芯片、射频模块、感光芯片、指纹识别芯片、虹膜识别芯片、人脸识别芯片、传感器芯片、功率管理器、天线模块、受话器、麦克风、定时控制器、触摸感测芯片、无线控制器、蓝牙模块、惯性传感器或者压力计中的一种。
可选的，第二电路包括电源管理电路、图像处理电路、指纹识别电路、虹膜识别电路、人脸识别电路、功率管理电路、处理器电路或者存储器电路中的一种。
本申请实施例的第二方面，提供一种显示模组，包括：电路板，具有相对的第三表面和第四表面；功能器件，设置在第三表面，与电路板相耦接；发光元件，设置在第四表面，与电路板相耦接。通过将功能器件和发光元件设置在电路板相对的两侧，去除TFT背板中的衬底，直接将电路板作为衬底使用，形成板级异质集成。相对于传统AMOLED显示模组而言，无需使用衬底，将PCB上功能器件和屏幕合为一体，能够有效减小显示模组的厚度和重量。此外，由于功能器件和发光元件均集成在电路板上，因此，无需再将TFT背板与电路板互连和组装，可减薄显示模组的厚度，提高了显示模组的集成度。
可选的，显示模组还包括第一电路，第一电路设置在第三表面，发光元件与第一电路相耦接，发光元件用于在第一电路的驱动下发光。
可选的，电路板为硬质电路板。
本申请实施例的第三方面，提供一种电子设备，包括电池以及如第一方面任一项的显示模组，电池位于显示模组的背面。
电子设备包括第一方面任一项的显示模组，其有益效果与显示模组的有益效果相同，此处不再赘述。
本申请实施例的第四方面，提供一种电子设备，包括电池以及第二方面的显示模组，电池位于显示模组的背面。
电子设备包括第二方面任一项的显示模组，其有益效果与显示模组的有益效果相同，此处不再赘述。
附图说明
图1A为本申请实施例提供的一种电子设备的结构示意图；
图1B为本申请实施例提供的一种显示模组的结构示意图；
图1C为本申请实施例提供的另一种显示模组的结构示意图；
图2A为本申请实施例提供的又一种显示模组的结构示意图；
图2B为本申请实施例提供的一种发光组件的结构示意图；
图2C为本申请实施例提供的一种发光芯片的布局示意图；
图2D为本申请实施例提供的另一种发光组件的结构示意图；
图2E为本申请实施例提供的又一种显示模组的结构示意图；
图2F为本申请实施例提供的又一种发光组件的结构示意图；
图2G为本申请实施例提供的又一种发光组件的结构示意图；
图2H为本申请实施例提供的一种显示模组的制备过程示意图；
图3A为本申请实施例提供的一种功能器件的设置位置示意图；
图3B为本申请实施例提供的另一种功能器件的设置位置示意图；
图3C为本申请实施例提供的又一种功能器件的设置位置示意图；
图3D为本申请实施例提供的又一种功能器件的设置位置示意图；
图3E为本申请实施例提供的又一种功能器件的设置位置示意图；
图3F为本申请实施例提供的又一种功能器件的设置位置示意图；
图3G为本申请实施例提供的又一种功能器件的设置位置示意图；
图3H为本申请实施例提供的一种显示模组的俯视图；
图4A为本申请实施例提供的一种布线层的设置位置示意图；
图4B为本申请实施例提供的另一种布线层的设置位置示意图；
图4C为本申请实施例提供的又一种布线层的设置位置示意图；
图4D为本申请实施例提供的又一种布线层的设置位置示意图；
图4E为本申请实施例提供的又一种布线层的设置位置示意图；
图4F为本申请实施例提供的又一种布线层的设置位置示意图；
图5A为本申请实施例提供的另一种显示模组的制备过程示意图；
图5B为本申请实施例提供的一种布线层的制备过程示意图；
图6A为本申请实施例提供的又一种布线层的设置位置示意图；
图6B为本申请实施例提供的又一种布线层的设置位置示意图；
图7A为本申请实施例提供的又一种功能器件的设置位置示意图；
图7B为本申请实施例提供的又一种功能器件的设置位置示意图；
图7C为本申请实施例提供的又一种功能器件的设置位置示意图；
图8A为本申请实施例提供的一种发光组件与布线层的耦接方式示意图；
图8B为本申请实施例提供的另一种发光组件与布线层的耦接方式示意图；
图8C为本申请实施例提供的又一种发光组件与布线层的耦接方式示意图；
图8D为本申请实施例提供的又一种发光组件与布线层的耦接方式示意图；
图9A为本申请实施例提供的又一种显示模组的结构示意图；
图9B为本申请实施例提供的又一种显示模组的结构示意图；
图9C为相关技术提供的一种载板上走线的布局示意图；
图10A为本申请实施例提供的又一种发光组件的结构示意图；
图10B为本申请实施例提供的一种TFT的结构示意图；
图10C为本申请实施例提供的又一种发光组件的结构示意图；
图11为本申请实施例提供的又一种显示模组的结构示意图。
附图标记
01-显示模组；02-电池；03-衬底；04-电路板；05-发光元件；10-载板；11-导电通孔；20-功能器件；30-发光组件；31-发光芯片；31a-第一发光芯片；31b-第二发光芯片；31c-第三发光芯片；32-芯片元件；321-第一电路；322-第二电路；40-布线层；50-绝缘层。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。
以下，术语“第二”、“第一”等仅用于描述方便，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第二”、“第一”等的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。
此外，本申请实施例中，“上”、“下”、“左”、“右”等方位术语可以包括但不限于相对附图中的部件示意置放的方位来定义的，应当理解到，这些方向性术语可以是相对的概念，它们用于相对于的描述和澄清，其可以根据附图中部件附图所放置的方位的变化而相应地发生变化。
在本申请实施例中，除非另有明确的规定和限定，术语“连接”应做广义理解，例如，“连接”可以是固定连接，也可以是可拆卸连接，或成一体；可以是直接相连，也可以通过中间媒介间接相连。此外，术语“相耦接”可以是直接的电性连接，也可以通过中间媒介间接的电性连接。术语“接触”可以是直接接触，也可以是通过中间媒介间接的接触。
本申请实施例中，“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。
本申请实施例提供一种电子设备，该电子设备可以包括手机(mobile phone)、平板电脑(pad)、电视、智能穿戴产品(例如，智能手表、智能手环)、虚拟现实(virtual reality，VR)终端设备、增强现实(augmented reality AR)终端设备等具有显示功能的电子产品。本申请实施例对上述电子设备的具体形式不做特殊限制。以下为了方便说明，以上述电子设备为如图1A所示的手机为例进行说明。
该电子设备可以包括用于显示图像的显示模组01，以及位于该显示模组01背面的电池02，电池02用于向显示模组01供电。
其中，显示模组01的背面与显示模组01的出光面相对设置。
目前，能够实现自发光的显示模组，例如采用有源矩阵有机发光二极管(active matrix organic light emitting diode，AMOLED)技术的显示模组，其子像素(sub pixel)中设置有机发光二极管(organic light emitting diode，OLED)。通过控制不同OLED的发光亮度，即可以实现灰阶显示。因此无需设置用于提供背光源的背光模组(back light unit，BLU)，从而能够减小显示模组的厚度。
如图1B所示，AMOLED显示模组中设置有薄膜晶体管(thin film transistor，TFT)背板，以及用于承载功能器件20的印刷电路板(printed circuit board，PCB)。
功能器件20例如可以是电源管理单元(power management unit，PMU)、图像处 理器(graphics processing unit，GPU)、中央处理器(central processing unit，CPU)、闪存存储器(universal flash storage，UFS)、双倍数据速率(double data rate，DDR)存储器、系统级芯片(system on chip，SOC)或者射频单元(remote radio unit，RRU)等。
TFT背板包括衬底03和设置在衬底03上、主要由TFT构成的驱动电路，该驱动电路用于驱动位于TFT背板上方的OLED器件发光。TFT背板通过FPC与PCB相耦接，以接收PCB传输的驱动信号。其中，FPC与PCB例如可以通过板对板连接器(board to board，BTB)连接。
为了提高显示模组的集成度，如图1B所示，将PCB上的功能器件20进行堆叠装配(package on package，POP)，以形成系统级封装(system in package，SIP)，从而实现PCB的布局面积缩减，提升显示模组的集成度，降低整机尺寸。
堆叠装配的方案，例如可以是将射频前端将开关、滤波器、功率放大器(power amplifier，PA)集成封装成为单面SIP模组，将无线网络(wifi)模块集成封装成双面SIP模组等。或者如图1B所示，将DDR和SOC的堆叠装配。
然而，虽然上述方案意在减小PCBA(printed bircuit board assembly，印刷电路板上集成功能器件)的面积，以提高显示模组01的集成度。但由于上述TFT背板和PCB是分立式存在，系统集成度受PCB面积及厚度限制，不利于电子设备的轻薄化设计。另外，PCB和TFT背板分立的架构也增加二者互连和组装的工艺步骤及成本，整体无法满足当前整机超薄化，高性能化发展趋势。
基于此，本申请实施例还提供一种显示模组01，如图1C所示，显示模组01包括电路板04、功能器件20以及发光元件05(例如OLED)。
电路板04具有第三表面A3和第四表面A4，第三表面A3和第四表面A4相对设置。功能器件20设置在电路板04的第三表面A3，与电路板04相耦接。发光元件05设置在电路板04的第四表面A4，与电路板04相耦接。
在本申请的一些实施例中，如图1C所示，主要由TFT构成的驱动电路设置在电路板04的第四表面A4上，与发光元件05耦接，用于驱动发光元件05发光。基于此，驱动电路与电路板04耦接，发光元件05通过驱动电路与电路板04耦接。
本申请实施例通过将功能器件20和发光元件05设置在电路板04相对的两侧，去除TFT背板中的衬底03，直接将电路板04作为衬底使用，形成板级异质集成。因此本申请实施例提供的显示模组01相对于图1B所示的AMOLED显示模组而言，无需使用衬底03，将PCB上功能器件20和屏幕合为一体，能够有效减小显示模组01的厚度和重量。此外，由于功能器件20和发光元件05均集成在电路板04上，因此，无需再将TFT背板与电路板04互连和组装，可减薄显示模组01的厚度，提高了显示模组01的集成度。
本申请实施例还提供一种显示模组01，以下通过不同的示例对该显示模组01的结构进行详细的说明。
示例一
本示例中，电子设备中的显示模组01，如图2A所示，可以包括载板10和承载于载板10上的多个功能器件20和多个发光组件30。
本申请实施例不对载板10进行限定，在本申请的一些实施例中，载板10为由柔性材料或者硬性材料构成的承载基板。示例的，载板10可以是柔性载板，例如构成载板的材料为聚酰亚胺(polyimide，PI)。载板10也可以是硬性载板，例如构成载板10的材料为玻璃、单晶硅或者二氧化硅。
或者，在本申请的另一些实施例中，载板10为由布线层构成的载板。即，布线层直接作为本示例中的载板10。其中，根据需要，布线层可以包括单层金属线层，也可以包括多层金属线层，示例的为重布线层(re-distribution layer，RDL)。以下为了便于说明，以布线层包括多层金属线层为例进行说明。
如图2A所示，该载板10可以具有相对设置的第一表面A1和第二表面A2，多个发光组件30设置在载板10的第一表面A1。
其中，不对多个发光组件30的排布方式进行限定，在一些实施例中，多个发光组件30阵列排布。
如图2B所示，发光组件30可以包括发光芯片31和芯片元件32，芯片元件32中集成有第一电路321(或者理解为驱动电路)，发光芯片31与第一电路321相耦接，发光芯片31用于在第一电路321的驱动下发光。
其中，该发光芯片31是指采用半导体芯片制备工艺，在晶圆(wafer)上形成阵列排布的晶粒，每个晶粒具有发光层。然后对形成有上述晶粒的晶圆进行切割，使得各个晶粒彼此独立，切割后每个独立的晶粒作为上述发光芯片31。
在本申请的一些实施例中，该发光芯片31可以为晶粒尺寸在几十微米的微型(micro)发光二极管(light emitting diode，LED)。或者，该发光芯片31可以为晶粒尺寸在100微米以上的小型(mini)LED。上述发光芯片31为电流驱动器件。
在此情况下，每个发光芯片31可以作为显示模组01的一个子像素(sub pixel，或者称为亚像素)。多个发光芯片31构成显示模组01的一个像素(pixel)，位于同一像素中的多个发光芯片31称为一个发光组，同一发光组中的多个发光芯片31可以至少发出三原色光(红、绿、蓝光)，使得显示模组01能够显示图像。
示例的，如图2C所示，同一发光组中的多个发光芯片31可以包括第一发光芯片31a、第二发光芯片31b以及第三发光芯片31c。其中，第一发光芯片31a、第二发光芯片31b以及第三发光芯片31c可以分别用于发出三原色光。例如，第一发光芯片31a、第二发光芯片31b以及第三发光芯片31c可以分别用于发出红(red，R)光、蓝(blue，B)光以及绿(green，G)光。这样一来，同一发光组中的第一发光芯片31a、第二发光芯片31b以及第三发光芯片31c可以构成一个像素(pixel)。通过调节同一个发光组中的第一发光芯片31a、第二发光芯片31b以及第三发光芯片31c各自的发光亮度，可以达到控制显示模组01进行彩色显示时，显示图像的像素灰阶的目的。
以发光芯片31为micro LED为例，micro LED相对于OLED而言，功耗更低，有利于减小显示模组01中电池的体积。此外，micro LED相对于OLED而言，亮度更高，尺寸更小从而具有更小的开口率。这样一来，能够有效节约显示模组01中的部件空间，有利于集成更多的电子元器件。
基于此，为了能够驱动发光组件30中的发光芯片31发光，如图2B所示，芯片元件32中集成有第一电路321。例如，在采用互补金属氧化物半导体(complementary  metal oxide semiconductor，CMOS)工艺制作上述第一电路321。发光芯片31与第一电路321相耦接，第一电路321用于驱动发光芯片31发光。
需要说明的是，该第一电路321可以包括多个采用CMOS工艺形成的晶体管。上述第一电路321可以包括驱动晶体管和多个开关晶体管。通过控制开关晶体管的导通和关闭可以将与显示数据有关的数据电压写入至驱动晶体管。该驱动晶体管可以根据上述数据电压产生与该数据电压相匹配的驱动电流。由于上述发光芯片31为电流驱动器件，因此当上述驱动电流流过发光芯片31时，可以驱动发光芯片31发光。通过控制驱动电流的大小，可以对发光芯片31的发光亮度进行控制。本申请对第一电路321中的多个晶体管的连接方式不做限定，只要能够达到驱动与其电连接的发光芯片31发光的目的即可。
基于上述，在本申请的一些实施例中，如图2B所示，每个发光组件30可以包括一个发光芯片31和一个芯片元件32，芯片元件32中集成有第一电路321。一个发光组件30作为显示模组01用于实现显示功能的一个子像素。
在本申请的另一些实施例中，如图2D所示，每个发光组件30包括多个发光芯片31和一个芯片元件32，芯片元件32中集成有用于驱动多个发光芯片31发光的第一电路321。示例的，多个发光芯片31构成一个上述发光组，一个发光组件30作为显示模组01用于实现显示功能的一个像素。
无论是哪种结构，多个发光组件30相互独立，每个发光组件30为一个独立的部件。在制备显示模组01时，将多个发光组件30分别与载板10耦接。
可以理解的是，多个发光芯片31可以为独立的晶粒，也可以为连为一体的晶粒。当然，无论是哪种结构，同一发光组件30中的多个发光芯片31相互绝缘。
另外，芯片元件32中的多个第一电路321包括的晶体管可以同步形成，以简化制备工艺。
在本申请的一些实施例中，如图2E所示，芯片元件32设置在发光芯片31与载板10之间，即发光芯片31和芯片元件32堆叠设置。
这样一来，可以减小每个发光组件30横向所占的面积，以提高发光组件30的集成度。
关于发光芯片31与芯片元件32的结构设计，在本申请的一些实施例中，如图2F所示，芯片元件32的有源面C1朝向发光芯片31，与发光芯片31直接耦接。芯片元件32内设置有TSV，TSV的一端与芯片元件32的有源面C1耦接，一端用于实现发光组件30与其他部件的耦接。其中，芯片元件32中设置有晶体管的一面称为有源面C1。
在本申请的另一些实施例中，如图2G所示，芯片元件32的有源面C1背离发光芯片31。芯片元件32内设置有TSV，TSV的两端分别与芯片元件32的有源面C1和发光芯片31耦接，芯片元件32的有源面C1直接与其他部件耦接。
以图2G所示的发光组件30为例，显示模组01的制备过程如图2H所示，例如，可以先将多个发光芯片31键合在晶圆上，晶圆包括多个芯片元件32，一个芯片元件32与一个发光芯片31对应。键合工艺例如可以是芯片晶圆键合(chip to wafer，C2W)工艺。随后对晶圆进行切割，形成多个发光组件30。随后将发光组件30和功能器件 20焊接到载板10上，焊接方式例如可以采用共晶键合工艺。
另外，本申请实施例不对功能器件20的具体类型进行限定，用以丰富电子设备功能的器件均适用于本申请。示例的，功能器件20例如可以是电源管理模块、图像处理器、中央处理器、闪存存储器、双倍数据速率存储器、系统级芯片、射频模块、感光芯片、指纹识别芯片、虹膜识别芯片、人脸识别芯片、传感器芯片、功率管理器、天线模块、受话器、麦克风(MIC)、定时控制器、触摸感测芯片、无线控制器、蓝牙模块、惯性传感器、压力计等。
通过上述描述可知，功能器件20承载于载板10上，本申请实施例不对功能器件20在载板10上的设置位置进行限定，无需单独设置支撑板，以载板10为支撑板即可。
示例的，如图2F所示，功能器件20第一种可能的设置方式为：功能器件20可以设置于载板10的第一表面A1。
如图3A所示，显示模组01包括显示区(ative area，AA，或者称为有效显示区)，显示区AA包括多个阵列排布的子像素区B，每个子像素区B设置有一个子像素，即每个子像素区B设置有发光芯片31。
在本申请的一些实施例中，如图3A所示，功能器件20位于子像素区B。
其中，基于图2F所示的结构，载板10的结构可以是上述承载基板，也可以是上述布线层。
本方案中，将功能器件20和发光组件30均设置于载板10的第一表面A1，功能器件20设置在子像素区B中的空白区域，充分利用显示模组01整体面积，结构简单，且显示模组01的厚度较薄。
示例的，如图3B所示，功能器件20第二种可能的设置方式为：功能器件20可以设置于载板10的第二表面A2。
即，发光组件30设置于载板10的第一表面A1，功能器件20设置于载板10的第二表面A2。
其中，基于图3B所示的结构，载板10的结构可以是上述承载基板，也可以是上述布线层。
本方案中，将发光组件30和功能器件20分别设置于载板10的第一表面A1和第二表面A2，工艺简单，易于实现，对显示模组01子像素区的大小没有要求，可提高显示模组01的像素密度(pixels per inch，PPI)。
示例的，如图3C所示，功能器件20第三种可能的设置方式为：功能器件20嵌入载板10内。
嵌入，的意思为牢固地或深深地固定或树立，可以理解为埋入、镶入。
关于将功能器件20嵌入载板10的方式，在本申请的一些实施例中，在载板10的第二表面A2形成凹槽，将功能器件20嵌入凹槽中。
在本申请的另一些实施例中，用临时载板支撑功能器件20，随后对功能器件20进行封装，以形成功能器件20嵌入载板10的结构。
其中，功能器件20用于与其他部件进行信号转接的转接面(即设置有焊盘的表面)可以朝向载板10的第一表面A1，也可以朝向载板10的第二表面A2。
基于图3C所示的结构，载板10的结构可以是上述承载基板，例如为玻璃基板或 者PI基板。或者载板10的结构可以是重布线层。
本方案中，将功能器件20嵌入载板10内，功能器件20无需占用厚度方向上的空间，可提高显示模组01的集成度，降低显示模组01的厚度。
可以理解的是，显示模组01包括多个功能器件20，多个功能器件20可以采用上述三种设置方式中的任意一种。即，显示模组01中的多个功能器件20的设置方式可以是上述三种方式的随意组合。
在本申请的一些实施例中，如图2E所示，显示模组01中的多个功能器件20均采用上述第一种方式设置。即，功能器件20设置于载板10的第一表面A1。
在本申请的另一些实施例中，如图3B所示，显示模组01中的多个功能器件20均采用上述第二种方式设置。即，功能器件20设置于载板10的第二表面A2。
在本申请的另一些实施例中，如图3C所示，显示模组01中的多个功能器件20均采用上述第三种方式设置。即，功能器件20嵌入载板10内。
在本申请的另一些实施例中，如图3D所示，显示模组01中的多个功能器件20，有部分功能器件20采用上述第一种设置方式，部分功能器件20采用上述第二种设置方式。
在本申请的另一些实施例中，如图3E所示，显示模组01中的多个功能器件20，有部分功能器件20采用上述第一种设置方式，部分功能器件20采用上述第三种设置方式。
在本申请的另一些实施例中，如图3F所示，显示模组01中的多个功能器件20，有部分功能器件20采用上述第二种设置方式，部分功能器件20采用上述第三种设置方式。
在本申请的另一些实施例中，如图3G所示，显示模组01中的多个功能器件20，部分功能器件20采用上述第一种设置方式，部分功能器件20采用上述第二种设置方式，部分功能器件20采用上述第三种设置方式。
这样一来，无论是上述哪种设置方式，显示模组01中的功能器件20和发光组件30均集成在载板10上。如图3H所示，显示模组01包括显示区(AA，或者称为有效显示区)，和位于显示区外围的周边区。本示例中，无论功能器件20设置在载板10的哪个位置，功能器件20均可以位于显示模组01的显示区AA中，从而可以减小周边区的面积，提高显示模组01的屏占比。
另外，通过将功能器件20灵活布局，可将部分会受发光芯片31干扰而影响性能的功能器件20(例如射频单元)设置在离发光芯片31较远的位置处，从而使前述功能器件20远离发光芯片31的干扰，保证功能器件20的性能。
在本申请的一些实施例中，如图4A所示，显示模组01还包括布线层40，发光组件30和功能器件20分别与布线层40相耦接。
布线层40中的金属走线将驱动信号传输至发光组件30中的第一电路321，以驱动发光芯片31发光。布线层40中的金属走线还用于将与各功能器件20对应的工作信号传输至各功能器件20，以使功能器件20实现相应的功能。
可以理解的是，布线层40用于向发光组件30和功能器件20传输信号，因此，布线层40的设置位置与发光组件30和功能器件20的设置位置有关，但无论如何设置， 布线层40、发光组件30以及功能器件20三者均由载板10承载。
根据显示模组01中布线的情况，布线层40可以包括单层金属线层，也可以包括多层金属线层。本申请实施例为了便于说明，以布线层多层金属线层为例进行说明。
下面先对功能器件20与布线层40的相对位置关系进行说明，随后再对发光组件30和功能器件20各自与布线层40的耦接方式进行说明。
关于布线层40的设置位置，在一种可能的实施例中，布线层40可以设置在载板10上。
直接在载板10上设置布线层40，工艺简单，无需临时载板等部件，易于实现。
关于功能器件20与布线层40的相对位置关系，在本申请的一些实施例中，如图4A所示，发光组件30和功能器件20均设置在载板10的第一表面A1，布线层40可以设置在发光组件30和功能器件20与载板10之间。示例的，布线层40设置在载板10的第一表面A1上。
在本申请的另一些实施例中，如图4B所示，发光组件30设置在载板10的第一表面A1，功能器件20设置在载板10的第二表面A2，发光组件30与载板10之间以及功能器件20与载板10之间均设置有布线层40。示例的，载板10的第一表面A1上和第二表面A2上均设置有布线层40。发光组件30与设置在第一表面A1上的布线层40耦接，功能器件20与设置在第二表面A2上的布线层40耦接。
可以理解的是，在载板10上设置有多层布线层40的情况下，多层布线层40的结构不限定为相同，各层布线层40的具体结构根据发光组件30和功能器件20的分布情况进行设计调整。
通过在载板10的两侧分别设置用于与功能器件20和发光组件30耦接的布线层40，无需在载板10中设置导电通孔，结构简单。
在本申请的另一些实施例中，如图4C所示，发光组件30设置在载板10的第一表面A1，功能器件20设置在载板10的第二表面A2，发光组件30与载板10之间设置有布线层40，载板10内设置有导电通孔11，导电通孔11的两端分别与布线层40和功能器件20相耦接。示例的，载板10的第一表面A1上设置有布线层40。
关于导电通孔11的结构，示例的，载板10为玻璃载板，导电通孔11可以为玻璃通孔(through glass via，TGV)。或者，示例的，载板10为硅基载板，导电通孔11可以为硅通孔(through silicon via，TSV)。或者，示例的，载板10为PI载板，导电通孔11可以为设置在PI载板内的导电柱。
通过在载板10的一侧设置布线层40，借助导电通孔11将布线层40上的信号转接至功能器件20上，可减少布线层40的数量，使显示模组01轻薄化。
在本申请的另一些实施例中，如图4D所示，发光组件30设置在载板10的第一表面A1，功能器件20嵌入载板10内，功能器件20的转接面B1朝向载板10的第一表面A1，发光组件30与载板10之间设置有布线层40。示例的，载板10的第一表面A1上设置有布线层40。
在这种情况下，根据制备工艺的不同，示例的，如图4D所示，载板10内可以设置有导电通孔11，导电通孔11的两端分别与布线层40和功能器件20相耦接。
或者，示例的，如图4E所示，功能器件20的转接面B1上的焊盘直接暴露在载 板10的第一表面A1。即，功能器件20的转接面B1与载板10的第一表面A1平齐，焊盘直接与布线层40相耦接。
或者，示例的，如图4F所示，功能器件20的背面B2(与转接面B1相对的表面)与载板10的第二表面A2平齐。
关于图4F所示的显示模组01的制备过程，示例的，如图5A所示，主要包括：将功能器件20贴装在临时载板上，功能器件20的转接面B1背离临时载板；随后涂覆PI，形成封装层；随后对封装层进行曝光显影，在封装层上形成过孔，以形成露出功能器件20转接面B1上焊盘的载板10；随后形成布线层40，布线层40与转接面B1耦接，位于过孔内导电材料作为导电通孔11；随后将发光组件30与布线层40耦接；随后去除临时载板，以制备得到图4F所示的显示模组01。
其中，布线层40与转接面B1的耦接方式，可以是在形成布线层40中最靠近载板10的金属线层时，部分导电材料直接填充过孔，位于过孔内导电材料作为导电通孔11，布线层40与功能器件20的转接面B1上的焊盘直接耦接。或者，在形成布线层40之前先形成导电通孔11。
关于形成布线层40的方式，如图5B所示，例如可以采用物理气相沉积(physical vapour deposition，PVD)技术形成种子层；随后对种子层进行光刻、显影露出待形成金属线的图案(为了便于示意，此处称图案化后的种子层为图案化种子层)；电镀形成金属线，并填充封装层上的过孔；去除多余种子层以形成布线层40中的金属线；对金属线进行封装，露出待与发光组件30耦接的焊盘。其中，在布线层40包括多层金属线的情况下，可以重复上述形成金属线的步骤，但无需再填充过孔。
在本申请的另一些实施例中，如图6A所示，发光组件30设置在载板10的第一表面A1，功能器件20嵌入载板10内，功能器件20的转接面B1朝向载板10的第二表面A2，载板10的第一表面A1和第二表面A2分别设置有布线层40。
根据制备工艺的不同，如图6A所示，示例的，功能器件20的转接面B1上的焊盘直接暴露在载板10的第二表面A2。即，功能器件20的转接面B1与载板10的第二表面A2平齐，焊盘直接与位于第二表面A2上的布线层40相耦接。
或者，示例的，如图6B所示，载板10内可以设置有导电通孔11，导电通孔11的两端分别与位于第二表面A2上的布线层40和功能器件20相耦接。
在功能器件20的转接面B1朝向载板10的第二表面A2的情况下，载板10的第一表面A1和第二表面A2分别设置有布线层40，可便于布线层40与功能器件20的耦接。
可以理解的是，布线层40的设置位置与功能器件20的设置位置息息相关，上述仅是示意出了功能器件20与布线层40部分可能的位置关系，上述方式的任意组合均属于本申请的保护范围。
在本申请的另一些实施例中，如图7A所示，载板10的结构为布线层40，或者理解为，布线层40直接作为显示模组01的载板10。
基于此，如图7A所示，功能器件20和发光组件30可以位于布线层40的同一侧。或者，如图7B所示，功能器件20和发光组件30可以位于布线层40相对的两侧。或者，如图7C所示，部分功能器件20与发光组件30位于布线层40的同一侧，部分功 能器件20与发光组件30位于布线层40相对的两侧。
本申请实施例不对发光组件30和功能器件20与布线层40的耦接方式进行限定，无论是上述载板10上设置有布线层40的结构，或者是上述布线层40作为载板10的结构，发光组件30和功能器件20与布线层40的耦接方式可以相同。以下为了便于说明，以载板10上设置有布线层40为例，对发光组件30和功能器件20与布线层40的耦接方式进行示意说明。
关于发光组件30与布线层40的耦接方式，由于共晶键合工艺成熟简单，且环境可靠性高，在本申请的一些实施例中，如图8A所示，发光组件30通过共晶键合工艺与布线层40耦接。
共晶键合是一种低熔点的合金焊接，它是指在相对较低的温度下共晶焊料发生共晶物熔合的现象。共晶焊点的材料例如可以是Au-In(金-铟)、Au-Ge(金-锗)、Au-Sn(金-锡)、Au-Si(金-硅)、Sn-In(锡-铟)、Sn-Ag(锡-银)、Sn-Bi(锡-铋)等。
在本申请的另一些实施例中，由于低温键合工艺可应用于较小间距(pitch)的多个焊盘与其他部件的耦接，如图8B所示，发光组件30通过低温键合工艺与布线层40耦接。
低温键合是相对高温键合而言的，通常指在100℃以下甚至室温下进行的芯片键合。低温键合是利用了两个十分贴近的清洁表面具有极大的范畴华力吸附作用，实现了不受晶格失配和热失配的限制的异质材料表面的结合。
另外，由于低温键合工艺是发光组件30与布线层40直接接触键合(例如Cu-Cu键合)，因此，采用低温键合工艺可以避免杂质的互扩散、异质材料间的热应力以及孔洞和缺陷的产生。
在本申请的另一些实施例中，由于异方性导电胶膜耦接，实现简单且成本低，如图8C所示，发光组件30通过异方性导电胶膜(anisotropic conductive film，ACF)与布线层40耦接。
ACF是一种基材a与基材b之间涂布贴合，限定电流只能由垂直轴z方向流通于基材a、b之间的一种特殊涂布物质，兼具单向导电及胶合固定的功能。发光组件30通过ACF与布线层40耦接，实则是利用ACF中的导电粒子连接发光组件30与布线层40两者之间的焊盘使之成为导通，同时又能避免相邻两焊盘间导通短路，而达成只在z轴方向导通的目的。
在本申请的另一些实施例中，如图8D所示，发光组件30与布线层40直接耦接。
关于实现发光组件30与布线层40直接耦接的方式，示例的，将发光组件30贴装在临时载板上，随后在发光组件30的表面直接形成布线层40，以使发光组件30与布线层40直接耦接。这样一来，能重复利用半导体工艺实现较小间距(pitch)的多个焊盘与其他部件的耦接。
上述图8A-图8D对发光组件30与布线层40的耦接方式进行了示意说明，功能器件20与布线层40的耦接方式可以与发光组件30与布线层40的耦接方式相同，根据功能器件20的设置位置的不同，可以合理选取上述耦接方式，此处不再赘述。
在上述结构的基础上，如图9A所示，显示模组01还包括绝缘层50，绝缘层50覆盖功能器件20和发光组件30，将多个发光组件30、功能器件20相互间隔开，并作 为显示模组01的封装膜层，对功能器件20和发光组件30进行保护，避免水氧侵蚀功能器件20和发光组件30。
其中，绝缘层50覆盖在发光组件30的表面，将多个发光组件30相互间隔开，也就是说发光组件30通过绝缘层50间隔设置，相邻发光组件30没有膜层共用或者膜层连通，多个发光组件30为独立单元，各自与载板10连接。
可以理解的是，如图9A所示，在功能器件20和发光组件30均设置在载板10的第一表面A1时，载板10的第一表面A1侧设置有绝缘层50。如图9B所示，在载板10的第二表面A2设置有功能器件20时，载板10的第一表面A1侧和第二表面A2侧均设置有绝缘层50。
相对于AMOLED显示模组采用的薄膜封装(thin film encapsulation)工艺，形成由多层交替设置的有机薄膜层和无机薄膜层构成的封装结构而言，本申请实施例提供的显示模组01的绝缘层50作为封装膜层的结构和制作工艺更加简单。
本示例中，显示模组01包括的功能器件20和发光组件30均设置在载板10上，充分利用载板10上的空间和厚度，进行超薄化、高性能化集成。通过这种集成，可以实现PCBA主板面积的进一步减少，甚至完全去掉(无需再设置PCB)，是一种异质集成全显示系统架构(heterogeneous integration system in display，HiSID)，可将显示模组01中所有的器件和模组全部集成在显示中(all in display)。显示模组01的集成度高，这样能够留有更大的空间给电池02，或者降低显示模组01的厚度和重量，提升人机交互体验，提升产品竞争力。另外，将显示模组01中所有的器件和模组全部集成在显示中，可去除显示模组01中主要单元互连及组装工艺，实现显示模组01功能一体化，简化整机工艺，节约组装成本。
此外，发光组件30包括发光芯片31和芯片元件32，芯片元件32中包括第一电路321，相当于将发光芯片31和用于驱动发光芯片31发光的第一电路321一体化设计，每个发光组件30为一个独立的发光单元。与相关技术中未将第一电路321与发光芯片31集成相比，相关技术中载板10上的走线布局时需要考虑用于将第一电路321与发光芯片31信号连通的走线和用于将第一电路321与主板连通的走线以及其他走线的布局。通常情况下，为了满足高分辨率的要求，显示模组01中包括的发光芯片31数量通常较大(例如2772×1344个)，导致载板10上走线数量多、布局复杂。而本示例提供的显示模组01将第一电路321与发光芯片31集成后，如图9C所示，在载板10上进行电路布局设计时，无需再考虑用于将第一电路321与发光芯片31信号连通的走线的布局，一定程度的减少了载板10上走线的数量，从而使得载板10上的线路布局灵活性比较高。
示例二
示例二与示例一的不同之处在于发光组件30的结构不同。
显示模组01包括载板10、功能器件20、发光组件30以及布线层40。
载板10的结构、功能器件20的结构和设置位置以及布线层40的设置位置可以与示例一中相同，可以参考示例一中关于载板10和功能器件20的相关描述，此处不再赘述。
如图10A所示，发光组件30包括发光芯片31和芯片元件32。芯片元件32中集成有第一电路321，多个发光组件30包括的多个芯片元件32中，至少部分(有一些或者全部)芯片元件32内还集成有第二电路322，第二电路322与第一电路321同步形成、同层设置。
其中，第一电路321和第二电路322包括多个TFT等部件。关于TFT的结构，示例的，如图10B所示，TFT包括栅极层、栅绝缘层、半导体有源层以及源漏极层。
根据半导体有源层材料的不同，TFT可以为非晶硅TFT、多晶硅TFT、金属氧化物TFT、有机薄膜TFT等。另外，根据栅极层位置的不同，TFT还可以顶栅型TFT、底栅型TFT或双栅型TFT。图10B中的底栅型TFT仅为一种示意。其中，第一电路321与第二电路322同步形成，可以理解为，第一电路321包括的TFT和第二电路322包括的TFT同步形成，第一电路321的TFT和第二电路322的TFT中的栅绝缘层为同一层结构，第一电路321的TFT和第二电路322的TFT中的各导电层(例如栅极层、源漏极层)、半导体有源层通过同一制备工艺同步制备得到，同层同材料。
第一电路321与第二电路322同层设置，可以理解为，第一电路321的TFT和第二电路322的TFT中的各层(栅极层、栅绝缘层、半导体有源层以及源漏极层)分别同层设置。
“同层”指的是采用同一成膜工艺形成用于形成特定图形的膜层，然后利用同一掩模板通过同一构图工艺形成的层结构。根据特定图形的不同，同一构图工艺可能包括多次曝光、显影或刻蚀工艺，而形成的层结构中的特定图形可以是连续的也可以是不连续的，这些特定图形还可能处于不同的高度或者具有不同的厚度。多个发光组件30包括的多个芯片元件32中，至少部分(有一些或者全部)芯片元件32内还集成有第二电路322，可以理解为，一种情况下，多个芯片元件32中，部分芯片元件32中仅集成有第一电路321，部分芯片元件322中集成有第一电路321和第二电路322。另一种情况下，多个芯片元件32中，每个芯片元件32中均分别集成有第一电路321和第二电路322。当然，无论是那种情况，每个芯片元件32中集成的第二电路322的结构不限定为相同，也可以不同。
关于发光组件30中包括的发光芯片31的数量，在本申请的一些实施例中，如图10A所示，每个发光组件30可以包括一个发光芯片31和一个芯片元件32，芯片元件32中集成有第一电路321和第二电路322。一个发光组件30作为显示模组01用于实现显示功能的一个子像素。
在本申请的另一些实施例中，如图10C所示，每个发光组件30包括多个发光芯片31和一个芯片元件32，芯片元件32中集成有第二电路322和用于驱动多个发光芯片31发光的第一电路321。示例的，多个发光芯片31构成一个上述发光组，一个发光组件30作为显示模组01用于实现显示功能的一个像素。
可以理解的是，多个发光芯片31可以为独立的晶粒，也可以为连为一体的晶粒。当然，无论是哪种结构，同一发光组件30中的多个发光芯片31相互绝缘。
对于发光芯片31与芯片元件32的相对位置关系，本示例中仅是以芯片元件32的有源面C1朝向发光芯片31为例进行示意，芯片元件32的有源面C1也可以背离发光芯片31，可以参考示例一种的相关描述。
本申请实施例中，不对第二电路322的结构进行限定，在本申请的一些实施例中，第二电路322例如可以是电源管理电路、图像处理电路、指纹识别电路、虹膜识别电路、人脸识别电路、功率管理电路、处理器电路或者存储器电路中的至少一种。
示例的，第二电路322可以是上述任一种电路。或者，示例的，第二电路322包括上述多种电路。
本示例中，通过将显示模组01中的部分电路(上述第二电路322)和第一电路321集成在同一芯片元件32上，可一定程度上的提高显示模组01中电路的集成度，实现HiSID集成系统。另外，每个发光组件30为一个独立的发光单元，在显示模组01的制备过程中，将多个发光组件30直接转接至载板10上即可。
此外，第一电路321和第二电路322集成在同一芯片元件32上，而有些第二电路322(例如功率管理电路)与第一电路32之间需要信号连通。这样一来，在载板10上进行走线布局时，无需再考虑用于将第一电路321和第二电路322信号连通的走线的布局，载板10上走线数量少，从而使得载板10上的线路布局灵活性比较高。
示例三
示例三与示例一的不同之处在于发光组件30的结构不同。
显示模组01包括载板10、功能器件20、发光组件30以及布线层40。
载板10的结构、功能器件20的结构和设置位置、以及布线层40的设置位置可以与示例一中相同，可以参考示例一中关于载板10和功能器件20的相关描述，此处不再赘述。
如图11所示，发光组件30包括发光芯片31和第一电路321，第一电路321形成于载板10的第一表面A1，多个发光组件30中的第一电路321同步形成、同层设置。
多个发光组件30中的第一电路321同步形成、同层设置，可以理解为，多个发光组件30中第一电路321包含的TFT中的各层(栅极层、栅绝缘层、半导体有源层以及源漏极层)分别通过同一构图工艺制备得到、同层设置。
也就是说，在布线层40表面直接形成第一电路321，多个发光芯片31对应的第一电路321同步形成，工艺简单，集成度高。
在本申请的一些实施例中，如图11所示，显示模组01还包括第二电路322，第二电路322和第一电路321同步形成、同层设置。
关于第二电路322的结构，可以参考示例二中关于第二电路322的描述，此处不再赘述。
本示例中，将多个第一电路321同步形成，还可以将第二电路322与第一电路321同步形成。这样一来，在制备第一电路321时，可将显示模组01中的多个电路结构同步形成，减少电路封装区域所占面积，可提高显示模组01的集成度。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (16)

  1. 一种显示模组，其特征在于，包括：
    载板，具有第一表面；
    多个功能器件，承载于所述载板上，所述功能器件用于实现除发光以外的功能；
    多个发光组件，设置于所述载板的所述第一表面；
    所述发光组件包括发光芯片和第一电路，所述发光芯片与所述第一电路相耦接，所述发光芯片用于在所述第一电路的驱动下发光。
  2. 根据权利要求1所述的显示模组，其特征在于，所述显示模组还包括绝缘层，所述绝缘层覆盖在所述多个发光组件的表面，用于将所述多个发光组件相互间隔开。
  3. 根据权利要求2所述的显示模组，其特征在于，所述发光组件还包括芯片元件，所述芯片元件中集成有所述第一电路。
  4. 根据权利要求3所述的显示模组，其特征在于，所述显示模组还包括第二电路，多个所述芯片元件中的至少部分内还集成有所述第二电路；所述第二电路用于实现除驱动所述发光芯片发光以外的功能。
  5. 根据权利要求3或4所述的显示模组，其特征在于，每个所述发光组件中包括多个发光芯片，所述多个发光芯片相互绝缘。
  6. 根据权利要求1所述的显示模组，其特征在于，所述第一电路设置在所述第一表面，多个所述发光组件中的所述第一电路同层设置。
  7. 根据权利要求6所述的显示模组，其特征在于，所述显示模组还包括第二电路，所述第二电路用于实现除驱动所述发光芯片发光以外的功能；
    所述第二电路与所述第一电路同层设置。
  8. 根据权利要求1所述的显示模组，其特征在于，所述显示模组包括显示区；所述显示区包括多个子像素区；所述发光芯片位于所述子像素区；所述多个功能器件中的至少部分设置于所述第一表面且位于所述子像素区。
  9. 根据权利要求1或8所述的显示模组，其特征在于，所述显示模组包括显示区；所述多个功能器件中的至少部分嵌入所述载板内，且位于所述显示区。
  10. 根据权利要求1或8或9所述的显示模组，其特征在于，所述载板还包括第二表面，所述第二表面与所述第一表面相对设置；所述多个功能器件中的至少部分设置于所述第二表面。
  11. 根据权利要求1所述的显示模组，其特征在于，所述载板上设置有布线层或者所述载板为布线层；
    所述功能器件与所述发光组件分别与所述布线层相耦接。
  12. 根据权利要求11所述的显示模组，其特征在于，所述功能器件或所述发光组件，通过共晶键合工艺、低温键合工艺、异方性导电胶膜耦接或者直接接触耦接中的一种与所述布线层相耦接。
  13. 根据权利要求1所述的显示模组，其特征在于，所述功能器件包括电源管理模块、图像处理器、中央处理器、闪存存储器、双倍数据速率存储器、系统级芯片、射频模块、感光芯片、指纹识别芯片、虹膜识别芯片、人脸识别芯片、传感器芯片、功率管理器、天线模块、受话器、麦克风、定时控制器、触摸感测芯片、无线控制器、 蓝牙模块、惯性传感器或者压力计中的一种。
  14. 根据权利要求4或7所述的显示模组，其特征在于，所述第二电路包括电源管理电路、图像处理电路、指纹识别电路、虹膜识别电路、人脸识别电路、功率管理电路、处理器电路或者存储器电路中的一种。
  15. 一种显示模组，其特征在于，包括：
    电路板，具有相对的第三表面和第四表面；
    功能器件，设置在所述第三表面，与所述电路板相耦接；
    发光元件，设置在所述第四表面，与所述电路板相耦接。
  16. 一种电子设备，其特征在于，包括电池以及如权利要求1-14任一项或者15所述的显示模组，所述电池位于所述显示模组的背面。
PCT/CN2022/083436 2021-03-31 2022-03-28 显示模组及电子设备 WO2022206692A1 (zh)

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