WO2022181085A1 - 面発光レーザ及び面発光レーザの製造方法 - Google Patents
面発光レーザ及び面発光レーザの製造方法 Download PDFInfo
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- H01S5/18344—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] characterized by the mesa, e.g. dimensions or shape of the mesa
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- H01S5/00—Semiconductor lasers
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Definitions
- This technology relates to a surface emitting laser and a method for manufacturing the surface emitting laser.
- Surface-emitting lasers have many advantages over edge-emitting lasers (edge-emitting semiconductor lasers). For this reason, in recent years, research and development of surface-emitting lasers have been actively carried out (for example, Patent Documents 1 to 3).
- Surface-emitting lasers include, for example, VCSELs (Vertical Cavity Surface Emitting Lasers).
- Patent Documents 1 to 3 may not be able to further reduce diffraction loss, further improve heat dissipation, further improve yield, or further improve reliability. .
- a main object of the present invention is to provide a surface-emitting laser and a method for manufacturing a surface-emitting laser that can be realized.
- the present inventors have surprisingly found that diffraction loss can be further reduced, heat dissipation can be further improved, yield can be further improved, and reliability can be further improved. We succeeded in improving it and completed this technology.
- the present technology as a first aspect, comprising a substrate and a vertical cavity structure formed on the substrate;
- the vertical cavity structure comprises at least one element selected from the group consisting of In, Ga, Al, N, As and P;
- the vertical cavity structure is composed of at least an active layer, an upper DBR layer, and a lower DBR layer, the upper DBR layer and the lower DBR layer are formed with the active layer therebetween;
- a surface-emitting laser is provided, wherein the lower DBR layer comprises at least one transparent conductive layer comprising a transparent conductive material comprising a non-III-V semiconductor.
- the transparent conductive layer may be transparent to the emission wavelength, and the transparent conductive layer may transmit light having a predetermined emission wavelength or light having a predetermined emission wavelength band.
- the transparent conductive layer may have a thickness of ⁇ /4n (where ⁇ is the emission wavelength and n is the refractive index of the transparent conductive material),
- the transparent conductive material may be ITiO, ITO, ZnO, AZO or IGZO.
- the lower DBR layer may further include a metal layer and a dielectric layer in this order from the substrate side.
- the lower DBR layer may further include a metal layer and a dielectric layer in this order from the substrate side,
- the dielectric layer may be formed by alternately laminating a first dielectric layer and a second dielectric layer, the first dielectric layer may be composed of a first dielectric material; the second dielectric layer may be composed of a second dielectric material; the first dielectric layer may have a thickness of ⁇ /4n1, where ⁇ is the emission wavelength and n1 is the refractive index of the first dielectric material; The second dielectric layer may have a thickness of ⁇ /4n2, where ⁇ is the emission wavelength and n2 is the refractive index of the second dielectric material.
- the lower DBR layer may further comprise a semiconductor epi layer (epitaxially grown layer).
- An oxidized confinement structure may be formed in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a current confinement structure may be formed by a tunnel junction in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a current confinement structure may be formed by ion implantation in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a light confinement structure may be formed under the substrate,
- the light confinement structure may comprise a concave mirror.
- An oxidation confinement structure, a current confinement structure by tunnel junction, or a current confinement structure by ion implantation is formed in a region between the active layer and the lower DBR layer and outside the region below the upper DBR layer. good too.
- the active layer may comprise a III-V semiconductor.
- the lower DBR layer may comprise a dielectric layer;
- the upper DBR layer may include a dielectric layer and a metal layer in this order from the substrate side.
- the vertical cavity structure may have a plurality of the upper DBR layers, The plurality of DBR layers may be formed in an array.
- the substrate may be a Si circuit substrate,
- the surface emitting lasers of the first side according to the present technology may be driven independently.
- the vertical cavity structure comprises at least one element selected from the group consisting of In, Ga, Al, N, As and P; Further, the vertical cavity structure comprises at least an active layer, an upper DBR layer, a lower DBR layer, an upper electrode, and a lower electrode, the upper DBR layer and the lower DBR layer are formed with the active layer therebetween; the upper electrode and the lower electrode are formed with the active layer therebetween; the lower DBR layer comprises at least one transparent conductive layer comprising a transparent conductive material comprising a non-III-V semiconductor; the transparent conductive layer has a contact region with which the lower electrode contacts; Provided is a surface-emitting laser that is an intracavity structure.
- the transparent conductive layer may be transparent to the emission wavelength, and the transparent conductive layer may transmit light having a predetermined emission wavelength or light having a predetermined emission wavelength band.
- the transparent conductive layer may have a thickness of ⁇ /4n (where ⁇ is the emission wavelength and n is the refractive index of the transparent conductive material),
- the transparent conductive material may be ITiO, ITO, ZnO, AZO or IGZO.
- the lower DBR layer may further include a metal layer and a dielectric layer in this order from the substrate side.
- the lower DBR layer may further include a metal layer and a dielectric layer in this order from the substrate side,
- the dielectric layer may be formed by alternately laminating a first dielectric layer and a second dielectric layer, the first dielectric layer may be composed of a first dielectric material; the second dielectric layer may be composed of a second dielectric material; the first dielectric layer may have a thickness of ⁇ /4n1, where ⁇ is the emission wavelength and n1 is the refractive index of the first dielectric material; The second dielectric layer may have a thickness of ⁇ /4n2, where ⁇ is the emission wavelength and n2 is the refractive index of the second dielectric material.
- the lower DBR layer may further comprise a semiconductor epi layer (epitaxially grown layer).
- An oxidized confinement structure may be formed in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a current confinement structure may be formed by a tunnel junction in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a current confinement structure may be formed by ion implantation in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a light confinement structure may be formed under the substrate,
- the light confinement structure may comprise a concave mirror.
- An oxidation confinement structure, a current confinement structure by tunnel junction, or a current confinement structure by ion implantation is formed in a region between the active layer and the lower DBR layer and outside the region below the upper DBR layer. good too.
- the active layer may comprise a III-V semiconductor.
- the lower DBR layer may comprise a dielectric layer;
- the upper DBR layer may include a dielectric layer and a metal layer in this order from the substrate side.
- the vertical cavity structure may have a plurality of the upper DBR layers, The plurality of DBR layers may be formed in an array.
- the substrate may be a Si circuit substrate,
- the second side surface emitting laser according to the present technology may be driven independently.
- the present technology is forming a first substrate provided with an active layer; forming on the first substrate a lower DBR layer composed of at least a transparent conductive layer containing a transparent conductive material that transmits light having a specific wavelength and a dielectric layer containing a dielectric material; bonding a second substrate to the lower DBR layer; removing the first substrate to form a constriction structure, an electrode structure, and an upper DBR layer comprising at least a dielectric layer containing a dielectric material; offer.
- FIG. 1 is a diagram showing a configuration example of a surface emitting laser according to a first embodiment to which the present technology is applied.
- FIG. 2 is a diagram showing a configuration example of a surface emitting laser according to a second embodiment to which the present technology is applied.
- FIG. 3 is a diagram showing a configuration example of a surface emitting laser according to a third embodiment to which the present technology is applied.
- FIG. 4 is a diagram showing a configuration example of a surface emitting laser according to a fourth embodiment to which the present technology is applied.
- FIG. 5 is a diagram showing a configuration example of a surface emitting laser according to a fifth embodiment to which the present technology is applied.
- FIG. 1 is a diagram showing a configuration example of a surface emitting laser according to a first embodiment to which the present technology is applied.
- FIG. 2 is a diagram showing a configuration example of a surface emitting laser according to a second embodiment to which the present technology is applied.
- FIG. 3 is a diagram showing
- FIG. 6 is a diagram showing a configuration example of a surface emitting laser according to a sixth embodiment to which the present technology is applied.
- FIG. 7 is a diagram showing a configuration example of a surface emitting laser according to a seventh embodiment to which the present technology is applied.
- FIG. 8 is a diagram showing a configuration example of a surface emitting laser according to an eighth embodiment to which the present technology is applied.
- FIG. 9 is a diagram showing a configuration example of a surface emitting laser according to a ninth embodiment to which the present technology is applied.
- FIG. 10 is a diagram showing a configuration example of a surface emitting laser according to a tenth embodiment to which the present technology is applied.
- FIG. 10 is a diagram showing a configuration example of a surface emitting laser according to a tenth embodiment to which the present technology is applied.
- FIG. 11 is a diagram showing a configuration example of a surface emitting laser according to an eleventh embodiment to which the present technology is applied.
- FIG. 12 is a diagram for explaining a method of manufacturing a surface emitting laser according to a twelfth embodiment to which the present technology is applied.
- FIG. 13 is a diagram for explaining a method of manufacturing a surface emitting laser according to a twelfth embodiment to which the present technology is applied.
- FIG. 14 is a diagram for explaining a method of manufacturing a surface emitting laser according to a twelfth embodiment to which the present technology is applied.
- FIG. 15 is a diagram for explaining a method of manufacturing a surface emitting laser according to a twelfth embodiment to which the present technology is applied.
- FIG. 12 is a diagram for explaining a method of manufacturing a surface emitting laser according to a twelfth embodiment to which the present technology is applied.
- FIG. 13 is a diagram for explaining a method of manufacturing a surface emitting
- FIG. 16 is a diagram for explaining a method of manufacturing a surface emitting laser according to a twelfth embodiment to which the present technology is applied.
- FIG. 17 is a diagram showing a configuration example of a surface-emitting laser manufactured according to the surface-emitting laser manufacturing method of the twelfth embodiment to which the present technology is applied.
- the present technology relates to a surface emitting laser and a method for manufacturing the surface emitting laser.
- InP-based VCSEL a structure of a semiconductor DBR formed on one side and a dielectric/metal DBR formed on the other side has been put into practical use.
- this structure light is emitted toward the semiconductor DBR, but current is applied vertically from the upper and lower electrodes, so absorption loss may occur due to doping of the semiconductor DBR, and efficiency (PCE) may decrease.
- the intracavity structure is considered to be the most suitable structure.
- the conventional intra-cavity structure has poor heat dissipation, causes absorption and diffraction loss, and requires high-precision etching down to the semiconductor contact layer below. I didn't.
- the technique is to form a conductive material containing a non-III-V semiconductor transparent to the wavelength of light on and/or part of a DBR mirror layer disposed between a substrate and an active layer. It is possible to realize a VCSEL having an intra-cavity structure, which has a lower diffraction loss than the conventional intra-cavity structure, excellent heat dissipation, and a high yield. In addition, since the present technology does not have a structure in which current flows through the bonding interface, it contributes to an improvement in reliability.
- this technology reduces the diffraction loss because the thickness of the contact layer is thin (the cavity length is shortened).
- this technology has better heat conduction than InP-based epi-DBR, so heat dissipation is improved and it can contribute to higher output.
- the ITiO, etc. used in this technology does not absorb free carriers in the eye-safe wavelength band and is compatible with other materials used in DBRs (small wavelength dispersion), so it is possible to increase the degree of freedom in designing DBR mirrors. .
- This technology can reduce the manufacturing cost because Si can be manufactured in a large diameter size. ⁇ This technology is highly compatible with Si photonics.
- This technology can be easily applied to TOF modules and packages. ⁇ In combination with a circuit board, this technology can independently drive the array light-emitting elements. ⁇ In this technology, reliability can be improved because of the intra-cavity structure in which current does not flow at the bonding interface.
- FIG. 1 is a diagram showing a configuration example of a surface-emitting laser according to a first embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 101.
- FIG. 1 is a diagram showing a configuration example of a surface-emitting laser according to a first embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 101.
- the surface-emitting laser 101 includes a substrate 58 and a vertical cavity structure formed on the substrate 58.
- the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As and P. Furthermore, the vertical cavity structure includes at least an active layer 53 in which a quantum well layer 53-1 is formed, an upper DBR layer 45, a lower DBR layer, an upper electrode 40, and a lower and an electrode 40-1.
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- the ITiO layer 55 constituting the surface emitting laser 101 may alternatively be, for example, an ITO layer, a ZnO layer, an AZO layer, an IGZO layer, or the like. This alternative can also be applied to surface emitting lasers 102-111 and 117, which will be described later.
- the upper DBR layer 45 and the lower DBR layer are formed with the active layer 53 therebetween, and the upper electrode 40 and the lower electrode 40-1 are formed with the active layer therebetween (opening (via K2).
- the ITiO layer 55 has a contact region with which the lower electrode 40-1 contacts.
- an ITiO layer 55 made of a transparent conductive material (ITiO) is formed on the hybrid mirror 567 arranged between the substrate (Si substrate) 58 and the active layer 53 .
- the ITiO layer 55 constitutes one layer of the lower DBR layer and serves as a contact layer with which the lower electrode 40-1 is in contact. By forming the ITiO layer 55, it is possible to make both an electrode and a lower DBR layer compatible.
- the surface emitting laser 101 According to the surface emitting laser 101, diffraction loss is reduced and heat dissipation is improved as compared with the conventional technology.
- transparent conductive materials other than ITiO include ITO, ZnO, AZO, and IGZO.
- the substrate include SiC, GaAs, etc., in addition to the Si substrate.
- Second Embodiment (Example 2 of Surface Emitting Laser)> A surface-emitting laser according to a second embodiment (example 2 of surface-emitting laser) according to the present technology will be described with reference to FIG.
- FIG. 2 is a diagram showing a configuration example of a surface-emitting laser according to a second embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 102. As shown in FIG.
- the surface-emitting laser 102 includes a substrate 58 and a vertical cavity structure formed on the substrate 58, wherein the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As, and P. and one element, and the vertical cavity structure is composed of at least the active layer 53, the upper DBR layer 45, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1.
- the lower DBR layer is composed of a GaAs epitaxial DBR mirror 56-20 and an ITiO layer 55 in order from the substrate 58 side.
- the GaAs epi-DBR mirror 56-20 is used instead of the hybrid mirror 567 constituting the surface emitting laser 101 shown in FIG. 1, as described above.
- Forming a GaAs epitaxial DBR mirror also has the effect of further improving heat dissipation.
- a GaAs epi DBR consist of AlAs, AlGaAs, GaAs.
- the InP epi DBR consists of InP, AlGaInAs, and AlInAs.
- the wafers are bonded with the transparent conductive material ITiO.
- the above description of the surface-emitting laser of the second embodiment (surface-emitting laser example 2) according to the present technology is the same as that of the above-described first embodiment of the present technology, unless there is a particular technical contradiction.
- the present invention can be applied to surface emitting lasers, surface emitting lasers according to third to eleventh embodiments according to the present technology, which will be described later, and a surface emitting laser manufacturing method according to a twelfth embodiment, which will be described later.
- FIG. 3 is a diagram showing a configuration example of a surface-emitting laser according to a third embodiment of the present technology, specifically a cross-sectional view showing a surface-emitting laser 103.
- FIG. 3 is a diagram showing a configuration example of a surface-emitting laser according to a third embodiment of the present technology, specifically a cross-sectional view showing a surface-emitting laser 103.
- the surface-emitting laser 103 includes a substrate 58 and a vertical cavity structure formed on the substrate 58.
- the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As, and P. and one element, and the vertical cavity structure is composed of at least the active layer 53, the upper DBR layer 45, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1.
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- the surface emitting laser 103 shown in FIG. 3 has a TJ (tunnel junction) embedded structure 52-3 in the upper clad layer 52 as a narrowing method.
- a TJ (tunnel junction) is composed of AlGaInAs, AlInAs, InGaAs, InP, InGaAsP, or the like. The implant is regrown with InP.
- FIG. 4 is a diagram showing a configuration example of a surface-emitting laser according to a fourth embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 104. As shown in FIG.
- the surface emitting laser 104 includes a substrate 58-4 and a vertical cavity structure formed on the substrate 58-4, where the vertical cavity structure is a group consisting of In, Ga, Al, N, As and P. and at least one element selected from, and the vertical resonator structure comprises at least the active layer 53, the upper DBR layer 45, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1. It is configured.
- the lower DBR layer is composed of the ITiO layer 55 .
- a concave lens mirror 567-40 is formed below the substrate 58-4 as a constriction method.
- the concave lens mirror 567-40 may be formed of a material such as a resin or an oxide film other than the lens processing on the substrate 58-4.
- FIG. 5 is a diagram showing a configuration example of a surface-emitting laser according to a fifth embodiment of the present technology, specifically a cross-sectional view showing a surface-emitting laser 105. As shown in FIG.
- the surface-emitting laser 105 includes a substrate 58 and a vertical cavity structure formed on the substrate 58.
- the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As and P. and one element, and the vertical cavity structure is composed of at least the active layer 53, the upper DBR layer 45, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1.
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- the surface emitting laser 105 shown in FIG. 5 has an oxidized constriction structure 52-5 in the upper clad layer 52 as a confinement method.
- the oxidized constricting structure (oxidized constricting layer) is made of InAlAs or the like. Specifically, an InAlAs layer is formed in the central portion of the oxidized constricting structure, and InAlAsOx layers are formed at both ends of the oxidized constricting structure. Examples of the forming method include a steam oxidation method. With this oxidized confinement structure, a current flows only through the InAlAs layer.
- the above description of the surface emitting laser of the fifth embodiment (example 5 of the surface emitting laser) according to the present technology is the same as the above-described first to fourth aspects of the present technology. It can be applied to surface emitting lasers of embodiments, surface emitting lasers of sixth to eleventh embodiments according to the present technology to be described later, and a surface emitting laser manufacturing method of a twelfth embodiment to be described later.
- FIG. 6 is a diagram showing a configuration example of a surface-emitting laser according to a sixth embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 106. As shown in FIG.
- the surface emitting laser 106 includes a substrate 58 and a vertical cavity structure formed on the substrate 58, wherein the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As and P. and one element, and the vertical cavity structure is composed of at least the active layer 53, the upper DBR layer 45, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1. .
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- the surface-emitting laser 106 shown in FIG. 6 has an air gap structure 52-6 in the upper clad layer 52 as a narrowing method.
- the Air gap structure 52-6 is formed by side-etching InAlAs by wet etching. Specifically, an InAlAs layer is formed at the center of the air gap structure 52-6, and air is formed at both ends of the air gap structure 52-6. With this Air gap structure, a current flows only through the InAlAs layer, and a refractive index difference .DELTA.n between the InAlAs and the Air adds a lateral optical confinement function.
- the above description of the surface-emitting laser of the sixth embodiment (example 6 of the surface-emitting laser) according to the present technology is the same as the above-described first to fifth embodiments of the present technology.
- the present invention can be applied to surface emitting lasers of embodiments, surface emitting lasers of seventh to eleventh embodiments according to the present technology to be described later, and a surface emitting laser manufacturing method of a twelfth embodiment to be described later.
- FIG. 7 is a diagram showing a configuration example of a surface-emitting laser according to a seventh embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 107. As shown in FIG.
- the surface-emitting laser 107 includes a substrate 58 and a vertical cavity structure formed on the substrate 58.
- the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As, and P. and one element, and the vertical cavity structure is composed of at least the active layer 53, the upper DBR layer 45, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1.
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- narrow structures 540-1 to 540-2 and a tunnel junction layer 54-7-3 are formed in the lower clad layer 54-7 (below the active layer 53).
- the constriction method is not particularly limited, and may be implantation, oxidation constriction, air gap, embedding, or the like.
- the above description of the surface emitting laser of the seventh embodiment (example 7 of the surface emitting laser) according to the present technology is the same as the first to sixth embodiments according to the present technology described above, unless there is a particular technical contradiction.
- the present invention can be applied to surface emitting lasers of embodiments, surface emitting lasers of eighth to eleventh embodiments according to the present technology to be described later, and a surface emitting laser manufacturing method of a twelfth embodiment to be described later.
- FIG. 8 is a diagram showing a configuration example of a surface-emitting laser according to an eighth embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 108. As shown in FIG.
- the surface emitting laser 108 includes a substrate 58 and a vertical cavity structure formed on the substrate 58, wherein the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As and P. and one element, and the vertical cavity structure is composed of at least the active layer 53, the upper DBR layer 45, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1. .
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- GaAs-based materials used for the active layer 53-8 include InAsQDs, GaInNAs, InGaAs, AlGaInAs, and InGaAsP.
- FIG. 9 is a diagram showing a configuration example of a surface emitting laser according to a ninth embodiment according to the present technology, specifically a cross-sectional view showing a surface emitting laser 109. As shown in FIG.
- the surface-emitting laser 109 includes a substrate 58 and a vertical cavity structure formed on the substrate 58.
- the vertical cavity structure is at least selected from the group consisting of In, Ga, Al, N, As, and P.
- the vertical resonator structure is composed of at least the active layer 53, the upper DBR layer 45-9, the lower DBR layer, the upper electrode 40, and the lower electrode 40-1. ing.
- the lower DBR layer is composed of a dielectric layer 56 and an ITiO layer 55 in order from the substrate 58 side.
- the upper DBR layer 45-9 consists of a SiO 2 layer 45-2, a TiO 2 layer 45-1, a SiO 2 layer 45-2, and a TiO 2 layer 45-1 in this order from the substrate 58 side (upper cladding layer 52). are stacked in this order, and a metal layer 40-9 (made of the same material as the upper electrode 40) is further stacked on the TiO 2 layer 45-1.
- the surface-emitting laser 109 shown in FIG. 9 has a substrate (for example, Si It is emitted from the substrate) 58 side.
- a substrate (layer) made of GaAs (including epi-DBR) or the like may also be used.
- the above description of the surface-emitting laser of the ninth embodiment (example 9 of the surface-emitting laser) according to the present technology is the first to eighth according to the above-described present technology, unless there is a particular technical contradiction.
- the present invention can be applied to surface emitting lasers of embodiments, surface emitting lasers of tenth to eleventh embodiments according to the present technology described later, and a surface emitting laser manufacturing method of a twelfth embodiment described later.
- Example 10 of Surface Emitting Laser A surface-emitting laser according to a tenth embodiment (example 10 of surface-emitting laser) according to the present technology will be described with reference to FIG.
- FIG. 10 is a diagram showing a configuration example of a surface-emitting laser according to a tenth embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 110. As shown in FIG.
- the surface emitting laser 110 includes a substrate 58 and a vertical cavity structure formed on the substrate 58, the vertical cavity structure being at least selected from the group consisting of In, Ga, Al, N, As and P. and the vertical cavity structure includes at least an active layer 53, three upper DBR layers 45-10-1 to 45-10-3, a lower DBR layer, and an upper electrode 40. , and a lower electrode 40-1.
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- Current confinement structures 520-1, 520-2, 520-3 and 520-4 are formed in regions outside the regions below the upper DBR layers 45-10-1 to 45-10-3.
- each of the three (plurality of) upper DBR layers is formed in an array as a surface-emitting laser element.
- a concave lens mirror may be formed in the surface emitting laser 110 as a constriction method, or other constriction methods (eg, implantation, oxidation constriction, air gap, embedding, etc.) may be used.
- the above description of the surface-emitting laser of the tenth embodiment (example 10 of the surface-emitting laser) according to the present technology is the same as the above-described first to ninth aspects of the present technology.
- the present invention can be applied to a surface emitting laser of an embodiment, a surface emitting laser of an eleventh embodiment according to the present technology, which will be described later, and a method of manufacturing a surface emitting laser of a twelfth embodiment, which will be described later.
- FIG. 11 is a diagram showing a configuration example of a surface-emitting laser according to an eleventh embodiment of the present technology, and more specifically, a cross-sectional view showing a surface-emitting laser 111. As shown in FIG.
- the surface emitting laser 111 includes a Si circuit substrate 58-11 and a vertical cavity structure formed on the Si circuit substrate 58-11. and at least one element selected from the group consisting of P, and the vertical cavity structure includes at least the active layer 53, the three upper DBR layers 45-11-1 to 45-11-3, and the lower It is composed of a DBR layer, an upper electrode 40 and a lower electrode 40-1.
- the lower DBR layer is composed of a hybrid mirror 567 and an ITiO layer 55 in order from the substrate 58 side.
- Current confinement structures 520-1, 520-2, 520-3 and 520-4 are formed in regions outside the regions below the upper DBR layers 45-11-1 to 45-11-3. In the above description, the number of upper DBR layers is three (45-11-1 to 45-11-3), but the number is not limited to this.
- the surface-emitting laser 111 shown in FIG. 11 is a module-type VCSEL having a Si circuit board 58-11. It is a TOF (Time of Flight) module with an avalanche photodiode
- the surface emitting laser 111 is an independently driven VCSEL and can be applied to the technical field of silicon photonics.
- Twelfth Embodiment (Example 1 of Manufacturing Method of Surface Emitting Laser)> A method for manufacturing a surface-emitting laser according to a twelfth embodiment (example 1 of a method for manufacturing a surface-emitting laser) according to the present technology will be described with reference to FIGS. 12 to 17.
- FIG. 12 Example 1 of Manufacturing Method of Surface Emitting Laser
- FIG. 12 to 16 are diagrams for explaining a method for manufacturing a surface emitting laser according to the twelfth embodiment of the present technology.
- FIG. 17 is a diagram showing a configuration example of a surface-emitting laser manufactured according to the surface-emitting laser manufacturing method of the twelfth embodiment according to the present technology. Specifically, FIG. be.
- an active layer 53, a tunnel junction layer 52-1, and two clad layers are epitaxially formed on an InP substrate 50.
- the active layer may include InGaAsP, AlGaInAs, InAs QDs, or the like.
- an etching stop layer 51 (for example, a layer containing InGaAsP) is formed to separate the InP substrate 50 .
- an ITiO layer 55 which is a transparent conductive film, is formed on the epitaxial outermost layer (cladding layer 54) by sputtering.
- the film thickness of the ITiO layer 55 may be, for example, ⁇ /4n.
- a hybrid mirror 567 is formed on the ITiO 55 as shown in FIG. 13A.
- the hybrid mirror 567 includes, in order from the ITiO layer 55 side, a TiO 2 layer 56-1, a SiO 2 layer 56-2, a TiO 2 layer 56-1, a SiO 2 layer 56-2 (that is, the dielectric layer 56), and a metal layer (Au layer) 57 .
- the ITiO layer 55 is the first layer of the lower DBR layer (lower DBR mirror).
- the dielectric material may be a-Si or Ta 2 O 5
- the metal may be Ag or a laminated film of Ag/Au.
- each of TiO 2 layers and SiO 2 layers is two layers, but without being limited to this, each of TiO 2 layers and SiO 2 layers may be three or more layers, for example.
- the support substrate 58 eg, Si substrate
- the bonding method may be Au eutectic bonding or normal temperature plasma bonding.
- the InP substrate 50 is ground with a back grinder and the etching stop layer 51 is removed by wet etching.
- a mixed chemical containing at least two selected from the group consisting of HCl, H3PO4 , H2SO4 , H2O2 and H2O is used. Then, it is turned over in the direction of arrow P14A so that the support substrate 58 (for example, Si substrate) faces downward.
- ion implantation is performed with a resist pattern by photolithography, for example.
- H, O, B, or the like may be implanted.
- the semiconductor layer is etched down to the ITiO layer 55 by a C12-based dry etcher to form two openings K1 and K2.
- a mixed gas of at least two kinds selected from the group consisting of Cl 2 , BCl 3 , SiCl 4 , Ar and O 2 is used.
- a SiN film 41 is formed by, for example, a CVD method to form a protective film.
- a SiO 2 film may be used instead of the SiN film 41 .
- the protective film is opened with a dry etcher (upper part R1 of mesa 80 and bottom part R2 of opening K2) with a resist pattern by photolithography, for example.
- CF 4 is used.
- metal is vapor-deposited with a resist pattern by photolithography, for example, to form an upper electrode 40 and a lower electrode 40-1.
- the upper electrode 40 and the lower electrode 40-1 are composed of Ti/Pt/Au.
- the upper electrode 40 and the lower electrode 40-1 may be composed of AuGe/Ni/Au.
- an upper DBR layer 45 made of a dielectric material is formed on top of the mesa 80 . Lift-off using a resist pattern may be used, or the upper DBR layer 45 may be opened to leave only the upper portion of the mesa 80 .
- the upper DBR layer 45 consists of a SiO 2 layer 45-2, a TiO 2 layer 45-1, an SiO 2 layer 45-2, and a TiO 2 layer 45-1 from the substrate 58 side (upper cladding layer 52 side). They are stacked in order.
- the number of pairs of SiO 2 layer/TiO 2 layer is preferably at least two.
- each of the SiO 2 layer and the TiO 2 layer is ⁇ /4n ( ⁇ represents the emission (oscillation) wavelength of the surface emitting laser, and n represents the refractive index of SiO 2 or TiO 2 ).
- the upper DBR layer may be composed of a-Si and/or Ta 2 O 5 .
- an intracavity surface emitting laser (VCSEL) 117 in which a transparent conductive film (ITiO layer 55) is arranged between the substrate 58 and the active layer 53 is completed.
- the above description of the surface-emitting laser element array of the twelfth embodiment (example 1 of the method for manufacturing a surface-emitting laser) according to the present technology is It can be applied to the surface emitting lasers of the first to eleventh embodiments.
- this technique can also take the following structures.
- [1] comprising a substrate and a vertical cavity structure formed on the substrate; the vertical cavity structure comprises at least one element selected from the group consisting of In, Ga, Al, N, As and P; Further, the vertical cavity structure is composed of at least an active layer, an upper DBR layer, and a lower DBR layer, the upper DBR layer and the lower DBR layer are formed with the active layer therebetween; A surface-emitting laser, wherein the lower DBR layer comprises at least one transparent conductive layer comprising a transparent conductive material comprising a non-III-V semiconductor. [2] The surface emitting laser according to [1], wherein the transparent conductive layer is transparent to the emission wavelength.
- the transparent conductive layer has a thickness of ⁇ /4n (where ⁇ is the emission wavelength and n is the refractive index of the transparent conductive material),
- the lower DBR layer further includes a metal layer and a dielectric layer in this order from the substrate side; the dielectric layer is formed by alternately stacking a first dielectric layer and a second dielectric layer; the first dielectric layer is composed of a first dielectric material; the second dielectric layer is composed of a second dielectric material; the first dielectric layer has a thickness of ⁇ /4n1, where ⁇ is the emission wavelength and n1 is the refractive index of the first dielectric material; Any of [1] to [3], wherein the second dielectric layer has a thickness of ⁇ /4n2, where ⁇ is the emission wavelength and n2 is the refractive index of the second dielectric material. 1.
- a current confinement structure is formed by ion implantation in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a surface-emitting laser according to claim 1. [10] a light confinement structure is formed under the substrate; The surface emitting laser according to any one of [1] to [9], wherein the light confinement structure comprises a concave mirror.
- An oxidation confinement structure, a current confinement structure by tunnel junction, or a current confinement structure by ion implantation is formed in a region between the active layer and the lower DBR layer and outside the region below the upper DBR layer.
- the surface emitting laser according to any one of [1] to [10].
- the lower DBR layer comprises a dielectric layer; The surface emitting laser according to any one of [1] to [3] and [7] to [12], wherein the upper DBR layer includes a dielectric layer and a metal layer in this order from the substrate side.
- the vertical cavity structure has a plurality of the upper DBR layers, The surface emitting laser according to any one of [1] to [13], wherein the plurality of DBR layers are arranged in an array.
- the substrate is a Si circuit substrate, The surface-emitting laser according to any one of [1] to [14], which is independently driven.
- the vertical cavity structure comprises at least one element selected from the group consisting of In, Ga, Al, N, As and P; Further, the vertical cavity structure comprises at least an active layer, an upper DBR layer, a lower DBR layer, an upper electrode, and a lower electrode, the upper DBR layer and the lower DBR layer are formed with the active layer therebetween; the upper electrode and the lower electrode are formed with the active layer therebetween; the lower DBR layer comprises at least one transparent conductive layer comprising a transparent conductive material comprising a non-III-V semiconductor; the transparent conductive layer has a contact region with which the lower electrode contacts; A surface emitting laser with an intracavity structure.
- the transparent conductive layer has a thickness of ⁇ /4n (where ⁇ is the emission wavelength and n is the refractive index of the transparent conductive material),
- the lower DBR layer further includes a metal layer and a dielectric layer in this order from the substrate side.
- the lower DBR layer further includes a metal layer and a dielectric layer in this order from the substrate side; the dielectric layer is formed by alternately stacking a first dielectric layer and a second dielectric layer; the first dielectric layer is composed of a first dielectric material; the second dielectric layer is composed of a second dielectric material; the first dielectric layer has a thickness of ⁇ /4n1, where ⁇ is the emission wavelength and n1 is the refractive index of the first dielectric material; Any of [16] to [18], wherein the second dielectric layer has a thickness of ⁇ /4n2, where ⁇ is the emission wavelength and n2 is the refractive index of the second dielectric material. 1.
- a current confinement structure is formed by ion implantation in a region between the upper DBR layer and the active layer and outside the region below the upper DBR layer.
- a surface-emitting laser according to claim 1. [25] a light confinement structure is formed under the substrate; The surface emitting laser of any one of [16] to [24], wherein the light confining structure comprises a concave mirror.
- An oxidation confinement structure, a current confinement structure by tunnel junction, or a current confinement structure by ion implantation is formed in a region between the active layer and the lower DBR layer and outside the region below the upper DBR layer.
- the surface emitting laser according to any one of [16] to [25].
- the lower DBR layer comprises a dielectric layer; The surface emitting laser according to any one of [16] to [18] and [22] to [27], wherein the upper DBR layer includes a dielectric layer and a metal layer in this order from the substrate side.
- the vertical cavity structure has a plurality of the upper DBR layers, The surface emitting laser according to any one of [16] to [28], wherein the plurality of DBR layers are arranged in an array.
- the substrate is a Si circuit substrate, The surface emitting laser according to any one of [16] to [29], driven independently.
- [31] forming a first substrate provided with an active layer; forming on the first substrate a lower DBR layer composed of at least a transparent conductive layer containing a transparent conductive material that transmits light having a specific wavelength and a dielectric layer containing a dielectric material; bonding a second substrate to the lower DBR layer; A method of fabricating a surface emitting laser, comprising removing the first substrate to form a constriction structure, an electrode structure, and an upper DBR layer comprising at least a dielectric layer containing a dielectric material.
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Abstract
Description
基板と、該基板上に形成された垂直共振器構造と、を備え、
該垂直共振器構造が、In、Ga、Al、N、As及びPからなる群から選ばれる少なくとも1つの元素と、を含み、
さらに、該垂直共振器構造は、少なくとも、活性層と、上部DBR層と、下部DBR層とから構成され、
該上部DBR層と該下部DBR層とが、該活性層を間にして形成され、
該下部DBR層が、非III-V族半導体からなる透明導電材料を含む、少なくとも1つの透明導電層を含む、面発光レーザを提供する。
前記透明導電層が発光波長に対して透明でもよく、また、前記透明導電層が、所定の発光波長を有する光又は所定の発光波長帯域を有する光を透過してもよい。
前記透明導電層が、λ/4n(λは発光波長であり、nは前記透明導電材料の屈折率である。)の膜厚を有してもよく、
前記透明導電材料が、ITiO、ITO、ZnO、AZO又はIGZOであってもよい。
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含んでもよい。
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含んでもよく、
該誘電体層が、第1誘電体層と第2誘電体層とが交互に積層してなってもよく、
該第1誘電体層が第1誘電体材料から構成されてもよく、
該第2誘電体層が第2誘電体材料から構成されてもよく、
該第1誘電体層が、λ/4n1(λは発光波長であり、n1は該第1誘電体材料の屈折率である。)の膜厚を有してもよく、
該第2誘電体層が、λ/4n2(λは発光波長であり、n2は該第2誘電体材料の屈折率である。)の膜厚を有してもよい。
前記下部DBR層が半導体エピ層(エピタキシャル成長された層)を更に含んでもよい。
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造が形成されていてもよい。
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、トンネル接合による電流狭窄構造が形成されていてもよい。
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、イオン注入による電流狭窄構造が形成されていてもよい。
前記基板下に光狭窄構造が形成されていてもよく、
該光狭窄構造が凹面ミラーを備えていてもよい。
前記活性層と前記下部DBR層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造、トンネル接合による電流狭窄構造又はイオン注入による電流狭窄構造が形成されていてもよい。
前記活性層がIII-V族半導体を含んでもよい。
前記下部DBR層が誘電体層を含んでもよく、
前記上部DBR層が、前記基板側から誘電体層とメタル層とをこの順で含んでもよい。
前記垂直共振器構造が、前記上部DBR層を複数個で有していてもよく、
該複数個のDBR層がアレイ状に形成されていてもよい。
前記基板がSi回路基板であってもよく、
本技術に係る第1の側面の面発光レーザが、独立に駆動してもよい。
基板と、該基板上に形成された垂直共振器構造と、を備え、
該垂直共振器構造が、In、Ga、Al、N、As及びPからなる群から選ばれる少なくとも1つの元素と、を含み、
さらに、該垂直共振器構造は、少なくとも、活性層と、上部DBR層と、下部DBR層と、上部電極と、下部電極とから構成され、
該上部DBR層と該下部DBR層とが、該活性層を間にして形成され、
該上部電極と該下部電極とが、該活性層を間にして形成され、
該下部DBR層が、非III-V族半導体を含む透明導電材料を含む、少なくとも1つの透明導電層を含み、
該透明導電層が、該下部電極が接するコンタクト領域を有し、
イントラキャビティ構造である、面発光レーザを提供する。
前記透明導電層が発光波長に対して透明でもよく、また、前記透明導電層が、所定の発光波長を有する光又は所定の発光波長帯域を有する光を透過してもよい。
前記透明導電層が、λ/4n(λは発光波長であり、nは前記透明導電材料の屈折率である。)の膜厚を有していてもよく、
前記透明導電材料が、ITiO、ITO、ZnO、AZO又はIGZOであってもよい。
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含んでもよい。
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含んでもよく、
該誘電体層が、第1誘電体層と第2誘電体層とが交互に積層してなってもよく、
該第1誘電体層が第1誘電体材料から構成されてもよく、
該第2誘電体層が第2誘電体材料から構成されてもよく、
該第1誘電体層が、λ/4n1(λは発光波長であり、n1は該第1誘電体材料の屈折率である。)の膜厚を有してもよく、
該第2誘電体層が、λ/4n2(λは発光波長であり、n2は該第2誘電体材料の屈折率である。)の膜厚を有してもよい。
前記下部DBR層が半導体エピ層(エピタキシャル成長された層)を更に含んでもよい。
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造が形成されていてもよい。
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、トンネル接合による電流狭窄構造が形成されていてもよい。
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、イオン注入による電流狭窄構造が形成されていてもよい。
前記基板下に光狭窄構造が形成されていてもよく、
該光狭窄構造が凹面ミラーを備えていてもよい。
前記活性層と前記下部DBR層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造、トンネル接合による電流狭窄構造又はイオン注入による電流狭窄構造が形成されていてもよい。
前記活性層がIII-V族半導体を含んでもよい。
前記下部DBR層が誘電体層を含んでもよく、
前記上部DBR層が、前記基板側から誘電体層とメタル層とをこの順で含んでもよい。
前記垂直共振器構造が、前記上部DBR層を複数個で有していてもよく、
該複数個のDBR層がアレイ状に形成されていてもよい。
前記基板がSi回路基板であってもよく、
本技術に係る第2の側面の面発光レーザが独立に駆動してもよい。
活性層が設けられた第1基板を形成することと、
該第1基板上に、特定の波長を有する光を透過する透明導電材料を含む透明導電層と、誘電体材料を含む誘電体層とから少なくとも構成される下部DBR層を形成することと、
第2基板を該下部DBR層と接合することと、
該第1基板を除去して、狭窄構造と、電極構造と、誘電体材料を含む誘電体層から少なくとも構成される上部DBR層とを形成すること、とを含む、面発光レーザの製造方法を提供する。
1.本技術の概要
2.第1の実施形態(面発光レーザの例1)
3.第2の実施形態(面発光レーザの例2)
4.第3の実施形態(面発光レーザの例3)
5.第4の実施形態(面発光レーザの例4)
6.第5の実施形態(面発光レーザの例5)
7.第6の実施形態(面発光レーザの例6)
8.第7の実施形態(面発光レーザの例7)
9.第8の実施形態(面発光レーザの例8)
10.第9の実施形態(面発光レーザの例9)
11.第10の実施形態(面発光レーザの例10)
12.第11の実施形態(面発光レーザの例11)
13.第12の実施形態(面発光レーザの製造方法の例1)
まず、本技術の概要について説明をする。本技術は、面発光レーザ及び面発光レーザの製造方法に関するものである。
・本技術は、従来のイントラキャビティ構造と比較して、InP系エピDBRよりも熱伝導が良くなるため、放熱性が改善されて高出力化に寄与することができる。
・本技術が用いるITiO等は、アイセーフ波長帯でフリーキャリアの吸収がなく、DBRで使用する他材料との相性(波長分散が小さい)が良いので、DBRミラー設計の自由度を高めることができる。
・本技術では、Si等を大口径サイズで製造できるため、製造コストを低減することができる。
・本技術では、Siフォトニクスとの親和性が高い。
・本技術では、TOFモジュール、パッケージ等への応用展開が容易である。
・本技術では、回路基板と組み合わせれば、アレイ発光素子を独立駆動させることができる。
・本技術では、接合界面に電流が流れないイントラキャビティ構造のため、信頼性の向上を実現することができる。
本技術に係る第1の実施形態(面発光レーザの例1)の面発光レーザについて、図1を用いて説明する。
本技術に係る第2の実施形態(面発光レーザの例2)の面発光レーザについて、図2を用いて説明する。
本技術に係る第3の実施形態(面発光レーザの例3)の面発光レーザについて、図3を用いて説明する。
本技術に係る第4の実施形態(面発光レーザの例4)の面発光レーザについて、図4を用いて説明する。
本技術に係る第5の実施形態(面発光レーザの例5)の面発光レーザについて、図5を用いて説明する。
本技術に係る第6の実施形態(面発光レーザの例6)の面発光レーザについて、図6を用いて説明する。
本技術に係る第7の実施形態(面発光レーザの例7)の面発光レーザについて、図7を用いて説明する。
本技術に係る第8の実施形態(面発光レーザの例8)の面発光レーザについて、図8を用いて説明する。
本技術に係る第9の実施形態(面発光レーザの例9)の面発光レーザについて、図9を用いて説明する。
本技術に係る第10の実施形態(面発光レーザの例10)の面発光レーザについて、図10を用いて説明する。
本技術に係る第11の実施形態(面発光レーザの例11)の面発光レーザについて、図11を用いて説明する。
本技術に係る第12の実施形態(面発光レーザの製造方法の例1)の面発光レーザの製造方法について、図12~図17を用いて説明する。
[1]
基板と、該基板上に形成された垂直共振器構造と、を備え、
該垂直共振器構造が、In、Ga、Al、N、As及びPからなる群から選ばれる少なくとも1つの元素と、を含み、
さらに、該垂直共振器構造は、少なくとも、活性層と、上部DBR層と、下部DBR層とから構成され、
該上部DBR層と該下部DBR層とが、該活性層を間にして形成され、
該下部DBR層が、非III-V族半導体からなる透明導電材料を含む、少なくとも1つの透明導電層を含む、面発光レーザ。
[2]
前記透明導電層が発光波長に対して透明である、[1]に記載の面発光レーザ。
[3]
前記透明導電層が、λ/4n(λは発光波長であり、nは前記透明導電材料の屈折率である。)の膜厚を有し、
前記透明導電材料が、ITiO、ITO、ZnO、AZO又はIGZOである、[1]又は[2]に記載の面発光レーザ。
[4]
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含む、[1]から[3]のいずれか1つに記載の面発光レーザ。
[5]
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含み、
該誘電体層が、第1誘電体層と第2誘電体層とが交互に積層してなり、
該第1誘電体層が第1誘電体材料から構成され、
該第2誘電体層が第2誘電体材料から構成され、
該第1誘電体層が、λ/4n1(λは発光波長であり、n1は該第1誘電体材料の屈折率である。)の膜厚を有し、
該第2誘電体層が、λ/4n2(λは発光波長であり、n2は該第2誘電体材料の屈折率である。)の膜厚を有する、[1]から[3]のいずれか1つに記載の面発光レーザ。
[6]
前記下部DBR層が半導体エピ層を更に含む、[1]から[3]のいずれか1つに記載の面発光レーザ。
[7]
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造が形成されている、[1]から[6]のいずれか1つに記載の面発光レーザ。
[8]
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、トンネル接合による電流狭窄構造が形成されている、[1]から[7]のいずれか1つに記載の面発光レーザ。
[9]
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、イオン注入による電流狭窄構造が形成されている、[1]から[8]のいずれか1つに記載の面発光レーザ。
[10]
前記基板下に光狭窄構造が形成され、
該光狭窄構造が凹面ミラーを備える、[1]から[9]のいずれか1つに記載の面発光レーザ。
[11]
前記活性層と前記下部DBR層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造、トンネル接合による電流狭窄構造又はイオン注入による電流狭窄構造が形成されている、[1]から[10]のいずれか1つに記載の面発光レーザ。
[12]
前記活性層がIII-V族半導体を含む、[1]から[11]のいずれか1つに記載の面発光レーザ。
[13]
前記下部DBR層が誘電体層を含み、
前記上部DBR層が、前記基板側から誘電体層とメタル層とをこの順で含む、[1]から[3]及び[7]から[12]のいずれか1つに記載の面発光レーザ。
[14]
前記垂直共振器構造が、前記上部DBR層を複数個で有し、
該複数個のDBR層がアレイ状に形成されている、[1]から[13]のいずれか1つに記載の面発光レーザ。
[15]
前記基板がSi回路基板であり、
独立に駆動する、[1]から[14]のいずれか1つに記載の面発光レーザ。
基板と、該基板上に形成された垂直共振器構造と、を備え、
該垂直共振器構造が、In、Ga、Al、N、As及びPからなる群から選ばれる少なくとも1つの元素と、を含み、
さらに、該垂直共振器構造は、少なくとも、活性層と、上部DBR層と、下部DBR層と、上部電極と、下部電極とから構成され、
該上部DBR層と該下部DBR層とが、該活性層を間にして形成され、
該上部電極と該下部電極とが、該活性層を間にして形成され、
該下部DBR層が、非III-V族半導体を含む透明導電材料を含む、少なくとも1つの透明導電層を含み、
該透明導電層が、該下部電極が接するコンタクト領域を有し、
イントラキャビティ構造である、面発光レーザ。
[17]
前記透明導電層が発光波長に対して透明である、[16]に記載の面発光レーザ。
[18]
前記透明導電層が、λ/4n(λは発光波長であり、nは前記透明導電材料の屈折率である。)の膜厚を有し、
前記透明導電材料が、ITiO、ITO、ZnO、AZO又はIGZOである、[16]又は[17]に記載の面発光レーザ。
[19]
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含む、[16]から[18]のいずれか1つに記載の面発光レーザ。
[20]
前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含み、
該誘電体層が、第1誘電体層と第2誘電体層とが交互に積層してなり、
該第1誘電体層が第1誘電体材料から構成され、
該第2誘電体層が第2誘電体材料から構成され、
該第1誘電体層が、λ/4n1(λは発光波長であり、n1は該第1誘電体材料の屈折率である。)の膜厚を有し、
該第2誘電体層が、λ/4n2(λは発光波長であり、n2は該第2誘電体材料の屈折率である。)の膜厚を有する、[16]から[18]のいずれか1つに記載の面発光レーザ。
[21]
前記下部DBR層が半導体エピ層を更に含む、[16]から[18]のいずれか1つに記載の面発光レーザ。
[22]
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造が形成されている、[16]から[21]のいずれか1つに記載の面発光レーザ。
[23]
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、トンネル接合による電流狭窄構造が形成されている、[16]から[22]のいずれか1つに記載の面発光レーザ。
[24]
前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、イオン注入による電流狭窄構造が形成されている、[16]から[23]のいずれか1つに記載の面発光レーザ。
[25]
前記基板下に光狭窄構造が形成され、
該光狭窄構造が凹面ミラーを備える、[16]から[24]のいずれか1つに記載の面発光レーザ。
[26]
前記活性層と前記下部DBR層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造、トンネル接合による電流狭窄構造又はイオン注入による電流狭窄構造が形成されている、[16]から[25]のいずれか1つに記載の面発光レーザ。
[27]
前記活性層がIII-V族半導体を含む、[16]から[25]のいずれか1つに記載の面発光レーザ。
[28]
前記下部DBR層が誘電体層を含み、
前記上部DBR層が、前記基板側から誘電体層とメタル層とをこの順で含む、[16]から[18]及び[22]から[27]のいずれか1つに記載の面発光レーザ。
[29]
前記垂直共振器構造が、前記上部DBR層を複数個で有し、
該複数個のDBR層がアレイ状に形成されている、[16]から[28]のいずれか1つに記載の面発光レーザ。
[30]
前記基板がSi回路基板であり、
独立に駆動する、[16]から[29]のいずれか1つに記載の面発光レーザ。
活性層が設けられた第1基板を形成することと、
該第1基板上に、特定の波長を有する光を透過する透明導電材料を含む透明導電層と、誘電体材料を含む誘電体層とから少なくとも構成される下部DBR層を形成することと、
第2基板を該下部DBR層と接合することと、
該第1基板を除去して、狭窄構造と、電極構造と、誘電体材料を含む誘電体層から少なくとも構成される上部DBR層とを形成すること、とを含む、面発光レーザの製造方法。
52…上部クラッド層
53…活性層、
54…下部クラッド層、
55…透明導電層(ITiO層)、
56…誘電体層、
57…メタル層(Au層)、
58…基板、
101.102、103、104、105、106,107,108,109,110,111,117…面発光レーザ、
567…ハイブリッドミラー。
Claims (19)
- 基板と、該基板上に形成された垂直共振器構造と、を備え、
該垂直共振器構造が、In、Ga、Al、N、As及びPからなる群から選ばれる少なくとも1つの元素と、を含み、
さらに、該垂直共振器構造は、少なくとも、活性層と、上部DBR層と、下部DBR層とから構成され、
該上部DBR層と該下部DBR層とが、該活性層を間にして形成され、
該下部DBR層が、非III-V族半導体からなる透明導電材料を含む、少なくとも1つの透明導電層を含む、面発光レーザ。 - 前記透明導電層が発光波長に対して透明である、請求項1に記載の面発光レーザ。
- 前記透明導電層が、λ/4n(λは発光波長であり、nは前記透明導電材料の屈折率である。)の膜厚を有し、
前記透明導電材料が、ITiO、ITO、ZnO、AZO又はIGZOである、請求項1に記載の面発光レーザ。 - 前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含む、請求項1に記載の面発光レーザ。
- 前記下部DBR層が、前記基板側からメタル層と誘電体層とをこの順で更に含み、
該誘電体層が、第1誘電体層と第2誘電体層とが交互に積層してなり、
該第1誘電体層が第1誘電体材料から構成され、
該第2誘電体層が第2誘電体材料から構成され、
該第1誘電体層が、λ/4n1(λは発光波長であり、n1は該第1誘電体材料の屈折率である。)の膜厚を有し、
該第2誘電体層が、λ/4n2(λは発光波長であり、n2は該第2誘電体材料の屈折率である。)の膜厚を有する、請求項1に記載の面発光レーザ。 - 前記下部DBR層が半導体エピ層を更に含む、請求項1に記載の面発光レーザ。
- 前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造が形成されている、請求項1に記載の面発光レーザ。
- 前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、トンネル接合による電流狭窄構造が形成されている、請求項1に記載の面発光レーザ。
- 前記上部DBR層と前記活性層との間であり、前記上部DBR層の下部の領域外である領域に、イオン注入による電流狭窄構造が形成されている、請求項1に記載の面発光レーザ。
- 前記基板下に光狭窄構造が形成され、
該光狭窄構造が凹面ミラーを備える、請求項1に記載の面発光レーザ。 - 前記活性層と前記下部DBR層との間であり、前記上部DBR層の下部の領域外である領域に、酸化狭窄構造、トンネル接合による電流狭窄構造又はイオン注入による電流狭窄構造が形成されている、請求項1に記載の面発光レーザ。
- 前記活性層がIII-V族半導体を含む、請求項1に記載の面発光レーザ。
- 前記下部DBR層が誘電体層を含み、
前記上部DBR層が、前記基板側から誘電体層とメタル層とをこの順で含む、請求項1に記載の面発光レーザ。 - 前記垂直共振器構造が、前記上部DBR層を複数個で有し、
該複数個のDBR層がアレイ状に形成されている、請求項1に記載の面発光レーザ。 - 前記基板がSi回路基板であり、
独立に駆動する、請求項1に記載の面発光レーザ。 - 基板と、該基板上に形成された垂直共振器構造と、を備え、
該垂直共振器構造が、In、Ga、Al、N、As及びPからなる群から選ばれる少なくとも1つの元素と、を含み、
さらに、該垂直共振器構造は、少なくとも、活性層と、上部DBR層と、下部DBR層と、上部電極と、下部電極とから構成され、
該上部DBR層と該下部DBR層とが、該活性層を間にして形成され、
該上部電極と該下部電極とが、該活性層を間にして形成され、
該下部DBR層が、非III-V族半導体を含む透明導電材料を含む、少なくとも1つの透明導電層を含み、
該透明導電層が、該下部電極が接するコンタクト領域を有し、
イントラキャビティ構造である、面発光レーザ。 - 前記透明導電層が発光波長に対して透明である、請求項16に記載の面発光レーザ。
- 前記透明導電層が、λ/4n(λは発光波長であり、nは前記透明導電材料の屈折率である。)の膜厚を有し、
前記透明導電材料が、ITiO、ITO、ZnO、AZO又はIGZOである、請求項16に記載の面発光レーザ。 - 活性層が設けられた第1基板を形成することと、
該第1基板上に、特定の波長を有する光を透過する透明導電材料を含む透明導電層と、誘電体材料を含む誘電体層とから少なくとも構成される下部DBR層を形成することと、
第2基板を該下部DBR層と接合することと、
該第1基板を除去して、狭窄構造と、電極構造と、誘電体材料を含む誘電体層から少なくとも構成される上部DBR層とを形成すること、とを含む、面発光レーザの製造方法。
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