WO2022156466A1 - 通信电路及电子设备 - Google Patents

通信电路及电子设备 Download PDF

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Publication number
WO2022156466A1
WO2022156466A1 PCT/CN2021/140043 CN2021140043W WO2022156466A1 WO 2022156466 A1 WO2022156466 A1 WO 2022156466A1 CN 2021140043 W CN2021140043 W CN 2021140043W WO 2022156466 A1 WO2022156466 A1 WO 2022156466A1
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WIPO (PCT)
Prior art keywords
unit
mos transistor
resistor
power
coupled
Prior art date
Application number
PCT/CN2021/140043
Other languages
English (en)
French (fr)
Inventor
常鸣
范茂斌
李永耀
乐培玉
汪亮
万杰
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP21920840.2A priority Critical patent/EP4258123A4/en
Publication of WO2022156466A1 publication Critical patent/WO2022156466A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0266—Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a communication circuit and an electronic device.
  • the Serdes interface includes AC (alternating current, alternating current) coupling and DC (direct current, direct current) coupling in line implementation.
  • the AC coupling method requires a coupling capacitor to isolate the DC component between the sending chip and the receiving chip.
  • the sending module and the receiving module are usually turned off during the data transmission interval, and the Serdes interface enters the low power consumption mode.
  • the output of the sending module is low level.
  • the Serdes interface exits the low-power mode (that is, wakes up)
  • the output of the sending module can quickly settle to the expected working level.
  • the Serdes interface adopts the AC coupling mode, due to the existence of the coupling capacitor, the Serdes interface needs to charge the capacitor first when it wakes up, and the receiving module cannot quickly reach the expected working level. The module cannot receive data before reaching the expected working level, resulting in low data transmission efficiency.
  • the present application provides a communication circuit and electronic equipment to improve data transmission efficiency.
  • the present application provides a communication circuit, including a sending device, a communication line, and a receiving device, the sending device and the receiving device are connected through the communication line, and the communication line is used for the sending Data is transmitted between the device and the receiving device, a coupling capacitor is set on the communication line, and the sending device includes: a first power management unit and a first DC holding unit, the first power management unit and the The first DC holding unit is coupled, and the first DC holding unit is coupled to the first end of the communication line; the receiving device includes: a second power management unit and a second DC holding unit; the second power supply The management unit is coupled to the second DC holding unit, and the second DC holding unit is coupled to the second end of the communication line;
  • the first power management unit is configured to control the first DC holding unit to be powered on, and control the first DC holding unit to maintain the power-on state;
  • the first DC holding unit is configured to keep the DC voltage of the first end of the communication line at a first preset voltage
  • the second power management unit is configured to control the second DC holding unit to be powered on, and control the second DC holding unit to maintain the power-on state;
  • the second DC holding unit is used for maintaining the DC voltage at the second end of the communication line to be a second preset voltage.
  • the first DC holding unit keeps the DC voltage at the first end of the communication line at the first preset voltage
  • the second DC holding unit keeps the DC voltage at the second end of the communication line at the second preset voltage, so that the The DC voltage can be maintained at the first preset voltage and the second preset voltage respectively.
  • the coupling capacitor provided on the communication line includes a first capacitor and a second capacitor
  • the communication line includes a first signal line and a second signal line
  • the first signal line is provided with a the first capacitor
  • the second capacitor is provided on the second signal line
  • the first DC holding unit includes a first resistor, a second resistor, a third resistor, a fourth resistor and a second power supply
  • the first end of the first resistor is respectively coupled to the first end of the third resistor and the first end of the first signal line
  • the second end of the first resistor is coupled to the second power supply connected, the second end of the third resistor is grounded
  • the first end of the second resistor is respectively coupled to the first end of the fourth resistor and the first end of the second signal line
  • the The second end of the second resistor is coupled to the second power supply, and the second end of the fourth resistor is grounded
  • r1 is the resistance value of the first resistor
  • r2 is the resistance value of the second resistor
  • r3 is the resistance value of the third resistor
  • r4 is the resistance value of the fourth resistor
  • the second DC holding unit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and a third power supply, and the first end of the fifth resistor is respectively connected with the second end of the first signal line and the third power source.
  • the first end of the seventh resistor is coupled, the second end of the fifth resistor is coupled to the third power supply, the second end of the seventh resistor is grounded, and the first end of the sixth resistor are respectively coupled to the second end of the second signal line and the first end of the eighth resistor, the second end of the sixth resistor is coupled to the third power supply, and the first end of the eighth resistor Both ends are grounded;
  • r5 is the resistance value of the fifth resistor
  • r6 is the resistance value of the sixth resistor
  • r7 is the resistance value of the seventh resistor
  • r8 is the resistance value of the eighth resistor
  • the first end of the first signal line and the first end of the second signal line serve as the first end of the communication line, and the second end of the first signal line and the first end of the second signal line are used as the first end of the communication line.
  • the two ends serve as the second end of the communication line.
  • the coupling capacitor provided on the communication line includes a first capacitor and a second capacitor, the first capacitor is provided on the first signal line, and the second signal line is provided with a the second capacitor, the communication line includes a first signal line and a second signal line, the first DC holding unit includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor, The source of the first MOS transistor is respectively coupled to the drain of the third MOS transistor and the first end of the first signal line, and the drain of the first MOS transistor is coupled to the second power supply connected, the source of the third MOS transistor is grounded, the source of the second MOS transistor is respectively coupled to the drain of the fourth MOS transistor and the first end of the second signal line, the first The drain of the second MOS transistor is coupled to the second power supply, the source of the fourth MOS transistor is grounded, the gate of the first MOS transistor, the gate of the second MOS transistor, and the third MOS transistor The gate of the MOS transistor and the gate of the MOS transistor and the
  • r1' is the equivalent resistance between the source and the drain of the first MOS transistor
  • r2' is the equivalent resistance between the source and the drain of the second MOS transistor
  • r3' is the The equivalent resistance between the source and the drain of the third MOS transistor
  • r4' is the equivalent resistance between the source and the drain of the fourth MOS transistor
  • the second DC holding unit includes a fifth MOS transistor, a sixth MOS transistor, a seventh MOS transistor and an eighth MOS transistor, and the source of the fifth MOS transistor is respectively connected to the drain of the seventh MOS transistor and the The second end of the first signal line is coupled, the drain of the fifth MOS transistor is coupled to the third power supply, the source of the seventh MOS transistor is grounded, and the source of the sixth MOS transistor are respectively coupled to the drain of the eighth MOS transistor and the second end of the second signal line, the drain of the sixth MOS transistor is coupled to the third power supply, and the drain of the eighth MOS transistor The source is grounded, and the gate of the fifth MOS transistor, the gate of the sixth MOS transistor, the gate of the seventh MOS transistor and the gate of the eighth MOS transistor are all connected to the second power supply management unit coupling;
  • r5' is the equivalent resistance between the source and the drain of the fifth MOS transistor
  • r6' is the equivalent resistance between the source and the drain of the sixth MOS transistor
  • r7' is the The equivalent resistance between the source and the drain of the seventh MOS transistor
  • r8' is the equivalent resistance between the source and the drain of the eighth MOS transistor
  • the first end of the first signal line and the first end of the second signal line serve as the first end of the communication line, and the second end of the first signal line and the first end of the second signal line are used as the first end of the communication line.
  • the two ends serve as the second end of the communication line.
  • the sending device further includes: a first control module and a driving unit, the first control module is coupled to the first power management unit, and the driving unit is respectively connected to the first power management unit. a control module, the first power management unit and the first end of the communication line are coupled;
  • the first control module is further configured to receive a data transmission request, and transmit a third control signal to the first power management unit and transmit parallel data to the drive unit according to the data transmission request;
  • the first power management unit is further configured to control the drive unit to be powered on according to the third control signal
  • the driving unit is used for converting parallel data into serial data, and sending the serial data to the communication line;
  • the first control module is further configured to receive a stop sending request, and transmit a fifth control signal to the first power management unit according to the stop sending request;
  • the first power management unit is further configured to control the drive unit to power off according to the fifth control signal.
  • the first power management unit controls the drive unit to power off, so that the communication line can enter a low power consumption mode to save power consumption.
  • the receiving device further includes: a signal detecting unit and a receiving unit, the receiving unit is coupled to the second end of the communication line, and the signal detecting unit is coupled to the communication line Between the second end of the device and the receiving unit, the receiving unit and the signal detection unit are also coupled to the second power management unit;
  • the receiving unit is used for receiving serial data on the communication line, and converting the serial data into parallel data;
  • the second power management unit is further configured to control the signal detection unit to power on according to the second control signal
  • the signal detection unit is used to detect whether there is data transmission on the communication line, and when the signal detection unit detects that there is data transmission on the communication line, the signal detection unit transmits a fourth control signal to the first control signal.
  • the second power management unit controls the receiving unit to be powered on according to the fourth control signal, and controls the receiving unit to keep the power-on state;
  • the signal detection unit When the signal detection unit detects that there is no data transmission on the communication line, the signal detection unit transmits a sixth control signal to the second power management unit, and the second power management unit according to the sixth control The signal controls the power-off of the receiving unit.
  • the second power management unit controls the receiving unit to power off, so that the communication line can enter a low power consumption mode and save power consumption.
  • the present application further provides a communication circuit, including a sending device, a communication line, and a receiving device, the sending device and the receiving device are connected through the communication line, and the communication line is used for the sending Data is transmitted between the device and the receiving device, a coupling capacitor is set on the communication line, and the sending device includes: a first timing unit, a first power management unit and a first DC holding unit, the first power supply The management unit is respectively coupled to the first timing unit and the first DC holding unit, the first DC holding unit is coupled to the first end of the communication line; the receiving device includes: a second timing unit , a second power management unit and a second DC holding unit, the second power management unit is respectively coupled to the second timing unit and the second DC holding unit, and the second DC holding unit communicates with the the second end of the line is coupled;
  • the first timing unit is configured to generate a power-on time and a power-off time, and transmit the power-on time and the power-off time to the first power management unit;
  • the first power management unit is configured to control the first DC holding unit to be powered on during the power-on time, and the preset time after the power-on time is the data sending time;
  • the first power management unit is further configured to control the power-off of the first DC holding unit during the power-off time;
  • the first DC holding unit is configured to keep the DC voltage of the first end of the communication line at a first preset voltage
  • the second timing unit is configured to generate a power-on time and a power-off time, and transmit the power-on time and the power-off time to the second power management unit;
  • the second power management unit is configured to control the second DC holding unit to be powered on during the power-on time, and the preset time after the power-on time is the data sending time;
  • the second power management unit is further configured to control the power-off of the second DC holding unit during the power-off time;
  • the second DC holding unit is used for maintaining the DC voltage at the second end of the communication line to be a second preset voltage.
  • the first timing unit By setting the first timing unit and setting the second timing unit, the first timing unit generates the power-on time and the power-off time according to the data transmission period, and the second timing unit generates the power-on time and the power-off time according to the data transmission period.
  • the first power management unit controls the first DC holding unit to power on, and controls the first DC holding unit to maintain the power-on state
  • the second power management unit controls the second DC holding unit to power on, and controls The second DC holding unit remains powered on, so that when the first control module needs to send data, the DC voltage at the first end of the communication line can reach the first preset voltage, and the DC voltage at the second end of the communication line can reach the second
  • the preset voltage when the current time is the power-off time, the first power management unit controls the first DC holding unit to power off, and the second power management unit controls the second DC holding unit to power off, so that the power consumption of the communication circuit can be reduced .
  • the coupling capacitor provided on the communication line includes a first capacitor and a second capacitor
  • the communication line includes a first signal line and a second signal line
  • the first signal line is provided with a the first capacitor
  • the second capacitor is provided on the second signal line
  • the first DC holding unit includes a first resistor, a second resistor, a third resistor, a fourth resistor and a second power supply
  • the first end of the first resistor is respectively coupled to the first end of the third resistor and the first end of the first signal line
  • the second end of the first resistor is coupled to the second power supply connected, the second end of the third resistor is grounded
  • the first end of the second resistor is respectively coupled to the first end of the fourth resistor and the first end of the second signal line
  • the The second end of the second resistor is coupled to the second power supply, and the second end of the fourth resistor is grounded
  • r1 is the resistance value of the first resistor
  • r2 is the resistance value of the second resistor
  • r3 is the resistance value of the third resistor
  • r4 is the resistance value of the fourth resistor
  • the second DC holding unit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and a third power supply, and the first end of the fifth resistor is respectively connected with the second end of the first signal line and the third power source.
  • the first end of the seventh resistor is coupled, the second end of the fifth resistor is coupled to the third power supply, the second end of the seventh resistor is grounded, and the first end of the sixth resistor are respectively coupled to the second end of the second signal line and the first end of the eighth resistor, the second end of the sixth resistor is coupled to the third power supply, and the first end of the eighth resistor Both ends are grounded;
  • r5 is the resistance value of the fifth resistor
  • r6 is the resistance value of the sixth resistor
  • r7 is the resistance value of the seventh resistor
  • r8 is the resistance value of the eighth resistor
  • the first end of the first signal line and the first end of the second signal line serve as the first end of the communication line, and the second end of the first signal line and the first end of the second signal line are used as the first end of the communication line.
  • the two ends serve as the second end of the communication line.
  • the coupling capacitor provided on the communication line includes a first capacitor and a second capacitor, the first capacitor is provided on the first signal line, and the second signal line is provided with a the second capacitor, the communication line includes a first signal line and a second signal line, the first DC holding unit includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor, The source of the first MOS transistor is respectively coupled to the drain of the third MOS transistor and the first end of the first signal line, and the drain of the first MOS transistor is coupled to the second power supply connected, the source of the third MOS transistor is grounded, the source of the second MOS transistor is respectively coupled to the drain of the fourth MOS transistor and the first end of the second signal line, the first The drain of the second MOS transistor is coupled to the second power supply, the source of the fourth MOS transistor is grounded, the gate of the first MOS transistor, the gate of the second MOS transistor, and the third MOS transistor The gate of the MOS transistor and the gate of the MOS transistor and the
  • r1' is the equivalent resistance between the source and the drain of the first MOS transistor
  • r2' is the equivalent resistance between the source and the drain of the second MOS transistor
  • r3' is the The equivalent resistance between the source and the drain of the third MOS transistor
  • r4' is the equivalent resistance between the source and the drain of the fourth MOS transistor
  • the second DC holding unit includes a fifth MOS transistor, a sixth MOS transistor, a seventh MOS transistor and an eighth MOS transistor, and the source of the fifth MOS transistor is respectively connected to the drain of the seventh MOS transistor and the The second end of the first signal line is coupled, the drain of the fifth MOS transistor is coupled to the third power supply, the source of the seventh MOS transistor is grounded, and the source of the sixth MOS transistor are respectively coupled to the drain of the eighth MOS transistor and the second end of the second signal line, the drain of the sixth MOS transistor is coupled to the third power supply, and the drain of the eighth MOS transistor The source is grounded, and the gate of the fifth MOS transistor, the gate of the sixth MOS transistor, the gate of the seventh MOS transistor and the gate of the eighth MOS transistor are all connected to the second power supply management unit coupling;
  • r5' is the equivalent resistance between the source and the drain of the fifth MOS transistor
  • r6' is the equivalent resistance between the source and the drain of the sixth MOS transistor
  • r7' is the The equivalent resistance between the source and the drain of the seventh MOS transistor
  • r8' is the equivalent resistance between the source and the drain of the eighth MOS transistor
  • the first end of the first signal line and the first end of the second signal line serve as the first end of the communication line, and the second end of the first signal line and the first end of the second signal line are used as the first end of the communication line.
  • the two ends serve as the second end of the communication line.
  • the sending device further includes: a first control module and a driving unit, the first control module is respectively coupled to the driving unit and the first timing unit, the driving units are respectively coupled to the first power management unit and the first end of the communication line;
  • the first control module is used to transmit a data transmission period and a link sleep period to the first timing unit, and transmit parallel data to the drive unit, and the data transmission period is the transmission time of each data transmission, so
  • the link sleep period is the time interval between every two data;
  • the first timing unit is configured to determine the power-on time and the power-off time based on the data transmission period and the link sleep time;
  • the first power management unit is further configured to control the drive unit to be powered on at a preset time after the power-on time;
  • the driving unit is used for converting parallel data into serial data, and sending the serial data to the communication line;
  • the first power management unit is further configured to control the drive unit to be powered off at the power-off time.
  • the first power management unit controls the drive unit to power off, so that the communication line can enter a low power consumption mode to save power consumption.
  • the receiving device further includes: a second control module, a signal detection unit, and a receiving unit, the second control module is coupled to the second timing unit, and the receiving unit is connected to the The second end of the communication line is coupled, the signal detection unit is coupled between the second end of the communication line and the receiving unit, the receiving unit and the signal detection unit are also connected to the second power supply management unit coupling;
  • the second control module is used to transmit a data transmission period and a link sleep period to the second timing unit, and transmit parallel data to the receiving unit, and the data transmission period is the transmission duration of each data transmission, so
  • the link sleep period is the time interval between every two data data;
  • the second timing unit is configured to determine the power-on time and the power-off time based on the data transmission period and the link sleep time;
  • the second power management unit is configured to control the signal detection unit and the receiving unit to be powered on at a preset time after the power-on time;
  • the signal detection unit is used to detect whether there is data transmission on the communication line
  • the receiving unit is used for receiving serial data on the communication line, and converting the serial data into parallel data;
  • the second power management unit is configured to control the signal detection unit and the receiving unit to be powered off at the power-off time.
  • the second power management unit controls the receiving unit to power off, so that the communication line can enter a low power consumption mode and save power consumption.
  • the present application provides an electronic device, including the communication circuit described in the first aspect or the second aspect.
  • FIG. 1a and 1b are schematic diagrams of coupling modes of communication circuits in the prior art
  • Fig. 2 is the data transmission schematic diagram of the communication circuit in the prior art
  • FIG. 3 is a schematic diagram of a communication circuit operating mode conversion in the prior art
  • FIG. 4 is a schematic diagram of the principle of a communication circuit in an embodiment of the present application.
  • FIG. 5 is a schematic diagram of the principle of a communication circuit in another embodiment of the present application.
  • FIG. 6 is a schematic diagram of the principle of a communication circuit in another embodiment of the present application.
  • FIG. 7 is a schematic diagram of a communication circuit in another embodiment of the present application.
  • FIG. 8 is a schematic diagram of the principle of a communication circuit in another embodiment of the present application.
  • FIG. 9 is a schematic diagram of the principle of a communication circuit in another embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a mobile phone in an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of a mobile phone in an embodiment of the present application.
  • FIG. 12 is a schematic structural diagram of a mobile phone in another embodiment of the present application.
  • FIG. 13 is a schematic structural diagram of a mobile phone in another embodiment of the present application.
  • first and second are only used for the purpose of description, and should not be construed as indicating or implying relative importance; unless otherwise specified or explained , the term “multiple” refers to two or more; the terms “coupling” and “fixed” should be understood in a broad sense, for example, “coupling” may be a fixed coupling or a detachable coupling , or integrally coupled, or electrically connected; either directly or indirectly through an intermediate medium.
  • the specific meanings of the above terms in the present invention can be understood according to specific situations.
  • the embodiment of the present application provides a communication circuit, and the communication circuit may be a Serdes interface.
  • the communication circuit of the present application may also be applied to other serial-to-parallel circuits, or may also be circuits of other forms. limit.
  • the communication circuit can be applied to electronic equipment, such as tablet, mobile phone, all-in-one computer, display, desktop computer, etc.
  • this application will mainly take the application of the communication circuit to mobile phone as an example to introduce, in the specific implementation process , the mobile phone can also be replaced with any other electronic device.
  • the communication circuit may be a communication circuit connected between the application processor of the mobile phone and the display screen of the mobile phone, or a communication circuit connected between the application processor of the mobile phone and the camera of the mobile phone, or the application processor of the mobile phone and the memory of the mobile phone Communication circuits connected between them, etc.
  • the communication circuit can also be applied to other electronic devices including two independent devices, such as a mobile phone and an external display screen independent of the mobile phone, and the communication circuit is a communication circuit connected between the application processor of the mobile phone and the external display screen.
  • the solution of the present application includes the solution in which the transmitting device exists alone, or the receiving device exists alone.
  • the embodiments of the present application may provide a sending device, a receiving device, and a communication device including the sending device and the receiving device; the embodiments of the present application may also provide an electronic device including the sending device, a communication device including the sending device and the receiving device.
  • the sending device and the receiving device can form the communication circuit, or, in the case where the electronic device includes both a sending device and a receiving device, the electronic device The transmitting device and the receiving device of other electronic equipment form a communication circuit, and the receiving device of the electronic equipment and the transmitting device of other electronic equipment form the communication circuit; in the case that the electronic equipment includes the communication circuit, the electronic equipment may also include additional A separate sending device, or a separate receiving device, or both a separate sending device and a separate receiving device, are not limited in this embodiment of the present application.
  • the communication circuit may also be referred to as a communication module, a communication component, a communication unit, a communication device, and the like.
  • the sending device can also be called a sending end, a sending unit, a sending component, a sending circuit, and the like;
  • a receiving device can also be called a receiving end, a receiving unit, a receiving component, a receiving circuit, and the like.
  • the communication circuit includes a sending device and a receiving device, the sending device includes a first control module and a sending module, and the receiving device includes a receiving module and a second control module.
  • the first control module is coupled with the transmitting module, the transmitting module is coupled with the receiving module through a differential signal line, and the second control module is coupled with the receiving module.
  • the differential signal lines include P-pole differential signal lines and N-pole differential signal lines.
  • the sending module and the receiving module are used to realize the function of the Serdes interface and realize the serial-to-parallel conversion of data.
  • the Serdes interface has the advantages of high transmission bandwidth and small number of signals.
  • the coupling manner of the transmitting device and the receiving device may be DC coupling (as shown in FIG. 1 a ) or AC coupling (as shown in FIG. 1 b ).
  • AC coupling is adopted between the transmitting device and the receiving device, a coupling capacitor needs to be set on the differential signal line to isolate the DC component between the transmitting device and the receiving device and reduce the DC interference between the transmitting device and the receiving device.
  • the first control module controls the sending module to power off, and the DC voltage output by the sending module is at a low level.
  • the DC voltage output by the sending module is low
  • the receiving module detects that there is no data transmission on the differential signal line
  • the second control module controls the receiving module to power off, the DC voltage input by the receiving module is low level, and the voltage across the coupling capacitor is low power
  • the sending module and the receiving module operate in a low power consumption mode.
  • the data transmission gap is the transmission time interval between any two adjacent data packets, for example, the transmission time interval between the data packet 1 and the data packet 2 in FIG. 2 .
  • the data transmission gap can be the transmission time interval between any two adjacent data packets.
  • the voltage of the low level may be, for example, 0-30 mV.
  • the first control module controls the sending module to power on. As shown in FIG. 3 , the DC voltage output by the sending module can be quickly established to the preset working voltage Vcm, and when the DC voltage output by the sending module reaches When the working voltage Vcm is preset, the sending module can send data, and the sending module enters the data transmission mode.
  • the transmission module When the communication circuit is coupled in AC mode, since there is a coupling capacitor on the differential signal line, the transmission module needs to charge the coupling capacitor after power-on, so that the voltage across the coupling capacitor is the preset working voltage Vcm, and the voltage across the coupling capacitor cannot The sudden change from the low level to the preset working voltage Vcm requires a certain period of time to gradually increase from the low level to the preset working voltage Vcm. Therefore, the DC voltage input by the receiving module cannot quickly reach the preset working voltage Vcm. When the DC voltage input by the receiving module reaches the preset working voltage Vcm, the receiving module can receive data and enter the data transmission mode. Therefore, it takes a long time for the receiving module to exit the low power consumption mode. Compared with the transmitting module, the receiving module exiting the low power consumption mode generates a delay (eg, 20us), resulting in low data transmission efficiency between the transmitting module and the receiving module.
  • a delay eg, 20us
  • the preset working voltage Vcm can be 400mV; when the AC voltage output by the sending module is 1200mV, the preset working voltage Vcm can be 600mV.
  • the sending device leaves the factory, the AC voltage output by the sending module and the preset working voltage Vcm of the sending module have been set.
  • the DC voltage output by the sending module is low level and the DC voltage input by the receiving module is low level.
  • the data transmission mode is that the voltage output by the sending module (eg, DC voltage) is the preset working voltage Vcm, and the voltage (eg, DC voltage) input by the receiving module is the preset working voltage Vcm.
  • the data packet needs to be sent at the preset data sending time point in the communication circuit.
  • the charging time of the coupling capacitor is greater than the first preset time, the data packet cannot be sent at the preset data sending time point. Therefore, the receiving module detects that there is no data transmission on the differential signal line within the second preset time, the second control module keeps controlling the receiving module to power off, the DC voltage input by the receiving module is low level, and the receiving module cannot exit the low level. power mode.
  • the first preset time may be, for example, 10us ⁇ 21us.
  • the second preset time may be, for example, 95us ⁇ 105us.
  • the preset data sending time point can be set by the first control module.
  • the first control module can be based on the display period of the display screen.
  • the first preset time is determined by the voltage output by the sending module, the current output by the sending module and the capacitance value of the coupling capacitor.
  • the second preset time is set by the second control module.
  • the existing communication circuit adopts the method of transmitting invalid data in the data transmission gap to avoid the sending module and the receiving module from entering the low power consumption mode. It is ensured that the data packet is transmitted at the first preset time. However, in this way, the power consumption of the communication circuit is relatively high.
  • the invalid data is a data packet filled with specific data. For example, the data in the invalid data is all "0", and the receiving device discards the invalid data when receiving invalid data.
  • FIG. 4 is a schematic diagram of the principle of a communication circuit in an embodiment of the present application.
  • the communication circuit includes a transmitting device 20 , a receiving device 40 , and a communication line 60 coupling the transmitting device 20 and the receiving device 40 .
  • the communication line 60 includes a first signal line and a second signal line, the first signal line is provided with a first capacitor C1, and the second signal line is provided with a second capacitor C2.
  • the first signal line and the second signal line may be differential signal lines, the first signal line may be a P-pole differential signal line, and the second signal line may be an N-pole differential signal line.
  • the first capacitor C1 and the second capacitor C2 are used to isolate the DC component between the sending device 20 and the receiving device 40 , and reduce the DC interference between the sending device 20 and the receiving device 40 .
  • the capacitance values of the first capacitor C1 and the second capacitor C2 may be equal or unequal, and the capacitance values of the first capacitor C1 and the second capacitor C2 may be, for example, 100 nF ⁇ 1000 nF.
  • the first capacitor C1 and the second capacitor C2 with the same capacitance value can ensure that there is no difference between the signals transmitted on the P-pole differential signal line and the N-pole differential signal line.
  • the sending device 20 may be an application processor of a mobile phone.
  • the sending device 20 includes a first control module 22 and a sending module 24 .
  • the sending module 24 includes a first power management unit 242 , a driving unit 244 and a first DC holding unit 246 .
  • the output terminal of the first control module 22 is coupled to the input terminal of the driving unit 244 .
  • the control terminal of the first control module 22 is coupled to the input terminal of the first power management unit 242 .
  • the output end of the driving unit 244 is coupled to the first end of the communication line 60 .
  • the first DC holding unit 246 is coupled between the output end of the driving unit 244 and the first end of the communication line 60 .
  • the output ends of the first power management unit 242 are respectively coupled to the driving unit 244 and the first DC holding unit 246 .
  • the structures included in the sending module 24 may be independent structures or other combinations.
  • the sending device 20 includes the first control module 22 , the sending module 24 and the first power management unit 242 , the sending module 24 includes the driving unit 244 and the first DC holding unit 246 , or the sending device 20 includes the first control module 22 , a first power management unit 242 , a driving unit 244 and a first DC holding unit 246 .
  • the first control module 22 is used for receiving a data sending request. It can be a micro-control unit (Microcontroller Unit, MCU) in the application processor, and the input end of the first control module 22 can be coupled with the storage device for acquiring the data to be sent from the storage device, and the first control module 22 obtains the data to be sent.
  • the data to be sent is parallel data.
  • the storage device may be DDR (Double Data Rate, double-rate synchronous dynamic random access memory) or Flash memory or UFS (Univeral Flash Storage, universal flash memory).
  • the first control module 22 is also used for sending parallel data to the driving unit 244 .
  • the sending module 24 may be an interface circuit in the application processor.
  • the first power management unit 242 is controlled by the first control module 22 .
  • the first power management unit 242 is configured to control the driving unit 244 to be powered on and off according to the control instruction of the first control module 22 .
  • the first power management unit 242 is further configured to control the power-on and power-off of the first DC holding unit 246 according to the control instruction of the first control module 22 .
  • the driving unit 244 is used to convert parallel data into serial data, and transmit the serial data to the communication line 60 by adjusting the driving voltage and driving current output to the communication line 60 .
  • the driving voltage includes DC voltage and AC voltage.
  • the first DC holding unit 246 is used for maintaining the DC voltage between the output terminal of the driving unit 244 and the first terminal of the communication line 60 to be the first preset voltage.
  • the receiving device 40 may be a display screen of a mobile phone.
  • the receiving device 40 includes a second control module 42 and a receiving module 44 .
  • the receiving module 44 includes a second power management unit 442 , a second DC holding unit 444 , a signal detection unit 446 and a receiving unit 448 .
  • the input end of the receiving unit 448 is coupled to the second end of the communication line 60
  • the output end of the receiving unit 448 is coupled to the input end of the second control module 42 .
  • the control terminal of the second control module 42 is coupled to the input terminal of the second power management unit 442 .
  • the output terminals of the second power management unit 442 are respectively coupled to the second DC holding unit 444 and the signal detection unit 446 .
  • the second DC holding unit 444 and the signal detecting unit 446 are coupled between the second end of the communication line 60 and the input end of the receiving unit 448 .
  • the first capacitor C1 and the second capacitor C2 are located between the first end and the second end of the communication line 60 .
  • the first capacitor C1 and the second capacitor C2 may each include one capacitor, so as to ensure the signal transmission quality of the communication line 60 .
  • the first capacitor C1 may be a first capacitor combination, and the first capacitor combination may include one or more capacitors, or may also include other components other than capacitors;
  • the second capacitor C1 may be a second capacitor combination, and the second capacitor A combination may contain one or more capacitors, or may contain components other than capacitors.
  • the second control module 42 may be an interface controller of the display screen.
  • the display also includes a timing controller and a display panel.
  • the second control module 42 is used for transmitting the data to the display panel through the timing controller, and the display panel displays the data.
  • the receiving module 44 may be an interface circuit of the display screen.
  • the second power management unit 442 is controlled by the signal detection unit 446 .
  • the second power management unit 442 is configured to control the power-on and power-off of the second DC holding unit 444 according to the control instruction of the signal detection unit 446 .
  • the second power management unit 442 is further configured to control the signal detection unit 446 to be powered on and off according to the control instruction of the signal detection unit 446 .
  • the second power management unit 442 is further configured to control the power-on and power-off of the receiving unit 448 according to the control instruction of the signal detection unit 446 .
  • the signal detection unit 446 is used to detect whether there is data transmission on the communication line 60 .
  • the receiving unit 448 is used for receiving serial data on the communication line 60 and converting the serial data into parallel data, and the receiving unit 448 is also used for transmitting the parallel data to the second control module 42 .
  • the second DC holding unit 444 is configured to maintain the DC voltage between the input end of the receiving unit 448 and the second end of the communication line 60 to be the second preset voltage.
  • the second power management unit 442 may also be controlled by the second control module 42 .
  • the second power management unit 442 may also control the second DC holding unit 444 to be powered on and off according to the control instruction of the second control module 42 .
  • the second power management unit 442 can also control the signal detection unit 446 to power on and power off according to the control instruction of the second control module 42 .
  • the second power management unit 442 may also control the receiving unit 448 to be powered on and off according to the control instruction of the second control module 42 .
  • the priority of the control of the second power management unit 442 by the second control module 42 may be higher than the priority of the control of the second power management unit 442 by the signal detection unit 446 .
  • the control command transmitted by the second control module 42 to the second power management unit 442 is the command to control the power-on of the receiving unit 448
  • the control command transmitted by the signal detection unit 446 to the second power management unit 442 is the control command to receive power According to the power-off command of the unit 448
  • the second power management unit 442 controls the receiving unit 448 to power on according to the control command of the second control module 42 .
  • the working principle of the communication circuit is described below by taking the application of the communication circuit to a mobile phone as an example.
  • the micro-control unit of the mobile phone and the interface controller of the display screen are powered on.
  • the micro-control unit detects that it is powered on, the micro-control unit can generate a data sending request, and generate the first control unit according to the data sending request. signal, the micro-control unit transmits the first control signal to the first power management unit 242, and the first power management unit 242 controls the first DC holding unit 246 to power on according to the first control signal, and controls the first DC holding unit 246
  • the first control signal is an instruction to control the first DC holding unit 246 to power on and control the first DC holding unit 246 to maintain the power-on state.
  • the interface controller After the first DC holding unit 246 is powered on, the DC voltage between the output end of the driving unit 244 and the first end of the communication line 60 is kept as the first preset voltage.
  • the interface controller generates a second control signal and transmits the second control signal to the second power management unit 442, and the second power management unit 442 controls the second DC holding unit 444 and the signal detection unit 446 to power on according to the second control signal, and The second DC holding unit 444 and the signal detecting unit 446 are controlled to maintain the power-on state.
  • the second control signal is an instruction to control the second DC holding unit 444 and the signal detection unit 446 to be powered on, and the second control signal is also an instruction to control the second DC holding unit 444 and the signal detection unit 446 to maintain the power-on state.
  • the display panel needs to display data after the mobile phone is turned on, when the micro-control unit detects that it is powered on, the micro-control unit generates a data transmission request, and the micro-control unit generates the first control signal according to the data transmission request.
  • the control unit obtains the data to be sent from the storage device, the data to be sent obtained by the micro-control unit is parallel data, the micro-control unit generates a third control signal and transmits the third control signal to the first power management unit 242, the first power management
  • the unit 242 controls the driving unit 244 to be powered on according to the third control signal, and controls the driving unit 244 to maintain the powered-on state.
  • the microcontroller unit sends parallel data to the drive unit 244 . After the drive unit 244 is powered on, it can receive the parallel data sent by the micro-control unit and convert the parallel data into serial data.
  • the drive unit 244 also adjusts the drive voltage and drive current output to the communication line 60 to convert the serial The data is sent to the communication line 60 .
  • the signal detection unit 446 detects that the AC voltage value on the communication line 60 is greater than the preset voltage value, thereby judging that there is data transmission on the communication line 60, and the signal detection unit 446 generates a fourth control signal and transmits the fourth control signal to the second power supply
  • the management unit 442 the second power management unit 442 controls the receiving unit 448 to be powered on according to the fourth control signal, and controls the receiving unit 448 to keep the power-on state, and the fourth control signal is to control the receiving unit 448 to be powered on and control the receiving unit 448 to remain on electrical state command.
  • the receiving unit 448 After the receiving unit 448 is powered on, it receives the serial data on the communication line 60 and converts the serial data into parallel data, and the receiving unit 448 also transmits the converted parallel data to the interface controller.
  • the interface controller transmits the received parallel data to the display panel through the timing controller, and the display panel displays the parallel data.
  • the storage device may transmit a stop sending request to the microcontroller unit, and the stop sending request may indicate an instruction that there is no data to be displayed in the storage device.
  • the micro-control unit generates a fifth control signal according to the stop sending request, and transmits the fifth control signal to the first power management unit 242.
  • the first power management unit 242 controls the drive unit 244 to power off according to the fifth control signal, and controls the drive unit 244 maintains the power-off state
  • the fifth control signal is an instruction to control the drive unit 244 to power off and control the drive unit 244 to maintain the power-off state.
  • the output drive voltage is a low level
  • the signal detection unit 446 detects that the AC voltage value on the communication line 60 is all less than or equal to the preset voltage value, so as to determine the communication line 60 If there is no data transmission, the signal detection unit 446 generates a sixth control signal and transmits the sixth control signal to the second power management unit 442.
  • the second power management unit 442 controls the receiving unit 448 to power off according to the sixth control signal, and controls the receiving
  • the unit 448 maintains the power-off state
  • the sixth control signal is an instruction to control the power-off of the receiving unit 448 and to control the receiving unit 448 to maintain the power-off state.
  • the application processor and the display screen enter a low power consumption mode. At this time, since both the driving unit 244 and the receiving unit 448 are powered off and remain powered off, the power consumption of the mobile phone can be reduced.
  • the first power management unit 242 controls the first DC holding unit 246 to keep the power-on state
  • the second power management unit 442 controls the second DC holding unit 444 and the signal detection unit 446 remain powered on.
  • the first preset voltage is equal to the DC voltage output by the driving unit 244
  • the second preset voltage is equal to the DC voltage input by the receiving unit 448 .
  • the first preset voltage and the second preset voltage may be the same or different.
  • the signal detection unit 446 may include an operational amplifier, the non-inverting input end of the operational amplifier is connected to the P-pole differential signal line, the reverse input end of the operational amplifier is connected to the N-pole differential signal line, the P-pole differential signal line and the N-pole differential signal line
  • the AC voltage is input to the operational amplifier through the non-inverting input terminal and the reverse input terminal respectively.
  • the output result of the operational amplifier represents whether the amplitude of the AC voltage is greater than the preset amplitude.
  • the signal detection unit 446 further determines whether the communication line 60 has data transmission.
  • the preset voltage value may be, for example, 100mV ⁇ 1200mV.
  • the preset voltage value is, for example, 400mV or 800mV.
  • the preset detection time may be, for example, 95us ⁇ 105us.
  • the sending device 20 may be the camera of the mobile phone
  • the receiving device 40 may be the application processor of the mobile phone
  • the first control module 22 is the camera in the camera.
  • the interface controller, the second control module 42 is a micro control unit in the application processor.
  • the first capacitor C1 and the second capacitor C2 may be disposed on the communication line 60 located on the camera, or may be disposed on the communication line 60 located on the application processor.
  • the micro-control unit of the camera transmits a data sending request to the interface controller of the camera through other communication circuits (not the communication circuit shown in the figure), and the data sending request is used to control the interface controller of the camera to send data.
  • the storage device acquires the data to be sent, and the micro-control unit controls the second DC holding unit 444 and the signal detection unit 446 to be powered on through the second power management unit 442, and controls the second DC holding unit 444 and the signal detection unit 446 to remain powered on.
  • the interface controller of the camera controls the first DC holding unit 246 and the driving unit 244 to be powered on through the first power management unit 242, and controls the first DC holding unit 246 and the driving unit 244 to maintain the power-on state.
  • the driving unit 244 of the camera sends the data to the receiving unit 448 of the application processor.
  • the micro-control unit of the application processor does not detect the request that the application program on the mobile phone needs to obtain the data in the camera
  • the micro-control unit of the application processor transmits the stop sending request to the interface controller of the camera, and the stop sending request is used to control the
  • the interface controller of the camera stops sending data
  • the micro-control unit controls the second DC holding unit 444 and the signal detection unit 446 to maintain the power-on state through the second power management unit 442, and the interface controller of the camera controls the first power management unit 242.
  • the DC maintaining unit 246 and the driving unit 244 remain powered on.
  • the first power management unit 242 controls the first DC holding unit 246 to keep the power-on state
  • the second power management unit 442 controls the second DC holding unit 444 to keep the power on.
  • the first DC holding unit 246 can maintain the DC voltage between the output terminal of the driving unit 244 and the first terminal of the communication line 60 to be the first preset voltage
  • the second DC holding unit 444 can maintain the receiving unit
  • the DC voltage between the input terminal of 448 and the first terminal of the communication line 60 is the second preset voltage, so that the DC voltages at both ends of the first capacitor C1 and the second capacitor C2 on the communication line 60 can be respectively maintained at the first preset voltage voltage and the second preset voltage, when the communication circuit exits the low power consumption mode, the first capacitor C1 and the second capacitor C2 on the communication line 60 do not need to undergo a charging process, so that the time for the communication circuit to exit the low power consumption mode is reduced,
  • the first power management unit 242 controls the driving unit 244 to keep the power-off state
  • the second power management unit 442 controls the receiving unit 448 to keep the power-off state
  • the communication circuit operates in a low power consumption mode, Thereby, power consumption can be reduced.
  • FIG. 5 is a circuit diagram of an alternative implementation of the communication circuit in FIG. 4 .
  • the driving unit 244 includes a driving circuit 245 and a first power supply VCC1.
  • the input terminal of the driving circuit 245 is coupled to the output terminal of the first control module 22, and the first output terminal of the driving circuit 245 is connected to the first capacitor C1.
  • the first terminal of the driving circuit 245 is coupled to the first terminal of the second capacitor C2, and the power terminal of the driving circuit 245 is coupled to the first power source VCC1.
  • the input terminal of the driving circuit 245 is used as the input terminal of the driving unit 244
  • the first output terminal and the second output terminal of the driving circuit 245 are used as the output terminal of the driving unit 244 .
  • the first DC holding unit 246 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a second power source VCC2.
  • the first end of the first resistor R1 is respectively coupled to the first end of the third resistor R3 and the first end of the first capacitor C1, the second end of the first resistor R1 is coupled to the second power supply VCC2, and the third resistor R3
  • the second terminal is grounded.
  • the first end of the second resistor R2 is respectively coupled to the first end of the fourth resistor R4 and the first end of the second capacitor C2, the second end of the second resistor R2 is coupled to the second power supply VCC2, and the fourth resistor R4 The second terminal is grounded.
  • Vr 13 is the voltage of the first end of the first capacitor C1
  • Vr 13 is, for example, a DC voltage
  • V2 is the voltage of the second power supply VCC2
  • V2 is, for example, a DC voltage
  • r1 is the resistance of the first resistor R1
  • r2 is the second
  • Vr 24 is the voltage of the first end of the second capacitor C2, and Vr 24 is, for example, a DC voltage.
  • the resistance value r1 of the first resistor R1 to the resistance value r4 of the fourth resistor R4 satisfy:
  • Vr 13 and Vr 24 are close in size and close in size to V cm-tx , and the ratio of any two of the three may be between 0.95 and 1.05.
  • V cm-tx is the DC voltage output by the drive circuit 245;
  • the resistance value r1 of the first resistor R1 to the resistance value r4 of the fourth resistor R4 and the voltage V2 of the second power source VCC2 may be the values that have been set by the sending device 20 when it leaves the factory.
  • the first power management unit 242 is coupled to the first power VCC1 and the second power VCC2, respectively.
  • the first power management unit 242 controls the first power supply VCC1 to be powered on, thereby controlling the driving unit 244 to be powered on, and controls the first power supply VCC1 to maintain the powered-on state, thereby controlling the driving unit 244 to maintain the powered-on state.
  • the first power management unit 242 also controls the first power supply VCC1 to power off, thereby controlling the driving unit 244 to power off, and controls the first power supply VCC1 to maintain the power-off state, thereby controlling the driving unit 244 to maintain the power-off state.
  • the first power management unit 242 controls the second power supply VCC2 to be powered on, thereby controlling the first DC holding unit 246 to be powered on, and controls the second power supply VCC2 to maintain the power-on state, thereby controlling the first DC holding unit 246 to remain powered on state.
  • the first power management unit 242 can control the first power supply VCC1 to be powered on, maintained in a powered-on state, powered off, and maintained in a powered-off state through a switch.
  • the first power management unit 242 can also control the second power VCC2 to power on, maintain the power-on state, power off, and maintain the power-off state through the switch.
  • the second DC holding unit 444 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8 and a third power source VCC3.
  • the first end of the fifth resistor R5 is respectively coupled to the second end of the first capacitor C1 and the first end of the seventh resistor R7, the second end of the fifth resistor R5 is coupled to the third power supply VCC3, and the seventh resistor R7
  • the second terminal is grounded.
  • the first end of the sixth resistor R6 is respectively coupled to the second end of the second capacitor C2 and the first end of the eighth resistor R8, the second end of the sixth resistor R6 is coupled to the third power supply VCC3, and the eighth resistor R8 The second terminal is grounded.
  • the third power supply VCC3 is also coupled to the signal detection unit 446 to supply power to the signal detection unit 446 .
  • the receiving unit 448 includes a receiving circuit 449 and a fourth power supply VCC4.
  • the input end of the receiving circuit 449 is coupled to the second end of the communication line 60
  • the output end of the receiving circuit 449 is coupled to the second control module 42
  • the power end of the receiving circuit 449 is coupled to the fourth power source VCC4 .
  • the input end of the receiving circuit 449 serves as the input end of the receiving unit 448
  • the output end of the receiving circuit 449 serves as the output end of the receiving unit 448 .
  • Vr 57 is the voltage of the second end of the first capacitor C1
  • Vr 57 is the DC voltage
  • V3 is the voltage of the third power supply VCC3
  • V3 is, for example, the DC voltage
  • r5 is the resistance value of the fifth resistor R5
  • r6 is the sixth resistor R6
  • r7 is the resistance of the seventh resistor R7
  • r8 is the resistance of the eighth resistor
  • Vr 68 is the voltage of the second end of the second capacitor C2
  • Vr 68 is the DC voltage.
  • the resistance value r5 of the fifth resistor R5 to the resistance value r8 of the eighth resistor R8 satisfy:
  • Vr 57 is close to Vr 68
  • Vr 68 is close to V cm-rx
  • Vr 57 is close to V cm-rx
  • the ratio of any two is between 0.95 and 1.05.
  • V cm-rx is the DC voltage input by the receiving circuit 449;
  • the resistance value r5 of the fifth resistor R5 to the resistance value r8 of the eighth resistor R8 and the voltage V3 of the third power supply VCC3 may be the values that have been set when the receiving device 40 is shipped from the factory.
  • the second power management unit 442 is coupled to the third power VCC3 and the fourth power VCC4, respectively.
  • the second power management unit 442 controls the third power supply VCC3 to be powered on, thereby controls the second DC holding unit 444 and the signal detection unit 446 to power on, and controls the third power supply VCC3 to maintain the power-on state, thereby controlling the second DC holding unit 444 And the signal detection unit 446 remains powered on.
  • the second power management unit 442 controls the receiving unit 448 to be powered on by controlling the fourth power source VCC4 to be powered on, and controls the fourth power source VCC4 to remain powered on, thereby controlling the receiving unit 448 to remain powered on.
  • the second power management unit 442 controls the receiving unit 448 to power off by controlling the fourth power source VCC4 to power off, and controls the fourth power source VCC4 to keep the power off state, thereby controlling the receiving unit 448 to keep the power off state.
  • the first end of the first capacitor C1 or the first end of the first signal line, and the first end of the second capacitor C2 or the first end of the second signal line serve as the first end of the communication line 60, and the first end of the first capacitor C1
  • the second end or the second end of the first signal line, and the second end of the second capacitor C2 or the second end of the second signal line serve as the second end of the communication line 60 .
  • the second power management unit 442 can control the third power source VCC3 to power on, maintain the power-on state, power off, and maintain the power-off state through the switch.
  • the second power management unit 442 can also control the fourth power source VCC4 to power on, maintain the power-on state, power off, and maintain the power-off state through the switch.
  • the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 may be one resistor, or may respectively include multiple resistors. resistance.
  • the first power management unit 242 controls the second power supply VCC2 to be powered on, and controls the second power supply VCC2 to remain powered on, and the second power management unit 442 controls the third power supply
  • the power supply VCC3 is powered on, and controls the third power supply VCC3 to maintain the power-on state.
  • the first power management unit 242 controls the first power supply VCC1 to power on, and controls the first power supply VCC1 to maintain the power-on state.
  • the second power management unit 442 controls the fourth power supply VCC4 to power on, and controls the fourth power supply VCC4 to maintain the power-on state.
  • the DC voltage of the first end of the first capacitor C1 is Vr 13
  • the first capacitor The DC voltage of the second terminal of C1 is Vr 57
  • the DC voltage of the first terminal of the second capacitor C2 is Vr 24
  • the DC voltage of the second terminal of the second capacitor C2 is Vr 68 .
  • the first control module 22 When the first control module 22 receives a request to stop sending, for example, when the mobile phone is black or the mobile phone does not currently have an application running in the foreground or the current application is closed, the first power management unit 242 controls the first power supply VCC1 to power off, and controls the first power supply VCC1 remains powered down, the second power management unit 442 controls the fourth power supply VCC4 to power down, and controls the fourth power supply VCC4 to remain powered down.
  • the DC voltage at the first end of the first capacitor C1 is at a low level
  • the DC voltage of the second terminal of the first capacitor C1 is low level
  • the DC voltage of the first terminal of the second capacitor C2 is low level
  • the DC voltage of the second terminal of the second capacitor C2 is low level.
  • the first power management unit 242 can also control the first power supply VCC1 to keep the power-on state, and the second power management unit 442 controls the fourth power supply VCC4 Remains powered on.
  • FIG. 6 is a circuit diagram of another alternative implementation of the communication circuit in FIG. 4 .
  • the difference between FIG. 6 and FIG. 5 is that the first resistor R1 , the second resistor R2 , the third resistor R3 and the fourth resistor R4 of the first DC holding unit 246 are composed of the first MOS transistor Q1 , the second MOS transistor Q2 , the The three MOS transistors Q3 and the fourth MOS transistor Q4 are replaced.
  • the source of the first MOS transistor Q1 is respectively coupled to the drain of the third MOS transistor Q3 and the first end of the first capacitor C1, the drain of the first MOS transistor Q1 is coupled to the second power supply VCC2, and the third MOS transistor The source of Q3 is grounded.
  • the source of the second MOS transistor Q2 is respectively coupled to the drain of the fourth MOS transistor Q4 and the first end of the second capacitor C2, the drain of the second MOS transistor Q2 is coupled to the second power supply VCC2, and the fourth MOS transistor The source of Q4 is grounded.
  • the gate g1 of the first MOS transistor Q1 , the gate g2 of the second MOS transistor Q2 , the gate g3 of the third MOS transistor Q3 and the gate g4 of the fourth MOS transistor Q4 are all coupled to the first power management unit 242 .
  • the first power management unit 242 can transmit a PWM (pulse width modulation, pulse width modulation) signal to the gates g4 of the first MOS transistor Q1 to the fourth MOS transistor Q4, and adjust the PWM duty cycle, thereby The turn-on and turn-off frequencies of the first MOS transistor Q1 to the fourth MOS transistor Q4 are adjusted.
  • PWM pulse width modulation, pulse width modulation
  • the fifth resistor R5 , the sixth resistor R6 , the seventh resistor R7 , and the eighth resistor R8 of the second DC holding unit 444 are composed of the fifth MOS transistor Q5 , the sixth MOS transistor Q6 , the seventh MOS transistor Q7 and the eighth MOS transistor Q8 replace.
  • the source of the fifth MOS transistor Q5 is respectively coupled to the drain of the seventh MOS transistor Q7 and the second end of the first capacitor C1, the drain of the fifth MOS transistor Q5 is coupled to the third power supply VCC3, and the seventh MOS transistor The source of Q7 is grounded.
  • the source of the sixth MOS transistor Q6 is respectively coupled to the drain of the eighth MOS transistor Q8 and the second end of the second capacitor C2, the drain of the sixth MOS transistor Q6 is coupled to the third power supply VCC3, and the eighth MOS transistor The source of Q8 is grounded.
  • the gate g1 of the fifth MOS transistor Q5 , the gate g2 of the sixth MOS transistor Q6 , the gate g3 of the seventh MOS transistor Q7 and the gate g4 of the eighth MOS transistor Q8 are all coupled to the second power management unit 442 .
  • the second power management unit 442 can transmit a PWM (pulse width modulation, pulse width modulation) signal to the gates of the fifth MOS transistor Q5 to the eighth MOS transistor Q8 respectively, and adjust the duty cycle of the PWM to thereby adjust the The turn-on and turn-off frequencies of the fifth MOS transistor Q5 to the eighth MOS transistor Q8.
  • PWM pulse width modulation, pulse width modulation
  • the first power management unit 242 controls the second power supply VCC2 to be powered on, and controls the second power supply VCC2 to remain powered on, and the second power management unit 442 controls the third power supply
  • the power supply VCC3 is powered on and controls the third power supply VCC3 to remain powered on.
  • the first power management unit 242 controls the turn-on and cut-off frequencies of the first to fourth MOS transistors Q1 to Q4, and the second power management unit 442 controls the fifth
  • the turn-on and turn-off frequencies of the MOS transistor Q5 to the eighth MOS transistor Q8 are such that the DC voltage at the first end of the first capacitor C1 is Vr 13 , the DC voltage at the second end of the first capacitor C1 is Vr 57 , and the second capacitor C2
  • the DC voltage at the first end of the capacitor C2 is Vr 24
  • the DC voltage at the second end of the second capacitor C2 is Vr 68 .
  • the first power management unit 242 controls the first power supply VCC1 to power off
  • the second power management unit 442 controls the fourth power source VCC4 to power off, and controls the fourth power source VCC4 to maintain the power-off state.
  • the first power management unit 242 controls the first power supply VCC1 to power on, and controls the first power supply VCC1 to keep the power-on state
  • the second power management unit 442 controls the fourth power supply VCC4 to power on power, and control the fourth power supply VCC4 to keep the power-on state.
  • the first power management unit 242 can adjust the first MOS transistor Q1 to the fourth MOS transistor Q4 by adjusting the duty ratio of the PWM transmitted to the gates of the first MOS transistor Q1 to the fourth MOS transistor Q4
  • the turn-on and turn-off frequencies of the first MOS transistor Q1 to the fourth MOS transistor Q4 control the current between the source and the drain, which is equivalent to controlling the source of the first MOS transistor Q1 to the fourth MOS transistor Q4 and the resistance between the drain, i.e.
  • r1' is the equivalent resistance between the source and drain of the first MOS transistor Q1
  • r2' is the equivalent resistance between the source and the drain of the second MOS transistor Q2
  • r3' is the third MOS
  • the equivalent resistance between the source and the drain of the transistor Q3, r4' is the equivalent resistance between the source and the drain of the fourth MOS transistor Q4.
  • the equivalent resistance r1' between the source and the drain of the first MOS transistor Q1, the equivalent resistance r2' between the source and the drain of the second MOS transistor Q2, and the source of the third MOS transistor Q3 The equivalent resistance r3' between the drain and the drain, and the equivalent resistance r4' between the source and the drain of the fourth MOS transistor Q4 satisfy:
  • the values of these three can also be similar, for example, the ratio of any two is between 0.95 and 1.05.
  • the equivalent resistance r1' between the source and drain of the first MOS transistor Q1 can be achieved by adjusting the duty cycle of the PWM transmitted to the gate of the first MOS transistor Q1.
  • the source and the drain of the second MOS transistor Q2 The equivalent resistance r2' between the drains can be achieved by adjusting the duty cycle of the PWM transmitted to the gate of the second MOS transistor Q2, and the equivalent resistance between the source and the drain of the third MOS transistor Q3 r3' can be realized by adjusting the duty ratio of the PWM transmitted to the gate of the third MOS transistor Q3, and the equivalent resistance r4' between the source and drain of the fourth MOS transistor Q4 can be transmitted to the fourth MOS transistor Q4 by adjusting.
  • the PWM duty cycle of the gate of the MOS transistor Q4 is realized.
  • the second power management unit 442 can adjust the turn-on and turn-off of the fifth MOS transistor Q5 to the eighth MOS transistor Q8 by adjusting the duty ratio of the PWM transmitted to the gates of the fifth MOS transistor Q5 to the eighth MOS transistor Q8 frequency, so as to control the current between the source and drain of the fifth MOS transistor Q5 to the eighth MOS transistor Q8, that is, it is equivalent to controlling the difference between the source and drain of the fifth MOS transistor Q5 to the eighth MOS transistor Q8 resistance between
  • r5' is the equivalent resistance between the source and the drain of the fifth MOS transistor Q5
  • r6' is the equivalent resistance between the source and the drain of the sixth MOS transistor Q6
  • r7' is the seventh MOS
  • the equivalent resistance between the source and the drain of the transistor Q7, r8' is the equivalent resistance between the source and the drain of the eighth MOS transistor Q8.
  • the equivalent resistance r5' between the source and the drain of the fifth MOS transistor Q5, the equivalent resistance r6' between the source and the drain of the sixth MOS transistor Q6, and the source of the seventh MOS transistor Q7 The equivalent resistance r7' between the drain and the drain, and the equivalent resistance r8' between the source and the drain of the eighth MOS transistor Q8 satisfy:
  • the values of these three can also be similar, for example, the ratio of any two is between 0.95 and 1.05.
  • the equivalent resistance r5' between the source and the drain of the fifth MOS transistor Q5, the equivalent resistance r6' between the source and the drain of the sixth MOS transistor Q6, and the source of the seventh MOS transistor Q7 The equivalent resistance r7' between the The PWM duty cycle of the gate is implemented.
  • FIG. 7 is a schematic diagram of the principle of a communication circuit in another embodiment of the present application.
  • the sending module 24 further includes a first timing unit 240, the input end of the first timing unit 240 is coupled to the control end of the first control module 22, and the output end of the first timing unit 240 is connected to the first power supply
  • the input terminal of the management unit 242 is coupled.
  • the first control module 22 is configured to transmit the data transmission cycle to the first timing unit 240
  • the first timing unit 240 is configured to generate the power-on time and the power-off time according to the data transmission cycle, and to calculate the power-on time and the power-off time.
  • the power-on time is the preset time before data transmission.
  • the data transmission period may also be referred to as the data transmission period.
  • the data needs to be transmitted in 1s, 2s, 3s, 4s, ..., 20s, 21s, 22s, ..., and the data transmission period is 1s.
  • the data needs to be transmitted in 1s, 2s, 3s, 4s,..., 20s, 21s, 22s,...
  • the power-on time can be 0.8s, 1.8s, 2.8s, 3.8s,..., 19.8 s, 20.8s, 21.8s, ..., at 0.8s ⁇ 1.1s, 1.8s ⁇ 2.1s, 2.8s ⁇ 3.1s, 3.8s ⁇ 4.1s, ..., 19.8s ⁇ 20.1s, 20.8s ⁇ 21.1s, 21.8 s ⁇ 22.1s, ...
  • control the driving unit 244 and the first DC holding unit 246 to keep the power-on state, and the power-off time can be 1.1s, 2.1s, 3.1s, 4.1s, ..., 20.1s, 21.1s, 22.1s , ..., at 0 ⁇ 0.8s, 1.1s ⁇ 1.8s, 2.1s ⁇ 2.8s, 3.1s ⁇ 3.8s, 4.1s ⁇ 4.8s, ..., 19.1s ⁇ 19.8s, 20.1s ⁇ 20.8s, 21.1s ⁇ 21.8s, . . . Control the driving unit 244 and the first DC holding unit 246 to keep the power-off state.
  • the receiving module 44 further includes a second timing unit 440 , the input terminal of the second timing unit 440 is coupled to the control terminal of the second control module 42 , and the output terminal of the second timing unit 440 is coupled to the input terminal of the second power management unit 442 catch.
  • the second control module 42 is configured to transmit the data transmission period to the second timing unit 440, and the second timing unit 440 is configured to generate power-on time and power-off time according to the data transmission period and transmit the power-on time and power-off time to the second power management unit 442, the second power management unit 442 is used to control the second DC holding unit 444, the signal detection unit 446 and the receiving unit 448 to power on at the power-on time, and control the second DC holding unit 444, signal detection The unit 446 and the receiving unit 448 keep the power-on state, and control the second DC holding unit 444, the signal detecting unit 446 and the receiving unit 448 to power off at the power-off time, and control the second DC holding unit 444, the signal detecting unit 446 and the receiving unit The 448 remains powered down.
  • the first control module 22 transmits the data transmission period to the first timing unit 240, and the first timing unit 240 generates the power-on time and the power-down period according to the data transmission period
  • the power-on time and the power-on time and power-off time are transmitted to the first power management unit 242
  • the second control module 42 transmits the data transmission period to the second timing unit 440
  • the second timing unit 440 generates the power-on time according to the data transmission period.
  • the power-on time and power-off time are transmitted to the second power management unit 442.
  • the first power management unit 242 controls the drive unit 244 and the first DC holding unit 246 is powered off, and controls the drive unit 244 and the first DC holding unit 246 to remain powered off.
  • the second power management unit 442 controls the second DC holding unit 444, the signal detection unit 446 and the receiving unit 448 to power off, and controls the first DC holding unit 444.
  • the two DC holding unit 444 , the signal detecting unit 446 and the receiving unit 448 are kept powered off, and the communication circuit enters a low power consumption mode.
  • the first power management unit 242 controls the driving unit 244 and the first DC holding unit 246 to be powered on, and controls the driving unit 244 and the first DC holding unit 246 to keep the power-on state, or
  • the first DC holding unit 246 is controlled to be powered on during the power-on time, and at a preset time after the power-on time, the driving unit 244 is controlled to be powered on, and the second power management unit 442 controls the second DC holding unit 444 and the signal detection unit 446 and the receiving unit 448 are powered on, and control the second DC holding unit 444, the signal detection unit 446 and the receiving unit 448 to keep the power-on state, or the second DC holding unit 444 can be controlled to be powered on at the power-on time.
  • the preset time after the time controls the signal detection unit 446 and the receiving unit 448 to be powered on.
  • the first DC holding unit 246 After the first DC holding unit 246 is powered on, the DC voltage between the output end of the driving unit 244 and the first end of the communication line 60 is maintained. is the first preset voltage.
  • the second DC holding unit 444 After the second DC holding unit 444 is powered on, the DC voltage between the second end of the communication line 60 and the input end of the receiving unit 448 is the second preset voltage, and the communication circuit exits the low-power state.
  • the first control module 22 transmits the parallel data to the drive unit 244, the drive unit 244 converts the parallel data into serial data, and sends the serial data to the communication line 60, and the signal detection unit 446 detects the communication line 60.
  • the receiving unit 448 receives the serial data on the communication line 60 and converts the serial data into parallel data, and the receiving unit 448 also transmits the parallel data to the second control module 42 .
  • the power-on time is a preset time before data transmission, so when the first control module 22 needs to send data, the DC voltage between the output end of the driving unit 244 and the first end of the communication line 60 can reach the first preset voltage , the DC voltage between the second end of the communication line 60 and the input end of the receiving unit 448 can reach the second preset voltage, and the receiving unit 448 can receive data.
  • the first power management unit 242 can also control the driving unit 244 and the first DC holding unit 246 to be powered on, and control the driving unit 244 and the first DC holding unit 246 to keep the power-on state
  • the second power management unit 442 can also control the second DC holding unit 444 , the signal detecting unit 446 and the receiving unit 448 to be powered on, and control the second DC holding unit 444 , the signal detecting unit 446 and the receiving unit 448 to remain powered on.
  • the first power management unit 242 may also control the driving unit 244 to power off, control the driving unit 244 to keep the power-off state, control the first DC holding unit 246 to power on, and control the first DC holding unit 246 to power on.
  • the DC holding unit 246 remains powered on
  • the second power management unit 442 can also control the second DC holding unit 444 to power on, control the signal detection unit 446 and the receiving unit 448 to power off, and control the second DC holding unit 444 to power on , the control signal detection unit 446 and the receiving unit 448 remain powered off.
  • the power-on time is used to control the power-on of the driving unit 244, the signal detection unit 446 and the receiving unit 448, and at a preset time before the power-on time, the first power management unit 242 controls the The DC holding unit 246 is powered on, and the second power management unit 442 controls the second DC holding unit 444 to be powered on.
  • the first timing unit 240 by setting the first timing unit 240 in the sending module 24 and setting the second timing unit 440 in the receiving module 44, the first timing unit 240 generates the power-on time and the power-off time according to the data transmission cycle, and the second timing unit 240 The timing unit 440 generates the power-on time and the power-off time according to the data transmission cycle.
  • the first power management unit 242 controls the drive unit 244 and the first DC holding unit 246 to power on, and controls the drive unit 244 and the first DC holding unit 246 remain powered on
  • the second power management unit 442 controls the second DC holding unit 444, the signal detection unit 446 and the receiving unit 448 to power on, and controls the second DC holding unit 444, signal detection
  • the unit 446 and the receiving unit 448 remain powered on, so that when the first control module 22 needs to send data, the DC voltage between the output end of the driving unit 244 and the first end of the communication line 60 can reach the first preset voltage, The DC voltage between the second end of the communication line 60 and the input end of the receiving unit 448 can reach the second preset voltage, and the receiving unit 448 can receive data.
  • the first power management unit 242 controls the The driving unit 244 and the first DC holding unit 246 are powered off, and control the driving unit 244 and the first DC holding unit 246 to keep the power-off state
  • the second power management unit 442 controls the second DC holding unit 444 and the signal detection unit 446
  • the receiving unit 448 is powered off
  • the second DC holding unit 444, the signal detecting unit 446 and the receiving unit 448 are controlled to remain powered off, so that the power consumption of the communication circuit can be reduced.
  • the first timing unit 240 maintains a data transmission period and a link sleep period, where the data transmission period refers to the duration of data transmission after each data transmission is started, for example, 50ms, 100ms, etc.; the link sleep period refers to the time period for which the link enters the sleep state again after each start of the link, such as 1s, 2s, etc., which is not limited in this embodiment of the present invention.
  • the transmitting device 20 for example: the first control module 22
  • the data transmission period and the link sleep period can be transmitted to the receiving device 40 and then sent to the second timing unit 440, so that the second timing unit 440
  • the data transmission period and the link sleep period may also be determined by the receiving apparatus 40 itself, which is not limited in this embodiment of the present invention.
  • the first timing unit 240 starts timing until the timing duration of the first timing unit 240 reaches the duration corresponding to the data transmission period.
  • the first timer 240 informs the first power supply
  • the management unit 242 is controlled by the first power management unit 242 to power off the drive unit 244 and the first DC holding unit 246; in this case, the first timing unit 240 can continue timing, or restart timing, when the timing duration reaches
  • a control signal is generated to control the first DC holding unit 246 to be powered on
  • a control signal is generated to control the driving unit 244 Power on to transmit data to the receiving device 40 .
  • the receiving device 40 On the side of the receiving device 40, it is powered on by default in the initial stage.
  • the signal detection unit 446 detects that there is data transmission on the communication line, it informs the second timing unit 440, and the second timing unit 440 starts timing.
  • the second timing unit 440 When the timing exceeds the duration corresponding to the data transmission period, the second timing unit 440 sends a control command to notify the second power management unit 442, and the second power management unit 442 controls the signal detection unit 446, the second DC holding unit 444, and the receiving unit 448 Then the second timing unit 440 restarts the timing, or continues timing, when the timing duration is greater than the link sleep duration, the second timing unit 440 generates control signaling to inform the second power management unit 442, and the second power management unit 442 controls The second DC holding unit 444 is powered on, and at a preset time after the second DC holding unit 444 is controlled to be powered on, the control signal detection unit 446 and the receiving unit 448 are powered on.
  • the first timing unit 240 starts timing until the timing duration of the first timing unit 240 reaches the duration corresponding to the data transmission period.
  • the first timer 240 informs the first
  • the power management unit 242 is controlled by the first power management unit 242 to power off the drive unit 244, and the first DC holding unit 246 is kept powered on; in this case, the first timing unit 240 can continue timing, or restart timing , when the timing duration reaches the duration corresponding to the link sleep period, a control signal is generated to control the driving unit 244 to be powered on, so as to send data to the receiving device 40 .
  • the signal detection unit 446 detects that there is data transmission on the communication line, it informs the second timing unit 440, and the second timing unit 440 starts timing, and controls the signal detection unit 446, the second DC holding unit 444,
  • the receiving unit 448 is powered on, and when the timing of the second timing unit 440 exceeds the duration corresponding to the data transmission period, the second timing unit 440 sends a control instruction to notify the second power management unit 442 , and the second power management unit 442 controls the signal detection unit 446
  • the receiving unit 448 is powered off and controls the second DC holding unit 444 to keep the power-on state; then the second timing unit 440 restarts the timing or continues timing, and when the timing duration is greater than the link sleep duration, the second timing unit 440 generates a control signal.
  • the second power management unit 442 is notified, and the second power management unit 442 controls the signal detection unit 446 and the receiving unit 448 to power on.
  • FIG. 8 is a circuit diagram of an alternative implementation of the communication circuit in FIG. 7 .
  • the driving unit 244 includes a driving circuit 245 and a first power supply VCC1.
  • the input terminal of the driving circuit 245 is coupled to the output terminal of the first control module 22, and the first output terminal of the driving circuit 245 is coupled to the first terminal of the first capacitor C1.
  • the second output terminal of the driving circuit 245 is coupled to the first terminal of the second capacitor C2, and the driving circuit 245 is also coupled to the first power supply VCC1.
  • the input terminal of the driving circuit 245 is used as the input terminal of the driving unit 244
  • the first output terminal and the second output terminal of the driving circuit 245 are used as the output terminal of the driving unit 244 .
  • the first DC holding unit 246 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a second power source VCC2.
  • the first end of the first resistor R1 is respectively coupled to the first end of the third resistor R3 and the first end of the first capacitor C1, the second end of the first resistor R1 is coupled to the second power supply VCC2, and the third resistor R3
  • the second terminal is grounded.
  • the first end of the second resistor R2 is respectively coupled to the first end of the fourth resistor R4 and the first end of the second capacitor C2, the second end of the second resistor R2 is coupled to the second power supply VCC2, and the fourth resistor R4 The second terminal is grounded.
  • the second DC holding unit 444 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8 and a third power source VCC3.
  • the first end of the fifth resistor R5 is respectively coupled to the second end of the first capacitor C1 and the first end of the seventh resistor R7, the second end of the fifth resistor R5 is coupled to the third power supply VCC3, and the seventh resistor R7
  • the second terminal is grounded.
  • the first end of the sixth resistor R6 is respectively coupled to the second end of the second capacitor C2 and the first end of the eighth resistor R8, the second end of the sixth resistor R6 is coupled to the third power supply VCC3, and the eighth resistor R8 The second terminal is grounded.
  • the third power supply VCC3 is also coupled to the signal detection unit 446 to supply power to the signal detection unit 446 .
  • the receiving unit 448 includes a receiving circuit 449 and a fourth power supply VCC4.
  • the input end of the receiving circuit 449 is coupled to the second end of the communication line 60
  • the output end of the receiving circuit 449 is coupled to the second control module 42
  • the receiving circuit 449 is further coupled to the fourth power supply VCC4 .
  • the input end of the receiving circuit 449 serves as the input end of the receiving unit 448
  • the output end of the receiving circuit 449 serves as the output end of the receiving unit 448 .
  • FIG. 9 is a circuit diagram of another alternative implementation of the communication circuit in FIG. 7 .
  • the difference from FIG. 8 is that the first resistor R1 , the second resistor R2 , the third resistor R3 and the fourth resistor R4 of the first DC holding unit 246 are composed of the first MOS transistor Q1 , the second MOS transistor Q2 and the third MOS transistor.
  • the tube Q3 and the fourth MOS tube Q4 are replaced.
  • the source of the first MOS transistor Q1 is respectively coupled to the drain of the third MOS transistor Q3 and the first end of the first capacitor C1, the drain of the first MOS transistor Q1 is coupled to the second power supply VCC2, and the third MOS transistor The source of Q3 is grounded.
  • the source of the second MOS transistor Q2 is respectively coupled to the drain of the fourth MOS transistor Q4 and the first end of the second capacitor C2, the drain of the second MOS transistor Q2 is coupled to the second power supply VCC2, and the fourth MOS transistor The source of Q4 is grounded.
  • the gate g1 of the first MOS transistor Q1 , the gate g2 of the second MOS transistor Q2 , the gate g3 of the third MOS transistor Q3 and the gate g4 of the fourth MOS transistor Q4 are all coupled to the first power management unit 242 .
  • the fifth resistor R5 , the sixth resistor R6 , the seventh resistor R7 , and the eighth resistor R8 of the second DC holding unit 444 are composed of the fifth MOS transistor Q5 , the sixth MOS transistor Q6 , the seventh MOS transistor Q7 and the eighth MOS transistor Q8 replace.
  • the source of the fifth MOS transistor Q5 is respectively coupled to the drain of the seventh MOS transistor Q7 and the second end of the first capacitor C1, the drain of the fifth MOS transistor Q5 is coupled to the third power supply VCC3, and the seventh MOS transistor The source of Q7 is grounded.
  • the source of the sixth MOS transistor Q6 is respectively coupled to the drain of the eighth MOS transistor Q8 and the second end of the second capacitor C2, the drain of the sixth MOS transistor Q6 is coupled to the third power supply VCC3, and the eighth MOS transistor The source of Q8 is grounded.
  • the gate g1 of the fifth MOS transistor Q5 , the gate g2 of the sixth MOS transistor Q6 , the gate g3 of the seventh MOS transistor Q7 and the gate g4 of the eighth MOS transistor Q8 are all coupled to the second power management unit 442 .
  • the above communication circuit can be applied to devices that support protocols such as Serdes, PCIe (peripheral component interconnect express), MIPI (Mobile Industry Processor Interface) C-PHY, MIPI D-PHY, and MIPI M-PHY.
  • Serdes PCIe (peripheral component interconnect express)
  • MIPI Mobile Industry Processor Interface
  • C-PHY MIPI D-PHY
  • MIPI M-PHY MIPI M-PHY
  • the present application further provides a mobile phone, the mobile phone includes the communication circuit described in any of the above embodiments.
  • the sending device 20 is the application processor 100 on the main control board 300 of the mobile phone, the first control module 22 is the micro control unit 11 in the application processor 100, the sending module 24 is the first interface circuit 13 in the application processor 100, and the receiving module 24 is the first interface circuit 13 in the application processor 100.
  • the device 40 is the display screen 200 of the mobile phone, the second control module 42 is the interface controller 71 of the display screen 200 , and the receiving module 44 is the second interface circuit 70 of the display screen 200 .
  • the communication line includes a PCB (Printed Circuit Board, printed circuit board) 30 arranged on the main control board 300 of the mobile phone and an FPC (Flexible Printed Circuit, flexible circuit board) coupled to the main control board 300 of the mobile phone and the display screen 200.
  • the first capacitor C1 and the second capacitor C2 are disposed on the PCB 30 , one end of the FPC 90 is coupled to the PCB 30 through the coupler 50 , and the other end is coupled to the second interface circuit 70 .
  • the present application further provides another mobile phone, which includes the communication circuit described in any of the above embodiments.
  • the application processor 100 periodically sends data to the display screen 200 .
  • the difference from FIG. 10 is that the sending module 13 further includes a first timing unit 137 .
  • the receiving module 70 also includes a second timing unit 739 .
  • the micro-control unit 11 of the mobile phone and the interface controller 71 of the display screen 200 are powered on, the micro-control unit 11 generates a data transmission cycle, and transmits the data transmission cycle to the first timing unit 137, and the interface controller 71 transmits the data to the first timing unit 137.
  • the transmission period is transmitted to the second timing unit 739 , and the second timing unit 739 generates the power-on time and the power-down time according to the data transmission period and transmits the power-on time and the power-down time to the second power management unit 731 .
  • the first power management unit 131 controls the driving unit 133 and the first DC holding unit 135 to be powered on, and controls the driving unit 133 and the first DC holding unit 135 to keep the power-on state
  • the second The power management unit 731 controls the second DC holding unit 733, the signal detecting unit 735 and the receiving unit 737 to be powered on, and controls the second DC holding unit 733, the signal detecting unit 735 and the receiving unit 737 to keep the power-on state
  • the micro-control unit 11 will The parallel data is transmitted to the driving unit 133, the driving unit 133 converts the parallel data into serial data, and sends the serial data to the communication line 60, the signal detection unit 735 detects that there is data transmission on the communication line, and the receiving unit 737 receives the communication The serial data on the line is converted into parallel data, and the receiving unit 737 also transmits the parallel data to the interface controller 71 .
  • the interface controller 71 transmits the received parallel data to the display panel through the timing controller, and the display
  • the first power management unit 131 controls the driving unit 133 and the first DC holding unit 135 to power off, and controls the driving unit 133 and the first DC holding unit 135 to keep the power-off state
  • the second The power management unit 731 controls the second DC holding unit 733, the signal detecting unit 735 and the receiving unit 737 to power off, and controls the second DC holding unit 733, the signal detecting unit 735 and the receiving unit 737 to keep the power off state, and the mobile phone enters low power consumption model.
  • the sending device 20 of the present application may also be a camera 401 in a mobile phone
  • the first control module 22 is an interface controller in the camera 401
  • the sending module 24 is a sending interface circuit in the camera 401
  • the receiving device 40 is The application processor 402 in the mobile phone
  • the second control module 42 is a micro control unit in the application processor 402
  • the receiving module 44 applies the receiving interface circuit in the processor 402 .
  • the micro-control unit in the application processor 402 is used to detect whether the application program on the mobile phone needs to obtain the data in the camera 401.
  • the micro-control unit of the application processor 402 When the micro-control unit of the application processor 402 detects that the application program on the mobile phone needs to obtain the request of the data in the camera 401 , the micro-control unit of the application processor 402 transmits a data sending request to the interface controller of the camera 401 through other communication circuits (not the communication circuit shown in the figure), and the data sending request is used to control the interface controller of the camera 401 to send data,
  • the interface controller of the camera 401 obtains the data to be sent from the storage device, and sends the data to be sent to the receiving interface circuit of the application processor 402 through the sending interface circuit of the camera 401, and the micro control unit of the application processor 402 obtains the application processor 402 The data received by the receive interface circuit.
  • the micro-control unit of the application processor 402 When the micro-control unit of the application processor 402 does not detect the request that the application program on the mobile phone needs to obtain the data in the camera 401, the micro-control unit of the application processor 402 stops sending the request to the interface controller of the camera 401, and the The interface controller stops sending data to the microcontroller unit of the application processor 402 .
  • the sending device 20 of the present application can also be an application processor in a mobile phone, the first control module 22 is a micro-control unit of the application processor, the sending module 24 is a first sending interface circuit of the application processor, and the receiving device 40 is in the mobile phone
  • the storage device, the second control module 42 is the interface controller in the storage device, the receiving module 44 is the first receiving interface circuit in the storage device;
  • the control module 22 is an interface controller of the storage device, the sending module 24 is a second sending interface circuit of the storage device, the receiving device 40 is an application processor in the mobile phone, and the second control module 42 is a micro-control unit in the application processor,
  • the receiving module 44 applies the second receiving interface circuit in the processor.
  • the first transmit interface circuit of the application processor transmits the data to the first receive interface circuit in the storage device.
  • the second transmit interface circuit of the storage device transmits the data to the second receive interface circuit in the application processor.
  • the communication circuit of the present application can also be applied to two independent electronic devices.
  • the sending device 20 can be an application processor of a mobile phone
  • the receiving device 40 can be an external display screen independent of the mobile phone.
  • the application processor of the mobile phone communicates with the mobile phone through the communication line.
  • the external display screen is coupled, wherein the coupling capacitor may be located on the communication line of the external display screen, or may be located on the communication line of the mobile phone.
  • the sending device 20 may also be a desktop computer, the receiving device 40 may be a memory card, and the desktop computer is coupled to the memory card through a communication line.
  • the sending device 20 may also be a tablet computer, the receiving device 40 may be a camera, and the tablet computer is coupled to the camera through a communication line.
  • the sending apparatus 20 may also be a desktop computer, and the receiving apparatus 40 may be a Wi-Fi device, and the desktop computer is coupled to the Wi-Fi device through a communication line.
  • the communication circuit of the present application can also be applied to other electronic devices.

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Abstract

一种通信电路及电子设备，包括发送装置、通信线路和接收装置，发送装置与接收装置之间通过通信线路连接，第一电源管理单元与第一直流保持单元耦接，第一直流保持单元与通信线路的第一端耦接；第二电源管理单元与第二直流保持单元耦接，第二直流保持单元与通信线路的第二端耦接；第一电源管理单元控制第一直流保持单元上电，并控制第一直流保持单元保持上电状态；第一直流保持单元保持通信线路的第一端的直流电压为第一预设电压；第二电源管理单元控制第二直流保持单元上电，并控制第二直流保持单元保持上电状态；第二直流保持单元保持通信线路的第二端的直流电压为第二预设电压。

Description

通信电路及电子设备 技术领域
本申请涉及通信技术领域，特别涉及一种通信电路及电子设备。
背景技术
随着科学技术的迅速发展，单板上的芯片数目越来越多，芯片之间组成快速通信的互连架构。一般情况下，多个芯片之间通过接口交换芯片或接口现场可编程门矩阵耦接。串并转换器(serializer/deserializer，简称：Serdes)用于实现发送端与接收端之间的数据传输。串并转换器由于具有传输带宽高、信号数量少等优点，而广泛应用于芯片之间的高速通信中。Serdes接口在线路实现上包括AC(alternating current，交流电)耦合和DC(direct current，直流电)耦合两种方式，AC耦合方式需要接入耦合电容，以隔离发送芯片与接收芯片之间的直流分量。
传统的Serdes接口为了降低功耗，通常在数据传输间隙关闭发送模块和接收模块，Serdes接口进入低功耗模式下。Serdes接口在低功耗模式下，发送模块输出为低电平。Serdes接口在退出低功耗模式(即唤醒)时，发送模块的输出可以快速建立到预期的工作电平。当Serdes接口采用AC耦合方式时，由于耦合电容的存在，Serdes接口在唤醒时需先对电容充电，接收模块无法快速达到预期的工作电平，导致Serdes接口退出低功耗模式的时间长，接收模块在达到预期的工作电平前，无法接收数据，导致数据传输效率低。
发明内容
本申请提供了一种通信电路及电子设备，以提高数据传输效率。
第一方面，本申请提供了一种通信电路，包括发送装置、通信线路和接收装置，所述发送装置与所述接收装置之间通过所述通信线路连接，所述通信线路用于所述发送装置与所述接收装置之间传输数据，所述通信线路上设置有耦合电容，所述发送装置包括：第一电源管理单元及第一直流保持单元，所述第一电源管理单元与所述第一直流保持单元耦接，所述第一直流保持单元与通信线路的第一端耦接；所述接收装置包括：第二电源管理单元及第二直流保持单元；所述第二电源管理单元与所述第二直流保持单元耦接，所述第二直流保持单元与所述通信线路的第二端耦接；
所述第一电源管理单元用于控制所述第一直流保持单元上电，并控制所述第一直流保持单元保持上电状态；
所述第一直流保持单元用于保持所述通信线路的第一端的直流电压为第一预设电压；
所述第二电源管理单元用于控制所述第二直流保持单元上电，并控制所述第二直流保持单元保持上电状态；
所述第二直流保持单元用于保持所述通信线路的第二端的直流电压为第二预设电压。
通过第一直流保持单元保持通信线路的第一端的直流电压为第一预设电压，第二直流保持单元保持通信线路的第二端的直流电压为第二预设电压，从而通信线路两端的直流电压能够分别保持为第一预设电压和第二预设电压，当通信电路退出低功耗模式，发送数据时，通信线路上的电容无需经历充电的过程，从而通信电路退出低功耗模式的时间减少，提高了通信电路的数据传输效率。
在一种可能的设计中，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述通信线路包括第一信号线及第二信号线，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容；所述第一直流保持单元包括第一电阻、第二电阻、第三电阻、第四电阻及第二电源，所述第一电阻的第一端分别与所述第三电阻的第一端及所述第一信号线的第一端耦接，所述第一电阻的第二端与所述第二电源耦接，所述第三电阻的第二端接地，所述第二电阻的第一端分别与所述第四电阻的第一端及所述第二信号线的第一端耦接，所述第二电阻的第二端与所述第二电源耦接，所述第四电阻的第二端接地；
其中，
Figure PCTCN2021140043-appb-000001
r1为所述第一电阻的阻值，r2为所述第二电阻的阻值，r3为所述第三电阻的阻值，r4为所述第四电阻的阻值；
所述第二直流保持单元包括第五电阻、第六电阻、第七电阻、第八电阻及第三电源，所述第五电阻的第一端分别与所述第一信号线的第二端及所述第七电阻的第一端耦接，所述第五电阻的第二端与所述第三电源耦接，所述第七电阻的第二端接地，所述第六电阻的第一端分别与所述第二信号线的第二端及所述第八电阻的第一端耦接，所述第六电阻的第二端与所述第三电源耦接，所述第八电阻的第二端接地；
其中，
Figure PCTCN2021140043-appb-000002
r5为所述第五电阻的阻值，r6为所述第六电阻的阻值，r7为所述第七电阻的阻值，r8为所述第八电阻的阻值；
所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
在一种可能的设计中，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容，所述通信线路包括第一信号线及第二信号线，所述第一直流保持单元包括第一MOS管、第二MOS管、第三MOS管及第四MOS管，所述第一MOS管的源极分别与所述第三MOS管的漏极及所述第一信号线的第一端耦接，所述第一MOS管的漏极与所述第二电源耦接，所述第三MOS管的源极接地，所述第二MOS管的源极分别与所述第四MOS管的漏极及所述第二信号线的第一端耦接，所述第二MOS管的 漏极与所述第二电源耦接，所述第四MOS管的源极接地，所述第一MOS管的栅极、所述第二MOS管的栅极、所述第三MOS管的栅极及所述第四MOS管的栅极均与所述第一电源管理单元耦接；
其中，
Figure PCTCN2021140043-appb-000003
r1’为所述第一MOS管的源极和漏极之间的等效阻值，r2’为所述第二MOS管的源极和漏极之间的等效阻值，r3’为所述第三MOS管的源极和漏极之间的等效阻值，r4’为所述第四MOS管的源极和漏极之间的等效阻值；
所述第二直流保持单元包括第五MOS管、第六MOS管、第七MOS管及第八MOS管，所述第五MOS管的源极分别与所述第七MOS管的漏极及所述第一信号线的第二端耦接，所述第五MOS管的漏极与所述第三电源耦接，所述第七MOS管的源极接地，所述第六MOS管的源极分别与所述第八MOS管的漏极及所述第二信号线的第二端耦接，所述第六MOS管的漏极与所述第三电源耦接，所述第八MOS管的源极接地，所述第五MOS管的栅极、所述第六MOS管的栅极、所述第七MOS管的栅极及所述第八MOS管的栅极均与所述第二电源管理单元耦接；
其中，
Figure PCTCN2021140043-appb-000004
r5’为所述第五MOS管的源极和漏极之间的等效阻值，r6’为所述第六MOS管的源极和漏极之间的等效阻值，r7’为所述第七MOS管的源极和漏极之间的等效阻值，r8’为所述第八MOS管的源极和漏极之间的等效阻值；
所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
在一种可能的设计中，所述发送装置还包括：第一控制模块和驱动单元，所述第一控制模块与所述第一电源管理单元耦接，所述驱动单元分别与所述第一控制模块、所述第一电源管理单元及所述通信线路的第一端耦接；
所述第一控制模块还用于接收数据发送请求，并根据所述数据发送请求传输第三控制信号至所述第一电源管理单元和传输并行数据至所述驱动单元；
所述第一电源管理单元还用于根据所述第三控制信号控制所述驱动单元上电；
所述驱动单元用于将并行数据转换成串行数据，并将所述串行数据发送至所述通信线路；
所述第一控制模块还用于接收停止发送请求，并根据所述停止发送请求传输第五控制信号至所述第一电源管理单元；
所述第一电源管理单元还用于根据所述第五控制信号控制所述驱动单元下电。
通过本实施例提供的方案，当第一控制模块接收到停止发送请求时，第一电源管理单元控制驱动单元下电，可以使得通信线路进入低功耗模式，节省功耗。
在一种可能的设计中，所述接收装置还包括：信号检测单元及接收单元，所述接收单元与所述通信线路的第二端耦接，所述信号检测单元耦接于所述通信线路的第二端与所述接收单元之间，所述接收单元及所述信号检测单元还与所述第二电源 管理单元耦接；
所述接收单元用于接收所述通信线路上的串行数据，并将所述串行数据转换成并行数据；
所述第二电源管理单元还用于根据所述第二控制信号控制所述信号检测单元上电；
所述信号检测单元用于检测所述通信线路上是否有数据传输，当所述信号检测单元检测到所述通信线路上有数据传输时，所述信号检测单元传输第四控制信号至所述第二电源管理单元；
所述第二电源管理单元根据所述第四控制信号控制所述接收单元上电，并控制所述接收单元保持上电状态；
当所述信号检测单元检测到所述通信线路上没有数据传输时，所述信号检测单元传输第六控制信号至所述第二电源管理单元，所述第二电源管理单元根据所述第六控制信号控制所述接收单元下电。
通过本实施例提供的方案，当所述通信线路上没有数据传输时，第二电源管理单元控制接收单元下电，可以使得通信线路进入低功耗模式，节省功耗。
第二方面，本申请还提供一种通信电路，包括发送装置、通信线路和接收装置，所述发送装置与所述接收装置之间通过所述通信线路连接，所述通信线路用于所述发送装置与所述接收装置之间传输数据，所述通信线路上设置有耦合电容，所述发送装置包括：第一定时单元、第一电源管理单元及第一直流保持单元，所述第一电源管理单元分别与所述第一定时单元及所述第一直流保持单元耦接，所述第一直流保持单元与通信线路的第一端耦接；所述接收装置包括：第二定时单元、第二电源管理单元及第二直流保持单元，所述第二电源管理单元分别与所述第二定时单元及所述第二直流保持单元耦接，所述第二直流保持单元与所述通信线路的第二端耦接；
所述第一定时单元用于生成上电时间和下电时间，并将所述上电时间和所述下电时间传输至所述第一电源管理单元；
所述第一电源管理单元用于在所述上电时间控制所述第一直流保持单元上电，所述上电时间之后的预设时间为数据发送时间；
所述第一电源管理单元还用于在所述下电时间控制所述第一直流保持单元下电；
所述第一直流保持单元用于保持所述通信线路的第一端的直流电压为第一预设电压；
所述第二定时单元用于生成上电时间和下电时间，并将所述上电时间和所述下电时间传输至所述第二电源管理单元；
所述第二电源管理单元用于在所述上电时间控制所述第二直流保持单元上电，所述上电时间之后的预设时间为数据发送时间；
所述第二电源管理单元还用于在所述下电时间控制所述第二直流保持单元下电；
所述第二直流保持单元用于保持所述通信线路的第二端的直流电压为第二预设电压。
通过设置第一定时单元以及设置第二定时单元，第一定时单元根据数据传输周 期生成上电时间和下电时间，第二定时单元根据数据传输周期生成上电时间和下电时间，当当前时间为上电时间时，第一电源管理单元控制第一直流保持单元上电，并控制第一直流保持单元保持上电状态，第二电源管理单元控制第二直流保持单元上电，并控制第二直流保持单元保持上电状态，从而在第一控制模块需要发送数据时，通信线路的第一端的直流电压能够达到第一预设电压，通信线路的第二端的直流电压能够达到第二预设电压，当当前时间为下电时间时，第一电源管理单元控制第一直流保持单元下电，第二电源管理单元控制第二直流保持单元下电，从而能够降低通信电路的功耗。
在一种可能的设计中，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述通信线路包括第一信号线及第二信号线，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容；所述第一直流保持单元包括第一电阻、第二电阻、第三电阻、第四电阻及第二电源，所述第一电阻的第一端分别与所述第三电阻的第一端及所述第一信号线的第一端耦接，所述第一电阻的第二端与所述第二电源耦接，所述第三电阻的第二端接地，所述第二电阻的第一端分别与所述第四电阻的第一端及所述第二信号线的第一端耦接，所述第二电阻的第二端与所述第二电源耦接，所述第四电阻的第二端接地；
其中，
Figure PCTCN2021140043-appb-000005
r1为所述第一电阻的阻值，r2为所述第二电阻的阻值，r3为所述第三电阻的阻值，r4为所述第四电阻的阻值；
所述第二直流保持单元包括第五电阻、第六电阻、第七电阻、第八电阻及第三电源，所述第五电阻的第一端分别与所述第一信号线的第二端及所述第七电阻的第一端耦接，所述第五电阻的第二端与所述第三电源耦接，所述第七电阻的第二端接地，所述第六电阻的第一端分别与所述第二信号线的第二端及所述第八电阻的第一端耦接，所述第六电阻的第二端与所述第三电源耦接，所述第八电阻的第二端接地；
其中，
Figure PCTCN2021140043-appb-000006
r5为所述第五电阻的阻值，r6为所述第六电阻的阻值，r7为所述第七电阻的阻值，r8为所述第八电阻的阻值；
所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
在一种可能的设计中，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容，所述通信线路包括第一信号线及第二信号线，所述第一直流保持单元包括第一MOS管、第二MOS管、第三MOS管及第四MOS管，所述第一MOS管的源极分别与所述第三MOS管的漏极及所述第一信号线的第一端耦接，所述第一MOS管的漏极与所述第二电源耦接，所述第三MOS管的源极接地，所述第二MOS管的源极分别与所述第四MOS管的漏极及所述第二信号线的第一端耦接，所述第二MOS管的漏极与所述第二电源耦接，所述第四MOS管的源极接地，所述第一MOS管的栅极、所述第二MOS管的栅极、所述第三MOS管的栅极及所述第四MOS管的栅极均与所 述第一电源管理单元耦接；
其中，
Figure PCTCN2021140043-appb-000007
r1’为所述第一MOS管的源极和漏极之间的等效阻值，r2’为所述第二MOS管的源极和漏极之间的等效阻值，r3’为所述第三MOS管的源极和漏极之间的等效阻值，r4’为所述第四MOS管的源极和漏极之间的等效阻值；
所述第二直流保持单元包括第五MOS管、第六MOS管、第七MOS管及第八MOS管，所述第五MOS管的源极分别与所述第七MOS管的漏极及所述第一信号线的第二端耦接，所述第五MOS管的漏极与所述第三电源耦接，所述第七MOS管的源极接地，所述第六MOS管的源极分别与所述第八MOS管的漏极及所述第二信号线的第二端耦接，所述第六MOS管的漏极与所述第三电源耦接，所述第八MOS管的源极接地，所述第五MOS管的栅极、所述第六MOS管的栅极、所述第七MOS管的栅极及所述第八MOS管的栅极均与所述第二电源管理单元耦接；
其中，
Figure PCTCN2021140043-appb-000008
r5’为所述第五MOS管的源极和漏极之间的等效阻值，r6’为所述第六MOS管的源极和漏极之间的等效阻值，r7’为所述第七MOS管的源极和漏极之间的等效阻值，r8’为所述第八MOS管的源极和漏极之间的等效阻值；
所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
在一种可能的设计中，所述发送装置还包括：第一控制模块及驱动单元，所述第一控制模块分别与所述驱动单元及所述第一定时单元耦接，所述驱动单元分别与所述第一电源管理单元及所述通信线路的第一端耦接；
所述第一控制模块用于传输数据传输周期和链路休眠周期至所述第一定时单元，以及传输并行数据至所述驱动单元，所述数据传输周期为每次数据传输的传输时长，所述链路休眠周期为每两次数据之间的时间间隔；
所述第一定时单元用于基于所述数据传输周期和所述链路休眠时间确定所述上电时间和所述下电时间；
所述第一电源管理单元还用于在所述上电时间之后的预设时间控制所述驱动单元上电；
所述驱动单元用于将并行数据转换成串行数据，并将所述串行数据发送至所述通信线路；
所述第一电源管理单元还用于在所述下电时间控制所述驱动单元下电。
通过本实施例提供的方案，当第一控制模块接收到停止发送请求时，第一电源管理单元控制驱动单元下电，可以使得通信线路进入低功耗模式，节省功耗。
在一种可能的设计中，所述接收装置还包括：第二控制模块、信号检测单元及接收单元，所述第二控制模块与所述第二定时单元耦接，所述接收单元与所述通信线路的第二端耦接，所述信号检测单元耦接于所述通信线路的第二端与所述接收单元之间，所述接收单元及所述信号检测单元还与所述第二电源管理单元耦接；
所述第二控制模块用于传输数据传输周期和链路休眠周期至所述第二定时单元， 以及传输并行数据至所述接收单元，所述数据传输周期为每次数据传输的传输时长，所述链路休眠周期为每两次数据数据之间的时间间隔；
所述第二定时单元用于基于所述数据传输周期和所述链路休眠时间确定所述上电时间和所述下电时间；
所述第二电源管理单元用于在所述上电时间之后的预设时间控制所述信号检测单元及所述接收单元上电；
所述信号检测单元用于检测所述通信线路上是否有数据传输；
所述接收单元用于接收所述通信线路上的串行数据，并将所述串行数据转换成并行数据；
所述第二电源管理单元用于在所述下电时间控制所述信号检测单元及所述接收单元下电。
通过本实施例提供的方案，当所述通信线路上没有数据传输时，第二电源管理单元控制接收单元下电，可以使得通信线路进入低功耗模式，节省功耗。
第二方面，本申请提供一种电子设备，包括第一方面或第二方面所述的通信电路。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1a和图1b为现有技术中通信电路的耦合方式示意图；
图2为现有技术中通信电路的数据传输示意图；
图3为现有技术中通信电路工作模式转换示意图；
图4是本申请一实施例中通信电路的原理示意图；
图5是本申请另一实施例中通信电路的原理示意图；
图6是本申请另一实施例中通信电路的原理示意图；
图7是本申请另一实施例中通信电路的原理示意图；
图8是本申请另一实施例中通信电路的原理示意图；
图9是本申请另一实施例中通信电路的原理示意图；
图10是本申请一实施例中手机的结构示意图；
图11是本申请一实施例中手机的结构示意图；
图12是本申请另一实施例中手机的结构示意图；
图13是本申请另一实施例中手机的结构示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释 本申请，并不用于限定本申请。
在本申请的描述中，除非另有明确的规定和限定，术语“第一”、“第二”仅用于描述的目的，而不能理解为指示或暗示相对重要性；除非另有规定或说明，术语“多个”是指两个或两个以上；术语“耦接”、“固定”等均应做广义理解，例如，“耦接”可以是固定耦接，也可以是可拆卸耦接，或一体地耦接，或电连接；可以是直接相连，也可以通过中间媒介间接相连。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本发明中的具体含义。
本申请实施例提供了一种通信电路，该通信电路可以是Serdes接口，当然，本申请的通信电路也可以应用于其他串转并电路，或者还可以为其他形式的电路，本申请实施例不作限制。该通信电路可以应用于电子设备中，该电子设备例如为平板、手机、一体机、显示器、台式机等等，本申请后续将主要以该通信电路应用于手机为例进行介绍，在具体实施过程中，该手机也可以替换为其他任意电子设备。该通信电路可以是手机的应用处理器与手机的显示屏之间连接的通信电路，还可以是手机的应用处理器与手机的摄像头之间连接的通信电路或者手机的应用处理器与手机的存储器之间连接的通信电路等等。该通信电路还可以应用于其他包含两个独立设备的电子设备中，如，手机和独立于手机的外部显示屏，该通信电路为手机的应用处理器与外部显示屏之间连接的通信电路。
因此本申请的方案包含单独存在发送装置、或单独存在接收装置的方案。例如：本申请实施例可以提供一种发送装置、一种接收装置、一种包含该发送装置和接收装置的通信装置；本申请实施例还可以提供一种包含发送装置的电子设备、一种包含接收装置的电子设备、一种既包含该发送装置又包含该接收装置的电子设备等等。在电子设备既包含发送装置，又包含接收装置的情况下，该发送装置与接收装置可以组成该通信电路，又或者，在电子设备既包含发送装置，又包含接收装置的情况下，该电子设备的发送装置与其他电子设备的接收装置组成通信电路，该电子设备的接收装置与其他电子设备的发送装置组成该通信电路；在电子设备包含该通信电路的情况下，该电子设备还可以另外包含单独的发送装置、或者包含单独的接收装置、或者既包含单独的发送装置又包含单独的接收装置，本申请实施例不作限制。
在本申请实施例中，通信电路又可以称为通信模块、通信组件、通信单元、通信装置等等。发送装置又可以称为发送端、发送单元、发送组件、发送电路等等；接收装置又可以称为接收端、接收单元、接收组件、接收电路等等。
如图1a和图1b所示，通信电路包括发送装置和接收装置，发送装置包括第一控制模块及发送模块，接收装置包括接收模块及第二控制模块。第一控制模块与发送模块耦接，发送模块通过差分信号线与接收模块耦接，第二控制模块与接收模块耦接。差分信号线包括P极差分信号线和N极差分信号线。
发送模块和接收模块用于实现Serdes接口的功能，实现数据的串并转换。Serdes接口具有传输带宽高、信号数量少等优点。发送装置与接收装置的耦接方式可以是DC耦接(如图1a所示)或AC耦接(如图1b所示)。当发送装置与接收装置之间采用AC方式耦接时，需要在差分信号线上设置耦合电容，以隔离发送装置与接收装 置之间的直流分量，减少发送装置与接收装置之间的直流干扰。
传统的通信电路为了降低功耗，如图2所示，在数据传输间隙，第一控制模块控制发送模块下电，发送模块输出的直流电压为低电平，当发送模块输出的直流电压为低电平时，发送模块无法发送数据，接收模块检测到差分信号线上没有数据传输，第二控制模块控制接收模块下电，接收模块输入的直流电压为低电平，耦合电容两端的电压为低电平，此时，发送模块和接收模块以低功耗模式运行。数据传输间隙为任意两个相邻的数据包之间的传输时间间隔，如，图2中数据包1与数据包2之间的传输时间间隔。数据传输间隙可以为任意两个相邻数据包之间的传输时间间隔。低电平的电压可例如为0-30mV。当第一控制模块需要传输数据时，第一控制模块控制发送模块上电，如图3所示，发送模块输出的直流电压可以快速建立到预设工作电压Vcm，当发送模块输出的直流电压达到预设工作电压Vcm时，发送模块可以发送数据，发送模块进入数据传输模式。
当通信电路采用AC方式耦接时，由于差分信号线上存在耦合电容，发送模块上电后需要对耦合电容进行充电，使得耦合电容两端的电压为预设工作电压Vcm，耦合电容两端的电压不能从低电平突变为预设工作电压Vcm，而是需要一定的时间从低电平逐渐增加至预设工作电压Vcm，因此，接收模块输入的直流电压不能快速达到预设工作电压Vcm。当接收模块输入的直流电压达到预设工作电压Vcm时，接收模块才可以接收数据，进入数据传输模式。因此，接收模块退出低功耗模式的时间较长，相对于发送模块，接收模块退出低功耗模式产生延迟(例如20us)，导致发送模块与接收模块之间数据传输效率低。
当发送模块输出的交流电压为800mV时，预设工作电压Vcm可以为400mV；当发送模块输出的交流电压为1200mV时，预设工作电压Vcm可以为600mV。发送装置在出厂时，发送模块输出的交流电压和发送模块的预设工作电压Vcm已设置好。低功耗模式为发送模块输出的直流电压为低电平和接收模块输入的直流电压为低电平。数据传输模式为发送模块输出的电压(例如：直流电压)为预设工作电压Vcm，接收模块输入的电压(例如：直流电压)为预设工作电压Vcm。
如图2所示，数据包在通信电路中需要在预设的数据发送时间点进行发送，当耦合电容的充电时间大于第一预设时间时，数据包不能在预设的数据发送时间点进行传输，因此，接收模块在第二预设时间内检测到差分信号线上没有数据传输，第二控制模块保持控制接收模块下电，接收模块输入的直流电压为低电平，接收模块无法退出低功耗模式。
第一预设时间可例如是10us～21us。第二预设时间可例如是95us～105us。
预设的数据发送时间点可以由第一控制模块设置，例如，当通信电路为手机的应用处理器与手机的显示屏之间连接的通信电路时，第一控制模块可以根据显示屏的显示周期设置预设的数据发送时间点。第一预设时间由发送模块输出的电压、发送模块输出的电流和耦合电容的电容值决定。第二预设时间由第二控制模块设置。
为解决接收模块退出低功耗模式的时间较长或无法退出低功耗模式问题，现有的通信电路采用在数据传输间隙传输无效数据的方式，避免发送模块和接收模块进入低功耗模式，保证数据包在第一预设时间进行传输。但此方式，通信电路的功耗较高。
无效数据为用特定数据填充的数据包，如，无效数据中的数据均为“0”，接收装置在接收到无效数据时，将无效数据丢弃。
图4是本申请一实施例中通信电路的原理示意图。通信电路包括发送装置20、接收装置40及耦接发送装置20与接收装置40的通信线路60。通信线路60包括第一信号线及第二信号线，第一信号线上设置有第一电容C1，第二信号线上设置有第二电容C2。第一信号线及第二信号线可以是差分信号线，第一信号线可以是P极差分信号线，第二信号线可以是N极差分信号线。第一电容C1和第二电容C2用于隔离发送装置20与接收装置40之间的直流分量，减少发送装置20与接收装置40之间的的直流干扰。第一电容C1和第二电容C2的电容值可以相等或者不等，第一电容C1和第二电容C2的电容值可例如为100nF～1000nF。相同电容值的第一电容C1和第二电容C2可以保证P极差分信号线和N极差分信号线上传输的信号无差异。
发送装置20可以是手机的应用处理器。发送装置20包括第一控制模块22及发送模块24。发送模块24包括第一电源管理单元242、驱动单元244及第一直流保持单元246。第一控制模块22的输出端与驱动单元244的输入端耦接。第一控制模块22的控制端与第一电源管理单元242的输入端耦接。驱动单元244的输出端与通信线路60的第一端耦接。第一直流保持单元246耦接于驱动单元244的输出端与通信线路60的第一端之间。第一电源管理单元242的输出端分别与驱动单元244和第一直流保持单元246耦接。
发送模块24中包含的结构可以独立的结构或者其他组合方式。例如，发送装置20包括第一控制模块22、发送模块24及第一电源管理单元242，发送模块24包括驱动单元244及第一直流保持单元246，或者，发送装置20包括第一控制模块22、第一电源管理单元242、驱动单元244及第一直流保持单元246。
第一控制模块22用于接收数据发送请求。可以是应用处理器中的微控制单元(Microcontroller Unit，MCU)，第一控制模块22的输入端可以与存储装置耦接，用于从存储装置获取待发送数据，第一控制模块22获取到的待发送数据为并行数据。存储装置可以是DDR(Double Data Rate，双倍速率同步动态随机存储器)或Flash存储器或UFS(Univeral Flash Storage，通用闪存)。第一控制模块22还用于将并行数据发送至驱动单元244。
发送模块24可以是应用处理器中的接口电路。
第一电源管理单元242受第一控制模块22的控制。第一电源管理单元242用于根据第一控制模块22的控制指令，控制驱动单元244上电和下电。第一电源管理单元242还用于根据第一控制模块22的控制指令，控制第一直流保持单元246上电和下电。驱动单元244用于将并行数据转换成串行数据，并通过调节输出至通信线路60的驱动电压和驱动电流，从而将串行数据发送至通信线路60。其中，驱动电压包 括直流电压和交流电压。第一直流保持单元246用于保持驱动单元244的输出端与通信线路60的第一端之间的直流电压为第一预设电压。
接收装置40可以是手机的显示屏。接收装置40包括第二控制模块42及接收模块44。接收模块44包括第二电源管理单元442、第二直流保持单元444、信号检测单元446及接收单元448。接收单元448的输入端与通信线路60的第二端耦接，接收单元448的输出端与第二控制模块42的输入端耦接。第二控制模块42的控制端与第二电源管理单元442的输入端耦接。第二电源管理单元442的输出端分别与第二直流保持单元444及信号检测单元446耦接。第二直流保持单元444及信号检测单元446耦接于通信线路60的第二端和接收单元448的输入端之间。
第一电容C1和第二电容C2位于通信线路60的第一端与第二端之间。第一电容C1和第二电容C2可以分别包含一个电容，从而可以保证通信线路60的信号传输质量。第一电容C1可以为第一电容组合，该第一电容组合可以包含一个或多个电容，或者还可以包含电容之外的其他部件；第二电容C1可以为第二电容组合，该第二电容组合可以包含一个或多个电容，或者还可以包含电容之外的其他部件。
第二控制模块42可以是显示屏的接口控制器。显示屏还包括时序控制器和显示面板。第二控制模块42用于通过时序控制器将数据传输至显示面板，显示面板显示该数据。
接收模块44可以是显示屏的接口电路。
第二电源管理单元442受信号检测单元446的控制。第二电源管理单元442用于根据信号检测单元446的控制指令，控制第二直流保持单元444上电和下电。第二电源管理单元442还用于根据信号检测单元446的控制指令，控制信号检测单元446上电和下电。第二电源管理单元442还用于根据信号检测单元446的控制指令，控制接收单元448上电和下电。信号检测单元446用于检测通信线路60上是否有数据传输。接收单元448用于接收通信线路60上的串行数据，并将串行数据转换成并行数据，接收单元448还用于将该并行数据传输至第二控制模块42。第二直流保持单元444用于保持接收单元448的输入端与通信线路60的第二端之间的直流电压为第二预设电压。
第二电源管理单元442还可以受第二控制模块42的控制。第二电源管理单元442还可以根据第二控制模块42的控制指令，控制第二直流保持单元444上电和下电。第二电源管理单元442还可以根据第二控制模块42的控制指令，控制信号检测单元446上电和下电。第二电源管理单元442还可以根据第二控制模块42的控制指令，控制接收单元448上电和下电。
第二控制模块42对第二电源管理单元442控制的优先级可以高于信号检测单元446对第二电源管理单元442控制的优先级。例如，在同一时间，第二控制模块42传输给第二电源管理单元442的控制指令为控制接收单元448上电的指令，信号检测单元446传输给第二电源管理单元442的控制指令为控制接收单元448下电的指令，第二电源管理单元442根据第二控制模块42的控制指令控制接收单元448上电。
以下以通信电路应用于手机为例，对通信电路的工作原理进行说明。
手机开机后，手机的微控制单元和显示屏的接口控制器上电启动，当微控制单元检测到其自身上电时，微控制单元可以生成数据发送请求，并根据数据发送请求生成第一控制信号，微控制单元将第一控制信号传输至第一电源管理单元242，第一电源管理单元242根据第一控制信号控制第一直流保持单元246上电，并控制第一直流保持单元246保持上电状态，第一控制信号为控制第一直流保持单元246上电和控制第一直流保持单元246保持上电状态的指令。第一直流保持单元246在上电后，保持驱动单元244的输出端与通信线路60的第一端之间的直流电压为第一预设电压。接口控制器生成第二控制信号并将第二控制信号传输至第二电源管理单元442，第二电源管理单元442根据第二控制信号控制第二直流保持单元444和信号检测单元446上电，并控制第二直流保持单元444和信号检测单元446保持上电状态。第二控制信号为控制第二直流保持单元444和信号检测单元446上电的指令，第二控制信号也为控制第二直流保持单元444和信号检测单元446保持上电状态的指令。第二直流保持单元444在上电后，保持接收单元448的输入端与通信线路60的第二端之间的直流电压为第二预设电压。由于显示面板在手机开机后就需要显示数据，因此，当微控制单元检测到其自身上电时，微控制单元生成数据发送请求，微控制单元根据数据发送请求生成第一控制信号的同时，微控制单元从存储装置获取待发送数据，微控制单元获取到的待发送数据为并行数据，微控制单元生成第三控制信号并将第三控制信号传输至第一电源管理单元242，第一电源管理单元242根据第三控制信号控制驱动单元244上电，并控制驱动单元244保持上电状态，第三控制信号为控制驱动单元244上电和控制驱动单元244保持上电状态的指令。微控制单元将并行数据发送至驱动单元244。驱动单元244在上电后，能够接收微控制单元发送的并行数据，并将并行数据转换成串行数据，驱动单元244还通过调节输出至通信线路60的驱动电压和驱动电流，从而将串行数据发送至通信线路60。信号检测单元446检测到通信线路60上的交流电压值大于预设电压值，从而判断通信线路60上有数据传输，信号检测单元446生成第四控制信号并将第四控制信号传输至第二电源管理单元442，第二电源管理单元442根据第四控制信号控制接收单元448上电，并控制接收单元448保持上电状态，第四控制信号为控制接收单元448上电和控制接收单元448保持上电状态的指令。接收单元448在上电后，接收通信线路60上的串行数据，并将串行数据转换成并行数据，接收单元448还将转换后的并行数据传输至接口控制器。接口控制器将接收到的并行数据通过时序控制器传输至显示面板，显示面板显示该并行数据。
当手机进入待机模式，即存储装置中没有需要显示的数据时，存储装置可以传输停止发送请求至微控制单元，该停止发送请求可以表示存储装置中没有需要显示的数据的指令。微控制单元根据停止发送请求生成第五控制信号，并将第五控制信号传输至第一电源管理单元242，第一电源管理单元242根据第五控制信号控制驱动单元244下电，并控制驱动单元244保持下电状态，第五控制信号为控制驱动单元244下电和控制驱动单元244保持下电状态的指令。驱动单元244在下电后，输出的驱动电压为低电平，在预设检测时间内，信号检测单元446检测到通信线路60上的 交流电压值均小于等于预设电压值，从而判断通信线路60上没有数据传输，信号检测单元446生成第六控制信号并将第六控制信号传输至第二电源管理单元442，第二电源管理单元442根据第六控制信号控制接收单元448下电，并控制接收单元448保持下电状态，第六控制信号为控制接收单元448下电和控制接收单元448保持下电状态的指令。应用处理器和显示屏进入低功耗模式，此时，由于驱动单元244和接收单元448均下电和保持下电状态，能够降低手机的功耗。
本实施例中，在应用处理器和显示屏进入低功耗模式时，第一电源管理单元242控制第一直流保持单元246保持上电状态，第二电源管理单元442控制第二直流保持单元444和信号检测单元446保持上电状态。
第一预设电压与驱动单元244输出的直流电压相等，第二预设电压与接收单元448输入的直流电压相等。第一预设电压与第二预设电压可以相同，也可以不相同。
信号检测单元446可以包括运算放大器，运算放大器的同向输入端与P极差分信号线连接，运算放大器的反向输入端与N极差分信号线连接，P极差分信号线和N极差分信号线的交流电压分别通过同向输入端和反向输入端输入运算放大器，运算放大器的输出结果代表交流电压的幅度是否大于预设幅度，信号检测单元446进而判断通信线路60是否有数据传输。
预设电压值可例如是100mV～1200mV。通信电路应用于手机中时，预设电压值例如为400mV或800mV。预设检测时间可例如是95us～105us。
当通信电路为手机的应用处理器与手机的摄像头之间连接的通信电路时，发送装置20可以为手机的摄像头，接收装置40为可以手机的应用处理器，第一控制模块22为摄像头中的接口控制器，第二控制模块42为应用处理器中的微控制单元。第一电容C1和第二电容C2可以设置在位于摄像头上的通信线路60上，也可以设置在位于应用处理器上的通信线路60上。手机开机后，摄像头中的接口控制器和应用处理器中的微控制单元上电启动，当应用处理器的微控制单元检测到手机上的应用程序需要获取摄像头中的数据的请求时，应用处理器的微控制单元通过其他通信电路(非图所示的通信电路)传输数据发送请求至摄像头的接口控制器，该数据发送请求用于控制摄像头的接口控制器发送数据，摄像头的接口控制器从存储装置获取待发送数据，微控制单元通过第二电源管理单元442控制第二直流保持单元444和信号检测单元446上电，并控制第二直流保持单元444和信号检测单元446保持上电状态。摄像头的接口控制器通过第一电源管理单元242控制第一直流保持单元246和驱动单元244上电，并控制第一直流保持单元246和驱动单元244保持上电状态。摄像头的驱动单元244将数据发送至应用处理器的接收单元448。当应用处理器的微控制单元没有检测到手机上的应用程序需要获取摄像头中数据的请求时，应用处理器的微控制单元传输停止发送请求至摄像头的接口控制器，该停止发送请求用于控制摄像头的接口控制器停止发送数据，微控制单元通过第二电源管理单元442控制第二直流保持单元444和信号检测单元446保持上电状态，摄像头的接口控制器通过第一电源管理单元242控制第一直流保持单元246和驱动单元244保持上电状态。
本实施例中，无论第一控制模块22是否发送数据，第一电源管理单元242均控 制第一直流保持单元246保持上电状态，第二电源管理单元442均控制第二直流保持单元444保持上电状态，由于第一直流保持单元246能够保持驱动单元244的输出端与通信线路60的第一端之间的直流电压为第一预设电压，第二直流保持单元444能够保持接收单元448的输入端与通信线路60的第一端之间的直流电压为第二预设电压，从而通信线路60上第一电容C1和第二电容C2两端的直流电压能够分别保持为第一预设电压和第二预设电压，当通信电路退出低功耗模式时，通信线路60上的第一电容C1和第二电容C2无需经历充电的过程，从而通信电路退出低功耗模式的时间减少，提高了通信电路的数据传输效率。当第一控制模块22无需发送数据时，第一电源管理单元242控制驱动单元244保持下电状态，第二电源管理单元442控制接收单元448保持下电状态，通信电路以低功耗模式运行，从而能够降低功耗。
图5是图4中的通信电路的一种可选的实现电路图。在该实施例中，驱动单元244包括驱动电路245及第一电源VCC1，驱动电路245的输入端与第一控制模块22的输出端耦接，驱动电路245的第一输出端与第一电容C1的第一端耦接，驱动电路245的第二输出端与第二电容C2的第一端耦接，驱动电路245的电源端与第一电源VCC1耦接。驱动电路245的输入端作为驱动单元244的输入端，驱动电路245的第一输出端及第二输出端作为驱动单元244的输出端。第一直流保持单元246包括第一电阻R1、第二电阻R2、第三电阻R3、第四电阻R4及第二电源VCC2。第一电阻R1的第一端分别与第三电阻R3的第一端及第一电容C1的第一端耦接，第一电阻R1的第二端与第二电源VCC2耦接，第三电阻R3的第二端接地。第二电阻R2的第一端分别与第四电阻R4的第一端及第二电容C2的第一端耦接，第二电阻R2的第二端与第二电源VCC2耦接，第四电阻R4的第二端接地。其中，
Figure PCTCN2021140043-appb-000009
Figure PCTCN2021140043-appb-000010
Vr 13为第一电容C1的第一端的电压，Vr 13例如为直流电压，V2为第二电源VCC2的电压，V2例如为直流电压，r1为第一电阻R1的阻值，r2为第二电阻R2的阻值，r3为第三电阻R3的阻值，r4为第四电阻R4的阻值，Vr 24为第二电容C2的第一端的电压，Vr 24例如为直流电压。
第一电阻R1的阻值r1至第四电阻R4的阻值r4满足：
Vr 13＝Vr 24＝V cm-tx      (3)
又或者，Vr 13与Vr 24大小接近，且与V cm-tx大小接近，这三者中任意两者的比值可以位于0.95～1.05之间。
其中，V cm-tx是驱动电路245输出的直流电压；
从而，
Figure PCTCN2021140043-appb-000011
第一电阻R1的阻值r1至第四电阻R4的阻值r4和第二电源VCC2的电压V2可以为发送装置20出厂时已设置好的值。
其中，
Figure PCTCN2021140043-appb-000012
与
Figure PCTCN2021140043-appb-000013
的大小可以相同，也可以相近，例如：
Figure PCTCN2021140043-appb-000014
与
Figure PCTCN2021140043-appb-000015
的比值为：
Figure PCTCN2021140043-appb-000016
对公式(5)进行整理得：
Figure PCTCN2021140043-appb-000017
第一电源管理单元242分别与第一电源VCC1及第二电源VCC2耦接。第一电源管理单元242通过控制第一电源VCC1上电，从而控制驱动单元244上电，通过控制第一电源VCC1保持上电状态，从而控制驱动单元244保持上电状态。第一电源管理单元242还通过控制第一电源VCC1下电，从而控制驱动单元244下电，通过控制第一电源VCC1保持下电状态，从而控制驱动单元244保持下电状态。第一电源管理单元242通过控制第二电源VCC2上电，从而控制第一直流保持单元246上电，通过控制第二电源VCC2保持上电状态，从而控制第一直流保持单元246保持上电状态。
第一电源管理单元242可以通过开关控制第一电源VCC1上电、保持上电状态、下电和保持下电状态。第一电源管理单元242也可以通过开关控制第二电源VCC2上电、保持上电状态、下电和保持下电状态。
第二直流保持单元444包括第五电阻R5、第六电阻R6、第七电阻R7、第八电阻R8及第三电源VCC3。第五电阻R5的第一端分别与第一电容C1的第二端及第七电阻R7的第一端耦接，第五电阻R5的第二端与第三电源VCC3耦接，第七电阻R7的第二端接地。第六电阻R6的第一端分别与第二电容C2的第二端及第八电阻R8的第一端耦接，第六电阻R6的第二端与第三电源VCC3耦接，第八电阻R8的第二端接地。第三电源VCC3还与信号检测单元446耦接，从而为信号检测单元446供电。接收单元448包括接收电路449及第四电源VCC4。接收电路449的输入端与通信线路60的第二端耦接，接收电路449的输出端与第二控制模块42耦接，接收电路449的电源端与第四电源VCC4耦接。接收电路449的输入端作为接收单元448的输入端，接收电路449的输出端作为接收单元448的输出端。
其中，
Figure PCTCN2021140043-appb-000018
Figure PCTCN2021140043-appb-000019
Vr 57为第一电容C1的第二端的电压，Vr 57为直流电压，V3为第三电源VCC3的电压，V3例如为直流电压，r5为第五电阻R5的阻值，r6为第六电阻R6的阻值，r7为第七电阻R7的阻值，r8为第八电阻的阻值，Vr 68为第二电容C2的第二端的电压，Vr 68为直流电压。
第五电阻R5的阻值r5至第八电阻R8的阻值r8满足：
Vr 57＝Vr 68＝V cm-rx      (9)
又或者Vr 57与Vr 68大小接近，Vr 68与V cm-rx大小接近，Vr 57与V cm-rx大小接近，任意两者的比值位于0.95到1.05之间。
其中，V cm-rx是接收电路449输入的直流电压；
从而，
Figure PCTCN2021140043-appb-000020
第五电阻R5的阻值r5至第八电阻R8的阻值r8和第三电源VCC3的电压V3可以为接收装置40出厂时已设置好的值。
其中，
Figure PCTCN2021140043-appb-000021
与
Figure PCTCN2021140043-appb-000022
的大小可以相同，也可以相近，例如：
Figure PCTCN2021140043-appb-000023
与
Figure PCTCN2021140043-appb-000024
的比值为：
Figure PCTCN2021140043-appb-000025
对公式(11)进行整理得：
Figure PCTCN2021140043-appb-000026
第二电源管理单元442分别与第三电源VCC3及第四电源VCC4耦接。第二电源管理单元442通过控制第三电源VCC3上电，从而控制第二直流保持单元444及信号检测单元446上电，通过控制第三电源VCC3保持上电状态，从而控制第二直流保持单元444及信号检测单元446保持上电状态。第二电源管理单元442通过控制第四电源VCC4上电，从而控制接收单元448上电，通过控制第四电源VCC4保持上电状态，从而控制接收单元448保持上电状态。第二电源管理单元442通过控制第四电源VCC4下电，从而控制接收单元448下电，通过控制第四电源VCC4保持下电状态，从而控制接收单元448保持下电状态。
第一电容C1的第一端或第一信号线的第一端，以及第二电容C2的第一端或第二信号线的第一端作为通信线路60的第一端，第一电容C1的第二端或第一信号线的第二端，以及第二电容C2的第二端或第二信号线的第二端作为通信线路60的第二端。
第二电源管理单元442可以通过开关控制第三电源VCC3上电、保持上电状态、下电和保持下电状态。第二电源管理单元442也可以通过开关控制第四电源VCC4上电、保持上电状态、下电和保持下电状态。
第一电阻R1、第二电阻R2、第三电阻R3、第四电阻R4、第五电阻R5、第六电阻R6、第七电阻R7和第八电阻R8可以是一个电阻，也可以分别包括多个电阻。
当第一电阻R1的阻值r1、第二电阻R2的阻值r2、第三电阻R3的阻值r3、第四电阻R4的阻值r4、第五电阻R5的阻值r5、第六电阻R6的阻值r6、第七电阻R7的阻值r7和第八电阻R8的阻值r8均大于1KΩ时，第一直流保持单元246和第二直流保持单元444因漏电造成的功耗损失减小。
当第一控制模块22和第二控制模块42上电后，第一电源管理单元242控制第 二电源VCC2上电，并控制第二电源VCC2保持上电状态，第二电源管理单元442控制第三电源VCC3上电，并控制第三电源VCC3保持上电状态，当第一控制模块22接收到数据发送请求时，第一电源管理单元242控制第一电源VCC1上电，并控制第一电源VCC1保持上电状态，第二电源管理单元442控制第四电源VCC4上电，并控制第四电源VCC4保持上电状态，此时，第一电容C1的第一端的直流电压为Vr 13，第一电容C1的第二端的直流电压为Vr 57，第二电容C2的第一端的直流电压为Vr 24，第二电容C2的第二端的直流电压为Vr 68。
当第一控制模块22接收到停止发送请求时，例如手机黑屏或者手机当前没有运行在前台的应用或者关闭当前应用时，第一电源管理单元242控制第一电源VCC1下电，并控制第一电源VCC1保持下电状态，第二电源管理单元442控制第四电源VCC4下电，并控制第四电源VCC4保持下电状态，此时，第一电容C1的第一端的直流电压为低电平，第一电容C1的第二端的直流电压为低电平，第二电容C2的第一端的直流电压为低电平，第二电容C2的第二端的直流电压为低电平。
当然，在具体实施过程中，当第一控制模块22接收到停止发送请求时，第一电源管理单元242也可以控制第一电源VCC1保持上电状态，第二电源管理单元442控制第四电源VCC4保持上电状态。
图6是图4中的通信电路的另一种可选的实现电路图。图6与图5不同的是，第一直流保持单元246的第一电阻R1、第二电阻R2、第三电阻R3及第四电阻R4由第一MOS管Q1、第二MOS管Q2、第三MOS管Q3及第四MOS管Q4代替。第一MOS管Q1的源极分别与第三MOS管Q3的漏极及第一电容C1的第一端耦接，第一MOS管Q1的漏极与第二电源VCC2耦接，第三MOS管Q3的源极接地。第二MOS管Q2的源极分别与第四MOS管Q4的漏极及第二电容C2的第一端耦接，第二MOS管Q2的漏极与第二电源VCC2耦接，第四MOS管Q4的源极接地。第一MOS管Q1的栅极g1、第二MOS管Q2的栅极g2、第三MOS管Q3的栅极g3及第四MOS管Q4的栅极g4均与第一电源管理单元242耦接。第一电源管理单元242可以通过控制第一MOS管Q1至第四MOS管Q4的导通与截止频率，从而控制Vr 13＝Vr 24＝V cm-tx。具体的，第一电源管理单元242可以分别传输PWM(pulse width modulation，脉冲宽度调制)信号至第一MOS管Q1至第四MOS管Q4的栅极g4，并通过调节PWM的占空比，从而调节第一MOS管Q1至第四MOS管Q4的导通与截止频率。
第二直流保持单元444的第五电阻R5、第六电阻R6、第七电阻R7、第八电阻R8由第五MOS管Q5、第六MOS管Q6、第七MOS管Q7及第八MOS管Q8代替。第五MOS管Q5的源极分别与第七MOS管Q7的漏极及第一电容C1的第二端耦接，第五MOS管Q5的漏极与第三电源VCC3耦接，第七MOS管Q7的源极接地。第六MOS管Q6的源极分别与第八MOS管Q8的漏极及第二电容C2的第二端耦接，第六MOS管Q6的漏极与第三电源VCC3耦接，第八MOS管Q8的源极接地。第五MOS管Q5的栅极g1、第六MOS管Q6的栅极g2、第七MOS管Q7的栅极g3及第八MOS管Q8的栅极g4均与第二电源管理单元442耦接。第二电源管理单元442 可以通过控制第五MOS管Q5至第八MOS管Q8的导通与截止频率，从而控制Vr 57＝Vr 68＝V cm-rx。具体的，第二电源管理单元442可以分别传输PWM(pulse width modulation，脉冲宽度调制)信号至第五MOS管Q5至第八MOS管Q8的栅极，并通过调节PWM的占空比，从而调节第五MOS管Q5至第八MOS管Q8的导通与截止频率。
当第一控制模块22和第二控制模块42上电后，第一电源管理单元242控制第二电源VCC2上电，并控制第二电源VCC2保持上电状态，第二电源管理单元442控制第三电源VCC3上电，并控制第三电源VCC3保持上电状态，第一电源管理单元242控制第一MOS管Q1至第四MOS管Q4的导通与截止频率，第二电源管理单元442控制第五MOS管Q5至第八MOS管Q8的导通与截止频率，使得第一电容C1的第一端的直流电压为Vr 13，第一电容C1的第二端的直流电压为Vr 57，第二电容C2的第一端的直流电压为Vr 24，第二电容C2的第二端的直流电压为Vr 68，当第一控制模块22没有数据发送时，第一电源管理单元242控制第一电源VCC1下电，并控制第一电源VCC1保持下电状态，第二电源管理单元442控制第四电源VCC4下电，并控制第四电源VCC4保持下电状态。
当第一控制模块22接收到数据发送请求时，第一电源管理单元242控制第一电源VCC1上电，并控制第一电源VCC1保持上电状态，第二电源管理单元442控制第四电源VCC4上电，并控制第四电源VCC4保持上电状态。
本实施例中，第一电源管理单元242可以通过调节传输给第一MOS管Q1至第四MOS管Q4的栅极的PWM的占空比，进而调节第一MOS管Q1至第四MOS管Q4的导通与截止频率，从而控制第一MOS管Q1至第四MOS管Q4的源极和漏极之间的电流，即等效为控制第一MOS管Q1至第四MOS管Q4的源极和漏极之间的电阻，即
Figure PCTCN2021140043-appb-000027
Figure PCTCN2021140043-appb-000028
r1’为第一MOS管Q1的源极和漏极之间的等效阻值，r2’为第二MOS管Q2的源极和漏极之间的等效阻值，r3’为第三MOS管Q3的源极和漏极之间的等效阻值，r4’为第四MOS管Q4的源极和漏极之间的等效阻值。
第一MOS管Q1的源极和漏极之间的等效阻值r1’、第二MOS管Q2的源极和漏极之间的等效阻值r2’、第三MOS管Q3的源极和漏极之间的等效阻值r3’、第四MOS管Q4的源极和漏极之间的等效阻值r4’满足：
Vr 13＝Vr 24＝V cm-tx     (3)
同前面的介绍，这三者的取值也可以相近，例如：任意两者的比值位于0.95到1.05之间。
从而，
Figure PCTCN2021140043-appb-000029
其中，
Figure PCTCN2021140043-appb-000030
与
Figure PCTCN2021140043-appb-000031
的大小可以相同，也可以相近，例如：
Figure PCTCN2021140043-appb-000032
与
Figure PCTCN2021140043-appb-000033
的比值为：
Figure PCTCN2021140043-appb-000034
对公式(16)进行整理得：
Figure PCTCN2021140043-appb-000035
第一MOS管Q1的源极和漏极之间的等效阻值r1’可以通过调节传输给第一MOS管Q1的栅极的PWM的占空比实现，第二MOS管Q2的源极和漏极之间的等效阻值r2’可以通过调节传输给第二MOS管Q2的栅极的PWM的占空比实现，第三MOS管Q3的源极和漏极之间的等效阻值r3’可以通过调节传输给第三MOS管Q3的栅极的PWM的占空比实现，第四MOS管Q4的源极和漏极之间的等效阻值r4’可以通过调节传输给第四MOS管Q4的栅极的PWM的占空比实现。
第二电源管理单元442可以通过调节传输给第五MOS管Q5至第八MOS管Q8的栅极的PWM的占空比，进而调节第五MOS管Q5至第八MOS管Q8的导通与截止频率，从而控制控制第五MOS管Q5至第八MOS管Q8的源极和漏极之间的电流，即等效为控制第五MOS管Q5至第八MOS管Q8的源极和漏极之间的电阻，即
Figure PCTCN2021140043-appb-000036
Figure PCTCN2021140043-appb-000037
r5’为第五MOS管Q5的源极和漏极之间的等效阻值，r6’为第六MOS管Q6的源极和漏极之间的等效阻值，r7’为第七MOS管Q7的源极和漏极之间的等效阻值，r8’为第八MOS管Q8的源极和漏极之间的等效阻值。
第五MOS管Q5的源极和漏极之间的等效阻值r5’、第六MOS管Q6的源极和漏极之间的等效阻值r6’、第七MOS管Q7的源极和漏极之间的等效阻值r7’、第八MOS管Q8的源极和漏极之间的等效阻值r8’满足：
Vr 57＝Vr 68＝V cm-rx       (9)
同前面的介绍，这三者的取值也可以相近，例如：任意两者的比值位于0.95到1.05之间。
从而，
Figure PCTCN2021140043-appb-000038
其中，
Figure PCTCN2021140043-appb-000039
与
Figure PCTCN2021140043-appb-000040
的大小可以相同，也可以相近，例如：
Figure PCTCN2021140043-appb-000041
与
Figure PCTCN2021140043-appb-000042
的比值为：
Figure PCTCN2021140043-appb-000043
对公式(21)进行整理得：
Figure PCTCN2021140043-appb-000044
第五MOS管Q5的源极和漏极之间的等效阻值r5’、第六MOS管Q6的源极和 漏极之间的等效阻值r6’、第七MOS管Q7的源极和漏极之间的等效阻值r7’、第八MOS管Q8的源极和漏极之间的等效阻值r8’可以通过调节传输给第五MOS管Q5至第八MOS管Q8的栅极的PWM的占空比实现。
图7是本申请另一实施例中通信电路的原理示意图。与图3不同的是，发送模块24还包括第一定时单元240，第一定时单元240的输入端与第一控制模块22的控制端耦接，第一定时单元240的输出端与第一电源管理单元242的输入端耦接。第一控制模块22用于将数据传输周期传输至第一定时单元240，第一定时单元240用于根据所述数据传输周期生成上电时间和下电时间，并将上电时间和下电时间传输至第一电源管理单元242，第一电源管理单元242用于在上电时间控制驱动单元244及第一直流保持单元246上电，并控制驱动单元244及第一直流保持单元246保持上电状态，以及在下电时间控制驱动单元244及第一直流保持单元246下电，并控制驱动单元244及第一直流保持单元246保持下电状态。该上电时间为数据发送前的预设时间。
数据传输周期也可以称为数据的传输周期，例如，数据需要在1s、2s、3s、4s、…、20s、21s、22s、…传输，数据传输周期为1s。数据需要在1s、2s、3s、4s、…、20s、21s、22s、…传输并且数据可以在0.1内传输完成，上电时间可以为0.8s、1.8s、2.8s、3.8s、…、19.8s、20.8s、21.8s、…，在0.8s～1.1s、1.8s～2.1s、2.8s～3.1s、3.8s～4.1s、…、19.8s～20.1s、20.8s～21.1s、21.8s～22.1s、…控制驱动单元244及第一直流保持单元246保持上电状态，下电时间可以为1.1s、2.1s、3.1s、4.1s、…、20.1s、21.1s、22.1s、…，在0～0.8s、1.1s～1.8s、2.1s～2.8s、3.1s～3.8s、4.1s～4.8s、…、19.1s～19.8s、20.1s～20.8s、21.1s～21.8s、…控制驱动单元244及第一直流保持单元246保持下电状态。
接收模块44还包括第二定时单元440，第二定时单元440的输入端与第二控制模块42的控制端耦接，第二定时单元440的输出端与第二电源管理单元442的输入端耦接。第二控制模块42用于将数据传输周期传输至第二定时单元440，第二定时单元440用于根据所述数据传输周期生成上电时间和下电时间并将上电时间和下电时间传输至第二电源管理单元442，第二电源管理单元442用于在上电时间控制第二直流保持单元444、信号检测单元446及接收单元448上电，并控制第二直流保持单元444、信号检测单元446及接收单元448保持上电状态，以及在下电时间控制第二直流保持单元444、信号检测单元446及接收单元448下电，并控制第二直流保持单元444、信号检测单元446及接收单元448保持下电状态。
当第一控制模块22和第二控制模块42上电后，第一控制模块22将数据传输周期传输至第一定时单元240，第一定时单元240根据所述数据传输周期生成上电时间和下电时间并将上电时间和下电时间传输至第一电源管理单元242，第二控制模块42将数据传输周期传输至第二定时单元440，第二定时单元440根据所述数据传输周期生成上电时间和下电时间并将上电时间和下电时间传输至第二电源管理单元442，当当前时间为下电时间时，第一电源管理单元242控制驱动单元244及第一直流保持单元246下电，并控制驱动单元244及第一直流保持单元246保持下电状态，第二电源管理单元442控制第二直流保持单元444、信号检测单元446及接收单元 448下电，并控制第二直流保持单元444、信号检测单元446及接收单元448保持下电状态，通信电路进入低功耗模式。当当前时间为上电时间时，第一电源管理单元242控制驱动单元244及第一直流保持单元246上电，并控制驱动单元244及第一直流保持单元246保持上电状态，又或者在上电时间控制第一直流保持单元246上电，并在上电时间之后的预设时间，控制驱动单元244上电，第二电源管理单元442控制第二直流保持单元444、信号检测单元446及接收单元448上电，并控制第二直流保持单元444、信号检测单元446及接收单元448保持上电状态，又或者可以在上电时间控制第二直流保持单元444上电，在上电时间之后的预设时间控制信号检测单元446及接受单元448上电，第一直流保持单元246在上电后，使得驱动单元244的输出端与通信线路60的第一端之间的直流电压为第一预设电压，第二直流保持单元444在上电后，使得通信线路60的第二端与接收单元448的输入端之间的直流电压为第二预设电压，通信电路退出低功耗模式，第一控制模块22将并行数据传输至驱动单元244，驱动单元244将并行数据转换成串行数据，并将串行数据发送至通信线路60上，信号检测单元446检测到通信线路60上有数据传输，接收单元448接收通信线路60上的串行数据，并将串行数据转换成并行数据，接收单元448还将该并行数据传输至第二控制模块42。
上电时间为数据发送前的预设时间，从而在第一控制模块22需要发送数据时，驱动单元244的输出端与通信线路60的第一端之间的直流电压能够达到第一预设电压，通信线路60的第二端与接收单元448的输入端之间的直流电压能够达到第二预设电压，接收单元448能够接收数据。
在当前时间为下电时间时，第一电源管理单元242也可以控制驱动单元244及第一直流保持单元246上电，并控制驱动单元244及第一直流保持单元246保持上电状态，第二电源管理单元442也可以控制第二直流保持单元444、信号检测单元446及接收单元448上电，并控制第二直流保持单元444、信号检测单元446及接收单元448保持上电状态。在当前时间为下电时间时，第一电源管理单元242也可以控制驱动单元244下电，并控制驱动单元244保持下电状态，及控制第一直流保持单元246上电，并控制第一直流保持单元246保持上电状态，第二电源管理单元442也可以控制第二直流保持单元444上电、控制信号检测单元446及接收单元448下电，并控制第二直流保持单元444上电、控制信号检测单元446及接收单元448保持下电状态。
在另一可选的实施例中，上电时间用于控制驱动单元244、信号检测单元446及接收单元448上电，而在上电时间之前的预设时间，第一电源管理单元242控制第一直流保持单元246上电，第二电源管理单元442控制第二直流保持单元444上电。
本实施例中，通过在发送模块24中设置第一定时单元240以及在接收模块44中设置第二定时单元440，第一定时单元240根据数据传输周期生成上电时间和下电时间，第二定时单元440根据数据传输周期生成上电时间和下电时间，当当前时间为上电时间时，第一电源管理单元242控制驱动单元244及第一直流保持单元246 上电，并控制驱动单元244及第一直流保持单元246保持上电状态，第二电源管理单元442控制第二直流保持单元444、信号检测单元446及接收单元448上电，并控制第二直流保持单元444、信号检测单元446及接收单元448保持上电状态，从而在第一控制模块22需要发送数据时，驱动单元244的输出端与通信线路60的第一端之间的直流电压能够达到第一预设电压，通信线路60的第二端与接收单元448的输入端之间的直流电压能够达到第二预设电压，接收单元448能够接收数据，当当前时间为下电时间时，第一电源管理单元242控制驱动单元244及第一直流保持单元246下电，并控制驱动单元244及第一直流保持单元246保持下电状态，第二电源管理单元442控制第二直流保持单元444、信号检测单元446及接收单元448下电，并控制第二直流保持单元444、信号检测单元446及接收单元448保持下电状态，从而能够降低通信电路的功耗。
在另一种可选的实施例中，第一定时单元240维持了数据传输周期和链路休眠周期，该数据传输周期指的是每次启动数据传输之后，数据传输的时长，例如为50ms、100ms等等；链路休眠周期指的是每次启动链路之后，链路再次进入休眠状态的时长，例如为：1s、2s等等，本发明实施例不作限制。其中，可以在发送装置20(例如：第一控制模块22)获得数据传输周期和链路休眠周期之后将其发送至接收装置40，然后发送给第二定时单元440，从而使第二定时单元440控制接收装置40的接收和休眠，也可以由接收装置40自己确定数据传输周期和链路休眠周期，本发明实施例不作限制。
其中，驱动单元244启动数据传输之后，第一定时单元240开启计时，直到第一定时单元240的计时时长达到数据传输周期对应的时长，在这种情况下，第一定时器240告知第一电源管理单元242，由第一电源管理单元242控制驱动单元244和第一直流保持单元246下电；在这种情况下，第一定时单元240可以继续计时，或者重新开始计时，当计时时长达到链路休眠周期对应的时长时，产生控制信号控制第一直流保持单元246上电，并在产生控制第一直流保持单元246上电后的预设时间后，产生控制信号控制驱动单元244上电，从而向接收装置40发送数据。
而在接收装置40侧，其初始阶段默认上电，信号检测单元446在检测到通信线路上有数据传输时，告知第二定时单元440，第二定时单元440开始计时，当第二定时单元440的计时超过数据传输周期对应的时长时，第二定时单元440发送控制指令告知第二电源管理单元442，第二电源管理单元442控制信号检测单元446、第二直流保持单元444、接收单元448下电；然后第二定时单元440重新开始计时、或者继续计时，当计时时长大于链路休眠时长时，第二定时单元440产生控制信令告知第二电源管理单元442，第二电源管理单元442控制第二直流保持单元444上电，在控制第二直流保持单元444上电之后的预设时间，控制信号检测单元446和接收单元448上电。
又或者，驱动单元244启动数据传输之后，第一定时单元240开启计时，直到第一定时单元240的计时时长达到数据传输周期对应的时长，在这种情况下，第一定时器240告知第一电源管理单元242，由第一电源管理单元242控制驱动单元244 下电，第一直流保持单元246保持上电状态；在这种情况下，第一定时单元240可以继续计时，或者重新开始计时，当计时时长达到链路休眠周期对应的时长时，产生控制信号控制驱动单元244上电，从而向接收装置40发送数据。
而在接收装置40侧，信号检测单元446检测到通信线路上有数据传输时，告知第二定时单元440，第二定时单元440开始计时，并控制信号检测单元446、第二直流保持单元444、接收单元448上电，当第二定时单元440的计时超过数据传输周期对应的时长时，第二定时单元440发送控制指令告知第二电源管理单元442，第二电源管理单元442控制信号检测单元446接收单元448下电，控制第二直流保持单元444保持上电状态；然后第二定时单元440重新开始计时、或者继续计时，当计时时长大于链路休眠时长时，第二定时单元440产生控制信令告知第二电源管理单元442，第二电源管理单元442控制信号检测单元446和接收单元448上电。
图8是图7中的通信电路的一种可选的实现电路图。驱动单元244包括驱动电路245及第一电源VCC1，驱动电路245的输入端与第一控制模块22的输出端耦接，驱动电路245的第一输出端与第一电容C1的第一端耦接，驱动电路245的第二输出端与第二电容C2的第一端耦接，驱动电路245还与第一电源VCC1耦接。驱动电路245的输入端作为驱动单元244的输入端，驱动电路245的第一输出端及第二输出端作为驱动单元244的输出端。第一直流保持单元246包括第一电阻R1、第二电阻R2、第三电阻R3、第四电阻R4及第二电源VCC2。第一电阻R1的第一端分别与第三电阻R3的第一端及第一电容C1的第一端耦接，第一电阻R1的第二端与第二电源VCC2耦接，第三电阻R3的第二端接地。第二电阻R2的第一端分别与第四电阻R4的第一端及第二电容C2的第一端耦接，第二电阻R2的第二端与第二电源VCC2耦接，第四电阻R4的第二端接地。
第二直流保持单元444包括第五电阻R5、第六电阻R6、第七电阻R7、第八电阻R8及第三电源VCC3。第五电阻R5的第一端分别与第一电容C1的第二端及第七电阻R7的第一端耦接，第五电阻R5的第二端与第三电源VCC3耦接，第七电阻R7的第二端接地。第六电阻R6的第一端分别与第二电容C2的第二端及第八电阻R8的第一端耦接，第六电阻R6的第二端与第三电源VCC3耦接，第八电阻R8的第二端接地。第三电源VCC3还与信号检测单元446耦接，从而为信号检测单元446供电。接收单元448包括接收电路449及第四电源VCC4。接收电路449的输入端与通信线路60的第二端耦接，接收电路449的输出端与第二控制模块42耦接，接收电路449还与第四电源VCC4耦接。接收电路449的输入端作为接收单元448的输入端，接收电路449的输出端作为接收单元448的输出端。
图9是图7中的通信电路的另一种可选的实现电路图。与图8不同的是，第一直流保持单元246的第一电阻R1、第二电阻R2、第三电阻R3及第四电阻R4由第一MOS管Q1、第二MOS管Q2、第三MOS管Q3及第四MOS管Q4代替。第一MOS管Q1的源极分别与第三MOS管Q3的漏极及第一电容C1的第一端耦接，第一MOS管Q1的漏极与第二电源VCC2耦接，第三MOS管Q3的源极接地。第二MOS管Q2的源极分别与第四MOS管Q4的漏极及第二电容C2的第一端耦接，第 二MOS管Q2的漏极与第二电源VCC2耦接，第四MOS管Q4的源极接地。第一MOS管Q1的栅极g1、第二MOS管Q2的栅极g2、第三MOS管Q3的栅极g3及第四MOS管Q4的栅极g4均与第一电源管理单元242耦接。
第二直流保持单元444的第五电阻R5、第六电阻R6、第七电阻R7、第八电阻R8由第五MOS管Q5、第六MOS管Q6、第七MOS管Q7及第八MOS管Q8代替。第五MOS管Q5的源极分别与第七MOS管Q7的漏极及第一电容C1的第二端耦接，第五MOS管Q5的漏极与第三电源VCC3耦接，第七MOS管Q7的源极接地。第六MOS管Q6的源极分别与第八MOS管Q8的漏极及第二电容C2的第二端耦接，第六MOS管Q6的漏极与第三电源VCC3耦接，第八MOS管Q8的源极接地。第五MOS管Q5的栅极g1、第六MOS管Q6的栅极g2、第七MOS管Q7的栅极g3及第八MOS管Q8的栅极g4均与第二电源管理单元442耦接。
上述的通信电路可以应用于支持Serdes、PCIe(peripheral component interconnect express)、MIPI(Mobile Industry Processor Interface)C-PHY、MIPI D-PHY、MIPI M-PHY等协议中的设备中。
请参考图10和图11，本申请还提供一种手机，该手机包括上述任一实施例所述的通信电路。发送装置20为手机主控制板300上的应用处理器100，第一控制模块22为应用处理器100中的微控制单元11，发送模块24为应用处理器100中的第一接口电路13，接收装置40为手机的显示屏200，第二控制模块42为显示屏200的接口控制器71，接收模块44为显示屏200的第二接口电路70。通信线路包括设置在手机的主控制板300上的PCB(Printed Circuit Board，印制电路板)30及耦接手机的主控制板300与显示屏200的FPC(Flexible Printed Circuit，柔性电路板)。第一电容C1及第二电容C2设置于PCB30上，FPC90一端通过耦接器50与PCB30耦接，另一端与第二接口电路70耦接。
请参考图12，本申请还提供另一种手机，该手机包括上述任一实施例所述的通信电路。应用处理器100定时发送数据给显示屏200。与图10不同的是，发送模块13还包括第一定时单元137。接收模块70还包括第二定时单元739。
手机开机后，手机的微控制单元11和显示屏200的接口控制器71上电启动，微控制单元11生成数据传输周期，并将数据传输周期传输第一定时单元137，接口控制器71将数据传输周期传输至第二定时单元739，第二定时单元739根据所述数据传输周期生成上电时间和下电时间并将上电时间和下电时间传输至第二电源管理单元731。
当当前时间为上电时间时，第一电源管理单元131控制驱动单元133及第一直流保持单元135上电，并控制驱动单元133及第一直流保持单元135保持上电状态，第二电源管理单元731控制第二直流保持单元733、信号检测单元735及接收单元737上电，并控制第二直流保持单元733、信号检测单元735及接收单元737保持上电状态，微控制单元11将并行数据传输至驱动单元133，驱动单元133将并行数据转换成串行数据，并将串行数据发送至通信线路60上，信号检测单元735检测到通信线路上有数据传输，接收单元737接收通信线路上的串行数据，并将串行数据转 换成并行数据，接收单元737还将该并行数据传输至接口控制器71。接口控制器71将接收到的并行数据通过时序控制器传输至显示面板，显示面板显示该并行数据。
当当前时间为下电时间时，第一电源管理单元131控制驱动单元133及第一直流保持单元135下电，并控制驱动单元133及第一直流保持单元135保持下电状态，第二电源管理单元731控制第二直流保持单元733、信号检测单元735及接收单元737下电，并控制第二直流保持单元733、信号检测单元735及接收单元737保持下电状态，手机进入低功耗模式。
请参考图13，本申请的发送装置20还可以是手机中的摄像头401，第一控制模块22为摄像头401中的接口控制器，发送模块24为摄像头401中的发送接口电路，接收装置40为手机中的应用处理器402，第二控制模块42为应用处理器402中的微控制单元，接收模块44应用处理器402中的接收接口电路。应用处理器402中的微控制单元用于检测手机上的应用程序是否需要获取摄像头401中数据，当应用处理器402的微控制单元检测到手机上的应用程序需要获取摄像头401中数据的请求时，应用处理器402的微控制单元通过其他通信电路(非图所示的通信电路)传输数据发送请求至摄像头401的接口控制器，该数据发送请求用于控制摄像头401的接口控制器发送数据，摄像头401的接口控制器从存储装置获取待发送数据，并将待发送数据通过摄像头401的发送接口电路发送给应用处理器402的接收接口电路，应用处理器402的微控制单元获取应用处理器402的接收接口电路接收到的数据。当应用处理器402的微控制单元没有检测到手机上的应用程序需要获取摄像头401中数据的请求时，应用处理器402的微控制单元传输停止发送请求至摄像头401的接口控制器，摄像头401的接口控制器停止向应用处理器402的微控制单元发送数据。
本申请的发送装置20还可以是手机中的应用处理器，第一控制模块22为应用处理器的微控制单元，发送模块24为应用处理器的第一发送接口电路，接收装置40为手机中的存储装置，第二控制模块42为存储装置中的接口控制器，接收模块44为存储装置中的第一接收接口电路；和/或，发送装置20还可以是手机中的存储装置，第一控制模块22为存储装置的接口控制器，发送模块24为存储装置的第二发送接口电路，接收装置40为手机中的应用处理器，第二控制模块42为应用处理器中的微控制单元，接收模块44应用处理器中的第二接收接口电路。应用处理器的第一发送接口电路将数据发送给存储装置中的第一接收接口电路。存储装置的第二发送接口电路将数据发送给应用处理器中的第二接收接口电路。
本申请的通信电路还可以应用于两个独立的电子设备上，发送装置20可以是手机的应用处理器，接收装置40可以是独立于手机的外部显示屏，手机的应用处理器通过通信线路与外部显示屏耦接，其中，耦合电容可以位于外部显示屏的通信线路上，也可以位于手机的通信线路上。
发送装置20还可以是台式机，接收装置40可以是存储卡，台式机通过通信线路与存储卡耦接。发送装置20还可以是平板电脑，接收装置40可以是摄像机，平板电脑通过通信线路与摄像机耦接。发送装置20还可以是台式机，接收装置40可以是Wi-Fi设备，台式机通过通信线路与Wi-Fi设备耦接。本申请的通信电路还可以 应用于其他的电子设备。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (11)

  1. 一种通信电路，其特征在于，包括发送装置、通信线路和接收装置，所述发送装置与所述接收装置之间通过所述通信线路连接，所述通信线路用于所述发送装置与所述接收装置之间传输数据，所述通信线路上设置有耦合电容，所述发送装置包括：第一电源管理单元及第一直流保持单元，所述第一电源管理单元与所述第一直流保持单元耦接，所述第一直流保持单元与通信线路的第一端耦接；所述接收装置包括：第二电源管理单元及第二直流保持单元；所述第二电源管理单元与所述第二直流保持单元耦接，所述第二直流保持单元与所述通信线路的第二端耦接；
    所述第一电源管理单元用于控制所述第一直流保持单元上电，并控制所述第一直流保持单元保持上电状态；
    所述第一直流保持单元用于保持所述通信线路的第一端的直流电压为第一预设电压；
    所述第二电源管理单元用于控制所述第二直流保持单元上电，并控制所述第二直流保持单元保持上电状态；
    所述第二直流保持单元用于保持所述通信线路的第二端的直流电压为第二预设电压。
  2. 如权利要求1所述的通信电路，其特征在于，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述通信线路包括第一信号线及第二信号线，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容；所述第一直流保持单元包括第一电阻、第二电阻、第三电阻、第四电阻及第二电源，所述第一电阻的第一端分别与所述第三电阻的第一端及所述第一信号线的第一端耦接，所述第一电阻的第二端与所述第二电源耦接，所述第三电阻的第二端接地，所述第二电阻的第一端分别与所述第四电阻的第一端及所述第二信号线的第一端耦接，所述第二电阻的第二端与所述第二电源耦接，所述第四电阻的第二端接地；
    其中，
    Figure PCTCN2021140043-appb-100001
    r1为所述第一电阻的阻值，r2为所述第二电阻的阻值，r3为所述第三电阻的阻值，r4为所述第四电阻的阻值；
    所述第二直流保持单元包括第五电阻、第六电阻、第七电阻、第八电阻及第三电源，所述第五电阻的第一端分别与所述第一信号线的第二端及所述第七电阻的第一端耦接，所述第五电阻的第二端与所述第三电源耦接，所述第七电阻的第二端接地，所述第六电阻的第一端分别与所述第二信号线的第二端及所述第八电阻的第一端耦接，所述第六电阻的第二端与所述第三电源耦接，所述第八电阻的第二端接地；
    其中，
    Figure PCTCN2021140043-appb-100002
    r5为所述第五电阻的阻值，r6为所述第六电阻的阻值，r7为所述第七电阻的阻值，r8为所述第八电阻的阻值；
    所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
  3. 如权利要求1所述的通信电路，其特征在于，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容，所述通信线路包括第一信号线及第二信号线，所述第一直流保持单元包括第一MOS管、第二MOS管、第三MOS管及第四MOS管，所述第一MOS管的源极分别与所述第三MOS管的漏极及所述第一信号线的第一端耦接，所述第一MOS管的漏极与所述第二电源耦接，所述第三MOS管的源极接地，所述第二MOS管的源极分别与所述第四MOS管的漏极及所述第二信号线的第一端耦接，所述第二MOS管的漏极与所述第二电源耦接，所述第四MOS管的源极接地，所述第一MOS管的栅极、所述第二MOS管的栅极、所述第三MOS管的栅极及所述第四MOS管的栅极均与所述第一电源管理单元耦接；
    其中，
    Figure PCTCN2021140043-appb-100003
    r1’为所述第一MOS管的源极和漏极之间的等效阻值，r2’为所述第二MOS管的源极和漏极之间的等效阻值，r3’为所述第三MOS管的源极和漏极之间的等效阻值，r4’为所述第四MOS管的源极和漏极之间的等效阻值；
    所述第二直流保持单元包括第五MOS管、第六MOS管、第七MOS管及第八MOS管，所述第五MOS管的源极分别与所述第七MOS管的漏极及所述第一信号线的第二端耦接，所述第五MOS管的漏极与所述第三电源耦接，所述第七MOS管的源极接地，所述第六MOS管的源极分别与所述第八MOS管的漏极及所述第二信号线的第二端耦接，所述第六MOS管的漏极与所述第三电源耦接，所述第八MOS管的源极接地，所述第五MOS管的栅极、所述第六MOS管的栅极、所述第七MOS管的栅极及所述第八MOS管的栅极均与所述第二电源管理单元耦接；
    其中，
    Figure PCTCN2021140043-appb-100004
    r5’为所述第五MOS管的源极和漏极之间的等效阻值，r6’为所述第六MOS管的源极和漏极之间的等效阻值，r7’为所述第七MOS管的源极和漏极之间的等效阻值，r8’为所述第八MOS管的源极和漏极之间的等效阻值；
    所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
  4. 如权利要求1所述的通信电路，其特征在于，所述发送装置还包括：第一控制模块和驱动单元，所述第一控制模块与所述第一电源管理单元耦接，所述驱动单元分别与所述第一控制模块、所述第一电源管理单元及所述通信线路的第一端耦接；
    所述第一控制模块还用于接收数据发送请求，并根据所述数据发送请求传输第三控制信号至所述第一电源管理单元和传输并行数据至所述驱动单元；
    所述第一电源管理单元还用于根据所述第三控制信号控制所述驱动单元上电；
    所述驱动单元用于将并行数据转换成串行数据，并将所述串行数据发送至所述通信线路；
    所述第一控制模块还用于接收停止发送请求，并根据所述停止发送请求传输第五控制信号至所述第一电源管理单元；
    所述第一电源管理单元还用于根据所述第五控制信号控制所述驱动单元下电。
  5. 如权利要求1所述的通信电路，其特征在于，所述接收装置还包括：信号检测单元及接收单元，所述接收单元与所述通信线路的第二端耦接，所述信号检测单元耦接于所述通信线路的第二端与所述接收单元之间，所述接收单元及所述信号检测单元还与所述第二电源管理单元耦接；
    所述接收单元用于接收所述通信线路上的串行数据，并将所述串行数据转换成并行数据；
    所述第二电源管理单元还用于根据所述第二控制信号控制所述信号检测单元上电；
    所述信号检测单元用于检测所述通信线路上是否有数据传输，当所述信号检测单元检测到所述通信线路上有数据传输时，所述信号检测单元传输第四控制信号至所述第二电源管理单元；
    所述第二电源管理单元根据所述第四控制信号控制所述接收单元上电，并控制所述接收单元保持上电状态；
    当所述信号检测单元检测到所述通信线路上没有数据传输时，所述信号检测单元传输第六控制信号至所述第二电源管理单元，所述第二电源管理单元根据所述第六控制信号控制所述接收单元下电。
  6. 一种通信电路，其特征在于，包括发送装置、通信线路和接收装置，所述发送装置与所述接收装置之间通过所述通信线路连接，所述通信线路用于所述发送装置与所述接收装置之间传输数据，所述通信线路上设置有耦合电容，所述发送装置包括：第一定时单元、第一电源管理单元及第一直流保持单元，所述第一电源管理单元分别与所述第一定时单元及所述第一直流保持单元耦接，所述第一直流保持单元与通信线路的第一端耦接；所述接收装置包括：第二定时单元、第二电源管理单元及第二直流保持单元，所述第二电源管理单元分别与所述第二定时单元及所述第二直流保持单元耦接，所述第二直流保持单元与所述通信线路的第二端耦接；
    所述第一定时单元用于生成上电时间和下电时间，并将所述上电时间和所述下电时间传输至所述第一电源管理单元；
    所述第一电源管理单元用于在所述上电时间控制所述第一直流保持单元上电，所述上电时间之后的预设时间为数据发送时间；
    所述第一电源管理单元还用于在所述下电时间控制所述第一直流保持单元下电；
    所述第一直流保持单元用于保持所述通信线路的第一端的直流电压为第一预设电压；
    所述第二定时单元用于生成上电时间和下电时间，并将所述上电时间和所述下电时间传输至所述第二电源管理单元；
    所述第二电源管理单元用于在所述上电时间控制所述第二直流保持单元上电，所述上电时间之后的预设时间为数据发送时间；
    所述第二电源管理单元还用于在所述下电时间控制所述第二直流保持单元下电；
    所述第二直流保持单元用于保持所述通信线路的第二端的直流电压为第二预设 电压。
  7. 如权利要求6所述的通信电路，其特征在于，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述通信线路包括第一信号线及第二信号线，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容；所述第一直流保持单元包括第一电阻、第二电阻、第三电阻、第四电阻及第二电源，所述第一电阻的第一端分别与所述第三电阻的第一端及所述第一信号线的第一端耦接，所述第一电阻的第二端与所述第二电源耦接，所述第三电阻的第二端接地，所述第二电阻的第一端分别与所述第四电阻的第一端及所述第二信号线的第一端耦接，所述第二电阻的第二端与所述第二电源耦接，所述第四电阻的第二端接地；
    其中，
    Figure PCTCN2021140043-appb-100005
    r1为所述第一电阻的阻值，r2为所述第二电阻的阻值，r3为所述第三电阻的阻值，r4为所述第四电阻的阻值；
    所述第二直流保持单元包括第五电阻、第六电阻、第七电阻、第八电阻及第三电源，所述第五电阻的第一端分别与所述第一信号线的第二端及所述第七电阻的第一端耦接，所述第五电阻的第二端与所述第三电源耦接，所述第七电阻的第二端接地，所述第六电阻的第一端分别与所述第二信号线的第二端及所述第八电阻的第一端耦接，所述第六电阻的第二端与所述第三电源耦接，所述第八电阻的第二端接地；
    其中，
    Figure PCTCN2021140043-appb-100006
    r5为所述第五电阻的阻值，r6为所述第六电阻的阻值，r7为所述第七电阻的阻值，r8为所述第八电阻的阻值；
    所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
  8. 如权利要求6所述的通信电路，其特征在于，所述通信线路上设置的耦合电容包含第一电容和第二电容，所述第一信号线上设置有所述第一电容，所述第二信号线上设置有所述第二电容，所述通信线路包括第一信号线及第二信号线，所述第一直流保持单元包括第一MOS管、第二MOS管、第三MOS管及第四MOS管，所述第一MOS管的源极分别与所述第三MOS管的漏极及所述第一信号线的第一端耦接，所述第一MOS管的漏极与所述第二电源耦接，所述第三MOS管的源极接地，所述第二MOS管的源极分别与所述第四MOS管的漏极及所述第二信号线的第一端耦接，所述第二MOS管的漏极与所述第二电源耦接，所述第四MOS管的源极接地，所述第一MOS管的栅极、所述第二MOS管的栅极、所述第三MOS管的栅极及所述第四MOS管的栅极均与所述第一电源管理单元耦接；
    其中，
    Figure PCTCN2021140043-appb-100007
    r1’为所述第一MOS管的源极和漏极之间的等效阻值，r2’为所述第二MOS管的源极和漏极之间的等效阻值，r3’为所述第三MOS管的源极和漏极之间的等效阻值，r4’为所述第四MOS管的源极和漏极之间的等效阻值；
    所述第二直流保持单元包括第五MOS管、第六MOS管、第七MOS管及第八MOS管，所述第五MOS管的源极分别与所述第七MOS管的漏极及所述第一信号线 的第二端耦接，所述第五MOS管的漏极与所述第三电源耦接，所述第七MOS管的源极接地，所述第六MOS管的源极分别与所述第八MOS管的漏极及所述第二信号线的第二端耦接，所述第六MOS管的漏极与所述第三电源耦接，所述第八MOS管的源极接地，所述第五MOS管的栅极、所述第六MOS管的栅极、所述第七MOS管的栅极及所述第八MOS管的栅极均与所述第二电源管理单元耦接；
    其中，
    Figure PCTCN2021140043-appb-100008
    r5’为所述第五MOS管的源极和漏极之间的等效阻值，r6’为所述第六MOS管的源极和漏极之间的等效阻值，r7’为所述第七MOS管的源极和漏极之间的等效阻值，r8’为所述第八MOS管的源极和漏极之间的等效阻值；
    所述第一信号线的第一端和所述第二信号线的第一端作为所述通信线路的第一端，所述第一信号线的第二端和所述第二信号线的第二端作为所述通信线路的第二端。
  9. 如权利要求6所述的通信电路，其特征在于，所述发送装置还包括：第一控制模块及驱动单元，所述第一控制模块分别与所述驱动单元及所述第一定时单元耦接，所述驱动单元分别与所述第一电源管理单元及所述通信线路的第一端耦接；
    所述第一控制模块用于传输数据传输周期和链路休眠周期至所述第一定时单元，以及传输并行数据至所述驱动单元，所述数据传输周期为每次数据传输的传输时长，所述链路休眠周期为每两次数据数据之间的时间间隔；
    所述第一定时单元用于基于所述数据传输周期和所述链路休眠时间确定所述上电时间和所述下电时间；
    所述第一电源管理单元还用于在所述上电时间之后的预设时间控制所述驱动单元上电；
    所述驱动单元用于将并行数据转换成串行数据，并将所述串行数据发送至所述通信线路；
    所述第一电源管理单元还用于在所述下电时间控制所述驱动单元下电。
  10. 如权利要求6所述的通信电路，其特征在于，所述接收装置还包括：第二控制模块、信号检测单元及接收单元，所述第二控制模块与所述第二定时单元耦接，所述接收单元与所述通信线路的第二端耦接，所述信号检测单元耦接于所述通信线路的第二端与所述接收单元之间，所述接收单元及所述信号检测单元还与所述第二电源管理单元耦接；
    所述第二控制模块用于传输数据传输周期和链路休眠周期至所述第二定时单元，以及传输并行数据至所述接收单元，所述数据传输周期为每次数据传输的传输时长，所述链路休眠周期为每两次数据数据之间的时间间隔；
    所述第二定时单元用于基于所述数据传输周期和所述链路休眠时间确定所述上电时间和所述下电时间；
    所述第二电源管理单元用于在所述上电时间之后的预设时间控制所述信号检测单元及所述接收单元上电；
    所述信号检测单元用于检测所述通信线路上是否有数据传输；
    所述接收单元用于接收所述通信线路上的串行数据，并将所述串行数据转换成并行数据；
    所述第二电源管理单元用于在所述下电时间控制所述信号检测单元及所述接收单元下电。
  11. 一种电子设备，其特征在于，包括权利要求1-10任一项所述的通信电路。
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