WO2022147649A1 - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置 Download PDF

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Publication number
WO2022147649A1
WO2022147649A1 PCT/CN2021/070309 CN2021070309W WO2022147649A1 WO 2022147649 A1 WO2022147649 A1 WO 2022147649A1 CN 2021070309 W CN2021070309 W CN 2021070309W WO 2022147649 A1 WO2022147649 A1 WO 2022147649A1
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Prior art keywords
layer
base substrate
light
display panel
anode
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PCT/CN2021/070309
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English (en)
French (fr)
Inventor
石博
于池
龙跃
周瑞
官慧
黄炜赟
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to GB2215685.5A priority Critical patent/GB2609583A/en
Priority to CN202180000022.6A priority patent/CN115298829B/zh
Priority to PCT/CN2021/070309 priority patent/WO2022147649A1/zh
Priority to US17/618,479 priority patent/US20230157087A1/en
Publication of WO2022147649A1 publication Critical patent/WO2022147649A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80517—Multilayers, e.g. transparent multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display device.
  • the organic light emitting diode (OLED) display panel has attracted more and more attention due to the excellent characteristics of the OLED itself.
  • An OLED display panel with an under-screen camera function is generally divided into a normal display area and a light-transmitting area that is at least partially surrounded by the normal display area and can transmit light.
  • the OLED drive circuit in the light-transmitting area is usually cut off, so that more light in the light-transmitting area can pass through the display panel to image on the camera.
  • the present disclosure provides a display panel, a preparation method thereof, and a display device.
  • the display panel provided by the present disclosure includes: a normal display area and at least one light-transmitting area at least partially surrounded by the normal display area, wherein the display panel includes: a base substrate; and a driving circuit layer disposed on the base substrate , and includes a first drive circuit located in the normal display area for driving a plurality of sub-pixels in the normal display area; the anode layer includes a first drive circuit disposed in the normal display area and located above the drive circuit layer A first anode sublayer and a second anode sublayer disposed in the at least one light-transmitting region, wherein the first anode sublayer is connected to the first driving circuit and includes multiple a first anode, and the second anode sublayer includes a plurality of second anodes that are insulated and spaced apart from each other; a first insulating layer is disposed over the anode layer and includes a plurality of second anodes located in the normal display area a first insulating sublayer and a second insulating sublayer
  • the display panel further includes a second driving circuit located in a peripheral region at least partially surrounding the normal display area or located in the normal display area, and provided at the same layer as the first driving circuit, and connected to the The second anode sub-layer is used for driving a plurality of sub-pixels in the at least one light-transmitting area.
  • the display panel further includes an insulating film layer, which is located in the at least one light-transmitting area and the normal display area, wherein the functional film layer is located near the lining of the insulating film layer on the surface of one side of the base substrate; the height of the surface of the part of the insulating film layer located on the side of the at least one light-transmitting area away from the base substrate in the direction perpendicular to the base substrate is the same as the height of the insulating film layer.
  • the height difference between the heights of the surface of the portion of the film layer located on the side of the normal display area away from the base substrate in a direction perpendicular to the base substrate is smaller than a first threshold; and the insulating film layer It is integrally formed with the functional film layer.
  • the insulating film layer includes a gate insulating layer on a side of the driving circuit layer away from the base substrate.
  • the display panel further includes: an interlayer dielectric layer located on a surface of the gate insulating layer on a side away from the base substrate; a planarization layer on the surface of one side of the base substrate, wherein the anode layer is provided on the planarization layer; and a pixel defining layer located on the anode layer, wherein the first insulating layer is provided on the pixel defining layer.
  • the insulating film layer includes an interlayer dielectric layer located on a side of the driving circuit layer away from the base substrate.
  • the display panel further includes: a gate electrode disposed on a surface of the driving circuit layer on a side away from the base substrate and located in the at least one light-transmitting area and the normal display area an insulating layer, wherein the functional film layer is located on a side of the gate insulating layer of the at least one light-transmitting region away from the base substrate; wherein the insulating film layer includes an interlayer dielectric layer, and the The interlayer dielectric layer is located on the side of the gate insulating layer and the functional film layer in the normal display area away from the base substrate.
  • the display panel further includes: a planarization layer located on a surface of the interlayer dielectric layer on a side away from the base substrate, wherein the anode layer is disposed on the planarization layer and a pixel defining layer on the anode layer, wherein the first insulating layer is disposed on the pixel defining layer.
  • the insulating film layer is the first insulating layer; and the display panel further includes: a surface disposed on a side of the driving circuit layer away from the base substrate and located on the at least one light-transmitting area and a gate insulating layer of the normal display area; an interlayer dielectric layer located on the surface of the gate insulating layer on the side away from the base substrate; and an interlayer dielectric layer located on the interlayer dielectric A planarization layer on the surface of the electrical layer away from the base substrate, wherein the anode layer is provided on the planarization layer, and the first anode sublayer is at a distance away from the base substrate The height of the surface of the side in the direction perpendicular to the base substrate is greater than the height of the surface of the second anode sublayer on the side away from the base substrate in the direction perpendicular to the base substrate.
  • the insulating film layer includes a planarization layer located on a surface of the anode layer on a side close to the base substrate.
  • the material of the planarization layer is polyimide.
  • the display panel further includes: a gate electrode disposed on a surface of the driving circuit layer on a side away from the base substrate and located in the at least one light-transmitting area and the normal display area an insulating layer; an interlayer dielectric layer on the gate insulating layer of the at least one light-transmitting area and the normal display area; and a pixel defining layer on the side of the anode layer away from the base substrate .
  • the functional film layer includes a driving circuit functional layer disposed on a surface of the base substrate of the at least one light-transmitting region near the second anode sublayer, and the driving circuit functional layer
  • the layer includes a plurality of functional blocks whose orthographic projections on the base substrate at least partially overlap with orthographic projections of the plurality of second anodes on the base substrate.
  • the display panel further includes a surface disposed on a side of the driving circuit functional layer away from the base substrate and a surface disposed on a side of the driving circuit functional layer away from the base substrate a gate insulating layer on the surface of the at least one light-transmitting area and the normal display area; an interlayer dielectric layer on the gate insulating layer; and a planarization on the interlayer dielectric layer layer, wherein the anode layer is disposed on the planarization layer.
  • each functional block of the plurality of functional blocks is floating, and each functional block of the plurality of functional blocks includes the same gate layer and source as the first driver circuit drain layer.
  • the functional film layer includes a gate insulating layer formed on the base substrate and located in the at least one light-transmitting region, and the gate insulating layer of the at least one light-transmitting region is remote from the substrate.
  • the height of the surface on the side of the base substrate in the direction perpendicular to the base substrate and the height of the surface of the driving circuit layer on the side away from the base substrate in the direction perpendicular to the base substrate The difference between them is less than the first threshold.
  • the gate insulating layer, the interlayer dielectric layer and the first insulating layer are made of silicon oxide, silicon nitride and/or silicon oxynitride.
  • the material for encapsulating the flat flow is an organic material.
  • the area of the orthographic projection of the second anode on the base substrate is smaller than the area of the orthographic projection of the first anode on the base substrate; and the plurality of second anodes A second distance between two adjacent second anodes in the plurality of first anodes is substantially equal to a first distance between two adjacent first anodes in the plurality of first anodes.
  • the area of the orthographic projection of the second anode on the base substrate is substantially equal to the area of the orthographic projection of the first anode on the base substrate.
  • the display device provided by the present disclosure includes the above-mentioned display panel and at least one photosensitive element disposed in at least one light-transmitting region of the display panel and located on the side of the base substrate away from the anode layer.
  • the method for preparing the above-mentioned display panel includes: forming a driving circuit layer on a base substrate through a patterning process, so that the driving circuit layer includes a plurality of A first driving circuit for driving sub-pixels; a functional film layer is formed on at least one light-transmitting area of the base substrate, so that the exposed film layer on the at least one light-transmitting area is on the side away from the base substrate.
  • the height between the height of the surface in the direction perpendicular to the base substrate and the height of the surface of the exposed film layer on the normal display area on the side away from the base substrate in the direction perpendicular to the base substrate The difference is smaller than a first threshold; and an encapsulation stratolayer is formed on the at least one light-transmitting area and the normal display area on the base substrate.
  • FIG. 1A and 1B respectively show a cross-sectional view and a top view of an OLED display panel in the related art
  • FIG. 1C shows a cross-sectional view of a portion of a driver circuit layer and a light-emitting device of a sub-pixel in the related art
  • 1D and 1E respectively show cross-sectional views of a part of a driving circuit layer in the related art
  • FIGS. 2A and 2B respectively illustrate a cross-sectional view and a top view of an OLED display panel according to an embodiment of the present disclosure
  • 2C and 2D respectively illustrate a cross-sectional view and a top view of an OLED display panel according to an embodiment of the present disclosure
  • FIG. 2E illustrates a cross-sectional view of an OLED display panel according to an embodiment of the present disclosure.
  • 3A shows a cross-sectional view of an OLED display panel according to an embodiment of the present disclosure
  • 3B shows a cross-sectional view of an OLED display panel according to an embodiment of the present disclosure
  • FIG. 4 shows a cross-sectional view of an OLED display panel according to an embodiment of the present disclosure
  • FIG. 5 shows a cross-sectional view of an OLED display panel according to an embodiment of the present disclosure
  • FIG. 6 shows a cross-sectional view of an OLED display panel according to an embodiment of the present disclosure
  • FIG. 7 shows a flowchart of a method for fabricating an OLED display panel according to an embodiment of the present disclosure
  • FIG. 8 illustrates an example diagram of forming an OLED display panel according to an embodiment of the present disclosure
  • FIG. 9 shows an example diagram of forming an OLED display panel according to an embodiment of the present disclosure.
  • FIG. 10 shows a flowchart of a method of fabricating a display panel according to an embodiment of the present disclosure.
  • FIG. 11 shows a schematic diagram of an OLED display device according to an embodiment of the present disclosure.
  • FIG. 1A and 1B respectively show a cross-sectional view and a top view of an OLED display panel with a hole-drilled area of the related art.
  • FIG. 1A is a cross-sectional view taken along line AA' of the OLED display panel shown in FIG. 1B .
  • An OLED display panel with a hole-punch area is usually divided into a light-transmitting region CR and a normal display region NR, and the light-transmitting region CR may also be called a hole-punch region.
  • a camera may be provided on a side of the OLED display panel opposite to the light-emitting side, so that light can penetrate the OLED display panel and enter the camera.
  • an OLED display panel generally includes a base substrate 1 .
  • a gate insulating layer GI In the light-transmitting region CR, a gate insulating layer GI, an interlayer dielectric layer ILD, a planarization layer PLN, a second anode layer Anode2, a pixel defining layer PDL, a first insulating layer CVD1, and a package are sequentially formed on the base substrate 1.
  • the leveling layer IJP and the second insulating layer CVD2 are respectively connected with the gate insulating layer GI, the interlayer dielectric layer ILD, the planarization layer PLN, the first anode layer Anode1, the pixel defining layer PDL, the first insulating layer in the normal display area NR and the
  • the layer CVD1, the encapsulation leveling layer IJP, and the second insulating layer CVD2 are formed in the same layer (ie, they are respectively formed into an integrated structure).
  • the difference between the light-transmitting region CR and the normal display region NR is only that: in order to increase the light transmittance of the light-transmitting region CR, the corresponding driving circuit for driving and controlling the OLED devices in the light-transmitting region CR is performed. External, that is, the driving circuit layer for driving the OLED devices in the light-transmitting region CR is not provided, for example, it can be provided in the peripheral region PR shown in FIG.
  • the disclosed display panel may not include the peripheral region PR, but the driving circuit for driving the light-emitting devices in the light-transmitting region CR may be compressed and then disposed in the built-in driving transistor for driving the OLED devices in the normal display region NR. a position in the layer.
  • FIG. 1C shows various OLED devices in an OLED display panel according to an embodiment of the present disclosure.
  • a typical OLED device includes a base substrate 1, a barrier layer 9 formed on the base substrate 1, a thin film transistor (TFT) 5 including a gate electrode 51, a source electrode 52 and a drain electrode 53, an insulating layer 6, and a cathode connection line 2 , the connection electrode 7, the anode 31, the light-emitting layer 32, the cathode 33, the pixel defining layer 4, the thin-film encapsulation layer 10, etc. disposed in the via hole 61.
  • TFT thin film transistor
  • FIG. 1C merely gives an example, and the present disclosure is not limited thereto.
  • the insulating layer 6 shown in FIG. 1C may be the gate insulating layer GI and/or the planarization layer PLN shown in FIG. 1A
  • the layer where the thin film transistor 5 in FIG. 1C is located may be the driver shown in FIG. 1A .
  • the circuit layer DCL, the layer where the anode 31 shown in FIG. 1C is located may be the first anode layer Anode1 or the second anode layer Anode2 shown in FIG. 1A
  • the pixel defining layer 4 shown in FIG. 1C may be the one shown in FIG. 1A .
  • the pixel defining layer PDL shown, the thin film encapsulation layer 10 shown in FIG. 1C may be the first insulating layer CVD1 shown in FIG. 1A .
  • the above-mentioned thin film transistor 5 can be, for example, the bottom-gate thin film transistor shown in FIG. 1D , which can include a gate electrode 51 , a gate insulating layer GI, an active layer 54 , a source electrode 52 and a drain electrode 53 on the base substrate 1 .
  • the topmost layer of the thin film transistor 5 should be, for example, the planarization layer PLN shown in FIG. 1A instead of the gate insulating layer GI .
  • the above-mentioned thin film transistor 5 can be, for example, the top-gate thin film transistor shown in (a) of FIG. 1E , which can include an active layer 54 , a source electrode 52 , a drain electrode 53 , a gate insulating layer GI and The gate electrode 51 formed on the gate insulating layer GI; alternatively, the above-mentioned thin film transistor 5 can be, for example, the top-gate thin film transistor shown in (b) of FIG. 1E, which can include the source electrode 52, The drain electrode 53, the active layer 54, the gate insulating layer GI, and the gate electrode 51 formed on the gate insulating layer GI.
  • the topmost layer of the thin film transistor 5 can be, for example, gate insulated as shown in FIG. 1A .
  • layer GI and a planarization layer is formed on the gate insulating layer GI.
  • the driving circuit layer that will be used to drive these light-emitting devices mainly includes a TFT driving circuit.
  • TFT driving circuit For external placement, for example, it can be placed in the peripheral region PR as shown in FIG. 1B to increase the light transmittance of the light-transmitting region CR.
  • the light-transmitting region CR As shown in FIG. 1A , after the TFT driving circuit of the light-transmitting region CR is externally placed or the TFT driving circuit used to drive the OLED device of the light-transmitting region CR is compressed and set in the display panel of the normal display region NR, the light-transmitting region Compared with the normal display area NR around the CR, there will be a depression, resulting in a step difference between the light-transmitting area CR and the normal display area NR (for example, there may be a height difference of about 0.7 ⁇ m), which will lead to In the later stage, for example, the encapsulated stratolayer IJP formed by the inkjet printing method has a concave MR in the light-transmitting region CR, thus resulting in a non-standard concave lens structure, which will make the light unable to focus on the image surface, resulting in spherical aberration and astigmatism , resulting in the deformation of the diffr
  • an OLED display panel comprising: a normal display area NR, at least one light-transmitting area CR at least partially surrounded by the normal display area NR, at least partially surrounding the normal display area NR
  • the peripheral area PR set in the display area NR is shown in FIG. 1B .
  • the display panel includes: a base substrate 1; a driving circuit layer DCL, which is disposed on the base substrate 1, and includes a plurality of sub-pixels located in the normal display area NR for driving a plurality of sub-pixels in the normal display area NR.
  • a built-in transistor driving layer (first driving circuit); an anode layer Anode, including a first anode sublayer Anode1 disposed in the normal display region NR and above the driving circuit layer DCL, and a first anode sublayer Anode1 disposed in the at least one light-transmitting region a second anode sublayer Anode2 of the CR, wherein the first anode sublayer Anode1 is connected to the built-in transistor drive layer and includes a plurality of first anodes (shown in FIG.
  • the second anode sublayer Anode2 includes a plurality of second anodes that are insulated and spaced apart from each other; a first insulating layer CVD1 is disposed above the anode layer Anode and includes a first insulator located in the normal display area layer CVD11 and a second insulating sub-layer CVD12 disposed in the at least one light-transmitting region; functional film layer FL, located in the at least one light-transmitting region CR and located in the second insulating sub-layer CVD12 close to the base substrate 1 side, wherein the functional film layer FL is configured such that the first surface of the first insulating sub-layer CVD11 on the side away from the base substrate 1 is the first surface in the direction perpendicular to the base substrate 1 The height difference between a height H1 and the second height H2 of the second surface of the second insulating sub-layer CVD12 on the side away from the base substrate 1 in the direction perpendicular to
  • the present disclosure takes an OLED display panel as an example to describe a display panel provided with an under-screen camera, but the present disclosure is not limited thereto, and other types of display panels are also feasible, which are not limited in the present disclosure.
  • the display region NR including the light-transmitting region CR, the display region NR disposed surrounding the light-transmitting region CR, and the periphery at least partially surrounding the display region NR shown in FIGS. 1B to 1E may be adopted.
  • the present disclosure is not limited thereto, and the specific configuration of the driving circuit layer and the OLED device can be selected according to practical applications, and then the position of the functional film layer can be selected.
  • the present disclosure provides a functional film layer FL in the light-transmitting region CR.
  • the leveling characteristic of the encapsulated stratosphere is improved, so that the problems of the deformation of the diffraction spot and the deterioration of the imaging resolution caused by the concave concave of the encapsulated stratosphere in the light-transmitting region CR can be avoided.
  • the display panel of the embodiment of the present disclosure includes a base substrate 1 , an interlayer dielectric layer ILD formed on the base substrate 1 , a planarization layer PLN, and an anode layer.
  • Anode a pixel defining layer PDL, a first insulating layer CVD1, an encapsulation stratospheric layer IJP, and a second insulating layer CVD2. As shown in FIG.
  • the display panel of the embodiment of the present disclosure further includes a first gate insulator sub-layer GI1 as a functional film layer FL formed in the light-transmitting region CR, and the height of the first gate insulator sub-layer GI1 is the same as that of the normal display region.
  • the difference between the heights of the driving circuit layers DCL of the NR is smaller than the first threshold (for example, the first threshold may be 0.2 ⁇ m, and the effect is better when the height difference is less than 0.1 ⁇ m), for example, the heights of the two may be approximately the same, This can improve the leveling characteristics of the encapsulated stratospheric IJP formed subsequently, reduce aberrations, and improve resolution.
  • the display panel may further include a second gate insulator sublayer GI2 in an integral structure (or a monolithic block) in the light transmission region CR and the normal display region NR.
  • the first gate insulator sub-layer GI1 and the second gate insulator sub-layer GI2 may have an integral structure.
  • the method shown in FIG. 8 can be used to form the pattern of the driving circuit layer DCL on the base substrate 1, so that the driving circuit layer DCL is only provided in the normal display area NR; then, on the base substrate by, for example, vapor deposition The method is to form the gate insulating layer material from silicon oxide, silicon nitride or silicon oxynitride material.
  • the gate insulating layer material formed is at the light-transmitting region CR. It is concave; then, using a halftone mask, an ashing process is used to remove more gate insulating layer material in the normal display area NR, while retaining more gate insulating layer material in the light-transmitting area CR, thereby
  • the gate insulating layer materials in the two regions of the light-transmitting region CR and the normal display region NR are made to be substantially flush, for example, the height difference between them may be smaller than the first threshold.
  • the material of the gate insulating layer in the light-transmitting region CR is substantially flush with the material of the gate insulating layer in the normal display region NR.
  • the surface of the second gate insulating sublayer GI2 of the display panel is almost flush in the light transmission region CR and the normal display region NR, so as to ensure that the surface of the second gate insulator sublayer GI2 of the display panel is almost flush with the encapsulation stratolayer IJP.
  • the second insulating sub-layer CVD12 in the light-transmitting region CR included in the contacting first insulating layer CVD1 and the first insulating sub-layer CVD11 in the normal display region NR are flush, thereby ensuring that a substantially flat encapsulation leveling layer can be formed IJP.
  • the formation of a flat encapsulation stratosphere IJP can solve the problems of the diffraction spot deformation and the reduction of imaging resolution caused by the concave concave of the encapsulation stratosphere IJP in the light transmission region CR in the related art as shown in FIG. 1A .
  • the second anode layer Anode2 includes a plurality of second anodes; in the normal display region NR, the first anode layer Anode1 includes a plurality of first anodes.
  • the area of the orthographic projection of the second anode on the base substrate 1 is smaller than the area of the orthographic projection of the first anode on the base substrate 1 , and two adjacent second anodes are adjacent to each other.
  • the second distance D2 between the second anodes may be substantially equal to the first distance D1 between adjacent two first anodes of the plurality of first anodes.
  • the first distance D1 represents the distance between two nearest points on two adjacent first anodes
  • the second distance D2 represents the distance between two nearest two points on two adjacent second anodes.
  • the configuration in which the first distance D1 is substantially equal to the second distance D2 can enhance the light transmittance of the light transmission region CR.
  • the present disclosure is not limited to this.
  • a second anode and a first anode having substantially the same size are arranged in the light transmission region CR and the normal display region NR.
  • the second anode arranged in the light transmission region CR can be reduced by reducing to increase the distance between two adjacent second anodes in the light-transmitting region CR to ensure the light transmittance of the light-transmitting region CR, as shown in FIG. 2C and FIG.
  • the distance D4 between the two second anodes is greater than the distance D3 between the two adjacent first anodes in the normal display region NR.
  • the driving transistor used in the driving circuit layer DCL of the display panel of the embodiment shown in FIGS. 2A to 2D may be a top-gate thin film transistor as shown in FIG. 1E .
  • the display panels of FIGS. 2A to 2D are not limited to using top-gate thin film transistors as driving circuits, for example, other transistors can also be used as driving circuits, that is, a part of the gate insulating layer GI is used as a functional film layer.
  • the driving transistor in the display panel that compensates for the height difference between the light-transmitting region CR and the normal display region NR is not limited to the top-gate thin film transistor.
  • the top-gate thin film transistor is used as an example for illustration, just because the process of forming the gate insulating layer can be directly used to prepare the functional film layer that compensates for the height difference in the process of forming the top-gate transistor.
  • the whole method of the display panel can be made simpler, and the manufacturing cost can be saved effectively.
  • the existing process for preparing the gate insulating layer can be used to prepare the functional film layer, this method also simplifies the preparation method to a certain extent.
  • the driving transistor used in the driving circuit layer DCL in the display panel in the embodiment shown in FIG. 2E may be a bottom-gate thin film transistor as shown in FIG. 1D .
  • the bottom gate type thin film transistor in the preparation process, the gate electrode and the gate insulating layer are formed first, and then the active layer and the source and drain electrodes are formed.
  • the height of the gate insulating layer in the light-transmitting region CR is made higher than that of the gate insulating layer of the thin film transistor in the surrounding normal display region NR
  • the height of the layer is higher than a margin, and then the active layer and source and drain of the thin film transistor in the normal display area NR are formed, which will compensate for the higher margin of this part, so that the light transmission area CR and the normal display area are formed.
  • the height difference between the two regions of the NR is smaller than the first threshold to ensure the leveling properties of the encapsulated stratosphere IJP formed later. For example, as shown in FIG.
  • the gate and gate insulating layer of the driving transistor are formed in the normal display region NR on the base substrate 1, and a gate insulating layer with a thicker thickness is simultaneously formed in the light-transmitting region CR;
  • the active layer and the source and drain of the driving transistor are formed in the normal display region NR, so that the difference between the height of the normal display region NR and the height of the light transmission region CR is smaller than the first threshold, that is, the height between the two regions is reduced Difference.
  • a semi-transparent mask can be used to form the gate insulating layer with different heights in the light-transmitting area and the normal display area.
  • the pixel defining layer PDL may be a layer after the light emitting device is formed.
  • the display panel of the embodiment of the present disclosure includes a base substrate 1 , a gate insulating layer GI formed on the base substrate, a planarization layer PLN, an anode layer Anode, A pixel defining layer PDL, a first insulating layer CVD1, an encapsulation stratospheric layer IJP, and a second insulating layer CVD2. As shown in FIG. 1A , the display panel of the embodiment of the present disclosure includes a base substrate 1 , a gate insulating layer GI formed on the base substrate, a planarization layer PLN, an anode layer Anode, A pixel defining layer PDL, a first insulating layer CVD1, an encapsulation stratospheric layer IJP, and a second insulating layer CVD2. As shown in FIG.
  • the display panel of the embodiment of the present disclosure further includes a first interlayer dielectric layer ILD1 as a functional film layer FL formed in the light-transmitting region CR, and the height of the first interlayer dielectric layer ILD1 is the same as that of the normal
  • the heights of the gate insulating layers GI in the display region NR may be approximately the same, or the height difference between the two may be smaller than the first threshold (for example, the first threshold may be 0.2 ⁇ m, and the effect is better when the height difference is less than 0.1 ⁇ m).
  • the display panel further includes a second interlayer dielectric electron layer ILD2 of an integral structure (or monolithic) formed in the light transmission region CR and the normal display region NR at the same time.
  • the first interlayer dielectric layer ILD1 and the second interlayer dielectric layer ILD2 may have an integrated structure.
  • the interlayer dielectric material such as silicon oxide, silicon nitride or silicon oxynitride
  • the material of the interlayer dielectric layer in the normal display region NR is substantially flush.
  • the surface of the second interlayer dielectric layer of the display panel is almost flush in the light transmission area CR and the normal display area NR, so as to ensure that the surface of the second interlayer dielectric layer of the display panel is almost flush with the encapsulation stratolayer IJP
  • the second insulating sub-layer CVD12 in the light-transmitting region CR included in the contacting first insulating layer CVD1 and the first insulating sub-layer CVD11 in the normal display region NR are flush, thereby ensuring that a substantially flat encapsulation leveling layer can be formed IJP.
  • the formation of a flat encapsulation stratosphere IJP can solve the problems of the diffraction spot deformation and the reduction of imaging resolution caused by the concave concave of the encapsulation stratosphere IJP in the light transmission region CR in the related art as shown in FIG. 1A .
  • a gate insulating layer GI is provided between the interlayer dielectric layer ILD and the driving circuit layer DCL.
  • the uppermost layer of the entire driving circuit layer DCL may be a gate insulating layer GI with a uniform thickness throughout the entire layer, such as
  • the gate electrode may be embedded in the gate insulating layer GI or the thickness of the gate electrode may be smaller than that of the gate insulating layer GI.
  • the present disclosure is not limited thereto.
  • the gate insulating layer GI is formed under the source and drain electrodes, and the driving circuit formed at this time is
  • the uppermost layer of the layer DCL may be the first interlayer dielectric layer ILD1 and the second interlayer dielectric layer ILD2 as in the above embodiment.
  • FIG. 4 shows a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • the display panel of the embodiment of the present disclosure includes a base substrate 1 , a gate insulating layer GI formed on the base substrate 1 , a planarization layer PLN, and an anode layer Anode. , a pixel defining layer PDL, a first insulating layer CVD1, an encapsulation leveling layer IJP, and a second insulating layer CVD2. As shown in FIG.
  • the display panel of the embodiment of the present disclosure further includes a third insulating sub-layer CVD22 as a functional film layer FL formed in the light-transmitting region CR.
  • the height of the third insulating sub-layer CVD22 is defined by the pixels of the normal display region NR.
  • the heights of the layers PDL may be approximately the same, or the height difference between the two may be smaller than the first threshold (eg, the first threshold may be 0.2 ⁇ m, and the effect is better when the first threshold is 0.1 ⁇ m).
  • the display panel further includes a first insulating layer CVD1 of an integral structure formed in the light transmission region CR and the normal display region NR at the same time.
  • the first insulating layer CVD1 and the third insulating sub-layer CVD22 may have an integrated structure.
  • the material of the first insulating layer such as silicon oxide, silicon nitride or silicon oxynitride
  • the material of the first insulating layer in the display region NR is substantially flush.
  • the functional film layer FL the third insulating sublayer CVD22 shown in FIG. 4
  • the surface of the first insulating layer CVD1 of the display panel is almost the same in the light transmission area CR and the normal display area NR flush.
  • a flat encapsulated stratosphere IJP can be formed subsequently, so as to solve the problems of the diffraction spot deformation and the reduction of imaging resolution caused by the concave concave of the encapsulated stratosphere IJP in the light-transmitting region CR as shown in FIG. 1A in the related art .
  • FIG. 5 shows a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • the display panel of the embodiment of the present disclosure includes a base substrate 1 , a gate insulating layer GI formed on the base substrate, an interlayer dielectric layer ILD, and an anode layer.
  • Anode a pixel defining layer PDL, a first insulating layer CVD1, an encapsulation stratospheric layer IJP, and a second insulating layer CVD2.
  • a base substrate 1 a gate insulating layer GI formed on the base substrate
  • ILD interlayer dielectric layer
  • anode layer anode
  • Anode a pixel defining layer PDL
  • a first insulating layer CVD1 a first insulating layer
  • CVD1 an encapsulation stratospheric layer IJP
  • a second insulating layer CVD2 As shown in FIG.
  • the display panel of the embodiment of the present disclosure further includes a first planarization sub-layer PLN1 as a functional film layer FL formed in the light-transmitting region CR, and the height of the first planarization sub-layer PLN1 is the same as that of the normal display region.
  • the height of the interlayer dielectric layer ILD of the NR may be approximately the same, or the height difference between the two may be smaller than the first threshold (for example, the first threshold may be 0.2 ⁇ m, the smaller the first threshold, the better, for example, 0.1 ⁇ m, the effect is better) .
  • the display panel further includes a first planarization sublayer PLN1 of an integral structure formed in the light transmission region CR and the normal display region NR at the same time.
  • the first planarization sub-layer PLN1 and the second planarization sub-layer PLN2 may also be formed into an integrated structure.
  • the planarization layer material eg, polyimide
  • the layer material is roughly flush.
  • the functional film layer FL the first planarization sub-layer PLN1 shown in FIG. 5
  • the surface of the first insulating layer CVD1 of the display panel is located in the light transmission area CR and the normal display area NR almost flush.
  • Such a structure can form a flat encapsulated stratosphere IJP, thereby solving the problems of diffraction spot deformation and reduced imaging resolution caused by the concave concave of the encapsulated stratosphere IJP in the light transmission region CR as shown in FIG. 1A .
  • FIG. 6 shows a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • the display panel of the embodiment of the present disclosure includes a base substrate 1 , a gate insulating layer GI formed on the base substrate 1 , an interlayer dielectric layer ILD, a flat A layer PLN, an anode layer Anode, a pixel defining layer PDL, a first insulating layer CVD1, an encapsulation leveling layer IJP and a second insulating layer CVD2.
  • a base substrate 1 a gate insulating layer GI formed on the base substrate 1 , an interlayer dielectric layer ILD, a flat A layer PLN, an anode layer Anode, a pixel defining layer PDL, a first insulating layer CVD1, an encapsulation leveling layer IJP and a second insulating layer CVD2.
  • the display panel of the embodiment of the present disclosure further includes a driving circuit layer DCL formed in the normal display region NR and a driving circuit functional layer FL-GS formed in the light transmission region CR as a functional film layer FL.
  • the driving circuit functional layer FL-GS includes a plurality of functional blocks whose orthographic projections on the base substrate 1 at least partially overlap with the orthographic projections of the plurality of second anodes on the base substrate 1, for example, all The orthographic projections of the plurality of functional blocks on the base substrate 1 fall within the orthographic projection range of the plurality of second anodes on the base substrate 1 to avoid blocking light transmission;
  • the driving circuit functional layer FL-GS is formed at the same time as the driving circuit layer DCL of the display area NR, that is, the driving circuit layer DCL and the driving circuit functional layer FL-GS can be formed simultaneously by using the same material and the same process.
  • the height of the driving circuit layer DCL in the normal display area NR may be approximately the same as the height of the driving circuit functional layer FL-GS in the light-transmitting area CR, or the height difference between the two may be smaller than the first threshold (for example, the first threshold may be 0.2 ⁇ m, however, the smaller the height difference, the better, for example, it is better if it is less than 0.1 ⁇ m).
  • the driving circuit functional layer FL-GS in the light-transmitting region CR only plays a role of padding the light-transmitting region CR, and is not used for driving the sub-pixels in the light-transmitting region CR. Therefore, a plurality of functional blocks included in the driving circuit functional layer FL-GS in the embodiment of the present disclosure are floating.
  • the driving circuits for driving the sub-pixels in the light-transmitting region CR so that the light-emitting devices in the sub-pixels emit light can be arranged in the peripheral region PR, or after these driving circuits are compressed, the compressed
  • the driving circuit is provided on the driving circuit layer of the normal display region NR.
  • the functional film layer FL the driving circuit functional layer FL-GS shown in FIG. 6
  • the surface of the first insulating layer CVD1 of the display panel is located in the light transmission area CR and the normal display area NR almost flush.
  • Such a structure can form a flat encapsulated stratosphere IJP, thereby solving the problems of diffraction spot deformation and reduced imaging resolution caused by the concave concave of the encapsulated stratosphere IJP in the light transmission region CR as shown in FIG. 1A .
  • a driving circuit layer for driving the sub-pixels in the light-transmitting region CR is used. External, for example, can be set in the peripheral area PR outside the normal display area NR and the light-transmitting area CR. This configuration will cause the light-transmitting area CR to be concave, and each layer formed subsequently will be concave. Therefore, for example, the encapsulation stratolayer IJP formed by the inkjet printing method is concave, resulting in the front side of the light-transmitting area CR where the camera is arranged on the back.
  • the present disclosure adds a functional film layer CR in the light-transmitting region CR to compensate for the height difference between the light-transmitting region CR and the normal display region NR caused by the external drive circuit layer in the light-transmitting region CR.
  • the sum of the heights of the layers in the light-transmitting area CR is almost equal to the height sum of the layers in the normal display area NR, so that the encapsulated stratolayer IJP formed subsequently is almost flush with the normal display area NR in the light-transmitting area CR, for example, two
  • the height difference between the regions may be smaller than the first threshold, for example, 0.2 ⁇ m, but the smaller the height difference, the better, for example, the height difference is less than 0.1 ⁇ m, so as to eliminate the difference between the light transmission area CR and the normal display area NR.
  • the display panel of the present disclosure adds a functional film layer FL in the light-transmitting region CR, such as the first gate insulator sublayer GI1 as the functional film layer FL shown in FIG. 2A and FIG. 2B ,
  • the planarization sub-layer PLN1 the driving circuit functional layer FL-GS as the functional film layer FL shown in FIG.
  • the present disclosure is described by the embodiments shown in FIGS. 2A to 6 , but the present disclosure is not limited thereto.
  • the display panel of the embodiment of the present disclosure may be a display panel based on the OLED device shown in FIG. 1C .
  • the OLED device in the display panel of the present disclosure may include a base substrate 1 , and a barrier formed on the base substrate 1 Layer 9, thin film transistor 5 including gate electrode 51, source electrode 52 and drain electrode 53, insulating layer 6, cathode connection line 2, connection electrode 7 arranged in via hole 61, anode 31, light-emitting layer 32, cathode 33, pixel Defining layer 4, thin film encapsulation layer 10, etc.
  • the defining layer 4 may be the pixel defining layer PDL shown in FIGS. 2A to 6
  • the thin film encapsulation layer 10 shown in FIG. 1C may be the encapsulation stratolayer IJP shown in FIGS. 2A to 6 .
  • each layer of the display panel shown in FIGS. 2A to 6 may be formed according to the specific layer structure of the OLED device.
  • the driving circuit layer shown in FIG. 1C includes bottom-gate transistors.
  • the gate when forming a bottom-gate transistor, the gate should be formed first, then the gate insulating layer and the source-drain electrode layer should be formed, so the insulating layer formed between the anode and the transistor may not be the gate. Insulation.
  • the driving transistor used in the OLED device on which the OLED display panel is based is a top-gate thin film transistor
  • the insulating layer formed between the anode and the transistor may be a gate insulating layer, and the gate insulating layer at this time may be The gate insulating layer GI shown in FIGS. 2A to 6 in the embodiment of the present disclosure. Therefore, the gate insulating layer and the pixel defining layer described in the above embodiments of the present disclosure may be the respective layers involved in the formation of the OLED device, that is, the gate insulating layer for forming the thin film transistor may be the one shown in FIGS. 2A to 6 .
  • the gate insulating layer GI, and the pixel defining layer that plays a pixel defining role when forming the OLED device may be the pixel defining layer PDL shown in FIGS. 2A to 6 in the embodiment of the present disclosure.
  • the present disclosure is not limited thereto, and the respective layers shown in FIGS. 2A to 6 are merely enumerated layers for illustrating an embodiment of the present disclosure.
  • a transparent material can be selected as the material of each layer of the display panel.
  • the gate insulating layer can be formed of silicon oxide, silicon nitride and/or silicon oxynitride.
  • the interlayer dielectric layer can also be formed of silicon oxide, silicon nitride and/or silicon oxynitride, the planarization layer can be formed of polyimide, and the first insulating layer and the second insulating layer can be formed of silicon oxide, nitrogen Silicon oxide and/or silicon oxide materials are formed, and the anode layer can be formed using conventional ITO.
  • the present disclosure is not limited thereto, for example, other materials may also be used to form the respective layers.
  • the method includes steps S71 to S73.
  • Step S71 forming a driving circuit layer on the base substrate through a patterning process, so that the driving circuit layer includes a built-in transistor driving layer located in the normal display area and used for driving a plurality of sub-pixels in the normal display area ;
  • Step S72 forming a functional film layer in at least one light-transmitting area of the base substrate, so that the height of the exposed film layer on the at least one light-transmitting area in a direction perpendicular to the base substrate is the same as the height of the The height difference of the exposed film layer on the normal display area in the direction perpendicular to the base substrate is smaller than the first threshold;
  • step S73 on the at least one light-transmitting area on the base substrate and the normal display area Forms a monolithic encapsulation stratosphere.
  • forming a functional film layer on at least one light-transmitting region of the base substrate includes forming a functional film layer material on the base substrate; and using a halftone mask HTM to form a functional film through an ashing process
  • the pattern of the film layer is such that the height of the exposed film layer on the at least one light-transmitting area in the direction perpendicular to the base substrate is the same as that of the exposed film layer on the normal display area in the direction perpendicular to the base substrate The difference between the heights on is less than the first threshold.
  • a functional film layer material eg, a gate insulating material
  • the gate insulating material layer formed will have a concave structure.
  • the height of the portion of the recessed structure in the light-transmitting region CR is greater than the height of the driving circuit layer DCL.
  • the gate insulating material layer is ashed by using a halftone mask plate HTM, which has different transmittances to light in the light transmission region CR and the normal display region NR.
  • the height difference of the polar insulating layer GI in the light-transmitting region CR and the normal display region NR is smaller than the first threshold, so as to reduce the height difference between the two regions, thereby eliminating the gap between the light-transmitting region CR and the normal display region NR It improves the flatness of the encapsulated stratospheric IJP formed subsequently, thereby eliminating or weakening the spherical aberration and dispersion caused by the collapse of the encapsulated stratospheric IJP in the related art.
  • FIG. 8 only shows one embodiment of the present disclosure, and the formed gate insulating layer GI includes the first gate insulating sub-layer GI1 and the second gate insulating sub-layer GI2 in an integrated structure.
  • the present disclosure is not limited thereto, for example, when forming the gate insulating layer shown in FIGS. 2A and 2B , the first gate insulating sub-layer GI1 shown in FIG. 2A may be formed in the light-transmitting region CR through a patterning process first, In order to reduce the step difference between the light-transmitting region CR and the normal display region NR, an almost flat second gate insulating sub-layer GI2 is formed.
  • FIG. 8 only shows a method of forming the gate insulating layer GI including the first gate insulating sub-layer GI1 as the functional film layer FL, and a similar method can also be used to prepare the gate insulating layer GI including the functional film layer as shown in FIGS. 3A to 5 .
  • the interlayer dielectric layer ILD of the first interlayer insulating sublayer ILD1 of FL, the first insulating layer CVD1 including the third insulating sublayer CVD22 as the functional film layer FL, the first planarization sublayer PLN1 including the functional film layer FL The planarization layer PLN.
  • FIG. 10 shows a flowchart of a method of manufacturing a display panel according to an embodiment of the present disclosure.
  • the method includes steps S91 and S92.
  • step S91 forming the functional film layer on the at least one light-transmitting region of the base substrate includes forming the same patterning process of forming the driving circuit layer on the base substrate and simultaneously forming the same patterning process on the at least one light-transmitting region on the base substrate.
  • the built-in transistor driving layer is the same layer as the driving circuit functional layer including a plurality of functional blocks, so that the orthographic projections of the plurality of functional blocks on the base substrate are respectively located in the plurality of second anodes on the substrate.
  • the orthographic projections on the base substrate are at least partially overlapped (for example, within its range to avoid a reduction in light transmittance); in step S92, a gate insulating layer, an interlayer dielectric layer, a planarization layer are sequentially formed on the base substrate An ionization layer, an anode layer, a pixel defining layer, a first insulating layer, an encapsulation stratolayer, and a second insulating layer.
  • the encapsulation stratolayer may be formed by an inkjet printing method. After the functional film layer FL is arranged in the light-transmitting area, the encapsulation stratosphere IJP formed by the inkjet printing method will be flat, so spherical aberration and dispersion caused by the collapse of the encapsulation stratosphere IJP in the related art can be eliminated or reduced.
  • a display device which includes the display panel according to the above-mentioned embodiment and a layer far from the anode disposed in at least one light-transmitting region of the display panel and located in a base substrate. At least one photosensitive element on one side, such as the camera 200 , is shown in FIG. 11 .
  • the display device provided by the embodiment of the present disclosure may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • a functional film layer is arranged in the light-transmitting area of the display panel of the display device provided in this embodiment to compensate for the concave depth caused by the external drive circuit layer in the light-transmitting area, so that the top package of the display panel is flattened.
  • the height difference between the layers in the light-transmitting area and the normal display area is smaller than the first threshold, for example, the encapsulation stratosphere is almost flush in the light-transmitting area and the normal display area, thus eliminating or reducing the IJP collapse of the encapsulation stratosphere in the related art resulting spherical aberration and dispersion.
  • Other essential components of the display device should be understood by those of ordinary skill in the art, and will not be repeated here, nor should it be regarded as a limitation of the present invention.

Abstract

一种显示面板及其制备方法、显示装置。显示面板包括：正常显示区（NR）和至少部分被正常显示区（NR）围绕的至少一个透光区（CR），其中，显示面板包括：衬底基板（1）；驱动电路层（DCL），设置在衬底基板（1）上，并且包括位于正常显示区（NR）的用于对正常显示区（NR）的多个子像素进行驱动的第一驱动电路；阳极层（Anode），包括设置在正常显示区（NR）且位于驱动电路层（DCL）上方的第一阳极子层（Anode1）和设置在至少一个透光区（CR）的第二阳极子层（Anode2），其中，第一阳极子层（Anode1）连接至第一驱动电路并且包括彼此之间绝缘且间隔开的多个第一阳极，以及第二阳极子层（Anode2）包括彼此之间绝缘且间隔开的多个第二阳极；第一绝缘层（CVD1），设置在阳极层（Anode）上方，并且包括位于正常显示区（NR）的第一绝缘子层（CVD11）和设置在至少一个透光区（CR）的第二绝缘子层（CVD12）；功能膜层（FL），位于至少一个透光区（CR）并且位于第二绝缘子层（CVD12）的靠近衬底基板（1）的一侧，其中，功能膜层（FL）在垂直于衬底基板（1）方向上具有第一厚度，以使得第一绝缘子层（CVD11）的远离衬底基板（1）一侧的第一表面在垂直于衬底基板（1）的方向上的第一高度（H1）与第二绝缘子层（CVD12）的远离衬底基板（1）一侧的第二表面在垂直于衬底基板（1）的方向上的第二高度（H2）之间的高度差小于第一阈值；以及设置在第一绝缘子层（CVD11）和第二绝缘子层（CVD12）的远离衬底基板（1）一侧的表面上的封装平流层（IJP）。

Description

显示面板及其制备方法、显示装置 技术领域
本公开涉及显示技术领域，具体地涉及一种显示面板及其制备方法、显示装置。
背景技术
有机发光二极管(OLED)显示面板由于OLED本身的优良特性，越来越受到人们的重视。具有屏下摄像功能的OLED显示面板通常划分为正常显示区和至少被正常显示区部分包围的能够使光透射的透光区。为了更好地确保屏下摄像头的成像质量，通常将透光区的OLED驱动电路切割掉，使得在透光区有更多的光可以穿过显示面板在摄像头上成像。
发明内容
本公开提供了一种显示面板及其制备方法、显示装置。
本公开提供的显示面板包括：正常显示区和至少部分被所述正常显示区围绕的至少一个透光区，其中，所述显示面板包括：衬底基板；驱动电路层，设置在衬底基板上，并且包括位于所述正常显示区的用于对所述正常显示区的多个子像素进行驱动的第一驱动电路；阳极层，包括设置在所述正常显示区且位于所述驱动电路层上方的第一阳极子层和设置在所述至少一个透光区的第二阳极子层，其中，所述第一阳极子层连接至所述第一驱动电路并且包括彼此之间绝缘且间隔开的多个第一阳极，以及所述第二阳极子层包括彼此之间绝缘且间隔开的多个第二阳极；第一绝缘层，设置在所述阳极层上方，并且包括位于所述正常显示区的第一绝缘子层和设置在所述至少一个透光区的第二绝缘子层；功能膜层，位于所述至少一个透光区并且位于所述第二绝缘子层的靠近所述衬底基板的一侧，其中，所述功能膜层在垂直于所述衬 底基板方向上具有第一厚度，以使得所述第一绝缘子层的远离所述衬底基板一侧的第一表面在垂直于所述衬底基板的方向上的第一高度与所述第二绝缘子层的远离所述衬底基板一侧的第二表面在垂直于所述衬底基板的方向上的第二高度之间的高度差小于第一阈值；以及设置在所述第一绝缘子层和第二绝缘子层的远离所述衬底基板一侧的表面上的封装平流层。
在一个实施例中，所述显示面板还包括位于至少部分围绕所述正常显示区的周边区域或者位于所述正常显示区、与第一驱动电路同层设置的第二驱动电路，其连接至所述第二阳极子层，用于对所述至少一个透光区中的多个子像素进行驱动。
在一个实施例中，所述显示面板还包括绝缘膜层，其位于所述至少一个透光区和所述正常显示区，其中，所述功能膜层位于所述绝缘膜层的靠近所述衬底基板一侧表面上；所述绝缘膜层位于所述至少一个透光区的部分的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度与所述绝缘膜层位于所述正常显示区的部分的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度之间的高度差小于第一阈值；以及所述绝缘膜层与所述功能膜层一体成型。
在一个实施例中，所述绝缘膜层包括位于所述驱动电路层的远离所述衬底基板一侧的栅极绝缘层。
在一个实施例中，所述显示面板还包括：位于所述栅极绝缘层的远离所述衬底基板一侧的表面上的层间介电层；位于所述层间介电层的远离所述衬底基板一侧的表面上的平坦化层，其中，所述阳极层设置在所述平坦化层上；以及位于所述阳极层上的像素限定层，其中，所述第一绝缘层设置在所述像素限定层上。
在一个实施例中，所述绝缘膜层包括位于所述驱动电路层的远离所述衬底基板一侧的层间介电层。
在一个实施例中，所述显示面板还包括：设置在所述驱动电路层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区 的栅极绝缘层，其中，所述功能膜层位于所述至少一个透光区的栅极绝缘层的远离所述衬底基板的一侧；其中，所述绝缘膜层包括层间介电层，所述层间介电层位于所述正常显示区的栅极绝缘层和所述功能膜层的远离所述衬底基板一侧。
在一个实施例中，所述显示面板还包括：位于所述层间介电层的远离所述衬底基板一侧的表面上的平坦化层，其中，所述阳极层设置在所述平坦化层上；以及位于所述阳极层上的像素限定层，其中，所述第一绝缘层设置在所述像素限定层上。
在一个实施例中，所述绝缘膜层为所述第一绝缘层；以及所述显示面板还包括：设置在所述驱动电路层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区的栅极绝缘层；位于所述栅极绝缘层的远离所述衬底基板一侧的表面上的层间介电层；以及位于所述层间介电层的远离所述衬底基板一侧的表面上的平坦化层，其中，所述阳极层设置在所述平坦化层上，并且所述第一阳极子层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度大于所述第二阳极子层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度。
在一个实施例中，所述绝缘膜层包括位于所述阳极层的靠近所述衬底基板一侧表面上的平坦化层。
在一个实施例中，所述平坦化层的材料为聚酰亚胺。
在一个实施例中，所述显示面板还包括：设置在所述驱动电路层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区的栅极绝缘层；位于所述至少一个透光区和所述正常显示区的栅极绝缘层上的层间介电层；以及位于在所述阳极层的远离所述衬底基板一侧的像素限定层。
在一个实施例中，所述功能膜层包括设置在所述至少一个透光区的衬底基板的靠近所述第二阳极子层一侧表面上的驱动电路功能层，以及所述驱动电路功能层包括多个功能块，所述多个功能块在所述衬底基板上的正投影与 所述多个第二阳极在所述衬底基板上的正投影至少部分重叠。
在一个实施例中，所述显示面板还包括设置在所述驱动电路功能层的远离所述衬底基板一侧的表面上和设置在所述驱动电路功能层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区的栅极绝缘层；所述栅极绝缘层上的层间介电层；以及所述层间介电层上的平坦化层，其中所述阳极层设置在所述平坦化层上。
在一个实施例中，所述多个功能块中的每一个功能块均浮置，以及所述多个功能块中的每一个功能块包括与所述第一驱动电路相同的栅极层和源漏极层。
在一个实施例中，所述功能膜层包括形成在衬底基板上位于所述至少一个透光区的栅极绝缘层，以及所述至少一个透光区的栅极绝缘层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度与所述驱动电路层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度之间的差值小于第一阈值。
在一个实施例中，所述栅极绝缘层、所述层间介电层和所述第一绝缘层的材料为氧化硅、氮化硅和/或氮氧化硅。
在一个实施例中，所述封装平流程的材料为有机材料。
在一个实施例中，所述第二阳极在所述衬底基板上的正投影的面积小于所述第一阳极在所述衬底基板上的正投影的面积；以及所述多个第二阳极中相邻两个第二阳极之间的第二距离大致等于所述多个第一阳极中相邻两个第一阳极之间的第一距离。
在一个实施例中，所述第二阳极在所述衬底基板上的正投影的面积大致等于所述第一阳极在所述衬底基板上的正投影的面积。
本公开提供的显示装置包括上述显示面板和设置在所述显示面板的至少一个透光区内且位于衬底基板的远离所述阳极层一侧的至少一个感光元件。
本公开提供的制备上述显示面板的方法包括：通过图案化工艺在衬底基 板上形成驱动电路层，使得所述驱动电路层包括位于所述正常显示区的用于对所述正常显示区的多个子像素进行驱动的第一驱动电路；在所述衬底基板的至少一个透光区形成功能膜层，使得所述至少一个透光区上的暴露膜层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度与所述正常显示区上的暴露膜层的远离所述衬底基板一侧的表面在垂直于衬底基板的方向上的高度之间的差值小于第一阈值；以及在所述衬底基板上的所述至少一个透光区和所述正常显示区上形成封装平流层。
附图说明
为了使得本领域技术人员更好地理解本公开，以下结合附图对本公开的具体实施例方式进行描述，其中：
图1A和图1B分别示出了相关技术中的OLED显示面板的截面图和俯视图；
图1C示出了相关技术中的子像素的驱动电路层和发光器件的一部分的截面图；
图1D和图1E分别示出了相关技术中的驱动电路层的一部分的截面图；
图2A和图2B分别示出了根据本公开实施例的OLED显示面板的截面图和俯视图；
图2C和图2D分别示出了根据本公开实施例的OLED显示面板的截面图和俯视图；
图2E示出了根据本公开实施例的OLED显示面板的截面图。
图3A示出了根据本公开实施例的OLED显示面板的截面图；
图3B示出了根据本公开实施例的OLED显示面板的截面图；
图4示出了根据本公开实施例的OLED显示面板的截面图；
图5示出了根据本公开实施例的OLED显示面板的截面图；
图6示出了根据本公开实施例的OLED显示面板的截面图；
图7示出了根据本公开实施例的制备OLED显示面板的方法的流程图；
图8示出了根据本公开实施例的形成OLED显示面板的示例图；
图9示出了根据本公开实施例的形成OLED显示面板的示例图；
图10示出了根据本公开实施例的制备显示面板的方法的流程图；以及
图11示出了根据本公开实施例的OLED显示装置的示意图。
具体实施方式
为使本领域的技术人员更好地理解本公开的技术方案，下面结合附图对本公开提供的显示面板及其制备方法和显示装置进行详细描述。
图1A和图1B分别示出了相关技术的具有挖孔区的OLED显示面板的截面图和俯视图。图1A为沿着图1B所示的OLED显示面板的AA’线截取的截面图。具有挖孔区的OLED显示面板通常划分为透光区CR和正常显示区NR，透光区CR也可以称为挖孔区。在透光区CR，OLED显示面板的与出光侧相对的一侧上可以设置摄像头，以使得光能过穿透OLED显示面板射入摄像头。
如图1A所示，OLED显示面板通常包括衬底基板1。在透光区CR，衬底基板1上依次形成有栅极绝缘层GI、层间介电层ILD、平坦化层PLN、第二阳极层Anode2、像素限定层PDL、第一绝缘层CVD1、封装流平层IJP、第二绝缘层CVD2；在正常显示区NR，衬底基板1上依次形成有驱动电路层DCL、栅极绝缘层GI、层间介电层ILD、平坦化层PLN、第二阳极层Anode2、像素限定层PDL、第一绝缘层CVD1、封装流平层IJP、第二绝缘层CVD2。
图1A所示的实施例中，透光区CR的栅极绝缘层GI、层间介电层ILD、平坦化层PLN、第二阳极层Anode2、像素限定层PDL、第一绝缘层CVD1、封装流平层IJP、第二绝缘层CVD2分别与正常显示区NR中的栅极绝缘层GI、层间介电层ILD、平坦化层PLN、第一阳极层Anode1、像素限定层PDL、第一绝缘层CVD1、封装流平层IJP、第二绝缘层CVD2同层形成(即，分 别形成为一体结构)。透光区CR和正常显示区NR之间的区别仅仅在于：为了增大透光区CR的光透光率，将用于对透光区CR中的OLED器件进行驱动控制的相对应驱动电路进行外置，即，在透光区CR中不设置用于对该区域的OLED器件进行驱动的驱动电路层，例如可以设置在图1B所示的周边区域PR，但是本公开不限于此，例如本公开的显示面板可以不包括周边区域PR，而是可以将用于驱动透光区CR中的发光器件的驱动电路进行压缩然后设置在用于对正常显示区NR的OLED器件进行驱动的内置驱动晶体管层中的某一位置。
图1C示出了根据本公开实施例的OLED显示面板中的各个OLED器件。通常的OLED器件包括衬底基板1，形成在衬底基板1上的阻隔层9，包括栅极51、源极52和漏极53的薄膜晶体管(TFT)5，绝缘层6，阴极连接线2，设置在过孔61中的连接电极7，阳极31，发光层32，阴极33，像素限定层4，薄膜封装层10等等。
图1C仅仅是给出了一个示例，本公开不限于此。例如图1C中示出的绝缘层6可以为图1A中示出的栅极绝缘层GI和/或者平坦化层PLN，图1C中的薄膜晶体管5所在的层可以为图1A中示出的驱动电路层DCL，图1C中示出的阳极31所在的层可以为图1A中示出的第一阳极层Anode1或第二阳极层Anode2，图1C中示出的像素限定层4可以为图1A中示出的像素限定层PDL，图1C中示出的薄膜封装层10可以为图1A中示出的第一绝缘层CVD1。
上述薄膜晶体管5例如可以为图1D示出的底栅型薄膜晶体管，其可以包括衬底基板1上的栅极51、栅极绝缘层GI、有源层54、源极52和漏极53。这种底栅型薄膜晶体管用在显示基板时，在形成薄膜晶体管5之后，形成阳极层之前，薄膜晶体管5最顶层应当是例如图1A所示的平坦化层PLN，而不是栅极绝缘层GI。
上述薄膜晶体管5例如可以为图1E的(a)示出的顶栅型薄膜晶体管，其可以包括衬底基板1上的有源层54、源极52、漏极53、栅极绝缘层GI 和栅极绝缘层GI上形成的栅极51；作为选择，上述薄膜晶体管5例如可以为图1E的(b)示出的顶栅型薄膜晶体管，其可以包括衬底基板1上的源极52、漏极53、有源层54、栅极绝缘层GI和栅极绝缘层GI上形成的栅极51。这两种顶栅型薄膜晶体管用于对显示基板中的OLED发光器件进行驱动时，在形成薄膜晶体管5之后，形成阳极层之前，薄膜晶体管5最顶层例如可以如图1A所示的栅极绝缘层GI，而栅极绝缘层GI上形成了平坦化层。
如图1A所示，为了增加透光区CR的光透过率，对于透光区CR中的OLED发光器件而言，将用于对这些发光器件进行驱动的主要包括TFT驱动电路的驱动电路层进行外置，例如可以置于如图1B所示的周边区域PR，以增大透光区CR的光透过率。
如图1A所示，在将透光区CR的TFT驱动电路外置或者将用于驱动透光区CR的OLED器件的TFT驱动电路压缩后设置在正常显示区NR的显示面板中，透光区CR相对于其周边的正常显示区NR而言，将会存在凹陷，导致透光区CR和正常显示区NR二者之间存在段差(例如可能会存在大约0.7μm的高度差)，这样会导致后期例如通过喷墨打印方法形成的封装平流层IJP在透光区CR存在凹陷MR，从而产生一个非标准的凹透镜结构，这样的结构将会使得光线无法聚焦在像面，产生球差和像散，造成衍射光线变形，成像解析度降低。
为此，根据本公开的一个实施例，提供了一种OLED显示面板，包括：正常显示区NR、至少部分被所述正常显示区NR围绕的至少一个透光区CR、至少部分围绕所述正常显示区NR设置的周边区域PR，如图1B所示。所述显示面板包括：衬底基板1；驱动电路层DCL，设置在衬底基板1上，并且包括位于所述正常显示区NR的用于对所述正常显示区NR的多个子像素进行驱动的内置晶体管驱动层(第一驱动电路)；阳极层Anode，包括设置在所述正常显示区NR且位于所述驱动电路层DCL上方的第一阳极子层Anode1和设置在所述至少一个透光区CR的第二阳极子层Anode2，其中，所述第一阳极子层Anode1连接至所述内置晶体管驱动层并且包括彼此之间 绝缘且间隔开的多个第一阳极(图1B所示)，以及所述第二阳极子层Anode2包括彼此之间绝缘且间隔开的多个第二阳极；第一绝缘层CVD1，设置在所述阳极层Anode上方，并且包括位于所述正常显示区的第一绝缘子层CVD11和设置在所述至少一个透光区的第二绝缘子层CVD12；功能膜层FL，位于所述至少一个透光区CR并且位于所述第二绝缘子层CVD12的靠近所述衬底基板1的一侧，其中，所述功能膜层FL配置为使得所述第一绝缘子层CVD11的远离所述衬底基板1一侧的第一表面在垂直于所述衬底基板1的方向上的第一高度H1与所述第二绝缘子层CVD12的远离所述衬底基板1一侧的第二表面在垂直于所述衬底基板1的方向上的第二高度H2之间的高度差小于第一阈值；以及设置在所述第一绝缘层CVD1的远离所述衬底基板1一侧的表面上、位于所述至少一个透光区CR和所述正常显示区NR的整块的封装平流层IJP。
本公开以OLED显示面板为例对设置有屏下摄像头的显示面板进行了描述，但是本公开不限于此，其他类型的显示面板也是可行的，本公开对此不做限定。
在本公开的实施例的显示面板中，可以采用图1B至图1E所示的包括透光区CR、包围所述透光区CR设置的显示区NR和至少部分包围所述显示区NR的周边区域PR，以及驱动电路层中所包括的薄膜晶体管及其所驱动的发光器件、底栅型薄膜晶体管和顶栅型薄膜晶体管。然而，本公开不限于此，可以根据实际应用来选择具体的驱动电路层和OLED器件的配置，然后再选择设置功能膜层的位置。
为了避免相关技术中透光区CR中不存在驱动电路层而导致其上形成的封装平流层IJP在透光区CR处下凹的问题，本公开在透光区CR中设置了功能膜层FL，其增大了透光区CR中封装平流层下方的层的高度，例如使得封装平流层下方的第一绝缘子层在透光区CR中部分的高度基本上等于其在正常显示区NR中部分的高度，从而在例如通过喷墨打印方式在有第一绝缘子层和第二绝缘子层构成的第一绝缘层上形成封装平流层时，显示面板的整 个表面上的封装平流层几乎是平坦的，改善了封装平流层的流平特性，从而可以避免封装平流层在透光区CR下凹所带来的衍射光斑变形以及成像解析度变差的问题。
图2A和图2B分别示出了根据本公开实施例的显示面板的截面图和俯视图。与图1A所示的相关技术的显示面板不同的是，本公开实施例的显示面板包括衬底基板1、在衬底基板1上形成的层间介电层ILD、平坦化层PLN、阳极层Anode、像素限定层PDL、第一绝缘层CVD1、封装平流层IJP和第二绝缘层CVD2。如图2A所示，本公开实施例的显示面板还包括形成在透光区CR中的作为功能膜层FL的第一栅极绝缘子层GI1，第一栅极绝缘子层GI1的高度与正常显示区NR的驱动电路层DCL的高度之间的差值小于第一阈值(例如，第一阈值可以为0.2μm，在所述高度差小于0.1μm时效果更佳)，例如二者高度可以大致相同，这样可改善后续形成的封装平流层IJP的流平特性，减少像差，提高解析度。在该实施例中，显示面板还可以包括在透光区CR和正常显示区NR中的一体结构(或者整块的)的第二栅极绝缘子层GI2。在一个实施例中，第一栅极绝缘子层GI1和第二栅极绝缘子层GI2可以为一体结构。例如，可以采用图8所示的方法，在衬底基板1上形成驱动电路层DCL的图案，使得驱动电路层DCL仅仅设置在正常显示区NR中；然后，在衬底基板上通过例如气相沉积的方法由氧化硅、氮化硅或氮氧化硅材料形成栅极绝缘层材料，由于在透光区CR中没有设置驱动电路层DCL，因此所形成的栅极绝缘层材料在透光区CR处是下凹的；然后利用半色调掩膜板，采用灰化工艺，去除更多正常显示区NR中的栅极绝缘层材料，而保留更多透光区CR中的栅极绝缘层材料，从而使得透光区CR和正常显示区NR两个区域中的栅极绝缘层材料大致齐平，例如二者之间的高度差可以小于第一阈值。即，通过灰化工艺后，使得透光区CR中的栅极绝缘层材料与正常显示区NR中的栅极绝缘层材料大致齐平。如图2A所示，通过设置功能膜层FL，使得显示面板的第二栅极绝缘子层GI2的表面在透光区CR和正常显示区NR中几乎是齐平的，以确保与封装平流层IJP接触的第一绝缘层 CVD1所包括的透光区CR中的第二绝缘子层CVD12和正常显示区NR中的第一绝缘子层CVD11是齐平的，从而确保了可以形成基本上平坦的封装平流层IJP。形成平坦的封装平流层IJP，可以解决如图1A所示的相关技术中封装平流层IJP在透光区CR中下凹导致的衍射光斑变形、成像解析度降低的问题。
如图2A和图2B所示，在透光区CR中，第二阳极层Anode2包括多个第二阳极；在正常显示区NR中，第一阳极层Anode1包括多个第一阳极。如图2A和图2B所示，第二阳极在衬底基板1上的正投影的面积小于第一阳极在衬底基板1上的正投影的面积，而多个第二阳极中相邻两个第二阳极之间的第二距离D2可以大致等于多个第一阳极中相邻两个第一阳极之间的第一距离D1。第一距离D1表示相邻两个第一阳极上距离最近的两个点之间的距离，第二距离D2表示相邻两个第二阳极上距离最近的两个点之间的距离。第一距离D1大致等于第二距离D2的配置可以增强透光区CR的光透过率。但是本公开不限于此，例如在透光区CR和正常显示区NR中设置尺寸大致相同的第二阳极和第一阳极，此时可以通过减小在透光区CR中所设置的第二阳极的数量从而增大透光区CR中相邻两个第二阳极之间的距离来确保透光区CR的光透过率，如图2C和图2D所示，其中透光区CR中相邻两个第二阳极之间的距离D4大于正常显示区NR中相邻两个第一阳极之间的距离D3。
图2A至图2D示出的实施例的显示面板的驱动电路层DCL中所采用的驱动晶体管可以为如图1E所示的顶栅型薄膜晶体管。需要注意的是，图2A至图2D的显示面板不限于使用顶栅型薄膜晶体管作为驱动电路，例如还可以采用其他晶体管作为驱动电路，即，以栅极绝缘层GI的一部分作为功能膜层来补偿透光区CR和正常显示区NR的高度差的显示面板中的驱动晶体管不限于顶栅型薄膜晶体管。本实施例中，以顶栅型薄膜晶体管为例进行说明，仅仅是因为在形成顶栅型晶体管的过程中可以直接利用其形成栅极绝缘层的工艺来制备补偿高度差的功能膜层，这样可以使得显示面板的整个方法 更加简单，有利用节约制备成本。然而，需要明白的是，为了不改变现有工艺，可选的，可以在形成驱动晶体管(不必是顶栅型薄膜晶体管)后，可以利用现有的制备栅极绝缘层的工艺来制备功能膜层，这种方法在一定程度上也会使得制备方法变得简单。
图2E示出的实施例中的显示面板中的驱动电路层DCL中采用的驱动晶体管可以为如图1D所示的底栅型薄膜晶体管。对于底栅型薄膜晶体管，在制备的过程中，先形成栅极和栅极绝缘层，然后再形成有源层和源漏极。因此，针对基于底栅型薄膜晶体管的显示面板，在形成栅极绝缘层的过程中，使得透光区CR中的栅极绝缘层的高度比周边的正常显示区NR中薄膜晶体管的栅极绝缘层的高度高出一个裕度，然后再形成正常显示区NR的薄膜晶体管的有源层和源漏极，这将会补偿这一部分高出的裕度，以使得透光区CR和正常显示区NR两个区域之间的高度差小于第一阈值，以确保之后形成的封装平流层IJP的流平特性。例如图9所示，衬底基板1上的正常显示区NR中形成驱动晶体管的栅极和栅极绝缘层，此时在透光区CR中同时形成厚度较厚的栅极绝缘层；然后在正常显示区NR中形成驱动晶体管的有源层和源漏极，使得正常显示区NR的高度与透光区CR的高度之间的差小于第一阈值，即，缩小两个区域之间的高度差。在该过程中，在形成栅极绝缘层时可以利用半透膜掩膜板来形成透光区和正常显示区高度不同的栅极绝缘层。
本公开上述实施例中仅仅示出了发光器件的一部分，阳极层Anode和像素限定层PDL。如本领域技术人员已知，例如图1C所示，在形成像素限定层PDL后还需要在像素限定层PDL形成的凹槽中形成发光器件的发光层和阴极，因此虽然本公开的实施例中以像素限定层PDL为平坦的层的方式示出本公开的构思，但是实际上本领域技术人员应当明白，可以在具体实际应用中具体设计各层，例如本公开各实施例的附图中示出的像素限定层PDL可以为形成发光器件后的层。
图3A示出了根据本公开实施例的显示面板的截面示意图。与图1A所 示的相关技术的显示面板不同的是，本公开实施例的显示面板包括衬底基板1、在衬底基板上形成的栅极绝缘层GI、平坦化层PLN、阳极层Anode、像素限定层PDL、第一绝缘层CVD1、封装平流层IJP和第二绝缘层CVD2。如图3A所示，本公开实施例的显示面板还包括形成在透光区CR中的作为功能膜层FL的第一层间介电子层ILD1，第一层间介电子层ILD1的高度与正常显示区NR的栅极绝缘层GI的高度可以大致相同，或者二者的高度差小于第一阈值(例如第一阈值可以为0.2μm，在所述高度差小于0.1μm时效果更佳)。该显示面板还包括同时形成在透光区CR和正常显示区NR中的一体结构(或者整块的)的第二层间介电子层ILD2。可选地，第一层间介电子层ILD1和第二层间介电子层ILD2可以为一体结构。例如，可以类似于图7所示的方法，通过灰化工艺和半色调掩膜板，使得透光区CR中的层间介电层材料(例如氧化硅、氮化硅或氮氧化硅)与正常显示区NR中的层间介电层材料大致齐平。如图3A所示，通过设置功能膜层FL，使得显示面板的第二层间介电子层的表面在透光区CR和正常显示区NR中几乎是齐平的，以确保与封装平流层IJP接触的第一绝缘层CVD1所包括的透光区CR中的第二绝缘子层CVD12和正常显示区NR中的第一绝缘子层CVD11是齐平的，从而确保了可以形成基本上平坦的封装平流层IJP。形成平坦的封装平流层IJP，可以解决如图1A所示的相关技术中封装平流层IJP在透光区CR中下凹导致的衍射光斑变形、成像解析度降低的问题。
图3A所示的显示面板中在层间介电层ILD与驱动电路层DCL之间设置有栅极绝缘层GI。例如，本公开的显示面板在形成驱动电路层DCL后(例如包括图1D所示的顶栅型晶体管)，整个驱动电路层DCL最上层可以为整层的厚度均一的栅极绝缘层GI，例如栅极可以嵌入在栅极绝缘层GI中或者栅极厚度相对于栅极绝缘层GI厚度较小。但是本公开不限于此，作为选择，本公开的显示面板可以采用图1C所示的底栅型晶体管时，栅极绝缘层GI会形成在源极和漏极下方，此时所形成的驱动电路层DCL最上层可以为如上实施例的第一层间介电子层ILD1和第二层间介电子层ILD2。
图4示出了根据本公开实施例的显示面板的截面示意图。与图1A所示的相关技术的显示面板不同的是，本公开实施例的显示面板包括衬底基板1、在衬底基板1上形成的栅极绝缘层GI、平坦化层PLN、阳极层Anode、像素限定层PDL、第一绝缘层CVD1、封装平流层IJP和第二绝缘层CVD2。如图4所示，本公开实施例的显示面板还包括形成在透光区CR中的作为功能膜层FL的第三绝缘子层CVD22，第三绝缘子层CVD22的高度与正常显示区NR的像素限定层PDL的高度可以大致相同，或者二者的高度差小于第一阈值(例如第一阈值可以为0.2μm，在第一阈值为0.1μm时效果更佳)。显示面板还包括同时形成在透光区CR和正常显示区NR中的一体结构的第一绝缘层CVD1。可选地，第一绝缘层CVD1和第三绝缘子层CVD22可以为一体结构。例如，可以类似于图7所示的方法，通过灰化工艺和半色调掩膜板，使得透光区CR中的第一绝缘层材料(例如氧化硅、氮化硅或氮氧化硅)与正常显示区NR中的第一绝缘层材料大致齐平。如图4所示，通过设置功能膜层FL(如图4所示的第三绝缘子层CVD22)，使得显示面板的第一绝缘层CVD1的表面在透光区CR和正常显示区NR中几乎是齐平的。这样的构造，后续可以形成平坦的封装平流层IJP，从而可以解决如图1A所示的相关技术中封装平流层IJP在透光区CR中下凹导致的衍射光斑变形、成像解析度降低的问题。
图5示出了根据本公开实施例的显示面板的截面示意图。与图1A所示的相关技术的显示面板不同的是，本公开实施例的显示面板包括衬底基板1、在衬底基板上形成的栅极绝缘层GI、层间介电层ILD、阳极层Anode、像素限定层PDL、第一绝缘层CVD1、封装平流层IJP和第二绝缘层CVD2。如图5所示，本公开实施例的显示面板还包括形成在透光区CR中的作为功能膜层FL的第一平坦化子层PLN1，第一平坦化子层PLN1的高度与正常显示区NR的层间介电层ILD的高度可以大致相同，或者二者的高度差小于第一阈值(例如第一阈值可以为0.2μm，第一阈值越小越好，例如0.1μm时效果更佳)。显示面板还包括同时形成在透光区CR和正常显示区NR中的一体结 构的第一平坦化子层PLN1。可选地，第一平坦化子层PLN1和第二平坦化子层PLN2也可以形成为一体结构。例如，可以类似于图7所示的方法，通过灰化工艺和半色调掩膜板，使得透光区CR中的平坦化层材料(例如聚酰亚胺)与正常显示区NR中的平坦化层材料大致齐平。如图5所示，通过设置功能膜层FL(如图5所示的第一平坦化子层PLN1)，使得显示面板的第一绝缘层CVD1的表面在透光区CR和正常显示区NR中几乎是齐平的。这样的构造，可以形成平坦的封装平流层IJP，从而可以解决如图1A所示的相关技术中封装平流层IJP在透光区CR中下凹导致的衍射光斑变形、成像解析度降低的问题。
图6示出了根据本公开实施例的显示面板的截面示意图。与图1A所示的相关技术的显示面板不同的是，本公开实施例的显示面板包括衬底基板1、在衬底基板1上形成的栅极绝缘层GI、层间介电层ILD、平坦化层PLN、阳极层Anode、像素限定层PDL、第一绝缘层CVD1、封装平流层IJP和第二绝缘层CVD2。如图6所示，本公开实施例的显示面板还包括形成在正常显示区NR中的驱动电路层DCL和形成在透光区CR中的作为功能膜层FL的驱动电路功能层FL-GS。在该实施例中，驱动电路功能层FL-GS包括多个功能块，其在衬底基板1上的正投影与多个第二阳极在衬底基板1上的正投影至少部分重叠，例如所述多个功能块在衬底基板1上的正投影落入所述多个第二阳极在衬底基板1上的正投影范围内，以避免阻挡光透射；可以在衬底基板1上形成正常显示区NR的驱动电路层DCL的同时形成驱动电路功能层FL-GS，即可以利用相同的材料和相同的工艺同时形成驱动电路层DCL和驱动电路功能层FL-GS。正常显示区NR中的驱动电路层DCL的高度与透光区CR中的驱动电路功能层FL-GS的高度可以大致相同，或者二者的高度差小于第一阈值(例如第一阈值可以为0.2μm，然而高度差越小越好，例如小于0.1μm时效果更佳)。该实施例中，透光区CR中的驱动电路功能层FL-GS仅仅起到垫高透光区CR的作用，其不用于对透光区CR内的子像素进行驱动。因此，本公开实施例中的驱动电路功能层FL-GS所包括的多个功能块是 浮置的。如上所述，用于对透光区CR内的子像素进行驱动从而使得子像素内的发光器件发光的驱动电路可以设置在周边区域PR中，或者对这些驱动电路进行压缩后，将压缩后的驱动电路设置在正常显示区NR的驱动电路层上。如图6所示，通过设置功能膜层FL(如图6所示的驱动电路功能层FL-GS)，使得显示面板的第一绝缘层CVD1的表面在透光区CR和正常显示区NR中几乎是齐平的。这样的构造，可以形成平坦的封装平流层IJP，从而可以解决如图1A所示的相关技术中封装平流层IJP在透光区CR中下凹导致的衍射光斑变形、成像解析度降低的问题。
在本公开实施例的显示面板中，如图2A至图6所示，为了增大透光区CR的光透过率，将用来对透光区CR中的子像素进行驱动的驱动电路层外置，例如可以设置在正常显示区NR和透光区CR外的周边区域PR中。这种配置会导致透光区CR下凹，后续形成的各层均会下凹，因此例如通过喷墨打印方法形成的封装平流层IJP下凹，从而导致背面设置摄像头的透光区CR的正面下凹，导致衍射光斑变形、成像解析度下降。为了解决这一问题，本公开在透光区CR中增设功能膜层CR来补偿由于透光区CR中的驱动电路层外置导致的透光区CR与正常显示区NR之间的高度差，使得透光区CR各层的高度和几乎等于正常显示区NR各层的高度和，从而后续形成的封装平流层IJP在透光区CR与正常显示区NR几乎处于齐平的状态，例如两个区域之间的高度差可以小于第一阈值，例如可以为0.2μm，但是高度差越小越好，例如高度差小于0.1μm效果更佳，以此来消除透光区CR和正常显示区NR之间的段差，改善封装平流层IJP的平坦性，从而消除或减弱了相关技术中封装平流层IJP塌陷导致的球差和色散。
如上所述，相对于相关技术，本公开的显示面板在透光区CR中增设了功能膜层FL，例如图2A和图2B所示的作为功能膜层FL的第一栅极绝缘子层GI1，图3A所示的作为功能膜层FL的第一层间介电子层ILD1，图4所示的作为功能膜层FL的第三绝缘子层CVD22，图5所示的作为功能膜层FL的第一平坦化子层PLN1，图6所示的作为功能膜层FL的驱动电路功能 层FL-GS，以此来补偿由于透光区CR为了增大光透过率而将对透光区CR中的子像素进行驱动的驱动电路进行外置而导致的透光区CR下凹的深度。
本公开通过附图2A至图6所示的实施例来描述了本公开，但是本公开不限于此。本公开实施例的显示面板可以为基于图1C所示的OLED器件的显示面板，如上所述，本公开的显示面板中的OLED器件可以包括衬底基板1，形成在衬底基板1上的阻隔层9，包括栅极51、源极52和漏极53的薄膜晶体管5，绝缘层6，阴极连接线2，设置在过孔61中的连接电极7阳极31，发光层32，阴极33，像素限定层4，薄膜封装层10等等。图1C中示出的绝缘层6可以为图2A至图6中示出的栅极绝缘层GI和/或者平坦化层PLN，图1C中的薄膜晶体管5所在的层可以为图2A至图6中示出的驱动电路层DCL，图1C中示出的阳极31所在的层可以为图2A至图6中示出的第一阳极层Anode1或第二阳极层Anode2，图1C中示出的像素限定层4可以为图2A至图6中示出的像素限定层PDL，图1C中示出的薄膜封装层10可以为图2A至图6中示出的封装平流层IJP。
也就是说，在形成如图2A至图6所示的显示面板时，可以根据具体形成OLED器件的各个层结构来形成如图2A至图6所示的显示面板的各个层。例如，图1C所示的驱动电路层包括底栅型晶体管。如本领域技术人员已知的是，在形成底栅型晶体管时首先要形成栅极、再形成栅极绝缘层、源漏电极层，因此形成的阳极与晶体管之间的绝缘层可能不是栅极绝缘层。而如果OLED显示面板所基于的OLED器件所采用的驱动晶体管为顶栅型薄膜晶体管，则形成的阳极与晶体管之间的绝缘层可以是栅极绝缘层，此时的栅极绝缘层就可以为本公开实施例的图2A至图6所示的栅极绝缘层GI。因此，本公开上述实施例中记载的栅极绝缘层和像素限定层可以为形成OLED器件时涉及到的各个层，即，形成薄膜晶体管的栅极绝缘层可以作为图2A至图6所示的栅极绝缘层GI，而在形成OLED器件时起到像素限定作用的像素限定层可以为本公开实施例的图2A至图6所示的像素限定层PDL。但是本公开不限于此，图2A至图6所示的各个层仅仅是为说明本公开的实施例而列 举的层。
为了增大透光区CR的光透过率，可以选择透明材料作为显示面板的各层材料,如上所述,栅极绝缘层可以采用氧化硅、氮化硅和/或氮氧化硅来形成,层间介电层也可以采用氧化硅、氮化硅和/或氮氧化硅来形成,平坦化层可以采用聚酰亚胺来形成,第一绝缘层和第二绝缘层可以采用氧化硅、氮化硅和/或氧化硅材料形成,而阳极层可以采用常规的ITO形成。但是本公开不限于此，例如还可以采用其他材料来形成各个层。
根据本公开的另一方面，还提供了一种制备上述显示面板的方法。如图7所示，所述方法包括步骤S71至步骤S73。步骤S71，通过图案化工艺在衬底基板上形成驱动电路层，使得所述驱动电路层包括位于所述正常显示区的用于对所述正常显示区的多个子像素进行驱动的内置晶体管驱动层；步骤S72，在所述衬底基板的至少一个透光区形成功能膜层，使得所述至少一个透光区上的暴露膜层在垂直于所述衬底基板的方向上的高度与所述正常显示区上的暴露膜层在垂直于衬底基板的方向上的高度差小于第一阈值；步骤S73，在所述衬底基板上的所述至少一个透光区和所述正常显示区上形成整块的封装平流层。
如图8所示，在所述衬底基板的至少一个透光区形成功能膜层包括在所述衬底基板上形成功能膜层材料；以及利用半色调掩膜板HTM通过灰化工艺形成功能膜层的图案以使得所述至少一个透光区上的暴露膜层在垂直于所述衬底基板的方向上的高度与所述正常显示区上的暴露膜层在垂直于衬底基板的方向上的高度之间的差值小于第一阈值。
如图8所示，在正常显示区NR中形成了驱动电路层DCL，而透光区CR中并未设置驱动电路层时，在衬底基板1上形成功能膜层材料(例如栅极绝缘材料层)，由于此时透光区CR的膜层高度低于其周边正常显示区NR中的膜层高度，因此所形成的栅极绝缘材料层将会呈现下凹结构。该下凹结构的处于透光区CR的部分的高度大于驱动电路层DCL的高度。利用半色调掩膜板HTM，对栅极绝缘材料层进行灰化处理，该半色调掩膜板HTM在透 光区CR和正常显示区NR对光的透过率不同。灰化处理后，透光区CR中的栅极绝缘材料层中的材料去除较少，而正常显示区NR中的栅极绝缘材料层中的材料被去除更多，使得灰化处理后的栅极绝缘层GI在透光区CR和正常显示区NR中的高度差小于第一阈值，以减小两个区域之间的高度差，以此来消除透光区CR和正常显示区NR之间的段差，改善随后形成的封装平流层IJP的平坦性，从而消除或减弱了相关技术中封装平流层IJP塌陷导致的球差和色散。
图8仅仅示出了本公开的一个实施例，所形成的栅极绝缘层GI包括了一体化结构的第一栅极绝缘子层GI1和第二栅极绝缘子层GI2。但是本公开不限于此，例如，在形成图2A和2B示出的栅极绝缘层时，可以先通过构图工艺在透光区CR中形成如图2A所示的第一栅极绝缘子层GI1，以减小透光区CR和正常显示区NR之间的段差，然后再形成几乎平坦的第二栅极绝缘子层GI2。
图8仅仅示出了形成包括作为功能膜层FL的第一栅极绝缘子层GI1的栅极绝缘层GI的方法，也可以采用类似的方法制备图3A至图5所示的包括作为功能膜层FL的第一层间绝缘子层ILD1的层间介电层ILD、包括作为功能膜层FL的第三绝缘子层CVD22的第一绝缘层CVD1、包括作为功能膜层FL的第一平坦化子层PLN1的平坦化层PLN。
图10示出了根据本公开实施例的制备显示面板的方法的流程图。该方法包括步骤S91和S92。在步骤S91，在所述衬底基板的至少一个透光区形成功能膜层包括在衬底基板上形成驱动电路层的同一构图工艺同时在衬底基板上的至少一个透光区上形成与所述内置晶体管驱动层同层的包括多个功能块的驱动电路功能层，以使得所述多个功能块在所述衬底基板上的正投影分别处于所述多个第二阳极在所述衬底基板上的正投影至少部分重叠(例如处于其范围内，以避免光透过率的减小)；在步骤S92，在衬底基板上依次形成栅极绝缘层、层间介电层、平坦化层、阳极层、像素限定层、第一绝缘层、封装平流层和第二绝缘层。
除了形成功能膜层之外，本公开实施例的显示面板中其他层结构可以采用相关技术来制备，例如通过气相沉积方法来形成栅极绝缘层、层间介电层、第一绝缘层和第二绝缘层。在本公开中，可以通过喷墨打印方法形成所述封装平流层。在透光区中设置了功能膜层FL后，通过喷墨打印方法形成的封装平流层IJP将会是平坦的，因此可以消除或减弱相关技术中封装平流层IJP塌陷导致的球差和色散。
根据本公开的另一方面，还提供了一种显示装置，其包括根据上述实施例的显示面板和设置在所述显示面板的至少一个透光区内且位于衬底基板的远离所述阳极层一侧的至少一个感光元件，例如摄像头200，例如图11所示。
本公开实施例提供的显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。本实施例提供的显示装置的显示面板中的透光区中设置了功能膜层来补偿由于透光区中的驱动电路层被外置而导致的下凹深度，从而使得显示面板的顶部封装平流层在透光区和正常显示区之间的高度差小于第一阈值，例如封装平流层在透光区和正常显示区几乎是齐平的，因此消除或减弱了相关技术中封装平流层IJP塌陷导致的球差和色散。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本发明的限制。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施例，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (22)

  1. 一种显示面板，包括：正常显示区和至少部分被所述正常显示区围绕的至少一个透光区，其中，所述显示面板包括：
    衬底基板；
    驱动电路层，设置在衬底基板上，并且包括位于所述正常显示区的用于对所述正常显示区的多个子像素进行驱动的第一驱动电路；
    阳极层，包括设置在所述正常显示区且位于所述驱动电路层上方的第一阳极子层和设置在所述至少一个透光区的第二阳极子层，其中，所述第一阳极子层连接至所述第一驱动电路并且包括彼此之间绝缘且间隔开的多个第一阳极，以及所述第二阳极子层包括彼此之间绝缘且间隔开的多个第二阳极；
    第一绝缘层，设置在所述阳极层上方，并且包括位于所述正常显示区的第一绝缘子层和设置在所述至少一个透光区的第二绝缘子层；
    功能膜层，位于所述至少一个透光区并且位于所述第二绝缘子层的靠近所述衬底基板的一侧，其中，所述功能膜层在垂直于所述衬底基板方向上具有第一厚度，以使得所述第一绝缘子层的远离所述衬底基板一侧的第一表面在垂直于所述衬底基板的方向上的第一高度与所述第二绝缘子层的远离所述衬底基板一侧的第二表面在垂直于所述衬底基板的方向上的第二高度之间的高度差小于第一阈值；以及
    设置在所述第一绝缘子层和第二绝缘子层的远离所述衬底基板一侧的表面上的封装平流层。
  2. 根据权利要求1所述的显示面板，还包括位于至少部分围绕所述正常显示区的周边区域或者位于所述正常显示区、与第一驱动电路同层设置的第二驱动电路，其连接至所述第二阳极子层，用于对所述至少一个透光区中的多个子像素进行驱动。
  3. 根据权利要求1或2所述的显示面板，包括绝缘膜层，其位于所述至少一个透光区和所述正常显示区，其中，
    所述功能膜层位于所述绝缘膜层的靠近所述衬底基板一侧表面上；
    所述绝缘膜层位于所述至少一个透光区的部分的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度与所述绝缘膜层位于所述正常显示区的部分的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度之间的高度差小于第一阈值；以及
    所述绝缘膜层与所述功能膜层一体成型。
  4. 根据权利要求3所述的显示面板，其中，所述绝缘膜层包括位于所述驱动电路层的远离所述衬底基板一侧的栅极绝缘层。
  5. 根据权利要求4所述的显示面板，还包括：
    位于所述栅极绝缘层的远离所述衬底基板一侧的表面上的层间介电层；
    位于所述层间介电层的远离所述衬底基板一侧的表面上的平坦化层，其中，所述阳极层设置在所述平坦化层上；以及
    位于所述阳极层上的像素限定层，其中，所述第一绝缘层设置在所述像素限定层上。
  6. 根据权利要求3所述的显示面板，其中，
    所述绝缘膜层包括位于所述驱动电路层的远离所述衬底基板一侧的层间介电层。
  7. 根据权利要求3所述的显示面板，还包括：
    设置在所述驱动电路层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区的栅极绝缘层，其中，所述功能膜层位于 所述至少一个透光区的栅极绝缘层的远离所述衬底基板的一侧；其中，
    所述绝缘膜层包括层间介电层，所述层间介电层位于所述正常显示区的栅极绝缘层和所述功能膜层的远离所述衬底基板一侧。
  8. 根据权利要求6或7所述的显示面板，还包括：
    位于所述层间介电层的远离所述衬底基板一侧的表面上的平坦化层，其中，所述阳极层设置在所述平坦化层上；以及
    位于所述阳极层上的像素限定层，其中，所述第一绝缘层设置在所述像素限定层上。
  9. 根据权利要求3所述的显示面板，其中，所述绝缘膜层为所述第一绝缘层；以及
    所述显示面板还包括：
    设置在所述驱动电路层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区的栅极绝缘层；
    位于所述栅极绝缘层的远离所述衬底基板一侧的表面上的层间介电层；以及
    位于所述层间介电层的远离所述衬底基板一侧的表面上的平坦化层，其中，
    所述阳极层设置在所述平坦化层上，并且所述第一阳极子层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度大于所述第二阳极子层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度。
  10. 根据权利要求3所述的显示面板，其中，所述绝缘膜层包括位于所述阳极层的靠近所述衬底基板一侧表面上的平坦化层。
  11. 根据权利要求10所述的显示面板，其中，所述平坦化层的材料为聚酰亚胺。
  12. 根据权利要求10或11所述的显示面板，还包括：
    设置在所述驱动电路层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区的栅极绝缘层；
    位于所述至少一个透光区和所述正常显示区的栅极绝缘层上的层间介电层；以及
    位于在所述阳极层的远离所述衬底基板一侧的像素限定层。
  13. 根据权利要求1或2所述的显示面板，其中，
    所述功能膜层包括设置在所述至少一个透光区的衬底基板的靠近所述第二阳极子层一侧表面上的驱动电路功能层，以及
    所述驱动电路功能层包括多个功能块，所述多个功能块在所述衬底基板上的正投影与所述多个第二阳极在所述衬底基板上的正投影至少部分重叠。
  14. 根据权利要求13所述的显示面板，还包括设置在所述驱动电路功能层的远离所述衬底基板一侧的表面上和设置在所述驱动电路功能层的远离所述衬底基板一侧的表面上且位于所述至少一个透光区和所述正常显示区的栅极绝缘层；
    所述栅极绝缘层上的层间介电层；以及
    所述层间介电层上的平坦化层，其中所述阳极层设置在所述平坦化层上。
  15. 根据权利要求13或14所述的显示面板，其中，所述多个功能块中的每一个功能块均浮置，以及
    所述多个功能块中的每一个功能块包括与所述第一驱动电路相同的栅 极层和源漏极层。
  16. 根据权利要求1或2所述的显示面板，其中，所述功能膜层包括形成在衬底基板上位于所述至少一个透光区的栅极绝缘层，以及
    所述至少一个透光区的栅极绝缘层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度与所述驱动电路层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度之间的差值小于第一阈值。
  17. 根据权利要求5、8、9、12、14中任一项所述的显示面板，其中，
    所述栅极绝缘层、所述层间介电层和所述第一绝缘层的材料为氧化硅、氮化硅和/或氮氧化硅。
  18. 根据权利要求1至17中任一项所述的显示面板，其中，所述封装平流程的材料为有机材料。
  19. 根据权利要求1至18中任一项所述的显示面板，其中，
    所述第二阳极在所述衬底基板上的正投影的面积小于所述第一阳极在所述衬底基板上的正投影的面积；以及
    所述多个第二阳极中相邻两个第二阳极之间的第二距离大致等于所述多个第一阳极中相邻两个第一阳极之间的第一距离。
  20. 根据权利要求1至18中任一项所述的显示面板，其中，
    所述第二阳极在所述衬底基板上的正投影的面积大致等于所述第一阳极在所述衬底基板上的正投影的面积。
  21. 一种显示装置，包括根据权利要求1至20中任一项所述的显示面 板和设置在所述显示面板的至少一个透光区内且位于衬底基板的远离所述阳极层一侧的至少一个感光元件。
  22. 一种制备权利要求1至20中任一项所述的显示面板的方法，包括：
    通过图案化工艺在衬底基板上形成驱动电路层，使得所述驱动电路层包括位于所述正常显示区的用于对所述正常显示区的多个子像素进行驱动的第一驱动电路；
    在所述衬底基板的至少一个透光区形成功能膜层，使得所述至少一个透光区上的暴露膜层的远离所述衬底基板一侧的表面在垂直于所述衬底基板的方向上的高度与所述正常显示区上的暴露膜层的远离所述衬底基板一侧的表面在垂直于衬底基板的方向上的高度之间的差值小于第一阈值；以及
    在所述衬底基板上的所述至少一个透光区和所述正常显示区上形成封装平流层。
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