WO2022145653A1 - 반도체 공정용 연마 조성물, 연마 조성물의 제조 방법 및 연마 조성물을 적용한 반도체 소자의 제조 방법 - Google Patents
반도체 공정용 연마 조성물, 연마 조성물의 제조 방법 및 연마 조성물을 적용한 반도체 소자의 제조 방법 Download PDFInfo
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- WO2022145653A1 WO2022145653A1 PCT/KR2021/014483 KR2021014483W WO2022145653A1 WO 2022145653 A1 WO2022145653 A1 WO 2022145653A1 KR 2021014483 W KR2021014483 W KR 2021014483W WO 2022145653 A1 WO2022145653 A1 WO 2022145653A1
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- polishing
- polishing composition
- abrasive particles
- semiconductor
- semiconductor processing
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- IUVKMZGDUIUOCP-BTNSXGMBSA-N quinbolone Chemical compound O([C@H]1CC[C@H]2[C@H]3[C@@H]([C@]4(C=CC(=O)C=C4CC3)C)CC[C@@]21C)C1=CCCC1 IUVKMZGDUIUOCP-BTNSXGMBSA-N 0.000 description 1
- 229960004889 salicylic acid Drugs 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052708 sodium Inorganic materials 0.000 description 1
- 239000011734 sodium Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- BDHFUVZGWQCTTF-UHFFFAOYSA-M sulfonate Chemical compound [O-]S(=O)=O BDHFUVZGWQCTTF-UHFFFAOYSA-M 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- 238000010558 suspension polymerization method Methods 0.000 description 1
- 239000011975 tartaric acid Substances 0.000 description 1
- 235000002906 tartaric acid Nutrition 0.000 description 1
- 235000008521 threonine Nutrition 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 239000004474 valine Substances 0.000 description 1
- 239000010457 zeolite Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09G—POLISHING COMPOSITIONS; SKI WAXES
- C09G1/00—Polishing compositions
- C09G1/02—Polishing compositions containing abrasives or grinding agents
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K3/00—Materials not provided for elsewhere
- C09K3/14—Anti-slip materials; Abrasives
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K3/00—Materials not provided for elsewhere
- C09K3/14—Anti-slip materials; Abrasives
- C09K3/1454—Abrasive powders, suspensions and pastes for polishing
- C09K3/1463—Aqueous liquid suspensions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
- H01L21/67219—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one polishing chamber
Definitions
- the present invention relates to a polishing composition for a semiconductor process, a method of manufacturing the polishing composition, and a method of manufacturing a semiconductor device to which the polishing composition is applied.
- CMP chemical mechanical polishing
- the substrate is pressed and rotated while the slurry is supplied to the polishing pad, and the surface is polished.
- the target to be planarized varies according to the stage of the process, and there are also differences in the physical properties of the slurry applied at this time.
- the CMP process has been applied to planarization of dielectrics such as silicon oxide film (SiO 2 ) and silicon nitride film (SiN), and is essentially used for planarization process for metal wiring such as tungsten (W) and copper (Cu).
- dielectrics such as silicon oxide film (SiO 2 ) and silicon nitride film (SiN)
- metal wiring such as tungsten (W) and copper (Cu).
- films of various materials having different etch selectivity characteristics are required.
- a carbon-based organic film has good etch selectivity with respect to other silicon-containing films, and thus can be used as a mask film or a sacrificial film.
- Another object of the present invention is to provide an abrasive composition for a semiconductor process excellent in long-term storage stability because the polishing rate does not decrease when the polishing composition is polished at 60° C. or higher, and agglomeration between particles does not occur even after long-term storage.
- Another object of the present invention is a polishing composition applied to a polishing process of an amorphous carbon layer, which can exhibit a high polishing rate for an amorphous carbon layer, which is a target film quality, and carbon residue generated during the polishing process. ) to prevent adsorption on a semiconductor substrate and to provide a polishing composition for a semiconductor process that can prevent contamination of the polishing pad.
- Another object of the present invention is to provide a method of manufacturing a semiconductor device to which a polishing composition for a semiconductor process is applied.
- the polishing composition for a semiconductor process is abrasive particles; accelerator; and a stabilizer, wherein the aggregation index (CI) represented by the following formula (1) is 0.5 to 5:
- Sai is an average particle diameter of the abrasive particles included in the semiconductor process polishing composition measured by a dynamic light scattering particle size analyzer
- the Saf is the average particle diameter of the abrasive particles included in the polishing composition for semiconductor processing, maintained at 60° C. for 17 hours, cooled at 15 to 25° C., and measured by a dynamic light scattering particle size analyzer.
- a method of manufacturing a polishing composition for a semiconductor process comprises: a) preparing a polishing solution by mixing a stabilizer and an accelerator in a solvent; b) adjusting the pH of the polishing solution to 2 to 5 by adding a pH adjuster to the polishing solution; and c) mixing a surfactant and abrasive particles in the abrasive solution having a pH of 2 to 5.
- a method of manufacturing a semiconductor device includes: 1) providing a polishing pad including a polishing layer; 2) supplying a polishing composition for a semiconductor process to the polishing pad; and 3) grinding the abrasive object while relatively rotating it so that the polished surface of the abrasive object comes into contact with the abrasive surface of the abrasive layer.
- the polishing rate does not decrease when polishing at 60° C. or higher using the polishing composition, and the agglomeration between particles does not occur even after long-term storage, so the long-term storage stability is excellent, and polishing of an amorphous carbon layer
- a high polishing rate may be exhibited, carbon residue generated during the polishing process may be prevented from adsorbing to the semiconductor substrate, and contamination of the polishing pad may be prevented.
- FIG. 1 is a schematic process diagram of a semiconductor device manufacturing process according to an embodiment of the present invention.
- the present invention provides abrasive particles; accelerator; And it includes a stabilizer, and relates to a polishing composition for a semiconductor process having a cohesive index (CI) of 0.5 to 5 represented by Equation 1 below:
- Sai is an average particle diameter of the abrasive particles included in the semiconductor process polishing composition measured by a dynamic light scattering particle size analyzer
- the Saf is the average particle diameter of the abrasive particles included in the polishing composition for semiconductor processing, maintained at 60° C. for 17 hours, cooled at 15 to 25° C., and measured by a dynamic light scattering particle size analyzer.
- B is located on A means that B is located directly abutting on A or B is located on A while another layer is located in between, and B is located in contact with the surface of A It is not construed as being limited to
- the complexity of the surface structure means that the line width of the semiconductor is narrowed, and the aspect ratio (horizontal to vertical ratio) is also gradually increasing, and in order to meet the increasing aspect ratio, the photoresist is getting thinner.
- the thin and elongated photoresist does not withstand the etching process and collapses. In order to prevent this, a hardmask process has been introduced.
- amorphous carbon and SiON were used as the hard mask material.
- the amorphous carbon has excellent etching resistance when used as a hard mask, when a chemical mechanical polishing process is applied using a conventional polishing composition, a low removal rate and generation of carbon residue causes carbon residue It adsorbs to the film-like surface, causing a problem of generating defects in the semiconductor substrate.
- the polishing composition for a semiconductor process of the present invention not only exhibits a high polishing rate for the amorphous carbon film, but also prevents re-adsorption of carbon residues, thereby preventing the occurrence of defects in the semiconductor substrate.
- the polishing composition for a semiconductor process of the present invention includes abrasive particles, an accelerator and a stabilizer, and has a cohesive index (CI) of 0.5 to 5, expressed by Equation 1 below:
- Sai is an average particle diameter of the abrasive particles included in the semiconductor process polishing composition measured by a dynamic light scattering particle size analyzer
- the Saf is the average particle diameter of the abrasive particles included in the polishing composition for semiconductor processing, maintained at 60° C. for 17 hours, cooled at 15 to 25° C., and measured by a dynamic light scattering particle size analyzer.
- the polishing rate does not decrease.
- agglomeration or oxidation does not occur between the abrasive particles, thereby preventing an increase in particle size.
- the average diameter of the particles may increase due to aggregation between particles.
- the average diameter of the particles is increased as described above, when used in a polishing process, a problem that the polishing rate is lowered may occur.
- the polishing composition is added to the polishing process at 60° C. or higher, it means that agglomeration between the abrasive particles in the polishing composition may occur.
- the abrasive composition of the present invention prevents aggregation between the abrasive particles even when stored for a long time, thereby preventing an increase in the size of the abrasive particles. Specifically, it is possible to prevent aggregation of the abrasive particles as described above, thereby preventing a decrease in the polishing rate, and greatly improving storage stability.
- Equation 1 relates to storage stability of the polishing composition of the present invention and stability during polishing at 60° C. or higher.
- the initial average diameter (nm) of the abrasive particles and the average diameter (nm) of the abrasive particles measured after being maintained at 60° C. for 17 hours and cooled at 15 to 25° C. are 0.5 to 5 according to Equation 1 above This means that there is no significant change in the average diameter of the particles.
- the dynamic light scattering method is a non-invasive technique for measuring the size of nanoparticles in a dispersion.
- the dynamic light scattering method is to measure the intensity of scattered light over time in a particle suspension using a Brownian motion. By analyzing the intensity fluctuation of the scattered light, a diffusion coefficient for which the particle size can be determined can be determined, and the particle size can be obtained from this coefficient through the Stoke-Einsteinequation.
- the average diameter of the particles measured by the dynamic light scattering method is the value calculated through the agglomeration index (CI) according to Equation 1 of the average particle diameter value of the abrasive particles included in the initial state and the abrasive composition that has undergone the agglomeration acceleration process is 0.5 to 5, 0.5 to 1.50, 0.5 to 1.40, 0.5 to 1.30, 0.5 to 1.25, 0.7 to 1.22, 0.7 to 1.15, and 0.7 to 1.12.
- CI agglomeration index
- the average diameter increase rate of the abrasive particles in the polishing composition may be 0.5% to 30% by the following Equation 2:
- Sai is an average particle diameter of the abrasive particles included in the semiconductor process polishing composition measured by a dynamic light scattering particle size analyzer
- the Saf is the average particle diameter of the abrasive particles included in the polishing composition for semiconductor processing, maintained at 60° C. for 17 hours, cooled at 15 to 25° C., and measured by a dynamic light scattering particle size analyzer.
- the value according to Formula 2 is 0.5% to 30%, 0.5% to 25%, 0.5% to 20%, 0.5% to 15%, 0.5% to 10%, and may be 0.5% to 7% .
- the polishing composition of the present invention can be used in the polishing process of an amorphous carbon layer (ACL, amorphous carbon layer), and the polishing rate for the amorphous carbon layer is 100 ⁇ /min to 250 ⁇ /min, 110 ⁇ /min to 200 ⁇ /min, and , may be 120 ⁇ /min to 200 ⁇ /min. That is, when the amorphous carbon film is polished using the polishing composition, when the polishing rate is within the above range, the polishing efficiency is excellent and can be used in the polishing process for the amorphous carbon film.
- ACL amorphous carbon layer
- the conventional polishing composition has a low polishing rate for the amorphous carbon film, so it is difficult to apply the polishing composition to the polishing process.
- the polishing composition of the present invention when used in a polishing process of an amorphous carbon film, it exhibits a polishing rate of 100 ⁇ /min to 250 ⁇ /min, so that it can be used in a polishing process with a high polishing rate and is polished under a condition of 60° C. or higher. There is no reduction in the polishing rate and no reduction in the polishing rate even after long-term storage.
- the abrasive particles may be selected from the group consisting of metal oxides, organic particles, organic-inorganic composite particles, and mixtures thereof.
- the abrasive particles are abrasive particles that can be applied to a polishing composition for a semiconductor process, and are, for example, selected from the group consisting of metal oxides, organic particles, organic-inorganic composite particles, and mixtures thereof, and the metal oxide is colloidal silica, It may be selected from the group consisting of fumed silica, ceria, alumina, titania, zirconia, zeolite, and mixtures thereof, but the abrasive particles selectable by those skilled in the art are not limited to the above examples, and all abrasive particles can be used without limitation.
- the organic particles include polystyrene, styrene-based copolymer, poly(meth)acrylate, (meth)acrylate-based copolymer, polyvinyl chloride, polyamide, polycarbonate, polyimide polymer;
- a core/shell structure in which the polymer constitutes a core, a shell, or both, and these may be used alone or in combination, and the organic particles may be prepared by an emulsion polymerization method, a suspension polymerization method, or the like.
- the abrasive particles of the present invention may be specifically selected from the group consisting of colloidal silica, fumed silica, ceria, and mixtures thereof.
- the abrasive particles may have an average diameter of 10 nm to 120 nm, 20 nm to 100 nm, 40 nm to 80 nm, 45 nm to 70 nm, and 70 nm to 80 nm.
- the metal oxide particles fall within the scope of the present invention, it is possible to prevent the occurrence of defects such as scratches on the semiconductor substrate in the polishing process, and the abrasive particles are excellent in dispersibility.
- the accelerator may be selected from the group consisting of anionic low molecular weight, anionic polymer, hydroxyl acid, amino acid and cerium salt.
- the cerium salt may be a trivalent cerium salt or a tetravalent cerium salt, and more specifically
- the tetravalent cerum salt may be selected from the group consisting of cerium(IV) sulfate (Ce(SO 4 ) 2 ), cerium ammonium sulfate dihydrate, and cerium ammonium nitrate, but is not limited thereto.
- the accelerator may be included in the polishing composition to facilitate removal of the surface layer of the amorphous carbon film by oxidizing the surface layer of the amorphous carbon film with an oxide or ions.
- the cerium ammonium nitrite may be present in the slurry composition in the form of an ionic compound or a chelate compound, and when used in the form, it is possible to provide a high polishing rate for the amorphous carbon film.
- the accelerator when the accelerator and the stabilizer are mixed and used, the accelerator not only exhibits an effect of increasing the polishing rate on the amorphous carbon film, but also increases the stability of the polishing composition by the stabilizer, and increases the stability of the polishing composition in the polishing process It is possible to prevent the occurrence of defects.
- the stabilizer is an amino acid, and more specifically, the amino acid is arginine, histidine, lysine, aspartic acid, glutamic acid, glutamine ( Glutamine, Cysteine, Proline, Asparagine, threonine, Alanine, Glycine, Valine, Leucine, Isoleucine, and mixtures thereof It may be selected from the group consisting of, and is preferably alanine, but it is not limited to the above example, and the amino acid that can increase the stability of the polishing composition and suppress the occurrence of defects in the polishing process is not limited by mixing and using the accelerator. All are available
- the polishing composition of the present invention further includes a surfactant, exhibits a high polishing rate for the amorphous carbon film, and can prevent re-adsorption of carbon residues on the semiconductor substrate by reducing the surface tension.
- polishing rate of the amorphous carbon film when an accelerator is included in the polishing composition, the polishing rate is increased. However, carbon residue generated during the polishing process is adsorbed to the semiconductor substrate or contamination may occur.
- a surfactant is included in the polishing composition to reduce the surface tension of the polishing composition, and according to the decrease in the surface tension, re-adsorption of carbon residues to the substrate surface is prevented, and contamination of the polishing pad problems can be avoided.
- the surfactant may include a nonionic fluorine-based polymer compound.
- the surfactant includes a fluorine-based polymer compound, and when used in a polishing process for the amorphous carbon film, it is possible to prevent re-adsorption of carbon residues generated on the surface of the semiconductor substrate.
- the surfactant contains fluorine, it is possible to suppress the growth of microorganisms such as bacteria and mold.
- bacteria and mold may occur, and the polishing composition in which the bacteria and mold are generated cannot be used in the polishing process and may have to be discarded.
- the surfactant includes a nonionic fluorine-based polymer compound, and when the polishing composition is stored for a long time, the generation of bacteria and mold can be prevented, and long-term storage stability can be improved.
- the surfactant of the present invention may be selected from the group consisting of FS-30, FS-31, FS-34, ET-3015, ET-3150, ET-3050, and mixtures thereof, manufactured by Chemours tm . It is not particularly limited as long as it is a material that serves to prevent re-adsorption of carbon residues on the surface of the semiconductor substrate in the process.
- the surfactant of the present invention is a nonionic surfactant, and a surfactant including a nonionic fluorine-based polymer compound may be used alone or mixed with other nonionic surfactants.
- the nonionic surfactant is polyethylene glycol, polypropylene glycol, polyethylene-propylene copolymer, polyalkyl oxide, polyoxyethylene oxide; PEO ), polyethylene oxide, polypropylene oxide, fluorine-based surfactants are sodium sulfonate fluorosurfactant, phosphate ester fluorosurfactant, amine oxide fluorosurfactant oxide fluorosurfactant, betaine fluorosurfactant, ammonium carboxylate fluorosurfactant, stearate ester fluorosurfactant, quaternary ammonium fluorosurfactant, ethylene It may be selected from the group consisting of oxide/propylene oxide fluorosurfactants (ethylene oxide/propylene oxide fluorosurfactant) and polyoxyethylene fluorosurfactant.
- the polishing composition of the present invention may include a pH adjusting agent, wherein the pH adjusting agent is hydrochloric acid, phosphoric acid, sulfuric acid, hydrofluoric acid, nitric acid, hydrobromic acid, iodic acid, formic acid, malonic acid, maleic acid, oxalic acid, acetic acid, adipic acid, citric acid , adipic acid, acetic acid, propionic acid, fumaric acid, lactic acid, salicylic acid, pimelin, benzoic acid, succinic acid, phthalic acid, butyric acid, glutaric acid, glutamic acid, glycolic acid, lactic acid, aspartic acid, at least selected from the group consisting of tartaric acid and potassium hydroxide It can be any one.
- the pH adjusting agent is hydrochloric acid, phosphoric acid, sulfuric acid, hydrofluoric acid, nitric acid, hydrobromic acid, iodic acid, formic acid, malonic acid, male
- the pH adjusting agent may represent a pH of the polishing composition for a semiconductor process of 2 to 5, preferably 2 to 4.
- the acidic environment is maintained within this range, the polishing rate and quality can be maintained above a certain level while preventing excessive corrosion of metal components or polishing equipment.
- the polishing composition for a semiconductor process includes 0.1 wt% to 0.5 wt% of abrasive particles, 1 wt% to 2 wt% of an accelerator, 1 wt% to 2 wt% of a stabilizer, and 0.001 wt% to a surfactant 0.01% by weight and the remainder of the solvent.
- the accelerator is stabilized by the stabilizer, the polishing rate by the accelerator in the polishing composition can be increased, and the occurrence of defects in the polishing process is prevented by the stabilizer and the surfactant can do.
- the solvent is ultrapure water, it is not limited to the above example, and any solvent that can be used as a solvent of the polishing composition can be used without limitation.
- the surfactant When the surfactant is included below the range value, the occurrence of surface defects of the semiconductor substrate increases during the polishing process. .
- the manufacturing method for the polishing composition of the present invention comprises the steps of: a) preparing a polishing solution by mixing a stabilizer and an accelerator in a solvent; b) adjusting the pH of the polishing solution to 2 to 5 by adding a pH adjuster to the polishing solution; and d) mixing a surfactant and abrasive particles into the polishing solution having a pH of 2 to 5.
- the first solvent may be prepared by mixing the stabilizer with the solvent, and then the accelerator may be mixed to prepare a polishing solution.
- the accelerator When the accelerator is prepared by mixing other stabilizers, pH adjusters, surfactants and abrasive particles in ultrapure water as a solvent, the accelerator is not stabilized in the abrasive composition, so that it is difficult to store for a long time or in the abrasive composition. In this case, the effect of increasing the polishing rate by the accelerator may not appear.
- a mixed solution is prepared by mixing a stabilizer in a solvent, an accelerator is dissolved in the mixed solution to prepare a polishing solution, and then a polishing composition is prepared by the following steps.
- a method of manufacturing a semiconductor device includes: 1) providing a polishing pad including a polishing layer; 2) supplying a polishing composition for a semiconductor process to the polishing pad; and 3) grinding the abrasive object while relatively rotating so that the polished surface of the abrasive object comes into contact with the abrasive surface of the abrasive layer, wherein the abrasive composition includes abrasive particles, an accelerator and a stabilizer,
- the aggregation index (CI) represented by the following formula (1) is 0.5 to 5:
- Sai is an average particle diameter of the abrasive particles included in the semiconductor process polishing composition measured by a dynamic light scattering particle size analyzer
- the Saf is the average particle diameter of the abrasive particles included in the polishing composition for semiconductor processing, maintained at 60° C. for 17 hours, cooled at 15 to 25° C., and measured by a dynamic light scattering particle size analyzer.
- FIG. 1 is a schematic flowchart of a semiconductor device manufacturing process according to an exemplary embodiment.
- a semiconductor substrate 130 to be polished is disposed on the polishing pad 110 .
- the polishing slurry 150 is sprayed on the polishing pad 110 through the nozzle 140 .
- the flow rate of the polishing slurry 150 supplied through the nozzle 140 may be selected according to the purpose within the range of about 10 cm 3 /min to about 1,000 cm 3 /min, for example, from about 50 cm 3 /min to It may be about 500 cm3 / min, but is not limited thereto.
- the to-be-polished surface of the semiconductor substrate 130 is in direct contact with the polishing surface of the polishing pad 110 .
- the semiconductor substrate 130 and the polishing pad 110 may be rotated relative to each other, so that the surface of the semiconductor substrate 130 may be polished.
- the rotation direction of the semiconductor substrate 130 and the rotation direction of the polishing pad 110 may be in the same direction or in opposite directions.
- the rotation speed of the semiconductor substrate 130 and the polishing pad 110 may be selected depending on the purpose in the range of about 10 rpm to about 500 rpm, respectively, for example, it may be about 30 rpm to about 200 rpm, However, the present invention is not limited thereto.
- polishing the substrate is an organic layer, and may be applied to a polishing process for a carbon-based organic layer.
- the carbon-based organic film may be exemplified by a C-SOH (spin on hardmask) film, an amorphous carbon layer, or an NCP film, and preferably has an excellent selective polishing effect and can exhibit a high polishing rate. It is an amorphous carbon film.
- polishing composition for a semiconductor process Since the detailed description of the polishing composition for a semiconductor process overlaps with the description above, the description thereof will be omitted.
- the semiconductor substrate 130 is polished and the conditioner 170 is used simultaneously with the polishing.
- the method may further include processing the polishing surface of the pad 110 .
- a mixed solution was prepared by mixing alanine as a stabilizer in ultrapure water, and a polishing solution was prepared by mixing cerium ammonium nitrite.
- a polishing composition was prepared by mixing nitric acid with the polishing solution to adjust the pH to 2.1, and mixing FS-30 manufactured by Chemours tm as a surfactant and colloidal silica having a diameter of 75 nm.
- Example 1 75 0.25 0.6 One 0.005 Remainder
- Example 2 45 1.25 0.6 One 0.005
- Example 3 45 0.25 0.6 One 0.005
- Example 4 75 2.5 0.6
- Example 5 75 1.25 0.6
- Comparative Example 1 45 0.25 0.6
- Comparative Example 2 60 0.25 0.6
- One 0.005 Comparative Example 3 45 2.5 0.6
- polishing rates were measured for Example 1, Comparative Example 1, and Comparative Example 2 to measure the polishing rate for the ACL film according to the size change of the abrasive particles.
- An amorphous carbon layer (ACL) having a thickness of 2,000 ⁇ was polished under conditions of 2 psi, carrier speed 87 rpm, platen speed 93 rpm, and an inflow flow rate of the polishing composition of 200 ml/min for 60 seconds to increase the polishing rate. measured.
- Table 2 compares the polishing rate by the average diameter of abrasive particles included in the polishing composition.
- the polishing rate was 141 ⁇ /min and 120 ⁇ /min or more.
- the average diameter of the abrasive particles was 45 nm and the polishing rate was 63 ⁇ /min
- Comparative Example 2 the average diameter of the abrasive particles was 60 nm and the polishing rate was 103 ⁇ /min, and the polishing rate for the amorphous carbon film was low. confirmed to be According to the experimental results, when the size of the abrasive particles was small, it was confirmed that the polishing rate for the amorphous carbon film was low.
- the contents were varied, and the size change according to the polishing rate, the number of defects and the temperature change was measured.
- the polishing rate was measured under the same polishing conditions as in Experimental Example 1, and the occurrence of defects was checked using KLA Tencor AIT-XP+.
- the average diameter of the initial particles and the average diameter of the particles after heating were measured using a dynamic light scattering particle size analyzer.
- Heating conditions for measurement were maintaining the polishing composition in an oven preheated to 60° C. for 17 hours, cooling it at 20° C., and measuring the average diameter.
- the dynamic light scattering particle size analysis was performed using a dynamic light scattering particle size analyzer, specifically, Malvern's Nano-ZS was used, a material was input as colloidal silica, and 1.457 was input as a refractive index.
- Equation 1 For the average diameter of the measured particles, a value according to Equation 1 was confirmed, and the diameter increase rate of the abrasive particles was calculated by Equation 2 below:
- Sai is an average particle diameter of particles included in the semiconductor process polishing composition measured by a dynamic light scattering particle size analyzer
- the Saf is a value measured by a dynamic light scattering particle size analyzer of the average particle diameter of the particles included in the polishing composition after the polishing composition is maintained at 60° C. for 17 hours and then cooled at 15 to 25° C. to accelerate agglomeration.
- Example 1 141 21003 75.26 75.79 One 1.01
- Example 2 83 29500 44.8 49.85 11 1.11
- Example 3 60 21167 46.11 47.18 2 1.02
- Example 4 116 59623 73.42 89.21 22 1.22
- Example 5 145 31185 75.86 81.77 8 1.08 Comparative Example 3 102 54327 44.01 230.9 425 5.25
- the value according to Equation 1 was confirmed to be about 1, and the polishing composition was maintained in an oven preheated to 60° C. for 17 hours, and the particles were cooled at 20° C. It was confirmed that there was no significant change in the average diameter of As a result of analyzing other examples, when the particle diameter was 45 nm, the polishing rate increased as the content increased, but the polishing composition was maintained in an oven preheated to 60° C. for 17 hours, and after cooling it at 20° C. The size of the abrasive particles increased, and when the particle diameter was 75 nm, there was no significant difference in the polishing rate as the content increased, and it was confirmed that the particle size increase after heating was larger than when the particle diameter was 45 nm.
- Comparative Example 3 was an abrasive composition having an average diameter of 45 nm and a content of 2.5% by weight, and it was confirmed that the increase rate of the abrasive particles after heating was very large, thereby significantly increasing the occurrence of defects. did.
- the present invention relates to a polishing composition for a semiconductor process, a method of manufacturing the polishing composition, and a method of manufacturing a semiconductor device to which the polishing composition is applied.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
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- Mechanical Treatment Of Semiconductor (AREA)
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Abstract
Description
구분 | 연마 입자 | 가속화제 | 안정화제 | 계면활성제 | 용매 | |
Size (nm) |
함량 | |||||
실시예 1 | 75 | 0.25 | 0.6 | 1 | 0.005 | 나머지 |
실시예 2 | 45 | 1.25 | 0.6 | 1 | 0.005 | |
실시예 3 | 45 | 0.25 | 0.6 | 1 | 0.005 | |
실시예 4 | 75 | 2.5 | 0.6 | 1 | 0.005 | |
실시예 5 | 75 | 1.25 | 0.6 | 1 | 0.005 | |
비교예 1 | 45 | 0.25 | 0.6 | 1 | 0.005 | |
비교예 2 | 60 | 0.25 | 0.6 | 1 | 0.005 | |
비교예 3 | 45 | 2.5 | 0.6 | 1 | 0.005 |
Removal rate(Å/min) | |
실시예 1 | 141 |
비교예 1 | 63 |
비교예 2 | 103 |
Removal rate (Å/min) |
Defect(ea) | 초기 입자 평균 직경(nm) | 가열 후 입자 평균 직경(nm) | 직경 증가율 (식 2, %) |
식 1의 값 | |
실시예 1 | 141 | 21003 | 75.26 | 75.79 | 1 | 1.01 |
실시예 2 | 83 | 29500 | 44.8 | 49.85 | 11 | 1.11 |
실시예 3 | 60 | 21167 | 46.11 | 47.18 | 2 | 1.02 |
실시예 4 | 116 | 59623 | 73.42 | 89.21 | 22 | 1.22 |
실시예 5 | 145 | 31185 | 75.86 | 81.77 | 8 | 1.08 |
비교예 3 | 102 | 54327 | 44.01 | 230.9 | 425 | 5.25 |
Claims (10)
- 제1항에 있어서,상기 연마 입자는 금속 산화물, 유기 입자, 유기-무기 복합 입자 및 이들의 혼합으로 이루어진 군으로부터 선택되는반도체 공정용 연마 조성물.
- 제1항에 있어서,상기 가속화제는 음이온계 저분자, 음이온계 고분자, 하이드록실산 및 세륨염으로 이루어진 군으로부터 선택되는반도체 공정용 연마 조성물.
- 제1항에 있어서,상기 안정화제는 아미노산인반도체 공정용 연마 조성물.
- 제1항에 있어서,상기 연마 조성물은 계면활성제를 포함하는반도체 공정용 연마 조성물.
- 제1항에 있어서,상기 연마 조성물은 pH 조절제를 포함하는반도체 공정용 연마 조성물.
- a) 용매에 안정화제 및 가속화제를 넣고 혼합하여 연마 용액을 제조하는 단계;b) 상기 연마 용액에 pH 조절제를 넣어 연마 용액의 pH를 2 내지 5로 조정하는 단계; 및c) 상기 pH가 2 내지 5인 연마 용액에 계면활성제 및 연마 입자를 혼합하는 단계를 포함하며,상기 연마 조성물은 하기의 수식 1로 표시되는 응집 지수(CI)가 0.5 내지 5인반도체 공정용 연마 조성물의 제조 방법:[식 1]여기서,상기 Sai는 동적 광산란 입도분석기에 의해서 측정된 상기 반도체 공정 연마 조성물 내에 포함된 연마 입자의 평균 입경이고,상기 Saf는 반도체 공정용 연마 조성물을 60℃에서 17시간 동안 유지 후, 15 내지 25℃에서 냉각하고, 동적 광산란 입도분석기에 의해서 측정된 상기 연마 조성물 내에 포함된 연마 입자의 평균 입경이다.
- 제8항에 있어서,상기 a) 단계는 용매에 안정화제를 혼합하여 혼합 용액으로 제조하고,상기 혼합 용액에 가속화제를 혼합하여 연마 용액으로 제조하는 것인반도체 공정용 연마 조성물의 제조 방법.
- 1) 연마층을 포함하는 연마패드를 제공하는 단계;2) 상기 연마패드로 반도체 공정용 연마 조성물을 공급하는 단계; 및3) 상기 연마층의 연마면에 연마 대상의 피연마면이 맞닿도록 상대 회전시키면서 상기 연마 대상을 연마시키는 단계를 포함하며,상기 연마 조성물은 연마 입자, 가속화제 및 안정화제를 포함하며,상기 연마 조성물은 하기의 수식 1로 표시되는 응집 지수(CI)가 0.5 내지 5인반도체 소자의 제조 방법:[식 1]여기서,상기 Sai는 동적 광산란 입도분석기에 의해서 측정된 상기 반도체 공정 연마 조성물 내에 포함된 연마 입자의 평균 입경이고,상기 Saf는 반도체 공정용 연마 조성물을 60℃에서 17시간 동안 유지 후, 15 내지 25℃에서 냉각하고, 동적 광산란 입도분석기에 의해서 측정된 상기 연마 조성물 내에 포함된 연마 입자의 평균 입경이다.
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CN202180083214.8A CN116568772A (zh) | 2020-12-30 | 2021-10-18 | 半导体工艺用抛光组合物、抛光组合物的制备方法以及适用抛光组合物的半导体器件的制造方法 |
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KR20200062732A (ko) * | 2018-11-27 | 2020-06-04 | 주식회사 케이씨텍 | 연마용 슬러리 조성물 |
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KR100643628B1 (ko) * | 2005-11-04 | 2006-11-10 | 제일모직주식회사 | 다결정 실리콘 연마용 cmp 슬러리 조성물 및 이의 제조방법 |
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KR20190053739A (ko) * | 2017-11-10 | 2019-05-20 | 삼성에스디아이 주식회사 | 유기막 cmp 슬러리 조성물 및 이를 이용한 연마 방법 |
KR20200057566A (ko) * | 2018-11-16 | 2020-05-26 | 삼성에스디아이 주식회사 | 비정질탄소막용 cmp 슬러리 조성물 및 이를 이용한 연마 방법 |
KR20200062732A (ko) * | 2018-11-27 | 2020-06-04 | 주식회사 케이씨텍 | 연마용 슬러리 조성물 |
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