WO2022137022A1 - 表示装置の製造装置 - Google Patents

表示装置の製造装置 Download PDF

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Publication number
WO2022137022A1
WO2022137022A1 PCT/IB2021/061730 IB2021061730W WO2022137022A1 WO 2022137022 A1 WO2022137022 A1 WO 2022137022A1 IB 2021061730 W IB2021061730 W IB 2021061730W WO 2022137022 A1 WO2022137022 A1 WO 2022137022A1
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WO
WIPO (PCT)
Prior art keywords
cluster
substrate
jig
manufacturing
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2021/061730
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
江口晋吾
安達広樹
岡崎健一
山根靖正
楠本直人
吉住健輔
山崎舜平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to US18/258,104 priority Critical patent/US20240057462A1/en
Priority to JP2022570762A priority patent/JP7756109B2/ja
Publication of WO2022137022A1 publication Critical patent/WO2022137022A1/ja
Anticipated expiration legal-status Critical
Priority to JP2025168616A priority patent/JP2025188123A/ja
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0005—Production of optical devices or components in so far as characterised by the lithographic processes or materials used therefor
    • G03F7/0007—Filters, e.g. additive colour filters; Components for display devices
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54—Apparatus specially adapted for continuous coating
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/10—Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0461—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the presence of two or more transfer chambers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
    • H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
    • H10P72/3202—Mechanical details, e.g. rollers or belts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations

Definitions

  • One aspect of the present invention relates to a manufacturing device and a manufacturing method of a display device.
  • one aspect of the present invention is not limited to the above technical fields.
  • the technical field of one aspect of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method.
  • one aspect of the invention relates to a process, machine, manufacture, or composition (composition of matter). Therefore, more specifically, the technical fields of one aspect of the present invention disclosed in the present specification include semiconductor devices, display devices, liquid crystal display devices, light emitting devices, lighting devices, power storage devices, storage devices, image pickup devices, and the like.
  • the operation method or the manufacturing method thereof can be given as an example.
  • a display device applicable to a display panel a liquid crystal display device, a light emitting device including a light emitting element such as an organic EL (Electro Luminence) element or a light emitting diode (LED: Light Emitting Diode), and an electrophoresis method are typically used.
  • a light emitting device including a light emitting element such as an organic EL (Electro Luminence) element or a light emitting diode (LED: Light Emitting Diode)
  • LED Light Emitting Diode
  • electrophoresis method examples include electronic papers that display by means of such means.
  • the organic EL element has a structure in which a layer containing a luminescent organic compound is sandwiched between a pair of electrodes. By applying a voltage to this device, light emission can be obtained from a luminescent organic compound. Since the display device to which such an organic EL element is applied does not require a backlight, which is required for a liquid crystal display device or the like, a thin, lightweight, high-contrast, and low-power consumption display device can be realized. For example, an example of a display device using an organic EL element is described in Patent Document 1.
  • an organic EL display device capable of full-color display, a configuration in which a white light emitting element and a color filter are combined and a configuration in which RGB light emitting elements are formed on the same surface are known.
  • the latter configuration is ideal, and at present, in the manufacture of small and medium-sized panels, light-emitting materials are painted separately using a metal mask or the like.
  • the alignment accuracy is low, so that the area occupied by the light emitting element in the pixel must be reduced, and it is difficult to increase the aperture ratio.
  • a compact high-definition display is desired for AR and VR applications. Since the display for AR and VR is installed in a device such as a spectacle type or goggles type having a small volume, it is preferable to have a narrow frame. Therefore, it is preferable that the driver of the pixel circuit or the like is provided at the lower part of the pixel circuit. Further, in manufacturing these small displays, a manufacturing apparatus capable of continuously processing the processes from the pixel circuit to the light emitting element is desired.
  • one of the objects of the present invention is to provide a display device manufacturing apparatus capable of continuously processing the steps from the pixel circuit to the formation of the light emitting element without opening to the atmosphere.
  • Another object of the present invention is to provide a display device manufacturing device capable of forming a light emitting element without using a metal mask.
  • one of the purposes is to provide a method for manufacturing a display device.
  • One aspect of the present invention relates to an apparatus for manufacturing a light emitting device.
  • One aspect of the present invention includes a pixel circuit manufacturing device and a light emitting device manufacturing device, and the light emitting device manufacturing device includes a first load lock chamber, a first cluster, and a second cluster.
  • the first load lock chamber is connected to the first cluster via the first gate valve, and the first load lock chamber is connected to the second cluster via the second gate valve.
  • the first load lock chamber is controlled to a reduced pressure or an inert gas atmosphere
  • the first cluster is controlled to a reduced pressure
  • the second cluster is controlled to an inert gas atmosphere
  • the first The cluster has a first transfer device, a plurality of film forming devices, and an etching device
  • the second cluster has a second transfer device and a plurality of devices for performing a lithography process, and has pixels.
  • the circuit manufacturing apparatus has a second load lock chamber, and the first load lock chamber is connected to the second load lock chamber via a transfer chamber, and is formed on the substrate by the pixel circuit manufacturing apparatus. It is a manufacturing device of a display device having a function of forming a light emitting device having an island-shaped organic compound on a pixel electrode.
  • the film forming apparatus is one or more selected from a vapor deposition apparatus, a sputtering apparatus, a CVD apparatus, and an ALD apparatus, and the etching apparatus is preferably a dry etching apparatus.
  • the first cluster preferably has a vacuum baking device.
  • a coating device As a plurality of devices for performing the lithography process, a coating device, an exposure device, a developing device, and a baking device can be provided. Alternatively, as a plurality of devices for performing the lithography process, a coating device and a nanoimprint device can be provided.
  • the substrate can be mounted on the substrate transfer jig and treated.
  • the substrate transfer jig has a first jig and a second jig, and the substrate can be sandwiched between the first jig and the second jig.
  • the substrate transfer jig has a first jig and a plurality of second jigs, and a plurality of separated substrates are arranged on the first jig, and the first jig and the second jig are arranged.
  • the substrate can be sandwiched between the jig and the jig.
  • the first cluster can have a desorption device for a substrate transfer jig.
  • the first cluster can have a board reversing device equipped with a board transfer jig.
  • the pixel circuit manufacturing apparatus has a third cluster and a fourth cluster, and a second load lock chamber is connected to the third cluster via a third gate valve, and a second.
  • the load lock chamber is connected to the fourth cluster via a fourth gate valve, the second load lock chamber is controlled to be reduced pressure or normal pressure, the third cluster is controlled to reduced pressure, and the fourth.
  • the cluster is controlled to normal pressure, the third cluster has a third transfer device, a plurality of film forming devices, an etching device, and a plasma processing device, and the second cluster is a second cluster. It can have the transfer device of 4, a plurality of devices for performing a lithography process, and a polishing device.
  • the film forming apparatus is one or more selected from a sputtering apparatus, a CVD apparatus, and an ALD apparatus, the etching apparatus is a dry etching apparatus, and the polishing apparatus is a CMP apparatus.
  • a coating device As a plurality of devices for performing the lithography process, a coating device, an exposure device, a developing device, and a baking device can be provided.
  • the first load lock chamber can be connected to the second load lock chamber via the fifth gate valve and transfer chamber.
  • a silicon wafer can be used as the substrate. Further, a drive circuit is provided on the silicon wafer, and a pixel circuit electrically connected to the drive circuit can be formed.
  • a display device manufacturing apparatus capable of continuously processing the steps from the formation of a pixel circuit to the formation of a light emitting element without opening to the atmosphere.
  • a display device manufacturing device capable of forming a light emitting element without using a metal mask.
  • a method of manufacturing a display device can be provided.
  • FIG. 1 is a diagram illustrating a manufacturing apparatus.
  • 2A and 2B are views for explaining the substrate transfer jig.
  • 3A to 3C are diagrams showing an example of the number of display devices taken per substrate.
  • FIG. 4A is a diagram illustrating the size of the through hole of the substrate transfer jig and the hand portion of the transfer device.
  • 4B and 4C are diagrams illustrating a substrate transfer jig and a transfer device.
  • FIG. 5A is a diagram illustrating a substrate reversing device.
  • 5B to 5D are diagrams illustrating a substrate reversing device and a substrate transfer jig.
  • 6A to 6C are diagrams for explaining the substrate reversal operation.
  • 7A to 7C are diagrams for explaining the substrate reversal operation.
  • FIG. 8A is a diagram illustrating a thin film deposition apparatus.
  • FIG. 8B is a diagram illustrating a dry etching apparatus.
  • FIG. 9 is a diagram illustrating a manufacturing apparatus.
  • 10A to 10D are views for explaining a substrate arranged on the substrate transfer jig.
  • 11A to 11C are diagrams illustrating a method of arranging the substrate on the substrate transfer jig.
  • FIG. 12 is a diagram illustrating a display device.
  • 13A to 13C are diagrams illustrating a display device.
  • 14A to 14D are diagrams illustrating a method of manufacturing a display device.
  • 15A to 15D are diagrams illustrating a method of manufacturing a display device.
  • 16A to 16D are diagrams illustrating a method of manufacturing a display device.
  • FIG. 17 is a diagram illustrating a manufacturing apparatus.
  • FIG. 18 is a diagram illustrating a manufacturing apparatus.
  • One aspect of the present invention is a manufacturing apparatus mainly used for forming a display device having a light emitting element (also referred to as a light emitting device) such as an organic EL element.
  • a light emitting element also referred to as a light emitting device
  • an organic EL element In order to miniaturize the organic EL element or increase the occupied area in the pixel, it is preferable to use a lithography process. However, if impurities such as water, oxygen, and hydrogen enter the organic EL element, the reliability is impaired, so it is necessary to take measures such as controlling the atmosphere from the manufacturing stage to a low dew point.
  • the film forming step, the lithography step, the etching step, and the sealing step for forming the organic EL element can be continuously performed without opening to the atmosphere. Therefore, it is possible to form a fine, high-luminance, high-reliability organic EL element.
  • the manufacturing apparatus includes a manufacturing apparatus for forming a pixel circuit for driving an organic EL element. Therefore, it is possible to continuously form the pixel circuit to the organic EL element, and it is possible to form a display device having a high yield and high reliability.
  • a silicon wafer can be used as a support substrate for forming a pixel circuit and an organic EL element.
  • a silicon wafer on which a drive circuit or the like is formed in advance as a support substrate a pixel circuit can be formed on the drive circuit. Therefore, it is possible to form a display device having a narrow frame suitable for AR or VR.
  • the silicon wafer is preferably ⁇ 8 inch or more (for example, ⁇ 12 inch).
  • FIG. 1 is a diagram illustrating a manufacturing device for a display device, which is one aspect of the present invention.
  • the manufacturing apparatus includes a manufacturing apparatus for a light emitting device and a manufacturing apparatus for a pixel circuit.
  • the light emitting device manufacturing apparatus has a cluster 20E, a cluster 30E, and a load lock chamber LL2.
  • a group of devices sharing a transport device or the like is referred to as a cluster.
  • the cluster 20E has a group of devices for performing a vacuum process (decompression process).
  • the cluster 30E has a group of devices for performing a process under atmosphere control.
  • the cluster 20E has a transfer chamber TF6 and a vacuum process device EVC.
  • FIG. 1 shows an example in which there are six vacuum process devices EVC (vacuum process devices EVC1 to EVC6), but one or more may be used according to the purpose.
  • a vacuum pump VP is connected to the vacuum process apparatus EVC, and a gate valve is provided between the vacuum process apparatus EVC and the transfer chamber TF6. Therefore, each vacuum process apparatus EVC can perform processes such as film formation or etching in parallel.
  • the vacuum process means processing in a controlled environment under reduced pressure. Therefore, the vacuum process includes not only the process under high vacuum but also the process of introducing a process gas to control the pressure.
  • An independent vacuum pump VP is also provided in the transfer chamber TF6 to prevent cross-contamination in the process performed by the vacuum process apparatus EVC.
  • it may have a configuration in which a gate valve is not provided between the transfer chamber TF6 and the vacuum process apparatus EVC6.
  • the transfer chamber TF6 is connected to the load lock chamber LL2 via a gate valve.
  • the transfer chamber TF6 is provided with transfer devices 70f1 and 70f2.
  • the transfer device 70f1 can transfer the substrate installed in the load lock chamber LL2 to the vacuum process device EVC.
  • the transfer device 70f2 can transfer a substrate by using a substrate transfer jig described later. It should be noted that the configuration may include either one of the transporting devices 70f1 and 70f2.
  • a film forming apparatus such as a vapor deposition apparatus, a sputtering apparatus, a CVD (Chemical Vapor Deposition) apparatus, and an ALD (Atomic Layer Deposition) apparatus can be used.
  • a thermal CVD apparatus using heat a PECVD apparatus using plasma (Plasma Enhanced CVD apparatus), or the like can be used.
  • the ALD device a thermal ALD device using heat, a PEALD device using a plasma-excited reactor (Plasma Enhanced ALD device), or the like can be used.
  • the etching apparatus a dry etching apparatus or the like can be applied.
  • an auxiliary mechanism such as a substrate transfer jig attachment / detachment device and a substrate reversing device may be applied as the vacuum process device EVC. It should be noted that these auxiliary mechanisms can be applied to a vacuum process device EVC6 or the like in which a gate valve is not provided between the transfer chamber TF6 and the like.
  • the cluster 30E has a transfer chamber TF5 and a normal pressure process apparatus EAC that mainly performs the process under normal pressure.
  • FIG. 1 shows an example in which there are six normal pressure process devices EAC (normal pressure process devices EAC1 to EAC6), but one or more may be used according to the purpose.
  • the normal pressure process apparatus EAC is not limited to the process under normal pressure, and may be controlled to a slightly negative pressure or positive pressure than normal pressure. Further, when a plurality of atmospheric pressure process devices EAC are provided, the atmospheric pressure may be different for each.
  • a valve for introducing the inert gas (IG) is connected to the transfer chamber TF5 and the normal pressure process device EAC, and the atmosphere can be controlled to the inert gas atmosphere.
  • the inert gas nitrogen or a noble gas such as argon or helium can be used.
  • the inert gas preferably has a low dew point (for example, -50 ° or less).
  • FIG. 1 shows an example in which each of the normal pressure process devices EAC1 to EAC5 is connected to the transfer chamber TF5 via a gate valve.
  • a gate valve By providing a gate valve, it is possible to control the atmospheric pressure, control the type of inert gas, prevent cross-contamination, and the like. If these strict controls are not required, the transfer chamber TF5 may be connected to the transfer chamber TF5 without using a gate valve as in the normal pressure process device EAC6.
  • the transfer chamber TF5 is connected to the load lock chamber LL2 via a gate valve.
  • a transfer device 70e is provided in the transfer chamber TF5, and the substrate installed in the load lock chamber LL2 can be transferred to the normal pressure process device EAC.
  • an apparatus for performing a lithography process can be applied.
  • a resin (photoresist) coating device an exposure device, a developing device, a baking device, etc.
  • resin UV curable resin, etc.
  • a device, a nanoimprint device, or the like may be applied.
  • a cleaning device, a wet etching device, a coating device, a resist stripping device, a facing substrate bonding device, or the like may be applied to the normal pressure process device EAC depending on the application.
  • the load lock chamber LL2 is provided with a vacuum pump VP and a valve for introducing the inert gas. Therefore, the load lock chamber LL2 can be controlled to a reduced pressure or an inert gas atmosphere. For example, when the substrate is transported from the cluster 20E to the cluster 30E, the substrate is carried in from the cluster 20E with the load lock chamber LL2 depressurized, the load lock chamber LL2 is made into an inert gas atmosphere, and then the substrate is carried out to the cluster 30E. It can be carried out.
  • the load lock chamber LL2 is provided with a substrate rotation mechanism 45 for rotating the conveyed substrate about a Z axis (an axis perpendicular to the center of the upper surface of the substrate).
  • a substrate rotation mechanism 45 for rotating the conveyed substrate about a Z axis (an axis perpendicular to the center of the upper surface of the substrate).
  • the pixel circuit manufacturing apparatus includes a load / unload unit 10, a cluster 20, a cluster 30, and a load lock chamber LL1.
  • the cluster 20 has a group of devices for performing a vacuum process (decompression process).
  • the cluster 30 has a group of devices for carrying out a process under normal pressure.
  • the description of the cluster 20E will be omitted.
  • the partial description common to the cluster 30E will be omitted.
  • the load / unload unit 10 has a load / unload chamber LU (load / unload chamber LU1, LU2, LU3) and a transfer chamber TF1.
  • the transfer chamber TF1 is connected to the load / unload chamber LU. Further, the transfer chamber TF1 is connected to the load lock chamber LL1 via a gate valve.
  • the transfer chamber TF1 is provided with a transfer device 70a, and the substrate installed in the load / unload chamber LU can be transported to the load lock chamber LL1.
  • load / unload chamber LU there may be a gate valve between the load / unload chamber LU and the transfer chamber TF1.
  • load / unload chamber LU is illustrated in FIG. 1, the load chamber and the unload chamber may be provided respectively.
  • the cluster 20 has a transfer chamber TF2 and a vacuum process device VC.
  • FIG. 1 shows an example in which there are six vacuum process devices VC (vacuum process devices VC1 to VC6), but one or more may be used according to the purpose.
  • the transfer chamber TF2 is connected to the load lock chamber LL1 via a gate valve.
  • the transfer chamber TF2 is provided with a transfer device 70b.
  • the transfer device 70b can transfer the substrate installed in the load lock chamber LL1 to the vacuum process device VC.
  • a film forming device such as a sputtering device, a CVD device, an ALD device, and a plasma processing device can be applied.
  • a plasma processing device such as a plasma processing device.
  • a dry etching apparatus or the like can be applied as the etching apparatus.
  • a microwave-excited plasma processing device capable of generating high-density plasma can be used.
  • Applications include, for example, a process of supplementing oxygen to the constituent elements of a transistor when forming a transistor using an oxide semiconductor in a pixel circuit.
  • the cluster 30 has a transfer chamber TF3 and a normal pressure process apparatus AC that mainly performs the process under normal pressure.
  • FIG. 1 shows an example in which there are six normal pressure process devices AC (normal pressure process devices AC1 to AC6), one or more may be used depending on the purpose.
  • a valve for introducing the inert gas (IG) may be provided as in the cluster 30E to control the atmosphere of the inert gas.
  • the transfer chamber TF3 is connected to the load lock chamber LL1 via a gate valve.
  • a transfer device 70c is provided in the transfer chamber TF3, and the substrate installed in the load lock chamber LL1 can be transferred to the normal pressure process device AC.
  • an apparatus for performing a lithography process can be applied.
  • a resin (photoresist) coating device an exposure device, a developing device, a resist stripping device, a baking device, or the like may be applied, or a polishing device may be provided.
  • polishing apparatus it is preferable to use a CMP (Chemical Mechanical Polishing) apparatus.
  • Applications include flattening the formation surface of transistors and the like, which are elements of pixel circuits, forming embedded plugs, and forming embedded wiring.
  • a cleaning device, a wet etching device, or the like may be applied to the normal pressure process device AC depending on the application.
  • the load lock chamber LL1 is connected to the load lock chamber LL2 via a gate valve, a transfer chamber TF4, and a gate valve. Further, a load chamber LD and an unload chamber ULD can be connected to the transfer chamber TF4. Further, the load lock chamber LL1 is provided with a substrate rotation mechanism 47 similar to the substrate rotation mechanism 45.
  • the substrate for which the formation process of the light emitting device has been completed can be taken out without returning to the load / unload portion 10, and contamination caused by the material of the light emitting device can be removed. Can be prevented.
  • the load chamber for example, when only the forming process of the light emitting device is performed, the substrate can be loaded without going through the load / unload unit 10. In the load / unload unit 10, it is also possible to take out a substrate that has been subjected to processing such as forming a pixel circuit.
  • a transfer device 70d is provided in the transfer chamber TF4, and the substrate installed in the load lock chamber LL1 can be transported to the load lock chamber LL2. Alternatively, the substrate can be carried in from the load chamber LD and the substrate can be carried out to the unload chamber ULD.
  • the transport device 70d is self-propelled and can be moved along the rail 75. Depending on the specifications of the transfer chamber TF4 and the transfer device 70d, the self-propelled configuration may not be necessary.
  • a gate valve may be provided between the transfer chamber TF4 and each of the load chamber LD and the unload chamber ULD. Further, the load lock chamber LL1 and the transfer chamber TF4 may be provided with a valve for introducing the inert gas (IG) to control the atmosphere of the inert gas. Further, a vacuum pump VP may be provided in the transfer chamber TF4.
  • IG inert gas
  • the substrate is carried into the cluster 20 from the load / unload chamber LU, and a film forming process is performed.
  • the silicon wafer which is the substrate, is provided with a pixel drive circuit or the like as needed.
  • the substrate is transferred from the cluster 20 to the cluster 30, and a lithography process is performed.
  • the substrate is transferred from the cluster 30 to the cluster 20, and an etching step is performed. These steps are repeated several times as needed to form a structure (a pixel circuit having a transistor or the like using an oxide semiconductor).
  • a film forming step of forming a protective film covering the structure is performed in the cluster 20.
  • the substrate is carried out from the cluster 20E to the load lock chamber LL1.
  • the substrate is carried into the cluster 20E from the load lock chamber LL1 via the load lock chamber LL2, and a film forming step is performed.
  • the substrate is transferred from the cluster 20E to the cluster 30E, and a lithography process is performed.
  • the substrate is transferred from the cluster 30E to the cluster 20E, and an etching step is performed. These steps are repeated several times as needed to form a structure (light emitting element such as an organic EL element) on the pixel circuit.
  • a film forming step of forming a protective film covering the structure with the cluster 20E is performed.
  • the substrate is carried out from the cluster 20E to the unload chamber ULD or the load / unload chamber LU.
  • the light emitting element such as the organic EL element can be carried out into the atmosphere in a state of being sealed with the protective film without being exposed to the atmosphere. That is, when the organic EL element is formed as a structure, it is possible to suppress the invasion of impurities contained in the atmosphere and improve the reliability. Further, since the process of forming the light emitting device is continuously performed from the process of forming the pixel circuit, it is possible to form a display device having a high yield and high reliability.
  • the orientation of the board to be installed may differ depending on the device.
  • a sputtering device a CVD device, an etching device, etc.
  • the substrate is installed on one of the facing electrodes, either the face-up method or the face-down method can be supported.
  • the substrate can be installed in a face-up manner in all the vacuum process devices VC.
  • the substrate can be transferred by placing the substrate on the hand portion of the transfer device with the surface of the substrate forming the structure as the upper surface, and it is easy to install the substrate on a stage (electrode or the like) in the vacuum process device VC.
  • the vapor deposition material is often powder, and a vapor deposition source such as a crucible is required. Therefore, it is preferable to install the vapor deposition source at the bottom and the substrate at the top as a face-down method. Therefore, it may be necessary to invert the substrate between processes.
  • FIGS. 2A and 2B In the face-down method, it is necessary to transport the substrate without touching the surface of the substrate with the hand portion of the transport device. Therefore, it is preferable to use a substrate transfer jig as shown in FIGS. 2A and 2B.
  • the substrate transfer jig has a jig 51 and a jig 54.
  • FIG. 2A is a diagram in which a substrate 60 is sandwiched between a jig 51 and a jig 54, and in the present specification, the configuration is referred to as a work substrate 50.
  • the bending of the substrate can be suppressed, which is particularly effective when the substrate is installed by the face-down method.
  • the jig 54 has an opening, and the other portion is used to hold the substrate 60. Since a structure such as a light emitting element is formed in the opening, the size and shape of the opening may be adjusted according to the purpose. For example, the size of the opening can be determined according to the size of the exposed area described below.
  • the external connection terminal is estimated on the assumption that it is taken out from the back surface using a through electrode. Therefore, the display area can be widened. A pad may be provided in the exposed area. In this case, although the display area becomes small, it is possible to reduce the manufacturing cost related to the configuration for taking out the external connection terminal.
  • 3A to 3C are examples in the case where the aspect ratio of the display area is 4: 3, respectively.
  • FIG. 3A is an example in which a sealing region is provided inside the exposure region (32 mm ⁇ 24 mm) of the exposure apparatus.
  • the width of the sealing region is 1.5 mm in the vertical direction and 2.0 mm in the horizontal direction.
  • the size of the display area is 28 mm ⁇ 21 mm (aspect ratio is 4: 3), and the diagonal is about 1.38 inches.
  • the number of display devices per board is 72. Assuming that the width of the sealing region is 2.0 mm in the vertical direction and 2.65 mm in the horizontal direction, the size of the display region is 26.7 mm ⁇ 20 mm (aspect ratio is 4: 3), and the diagonal is about 1. It becomes .32 inch.
  • the size of the display area is 24 mm ⁇ 18 mm (aspect ratio is 4: 3) and the diagonal is about 1.18 inch. Will be. In each case, the number of display devices per board is 72.
  • FIG. 3B and 3C are examples in which a sealing region is provided outside the exposure region (32 mm ⁇ 24 mm) of the exposure apparatus. In this case, the exposure is performed with a gap corresponding to the sealing region.
  • a marker area is provided inside the exposed area.
  • FIG. 3B is an example in which the width of the marker region is 0.5 mm in the vertical direction, 0.7 mm in the horizontal direction, and the width of the sealing region is 2.0 mm. At this time, the size of the display area of the display device is about 1.51 inches diagonally. The number of display devices per board is 56. When the width of the marker area is 1.0 mm in the vertical direction and 1.3 mm in the horizontal direction, the size of the display area is about 1.45 inch diagonally.
  • FIG. 3B is an example in which the width of the marker region is 0.5 mm in the vertical direction, 0.7 mm in the horizontal direction, and the width of the sealing region is 2.0 mm. At this time, the size of the display area of the display device is about 1.51 inches
  • 3C is an example in which the width of the marker region is 0.5 mm in the vertical direction, 0.7 mm in the horizontal direction, and the width of the sealing region is 3.0 mm.
  • the size of the display area of the display device is about 1.51 inches diagonally, which is the same as the configuration of FIG. 3B.
  • the number of display devices taken per board is 49, which is about 13% lower than the configuration shown in FIG. 3B.
  • FIG. 2B is a diagram in which the jig 51, the substrate 60, and the jig 54 are separated into upper and lower parts.
  • the jig 51 and the jig 54 are preferably formed of a hard material such as metal, ceramics, or cermet. Alternatively, these may be combined and formed.
  • FIG. 2B shows an example in which a magnet is provided on the jig 51 and the substrate 60 is sandwiched between jigs 54 made of magnetic metal.
  • the magnetic metal may be provided only on the portion of the jig 54 facing the magnet 55, and the other portion may be formed by ceramics or the like.
  • the magnet 55 may be provided on the jig 51 side.
  • the magnet 55 may be provided on both the jig 51 and the jig 54.
  • the substrate 60 may be sandwiched between the jig 51 and the jig 54 by using a spring or other configuration.
  • the jig 51 may be provided with a through hole 58 for pusher pins and a pin 62 for alignment.
  • the substrate 60 By passing the pusher pin through the through hole 58, the substrate 60 can be lifted, and the substrate 60 can be easily installed on the jig 51 or taken out from the jig 51.
  • the notch portion of the substrate 60 can be aligned with the pin 62, and the substrate 60 can be aligned with the counterbore portion 59 to perform rough alignment. Details of the installation of the substrate 60 on the jig 51 will be described later.
  • the jig 51 has a rectangular upper surface shape and has a flat plate portion, and the flat plate portion has a size equal to or larger than the diameter of the substrate 60.
  • a convex portion 56 is provided on a first end portion perpendicular to the upper surface of the flat plate portion and a second end portion facing the first end portion. The convex portion 56 can be used at the time of installation by the face-down method described later.
  • a through hole 52 and a through hole 53 are provided between the third end portion perpendicular to the first end portion and the fourth end portion facing the third end portion.
  • FIG. 4B a comparison of the sizes of the through hole 52 and the hand portion 71 of the transport device 70 is shown in FIG. 4B.
  • the inner dimension of the cross section perpendicular to the long axis of the through hole 52 is X1 ⁇ Y1
  • the outer dimension of the cross section perpendicular to the long axis of the hand portion 71 is X2 ⁇ Y2, X1> X2 and Y1> Y2. Therefore, as shown in FIG. 4A, the hand portion 71 of the transport device 70 can be inserted into the through hole 52.
  • the hand portion 71 of the transport device 70 can be inserted into the through hole 52 for transport. Therefore, since the hand portion 71 does not touch the surface of the substrate 60 and the jig 54, it is possible to prevent scratches and contamination on the surface of the substrate 60, and to prevent the film adhering to the jig 54 from peeling off.
  • the through hole of the hand portion 71 of the transport device 70 with respect to the fixed work substrate 50. Insertion and extraction to and from 52 can be performed only by the operation of the transport device 70.
  • the number of through holes 52 is 3, but it may be 2 or 4 or more.
  • the substrate transfer jig described in this embodiment is an example, and a substrate transfer jig having another configuration may be used.
  • the through hole 53 is a through hole for inserting the hand portions 85a and 85b of the substrate reversing device 80 shown in FIG. 5A.
  • the substrate reversing device 80 has a pillar 82 fixed to the gantry 81, a rotation mechanism 83 fixed to the pillar 82, and a rotating portion 84 fixed to the rotation shaft of the rotation mechanism 83.
  • the rotating portion 84 has horizontal moving mechanisms 86a and 86b, the hand portion 85a is connected to the horizontal moving mechanism 86a, and the hand portion 85b is connected to the horizontal moving mechanism 86b.
  • FIG. 5B shows a cross section perpendicular to the long axis of the hand portion 85b of the substrate reversing device 80 and a cross section perpendicular to the long axis of the through hole 53.
  • the cross section of the hand portion 85b perpendicular to the long axis has a partially convex shaped portion 87.
  • the cross section perpendicular to the long axis of the through hole 53 has a concave shaped portion 57 in part.
  • the horizontal movement mechanism 86b is moved by the horizontal movement mechanism so that the convex shape portion 87 and the concave shape portion 57 are in contact with each other, so that the two are in close contact with each other.
  • the hand portions 85a and 85b having a line-symmetrical configuration can also be moved in the same manner to fix the hand portions 85a and 85b to the work board 50.
  • the convex shape portion 87 and the concave shape portion 57 may have a shape as long as they are in close contact with each other and may have a curvature.
  • the work board 50 is on standby with the hand portion 71 of the transport device 70 inserted into the through hole 52 in advance. Further, it is assumed that the surface of the substrate 60 is the upper surface.
  • the hand portion 85a and the hand portion 85b of the substrate reversing device 80 are moved in a direction approaching each other, and the transfer device 70 is operated so that the hand portion 85a and the hand portion 85b are inserted into the through hole 53 (see FIG. 6A). ..
  • the hand portion 85a and the hand portion 85b are moved in a direction away from each other, and the work substrate 50 is fixed to the hand portion 85a and the hand portion 85b. Then, the hand portion 71 of the transport device 70 is slightly lowered to a height that does not contact the inner wall of the through hole 52 (see FIG. 6B). Then, the hand portion 71 is pulled out from the through hole 52 (see FIG. 6C).
  • the rotating portion 84 is rotated by the rotating mechanism 83 (see FIG. 7A), and after inversion, the hand portion 71 of the transport device is inserted into the through hole 53.
  • the hand portion 85a and the hand portion 85b of the substrate reversing device 80 are moved in a direction approaching each other, and the fixing of the hand portion 85a and the hand portion 85b and the work substrate 50 is released.
  • the hand portion 71 of the transport device 70 is slightly raised to a height in contact with the inner wall of the through hole 52 (see FIG. 7B).
  • the hand portion 71 is retracted, and the work substrate 50 is pulled out from the hand portion 85a and the hand portion 85b of the substrate reversing device 80.
  • the above is the reversing operation of the work board 50.
  • the same operation may be performed when returning from the state of FIG. 7C to the state of FIG. 6A.
  • FIG. 8A is a diagram illustrating a vacuum process apparatus EVC in which a work substrate 50 is installed in a face-down manner, and here, a vapor deposition apparatus 90a is illustrated.
  • the gate valve is omitted for the sake of clarity in the figure.
  • the thin-film deposition apparatus 90a has a pair of rails 91 fixed to the chamber at a position higher than the thin-film deposition source 92 (crucible). By installing the work substrate 50 so that the side surface of the convex portion 56 of the work substrate 50 rests on the rail 91, the work substrate 50 can be installed in the chamber of the vapor deposition apparatus 90a by a face-down method.
  • the sputtering apparatus may be configured such that the work substrate 50 is installed on the rail 91, and the substrate may be installed by a face-down method.
  • FIG. 8B is a diagram illustrating a vacuum process apparatus EVC in which the work substrate 50 is installed in a face-up manner, and here exemplifies a dry etching apparatus 90b.
  • the gate valve is omitted for the sake of clarity in the figure.
  • the dry etching apparatus 90b is a parallel plate type and has a cathode 95 (stage) and an anode 96.
  • a CVD device, an ALD device, or the like in which the work substrate 50 is installed by a face-up method can also be configured to install the work substrate 50 on the stage in the same manner as the dry etching apparatus 90b shown in FIG. 8B.
  • the film forming step, the lithography step, the etching step, and the sealing step can be continuously performed. Therefore, it is possible to form a fine, high-luminance, high-reliability organic EL element.
  • the cluster 20E may be compatible with a large format capable of batch processing a plurality of substrates. By making the cluster 20E compatible with large format, the throughput can be increased. Alternatively, it can be effectively used when a large format compatible device is already owned. In the configuration shown in FIG. 9, the same configuration as in FIG. 1 can be used except for the cluster 20E.
  • the transfer jig corresponds to a plurality of substrates 60.
  • FIG. 10A is an example in which four substrates 60 are arranged and arranged on the jig 51.
  • the configuration may be close to the staggered arrangement.
  • FIG. 10B shows a configuration in which six substrates and nine substrates 60 are arranged in a staggered arrangement. By arranging the substrates 60 in a staggered manner, the size of the jig 51 can be reduced. Alternatively, more substrates 60 can be arranged on the jig 51.
  • FIG. 11A is a diagram illustrating the arrangement of the substrate 60 on the jig 51.
  • the jig 51 is installed on the stage 46.
  • the stage 46 can be moved horizontally along the rail 76, and can be moved according to the movable range of the transport device 70.
  • the operation of placing the substrate 60 on the hand of the transport device 70 is performed so that the notch is located forward.
  • the position of the notch can be adjusted by the rotational operation of the substrate rotation mechanism 45 of the load lock chamber LL2.
  • the substrate 60 is transported onto the arrangement position of the jig 51, the pusher pin 69 is raised to lift the substrate 60, and the hand of the transport device 70 is pulled out. Then, the pusher pin 69 is lowered and installed in the counterbore portion 59.
  • the jig 54 is gripped by the transfer device 66 and transferred onto the substrate 60.
  • precise alignment is performed by observing the marker provided on the substrate 60 and the marker provided on the jig 54 with the camera 65.
  • the jig 54 is lowered, brought into close contact with the substrate 60, and the jig 54 is removed from the transport device 66.
  • the jig 54 in the transport device 66 can be gripped by using, for example, an electrostatic chuck or an electromagnet.
  • a plurality of boards 60 can be installed on the jig 51, and the jig 54 can be aligned and installed on the board 60.
  • the same operation can be performed even when the transfer jig shown in FIG. 2 is used.
  • a metal mask or a device using an FMM may be referred to as an MM (metal mask) structure.
  • MM metal mask
  • MML metal maskless
  • SBS Side
  • a light emitting device capable of emitting white light may be referred to as a white light emitting device.
  • the white light emitting device can be combined with a colored layer (for example, a color filter) to form a full color display light emitting device.
  • the light emitting device can be roughly classified into a single structure and a tandem structure.
  • a device having a single structure preferably has one light emitting unit between a pair of electrodes, and the light emitting unit is preferably configured to include one or more light emitting layers.
  • a light emitting layer may be selected so that the emission colors of each of the two or more light emitting layers have a complementary color relationship. For example, by making the emission color of the first light emitting layer and the emission color of the second light emitting layer have a complementary color relationship, it is possible to obtain a configuration in which the entire light emitting device emits white light. The same applies to a light emitting device having three or more light emitting layers.
  • the device having a tandem structure preferably has two or more light emitting units between a pair of electrodes, and each light emitting unit is preferably configured to include one or more light emitting layers.
  • each light emitting unit is preferably configured to include one or more light emitting layers.
  • the light emitted from the light emitting layers of a plurality of light emitting units may be combined to obtain white light emission.
  • the configuration for obtaining white light emission is the same as the configuration for a single structure.
  • the SBS structure light emitting device can have lower power consumption than the white light emitting device.
  • the white light emitting device is suitable because the manufacturing process is simpler than that of the light emitting device having an SBS structure, so that the manufacturing cost can be lowered or the manufacturing yield can be increased.
  • the device having a tandem structure may have a configuration (BB, GG, RR, etc.) having a light emitting layer that emits light of the same color.
  • the tandem structure in which light emission is obtained from a plurality of layers requires a high voltage for light emission, but the current value for obtaining the same light emission intensity as that in the single structure is small. Therefore, in the tandem structure, the current stress per light emitting unit can be reduced, and the device life can be extended.
  • FIG. 12 shows a schematic top view of the display device 100 according to one aspect of the present invention.
  • the display device 100 has a plurality of light emitting elements 110R exhibiting red, a light emitting element 110G exhibiting green, and a plurality of light emitting elements 110B exhibiting blue.
  • R, G, and B are designated in the light emitting region of each light emitting element.
  • the light emitting element 110R, the light emitting element 110G, and the light emitting element 110B are arranged in a matrix.
  • FIG. 12 shows a so-called stripe arrangement in which light emitting elements of the same color are arranged in one direction.
  • the arrangement method of the light emitting elements is not limited to this, and an arrangement method such as a delta arrangement or a zigzag arrangement may be applied, or a pentile arrangement may be used.
  • an EL element such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode).
  • Luminescent substances possessed by EL elements include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), inorganic compounds (quantum dot materials, etc.), and substances that exhibit thermal activated delayed fluorescence (thermally activated delayed fluorescence). (Thermally activated extended fluorescent (TADF) material) and the like.
  • FIG. 13A is a schematic cross-sectional view corresponding to the alternate long and short dash line A1-A2 in FIG.
  • FIG. 12 shows a cross section of the light emitting element 110R, the light emitting element 110G, and the light emitting element 110B.
  • the light emitting element 110R, the light emitting element 110G, and the light emitting element 110B are each provided on a pixel circuit and have a pixel electrode 111 and a common electrode 113.
  • the light emitting element 110R has an EL layer 112R between the pixel electrode 111 and the common electrode 113.
  • the EL layer 112R has a luminescent organic compound that emits light having a peak in at least the red wavelength region.
  • the EL layer 112G included in the light emitting device 110G has a luminescent organic compound that emits light having a peak in at least a green wavelength region.
  • the EL layer 112B included in the light emitting device 110B has a luminescent organic compound that emits light having a peak in at least a blue wavelength region.
  • a structure in which the EL layer 112R, the EL layer 112G, and the EL layer 112B emit light of different colors may be referred to as an SBS (Side By Side) structure.
  • the EL layer 112R, the EL layer 112G, and the EL layer 112B are composed of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer, in addition to a layer (light emitting layer) containing a luminescent organic compound, respectively. Of these, one or more may be possessed.
  • the pixel electrode 111 is provided for each light emitting element. Further, the common electrode 113 is provided as a continuous layer common to each light emitting element. A conductive film having transparency to visible light is used for either the pixel electrode 111 or the common electrode 113, and a conductive film having reflection to visible light is used for the other.
  • the pixel electrode 111 translucent and the common electrode 113 reflective, it is possible to make a bottom injection type (bottom emission type) display device, and conversely, the pixel electrode 111 is reflective and the common electrode 113 is transparent. By making it light, it can be used as a top-emission type (top-emission type) display device. By making both the pixel electrode 111 and the common electrode 113 translucent, it is possible to make a double-sided injection type (dual emission type) display device. In this embodiment, an example of manufacturing a top injection type (top emission type) display device will be described.
  • An insulating layer 131 is provided so as to cover the end portion of the pixel electrode 111.
  • the end portion of the insulating layer 131 preferably has a tapered shape.
  • the EL layer 112R, the EL layer 112G, and the EL layer 112B each have a region in contact with the upper surface of the pixel electrode 111 and a region in contact with the surface of the insulating layer 131. Further, the ends of the EL layer 112R, the EL layer 112G, and the EL layer 112B are located on the insulating layer 131.
  • a gap is provided between the two EL layers between the light emitting elements of different colors.
  • the EL layer 112R, the EL layer 112G, and the EL layer 112B are provided so as not to be in contact with each other. As a result, it is possible to suitably prevent unintended light emission due to current flowing through the two EL layers adjacent to each other. Therefore, the contrast can be enhanced, and a display device with high display quality can be realized.
  • a protective layer 121 is provided so as to cover the light emitting element 110R, the light emitting element 110G, and the light emitting element 110B.
  • the protective layer 121 has a function of preventing impurities from diffusing into each light emitting element from above.
  • the protective layer 121 has a function of capturing (also referred to as gettering) impurities (typically, impurities such as water and hydrogen) that can enter each light emitting element.
  • the protective layer 121 may have, for example, a single-layer structure or a laminated structure including at least an inorganic insulating film.
  • the inorganic insulating film include an oxide film such as a silicon oxide film, a silicon nitride film, a silicon nitride film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, and a hafnium oxide film, or a nitride film. ..
  • a semiconductor material such as indium gallium oxide or indium gallium zinc oxide may be used as the protective layer 121.
  • the pixel electrode 111 is electrically connected to either the source or the drain of the transistor 116.
  • a transistor having a metal oxide in the channel forming region (hereinafter referred to as an OS transistor) can be used.
  • OS transistors have higher mobility than amorphous silicon and are excellent in electrical characteristics. Further, the OS transistor does not require a crystallization step in the manufacturing process of polycrystalline silicon, and can be formed by a wiring step or the like. Therefore, the OS transistor can be formed on the transistor 115 (hereinafter, Si transistor) having silicon in the channel forming region formed on the substrate 60 without using a bonding step or the like.
  • the transistor 116 is a transistor constituting a pixel circuit, and can be formed by the manufacturing apparatus of one aspect of the present invention.
  • the transistor 115 is a transistor constituting a drive circuit of a pixel circuit or the like. That is, since the pixel circuit can be formed on the drive circuit, a display device having a narrow frame can be formed.
  • a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used.
  • the OS transistor Since the OS transistor has a large energy gap in the semiconductor layer, it exhibits an extremely low off-current characteristic of several yA / ⁇ m (current value per 1 ⁇ m of channel width). Further, the OS transistor has features different from those of the Si transistor such as impact ionization, avalanche breakdown, and short channel effect, and can form a circuit having high withstand voltage and high reliability. In addition, variations in electrical characteristics due to crystallinity non-uniformity, which is a problem with Si transistors, are unlikely to occur with OS transistors.
  • the semiconductor layer of the OS transistor includes, for example, indium, zinc and M (M is one or more metals such as aluminum, titanium, gallium, germanium, ittrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium). It can be a film represented by an In—M—Zn-based oxide.
  • M is one or more metals such as aluminum, titanium, gallium, germanium, ittrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium.
  • M is one or more metals such as aluminum, titanium, gallium, germanium, ittrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium.
  • In—M—Zn-based oxide can be typically formed by a sputtering method. Alternatively, it may be formed by using an ALD (Atomic layer deposition) method.
  • the atomic number ratio of the metal element of the sputtering target used for forming the In—M—Zn-based oxide by the sputtering method preferably satisfies In ⁇ M and Zn ⁇ M.
  • the atomic number ratio of the semiconductor layer to be formed includes a variation of plus or minus 40% of the atomic number ratio of the metal element contained in the sputtering target.
  • an oxide semiconductor having a low carrier density is used as the semiconductor layer.
  • the semiconductor layer is 1 ⁇ 10 17 / cm 3 or less, preferably 1 ⁇ 10 15 / cm 3 or less, more preferably 1 ⁇ 10 13 / cm 3 or less, and more preferably 1 ⁇ 10 11 / cm 3 or less.
  • an oxide semiconductor having a carrier density of less than 1 ⁇ 10 10 / cm 3 and a carrier density of 1 ⁇ 10 -9 / cm 3 or more can be used.
  • Such oxide semiconductors are referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. It can be said that the oxide semiconductor is an oxide semiconductor having a low defect level density and stable characteristics.
  • an oxide semiconductor having an appropriate composition may be used according to the required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. Further, in order to obtain the required semiconductor characteristics of the semiconductor, it is preferable that the carrier density and impurity concentration of the semiconductor layer, the defect density, the atomic number ratio between the metal element and oxygen, the interatomic distance, the density and the like are appropriate. ..
  • the concentration of silicon or carbon in the semiconductor layer is 2 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
  • the concentration of the alkali metal or alkaline earth metal in the semiconductor layer is 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less.
  • the nitrogen concentration in the semiconductor layer is preferably 5 ⁇ 10 18 atoms / cm 3 or less.
  • the oxide semiconductor constituting the semiconductor layer when the oxide semiconductor constituting the semiconductor layer contains hydrogen, it reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency in the oxide semiconductor. If the channel formation region in the oxide semiconductor contains oxygen deficiency, the transistor may have normally-on characteristics. In addition, a defect containing hydrogen in an oxygen deficiency may function as a donor and generate electrons as carriers. In addition, a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have normally-on characteristics.
  • Defects containing hydrogen in oxygen deficiencies can function as donors for oxide semiconductors. However, it is difficult to quantitatively evaluate the defect. Therefore, in oxide semiconductors, the carrier concentration may be used for evaluation instead of the donor concentration. Therefore, in the present specification and the like, as the parameter of the oxide semiconductor, a carrier concentration assuming a state in which an electric field is not applied may be used instead of the donor concentration. That is, the "carrier concentration" described in the present specification and the like may be paraphrased as a "donor concentration".
  • the hydrogen concentration obtained by secondary ion mass spectrometry is less than 1 ⁇ 10 20 atoms / cm 3 , preferably 1 ⁇ 10 19 atoms / cm. It is less than 3 , more preferably less than 5 ⁇ 10 18 atoms / cm 3 , and even more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
  • the display device manufacturing device includes a sputtering device or an ALD device, and can form a high-quality oxide semiconductor.
  • FIG. 13A illustrates a configuration in which the light emitting layers of the light emitting elements of R, G, and B are different from each other, but the present invention is not limited to this.
  • an EL layer 112W that emits white light is provided, and colored layers 114R (red), 114G (green), and 114B (blue) are provided so as to be superimposed on the EL layer 112W to provide a light emitting element 110R.
  • a method of forming 110G and 110B and colorizing them may be used.
  • the EL layer 112W can have, for example, a tandem structure in which the EL layers that emit light of each of R, G, and B are connected in series. Alternatively, a structure in which light emitting layers that emit light of each of R, G, and B are connected in series may be used.
  • the colored layers 114R, 114G, and 114B for example, red, green, and blue color filters can be used.
  • the pixel circuit may be configured by the transistor 117 included in the substrate 60, and the pixel electrode 111 may be electrically connected to one of the source or drain of the transistor 117.
  • the transistor 117 is a Si transistor formed on the substrate 60.
  • the substrate 60 on which the transistor 117 is formed is charged from the load chamber provided in the transfer chamber TF4, each light emitting element is formed by the cluster 20E and the cluster 30E, and the substrate 60 is provided in the transfer chamber TF4. It can be carried out from the unload room. For example, during this period, the cluster 20 and the cluster 30 can perform another process (formation of an OS transistor, etc.).
  • Example of manufacturing method> a method for manufacturing a display device according to one aspect of the present invention will be described.
  • the display device included in the display device 100 shown in the above configuration example will be described as an example.
  • FIGS. 14A to 16D are schematic cross-sectional views of the method for manufacturing the display device illustrated below in each step.
  • the transistor 116 which is a component of the pixel circuit shown in FIG. 13A
  • the transistor 115 which is a component of the drive circuit
  • the thin film (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed by using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum vapor deposition method, an atomic layer deposition (ALD) method, or the like.
  • CVD method include a plasma chemical vapor deposition (PECVD: Plasma Enhanced CVD) method and a thermal CVD method.
  • PECVD Plasma vapor deposition
  • thermal CVD there is an organometallic chemical vapor deposition (MOCVD: Metalorganic CVD) method.
  • the manufacturing apparatus of one aspect of the present invention can have an apparatus for forming a thin film by the above method.
  • spin coating, dip, spray coating, inkjet, dispense, screen printing, offset printing, etc. are used to form thin films (insulating films, semiconductor films, conductive films, etc.) that make up display devices and to apply resins and the like used in lithography processes.
  • a method such as a doctor knife method, a slit coat, a roll coat, a curtain coat, or a knife coat can be used.
  • the manufacturing apparatus of one aspect of the present invention can have an apparatus for forming a thin film by the above method. Further, the manufacturing apparatus according to one aspect of the present invention may have an apparatus for applying the resin by the above method.
  • the thin film when processing the thin film constituting the display device, a photolithography method or the like can be used.
  • the thin film may be processed by using the nanoimprint method.
  • a method of directly forming an island-shaped thin film by a film forming method using a shielding mask may be used in combination.
  • a thin film processing method using a photolithography method there are typically the following two methods.
  • One is a method of forming a resist mask on a thin film to be processed, processing the thin film by etching or the like, and removing the resist mask.
  • the other is a method in which a photosensitive thin film is formed, and then exposed and developed to process the thin film into a desired shape.
  • the light used for exposure for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture thereof can be used.
  • ultraviolet rays, KrF laser light, ArF laser light, or the like can also be used.
  • the exposure may be performed by the immersion exposure technique.
  • extreme ultraviolet (EUV: Extreme Ultra-violet) light or X-rays may be used.
  • an electron beam can be used instead of the light used for exposure. It is preferable to use extreme ultraviolet light, X-rays or an electron beam because extremely fine processing is possible.
  • extreme ultraviolet light, X-rays or an electron beam because extremely fine processing is possible.
  • a dry etching method, a wet etching method, or the like can be used for etching the thin film.
  • the manufacturing apparatus of one aspect of the present invention can have an apparatus for processing a thin film by the above method.
  • a substrate having at least enough heat resistance to withstand the subsequent heat treatment can be used.
  • a substrate having at least enough heat resistance to withstand the subsequent heat treatment can be used.
  • a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, an organic resin substrate, or the like can be used.
  • a single crystal semiconductor substrate made of silicon, silicon carbide or the like, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, or a semiconductor substrate such as an SOI substrate can be used.
  • the substrate 60 it is preferable to use a substrate in which a semiconductor circuit including a semiconductor element such as a transistor is formed on the semiconductor substrate or an insulating substrate.
  • the semiconductor circuit preferably comprises, for example, a pixel circuit, a gate line drive circuit (gate driver), a source line drive circuit (source driver), or the like.
  • gate driver gate line drive circuit
  • source driver source driver
  • an arithmetic circuit, a storage circuit, or the like may be configured.
  • a conductive film to be a pixel electrode 111 is formed, a resist mask is formed by a photolithography method, and an unnecessary portion of the conductive film is removed by etching. After that, the pixel electrode 111 can be formed by removing the resist mask.
  • the pixel electrode 111 it is preferable to use a material (for example, silver or aluminum) having as high a reflectance as possible in the entire wavelength range of visible light.
  • the pixel electrode 111 made of the material can be said to be an electrode having light reflectivity. As a result, not only the light extraction efficiency of the light emitting element can be improved, but also the color reproducibility can be improved.
  • the end portion of the pixel electrode 111 is covered to form the insulating layer 131 (see FIG. 14A).
  • the insulating layer 131 an organic insulating film or an inorganic insulating film can be used.
  • the insulating layer 131 preferably has a tapered end portion in order to improve the step covering property of the later EL film.
  • it is preferable to use a photosensitive material because it is easy to control the shape of the end portion depending on the exposure and development conditions.
  • the EL film 112Rf has a film containing at least a red-emitting organic compound.
  • the electron injection layer, the electron transport layer, the charge generation layer, the hole transport layer, and the hole injection layer may be laminated.
  • the EL film 112Rf can be formed by, for example, a vapor deposition method, a sputtering method, or the like. Not limited to this, the above-mentioned film forming method can be appropriately used.
  • a resist mask 143a is formed on the pixel electrode 111 corresponding to the light emitting element 110R (see FIG. 14C).
  • the resist mask 143a can be formed by a lithography process.
  • the EL film 112Rf is etched using the resist mask 143a as a mask to form the EL layer 112R in an island shape (see FIG. 14D).
  • a dry etching method or a wet etching method can be used for the etching step.
  • an EL film 112Gf which will later become an EL layer 112G, is formed on the exposed pixel electrodes 111 and the insulating layer 131, and on the resist mask 143a (see FIG. 15A).
  • the EL film 112Gf has a film containing at least a green luminescent organic compound.
  • the electron injection layer, the electron transport layer, the charge generation layer, the hole transport layer, and the hole injection layer may be laminated.
  • a resist mask 143b is formed on the pixel electrode 111 corresponding to the light emitting element 110G (see FIG. 15B).
  • the resist mask 143b can be formed by a lithography process.
  • the EL film 112Gf is etched using the resist mask 143b as a mask to form the EL layer 112G in an island shape (see FIG. 15C).
  • a dry etching method or a wet etching method can be used for the etching step.
  • an EL film 112Bf which will later become the EL layer 112B, is formed on the exposed pixel electrodes 111 and the insulating layer 131, and on the resist mask 143a and the resist mask 143b (see FIG. 15D).
  • the EL film 112Bf has a film containing at least a blue light emitting organic compound.
  • the electron injection layer, the electron transport layer, the charge generation layer, the hole transport layer, and the hole injection layer may be laminated.
  • a resist mask 143c is formed on the pixel electrode 111 corresponding to the light emitting element 110B (see FIG. 16A).
  • the resist mask 143b can be formed by a lithography process.
  • the EL film 112Bf is etched using the resist mask 143c as a mask to form the EL layer 112G in an island shape (see FIG. 16B).
  • a dry etching method or a wet etching method can be used for the etching step.
  • ⁇ Resist mask removal> Subsequently, the resist mask 143a, the resist mask 143b, and the resist mask 143c are removed (see FIG. 16C).
  • a peeling method using an organic solvent can be used for removing the resist mask.
  • ashing using a dry etching apparatus may be used for removing the resist mask.
  • the common electrode 113 includes a thin metal film that transmits light emitted from the light emitting layer (for example, an alloy of silver and magnesium), a translucent conductive film (for example, indium tin oxide, or indium, gallium, zinc, etc.). Either a single film (such as an oxide containing the above) or a laminated film of both can be used.
  • the common electrode 113 made of such a film can be said to be an electrode having light transmittance.
  • a thin-film deposition device and / or a sputtering device can be used in the step of forming the conductive film to be the common electrode 113.
  • the electrode having light reflectivity as the pixel electrode 111 and having the electrode having light transmission as the common electrode 113 the light emitted from the light emitting layer can be emitted to the outside through the common electrode 113. That is, a top emission type light emitting element is formed.
  • the protective layer 121 is formed on the common electrode 113 (see FIG. 16D).
  • a sputtering device, a CVD device, an ALD device, or the like can be used in the step of forming the protective layer.
  • FIG. 17 shows an example of a manufacturing apparatus that can be used in the manufacturing process from the formation of the pixel circuit and the EL film 112Rf to the formation of the protective layer 121 described above.
  • the basic configuration of the manufacturing apparatus shown in FIG. 17 is the same as that of the manufacturing apparatus shown in FIG. An example is shown in which the necessary equipment is embodied in consideration.
  • FIG. 17 is a perspective view schematically showing the entire manufacturing apparatus, and the utility equipment, the gate valve, and the like are not shown. Further, the transfer chambers TF1 to TF7 and the load lock chambers LL1 and LL2 are shown as a visualization of the inside for clarification.
  • the cluster 20E has a block having a transfer chamber TF5 and vacuum process devices EVC1 to EVC11, and a block having a transfer chamber TF7 and vacuum process devices EVC12 to EVC14.
  • the transfer chamber TF6 and the vacuum process devices EVC1 to EVC14 may be formed as one block without dividing the cluster 20E into two blocks.
  • the transfer chamber TF6 has transfer devices 70f1 and 70f2.
  • the transfer chamber TF7 has a transfer device of 70 g.
  • the transport devices 70f1 and 70f2 are self-propelled and can move along the rail 78.
  • the vacuum process devices EVC1 to EVC5 are vapor deposition devices for forming the EL film 112Rf, the EL film 112Gf, and the EL film 112Bf.
  • each of the vacuum process devices EVC2, EVC3, and EVC4 can be used as a forming device for each of the light emitting layer (R), the light emitting layer (G), and the light emitting layer (B).
  • the vacuum process devices EVC1 and EVC5 can be assigned to forming devices such as an electron injection layer, an electron transport layer, a charge generation layer, a hole transport layer, and a hole injection layer, which are common layers.
  • the vacuum process device EVC 6 can be a board transfer jig attachment / detachment device described with reference to FIGS. 2A and 2B.
  • the transfer device 70f1 can carry the board into the vacuum process device EVC 6 and attach the board transfer jig. Further, the substrate transfer jig can be removed by the vacuum process apparatus EVC6, and the substrate alone can be carried out.
  • the vacuum process apparatus EVC7 can be the substrate reversing apparatus described with reference to FIGS. 5A and 5B.
  • the work substrate 50 can be inverted as needed by the vacuum process apparatus EVC7.
  • the vacuum process devices EVC8 and EVC9 can be a film forming device that forms the common electrode 113.
  • the vacuum process apparatus EVC8 can be a vapor deposition apparatus used for forming a metal film that transmits visible light.
  • the vacuum process device EVC 9 can be a sputtering device used for forming a translucent conductive film.
  • the vacuum process device EVC 10 can be a film forming device that forms the protective layer 121.
  • the vacuum process device EVC 10 can be a sputtering device. Alternatively, it may be a CVD device, an ALD device, or the like. Alternatively, a vacuum process device EVC may be separately provided, a plurality of different film forming devices may be provided, and the protective layer 121 may be formed of a laminated film.
  • the vacuum process apparatus EVC11 can be a dry etching apparatus that forms the EL layer 112R, the EL layer 112G, and the EL layer 112B, and removes the resist mask.
  • a vacuum process device EVC may be separately provided and an ashing device may be separately provided.
  • One or more of the vacuum process devices EVC12, EVC13, and EVC14 can be vacuum bake devices. Since the reliability of an organic EL element deteriorates due to the intrusion of impurities such as water, vacuum baking (heat treatment under reduced pressure) is performed as a step before forming the EL film 112Rf, EL film 112Gf, and EL film 112Bf, and the work is performed. It is preferable to remove impurities such as water adhering to the substrate 50.
  • the cluster 30E has a transfer chamber TF5 and atmospheric pressure process devices EAC1 to EAC9.
  • the transfer chamber TF5 has a transfer device 70e.
  • the transport device 70e is self-propelled and can move on the rail 77.
  • the normal pressure process devices EAC4 to EAC9 can be devices used in the lithography process.
  • the normal pressure process device EAC4 can be used as a resin (photoresist) coating device
  • the normal pressure process device EAC5 can be used as an exposure device
  • the normal pressure process device EAC6 can be used as a developing device.
  • the normal pressure process device EAC4 can be used as a resin (UV curable resin or the like) coating device
  • the normal pressure process device EAC5 can be used as a nanoimprint device
  • the normal pressure process device EAC6 can be used as a developing device. If the developing device is not used, another device may be assigned to the normal pressure process device EAC6.
  • the atmospheric pressure process devices EAC7 to EAC9 can be bake devices.
  • the baking device can pre-bake, post-bake, or post-wash the photoresist.
  • the cluster 20 has a block having a transfer chamber TF2 and vacuum process devices VC1 to VC11.
  • the transfer chamber TF2 has a transfer device 70b.
  • the transport device 70b is self-propelled and can move along the rail 73.
  • the vacuum process devices VC1 to VC3 can be a sputtering device for forming an insulating layer, a semiconductor layer (metal oxide or the like), a conductive layer, or the like.
  • each of the vacuum process devices VC1, VC2, and VC3 can be a dedicated device for forming each of the insulating layer, the semiconductor layer, and the conductive layer.
  • the vacuum process devices VC4 to VC6 can be dry etching devices that perform pattern formation, contact hole formation, and resist mask removal (ashing) of each layer after lithography.
  • a vacuum process device VC may be separately provided as an ashing device.
  • the vacuum process devices VC7 to VC9 are CVD devices for forming an insulating layer, a conductive layer, and the like.
  • a plasma CVD device can be used for forming the insulating film
  • thermal CVD using a raw material gas containing metal can be used for forming the conductive layer (metal).
  • the vacuum process device VC10 can be an ALD device. Since the ALD device has excellent step coverage, it can be used as a protective layer, a gate insulating layer, and the like. Further, the vacuum process device VC11 can be a plasma processing device. In the plasma processing apparatus, oxygen can be supplemented to the gate insulating layer, and the quality of the gate insulating layer can be improved. Further, when an OS transistor is used, oxygen can be supplemented to the channel forming region via the gate insulating layer.
  • the cluster 30 has a transfer chamber TF3 and atmospheric pressure process devices AC1 to AC9.
  • the transfer chamber TF3 has a transfer device 70e.
  • the transport device 70e is self-propelled and can move on the rail 74.
  • the normal pressure process devices AC4 to AC6 can be devices used in the lithography process.
  • the configuration of the normal pressure process devices AC4 to AC6 can be the same as that of the normal pressure process devices EAC4 to EAC6.
  • the normal pressure process devices AC7 to AC9 can be bake devices.
  • the baking device can pre-bake, post-bake, or post-wash the photoresist.
  • FIG. 18 shows an example in which the necessary equipment is embodied in the same manner as in FIG. 17 with the manufacturing equipment shown in FIG. 9 as the basic configuration.
  • the load / unload unit 10, the cluster 20, the cluster 30, and the cluster 30E can be configured in the same manner as shown in FIG. 17, and the configuration of the cluster 20E is enlarged, and the transfer chamber TF7 is integrated with the transfer chamber TF6. The point is different.
  • the configuration of the cluster 20 elements for performing batch processing of the substrate 60 described with reference to FIGS. 9 to 11 are provided, and the size of the transport device 70f2 is increased.
  • the configuration is such that the transport device 70f3 similar to the transport device 70f2 is provided, the transport device 70f3 may not be provided.
  • the vacuum process devices EVC12 to EVC14 are vacuum baking devices, they do not have to be compatible with a large format. Since the vacuum baking step is performed before the transfer jig is mounted on the substrate 60, the processing can be performed in units of the substrate 60.
  • Tables 1 and 2 show the processes and processing devices using the cluster 20E and the cluster 30E in the manufacturing apparatus shown in FIG. 17, the front and back of the substrate (up: face-up method, down: face-down method), and the elements corresponding to the above-mentioned manufacturing method. Summarize in. The description of the loading and unloading of the substrate to and from the load lock chamber LL2 and each device is omitted.
  • Table 1 shows a step after forming the pixel electrode 111 and before forming one kind of EL layer. Since the EL layer is formed by performing the relevant steps for each of R, G, and B, No. 1 in Table 1 is formed. 1 to No. The steps up to 16 will be performed three times.
  • step No. The replacement of the substrate transfer jig of 55 is performed in step No. It may be replaced with a jig 54 having an opening larger than the opening of the jig 54 worn in 50. This makes it possible to provide a protective layer that covers the ends of the common electrodes.
  • the manufacturing apparatus has the step No. 1 shown in Table 1. Step Nos. 1 to 2 shown in Table 2. It has a function to automatically process up to 59.
  • AC1 Normal pressure process equipment
  • AC2 Normal pressure process equipment
  • AC3 Normal pressure process equipment
  • AC4 Normal pressure process equipment
  • AC5 Normal pressure process equipment
  • AC6 Normal pressure process equipment
  • AC7 Normal pressure process equipment
  • AC8 Normal pressure process equipment
  • AC9 Normal pressure process equipment
  • EAC1 Normal pressure process equipment
  • EAC2 Normal pressure process equipment
  • EAC3 Normal pressure process equipment
  • EAC4 Normal pressure process equipment
  • EAC5 Normal pressure process equipment
  • EAC6 Normal pressure process equipment
  • EAC7 Normal pressure process equipment
  • EAC8 Normal pressure process equipment
  • EAC9 Normal pressure process equipment
  • EVC1 Vacuum process equipment
  • EVC2 Vacuum process equipment
  • EVC3 Vacuum process equipment
  • EVC4 Vacuum process equipment
  • EVC5 Vacuum process equipment
  • EVC6 Vacuum process equipment
  • EVC7 Vacuum process equipment
  • EVC8 Vacuum process equipment
  • EVC9 Vacuum process equipment
  • EVC10 Vacuum process equipment

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001102170A (ja) * 1999-07-23 2001-04-13 Semiconductor Energy Lab Co Ltd Ｅｌ表示装置の作製方法及び薄膜形成装置
JP2002158090A (ja) * 2000-09-08 2002-05-31 Semiconductor Energy Lab Co Ltd 発光装置とその作製方法及び薄膜形成装置
JP2005285576A (ja) * 2004-03-30 2005-10-13 Mitsubishi-Hitachi Metals Machinery Inc インライン式有機エレクトロルミネセンス製造装置
JP2017220410A (ja) * 2016-06-10 2017-12-14 株式会社ジャパンディスプレイ 積層膜の製造装置、及び積層膜の製造方法
JP2018022619A (ja) * 2016-08-04 2018-02-08 株式会社ジャパンディスプレイ 積層膜の製造装置、及び積層膜の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3654597B2 (ja) * 1993-07-15 2005-06-02 株式会社ルネサステクノロジ 製造システムおよび製造方法
US6017820A (en) * 1998-07-17 2000-01-25 Cutek Research, Inc. Integrated vacuum and plating cluster system
US9325007B2 (en) * 2009-10-27 2016-04-26 Applied Materials, Inc. Shadow mask alignment and management system
KR102141205B1 (ko) * 2013-08-16 2020-08-05 삼성디스플레이 주식회사 박막 봉지 제조 장치 및 이를 이용한 표시 장치의 제조 방법
KR102648517B1 (ko) * 2018-03-20 2024-03-15 도쿄엘렉트론가부시키가이샤 통합형 반도체 공정 모듈을 포함하는 자기 인식 및 보정 이종 플랫폼, 및 이를 사용하기 위한 방법
WO2022123381A1 (ja) * 2020-12-07 2022-06-16 株式会社半導体エネルギー研究所 発光デバイスの製造装置
US11860528B2 (en) * 2020-12-21 2024-01-02 Applied Materials, Inc. Multi-chamber substrate processing platform

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001102170A (ja) * 1999-07-23 2001-04-13 Semiconductor Energy Lab Co Ltd Ｅｌ表示装置の作製方法及び薄膜形成装置
JP2002158090A (ja) * 2000-09-08 2002-05-31 Semiconductor Energy Lab Co Ltd 発光装置とその作製方法及び薄膜形成装置
JP2005285576A (ja) * 2004-03-30 2005-10-13 Mitsubishi-Hitachi Metals Machinery Inc インライン式有機エレクトロルミネセンス製造装置
JP2017220410A (ja) * 2016-06-10 2017-12-14 株式会社ジャパンディスプレイ 積層膜の製造装置、及び積層膜の製造方法
JP2018022619A (ja) * 2016-08-04 2018-02-08 株式会社ジャパンディスプレイ 積層膜の製造装置、及び積層膜の製造方法

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