WO2015096391A1 - 阵列基板及其制作方法、显示装置 - Google Patents

阵列基板及其制作方法、显示装置 Download PDF

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Publication number
WO2015096391A1
WO2015096391A1 PCT/CN2014/078847 CN2014078847W WO2015096391A1 WO 2015096391 A1 WO2015096391 A1 WO 2015096391A1 CN 2014078847 W CN2014078847 W CN 2014078847W WO 2015096391 A1 WO2015096391 A1 WO 2015096391A1
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Prior art keywords
layer
quantum dot
insulating layer
array substrate
film transistor
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PCT/CN2014/078847
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English (en)
French (fr)
Inventor
舒适
谷敬霞
徐传祥
齐永莲
姚琪
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京东方科技集团股份有限公司
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Priority to US14/428,847 priority Critical patent/US9455414B2/en
Publication of WO2015096391A1 publication Critical patent/WO2015096391A1/zh

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    • H—ELECTRICITY
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133617—Illumination with ultraviolet light; Luminescent elements or materials associated to the cell
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/15—Hole transporting layers
    • H—ELECTRICITY
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/16—Electron transporting layers
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/813—Anodes characterised by their shape
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
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    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
    • G02F1/017—Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
    • G02F1/01791—Quantum boxes or quantum dots
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • Embodiments of the present disclosure relate to an array substrate, a method of fabricating the same, and a display device. Background technique
  • TFT-LCD Thin Film Transistor-Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • the TFT-LCD or the OLED is filtered by a color filter layer such as a red color filter layer, a green color filter layer, and a blue color filter layer, and the white light emitted from the light source is converted into red, green, blue, and the like.
  • a color filter layer such as a red color filter layer, a green color filter layer, and a blue color filter layer
  • Monochromatic light, different color filter layers respectively transmit light corresponding to different color bands, thereby realizing color display of TFT-LCD or OLED.
  • An object of an embodiment of the present disclosure is to provide an array substrate, a method of fabricating the same, and a display device capable of improving a display color gamut range and a light transmittance of a display device without increasing power consumption of the display device.
  • At least one embodiment of the present disclosure provides an array substrate including an array-arranged thin film transistor unit, further including a quantum dot layer over the thin film transistor unit, the quantum dot layer At least three quantum dots are included, and any one of the quantum dots is irradiated with light from the incident light of the array substrate to emit light of a corresponding wavelength band.
  • the quantum dot layer includes a red quantum dot region, a blue quantum dot region, and a green quantum dot region.
  • the quantum dots in the quantum dot layer are semiconductor nanocrystals, which are composed of at least a combination of a cadmium, a cadmium, a selenium, and a gram atom.
  • the array substrate includes: a base substrate, a thin film transistor unit, a first insulating layer, a second insulating layer, a quantum dot layer, and a first conductive layer, wherein the first insulating layer a first via hole is disposed, the second insulating layer is provided with a second via hole, the quantum dot layer is provided with a third via hole, the first via hole, the second via hole and the third The via holes communicate, and the first conductive layer is connected to the drain of the thin film transistor unit through the third via, the second via, and the first via.
  • the array substrate further includes a color filter layer, wherein the color filter layer is far from the light entrance of the array substrate, wherein the color filter is The layer includes a red color filter area i or a blue color filter area i or a green color filter area, the red color filter area corresponding to the red quantum dot area of the quantum dot layer, the blue color filter The region corresponds to a blue quantum dot region of the quantum dot layer, and the green color filter region corresponds to a green quantum dot region of the quantum dot layer.
  • the array substrate further includes a second conductive layer, and a third insulating layer disposed between the first conductive layer and the second conductive layer.
  • the second conductive layer is in a slit shape
  • the first conductive layer is in a plate shape or a slit shape
  • the array substrate further includes a fourth insulating layer, an organic layer, and a third conductive layer over the first conductive layer, the fourth insulating layer has an opening, and the organic layer passes The opening contacts the first conductive layer.
  • the organic layer includes a hole transport layer, a light emitting layer, and an electron transport layer.
  • the array substrate further includes a black matrix located above the thin film transistor unit.
  • the white light or other light provided by the display device first enters the quantum dot layer, and the quantum dots in the quantum dot layer are excited to emit mixed light including red light, green light, and blue light, and then the mixed light enters the filter.
  • the color filter layer, the color filter regions of different colors in the color filter layer filter out different colors of light. Since the color purity of the monochromatic light emitted by the quantum dots is high, it is not necessary to increase the color purity of the color filter layer, thereby improving the color gamut range and light transmission of the display device without increasing the light output intensity of the light source of the display device. rate.
  • At least one embodiment of the present disclosure provides a display device including any of the above arrays Substrate.
  • At least one embodiment of the present disclosure provides a method of fabricating an array substrate, including: forming a pattern of each layer structure including a thin film transistor unit on a substrate;
  • a quantum dot layer comprising at least three quantum dots is formed over the thin film transistor unit, wherein any one of the quantum dots is excited by light from the incident light of the array substrate to emit light of a corresponding wavelength band.
  • the method further includes:
  • Forming a quantum dot layer including at least three quantum dots on the thin film transistor unit includes:
  • Forming a quantum dot layer over the second insulating layer developing the protrusion to remove a quantum dot layer at the protrusion and a second insulating layer under the protrusion, forming a third via of the quantum dot layer and a second via hole of the second insulating layer, the third via hole, the second via hole and the first via hole are in communication;
  • a pattern including the first conductive layer is formed over the quantum dot layer.
  • the method further includes:
  • Forming a quantum dot layer including at least three quantum dots on the thin film transistor unit includes:
  • a first via corresponding to a drain of the thin film transistor unit in the first insulating layer, the third via, the second via, and the The first vias are in communication; a pattern including the first conductive layer is formed over the quantum dot layer.
  • the manufacturing method further includes:
  • a color filter layer is formed, wherein the color filter layer is farther from the entrance light of the array substrate than the quantum dot layer.
  • the manufacturing method further includes: forming a third insulating layer and a second conductive layer on the first conductive layer, wherein the third insulating layer is located in the first conductive layer and the first Between two conductive layers.
  • the manufacturing method further includes:
  • Forming a fourth insulating layer on the first conductive layer the fourth insulating layer has an opening; forming an organic layer on the fourth insulating layer, the organic layer passing through the opening and the first conductive layer Contact
  • a third conductive layer is formed on the organic layer.
  • the manufacturing method further includes: forming a pattern including a black matrix over the thin film transistor unit.
  • FIG. 1 is a schematic structural view 1 of an array substrate according to an embodiment of the present disclosure
  • FIG. 2 is a second schematic structural view of an array substrate according to an embodiment of the present disclosure.
  • FIG. 3 is a schematic structural view 3 of an array substrate according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic structural view 4 of an array substrate according to an embodiment of the present disclosure.
  • FIG. 5 is a schematic structural view 5 of an array substrate according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic structural view 6 of an array substrate according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic structural view 7 of an array substrate according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic structural diagram VIII of an array substrate according to an embodiment of the present disclosure
  • FIG. 9 is a schematic structural view IX of an array substrate according to an embodiment of the present disclosure
  • FIG. 10 is a schematic structural view of an array substrate according to an embodiment of the present disclosure.
  • FIG. 11 is a schematic structural view 11 of an array substrate according to an embodiment of the present disclosure. detailed description
  • the inventors have found that if it is necessary to expand the color gamut of the LCD or OLED, it is necessary to increase the color purity of the color filter layer, but this will reduce the light transmittance of the color filter layer. In order to ensure the display brightness of the TFT-LCD or OLED, it is also necessary to increase the intensity of the light output from the light source, resulting in an increase in the power consumption of the TFT-LCD or the OLED.
  • At least one embodiment of the present disclosure provides an array substrate including a thin film transistor unit 2 arrayed on a substrate, and a quantum dot layer on the thin film transistor unit 2 3.
  • the quantum dot layer 3 includes at least three kinds of quantum dots, and any one of the quantum dots is irradiated and excited by light from the incident light of the array substrate to emit light of a corresponding wavelength band.
  • Quantum dots are extremely tiny semiconductor nanocrystals that are invisible to the naked eye. They are composed of a combination of words, cadmium, selenium and gram atoms. The diameter of the particles in the crystal is usually less than 10 nm. It has a distinctive feature: it emits light when excited by electricity or light, producing a solid color of light. The color of the emitted light is determined by the composition, size and shape of the quantum dots. The smaller the size of the quantum dot, the more the light generated by the excitation is biased toward blue light. The larger the size of the quantum dot, the more the light generated by the excitation is biased toward red light. According to the actual situation, the size of the quantum dots can be adjusted to obtain different colors of light.
  • the quantum dot layer 3 includes a red quantum dot emitting red light, a green quantum dot emitting green light, and a blue quantum dot emitting blue light.
  • the red quantum dot has a size of 8-1 Onm, and the red light emits a wavelength of 610 nm to 620 nm;
  • the green quantum dot has a size of 5 to 7 nm, and the emitted green light has a wavelength of 540 nm to 550 nm;
  • the size of the quantum dots is 3 to 5 ⁇ , and the wavelength of the blue light emitted is 475 nm to 485 nm.
  • the wavelength range of the light of each color excited by the quantum dots in the embodiment of the present disclosure can be made narrower, that is, the color of the light of each color is relatively pure.
  • the array substrate includes a quantum dot layer. If the light emitting structure (for example, the backlight) of the display device is located on the substrate substrate side of the array substrate, the path of the light in the array substrate is as shown in FIG. The dotted arrow in 1 is shown. After the white light enters the quantum dot layer, each quantum dot is excited by light. Correspondingly, the red quantum dot emits pure red light, the green quantum dot emits pure green light, and the blue quantum dot emits pure blue light, that is, the quantum dot layer 3 Under the excitation of white light or other light, a mixture of red, green and blue light is emitted.
  • the light emitting structure for example, the backlight
  • the color filter layer includes a red color filter region, a green filter region, and a blue filter region, and the red filter region allows only red light in the mixed light to pass, and absorbs the green light and the blue light; similarly, The green color filter area only allows the green light in the mixed light to pass, and absorbs the red and blue light; the blue color filter area allows only the blue light in the mixed light to pass.
  • the final light can be ensured without increasing the color purity of the color filter layer on the color filter substrate.
  • the saturation and the color purity are high, so that the light transmittance of the color filter layer can be ensured, thereby ensuring the display brightness of the display device.
  • the red color filter area of the substrate in the embodiment of the present disclosure emits pure red light
  • the green color filter area emits pure green light
  • the blue color filter area emits pure blue light. It is apparent that the color of light emitted from the substrate in the embodiment of the present disclosure is relatively high, and therefore, the display device including the substrate can provide a wider variety of colors having a larger color gamut.
  • the white light or other light provided by the light source first enters the quantum dot layer, and the quantum dots in the quantum dot layer are excited to emit mixed light including red light, green light, and blue light, and then the mixed light enters the color filter.
  • Layers, different color filter areas in the color filter layer filter out different colors of light. Since the color purity of the monochromatic light emitted from the quantum dots is high, it is not necessary to increase the color purity of the color filter layer, thereby increasing the color gamut range of the display device without increasing the light output intensity of the light source of the display device.
  • the array substrate includes: a substrate substrate 1, a thin film transistor unit 2, and a first insulation. a layer 4, a second insulating layer 5, a quantum dot layer 3, and a first conductive layer 6, wherein the first insulating layer 4 is provided with a first via hole 14, and the second insulating layer 5 is provided with a second via hole
  • the quantum dot layer 3 is provided with a third via hole 16 , the first via hole 14 , the second via hole 15 and the third via hole 16 are in communication with each other, and corresponds to the thin film transistor unit 1
  • the drain electrode 25 is connected to the drain 25 of the thin film transistor unit 1 through the third via 16, the second via 15, and the first via 14.
  • the base substrate 1 can be made of a common transparent material such as glass or quartz; the gate electrode 21 can be made of a single layer of a metal such as molybdenum, aluminum, tungsten, titanium, or copper, or a single layer of one of its alloys, It may be made of a multilayer stack of the above metals or alloys; similarly, the source 24 or the drain 25 may be made of a single layer of a metal such as molybdenum, aluminum, tungsten, titanium, copper or the like, or a single layer of one of its alloys. Alternatively, it may be formed by laminating a plurality of layers of the above metals or alloys.
  • the active layer 23 may be formed of a common semiconductor material such as amorphous silicon, polycrystalline silicon or indium gallium oxide; the first conductive layer 6 may be a common transparent conductive material such as indium tin oxide or indium oxide.
  • the first conductive layer 6 is connected to the drain electrode 25 of the thin film transistor unit 1, and the conductive layer 6 corresponds to the pixel electrode of the array substrate.
  • the first insulating layer 4 is also commonly referred to as a passivation layer, and the passivation layer process not only improves the ability of the display device to withstand harsh environments, but also contributes to improving the photoelectric performance of the thin film transistor unit 1.
  • the passivation layer is usually formed of an insulating material such as silicon oxide, silicon nitride, hafnium oxide, or resin.
  • the second insulating layer 5, also called a flat layer, is used to planarize the surface of the substrate, facilitating subsequent fabrication and processing of the array substrate.
  • the quantum dot layer 3 is located between the first conductive layer 6 and the second insulating layer 5 .
  • the quantum dot layer 3 may also be located on the first insulating layer 4 and the second insulating layer 5 . Between the two layers of the array substrate, as shown in FIG. 2, the embodiments of the present disclosure do not limit this.
  • the array substrate shown in FIG. 1 or FIG. 2 is an array substrate of a twisted nematic (TN) mode.
  • the structure of the array substrate shown in Fig. 1 is changed.
  • the array substrate shown in FIG. 3 further includes a second conductive layer 8 on the basis of the array substrate shown in FIG. 1 , and a portion between the first conductive layer 6 and the second conductive layer 8
  • the third insulating layer 7 and the second conductive layer 8 cooperate with the first conductive layer 6 to jointly drive the rotation of the liquid crystal molecules in the liquid crystal layer, that is, the second conductive layer 8 is a common electrode.
  • the array substrate is an array substrate of an Advanced Super Dimension Switch (ADS) mode based on the COA process.
  • ADS Advanced Super Dimension Switch
  • ADS Advanced Super Dimension Switch
  • the core technical characteristics are described as follows: The electric field generated by the edge of the slit electrode in the same plane and the electric field generated between the slit electrode layer and the plate electrode layer form a multi-dimensional electric field, so that the slit electrode between the liquid crystal cell and the electrode directly above The aligned liquid crystal molecules are capable of rotating, thereby improving the liquid crystal working efficiency and increasing the light transmission efficiency.
  • Advanced super-dimensional field conversion technology can improve the picture quality of TFT-LCD products, with high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, push mura, etc. advantage.
  • ADS technology has improved high-transmission I-ADS technology, high aperture ratio H-ADS and high-resolution S-ADS technology.
  • the second conductive layer 8 and the third insulating layer 7 may be formed on the structure of the array substrate shown in FIG. 2 to form an array substrate of the ADS mode, which will not be described herein.
  • the first conductive layer 6 serving as the pixel electrode of the above embodiment may be in the form of a plate or a slit, as is the second conductive layer 8 serving as a common electrode.
  • FIG. 1 shows the structure in which the pixel electrode is on the lower side and the common electrode, in practice, the positional relationship between the pixel electrode and the common electrode is interchangeable, but the upper electrode should be slit-shaped, under The electrode may be a plate electrode or a slit.
  • a color filter layer and a thin film transistor as a driving switch are formed on different substrates and located on both sides of the liquid crystal layer.
  • this arrangement causes a decrease in the aperture ratio of the display panel, thereby affecting Display panel brightness and picture quality.
  • the market demand for the aperture ratio and brightness of display panels has increased.
  • the industry has developed a technology in which a color filter layer is directly formed on an array substrate (Color Filter On Array, COA for short).
  • the color filter layer and the thin film transistor are formed on one substrate, which not only can increase the aperture ratio of the display panel, increase the brightness of the display panel, but also avoid the problems caused by forming the color filter layer and the thin film transistor on different substrates.
  • the array substrate further includes a color filter layer 9, and the color filter layer 9 is away from the light incident portion of the array substrate as compared with the quantum dot layer 3. Therefore, it can be ensured that the light provided by the display device first enters the quantum dot layer 3, and the quantum dots in the quantum dot layer 3 are excited to emit light, and the mixed light emitted by the quantum dots is filtered by the color filter layer 9 to provide a display device. Display the desired monochromatic light.
  • the color filter layer 9 includes a plurality of color filter regions, and any of the color filter regions has only one color, corresponding to the light exit region of the pixel unit, and the light exit region, that is, the region between the two thin film transistor units. , that is, from FIG. 4, any of the color filter regions are disposed in the two thin film transistor units 1 between.
  • the color filter layer 9 on the second insulating layer 5 should be processed such that the color filter layer 9 is provided with a fourth via hole 17 communicating with the second via hole 15 and the first via hole 14, Then, the first conductive layer 6 may be connected to the drain 25 through the fourth via 17, the second via 15, and the first via 14.
  • the array substrate shown in Fig. 4 can also be processed to form a third insulating layer 7 and a second conductive layer 8 on the first conductive layer 6, forming an ADS array substrate of COA technology as shown in Fig. 6.
  • the quantum dot layer includes a red quantum dot region, a blue quantum dot region, and a green quantum dot region, and correspondingly, the color filter layer a red color filter region, a blue color filter region, and a green color filter region, wherein the red color filter region corresponds to a red quantum dot region of the quantum dot layer, and the blue color filter region corresponds to the quantum dot A blue quantum dot region of the layer is disposed, and the green color filter region is disposed corresponding to a green quantum dot region of the quantum dot layer.
  • each of the quantum dot regions corresponding to the color of one sub-pixel can be excited by the backlight to emit a monochromatic light, which can be finally transparent compared to the mixed light of red, green and blue light.
  • the rate of increase is increased.
  • the array substrate shown in FIG. 4 can be processed.
  • the substrate further includes a fourth insulating layer 10, an organic layer 11, and a third conductive layer above the first conductive layer 6.
  • the fourth insulating layer 10 has an opening 18, the organic layer 11 is connected to the first conductive layer 6 through the opening 18, and the first conductive layer 6 and the third conductive layer 12 are co-driven
  • the organic layer 11 emits light, that is, the array substrate at this time is an array substrate of an Organic Light-Emitting Diode (OLED) mode.
  • OLED Organic Light-Emitting Diode
  • the organic layer 11 includes a hole transport layer, a light emitting layer and an electron transport layer.
  • the voltage between the first conductive layer 6 and the third conductive layer 12 is appropriate, the holes in the hole transport layer and the electron transport layer The electrons recombine in the luminescent layer to cause the luminescent layer to occur.
  • the electron transport layer and the hole transport layer of the organic light-emitting diode should be different organic materials or only organic impurities which are different in doping impurities. material.
  • the materials most commonly used to make electron transport layers must have high film stability, thermal stability, and good electron transport properties.
  • fluorescent dye compounds such as oxadiazole derivatives and naphthalene ring derivatives are generally used. 1-naphthyl, 3-decylphenyl, and the like.
  • the material of the hole transport layer belongs to an aromatic amine fluorescent compound such as an organic material such as 1-naphthyl.
  • the material of the organic layer 11 must have characteristics of strong fluorescence in a solid state, good carrier transport performance, good thermal stability and chemical stability, high quantum efficiency, and vacuum evaporation, for example, octahydroxyquinoline aluminum can be used.
  • the organic layer 11 is selected to use a material capable of emitting white light.
  • the third conductive layer 12 that cooperates with the first conductive layer 6 to drive the organic layer 11 to emit light may use a lower cost and opaque material such as aluminum.
  • the light emitted from the organic layer 11 can be made to enter the array substrate substantially (as indicated by the dotted arrow in FIG. 7), and the utilization ratio of the light emitted from the organic layer 11 is increased. At the same time, it is also possible to prevent the light emitted from the organic layer 11 from being discolored by the conductive layer, thereby ensuring the display effect of the display device.
  • the fourth insulating layer 10 may be disposed on a region of the first conductive layer 6 that does not need to emit light (for example, a corresponding region of the thin film transistor unit 1).
  • the first conductive layer 6 and the organic layer 11 are insulated to prevent the organic layer 11 of the region from emitting light; and in the region where light is required, that is, the sub-pixel region, the organic layer 11 is provided by providing the opening 18 on the fourth insulating layer 10
  • the first conductive layer 6 is connected through the opening 18.
  • the fourth insulating layer 10 is also referred to as a pixel defining layer, and the sub-pixel region is defined to define a light-emitting region, wherein the region corresponding to the opening 18 is a light-emitting region, and the region covered by the fourth insulating layer 10 does not emit light.
  • the thin film transistor unit 1 in the schematic diagram of the array substrate provided by the embodiment of the present disclosure is a bottom gate type thin film transistor unit
  • a top gate type thin film transistor unit may also be selected, and the implementation of the present disclosure This example does not limit this.
  • the display device may be a product or component having any display function, such as a liquid crystal panel, an electronic paper, an OLED panel, a liquid crystal television, a liquid crystal display, a digital photo frame, a mobile phone, a tablet computer, or the like.
  • Embodiment 2 At least one embodiment of the present disclosure further provides a method for fabricating the above array substrate, the method comprising:
  • Step S101 forming a pattern of each layer structure including the thin film transistor unit on the base substrate.
  • Step S102 forming a quantum dot layer including at least three kinds of quantum dots on the thin film transistor unit, wherein any one of the quantum dots is excited by light from the incident light of the array substrate to emit light of a corresponding wavelength band.
  • the thin film transistor unit 2 includes, in order from bottom to top, a gate electrode 21, a gate insulating layer 22 over the gate electrode 21, and an active layer 23 over the gate insulating layer 22, thus At the time of fabrication, the gate electrode 21, the gate insulating layer 22, and the active layer 23 are sequentially formed on the array substrate.
  • a structure such as a gate line (not shown) on the base substrate 1 is integrally formed.
  • the thin film transistor unit 2 further includes a source 21 and a drain 25 in addition to the above-described structures of the gate electrode 21, the gate insulating layer 22, the active layer 23 and the like.
  • the source 21 and the drain 25 of the thin film transistor unit 2 are disposed in the same layer, so that the source 21 can be formed while forming the drain 25.
  • the source 21 and the drain 25 are disposed in different layers, it may be considered that the source 21 is formed before or after the drain 25 is formed according to the actual situation, which is not limited in the embodiment of the present disclosure.
  • the thin film transistor unit 2 Since the thin film transistor unit 2 has the above-described multilayer structure, each layer of the thin film transistor unit 2 is required to be placed in the etching gas or the etching liquid as a whole. Therefore, if the quantum dot layer 3 is provided Under the thin film transistor unit 2, there is no guarantee that the quantum dot layer 3 is still intact after being etched by a plurality of etching gases or etching liquids. Therefore, the quantum dot layer 3 should be fabricated after the thin film transistor unit is fabricated.
  • the manufacturing method further includes: Step S201 , forming a first insulating layer on the thin film transistor unit, and patterning the first insulating layer a process of forming a first via corresponding to a drain of the thin film transistor unit.
  • step S201 an array substrate as shown in Fig. 8 is formed.
  • Step S202 forming a second insulating layer on the first insulating layer, and patterning the second insulating layer to form a protrusion corresponding to the first via hole.
  • step S202 an array substrate as shown in Fig. 9 is formed.
  • the second insulating layer 5 can be made of a positive photoresist, and the first exposure is performed by using a halftone mask. After development, a protrusion corresponding to the first via hole 14 is formed.
  • Step S203 exposing the protrusions.
  • step S102 includes:
  • Step S204 forming a quantum dot layer over the second insulating layer, developing the protrusion to remove the quantum dot layer at the protrusion and the second insulating layer under the protrusion, and forming the quantum dot layer in the quantum dot layer a third via hole and a second via hole disposed in the second insulating layer, wherein the third via hole, the second via hole and the first via hole communicate with each other.
  • the second insulating layer 5 at the protrusion of the corresponding region of the quantum dot layer 3 to be removed is exposed first.
  • the treatment, the exposure time and the exposure light intensity are appropriately adjusted, so that the second insulating layer 5 at the protrusion is exposed; after that, the quantum dot layer 3 is formed by deposition or the like, and the quantum dot layer 3 covers the entire second insulating layer. 5, as shown in FIG. 10, at this time, the array substrate is developed, and since the second insulating layer 5 is made of a positive photoresist, the second insulating layer 5 at the exposed protrusions is removed. At the same time, the quantum dot layer 3 overlying the protrusions is also removed, forming a third via 16 disposed in the quantum dot layer 3 and a second via 15 disposed in the second insulating layer 5, as shown in FIG. Shown.
  • step S204 the method further includes:
  • Step S205 forming a pattern including the first conductive layer above the quantum dot layer.
  • the first conductive layer 6 can be connected to the drain 25 of the thin film transistor unit 2, that is, the first conductive layer 6 corresponds to the pixel of the array substrate. electrode.
  • the first via hole 14 of the first insulating layer 4 is formed by a patterning process performed immediately after the formation of the first insulating layer 4.
  • the first via hole 14 may also be formed by using the second insulating layer 5 as a mask after forming the second via hole 15 and the third via hole 16 , and the method includes the following steps: Step S301 : forming a thin film transistor unit First insulating layer;
  • Step S302 forming a second insulating layer over the first insulating layer, and patterning the second insulating layer to form a protrusion corresponding to a drain of the thin film transistor unit;
  • Step S303 exposing the protrusions.
  • Step S102 includes: Step S304, forming a quantum dot layer over the second insulating layer, and developing the protrusion to remove the quantum dot layer at the protrusion and the second insulating layer under the protrusion to form a third layer of the quantum dot layer a via hole and a second via hole of the second insulating layer, wherein the third via hole and the second via hole are in communication;
  • Step S305 forming a first via corresponding to a drain of the thin film transistor unit in the first insulating layer by using the second insulating layer as a mask, the third via, the second via, and The first vias are in communication;
  • Step S306 forming a pattern including the first conductive layer above the quantum dot layer.
  • the array substrate as shown in Fig. 2 can also be formed.
  • the method of fabricating the array substrate shown in Fig. 3 can be inferred. It should be noted that, since the quantum dot layer 3 in FIG. 3 is located between the first insulating layer 4 and the second insulating layer 5, in order to form the pattern of the quantum dot layer 3, it is necessary to use the halftone mask to the first layer.
  • the insulating layer 4 is subjected to two patterning processes. Therefore, the first insulating layer 4 can be selected with a positive photoresist at this time. It should be noted that when the first exposure layer 4 is subjected to the second exposure, the exposed light should be controlled. The strength and time allow the first insulating layer 4 to completely cover the structure of the thin film transistor unit 2, the data line (not shown), and the like after being developed.
  • a fifth insulating layer may be formed between the first insulating layer 4 and the quantum dot layer 3, and a pattern of the quantum dot layer 3 is formed by a patterning process of the fifth insulating layer, which will not be described herein.
  • the manufacturing method further includes:
  • a color filter layer is formed, wherein the color filter layer is farther from the entrance light of the array substrate than the quantum dot layer.
  • the color filter layer 9 should be placed between the quantum dot layer 3 and the substrate substrate 1, such as 4; if the light provided by the display device is incident from the substrate substrate 1 side of the array substrate, the color filter layer 9 should be placed above the quantum dot layer 3, as shown in FIG.
  • the first via hole 14 in Fig. 4 may be formed before or after the color filter layer 9 is formed, which is not limited in the present embodiment.
  • a third insulating layer 7 and a second conductive layer 8 may be formed, and the third insulating layer 7 is located in the first conductive layer 6 and the second conductive layer 8.
  • the second conductive layer 8 is equivalent to the matching A common electrode of a conductive layer 6, as shown in FIG.
  • the first conductive layer 6 serving as the pixel electrode of the above embodiment may be in the form of a plate or a slit, as is the second conductive layer 8 serving as a common electrode.
  • the pixel electrode shown in FIG. 2 is on the bottom and the common electrode is on, in practice, the position of the pixel electrode and the common electrode may be reversed, but the upper electrode should be slit-shaped, and the lower electrode may be Plate electrode. However, sometimes the upper and lower electrodes are slit-like.
  • the third insulating layer 7 and the second conductive layer 8 may also be formed on the basis of the array substrate shown in FIG. 2, FIG. 4 or FIG. 5, and details are not described herein again.
  • the organic layer 11 and the like are added to form an array substrate of the OLED mode shown in FIG.
  • the method includes:
  • Step S401 forming a fourth insulating layer on the first conductive layer, the fourth insulating layer having an opening thereon;
  • Step S402 forming an organic layer on the fourth insulating layer, the organic layer contacting the first conductive layer through the opening;
  • Step S403 forming a third conductive layer on the organic layer.
  • the black matrix 13 needs to be disposed on the array substrate.
  • a pattern including the black matrix 3 is formed over the thin film transistor unit 2. , as shown in Figure 7.
  • the thin film transistor unit formed in the embodiment of the present disclosure may be a bottom gate type thin film transistor unit or a top gate type thin film transistor unit, which is not limited in the embodiment of the present disclosure.

Abstract

一种阵列基板、其制作方法以及显示装置。该种阵列基板，包括阵列式排布的薄膜晶体管单元（2），还包括位于所述薄膜晶体管单元（2）之上的量子点层（3），所述量子点层包括至少三种量子点，任一种量子点受到来自所述阵列基板的入光处的光照激发出相应波段的光。该阵列基板能够在不增加显示装置的功耗的同时，提高显示装置的色域范围、透光率。

Description

阵列基板及其制作方法、 显示装置 技术领域
本公开的实施例涉及一种阵列基板及其制作方法、 显示装置。 背景技术
近年来， 随着科技的发展， 液晶显示器技术也随之不断完善。 薄膜场效 应晶体管液晶显示装置 （Thin Film Transistor-Liquid Crystal Display, 简称 TFT-LCD ) 以其图像显示品质好、 能耗低、 环保等优势占据着显示器领域的 重要位置。近几年兴起的基于有机发光二极管（ Organic Light-Emitting Diode, 简称 OLED ) 的显示技术也日益成熟， 其构造简单， 厚度薄， 响应速度快， 可以实现更加丰富的色彩。
TFT-LCD或 OLED均利用其内部设置的红色滤色层、绿色滤色层、以及 蓝色滤色层等滤色器层进行滤光， 将光源发出的白光分别转化为红、 绿、 蓝 等单色光， 不同颜色的滤色器层分别透射对应不同颜色的波段的光， 从而实 现 TFT-LCD或 OLED的彩色显示。 发明内容
本公开的实施例的目的之一在于提供一种阵列基板及其制作方法、 显示 装置， 能够在不增加显示装置的功耗的同时，提高显示装置的显示色域范围、 透光率。
为实现上述技术目的， 本公开的至少一个实施例提供了一种阵列基板， 包括阵列式排布的薄膜晶体管单元， 还包括位于所述薄膜晶体管单元之上的 量子点层， 所述量子点层包括至少三种量子点， 任一种量子点受到来自所述 阵列基板的入光处的光的照激而发出对应波段的光。
根据本公开的一个实施例， 所述量子点层包括红色量子点区域、 蓝色量 子点区域和绿色量子点区域。
根据本公开的一个实施例，所述量子点层中的量子点为半导体纳米晶体， 至少由辞、 镉、 硒和石克原子组合而成。 根据本公开的一个实施例， 所述阵列基板依次包括： 衬底基板、 薄膜晶 体管单元、 第一绝缘层、 第二绝缘层、 量子点层和第一导电层， 其中， 所述 第一绝缘层设置有第一过孔， 所述第二绝缘层设置有第二过孔， 所述量子点 层设置有第三过孔， 所述第一过孔、 所述第二过孔和所述第三过孔相通， 所 述第一导电层通过所述第三过孔、 所述第二过孔和所述第一过孔连接到所述 薄膜晶体管单元的漏极。
根据本公开的一个实施例， 所述阵列基板还包括滤色器层， 所述滤色器 层与所述量子点层相比， 远离所述阵列基板的入光处， 其中， 所述滤色器层 包括红色滤色区 i或、 蓝色滤色区 i或和绿色滤色区域， 所述红色滤色区戈对应 于所述量子点层的红色量子点区域设置， 所述蓝色滤色区域对应于所述量子 点层的蓝色量子点区域设置， 所述绿色滤色区域对应于所述量子点层的绿色 量子点区域设置。
根据本公开的一个实施例， 所述阵列基板还包括第二导电层， 以及设置 在所述第一导电层和所述第二导电层之间的第三绝缘层。
根据本公开的一个实施例， 所述第二导电层为狭缝状， 所述第一导电层 为板状或者狭缝状。
根据本公开的一个实施例， 所述阵列基板还包括位于所述第一导电层上 方的第四绝缘层、 有机层和第三导电层， 所述第四绝缘层具有开口， 所述有 机层通过所述开口接触所述第一导电层。
根据本公开的一个实施例， 所述有机层包括空穴传输层、 发光层与电子 传输层。
根据本公开的一个实施例， 所述阵列基板还包括位于所述薄膜晶体管单 元之上的黑矩阵。
在本公开的实施例中， 显示装置提供的白光或其他光线首先进入量子点 层， 激发量子点层中的量子点发出包括红光、 绿光和蓝光在内的混合光， 之 后混合光进入滤色器层， 滤色器层中的不同颜色的滤色器区域滤出不同颜色 的光。 由于量子点发出的单色光的色彩纯度较高， 因此无需提高滤色器层的 色彩纯度， 从而在不增加显示装置的光源的出光强度的同时， 提高了显示装 置的色域范围和透光率。
本公开的至少一个实施例提供了一种显示装置， 包括上述的任一种阵列 基板。
本公开的至少一个实施例提供了一种阵列基板的制作方法， 包括： 在衬底基板上形成包括薄膜晶体管单元的各层结构的图形；
在所述薄膜晶体管单元之上形成包括至少三种量子点的量子点层，其中， 任一种量子点受到来自所述阵列基板的入光处的光照激发出对应波段的光。
在本公开的一个实施例中， 所述形成包括薄膜晶体管单元的各层结构的 图形之后， 还包括：
在所述薄膜晶体管单元之上形成第一绝缘层， 对所述第一绝缘层进行构 图工艺， 形成对应于所述薄膜晶体管单元的漏极的第一过孔；
在所述第一绝缘层之上形成第二绝缘层， 对所述第二绝缘层进行构图工 艺， 形成对应于所述第一过孔的突起；
对所述突起进行曝光；
所述在所述薄膜晶体管单元之上形成包括至少三种量子点的量子点层包 括：
在所述第二绝缘层上方形成量子点层， 对所述突起进行显影以去除所述 突起处的量子点层和突起下方的第二绝缘层， 形成所述量子点层的第三过孔 和所述第二绝缘层的第二过孔， 所述第三过孔、 所述第二过孔和所述第一过 孔相通； 以及
在所述量子点层上方形成包括第一导电层的图形。
在本公开的一个实施例中， 所述形成包括薄膜晶体管单元的各层结构的 图形之后， 还包括：
在所述薄膜晶体管单元之上形成第一绝缘层；
在所述第一绝缘层之上形成第二绝缘层， 对所述第二绝缘层进行构图工 艺， 形成对应于所述薄膜晶体管单元的漏极的突起；
对所述突起进行曝光；
所述在所述薄膜晶体管单元之上形成包括至少三种量子点的量子点层包 括：
在所述第二绝缘层上方形成量子点层， 对所述突起进行显影以去除所述 突起处的量子点层和突起下方的第二绝缘层， 形成设置在所述量子点层中的 第三过孔和设置在所述第二绝缘层中的第二过孔， 所述第三过孔和所述第二 过孔相通；
以所述第二绝缘层为掩膜， 在第一绝缘层中形成对应于所述薄膜晶体管 单元的漏极的第一过孔，所述第三过孔、所述第二过孔和所述第一过孔相通； 在所述量子点层上方形成包括第一导电层的图形。
本公开的一个实施例中， 所述的制作方法还包括：
形成滤色器层， 其中， 所述滤色器层与所述量子点层相比， 远离所述阵 列基板的入光处。
本公开的一个实施例中， 所述的制作方法还包括： 在第一导电层上形成 第三绝缘层和第二导电层， 所述第三绝缘层位于所述第一导电层和所述第二 导电层之间。
本公开的一个实施例中， 所述的制作方法， 还包括：
在所述第一导电层上形成第四绝缘层， 所述第四绝缘层具有开口； 在所述第四绝缘层上形成有机层， 所述有机层通过所述开口与所述第一 导电层接触；
在所述有机层上形成第三导电层。
本公开的一个实施例中， 所述的制作方法还包括： 在所述薄膜晶体管单 元上方形成包括黑矩阵的图形。 附图说明
为了更清楚地说明本公开实施例的技术方案， 下面将对实施例的附图作 简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例， 而非对本公开的限制。
图 1是根据本公开实施例的阵列基板的结构示意图一；
图 2是根据本公开实施例的阵列基板的结构示意图二；
图 3是根据本公开实施例的阵列基板的结构示意图三；
图 4是根据本公开实施例的阵列基板的结构示意图四；
图 5是根据本公开实施例的阵列基板的结构示意图五；
图 6是根据本公开实施例的阵列基板的结构示意图六；
图 7是根据本公开实施例的阵列基板的结构示意图七；
图 8是根据本公开实施例的阵列基板的结构示意图八； 图 9是根据本公开实施例的阵列基板的结构示意图九；
图 10是根据本公开实施例的阵列基板的结构示意图十； 以及
图 11是根据本公开实施例的阵列基板的结构示意图十一。 具体实施方式
为使本公开实施例的目的、 技术方案和优点更加清楚， 下面将结合本公 开实施例的附图， 对本公开实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本公开的一部分实施例， 而不是全部的实施例。 基于所描 述的本公开的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本公开保护的范围。
发明人发现， 若需要扩大 LCD或 OLED的色域范围， 需要提高滤色器 层的色彩纯度， 但这样会降低滤色器层的透光率。 为了保证 TFT-LCD 或 OLED的显示亮度，还需要提高光源输出的光的强度，导致 TFT-LCD或 OLED 功耗的增力口。
实施例一
如图 1所示， 本公开的至少一个实施例提供了一种阵列基板， 包括阵列 式布置在衬底基板上的薄膜晶体管单元 2，还包括位于所述薄膜晶体管单元 2 之上的量子点层 3， 所述量子点层 3包括至少三种量子点， 任一种量子点受 到来自所述阵列基板的入光处的光的照射和激发而发出相应波段的光。
量子点是一些肉眼无法看到的、极其微小的半导体纳米晶体， 由辞、镉、 硒和石克原子等组合而成， 晶体中的颗粒直径通常不足 10 纳米。 它有一个与 众不同的特性： 当受到电或光激发时就会发光， 产生纯色的光线， 发出的光 线的颜色由量子点的组成材料和大小、 形状所决定。 量子点的尺寸越小， 激 发产生的光越偏向蓝光， 量子点的尺寸越大， 激发产生的光越偏向红光。 根 据实际情况对量子点的尺寸进行调整， 可以得到不同颜色的光线。
在本公开实施例中， 该量子点层 3包括发出红光的红色量子点、 发出绿 光的绿色量子点和发出蓝光的蓝色量子点。 一般的， 红色量子点的尺寸为 8-1 Onm , 其发出的红光的波长为 610nm~620nm ; 绿色量子点的尺寸为 5~7nm,其发出的绿光的波长为 540nm~550nm;蓝色量子点的尺寸为 3~5匪， 其发出的蓝光的波长为 475nm~485nm。如上文所述，通过调整量子点的尺寸， 可以使本公开实施例中的量子点激发出的各颜色的光的波长范围较窄， 即各 颜色的光的颜色较纯净。
进一步的， 在本公开实施例中， 阵列基板上包括量子点层， 若显示装置 的出光结构 （例如背光源）位于阵列基板的衬底基板一侧， 此时阵列基板内 的光的路径如图 1中的虚线箭头所示。 白光进入量子点层后， 各量子点受激 发光， 相应的， 红色量子点发出纯粹的红光， 绿色量子点发出纯粹的绿光， 蓝色量子点发出纯粹的蓝光， 即量子点层 3在白光或其他光线的激发下， 发 出红光、 绿光和蓝光的混合光。
此时量子点层 3发出的光为混合光， 不能直接用于显示， 因此还需要配 合位于彩膜基板上的滤色器层， 对该混合光进行滤光。 例如， 所述滤色器层 包括红色滤色区域、 绿色滤色区域以及蓝色滤色区域， 红色滤色区域只允许 混合光中的红光通过， 将绿光和蓝光吸收掉； 类似的， 绿色滤色区域只允许 混合光中的绿光通过， 将红光和蓝光吸收掉； 蓝色滤色区域只允许混合光中 的蓝光通过。
需要说明的是， 由于量子点层 3受激发出的红光、 绿光和蓝光波长的差 距较大， 因此， 无需提高彩膜基板上的滤色器层的色彩纯度即可保证最终发 出的光的饱和度、 色彩纯度较高， 因此， 可保证滤色器层的透光率， 进而保 证显示装置的显示亮度。
最终， 本公开的实施例中的基板的红色滤色区域发出纯粹的红光， 绿色 滤色区域发出纯粹的绿光， 蓝色滤色区域发出纯粹的蓝光。 显然， 本公开实 施例中的基板发出的光的颜色纯度较高， 因此， 包含该基板的显示装置可以 提供的更多种类的颜色， 其色域范围较大。
综上， 在本公开实施例中， 光源提供的白光或其他光线首先进入量子点 层， 激发量子点层中的量子点发出包括红光、 绿光和蓝光的混合光， 之后混 合光进入滤色器层， 滤色器层中不同颜色滤色区域滤出不同颜色的光。 由于 量子点发出的单色光的色彩纯度较高， 因此无需提高滤色器层的色彩纯度， 从而在不增加显示装置的光源的出光强度的情况下， 提高了显示装置的色域 范围。
以图 1所示的阵列基板的结构示意图为例， 介绍阵列基板的结构。 如图 1所示， 所述阵列基板依次包括： 衬底基板 1、 薄膜晶体管单元 2、 第一绝缘 层 4、 第二绝缘层 5、 量子点层 3和第一导电层 6， 其中， 所述第一绝缘层 4 设置有第一过孔 14， 所述第二绝缘层 5设置有第二过孔 15， 所述量子点层 3 设置有第三过孔 16， 所述第一过孔 14、 所述第二过孔 15和所述第三过孔 16 相通， 并对应于所述薄膜晶体管单元 1的漏极 25， 所述第一导电层 6通过所 述第三过孔 16、所述第二过孔 15和所述第一过孔 14连接到所述薄膜晶体管 单元 1的漏极 25。
衬底基板 1可以利用玻璃、石英等常见的透明材质制成；栅极 21可利用 钼、 铝， 钨、 钛、 铜等金属的单层或者其合金中的一种的单层制成， 也可以 由上述金属或合金的多层层叠制成；类似的，源极 24或漏极 25可以利用钼、 铝， 钨、 钛、 铜等金属的单层或者其合金中的一种的单层制成， 也可以由上 述金属或合金的多层层叠制成。
所述有源层 23可釆用非晶硅、多晶硅或铟镓辞氧化物等常用的半导体材 料形成； 第一导电层 6可为氧化铟锡或氧化铟辞等常见的透明导电材料。
在图 1所示的结构中， 第一导电层 6连接薄膜晶体管单元 1的漏极 25， 该导电层 6相当于阵列基板的像素电极。
该第一绝缘层 4通常又称为钝化层， 釆用钝化层工艺不仅提高了显示装 置的耐严酷环境的能力， 而且有助于改善薄膜晶体管单元 1的光电性能。 钝 化层通常由氧化硅、 氮化硅、 氧化铪、 树脂等绝缘材料形成。 第二绝缘层 5 又叫做平坦层，用于平整基板的表面，有利于该阵列基板的后续制作和加工。
如图 1所示， 量子点层 3位于第一导电层 6和第二绝缘层 5之间， 在本 公开实施例中， 量子点层 3也可位于第一绝缘层 4和第二绝缘层 5之间， 如 图 2所示，或者位于阵列基板的其它层之间，本公开实施例对此不进行限制。
图 1或图 2所示的阵列基板为扭曲向列型 （ Twisted Nematic, 简称 TN ) 模式的阵列基板。 图 1所示的阵列基板的结构进行改变。 例如， 如图 3所示 的阵列基板在图 1所示的阵列基板的基础上还包括第二导电层 8， 以及位于 所述第一导电层 6和所述第二导电层 8之间的第三绝缘层 7， 第二导电层 8 与第一导电层 6相配合， 共同驱动液晶层中的液晶分子的旋转， 即第二导电 层 8 为公共电极。 此时该阵列基板为基于 COA 工艺的高级超维场转换 ( Advanced Super Dimension Switch, 简称 ADS )模式的阵列基板。
所谓高级超维场转换技术（ Advanced Super Dimension Switch，简称 ADS ) 其核心技术特性描述为： 通过同一平面内狭缝电极边缘所产生的电场以及狭 缝电极层与板状电极层间产生的电场形成多维电场，使液晶盒内狭缝电极间、 电极正上方所有取向液晶分子都能够产生旋转， 从而提高了液晶工作效率并 增大了透光效率。 高级超维场转换技术可以提高 TFT-LCD产品的画面品质， 具有高分辨率、 高透过率、 低功耗、 宽视角、 高开口率、 低色差、 无挤压水 波纹（push Mura )等优点。 针对不同应用， ADS技术的改进技术有高透过 率 I-ADS技术、 高开口率 H-ADS和高分辨率 S-ADS技术等。
类似的， 也可在图 2所示的阵列基板的结构上形成第二导电层 8和第三 绝缘层 7， 形成 ADS模式的阵列基板， 在此不再赘述。
本领域技术人员应该可以理解， 上述实施例的充当像素电极的第一导电 层 6可以为板状或者狭缝状， 充当公共电极的第二导电层 8也是如此。 进一 步的， 虽然图 1示出了像素电极在下、 公共电极在上的结构， 但实际上， 像 素电极和公共电极的位置关系可互换， 但是在上的电极应是狭缝状的， 在下 的电极可为板状电极或狭缝状的。
早期制造薄膜晶体管液晶显示器的技术中， 滤色器层与作为驱动开关的 薄膜晶体管形成在不同基板上， 并位于液晶层两侧， 然而这种配置方式会造 成显示面板的开口率降低， 进而影响显示面板的亮度与画面品质。 近年来， 市场上对显示面板的开口率及亮度的要求提高， 业界为应市场需求进而开发 出一种滤色器层直接形成在阵列基板上（Color filter On Array, 简称 COA ) 的技术， 即将滤色器层和薄膜晶体管形成在一块基板上， 如此不仅可以提升 显示面板的开口率， 增加显示面板的亮度， 而且避免了将滤色器层和薄膜晶 体管形成在不同基板上所衍生的问题。
如图 4或 5所示， 所述阵列基板还包括滤色器层 9， 所述滤色器层 9与 所述量子点层 3相比， 远离所述阵列基板的入光处。 由此， 可以保证显示装 置提供的光首先进入量子点层 3， 激发量子点层 3中的量子点发光， 量子点 发出的混合光再经过滤色器层 9的滤色作用， 为显示装置提供显示所需的单 色光。
在本公开实施例中， 滤色器层 9包括多个滤色区域， 任一滤色区域仅具 有一种颜色， 对应像素单元的出光区域设置， 出光区域即两个薄膜晶体管单 元之间的区域， 即从图 4看来， 任一滤色区域设置在两个薄膜晶体管单元 1 之间。
需要说明的是， 在图 4所示的阵列基板中， 显示装置提供的光（如图 4 中的虚线箭头所示） 自第一导电层 6—侧入射， 自衬底基板 1出射， 因此入 射光先进入量子点层 3再进入滤色器层 9， 即所述滤色器层 9与所述量子点 层 3相比远离所述阵列基板的入光处。 如果显示装置提供的光（如图 5中的 虚线箭头所示）是自衬底基板 1一侧入射， 自第一导电层 6—侧出射， 则入 射光应首先进入量子点层 3之后再进入滤色器层 9， 即如图 5所示的阵列基 板所述滤色器层 9与所述量子点层 3相比远离所述阵列基板的入光处， 以保 证显示装置提供的光首先经过量子点层 3。
显然， 图 5中应对位于第二绝缘层 5上的滤色器层 9进行加工， 使得滤 色器层 9设置有与第二过孔 15和第一过孔 14相通的第四过孔 17，则第一导 电层 6可以通过第四过孔 17、 第二过孔 15和第一过孔 14连接到漏极 25。
也可对图 4所示的阵列基板进行加工， 在第一导电层 6上形成第三绝缘 层 7和第二导电层 8， 形成如图 6所示的 COA技术的 ADS阵列基板。
为了进一步提高光的透过率， 在本公开实施例的技术方案中， 所述量子 点层包括红色量子点区域、 蓝色量子点区域和绿色量子点区域， 相应的， 所 述滤色器层包括红色滤色区域、 蓝色滤色区域和绿色滤色区域， 所述红色滤 色区域对应于所述量子点层的红色量子点区域设置， 所述蓝色滤色区域对应 于所述量子点层的蓝色量子点区域设置， 所述绿色滤色区域对应于所述量子 点层的绿色量子点区域设置。 这样组成的量子点层， 每个对应于一个子像素 的颜色的量子点区域能够受背光源激发， 发出单色的光， 相比于红光、 绿光 和蓝光的混合光能使最终的透过率提高。
进一步的， 可对图 4所示的阵列基板进行加工， 如图 7所示， 所述基板 还包括位于所述第一导电层 6上方的第四绝缘层 10、 有机层 11和第三导电 层 12， 所述第四绝缘层 10具有开口 18， 所述有机层 11通过所述开口 18连 接所述第一导电层 6，所述第一导电层 6与所述第三导电层 12配合共同驱动 所述有机层 11 发光， 即此时的阵列基板为有机发光二极管 （Organic Light-Emitting Diode, 简称 OLED )模式的阵列基板。
有机层 11 内包括空穴传输层、 发光层与电子传输层， 当第一导电层 6 和第三导电层 12之间的电压适当时，空穴传输层中的空穴与电子传输层中的 电子就会在发光层中复合， 使发光层发生。
需要说明的是， 由于适合传递电子的有机材料不一定适合传递空穴， 所 以有机发光二极体的电子传输层和空穴传输层应选用不同的有机材料或仅是 掺杂的杂质不同的有机材料。 目前最常被用来制作电子传输层的材料必须制 膜安定性高、 热稳定且电子传输性佳， 一般通常釆用荧光染料化合物， 如蒽 二唑类衍生物、 含萘环类衍生物、 1-萘基、 3-曱基苯基等。 而空穴传输层的 材料属于一种芳香胺荧光化合物， 如 1-萘基等有机材料。
有机层 11的材料须具备固态下有较强荧光、载子传输性能好、热稳定性 和化学稳定性佳、 量子效率高且能够真空蒸镀的特性， 例如可釆用八羟基喹 啉铝。
有机层 11选择使用能发出白光的材料，在本公开实施例中，与第一导电 层 6配合驱动有机层 11发光的第三导电层 12可选用铝等成本较低、 不透光 的材料，可使得有机层 11发出的光基本都进入阵列基板中（如图 7中的虚线 箭头所示）， 提高有机层 11 发出的光的利用率。 同时， 还可防止有机层 11 发出的光经由导电层反射后变色， 保证显示装置的显示效果。
另外， 由于并不是整个阵列基板在工作中都向观看者发出光， 可以在第 一导电层 6上不需要发光的区域（例如薄膜晶体管单元 1的对应区域）设置 第四绝缘层 10， 以将第一导电层 6和有机层 11绝缘， 防止该区域的有机层 11发光； 而在需要发光的区域， 即亚像素区域， 则通过在第四绝缘层 10上 设置有开口 18， 使得有机层 11通过所述开口 18与所述第一导电层 6连接。 该第四绝缘层 10又称为像素限定层，对亚像素区域进行限定，以限定发光区 域，则开口 18对应的区域为发光区域，而第四绝缘层 10覆盖的区域不发光。
需要说明的是， 虽然本公开实施例所提供的阵列基板的示意图中的薄膜 晶体管单元 1均为底栅型薄膜晶体管单元， 但实际上， 也可选用顶栅型薄膜 晶体管单元， 本公开的实施例对此不进行限制。
进一步的， 本公开的至少一个实施例还提供了一种显示装置， 包括上述 任意一种阵列基板。 该显示装置可以为具有任何显示功能的产品或部件， 例 如液晶面板、 电子纸、 OLED面板、 液晶电视、 液晶显示器、 数码相框、 手 机、 平板电脑等。
实施例二 本公开的至少一个实施例还提供了一种制作上述的阵列基板的制作方 法， 该制作方法包括：
步骤 S101、 在衬底基板上形成包括薄膜晶体管单元的各层结构的图形。 步骤 S102、在所述薄膜晶体管单元之上形成包括至少三种量子点的量子 点层， 其中， 任一种量子点受到来自所述阵列基板的入光处的光照激发出相 应波段的光。
如图 1所示， 该薄膜晶体管单元 2由下到上依次包括栅极 21、位于栅极 21之上的栅极绝缘层 22、位于栅极绝缘层 22之上的有源层 23， 因此在制作 时， 依次在阵列基板上形成栅极 21、 栅极绝缘层 22、 有源层 23。
需要说明的是， 在形成薄膜晶体管单元 2的栅极 21的同时， 衬底基板 1 上的栅线（图中未示出）等结构也一体成型。
除了上述的栅极 21、 栅极绝缘层 22、 有源层 23等结构外， 薄膜晶体管 单元 2还包括源极 21和漏极 25。 在本公开实施例中， 薄膜晶体管单元 2的 源极 21和漏极 25同层设置， 因此可以在形成漏极 25的同时形成源极 21。
若是源极 21与漏极 25不同层设置， 则可以考虑根据实际情况， 在形成 漏极 25之前或之后形成源极 21， 本公开实施例对此不进行限制。
由于薄膜晶体管单元 2具有上述的多层结构， 每制作薄膜晶体管单元 2 的一层结构，都需要将该阵列基板整体放置于刻蚀气体或刻蚀液体中， 因此， 若是将量子点层 3设置于薄膜晶体管单元 2之下， 无法保证在经过多次刻蚀 气体或刻蚀液体的腐蚀后量子点层 3仍然完好。 因此， 应先制作完毕薄膜晶 体管单元之后再制作量子点层 3。
进一步的， 以图 1所示的阵列基板的制作方法为例进行说明。 为了制作 图 1所示的阵列基板， 步骤 S101和步骤 S102之间， 该制作方法还包括： 步骤 S201、在所述薄膜晶体管单元之上形成第一绝缘层， 对所述第一绝 缘层进行构图工艺， 形成对应于所述薄膜晶体管单元的漏极的第一过孔。
步骤 S201之后， 形成如图 8所示的阵列基板。
步骤 S202、在所述第一绝缘层之上形成第二绝缘层， 对所述第二绝缘层 进行构图工艺， 形成对应于所述第一过孔的突起。
步骤 S202之后， 形成如图 9所示的阵列基板。
第二绝缘层 5可选用正性光刻胶， 利用半色调掩膜板进行第一次曝光之 后显影， 形成对应于所述第一过孔 14的突起。
步骤 S203、 对所述突起进行曝光。
则步骤 S102包括：
步骤 S204、在所述第二绝缘层上方形成量子点层， 对所述突起进行显影 以去除所述突起处的量子点层和突起下方的第二绝缘层， 形成设置在所述量 子点层中的第三过孔和设置在所述第二绝缘层中的第二过孔，所述第三过孔、 所述第二过孔和所述第一过孔相通。
需要说明的是， 由于无法对量子点层 3进行刻蚀处理， 因此在本公开实 施例中， 先对需要去除掉的量子点层 3的对应区域一一突起处的第二绝缘层 5 进行曝光处理， 对曝光时长、 曝光光强进行合适的调控， 可使得突起处的 第二绝缘层 5均被曝光； 之后， 通过沉积等方法形成量子点层 3， 量子点层 3 覆盖整个第二绝缘层 5， 如图 10所示， 此时， 对阵列基板进行显影， 由于第 二绝缘层 5釆用正性光刻胶制成， 已经曝光处理过的突起处的第二绝缘层 5 会被去除， 同时， 覆盖在突起处上的量子点层 3也会被去除， 形成设置在量 子点层 3中的第三过孔 16和设置在第二绝缘层 5中的第二过孔 15， 如图 11 所示。
步骤 S204之后， 还包括：
步骤 S205、 在所述量子点层上方形成包括第一导电层的图形。
由于第三过孔 16、 第二过孔 15和第一过孔 14相通， 则第一导电层 6可 以连接到薄膜晶体管单元 2的漏极 25， 即第一导电层 6相当于阵列基板的像 素电极。
经过上述步骤之后， 形成如图 2所示的阵列基板。
上述的制作阵列基板的步骤中，第一绝缘层 4的第一过孔 14是通过形成 第一绝缘层 4之后立即进行的构图工艺制成。第一过孔 14也可以在形成第二 过孔 15和第三过孔 16之后，以第二绝缘层 5为掩膜板形成， 包括如下步骤： 步骤 S301、 在所述薄膜晶体管单元之上形成第一绝缘层；
步骤 S302、在所述第一绝缘层之上形成第二绝缘层， 对所述第二绝缘层 进行构图工艺， 形成对应于所述薄膜晶体管单元的漏极的突起； 以及
步骤 S303、 对所述突起进行曝光。
步骤 S102包括： 步骤 S304、在所述第二绝缘层上方形成量子点层， 对所述突起进行显影 以去除所述突起处的量子点层和突起下方的第二绝缘层， 形成所述量子点层 的第三过孔和所述第二绝缘层的第二过孔， 所述第三过孔和所述第二过孔相 通；
步骤 S305、以所述第二绝缘层为掩膜在第一绝缘层中形成对应于所述薄 膜晶体管单元的漏极的第一过孔， 所述第三过孔、 所述第二过孔和所述第一 过孔相通； 以及
步骤 S306、 在所述量子点层上方形成包括第一导电层的图形。
经过上述的步骤之后， 同样可以形成如图 2所示的阵列基板。
才艮据图 2所示的阵列基板的制作方法， 可推知图 3所示的阵列基板的制 作方法。 其中， 需要说明的是， 由于图 3中的量子点层 3位于第一绝缘层 4 和第二绝缘层 5之间， 为了制作量子点层 3的图形， 需要利用半色调掩膜板 对第一绝缘层 4进行两次构图工艺， 因此， 此时第一绝缘层 4可选用正光刻 胶， 需要注意的是， 在对第一绝缘层 4进行第二次曝光的时候， 应该控制曝 光的光强和时间， 使得第一绝缘层 4在经过显影之后， 仍然可以完全覆盖薄 膜晶体管单元 2、 数据线（图中未示出 )等结构。
进一步的， 也可在第一绝缘层 4和量子点层 3之间形成第五绝缘层， 通 过对第五绝缘层的构图工艺来形成量子点层 3的图形， 在此不再赘述。
若需要制作 COA技术的阵列基板， 则该制作方法还包括：
形成滤色器层， 其中， 所述滤色器层与所述量子点层相比， 远离所述阵 列基板的入光处。
如果显示装置提供的光自阵列基板的第一导电层 6—侧入射， 从衬底基 板 1一侧出射， 则滤色器层 9应放置在量子点层 3和衬底基板 1之间， 如图 4所示； 如果显示装置提供的光自阵列基板的衬底基板 1一侧入射， 则滤色 器层 9应放置在量子点层 3的上方， 如图 5所示。
此时， 图 4中的第一过孔 14可在形成滤色器层 9之前或之后形成，本公 开实施例对此不进行限制。
在图 1所示的阵列基板的基础上， 可以形成第三绝缘层 7和第二导电层 8，所述第三绝缘层 7位于所述第一导电层 6和所述第二导电层 8之间，以形 成图 3所示的 ADS模式的阵列基板。 显然， 该第二导电层 8相当于配合第 一导电层 6的公共电极， 如图 3所示。
本领域技术人员应该可以理解， 上述实施例的充当像素电极的第一导电 层 6可以为板状或者狭缝状， 充当公共电极的第二导电层 8也是如此。 进一 步的， 虽然图 2所示的像素电极在下， 公共电极在上， 但实际上， 像素电极 和公共电极的位置顺序可颠倒， 但是在上的电极应当是狭缝状的， 在下的电 极可以是板状电极。 不过有时候也会出现上下电极均为狭缝状的。
显然， 也可在图 2、 图 4或图 5所示的阵列基板的基础上形成第三绝缘 层 7和第二导电层 8， 在此不再赘述。
进一步的，还可在图 1所示的阵列基板的基础上，增加有机层 11等结构， 使得形成图 7所示的 OLED模式的阵列基板。 该方法包括：
步骤 S401、在所述第一导电层上形成第四绝缘层， 所述第四绝缘层上具 有开口；
步骤 S402、在所述第四绝缘层上形成有机层， 所述有机层通过所述开口 与所述第一导电层接触； 以及
步骤 S403、 在所述有机层上形成第三导电层。
由于 OLED模式的显示装置仅具有阵列基板， 不具有阵列基板配合的对 盒基板， 因此需将黑矩阵 13设置于阵列基板上， 例如， 在所述薄膜晶体管单 元 2上方形成包括黑矩阵 3的图形， 如图 7所示。
需要说明的是， 本公开实施例中所形成的薄膜晶体管单元可为底栅型薄 膜晶体管单元也可为顶栅型薄膜晶体管单元，本公开实施例对此不进行限定。
以上所述仅是本公开的示范性实施方式， 而非用于限制本公开的保护范 围， 本公开的保护范围由所附的权利要求确定。
本申请要求于 2013年 12月 25日递交的中国专利申请第 201310728310.0 号的优先权， 在此全文引用上述中国专利申请公开的内容以作为本申请的一 部分。

Claims

权利要求书
1、 一种阵列基板， 包括：
阵列式排布在衬底基板上的薄膜晶体管单元，
位于所述薄膜晶体管单元之上的量子点层， 所述量子点层包括至少三种 量子点， 任一种量子点受到来自所述阵列基板的入光处的光的照激而发出相 应波段的光。
2、根据权利要求 1所述的阵列基板， 其中， 所述量子点层中的量子点为 半导体纳米晶体， 至少由辞、 镉、 硒和疏原子组合而成。
3、根据权利要求 1或 2所述的阵列基板， 其中， 所述量子点层包括红色 量子点区域、 蓝色量子点区域和绿色量子点区域。
4、 根据权利要求 1至 3中任何一项所述的阵列基板， 还包括滤色器层， 所述滤色器层与所述量子点层相比， 远离所述阵列基板的入光处， 其中， 所 述滤色器层包括红色滤色区域、 蓝色滤色区域和绿色滤色区域， 所述红色滤 色区域对应于所述量子点层的红色量子点区域设置， 所述蓝色滤色区域对应 于所述量子点层的蓝色量子点区域设置， 所述绿色滤色区域对应于所述量子 点层的绿色量子点区域设置。
5、根据权利要求 1至 4中任何一项所述的阵列基板，依次包括： 衬底基 板、 薄膜晶体管单元、 第一绝缘层、 第二绝缘层、 量子点层和第一导电层， 其中， 所述第一绝缘层中设置有第一过孔， 所述第二绝缘层中设置有第二过 孔， 所述量子点层中设置有第三过孔， 所述第一过孔、 所述第二过孔和所述 第三过孔相通， 所述第一导电层通过所述第三过孔、 所述第二过孔和所述第 一过孔连接到所述薄膜晶体管单元的漏极。
6、根据权利要求 5所述的阵列基板，还包括第二导电层， 以及位于所述 第一导电层和所述第二导电层之间的第三绝缘层。
7、 根据权利要求 6所述的阵列基板， 其中， 所述第二导电层为狭缝状， 所述第一导电层为板状或者狭缝状。
8、根据权利要求 5所述的阵列基板，还包括位于所述第一导电层上方的 第四绝缘层、 有机层和第三导电层， 所述第四绝缘层具有开口， 所述有机层 通过所述开口接触所述第一导电层。
9、根据权利要求 8所述的阵列基板，其中，所述有机层包括空穴传输层、 发光层与电子传输层。
10、 根据权利要求 9所述的阵列基板， 还包括位于所述薄膜晶体管单元 之上的黑矩阵。
11、 一种显示装置， 其包括如权利要求 1-10任一项所述的阵列基板。
12、 一种制作阵列基板的方法， 包括：
在衬底基板上形成包括薄膜晶体管单元的各层结构的图形； 以及 在所述薄膜晶体管单元之上形成包括至少三种量子点的量子点层，其中， 任一种量子点受到来自所述阵列基板的入光处的光照激发出相应波段的光。
13、根据权利要求 12所述的方法， 其中， 所述形成包括薄膜晶体管单元 的各层结构的图形之后， 包括：
在所述薄膜晶体管单元之上形成第一绝缘层， 对所述第一绝缘层进行构 图工艺， 形成对应于所述薄膜晶体管单元的漏极的第一过孔；
在所述第一绝缘层之上形成第二绝缘层， 对所述第二绝缘层进行构图工 艺， 形成对应于所述第一过孔的突起；
对所述突起进行曝光；
所述在所述薄膜晶体管单元之上形成包括至少三种量子点的量子点层包 括：
在所述第二绝缘层上方形成量子点层， 对所述突起进行显影以去除所述 突起上的量子点层和突起下方的第二绝缘层， 形成设置在所述量子点层中的 第三过孔和设置在所述第二绝缘层中的第二过孔， 所述第三过孔、 所述第二 过孔和所述第一过孔相通； 以及
在所述量子点层上方形成包括第一导电层的图形， 所述第一导电层通过 第三通孔、 第二通孔和第一通孔连接至所述薄膜晶体管单元的漏极。
14、根据权利要求 12所述的方法， 其中， 所述形成包括薄膜晶体管单元 的各层结构的图形之后， 包括：
在所述薄膜晶体管单元之上形成第一绝缘层；
在所述第一绝缘层之上形成第二绝缘层， 对所述第二绝缘层进行构图工 艺， 形成对应于所述薄膜晶体管单元的漏极的突起；
对所述突起进行曝光； 所述在所述薄膜晶体管单元之上形成包括至少三种量子点的量子点层包 括：
在所述第二绝缘层上方形成量子点层， 对所述突起进行显影以去除所述 突起处的量子点层和突起下方的第二绝缘层， 形成所述量子点层的第三过孔 和所述第二绝缘层的第二过孔， 所述第三过孔和所述第二过孔相通；
以所述第二绝缘层为掩膜对形成对应于所述薄膜晶体管单元的漏极的突 起， 所述第三过孔、 所述第二过孔和所述第一过孔相通； 以及
在所述量子点层上方形成包括第一导电层的图形， 所述第一导电层通过 第三通孔、 第二通孔和第一通孔连接至所述薄膜晶体管单元的漏极。
15、 根据权利要求 12-14中任何一项所述的方法， 还包括：
形成滤色器层， 其中， 所述滤色器层与所述量子点层相比， 远离所述阵 列基板的入光处。
16、 根据权利要求 13-15中任何一项所述的方法， 还包括：
形成第三绝缘层和第二导电层， 所述第三绝缘层位于所述第一导电层和 所述第二导电层之间。
17、 根据权利要求 13-15中任何一项所述的方法， 还包括：
在所述第一导电层上形成第四绝缘层， 所述第四绝缘层上具有开口； 在所述第四绝缘层上形成有机层， 所述有机层通过所述开口与所述第一 导电层接触；
在所述有机层上形成第三导电层。
18、 根据权利要求 12-17中任何一项所述的制作方法， 还包括： 在所述薄膜晶体管单元上方形成包括黑矩阵的图形。
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