WO2022119722A3 - Power and area efficient digital-to-time converter with improved stability - Google Patents

Power and area efficient digital-to-time converter with improved stability Download PDF

Info

Publication number
WO2022119722A3
WO2022119722A3 PCT/US2021/059956 US2021059956W WO2022119722A3 WO 2022119722 A3 WO2022119722 A3 WO 2022119722A3 US 2021059956 W US2021059956 W US 2021059956W WO 2022119722 A3 WO2022119722 A3 WO 2022119722A3
Authority
WO
WIPO (PCT)
Prior art keywords
charging
power
capacitor
digital
improved stability
Prior art date
Application number
PCT/US2021/059956
Other languages
French (fr)
Other versions
WO2022119722A2 (en
Inventor
Zhengzheng Wu
Chao SONG
Karthik Nagarajan
Original Assignee
Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US17/111,208 external-priority patent/US11177819B1/en
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Priority to KR1020237018043A priority Critical patent/KR20230084318A/en
Priority to JP2023527767A priority patent/JP2023543337A/en
Priority to CN202180070908.8A priority patent/CN116325506A/en
Priority to EP21827463.7A priority patent/EP4256708A2/en
Publication of WO2022119722A2 publication Critical patent/WO2022119722A2/en
Publication of WO2022119722A3 publication Critical patent/WO2022119722A3/en
Priority to JP2024007988A priority patent/JP2024056716A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/82—Digital/analogue converters with intermediate conversion to time interval
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/82—Digital/analogue converters with intermediate conversion to time interval
    • H03M1/822—Digital/analogue converters with intermediate conversion to time interval using pulse width modulation
    • G—PHYSICS
    • G04—HOROLOGY
    • G04F—TIME-INTERVAL MEASURING
    • G04F10/00—Apparatus for measuring unknown time intervals by electric means
    • G04F10/005—Time-to-digital converters [TDC]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M1/0607—Offset or drift compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/80—Simultaneous conversion using weighted impedances
    • H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • H03M1/804—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution

Abstract

A digital-to-time converter (DTC) converts a digital code into a time delay using a capacitor digital-to-analog converter (CDAC) that functions as a charging capacitor. The DTC includes a switched capacitor voltage-to-current converter for the formation of a charging current (or a discharging current) for charging (or for discharging) the charging capacitor responsive to a triggering clock edge that begins the time delay. A comparator compares a voltage on the charging capacitor to a threshold voltage to determine an end of the time delay.
PCT/US2021/059956 2020-12-03 2021-11-18 Power and area efficient digital-to-time converter with improved stability WO2022119722A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020237018043A KR20230084318A (en) 2020-12-03 2021-11-18 Power and Area Efficient DIGITAL-TO-TIME CONVERTER with Improved Reliability
JP2023527767A JP2023543337A (en) 2020-12-03 2021-11-18 Power- and area-efficient digital-to-time converter with improved stability
CN202180070908.8A CN116325506A (en) 2020-12-03 2021-11-18 Power and area efficient digital-to-time converter with improved stability
EP21827463.7A EP4256708A2 (en) 2020-12-03 2021-11-18 Power and area efficient digital-to-time converter with improved stability
JP2024007988A JP2024056716A (en) 2020-12-03 2024-01-23 Power- and area-efficient digital-to-time converter with improved stability - Patents.com

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US17/111,208 2020-12-03
US17/111,208 US11177819B1 (en) 2020-12-03 2020-12-03 Power and area efficient digital-to-time converter with improved stability
US17/449,250 US11626883B2 (en) 2020-12-03 2021-09-28 Power and area efficient digital-to-time converter with improved stability
US17/449,250 2021-09-28

Publications (2)

Publication Number Publication Date
WO2022119722A2 WO2022119722A2 (en) 2022-06-09
WO2022119722A3 true WO2022119722A3 (en) 2023-01-12

Family

ID=78918577

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2021/059956 WO2022119722A2 (en) 2020-12-03 2021-11-18 Power and area efficient digital-to-time converter with improved stability

Country Status (6)

Country Link
EP (1) EP4256708A2 (en)
JP (2) JP2023543337A (en)
KR (1) KR20230084318A (en)
CN (1) CN116325506A (en)
TW (2) TWI797839B (en)
WO (1) WO2022119722A2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9678481B1 (en) * 2016-06-17 2017-06-13 Integrated Device Technologies, Inc. Fractional divider using a calibrated digital-to-time converter
WO2018068847A1 (en) * 2016-10-12 2018-04-19 Huawei Technologies Co., Ltd. Highly linear digital-to-time converter for low noise all-digital phase locked loop
US20180269895A1 (en) * 2017-03-16 2018-09-20 Samsung Electronics Co., Ltd. Digital-to-time converter and operating method thereof
US20200007136A1 (en) * 2018-06-28 2020-01-02 Silicon Laboratories Inc. Time-to-voltage converter using correlated double sampling
US20200366298A1 (en) * 2018-01-25 2020-11-19 Sony Semiconductor Solutions Corporation Time-to-digital converter and phase locked loop

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9362936B1 (en) * 2015-06-22 2016-06-07 Silicon Laboratories Inc. Digital-to-time converter
US9673835B1 (en) * 2015-12-04 2017-06-06 Taiwan Semiconductor Manufacturing Co., Ltd. Pipelined SAR with TDC converter

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9678481B1 (en) * 2016-06-17 2017-06-13 Integrated Device Technologies, Inc. Fractional divider using a calibrated digital-to-time converter
WO2018068847A1 (en) * 2016-10-12 2018-04-19 Huawei Technologies Co., Ltd. Highly linear digital-to-time converter for low noise all-digital phase locked loop
US20180269895A1 (en) * 2017-03-16 2018-09-20 Samsung Electronics Co., Ltd. Digital-to-time converter and operating method thereof
US20200366298A1 (en) * 2018-01-25 2020-11-19 Sony Semiconductor Solutions Corporation Time-to-digital converter and phase locked loop
US20200007136A1 (en) * 2018-06-28 2020-01-02 Silicon Laboratories Inc. Time-to-voltage converter using correlated double sampling

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
FILIPE G R RAMOS ET AL: "A Multi-Voltage Reference Source", ELECTRONICS, ROBOTICS AND AUTOMOTIVE MECHANICS CONFERENCE (CERMA 2007), IEEE, PISCATAWAY, NJ, USA, 1 September 2007 (2007-09-01), pages 657 - 662, XP031152980, ISBN: 978-0-7695-2974-5 *
LIU HANLI ET AL: "A 0.98mW fractional-N ADPLL using 10b isolated constant-slope DTC with FOM of -246dB for IoT applications in 65nm CMOS", 2018 IEEE INTERNATIONAL SOLID - STATE CIRCUITS CONFERENCE - (ISSCC), IEEE, 11 February 2018 (2018-02-11), pages 246 - 248, XP033328419, DOI: 10.1109/ISSCC.2018.8310276 *

Also Published As

Publication number Publication date
WO2022119722A2 (en) 2022-06-09
TWI797839B (en) 2023-04-01
JP2023543337A (en) 2023-10-13
TW202230996A (en) 2022-08-01
EP4256708A2 (en) 2023-10-11
TW202324943A (en) 2023-06-16
KR20230084318A (en) 2023-06-12
CN116325506A (en) 2023-06-23
JP2024056716A (en) 2024-04-23

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