CN204334545U - High pressure analog to digital conversion circuit in battery management system - Google Patents
High pressure analog to digital conversion circuit in battery management system Download PDFInfo
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- CN204334545U CN204334545U CN201420649810.5U CN201420649810U CN204334545U CN 204334545 U CN204334545 U CN 204334545U CN 201420649810 U CN201420649810 U CN 201420649810U CN 204334545 U CN204334545 U CN 204334545U
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Abstract
The utility model provides the analog to digital conversion circuit of the high pressure in a kind of battery management system, comprises the first DMOS pipe, the second DMOS pipe, amplifier and comparator; The drain electrode of the first DMOS pipe is connected to anode by the first resistance, and the in-phase input end of amplifier is by the second grounding through resistance, and the source electrode of the first DMOS pipe is connected between the second resistance and the in-phase input end of amplifier; The drain electrode of the second DMOS pipe is connected to battery cathode by the 3rd resistance, and the inverting input of amplifier is connected with one end of the 4th resistance, and the source electrode of the second DMOS pipe is connected between the 4th resistance and the inverting input of described amplifier; The in-phase input end of described amplifier be connected an electric capacity between output, the output of described amplifier is connected with the input of comparator, the output of described comparator outputs control signals to described 4th resistance, and the other end controlling described 4th resistance is connected to reference power source end or ground connection.The utility model circuit can not produce high pressure, had device over-voltage protecting function.
Description
Technical field
The utility model relates to battery management system technical field, particularly relates to the high pressure analog to digital conversion circuit in a kind of battery management system.
Background technology
In heavy-duty battery management system, need the every batteries voltage in multi-string battery group to carry out gathering, processing.Along with battery strings number increases, voltage acquisition front end faced by voltage also reach tens V V even up to a hundred.High-voltage signal is first transformed into low pressure by the methods such as traditional AFE (analog front end) often uses electric capacity to move, and is then converted to digital signal with analog to digital converter.Be illustrated in figure 1 traditional analog to digital conversion circuit structural representation, in this scheme, every road acquisition channel will use 4 high-voltage switch gears, and because ADC (analog to digital converter, Analog-to-Digital Converter) between Harvest time, sampling capacitance needs to keep voltage always, and the capacitance of needs is very large, can not be integrated in the chips, the outer electric capacity of sheet can only be used.
Therefore, the scheme that existing electric capacity is moved in conjunction with ADC needs to use multiple high-voltage switch gear, and especially high-side switch needs when realizing with metal-oxide-semiconductor can both bear high pressure between the grid of metal-oxide-semiconductor (G), source electrode (S), drain electrode (D) three.And high pressure can not be born between the G-S of high pressure DMOS pipe in high pressure BCD (bipolar-CMOS-DMOS) technique the most often used at present, limit the use of technique.
Utility model content
Based on this, the utility model provides the analog to digital conversion circuit of the high pressure in a kind of battery management system, and this circuit can not produce high pressure, has device over-voltage protecting function.
A high pressure analog to digital conversion circuit in battery management system, comprises the first DMOS pipe, the second DMOS pipe, amplifier and comparator;
The drain electrode of described first DMOS pipe is connected to anode by the first resistance, and the in-phase input end of described amplifier is by the second grounding through resistance, and the source electrode of described first DMOS pipe is connected between described second resistance and the in-phase input end of described amplifier;
The drain electrode of described second DMOS pipe is connected to battery cathode by the 3rd resistance, and the inverting input of described amplifier is connected with one end of the 4th resistance, and the source electrode of described second DMOS pipe is connected between described 4th resistance and the inverting input of described amplifier;
The in-phase input end of described amplifier be connected an electric capacity between output, the output of described amplifier is connected with the input of comparator, the output of described comparator outputs control signals to described 4th resistance, and the other end controlling described 4th resistance is connected to reference power source end or ground connection.
High pressure analog to digital conversion circuit in above-mentioned battery management system; do not use high-side switch; do not adopt the method first moved and gather again; but directly analog-to-digital conversion is done to high-voltage signal; low side switch is used to carry out sampling channel selection; allow to use the withstand voltage limited DMOS pipe of GS, downside metal-oxide-semiconductor switch can realize device over-voltage protecting function simultaneously.Utilize resistance pressure-dividing network, amplifier and electric capacity to form active integrator, and realize sigma-delta ADC continuous time further; The utility model circuit simply, efficiently can realize in BCD technique, has saved cost.Compared with the ADC realized with pure switching capacity, based on polysilicon resistance, form ADC continuous time in conjunction with electric capacity, can saving chip area.
Accompanying drawing explanation
Fig. 1 is traditional analog to digital conversion circuit structural representation;
Fig. 2 is the high pressure analog to digital conversion circuit structural representation in one embodiment in a kind of battery management system of the utility model;
Fig. 3 is the high pressure analog to digital conversion circuit structural representation in another embodiment in a kind of battery management system of the utility model.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the utility model is described in further detail, but execution mode of the present utility model is not limited thereto.
In current sub-micron, deep submicron process, because the reducing of bandwidth, the area of polysilicon (poly) resistance constantly reduces, and just can realize the precision resister of tens of M Ω in very little area.The utility model is according to process characteristic, be different from traditional scheme, the method of more use resistance is adopted to achieve the high-voltage acquisition circuit framework of direct digital-to-analogue conversion, be the high pressure analog to digital conversion circuit structural representation in one embodiment in the utility model battery management system as shown in Figure 2, comprise the first DMOS pipe MA, the 2nd DMOS pipe MB, amplifier OTA1 and comparator CMP1;
The drain electrode of described first DMOS pipe MA is connected to anode VI+ by the first resistance R1A, the in-phase input end of described amplifier OTA1 is by the second resistance R2A ground connection, and the source electrode of described first DMOS pipe MA is connected between described second resistance R2A and the in-phase input end of described amplifier OTA1;
The drain electrode of described second DMOS pipe MB is connected to battery cathode VI-by the 3rd resistance R1B, the inverting input of described amplifier OTA1 is connected with one end of the 4th resistance R2B, and the source electrode of described second DMOS pipe MB is connected between described 4th resistance R2B and the inverting input of described amplifier OTA1;
The in-phase input end of described amplifier OTA1 be connected an electric capacity CA between output, the output of described amplifier OTA1 is connected with the input of comparator CMP1, the output of described comparator CMP1 outputs control signals to described 4th resistance R2B, and the other end controlling described 4th resistance R2B is connected to reference power source end VREF or ground connection;
In the present embodiment, each acquisition channel only uses two DMOS pipe MA, MB as selector switch.R1A and R1B is connected to differential input end (i.e. amplifier), and is connected to R2A by selector switch, R2B; Amplifier OTA1 and electric capacity CA forms active integrating circuit.Because the node voltage after dividing potential drop reduces to low pressure, so without the need to bearing high pressure between the grid of MA, MB and source electrode.Even if VI+/VI-is because unexpected voltage have input very high voltage, the D terminal voltage of MA, MB pipe can increase, but source terminal only can be elevated to gate terminal voltage-Vth (Vth is metal-oxide-semiconductor threshold voltage), so there is no overvoltage risk.
The difference output of active integrator circuit is admitted to comparator, and comparator once can compare in each clock cycle, and latches the comparative result of 0 or 1.According to 1 bit digital output signal of comparator, if 1, then R2B resistance is connected to VREF in the next clock cycle, if 0, then R2B resistance is connected to ground in the next cycle.By such analog to digital-analog feedback, whole loop constitute one continuous time sigma-delta modulator.And one bit digital signal is admitted to, and digital decimation filter is down-sampled just can obtain high-resolution numeral output afterwards.
As shown in Figure 3, it is the high pressure analog to digital conversion circuit structural representation in another embodiment in the utility model battery management system, single-ended integrators and single-ended comparators is adopted in Fig. 2, and in the present embodiment, the inverting input of amplifier be connected an electric capacity CB between output, the antinoise effect of circuit can be improved.
In a preferred embodiment, described comparator also connects a clock circuit.
In a preferred embodiment, the output of described comparator CMP1 is also connected to a digital decimation filter, and described digital decimation filter exports described control signal.
The utility model is mainly used in new forms of energy product, especially adopts the energy storaging product of multi-string battery and similar battery class.Include but not limited to following content: lithium-ions battery management system, lithium polymer battery battery management system, lead accumulator, nickel-cadmium cell, Ni-MH battery, super capacitor, and the peripheral circuit of following novel energy-storing product.
High pressure analog to digital conversion circuit in the utility model battery management system; do not use high-side switch; do not adopt the method first moved and gather again; but directly analog-to-digital conversion is done to high-voltage signal; low side switch is used to carry out sampling channel selection; allow to use the withstand voltage limited DMOS pipe of GS, downside metal-oxide-semiconductor switch can realize device over-voltage protecting function simultaneously.Utilize resistance pressure-dividing network, amplifier and electric capacity to form active integrator, and realize sigma-delta ADC continuous time further; The utility model circuit simply, efficiently can realize in BCD technique, has saved cost.Compared with the ADC realized with pure switching capacity, be main with poly resistance, form ADC continuous time in conjunction with electric capacity, can saving chip area.
The above embodiment only have expressed several execution mode of the present utility model, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the utility model the scope of the claims.It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise utility, can also make some distortion and improvement, these all belong to protection range of the present utility model.Therefore, the protection range of the utility model patent should be as the criterion with claims.
Claims (4)
1. the high pressure analog to digital conversion circuit in battery management system, is characterized in that, comprises the first DMOS pipe, the second DMOS pipe, amplifier and comparator;
The drain electrode of described first DMOS pipe is connected to anode by the first resistance, and the in-phase input end of described amplifier is by the second grounding through resistance, and the source electrode of described first DMOS pipe is connected between described second resistance and the in-phase input end of described amplifier;
The drain electrode of described second DMOS pipe is connected to battery cathode by the 3rd resistance, and the inverting input of described amplifier is connected with one end of the 4th resistance, and the source electrode of described second DMOS pipe is connected between described 4th resistance and the inverting input of described amplifier;
The in-phase input end of described amplifier be connected an electric capacity between output, the output of described amplifier is connected with the input of comparator, the output of described comparator outputs control signals to described 4th resistance, and the other end controlling described 4th resistance is connected to reference power source end or ground connection.
2. the high pressure analog to digital conversion circuit in battery management system according to claim 1, is characterized in that, the inverting input of described amplifier be connected an electric capacity between output.
3. the high pressure analog to digital conversion circuit in battery management system according to claim 1, is characterized in that, described comparator also connects a clock circuit.
4. the high pressure analog to digital conversion circuit in battery management system according to claim 1, is characterized in that, the output of described comparator is also connected to a digital decimation filter, and described digital decimation filter exports described control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420649810.5U CN204334545U (en) | 2014-10-31 | 2014-10-31 | High pressure analog to digital conversion circuit in battery management system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420649810.5U CN204334545U (en) | 2014-10-31 | 2014-10-31 | High pressure analog to digital conversion circuit in battery management system |
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| CN204334545U true CN204334545U (en) | 2015-05-13 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108508256A (en) * | 2017-02-24 | 2018-09-07 | 长沙英雁电子有限公司 | Instantaneous overvoltage harvester |
| CN110673047A (en) * | 2018-07-03 | 2020-01-10 | 奥特润株式会社 | Fault diagnosis circuit of battery management system |
-
2014
- 2014-10-31 CN CN201420649810.5U patent/CN204334545U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108508256A (en) * | 2017-02-24 | 2018-09-07 | 长沙英雁电子有限公司 | Instantaneous overvoltage harvester |
| CN110673047A (en) * | 2018-07-03 | 2020-01-10 | 奥特润株式会社 | Fault diagnosis circuit of battery management system |
| CN110673047B (en) * | 2018-07-03 | 2022-02-18 | 现代摩比斯株式会社 | Fault diagnosis circuit of battery management system |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
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| CP01 | Change in the name or title of a patent holder |
Address after: 510080 water Donggang 8, Dongfeng East Road, Yuexiu District, Guangzhou, Guangdong. Patentee after: Electric Power Research Institute of Guangdong Power Grid Co.,Ltd. Patentee after: Guangdong Saiwei Electronics Co.,Ltd. Address before: 510080 water Donggang 8, Dongfeng East Road, Yuexiu District, Guangzhou, Guangdong. Patentee before: Electric Power Research Institute of Guangdong Power Grid Co.,Ltd. Patentee before: DONGGUAN CELLWISE MICROELECTRONICS Co.,Ltd. |
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| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20221107 Address after: 523808 room 402, 404, 408, building 1, no.6, South Industrial Road, Songshanhu Park, Dongguan City, Guangdong Province Patentee after: Guangdong Saiwei Electronics Co.,Ltd. Address before: 510080 water Donggang 8, Dongfeng East Road, Yuexiu District, Guangzhou, Guangdong. Patentee before: ELECTRIC POWER RESEARCH INSTITUTE OF GUANGDONG POWER GRID Co.,Ltd. Patentee before: Guangdong Saiwei Electronics Co.,Ltd. |