WO2022104702A1 - 显示面板及其制作方法和显示装置 - Google Patents

显示面板及其制作方法和显示装置 Download PDF

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Publication number
WO2022104702A1
WO2022104702A1 PCT/CN2020/130434 CN2020130434W WO2022104702A1 WO 2022104702 A1 WO2022104702 A1 WO 2022104702A1 CN 2020130434 W CN2020130434 W CN 2020130434W WO 2022104702 A1 WO2022104702 A1 WO 2022104702A1
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WIPO (PCT)
Prior art keywords
light
layer
display area
base substrate
anode
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PCT/CN2020/130434
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English (en)
French (fr)
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WO2022104702A9 (zh
Inventor
黄耀
龙跃
黄炜赟
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to KR1020237014042A priority Critical patent/KR20230106594A/ko
Priority to JP2023524422A priority patent/JP2023549595A/ja
Priority to GB2308990.7A priority patent/GB2616564A/en
Priority to US18/037,878 priority patent/US20240016010A1/en
Priority to CN202080002907.5A priority patent/CN115298828A/zh
Priority to PCT/CN2020/130434 priority patent/WO2022104702A1/zh
Publication of WO2022104702A1 publication Critical patent/WO2022104702A1/zh
Publication of WO2022104702A9 publication Critical patent/WO2022104702A9/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80517—Multilayers, e.g. transparent multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display device.
  • the light-emitting device is retained in the high-transmittance display area, and the signal that controls the light-emitting device to emit light is controlled by the non-high-transmittance camera.
  • the pixel circuit in the light display area is led out.
  • the current shooting quality of the under-screen camera is still relatively poor.
  • an object of the present disclosure is to provide a display panel, the first display area of the display panel has a high light transmittance, so as to improve the shooting quality of the under-screen camera.
  • the present disclosure provides a display panel.
  • the display area of the display panel includes a first display area and a second display area, and a pixel circuit density in the first display area is smaller than a pixel circuit density in the second display area;
  • the display panel includes: a base substrate; a plurality of first pixel circuits, wherein the first pixel circuits are arranged on one side of the base substrate and located in the second display area; wirings, the wirings is arranged on the side of the first pixel circuit away from the base substrate; a first light-emitting device, the first light-emitting device is arranged on the side of the trace away from the base substrate, and is located in the first light-emitting device A display area, wherein, in the direction away from the base substrate, the effective light-emitting anode area of the first anode in the first light-emitting device includes at least two conductive layers, and the at least two conductive layers include a second conductive layer.
  • a transparent electrode; a connecting line, the connecting line and the first transparent electrode are arranged in the same layer and are electrically connected, wherein the wiring is used to electrically connect the first pixel circuit and the connecting line, so that the The first pixel circuit drives the first light emitting device to emit light. Therefore, the connecting wire is drawn out from the first transparent electrode in the first anode, and is electrically connected to the wire, so as to realize the electrical connection between the first pixel circuit and the first light-emitting device.
  • the raised portion of the wire electrical connection can further improve the light transmittance of the first display area.
  • the wiring and the connecting line are electrically connected through a first via hole, and the first via hole is located in the first display area.
  • the first anode in a direction away from the base substrate, includes the first transparent electrode, the silver electrode and the second transparent electrode that are stacked in sequence, and the connection line is connected to the The first transparent electrode has an integrated structure.
  • the display panel further includes: a first insulating layer, the first insulating layer is disposed on a side of the first pixel circuit away from the base substrate, and has a penetration through the first pixel circuit. a second via hole of the insulating layer, wherein the wiring is located on the side of the first insulating layer away from the base substrate, and the wiring is electrically connected to the first pixel circuit through the second via hole ; a second insulating layer, the second insulating layer is arranged on the side of the first insulating layer away from the base substrate, and covers the wiring, and has the first insulating layer extending through the second insulating layer A via hole, wherein the connection line is disposed on the side of the second insulating layer away from the base substrate.
  • a plurality of the first via holes are arranged in multiple rows, and the traces are located between the first via holes in two adjacent rows.
  • the first anode includes the effective light-emitting anode region and a non-light-emitting anode region disposed around the effective light-emitting anode region, and the orthographic projection of the effective light-emitting anode region on the base substrate is greater than or equal to
  • the orthographic projection of the opening defined by the pixel defining layer in the first light emitting device overlaps on the base substrate, and the non-emitting anode region is covered by the pixel defining layer, wherein the non-emitting anode region only includes the first transparent electrode.
  • the display area further includes an under-screen functional area, and the under-screen functional area and the first display area have an overlapping area.
  • the display panel further includes: a plurality of second pixel circuits and a plurality of second light emitting devices, and both the second pixel circuits and the second light emitting devices are located in the second display area Inside, the connection between the second pixel circuit and the second anode in the second light-emitting device is at least one of the following: the second pixel circuit is directly connected to the second anode in the second light-emitting device through a third via hole.
  • the second anode is electrically connected to drive the second light-emitting device to emit light;
  • the display panel further includes a conductive layer, the conductive layer and the wiring are arranged in the same layer, and the second anode passes through the second insulation
  • the fourth via hole of the layer is electrically connected to the conductive layer, and the conductive layer is electrically connected to the second pixel circuit through the fifth via hole passing through the first insulating layer, so as to drive the second light-emitting device to emit light .
  • the present disclosure provides a method of fabricating the aforementioned display panel.
  • the display area of the display panel includes a first display area and a second display area, and the pixel circuit density in the first display area is smaller than the pixel circuit density in the second display area; making
  • the aforementioned method for a display panel includes: forming a plurality of first pixel circuits on one side of a base substrate, and the first pixel circuits are located in the second display area; and the first pixel circuits are far away from the A wiring is formed on one side of the base substrate, and the wiring is electrically connected to the first pixel circuit; a first light-emitting device and a connecting wire are formed on the side of the wiring away from the base substrate, and the wiring is The first light-emitting device is located in the first display area, wherein, in the direction away from the base substrate, the effective light-emitting anode area of the first anode in the first light-emitting device includes at least
  • the connecting wire is drawn out from the first transparent electrode in the first anode, and is electrically connected to the wire, so as to realize the electrical connection between the first pixel circuit and the first light-emitting device.
  • the raised portion of the wire electrical connection can further improve the light transmittance of the first display area.
  • the method for fabricating a display panel further includes: depositing a first insulating material layer on a side of the first pixel circuit away from the base substrate, and fabricating a through-hole in the first insulating material layer.
  • a second via hole of the first insulating material layer to form a first insulating layer having the second via hole depositing a second insulating material layer on the side of the first insulating layer away from the base substrate, A first via hole penetrating the second insulating material layer is formed in the second insulating material layer to form a second insulating layer having the first via hole; wherein, the trace is located in the first via hole between the insulating layer and the second insulating layer, and electrically connected to the first pixel circuit through the second via hole; the connection line is arranged on the side of the second insulating layer away from the base substrate, and It is electrically connected to the trace through the first via hole.
  • the step of forming the first anode and the connection line includes: sequentially depositing a first transparent conductive layer, a silver layer and a second insulating layer on a surface of the second insulating layer away from the base substrate A transparent conductive layer; a first photoresist and a second photoresist are respectively formed in the first area and the second area on the surface of the second transparent conductive layer, and the thickness of the first photoresist is greater than that of the first photoresist Thickness of two photoresists; remove the first transparent conductive layer, the silver layer and the second transparent conductive layer that are not covered by the first photoresist and the second photoresist; performing ashing treatment on the first photoresist and the second photoresist, so as to remove the second photoresist and thin the first photoresist; remove the second area by an etching process The first transparent conductive layer and the silver layer are separated, and the second transparent conductive layer is retained to obtain the connection line; the
  • the present disclosure provides a display device.
  • the display device includes: the aforementioned display panel, wherein a display area of the display panel includes a first display area and a second display area; an under-screen functional layer, where the under-screen functional layer is located.
  • the orthographic projection on the display panel overlaps with the first display area.
  • the display device can meet the requirements of the functional layer under the screen for high light input.
  • the under-screen functional layer is an under-screen camera
  • the under-screen camera has a better amount of light entering, thereby ensuring its higher shooting quality.
  • FIG. 1 is a schematic plan view of a display panel in an embodiment of the present disclosure
  • FIG. 2 is a schematic plan view of a display panel in another embodiment of the present disclosure.
  • FIG. 3 is a schematic plan view of a partial structure of a display panel in another embodiment of the present disclosure.
  • FIG. 4 is a schematic structural diagram of a display panel in yet another embodiment of the present disclosure.
  • FIG. 5 is a schematic structural diagram of a first anode and a connecting wire in yet another embodiment of the present disclosure
  • FIG. 6 is a schematic structural diagram of a first anode and a connecting wire in yet another embodiment of the present disclosure
  • FIG. 7 is a schematic structural diagram of a first anode and a connecting wire in yet another embodiment of the present disclosure
  • FIG. 8 is a structural schematic diagram of a first anode in the prior art
  • FIG. 9 is a schematic plan view of a partial structure of a display panel in another embodiment of the present disclosure.
  • FIG. 10 is a schematic structural diagram of a display panel in yet another embodiment of the present disclosure.
  • FIG. 11 is a schematic structural diagram of a display panel in yet another embodiment of the present disclosure.
  • FIG. 12 is a schematic structural diagram of a display panel in yet another embodiment of the present disclosure.
  • FIG. 13 is a schematic structural diagram of a display panel in yet another embodiment of the present disclosure.
  • FIG. 14 is a schematic structural diagram of manufacturing a display panel in yet another embodiment of the present disclosure.
  • FIG. 15 is a schematic structural diagram of fabricating a first anode and a connecting wire in yet another embodiment of the present disclosure.
  • the present disclosure provides a display panel.
  • the display area of the display panel includes a first display area a and a second display area b.
  • the second display area b is disposed outside the first display area a
  • the edge means that the second display area b is arranged outside the first display area a, or the second display area b is arranged around the first display area a.
  • the second display area can be the center of the display panel, or it can be A corner of the display panel may also be located at a position close to the border and in the center of the display panel as shown in FIG. 1 .
  • the shape of the first display area a includes but is not limited to circle, ellipse, quadrilateral, pentagon , hexagons and other polygons or irregular shapes, etc.
  • the density of pixel circuits in the first display area is lower than that in the second display area, that is, the distribution density of pixel circuits in the first display area is smaller than that in the second display area (that is, corresponding to the lower The first pixel circuit in the text) distribution density.
  • the pixel circuit described in the text refers to a driving circuit for providing a driving voltage for the OLED light-emitting device, which may be a circuit structure such as 7T1C and 9T2C.
  • the display area of the display panel further includes a third display area c, and the third display area c is located on the side of the second display area b away from the first display area a.
  • the pixel circuit density in the third display area is greater than the pixel circuit density in the second display area.
  • the pixel circuit density in the first display area may be 0, that is, no pixel circuits may be provided in the first display area, and the first light-emitting devices located in the first display area are composed of the first light-emitting device in the second display area. A pixel circuit is driven.
  • the distribution density of the light emitting devices in the first display area a may be less than or equal to the distribution density of the light emitting devices in the second display area b, and the distribution density of the light emitting devices in the second display area b may be less than or equal to the third display area c distribution density of light-emitting devices.
  • the distribution density of the pixel circuits in the first display area a is the smallest, which can ensure that sufficient light passes through the first display area to the back of the display panel; at the same time, through the first pixels in the second display area b
  • the circuit provides driving voltages for the light emitting devices in the first display area a, so that the display resolution (PPI) of the first display area a can be comparable to or slightly lower than other areas.
  • the pixel circuit is used to drive the light-emitting device (OLED device) to emit light, and includes structures such as an active layer, a gate electrode, a source-drain electrode, a storage capacitor, a data line, and a scan line.
  • the display area further includes an under-screen functional area e, and the under-screen functional area e and the first display area a have an overlapping area.
  • the first display area a overlaps with the under-screen functional area e; in other embodiments, as shown in (B) in FIG.
  • a display area a is covered by the under-screen functional area e; in some other embodiments, as shown in (C) in FIG. 2 , the under-screen functional area e is covered by the first display area a.
  • the under-screen functional area refers to the area corresponding to the under-screen functional layer, that is, the back of the display panel corresponding to the under-screen functional area is used to place the under-screen functional layer (such as the under-screen camera). Therefore, it can meet the requirements of the under-screen camera for the amount of light entering, and at the same time greatly improve the screen ratio of the display panel.
  • the display panel includes: a base substrate 10 ; a plurality of first pixel circuits 21 , the first pixel circuits 21 are provided on the base substrate 10 one side, and is located in the second display area b; the wiring 30, the wiring 30 is arranged on the side of the first pixel circuit 21 away from the base substrate 10; the first light-emitting device 41, so The first light-emitting device 41 is disposed on the side of the trace 30 away from the base substrate 10 and is located in the first display area a, wherein, in the direction away from the base substrate 10, the
  • the effective light-emitting anode region of the first anode 411 in the first light-emitting device 41 includes at least two conductive layers, and the at least two conductive layers include a first transparent electrode 412 (in FIG.
  • the first transparent electrode 412, the silver electrode 413 and the second transparent electrode 414 are taken as an example), the connecting line 50, the connecting line 50 and the first transparent electrode 412 are arranged in the same layer and are electrically connected, wherein the wiring 30 It is used to electrically connect the first pixel circuit 21 and the connection line 50, so that the first pixel circuit 21 drives the first light emitting device 41 to emit light.
  • the connection line 50 is led out from the first transparent electrode 412 in the first anode 411 and is electrically connected to the wiring 30 to realize the electrical connection between the first pixel circuit 21 and the first light emitting device 41 .
  • the first anode 411 There is no need to provide the raised portion 4111 for electrical connection with the trace (as shown in FIG.
  • the raised portion 4111 has the same structure as the first anode, that is, includes a first transparent electrode, a silver electrode and a second transparent electrode three-layer structure), which can further improve the light transmittance of the first display area.
  • the display area has an under-screen functional area
  • the back of the display panel corresponding to the under-screen functional area is used to place the under-screen camera.
  • the inventor found that if the first anode 411 is electrically connected to the wiring through the protrusion 4111, the protrusion The raised part will cause serious glare and diffraction when taking pictures with the camera under the screen, thereby reducing its photographing performance.
  • the glare and diffraction can be effectively alleviated and greatly optimized. Photo effects, improve photo performance.
  • the above-mentioned effective light-emitting anode region refers to the region of the first anode located in the opening defined by the pixel defining layer.
  • the first pixel circuit 21 is a 7T1C circuit (ie, seven transistors and one capacitor) structure, For example, it includes a driving transistor, a data writing transistor, a storage capacitor, a threshold compensation transistor, a first reset transistor, a second reset transistor, a first light emission control transistor, and a second light emission control transistor.
  • the first pixel circuit 21 includes structures such as an active layer 211, a gate electrode 212, a source-drain electrode 213, and the like.
  • the gate insulating layer 61 covers the active layer 211
  • the gate 212 is arranged on the surface of the gate insulating layer 61 away from the base substrate
  • the interlayer dielectric layer 62 is arranged on the gate insulating layer 61 away from the substrate.
  • One side of the base substrate and cover the gate electrode 212, the source-drain electrode layer 213 is disposed on the side of the interlayer dielectric layer 62 away from the base substrate, wherein the source-drain electrode 213 passes through the gate insulating layer and the interlayer dielectric layer.
  • the via hole is electrically connected to the active layer.
  • the electrical connection between the wiring 30 and the first pixel circuit 21 is realized by the electrical connection between the wiring 30 and the source-drain electrode 213 .
  • the first light emitting device 41 further includes a light emitting layer 416 and a cathode 417 .
  • the first light-emitting device 41 may further include at least one of the structures of a hole transport layer, a hole injection layer, an electron transport layer, and an electron injection layer, which can be selected flexibly by those skilled in the art according to actual design requirements That's it.
  • the traces 30 and the connection lines 50 are electrically connected through a first via hole 641 , and the first via hole 641 is located in the first display area.
  • the first anode 411 is sequentially stacked with a first transparent electrode 412 , a silver electrode 413 and a second transparent electrode 414 ,
  • the connecting wire 50 and the first transparent electrode 412 form an integral structure, that is, the connecting wire 50 and the first transparent electrode 412 are disposed in the same layer and prepared through the same step. In this way, not only the light transmittance of the first display area can be improved, but also undesirable phenomena such as glare and diffraction generated by the under-screen camera when taking pictures can be effectively alleviated.
  • the display panel further includes a pixel defining layer 65 .
  • the pixel defining layer 65 is disposed on the surface of the second insulating layer 64 away from the base substrate and defines a plurality of openings, wherein the first light emitting device and the The second light emitting device is disposed in the opening.
  • the first anode 411 includes the effective light-emitting anode region 4111 and a non-light-emitting anode region 4112 disposed around the effective light-emitting anode region 4111 , the effective light-emitting anode region 4111 is on the substrate
  • the orthographic projection on the substrate is greater than or equal to the orthographic projection of the opening 651 defined by the pixel-defining layer 65 in the first light-emitting device overlapped on the base substrate, and the non-light-emitting anode region 4112 is covered by the pixel-defining layer .
  • the structure of the non-light-emitting anode region also includes a first transparent electrode 412, a silver electrode 413 and a second transparent electrode 414 arranged in sequence, that is, the structure of the effective light-emitting anode region 4111 is the same; in other embodiments , the non-light-emitting anode region 4112 only includes the first transparent electrode 412, that is, during the preparation process, when the silver electrode 413 and the second transparent electrode 414 on the connecting line are etched and removed, the corresponding non-light-emitting anode region 4112 is also removed. The silver electrode 413 and the second transparent electrode 414 are removed, and only the first transparent electrode 412 is retained. Refer to FIG. 7 for a schematic diagram of the structure.
  • the materials of the connecting wire, the first transparent electrode, the second transparent electrode, and the wiring are independently transparent conductive materials such as ITO and IZO.
  • the display panel further includes: a first insulating layer 63 disposed on the first pixel circuit (in FIG. 4 , the first insulating layer 63 is disposed on the first pixel circuit
  • the side of the source-drain electrode 213 away from the base substrate) is away from the base substrate 10, and has a second via 631 penetrating the first insulating layer 63, wherein the trace 30 is located in the
  • the first insulating layer 63 is on the side away from the base substrate 10 , and the traces 30 are electrically connected to the first pixel circuit 21 (and the source-drain electrodes 213 ) through the second vias 631 ; the second insulating layer 64.
  • the second insulating layer 64 is disposed on the side of the first insulating layer 63 away from the base substrate 10, covers the traces 30, and has the The first via hole 641 , wherein the connection line 50 is disposed on the side of the second insulating layer 64 away from the base substrate 10 , and is electrically connected to the wiring line 30 through the first via hole 641 .
  • a plurality of the first via holes 641 are arranged in multiple rows, and the traces 30 are located between the first via holes 641 in two adjacent rows.
  • the layout of the wirings 30 can be reasonably arranged, and more wirings 30 can be arranged in a limited space.
  • FIG. 9 it can be seen in FIG. 9 that there may or may not be an overlapping area between the first anode 411 and the wiring 30 electrically connected to the first anode.
  • FIG. 9 there may or may not be an overlapping area between the first anode 411 and the wiring 30 electrically connected to the first anode.
  • the orthographic projection of the first anode 411 on the base substrate and the orthographic projection of the trace 30 electrically connecting the first anode on the base substrate have no overlapping area, that is, the trace 30 passes through
  • the first via 641 is electrically connected to the connection line 50, it is extended and arranged in a direction away from the first anode 411; the cross-sectional view along n-n' in FIG. 9 can refer to FIG. 11, the first anode 411 is on the base substrate
  • the orthographic projection of the trace 30 electrically connecting the first anode on the base substrate has a partial overlap area, that is, the trace 30 is electrically connected to the connection line 50 through the first via
  • the direction of an anode 411 extends and is arranged.
  • the display panel further includes: a plurality of second pixel circuits 22 and a plurality of second light emitting devices 42 , and the second pixel circuits 22 and the first Both light emitting devices 42 are located in the second display area b.
  • the second pixel circuit 22 directly communicates with the second light emitting device 42 through a third via hole 643 penetrating the first insulating layer 63 and the second insulating layer 64 .
  • the two anodes 421 are electrically connected to drive the second light-emitting device to emit light; in other embodiments, as shown in FIG.
  • the display panel further includes a conductive layer 70 , and the conductive layer 70 and the traces 30 are arranged in the same layer (ie, the conductive layer 30 is electrically conductive).
  • the layer 70 is formed of the same material as the trace 30 and is formed by a synchronous process), the second anode 421 is electrically connected to the second pixel circuit 22 through the conductive layer 70 , that is, the second anode 421 is connected to the second pixel circuit 22 through the fourth via 644 penetrating the second insulating layer 64 .
  • the conductive layer is electrically connected, and the conductive layer 70 is electrically connected to the second pixel circuit through the fifth via 635 penetrating the first insulating layer 63, thereby realizing the electrical connection between the second pixel circuit and the second anode, so that the second pixel circuit is driven
  • the second light emitting device emits light.
  • the second light emitting device 42 further includes a light emitting layer 422 and a cathode 423 in addition to the second anode 421 described above.
  • the second light-emitting device 42 may further include at least one of the structures of a hole transport layer, a hole injection layer, an electron transport layer, and an electron injection layer, which can be selected flexibly by those skilled in the art according to actual design requirements That's it.
  • the second pixel circuit 22 includes an active layer 221 , a gate electrode 222 , a source-drain electrode 223 and other structures, wherein the active layer 221 is provided on one side of the base substrate 10 , and the gate insulating layer 61 covers the active layer 221, the gate 222 is arranged on the surface of the gate insulating layer 61 away from the base substrate, the interlayer dielectric layer 62 is arranged on the side of the gate insulating layer 61 away from the base substrate, and covers the gate 222, the source The drain electrode layer 223 is disposed on the side of the interlayer dielectric layer 62 away from the base substrate, wherein the source and drain electrodes 223 are electrically connected to the active layer through vias penetrating the gate insulating layer and the interlayer dielectric layer, as shown in Figure 12 and As shown in FIG. 13 , in the second pixel circuit, the source-drain electrode 223 is electrically connected to the second anode 421 .
  • the first pixel circuits 21 and the second pixel circuits 22 are distributed in an array in the first direction X and the second direction Y, wherein, in order to ensure uniform brightness in the second display area, a plurality of The first pixel circuit 21 and the second pixel circuit 22 can be evenly distributed, and the specific setting method can be flexibly selected by those skilled in the art according to the specific situation of your arrangement of the pixel units, which is not limited here.
  • the shape of the first anode and the second anode are consistent. Therefore, the first anode does not need to be provided with a raised portion, and the shapes of the first anode and the second anode are kept consistent, which can not only effectively ensure the luminous efficiency of the first light-emitting device, but also effectively ensure the high transmittance of the first display area. .
  • first anode and second "The shape of the anode is the same” means that the shape of the anode in the light-emitting device of the same color in the first display area and the second display area is the same, that is, the first anode in the red light-emitting device in the first display area and the second display area.
  • the shape of the second anode in the medium red light-emitting device is the same, the shape of the first anode in the blue light-emitting device in the first display area is the same as that of the second anode in the blue light-emitting device in the second display area, the first display
  • the first anode in the green light emitting device in the second display region has the same shape as the second anode in the green light emitting device in the second display region.
  • the present disclosure provides a method of fabricating the aforementioned display panel.
  • the display area of the display panel includes a first display area and a second display area, and a pixel density in the first display area is smaller than a pixel density in the second display area.
  • the method of making the aforementioned display panel includes:
  • a plurality of first pixel circuits 21 are formed on one side of the base substrate 10, and the first pixel circuits 21 are located in the second display area b.
  • the first pixel circuit 21 is a 7T1C circuit (ie, seven transistors and one capacitor) structure, For example, it includes a driving transistor, a data writing transistor, a storage capacitor, a threshold compensation transistor, a first reset transistor, a second reset transistor, a first light emission control transistor, and a second light emission control transistor.
  • the first pixel circuit 21 includes structures such as an active layer 211, a gate electrode 212, a source-drain electrode 213, and the like.
  • the gate insulating layer 61 covers the active layer 211
  • the gate 212 is arranged on the surface of the gate insulating layer 61 away from the base substrate
  • the interlayer dielectric layer 62 is arranged on the gate insulating layer 61 away from the substrate.
  • One side of the base substrate and cover the gate electrode 212, the source-drain electrode layer 213 is disposed on the side of the interlayer dielectric layer 62 away from the base substrate, wherein the source-drain electrode 213 passes through the gate insulating layer and the interlayer dielectric layer.
  • the via hole is electrically connected to the active layer.
  • the method for fabricating a display panel further includes forming a second pixel circuit 22 in the second display area (as shown in FIG. 3 and FIG. 12 ).
  • the second pixel circuit is the same as the first pixel circuit 22 .
  • a pixel circuit is fabricated simultaneously.
  • the second pixel circuit 22 includes an active layer 221, a gate 222, a source-drain electrode 223 and other structures, wherein the active layer 221 is disposed on one side of the base substrate 10, and the gate insulating layer 61 covers the active layer 221, the gate 222 is arranged on the surface of the gate insulating layer 61 away from the base substrate, the interlayer dielectric layer 62 is arranged on the side of the gate insulating layer 61 away from the base substrate, and covers the gate 222, and the source-drain electrode layer 223 is arranged On the side of the interlayer dielectric layer 62 away from the base substrate, the source and drain electrodes 223 are electrically connected to the active layer through via holes penetrating the gate insulating layer and the interlayer dielectric layer.
  • the first pixel circuits 21 and the second pixel circuits 22 are distributed in an array in the first direction X and the second direction Y, wherein, in order to ensure uniform brightness in the second display area, a plurality of first pixel circuits 21 and the second pixel circuit 22 can be evenly distributed, and the specific setting method can be flexibly selected by those skilled in the art according to the specific situation such as your arrangement of the pixel units, which is not limited here.
  • a first insulating layer material is deposited and formed on the side of the first pixel circuit 21 away from the base substrate 10 in advance, and a through first insulating layer is formed in the first insulating material layer.
  • the second via hole 631 of the material layer is formed to form the first insulating layer 63 with the second via hole 631; wherein, the wiring 30 is located on the side of the first insulating layer 63 away from the base substrate 10, and the wiring 30 passes through
  • the second via hole 631 is electrically connected to the first pixel circuit 21 (electrically connected to the source-drain electrode layer 213 ).
  • the method further includes depositing and forming a second insulating material layer on the side of the first insulating layer 63 away from the base substrate 10, and fabricating a second insulating material layer through the second insulating material layer in the second insulating material layer.
  • the first via hole 641 is used to form the second insulating layer 64 with the first via hole 641, that is, the trace 30 is located between the first insulating layer 63 and the second insulating layer 64, wherein the connecting line 50 formed subsequently is arranged on the A side of the second insulating layer 64 away from the base substrate 10 is electrically connected to the wiring 30 through the first via hole 641 .
  • the effective light-emitting anode region of the first anode 411 in the device 41 includes at least two conductive layers, and at least one of the at least two conductive layers includes a first transparent electrode 412 (in FIG.
  • the first anode 411 includes sequentially The first transparent electrode 412 , the silver electrode 413 and the second transparent electrode 414 are stacked and arranged as an example); the connecting wire 50 is electrically connected to the first transparent electrode 412 and is formed by the same step, and the wiring 30 is electrically connected to the connecting wire 50 Set so that the first pixel circuit 21 drives the first light emitting device 41 to emit light.
  • the first light-emitting device 41 and the connecting line 50 are formed on the surface of the second insulating layer 64 away from the base substrate 10 , and the connecting line 50 is connected to the connecting line 50 through the second via hole 641 .
  • Line 30 is electrically connected.
  • the connecting wire is drawn out from the first transparent electrode in the first anode, and is electrically connected to the wiring, so as to realize the electrical connection between the first pixel circuit and the first light-emitting device.
  • the first anode does not need to be set in The protrusions are used for electrical connection with the wires, so that the light transmittance of the first display area can be further improved.
  • the forming steps of the first anode 411 and the connection wire 50 include:
  • S310 deposit and form a first transparent conductive layer 4120 , a silver layer 4130 and a second transparent conductive layer 4140 in sequence on the surface of the second insulating layer 64 away from the base substrate 10 .
  • the steps of forming the first photoresist 71 and the second photoresist 72 include: now forming a whole layer of photoresist of equal thickness on the surface of the second insulating layer 64, and then using a halftone mask The film plate and the ashing process remove the photoresist outside the first area and the second area, and thin the photoresist provided in the second area, thereby obtaining the first photoresist 71 and the second photoresist 72 .
  • S340 Perform ashing treatment on the first photoresist 71 and the second photoresist 72 to remove the second photoresist 72 and thin the first photoresist 71 .
  • the second photoresist 72 may be removed by an ashing process, and the first photoresist 71 may be thinned.
  • the second transparent conductive layer 4140 and the silver layer 4130 at the second region can be removed by controlling the etching rate and the etching time, and the first transparent conductive layer 4120 is retained.
  • the specific etching rate and etching time can be flexibly selected by those skilled in the art according to actual conditions such as the thickness and material of each layer structure, which are not limited here.
  • the method of fabricating a display panel further includes: referring to FIG. 13 , forming a pixel defining layer 65 on a surface of the second insulating layer 64 away from the base substrate, and forming the first anode and connecting lines after forming
  • the pixel definition layer 65, and the pixel definition layer 64 covers the connection line 50 and a part of the first anode 411, the pixel definition layer 65 defines a plurality of openings in which the light emitting device is disposed.
  • the method of fabricating a display panel further includes: the step of fabricating a plurality of second light emitting devices 42 , the second light emitting devices 42 located in the second display area b.
  • the second pixel circuit 22 directly communicates with the second anode in the second light emitting device 42 through the third via 643 penetrating the first insulating layer 63 and the second insulating layer 64 421 is electrically connected to drive the second light-emitting device to emit light; in other embodiments, as shown in FIG.
  • the display panel further includes a conductive layer 70 , and the conductive layer 70 and the wiring 30 are arranged in the same layer (ie, the conductive layer 70
  • the second anode 421 is electrically connected to the second pixel circuit 22 through the conductive layer 70, that is, the second anode 421 is connected to the conductive layer through the first via 641 penetrating the second insulating layer 64.
  • the conductive layer 70 is electrically connected to the second pixel circuit through the second via 631 penetrating the first insulating layer 63, thereby realizing the electrical connection between the second pixel circuit and the second anode, so that the second pixel circuit drives the second pixel circuit.
  • the light emitting device emits light.
  • the second light emitting device 42 further includes a light emitting layer 422 and a cathode 423 in addition to the second anode 421 described above.
  • the second light-emitting device 42 may further include at least one of a hole transport layer, a hole injection layer, an electron transport layer, and an electron injection layer, etc. Those skilled in the art can choose flexibly according to actual design requirements That's it.
  • the traces 30 and the connection lines 50 are electrically connected through a first via hole 641 , and the first via hole 641 is located in the first display area.
  • the first anode 411 is sequentially stacked with a first transparent electrode 412 , a silver electrode 413 and a second transparent electrode 414 ,
  • the connecting wire 50 and the first transparent electrode 412 form an integral structure, that is, the connecting wire 50 and the first transparent electrode 412 are disposed in the same layer and prepared through the same step. In this way, not only the light transmittance of the first display area can be improved, but also undesirable phenomena such as glare and diffraction generated by the under-screen camera when taking pictures can be effectively alleviated.
  • the display panel further includes a pixel definition layer 65 .
  • the pixel definition layer 65 is disposed on the surface of the second insulating layer 64 away from the base substrate and defines a plurality of openings, wherein the first light emitting device and the The second light emitting device is disposed in the opening.
  • the first anode 411 includes the effective light-emitting anode region 4111 and a non-light-emitting anode region 4112 disposed around the effective light-emitting anode region 4111 , the effective light-emitting anode region 4111 is on the substrate
  • the orthographic projection on the substrate is greater than or equal to the orthographic projection of the opening 651 defined by the pixel-defining layer 65 in the first light-emitting device overlapped on the base substrate, and the non-light-emitting anode region 4112 is covered by the pixel-defining layer .
  • the structure of the non-light-emitting anode region also includes a first transparent electrode 412, a silver electrode 413 and a second transparent electrode 414 arranged in sequence, that is, the structure of the effective light-emitting anode region 4111 is the same; in other embodiments , the non-light-emitting anode region 4112 only includes the first transparent electrode 412, that is, during the preparation process, when the silver electrode 413 and the second transparent electrode 414 on the connecting line are etched and removed, the corresponding non-light-emitting anode region 4112 is also removed. The silver electrode 413 and the second transparent electrode 414 are removed, and only the first transparent electrode 412 is retained. Refer to FIG. 7 for a schematic diagram of the structure.
  • the second light-emitting device is fabricated simultaneously with the first light-emitting device, that is, the first anode and the second anode in the second light-emitting device are also fabricated through fabrication.
  • the present disclosure provides a display device.
  • the display device includes: the aforementioned display panel, wherein a display area of the display panel includes a first display area and a second display area; an under-screen functional layer, where the under-screen functional layer is located.
  • the orthographic projection on the display panel overlaps with the first display area, or in other words, the orthographic projection of the under-screen functional layer on the display panel overlaps with the under-screen functional area.
  • the display device can meet the requirements of the functional layer under the screen for high light input.
  • the under-screen functional layer is an under-screen camera
  • the under-screen camera has a better amount of light entering, thereby ensuring its higher shooting quality.
  • specific types of display devices include, but are not limited to, mobile phones, notebooks, kindle, iPad, TVs, game consoles, and all other display devices with display functions.
  • the display device in addition to the aforementioned display panel, the display device also includes necessary structures or components for conventional display devices. Taking a mobile phone as an example, in addition to the aforementioned display panel, it also includes a glass cover, Necessary structures or components such as battery back cover, middle frame, motherboard, touch module, audio module, camera module, etc.
  • references to the terms “one embodiment,” “some embodiments,” “example,” “specific example,” or “some examples”, etc. means a specific feature described in connection with the embodiment or example, A structure, material, or feature is included in at least one embodiment or example of the present disclosure.
  • schematic representations of the above terms are not necessarily directed to the same embodiment or example.
  • the particular features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
  • those skilled in the art may combine and combine the different embodiments or examples described in this specification, as well as the features of the different embodiments or examples, without conflicting each other.

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Abstract

本公开提供了显示面板及其制作方法和显示装置。显示面板的显示区包括第一显示区和第二显示区，所述第一显示区中的像素电路分布密度小于第二显示区中的像素电路分布密度，显示面板包括：衬底基板；多个第一像素电路，第一像素电路设置在衬底基板的一侧，且位于第二显示区内；走线，走线设置在第一像素电路远离衬底基板的一侧；第一发光器件，第一发光器件设置在走线远离衬底基板的一侧，且位于第一显示区内，第一发光器件中的第一阳极包括至少两层导电层，所述至少两层导电层中至少包括第一透明电极；连接线，连接线与第一透明电极同层且电连接设置，走线用于电连接所述第一像素电路和所述连接线，以便第一像素电路驱动第一发光器件发光。

Description

显示面板及其制作方法和显示装置 技术领域
本公开涉及显示技术领域，具体的，涉及显示面板及其制作方法和显示装置。
背景技术
当前，为了提高屏下摄像头对应的高透光显示区的光透过率，保证屏下摄像头的拍照效果，在高透光显示区域仅保留发光器件，而控制发光器件发光的信号由非高透光显示区中的像素电路引出。但是目前屏下摄像头的拍摄质量依然相对欠佳。
因此，对于具有屏下摄像头的显示面板的研究有待深入。
公开内容
本公开旨在至少在一定程度上解决相关技术中的技术问题之一。为此，本公开的一个目的在于提出一种显示面板，该显示面板的第一显示区具有较高的透光率，提高屏下摄像头的拍摄质量。
在本公开的一方面，本公开提供了一种显示面板。根据本公开的实施例，所述显示面板的显示区包括第一显示区和第二显示区，所述第一显示区中的像素电路密度小于所述第二显示区中的像素电路密度；所述显示面板包括：衬底基板；多个第一像素电路，所述第一像素电路设置在所述衬底基板的一侧，且位于所述第二显示区内；走线，所述走线设置在所述第一像素电路远离所述衬底基板的一侧；第一发光器件，所述第一发光器件设置在所述走线远离所述衬底基板的一侧，且位于所述第一显示区内，其中，在远离所述衬底基板的方向上，所述第一发光器件中的第一阳极的有效发光阳极区包括至少两层导电层，所述至少两层导电层包括第一透明电极；连接线，所述连接线与所述第一透明电极同层且电连接设置，其中，所述走线用于电连接所述第一像素电路和所述连接线，以便所述第一像素电路驱动所述第一发光器件发光。由此，连接线由第一阳极中的第一透明电极引出，与走线电连接，以实现第一像素电路与第一发光器件的电连接，如此，第一阳极无需再设置用于与走线电连接的凸起部，如此可以进一步提高第一显示区的透光率。
根据本公开的实施例，所述走线与所述连接线通过第一过孔电连接，所述第一过孔位于所述第一显示区内。
根据本公开的实施例，在远离所述衬底基板的方向上，所述第一阳极包括依次层叠设置的所述第一透明电极、银电极和第二透明电极，所述连接线与所述第一透明电极为一体 结构。
根据本公开的实施例，所述显示面板还包括：第一绝缘层，所述第一绝缘层设置在所述第一像素电路远离所述衬底基板的一侧，且具有贯穿所述第一绝缘层的第二过孔，其中，所述走线位于所述第一绝缘层远离衬底基板的一侧，且所述走线通过所述第二过孔与所述第一像素电路电连接；第二绝缘层，所述第二绝缘层设置在所述第一绝缘层远离所述衬底基板的一侧，且覆盖所述走线，并具有贯穿所述第二绝缘层的所述第一过孔，其中，所述连接线设置在所述第二绝缘性层远离衬底基板的一侧。
根据本公开的实施例，多个所述第一过孔呈多行排列设置，所述走线位于相邻两行的所述第一过孔之间。
根据本公开的实施例，所述第一阳极包括所述有效发光阳极区和围绕所述有效发光阳极区设置的非发光阳极区，所述有效发光阳极区在衬底基板上的正投影大于等于所述第一发光器件中的像素界定层限定出的开口在所述衬底基板上的正投影重叠，所述非发光阳极区被所述像素界定层覆盖，其中所述非发光阳极区仅包括所述第一透明电极。
根据本公开的实施例，所述显示区还包括屏下功能区，所述屏下功能区与所述第一显示区具有交叠区域。
根据本公开的实施例，所述显示面板还包括：多个第二像素电路和多个第二发光器件，且所述第二像素电路和所述第二发光器件均位于所述第二显示区内，所述第二像素电路与所述第二发光器件中的第二阳极的连接方式为以下至少之一：所述第二像素电路通过第三过孔直接与所述第二发光器件中的第二阳极电连接，以驱动所述第二发光器件发光；所述显示面板还包括导电层，所述导电层与所述走线同层设置，所述第二阳极通过贯穿所述第二绝缘层的第四过孔与所述导电层电连接，所述导电层通过贯穿所述第一绝缘层的第五过孔与所述第二像素电路电连接，以驱动所述第二发光器件发光。
在本公开的另一方面，本公开提供了一种制作前面所述显示面板的方法。根据本公开的实施例，所述显示面板的显示区包括第一显示区和第二显示区，所述第一显示区中的像素电路密度小于所述第二显示区中的像素电路密度；制作前面所述显示面板的方法包括：在衬底基板的一侧形成多个第一像素电路，且所述第一像素电路位于所述第二显示区内；在所述第一像素电路远离所述衬底基板的一侧形成走线，且所述走线与所述第一像素电路电连接；在所述走线远离所述衬底基板的一侧形成第一发光器件和连接线，所述第一发光器件位于所述第一显示区内，其中，在远离所述衬底基板的方向上，所述第一发光器件中的第一阳极的有效发光阳极区包括至少两层导电层，所述至少两层导电层中至少之一包括第一透明电极，所述连接线与所述第一透明电极电连接设置且是通过同一步骤形成，其中， 所述走线与所述连接线电连接设置，以便所述第一像素电路驱动所述第一发光器件发光。由此，连接线由第一阳极中的第一透明电极引出，与走线电连接，以实现第一像素电路与第一发光器件的电连接，如此，第一阳极无需再设置用于与走线电连接的凸起部，如此可以进一步提高第一显示区的透光率。
根据本公开的实施例，制作显示面板的方法还包括：在所述第一像素电路远离所述衬底基板的一侧沉积第一绝缘材料层，在所述第一绝缘材料层中制作贯穿所述第一绝缘材料层的第二过孔，以形成具有所述第二过孔的第一绝缘层；在所述第一绝缘层远离所述衬底基板的一侧沉积第二绝缘材料层，在所述第二绝缘材料层中制作贯穿所述第二绝缘材料层的第一过孔，以形成具有所述第一过孔的第二绝缘层；其中，所述走线位于所述第一绝缘层和第二绝缘层之间，并通过所述第二过孔与所述第一像素电路电连接；所述连接线设置在所述第二绝缘性层远离衬底基板的一侧，并通过所述第一过孔与所述走线电连接。
根据本公开的实施例，所述第一阳极和所述连接线的形成步骤包括：在所述第二绝缘层远离衬底基板的表面上依次沉积形成第一透明导电层、银层和第二透明导电层；在所述第二透明导电层的表面上的第一区域和第二区域分别形成第一光刻胶和第二光刻胶，所述第一光刻胶的厚度大于所述第二光刻胶的厚度；去除未被所述第一光刻胶和所述第二光刻胶覆盖的所述第一透明导电层、所述银层和所述第二透明导电层；对所述第一光刻胶和所述第二光刻胶进行灰化处理，以便去除所述第二光刻胶，并将所述第一光刻胶减薄；通过刻蚀工艺去除第二区域处的所述第一透明导电层和所述银层，保留所述第二透明导电层，从而得到所述连接线；去除减薄后的所述第一光刻胶，得到所述第一阳极。
在本公开的又一方面，本公开提供了一种显示装置。根据本公开的实施例，该显示装置包括：前面所述的显示面板，所述显示面板的显示区包括第一显示区和第二显示区；屏下功能层，所述屏下功能层在所述显示面板上的正投影与所述第一显示区有重叠区域。由此，该显示装置中可以满足屏下功能层对高进光量的要求。当屏下功能层为屏下摄像头时，屏下摄像头具有较佳的进光量，进而保证其较高的拍摄质量。本领域技术人员可以理解，该显示装置具有前面所述的显示面板的所有特征和优点，在此不再过多的赘述。
附图说明
图1是本公开一个实施例中显示面板的平面示意图；
图2是本公开另一个实施例中显示面板的平面示意图；
图3是本公开又一个实施例中显示面板部分结构的平面示意图；
图4是本公开又一个实施例中显示面板的结构示意图；
图5是本公开又一个实施例中第一阳极和连接线的结构示意图；
图6是本公开又一个实施例中第一阳极和连接线的结构示意图；
图7是本公开又一个实施例中第一阳极和连接线的结构示意图；图8是现有技术中第一阳极的结构示意图；
图9是本公开又一个实施例中显示面板的部分结构的平面结构示意图；
图10是本公开又一个实施例中显示面板的结构示意图；
图11是本公开又一个实施例中显示面板的结构示意图；
图12是本公开又一个实施例中显示面板的结构示意图；
图13是本公开又一个实施例中显示面板的结构示意图；
图14是本公开又一个实施例中制作显示面板的结构示意图；
图15是本公开又一个实施例中制作第一阳极和连接线的结构示意图。
公开详细描述
下面详细描述本公开的实施例。下面描述的实施例是示例性的，仅用于解释本公开，而不能理解为对本公开的限制。实施例中未注明具体技术或条件的，按照本领域内的文献所描述的技术或条件或者按照产品说明书进行。
在本公开的一方面，本公开提供了一种显示面板。根据本公开的实施例，参照图1，显示面板的显示区包括第一显示区a和第二显示区b，在一些实施例中，第二显示区b设置在所述第一显示区a外边缘，即是指第二显示区b设置在第一显示区a外侧，或者说第二显示区b设置在第一显示区a周边。另外，第一显示区a的具体设置位置也没有特别的要求，本领域技术人员可以根据对屏下功能区的实际设计要求灵活选择，比如第二显示区可以为显示面板的中央，也可以为显示面板的一个角落，还可以如图1所示位于显示面板靠近边框且居中的位置。
而且，第一显示区a的具体形状也没有特殊要求，本领域技术人员可以根据实际情况灵活选择，比如，第一显示区a的形状包括但不限于圆形，椭圆形，四边形、五边形、六边形等多边形或不规则图形等。
其中，第一显示区的像素电路密度小于第二显示区中的像素电路密度，也就是说，第一显示区中的像素电路分布密度小于所述第二显示区中的像素电路(即对应下文中的第一像素电路)分布密度。需要说明的是，文中所述的像素电路指的是用于为OLED发光器件提供驱动电压的驱动电路，可以是7T1C、9T2C等电路结构。
另外，如图1所示，显示面板的显示区还包括第三显示区c，第三显示区c位于第二显 示区b远离第一显示区a的一侧。其中，第三显示区中的像素电路密度大于第二显示区的像素电路密度。在一些实施例中，第一显示区中的像素电路密度可以为0，即第一显示区中可以不设置像素电路，位于第一显示区的第一发光器件均由第二显示区中的第一像素电路驱动。
此外，第一显示区a的发光器件的分布密度可以是小于或者等于第二显示区b的发光器件分布密度，第二显示区b的发光器件的分布密度可以是小于或者等于第三显示区c的发光器件分布密度。基于上述结构，第一显示区a中的像素电路的分布密度是最小的，可以保证充足的光线透过第一显示区到达显示面板的背面；同时，通过第二显示区b中的第一像素电路为第一显示区中a的发光器件提供驱动电压，使得第一显示区a的显示分辨率(PPI)能够与其他区域相当或者稍低于其他区域。
需要说明的是，像素电路用于驱动发光器件(OLED器件)发光，包括有源层、栅极、源漏电极、存储电容、数据线、扫描线等结构。
根据本公开的实施例，参照图2，显示区还包括屏下功能区e，屏下功能区e与第一显示区a具有交叠区域。在一些具体实施例中，如图2中的(A)所示，第一显示区a与屏下功能区e重叠；在另一些实施例中，如图2中的(B)所示，第一显示区a被屏下功能区e覆盖；在又一些实施例中，如图2中(C)图所示，屏下功能区e被第一显示区a覆盖。其中，屏下功能区是指对应设置屏下功能层的区域，即屏下功能区对应的显示面板的背面用于放置屏下功能层(比如屏下摄像头)，由于第一显示区具有较高透光率，所以可以满足屏下摄像头对进光量的要求，同时大大提高显示面板的屏占比。
根据本公开的实施例，参照图3、图4和图5，显示面板包括：衬底基板10；多个第一像素电路21，所述第一像素电路21设置在所述衬底基板10的一侧，且位于所述第二显示区b内；走线30，所述走线30设置在所述第一像素电路21远离所述衬底基板10的一侧；第一发光器件41，所述第一发光器件41设置在所述走线30远离所述衬底基板10的一侧，且位于所述第一显示区a内，其中，在远离所述衬底基板10的方向上，所述第一发光器件41中的第一阳极411的有效发光阳极区包括至少两层导电层，所述至少两层导电层包括第一透明电极412(图4中以第一阳极411依次层叠设置的第一透明电极412、银电极413和第二透明电极414为例)，连接线50，所述连接线50与所述第一透明电极412同层且电连接设置，其中，所述走线30用于电连接所述第一像素电路21和所述连接线50，以便所述第一像素电路21驱动所述第一发光器件41发光。由此，连接线50由第一阳极411中的第一透明电极412引出，与走线30电连接，以实现第一像素电路21与第一发光器件41的电连接，如此，第一阳极411无需再设置用于与走线电连接的凸起部4111(如图8所示，该 凸起部4111是与第一阳极相同的结构，即包括第一透明电极、银电极和第二透明电极三层结构)，如此可以进一步提高第一显示区的透光率。而且当显示区具有屏下功能区时，屏下功能区对应的显示面板的背面用于放置屏下摄像头，发明人发现，若第一阳极411通过凸起部4111与走线电连接，该凸起部会使得在屏下摄像头拍照时，产生较严重的眩光和衍射，进而降低其拍照性能，而本申请中，通过设置与阳极电连接的透明的连接线，可以有效缓解眩光和衍射，大大优化拍照效果，提高拍照性能。
其中，上述的有效发光阳极区是指位于像素界定层限定出的开口内中的第一阳极的区域。
其中，第一像素电路21的具体结构没有特殊要求，本领域技术人员可以根据实际情况灵活选择，在一些实施例中，第一像素电路21为7T1C电路(即七个晶体管和一个电容)结构，例如包括驱动晶体管、数据写入晶体管、存储电容、阈值补偿晶体管、第一复位晶体管、第二复位晶体管、第一发光控制晶体管以及第二发光控制晶体管。第一像素电路11的纵向结构也没有特殊要求，在一些实施例中，参照图4，第一像素电路21包括有源层211、栅极212、源漏电极213等结构，其中，有源层211设置在衬底基板10的一侧，栅绝缘层61覆盖有源层211，栅极212设置在栅绝缘层61远离衬底基板的表面上，层间介质层62设置在栅绝缘层61远离衬底基板的一侧，且覆盖栅极212，源漏电极层213设置在层间介质层62远离衬底基板的一侧，其中，源漏电极213通过贯穿栅绝缘层和层间介质层的过孔与有源层电连接。其中，如图4所示，走线30与第一像素电路21的电连接是通过走线30与源漏电极213电连接实现的。
另外，参照图4，第一发光器件41除了包括前面所述的第一阳极411之外，还包括发光层416和阴极417。在一些实施例中，第一发光器件41还可以包括空穴传输层、空穴注入层、电子传输层能和电子注入层等结构中的至少之一，本领域技术人员根据实际设计要求灵活选择即可。
根据本公开的实施例，参照图4和图5，走线30与连接线50通过第一过孔641电连接，第一过孔641位于所述第一显示区内。根据本公开的实施例，参照图4和图6，在远离所述衬底基板10的方向上，第一阳极411依次层叠设置的第一透明电极412、银电极413和第二透明电极414，连接线50与所述第一透明电极412为一体形成结构，即连接线50与所述第一透明电极412同层设置，且通过同一步骤制备得到。由此，不仅可以提高第一显示区的透光率，还可以有效缓解屏下摄像头拍照时产生的眩光和衍射等不良现象。
另外，参照图4和图11，显示面板还包括像素界定层65，像素界定层65设置在第二绝缘层64远离衬底基板的表面，且限定出多个开口，其中，第一发光器件和第二发光器件 设置在所述开口中。
根据本公开的实施例，参照图5，第一阳极411包括所述有效发光阳极区4111和围绕所述有效发光阳极区4111设置的非发光阳极区4112，所述有效发光阳极区4111在衬底基板上的正投影大于等于所述第一发光器件中的像素界定层65限定出的开口651在所述衬底基板上的正投影重叠，所述非发光阳极区4112被所述像素界定层覆盖。在一些实施例中，非发光阳极区的结构也包括依次设置的第一透明电极412、银电极413和第二透明电极414，即与有效发光阳极区4111的结构相同；在另一些实施例中，非发光阳极区4112仅包括所述第一透明电极412，即在制备过程中，刻蚀去除连接线上层的银电极413和第二透明电极414时，同时也将非发光阳极区4112对应的银电极413和第二透明电极414去除，仅保留第一透明电极412，结构示意图可参照图7。
根据本公开的实施例，连接线、第一透明电极、第二透明电极以及走线的材料没有特殊要求，本领域技术人员可以根据实际情况灵活选择。在一些实施例中，连接线、第一透明电极、第二透明电极以及走线的材料各自独立地为ITO、IZO等透明导电材料。
根据本公开的实施例，参照图4，显示面板还包括：第一绝缘层63，所述第一绝缘层63设置在所述第一像素电路(在图4中，第一绝缘层63设置在源漏电极213远离衬底基板的一侧)远离所述衬底基板10的一侧，且具有贯穿所述第一绝缘层63的第二过孔631，其中，所述走线30位于所述第一绝缘层63远离衬底基板10的一侧，且所述走线30通过所述第二过孔631与所述第一像素电路21(与源漏电极213)电连接；第二绝缘层64，所述第二绝缘层64设置在所述第一绝缘层63远离所述衬底基板10的一侧，且覆盖所述走线30，并具有贯穿所述第二绝缘层64的所述第一过孔641，其中，所述连接线50设置在所述第二绝缘性层64远离衬底基板10的一侧，并通过第一过孔641与走线30电连接。
根据本公开的实施例，参照图9，多个所述第一过孔641呈多行排列设置，所述走线30位于相邻两行的所述第一过孔641之间。由此，可以有利于合理安排走线30的布局，在有限的空间内布局更多条的走线30。其中，在图9中可以看出，第一阳极411与电连接该第一阳极的走线30之间可以有交叠区域，也可以没有交叠区域，具体的：图9中沿m-m’的截面图可参照图10，第一阳极411在衬底基板上的正投影与电连接该第一阳极的走线30在衬底基板上的正投影没有重叠区域，即该走线30通过第一过孔641与连接线50电连接之后向背离该第一阳极411的方向延伸排布；图9中沿n-n’的截面图可参照图11，第一阳极411在衬底基板上的正投影与电连接该第一阳极的走线30在衬底基板上的正投影有部分的重叠区域，即该走线30通过第一过孔641与连接线50电连接之后向靠近该第一阳极411的方向延伸排布。
根据本公开的实施例，参照图3、图12和图13，显示面板还包括：多个第二像素电路22和多个第二发光器件42，且所述第二像素电路22和所述第二发光器件42均位于所述第二显示区b内。在一些实施例中，如图12所示，所述第二像素电路22通过贯穿第一绝缘层63和第二绝缘层64的第三过孔643直接与所述第二发光器件42中的第二阳极421电连接，以驱动所述第二发光器件发光；在另一些实施例中，如图13所示，显示面板还包括导电层70，导电层70与走线30同层设置(即导电层70与走线30同材料且同步工艺形成)，第二阳极421通过导电层70与第二像素电路22电连接，即第二阳极421通过贯穿第二绝缘层64的第四过孔644与导电层电连接，导电层70又通过贯穿第一绝缘层63的第五过孔635与第二像素电路电连接，进而实现第二像素电路与第二阳极的电连接，使得第二像素电路驱动第二发光器件发光。
另外，参照图12和图13，第二发光器件42除了包括前面所述的第二阳极421之外，还包括发光层422和阴极423。在一些实施例中，第二发光器件42还可以包括空穴传输层、空穴注入层、电子传输层能和电子注入层等结构中的至少之一，本领域技术人员根据实际设计要求灵活选择即可。
其中，参照图12和图13，第二像素电路22包括有源层221、栅极222、源漏电极223等结构，其中，有源层221设置在衬底基板10的一侧，栅绝缘层61覆盖有源层221，栅极222设置在栅绝缘层61远离衬底基板的表面上，层间介质层62设置在栅绝缘层61远离衬底基板的一侧，且覆盖栅极222，源漏电极层223设置在层间介质层62远离衬底基板的一侧，其中，源漏电极223通过贯穿栅绝缘层和层间介质层的过孔与有源层电连接，且如图12和图13所示，第二像素电路中源漏电极223与第二阳极421电连接。
在一些实施例中，参照图3，第一像素电路21和第二像素电路22在第一方向X和第二方向Y上阵列分布，其中，为了保证第二显示区内的亮度均匀，多个第一像素电路21和第二像素电路22可以均匀分散设置，具体的设置方式，本领域技术人员可以根据对像素单元您的排布等具体情况灵活选择，在此不作限制要求。
根据本公开的实施例，第一阳极与第二阳极的形状一致。由此，第一阳极无需设置凸起部，保持第一阳极与第二阳极的形状一致，不仅可以有效保证第一发光器件的发光效率，还可以有效保证第一显示区较高的透光率。本领域技术人员可以理解，不同颜色的发光器件的阳极的形状可能是不同，即蓝色发光器件、红色发光器件和绿色发光器件的阳极的形状是不同的，所以上述“第一阳极与第二阳极的形状一致”是指的第一显示区和第二显示区中相同颜色的发光器件中的阳极的形状相同，即第一显示区中的红色发光器件中的第一阳极与第二显示区中红色发光器件中的第二阳极的形状相同，第一显示区中的蓝色发光器 件中的第一阳极与第二显示区中蓝色发光器件中的第二阳极的形状相同，第一显示区中的绿色发光器件中的第一阳极与第二显示区中绿色发光器件中的第二阳极的形状相同。
需要说明的是，由于工艺等方面的因素，第一阳极与第二阳极的形状难以做到完全一致，所以只要第一阳极与第二阳极的形状大约一致即可认为“第一阳极与第二阳极的形状一致”。
在本公开的另一方面，本公开提供了一种制作前面所述显示面板的方法。根据本公开的实施例，所述显示面板的显示区包括第一显示区和第二显示区，所述第一显示区中的像素密度小于所述第二显示区中的像素密度。参照图14，制作前面所述显示面板的方法包括：
S100：在衬底基板10的一侧形成多个第一像素电路21，且第一像素电路21位于第二显示区b内。
其中，第一像素电路21的具体结构没有特殊要求，本领域技术人员可以根据实际情况灵活选择，在一些实施例中，第一像素电路21为7T1C电路(即七个晶体管和一个电容)结构，例如包括驱动晶体管、数据写入晶体管、存储电容、阈值补偿晶体管、第一复位晶体管、第二复位晶体管、第一发光控制晶体管以及第二发光控制晶体管。第一像素电路11的纵向结构也没有特殊要求，在一些实施例中，参照图4，第一像素电路21包括有源层211、栅极212、源漏电极213等结构，其中，有源层211设置在衬底基板10的一侧，栅绝缘层61覆盖有源层211，栅极212设置在栅绝缘层61远离衬底基板的表面上，层间介质层62设置在栅绝缘层61远离衬底基板的一侧，且覆盖栅极212，源漏电极层213设置在层间介质层62远离衬底基板的一侧，其中，源漏电极213通过贯穿栅绝缘层和层间介质层的过孔与有源层电连接。
根据本公开的实施例，制作显示面板的方法还包括在第二显示区内形成第二像素电路22(如图3和图12所示)，本领域技术人员可以理解，第二像素电路与第一像素电路同时进行制作。参照图8，第二像素电路22包括有源层221、栅极222、源漏电极223等结构，其中，有源层221设置在衬底基板10的一侧，栅绝缘层61覆盖有源层221，栅极222设置在栅绝缘层61远离衬底基板的表面上，层间介质层62设置在栅绝缘层61远离衬底基板的一侧，且覆盖栅极222，源漏电极层223设置在层间介质层62远离衬底基板的一侧，其中，源漏电极223通过贯穿栅绝缘层和层间介质层的过孔与有源层电连接。
另外，参照图3，第一像素电路21和第二像素电路22在第一方向X和第二方向Y上阵列分布，其中，为了保证第二显示区内的亮度均匀，多个第一像素电路21和第二像素电路22可以均匀分散设置，具体的设置方式，本领域技术人员可以根据对像素单元您的排布等具体情况灵活选择，在此不作限制要求。
S200：在第一像素电路21远离衬底基板10的一侧形成走线30，且所述走线30与第一像素电路21电连接。如图13所示，走线30与第一像素电路21电连接是指走线30与源漏电极层213电连接。
其中，如图13所示，在形成走线30之前，预先在第一像素电路21远离衬底基板10的一侧沉积形成第一绝缘层材料，在第一绝缘材料层中制作贯穿第一绝缘材料层的第二过孔631，以形成具有第二过孔631的第一绝缘层63；，其中，走线30位于第一绝缘层63远离衬底基板10的一侧，且走线30通过第二过孔631与第一像素电路21电连接(与源漏电极层213电连接)。
进一步的，在形成走线30之后，还进一步包括在第一绝缘层63远离衬底基板10的一侧沉积形成第二绝缘材料层，在第二绝缘材料层中制作贯穿第二绝缘材料层的第一过孔641，以形成具有第一过孔641的第二绝缘层64，即走线30位于第一绝缘层63和第二绝缘层64之间，其中，后续形成的连接线50设置在第二绝缘性层64远离衬底基板10的一侧，并通过第一过孔641与走线30电连接。
S300：在走线30远离衬底基板的一侧形成第一发光器件41和连接线50，第一发光器件41位于第一显示区a内，在远离衬底基板10的方向上，第一发光器件41中的第一阳极411的有效发光阳极区包括至少两层导电层，所述至少两层导电层中至少之一包括第一透明电极412(在图13中，以第一阳极411包括依次层叠设置的第一透明电极412、银电极413和第二透明电极414为例)；连接线50与第一透明电极412电连接设置且是通过同一步骤形成，走线30与连接线50电连接设置，以便第一像素电路21驱动第一发光器件41发光。
其中，在一些实施例中，如图13所示，第一发光器件41和连接线50形成在第二绝缘层64远离衬底基板10的表面上，连接线50通过第二过孔641与走线30电连接。
根据本公开的实施例，连接线由第一阳极中的第一透明电极引出，与走线电连接，以实现第一像素电路与第一发光器件的电连接，如此，第一阳极无需在设置用于与走线电连接的凸起部，如此可以进一步提高第一显示区的透光率。
根据本公开的实施例，参照图15，第一阳极411和连接线50的形成步骤包括：
S310：在第二绝缘层64远离衬底基板10的表面上依次沉积形成第一透明导电层4120、银层4130和第二透明导电层4140。
S320：在第二透明导电层4140的表面上的第一区域和第二区域分别形成第一光刻胶71和第二光刻胶72，第一光刻胶71的厚度大于第二光刻胶72的厚度。本领域技术人员可以理解，上述第一区域与所需形成第一阳极在第二绝缘层64表面上的正投影重叠，第二区域与所需形成的连接线50在第二绝缘层64表面上的正投影重。
其中，在一些具体实施例中，形成第一光刻胶71和第二光刻胶72步骤包括：现在第二绝缘层64的表面上形成等厚度的整层光刻胶，之后利用半色调掩膜板以及灰化工艺除去处第一区域和第二区域之外的光刻胶，并将第二区域处设置光刻胶减薄，从而得到第一光刻胶71和第二光刻胶72。
S330：去除未被第一光刻胶71和第二光刻胶72覆盖的第一透明导电层4120、银层4130和第二透明导电层4140。通过上述步骤得到第一阳极和连接线的初步形状。
S340：对第一光刻胶71和第二光刻胶72进行灰化处理，以便去除第二光刻胶72，并将第一光刻胶71减薄。在一些实施例中，可以通过灰化工艺去除第二光刻胶72，并将第一光刻胶71减薄。
S350：通过刻蚀工艺去除第二区域处的第二透明导电层4140和所述银层4130，保留所述第一透明导电层4120，从而得到所述连接线50。
在上述步骤中，可以通过控制刻蚀速率和刻蚀时间去除第二区域处的第二透明导电层4140和所述银层4130，且保留第一透明导电层4120。其中，具体的刻蚀速率和刻蚀时间，本领域技术人员可以根据各层结构的厚度、材料等实际情况灵活选择，在此不作限制要求。
S360：去除减薄后的所述第一光刻胶71，得到所述第一阳极411。
根据本公开的实施例，制作显示面板的方法还包括：参照图13，在第二绝缘层64远离衬底基板的表面上形成像素界定层65，且在形成第一阳极和连接线之后再形成像素界定层65，且像素界定层64覆盖连接线50以及第一阳极411的一部分，像素界定层65限定出多个开口，发光器件设置在所述开口中。
根据本公开的实施例，根据本公开的实施例，参照图3、图12和图13，制作显示面板的方法还包括：制作多个第二发光器件42的步骤，所述第二发光器件42位于所述第二显示区b内。在一些实施例中，如图12所示，第二像素电路22通过贯穿第一绝缘层63和第二绝缘层64的第三过孔643直接与所述第二发光器件42中的第二阳极421电连接，以驱动所述第二发光器件发光；在另一些实施例中，如图13所示，显示面板还包括导电层70，导电层70与走线30同层设置(即导电层70与走线30同材料且同步工艺形成)，第二阳极421通过导电层70与第二像素电路22电连接，即第二阳极421通过贯穿第二绝缘层64的第一过孔641与导电层电连接，导电层70又通过贯穿第一绝缘层63的第二过孔631与第二像素电路电连接，进而实现第二像素电路与第二阳极的电连接，使得第二像素电路驱动第二发光器件发光。
另外，参照图12和图13，第二发光器件42除了包括前面所述的第二阳极421之外，还包括发光层422和阴极423。在一些实施例中，第二发光器件42还可以包括空穴传输层、 空穴注入层、电子传输层能和电子注入层等结构中的至少之一，本领域技术人员根据实际设计要求灵活选择即可。
根据本公开的实施例，参照图4和图5，走线30与连接线50通过第一过孔641电连接，第一过孔641位于所述第一显示区内。根据本公开的实施例，参照图4和图6，在远离所述衬底基板10的方向上，第一阳极411依次层叠设置的第一透明电极412、银电极413和第二透明电极414，连接线50与所述第一透明电极412为一体形成结构，即连接线50与所述第一透明电极412同层设置，且通过同一步骤制备得到。由此，不仅可以提高第一显示区的透光率，还可以有效缓解屏下摄像头拍照时产生的眩光和衍射等不良现象。
另外，参照图4和图12，显示面板还包括像素界定层65，像素界定层65设置在第二绝缘层64远离衬底基板的表面，且限定出多个开口，其中，第一发光器件和第二发光器件设置在所述开口中。
根据本公开的实施例，参照图5，第一阳极411包括所述有效发光阳极区4111和围绕所述有效发光阳极区4111设置的非发光阳极区4112，所述有效发光阳极区4111在衬底基板上的正投影大于等于所述第一发光器件中的像素界定层65限定出的开口651在所述衬底基板上的正投影重叠，所述非发光阳极区4112被所述像素界定层覆盖。在一些实施例中，非发光阳极区的结构也包括依次设置的第一透明电极412、银电极413和第二透明电极414，即与有效发光阳极区4111的结构相同；在另一些实施例中，非发光阳极区4112仅包括所述第一透明电极412，即在制备过程中，刻蚀去除连接线上层的银电极413和第二透明电极414时，同时也将非发光阳极区4112对应的银电极413和第二透明电极414去除，仅保留第一透明电极412，结构示意图可参照图7。
本领域技术人员可以理解，第二发光器件与第一发光器件同步进行制作，即第一阳极与第二发光器件中的第二阳极也是通过进行制作完成的。
在本公开的又一方面，本公开提供了一种显示装置。根据本公开的实施例，该显示装置包括：前面所述的显示面板，所述显示面板的显示区包括第一显示区和第二显示区；屏下功能层，所述屏下功能层在所述显示面板上的正投影与所述第一显示区有重叠区域，或者说，屏下功能层在所述显示面板上的正投影与屏下功能区重叠。由此，该显示装置中可以满足屏下功能层对高进光量的要求。当屏下功能层为屏下摄像头时，屏下摄像头具有较佳的进光量，进而保证其较高的拍摄质量。本领域技术人员可以理解，该显示装置具有前面所述的显示面板的所有特征和优点，在此不再过多的赘述。
根据本公开的实施例，上述显示装置的具体种类没有特殊要求，本领域技术人员可以根据实际情况灵活选择。在一些实施例中，显示装置的具体种类包括但不限于手机、 笔记本、kindle、iPad、电视、游戏机等一切具有显示功能的显示装置。
本领域技术人员可以理解，该显示装置除了前面所述的显示面板，还包括常规显示装置所必备的结构或部件，以手机为例，除了前面所述的显示面板，还包括玻璃盖板、电池后盖、中框、主板、触控模组、音频模组、摄像模组等必备的结构或部件。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本公开的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外，在不相互矛盾的情况下，本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
尽管上面已经示出和描述了本公开的实施例，可以理解的是，上述实施例是示例性的，不能理解为对本公开的限制，本领域的普通技术人员在本公开的范围内可以对上述实施例进行变化、修改、替换和变型。

Claims (12)

  1. 一种显示面板，其特征在于，所述显示面板的显示区包括第一显示区和第二显示区，所述第一显示区中的像素电路密度小于所述第二显示区中的像素电路密度；所述显示面板包括：
    衬底基板；
    多个第一像素电路，所述第一像素电路设置在所述衬底基板的一侧，且位于所述第二显示区内；
    走线，所述走线设置在所述第一像素电路远离所述衬底基板的一侧；
    第一发光器件，所述第一发光器件设置在所述走线远离所述衬底基板的一侧，且位于所述第一显示区内，其中，在远离所述衬底基板的方向上，所述第一发光器件中的第一阳极的有效发光阳极区包括至少两层导电层，所述至少两层导电层包括第一透明电极；
    连接线，所述连接线与所述第一透明电极同层且电连接设置；
    其中，所述走线用于电连接所述第一像素电路和所述连接线，以便所述第一像素电路驱动所述第一发光器件发光。
  2. 根据权利要求1所述的显示面板，其特征在于，所述走线与所述连接线通过第一过孔电连接，所述第一过孔位于所述第一显示区内。
  3. 根据权利要求1所述的显示面板，其特征在于，在远离所述衬底基板的方向上，所述第一阳极包括依次层叠设置的所述第一透明电极、银电极和第二透明电极，所述连接线与所述第一透明电极为一体结构。
  4. 根据权利要求2所述的显示面板，其特征在于，所述显示面板还包括：
    第一绝缘层，所述第一绝缘层设置在所述第一像素电路远离所述衬底基板的一侧，且具有贯穿所述第一绝缘层的第二过孔，其中，所述走线位于所述第一绝缘层远离所述衬底基板的一侧，且所述走线通过所述第二过孔与所述第一像素电路电连接；
    第二绝缘层，所述第二绝缘层设置在所述第一绝缘层远离所述衬底基板的一侧，且覆盖所述走线，并具有贯穿所述第二绝缘层的所述第一过孔，其中，所述连接线设置在所述第二绝缘性层远离衬底基板的一侧。
  5. 根据权利要求2或4所述的显示面板，其特征在于，多个所述第一过孔呈多行排列设置，所述走线位于相邻两行的所述第一过孔之间。
  6. 根据权利要求1所述的显示面板，其特征在于，所述第一阳极包括所述有效发光阳极区和围绕所述有效发光阳极区设置的非发光阳极区，所述有效发光阳极区在衬底基板上的正投影大于等于所述第一发光器件中的像素界定层限定出的开口在所述衬底基板上的正 投影重叠，所述非发光阳极区被所述像素界定层覆盖，其中所述非发光阳极区仅包括所述第一透明电极。
  7. 根据权利要求1～4中任一项所述的显示面板，其特征在于，所述显示区还包括屏下功能区，所述屏下功能区与所述第一显示区具有交叠区域。
  8. 根据权利要求1～4中任一项所述的显示面板，其特征在于，所述显示面板还包括：
    多个第二像素电路和多个第二发光器件，且所述第二像素电路和所述第二发光器件均位于所述第二显示区内，所述第二像素电路与所述第二发光器件中的第二阳极的连接方式为以下至少之一：
    所述第二像素电路通过第三过孔直接与所述第二发光器件中的第二阳极电连接，以驱动所述第二发光器件发光；
    所述显示面板还包括导电层，所述导电层与所述走线同层设置，所述第二阳极通过贯穿所述第二绝缘层的第四过孔与所述导电层电连接，所述导电层通过贯穿所述第一绝缘层的第五过孔与所述第二像素电路电连接，以驱动所述第二发光器件发光。
  9. 一种制作权利要求1～8中任一项所述显示面板的方法，其特征在于，所述显示面板的显示区包括第一显示区和第二显示区，所述第一显示区中的像素电路密度小于所述第二显示区中的像素电路密度；所述方法包括：
    在衬底基板的一侧形成多个第一像素电路，且所述第一像素电路位于所述第二显示区内；
    在所述第一像素电路远离所述衬底基板的一侧形成走线，且所述走线与所述第一像素电路电连接；
    在所述走线远离所述衬底基板的一侧形成第一发光器件和连接线，所述第一发光器件位于所述第一显示区内，其中，在远离所述衬底基板的方向上，所述第一发光器件中的第一阳极的有效发光阳极区包括至少两层导电层，所述至少两层导电层中至少之一包括第一透明电极，所述连接线与所述第一透明电极电连接设置且是通过同一步骤形成，
    其中，所述走线与所述连接线电连接设置，以便所述第一像素电路驱动所述第一发光器件发光。
  10. 根据权利要求9所述的方法，其特征在于，所述方法还包括：
    在所述第一像素电路远离所述衬底基板的一侧沉积第一绝缘材料层，在所述第一绝缘材料层中制作贯穿所述第一绝缘材料层的第二过孔，以形成具有所述第二过孔的第一绝缘层；
    在所述第一绝缘层远离所述衬底基板的一侧沉积第二绝缘材料层，在所述第二绝缘材 料层中制作贯穿所述第二绝缘材料层的第一过孔，以形成具有所述第一过孔的第二绝缘层；
    其中，所述走线位于所述第一绝缘层和第二绝缘层之间，并通过所述第二过孔与所述第一像素电路电连接；所述连接线设置在所述第二绝缘性层远离衬底基板的一侧，并通过所述第一过孔与所述走线电连接。
  11. 根据权利要求10所述的方法，其特征在于，所述第一阳极和所述连接线的形成步骤包括：
    在所述第二绝缘层远离所述衬底基板的表面上依次沉积形成第一透明导电层、银层和第二透明导电层；
    在所述第二透明导电层的表面上的第一区域和第二区域分别形成第一光刻胶和第二光刻胶，所述第一光刻胶的厚度大于所述第二光刻胶的厚度；
    去除未被所述第一光刻胶和所述第二光刻胶覆盖的所述第一透明导电层、所述银层和所述第二透明导电层；
    对所述第一光刻胶和所述第二光刻胶进行灰化处理，以便去除所述第二光刻胶，并将所述第一光刻胶减薄；
    通过刻蚀工艺去除第二区域处的所述第二透明导电层和所述银层，保留所述第一透明导电层，从而得到所述连接线；
    去除减薄后的所述第一光刻胶，得到所述第一阳极。
  12. 一种显示装置，其特征在于，包括：
    权利要求1～8中任一项所述的显示面板，所述显示面板的显示区包括第一显示区和第二显示区；
    屏下功能层，所述屏下功能层在所述显示面板上的正投影与所述第一显示区有重叠区域。
PCT/CN2020/130434 2020-11-20 2020-11-20 显示面板及其制作方法和显示装置 WO2022104702A1 (zh)

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