WO2021057066A1 - 显示基板、显示面板及显示装置 - Google Patents

显示基板、显示面板及显示装置 Download PDF

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Publication number
WO2021057066A1
WO2021057066A1 PCT/CN2020/093762 CN2020093762W WO2021057066A1 WO 2021057066 A1 WO2021057066 A1 WO 2021057066A1 CN 2020093762 W CN2020093762 W CN 2020093762W WO 2021057066 A1 WO2021057066 A1 WO 2021057066A1
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Prior art keywords
layer
electrode
area
display
transparent conductive
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PCT/CN2020/093762
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English (en)
French (fr)
Inventor
楼均辉
金玉
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昆山国显光电有限公司
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Application filed by 昆山国显光电有限公司 filed Critical 昆山国显光电有限公司
Publication of WO2021057066A1 publication Critical patent/WO2021057066A1/zh
Priority to US17/501,428 priority Critical patent/US11737304B2/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/816—Multilayers, e.g. transparent multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80517—Multilayers, e.g. transparent multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/302—Details of OLEDs of OLED structures
    • H10K2102/3023—Direction of light emission
    • H10K2102/3026—Top emission
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80518—Reflective anodes, e.g. ITO combined with thick metallic layers

Definitions

  • This application relates to the technical field of OLED display devices, and in particular to a display substrate, a display panel and a display device.
  • the present application provides a display substrate, a display panel, and a display device to solve the above-mentioned shortcomings.
  • a display substrate including: a substrate, including a first region and a second region; a planarization layer, located on the substrate, covering the first region and the The second region; an intermediate layer, located on the planarization layer, the intermediate layer includes at least one transparent conductive sublayer and at least one isolation protective sublayer, the projection of the at least one transparent conductive sublayer on the substrate Located in the first area, the projection of the at least one isolation protection sublayer on the substrate is located in the second area; the first electrode layer is located on the intermediate layer, and the first electrode layer includes at least One first electrode and at least one second electrode, the at least one first electrode is located on the at least one transparent conductive sub-layer, and the at least one second electrode is located on the at least one isolation protective sub-layer.
  • a display panel including the above-mentioned display substrate and an encapsulation layer, the encapsulation layer is located on the display substrate; the display panel includes a first display area and a second display area , The light transmittance of the first display area is greater than the light transmittance of the second display area; the projection of the first display area on the substrate is located in the first area, and the second display area The projection on the substrate is located in the second zone.
  • a display device including: a device body having a device area; and the above-mentioned display panel, the display panel covering the device body; wherein the device area is located Below the first display area, and the device area includes a photosensitive device that emits or collects light passing through the first display area.
  • the intermediate layer on the planarization layer includes the isolation protection sublayer, and the second electrode is on the isolation protection sublayer, during the manufacturing process, even if the planarization layer under the second electrode is Because the second electrode and the planarization layer are separated by the intermediate layer, the second electrode can be prevented from being affected by damage to the planarization layer underneath, and display abnormalities can be improved, and yield can be improved.
  • Figure 1 is a schematic diagram showing the structure of a full screen
  • Fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • Fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the present application.
  • Figure 1 shows a full screen, which includes a non-transparent display area and a transparent display area.
  • the transparent display area can achieve both light transmission and display functions.
  • photosensitive elements such as a camera and a distance sensor are arranged under the transparent display area.
  • the full screen includes a substrate 11, a driving circuit layer 12 and a planarization layer 13.
  • first opaque anodes 14 arranged in an array on the planarization layer 13.
  • the first opaque anodes 14 can be connected to the corresponding pixel circuit through the transparent lead 15 below, or connected to other first opaque anodes 14 .
  • second opaque anodes 16 arranged in an array on the planarization layer 13. As shown in FIG.
  • the full screen also includes a pixel definition layer 17, an organic light-emitting layer 18 and a cathode 19.
  • the first opaque anode 14 may include indium tin oxide (ITO), silver (Ag), and indium tin oxide layered in sequence
  • the second opaque anode 16 may include indium tin oxide, silver, and tin oxide layered in sequence. Indium tin oxide.
  • the transparent lead 15 is usually prepared first, and then the first opaque anode 14 and the second opaque anode 16 are prepared.
  • the portion of the planarization layer 13 located in the non-transparent display area undergoes two film formation and two etchings. Since the material of the planarization layer 13 is an organic material, the stability is relatively poor. Therefore, after the portion of the planarization layer 13 located in the non-transparent display area undergoes two film formation and two etchings, the portion of the planarization layer 13 is located in the non-transparent display area. The part of the display area is easily damaged, which will cause the second opaque anode 16 in the non-transparent display area to be unstable, resulting in the migration of silver, and thus the display abnormality.
  • embodiments of the present application provide a display substrate, a display panel, and a display device, which can avoid display abnormalities caused by damage to the planarization layer and improve yield.
  • the embodiment of the present application provides a display panel.
  • the display panel 2 includes a first display area 21 and a second display area 22.
  • the light transmittance of the first display area 21 is greater than the light transmittance of the second display area 22.
  • the display panel 2 includes a display substrate and an encapsulation layer, and the encapsulation layer is located on the display substrate.
  • the display substrate includes a substrate 11, a planarization layer 13, an intermediate layer 31 and a first electrode layer 32.
  • the substrate 11 includes a first area and a second area.
  • the projection of the first display area 21 on the substrate 11 is located in the first area, and the projection of the second display area 22 on the substrate 11 is located in the second area. Area.
  • the planarization layer 13 is located on the substrate 11 and covers the first area and the second area.
  • the intermediate layer 31 is located on the planarization layer 13, and the first electrode layer 32 is located on the intermediate layer 31.
  • the intermediate layer 31 includes a transparent conductive sublayer 311 and an isolation protection sublayer 312. The projection of the transparent conductive sublayer 311 on the substrate 11 is located in the first area, and the projection of the isolation protection sublayer 312 on the substrate is located in the second area.
  • the first electrode layer 32 includes a first electrode 321 and a second electrode 322. The first electrode 321 is located on the transparent conductive sub-layer 311, and the second electrode 322 is located on the isolation protective sub-layer 312.
  • the intermediate layer located on the planarization layer includes an isolation protection sublayer, and the second electrode is located on the isolation protection sublayer, during the manufacturing process, even if the planarization layer under the second electrode is damaged Since the second electrode and the planarization layer are separated by the intermediate layer, the second electrode can be prevented from being affected by damage to the planarization layer underneath, and display abnormalities can be improved, and yield can be improved.
  • the first display area 21 may include a plurality of first pixels arranged in an array
  • the second display area 22 may include a plurality of second pixels arranged in an array.
  • the intermediate layer 31 may include a plurality of transparent conductive sub-layers 311 arranged in an array and a plurality of isolation protection sub-layers 312 arranged in an array.
  • a plurality of transparent conductive sub-layers 311 are located in the first display area 21, and a plurality of isolation protection sub-layers 312 are located in the second display area 22.
  • the first electrode layer 32 may include a plurality of first electrodes 321 arranged in an array and a plurality of second electrodes 322 arranged in an array.
  • a first pixel includes a first electrode 321, and the first electrode 321 is the anode of the first pixel.
  • a second pixel includes a second electrode 322, and the second electrode 322 is the anode of the second pixel. That is, the first display area 21 includes a plurality of first electrodes 321 arranged in an array, and the second display area 22 includes a plurality of second electrodes 322 arranged in an array.
  • a first electrode 321 is located on a transparent conductive sub-layer 311, and a second electrode 322 is located on an isolation protection sub-layer 312.
  • the surface of the first electrode 321 away from the substrate 11 is flush with the surface of the second electrode 322 away from the substrate 11.
  • the area of the first electrode 321 is smaller than the area of the second electrode 322, and the density of the first pixels in the first display area 21 is less than or equal to the density of the second pixels in the second display area 22.
  • the distance between two adjacent first electrodes 321 is greater than the distance between two adjacent second electrodes 322. Since the area of the first electrode 321 is relatively small, and the distance between two adjacent first electrodes is greater than the distance between two adjacent second electrodes. Therefore, the light transmittance of the first display area can be improved. Since the area of the second electrode 322 is relatively large, the aperture ratio of the second pixel can be increased.
  • the material of the transparent conductive sublayer 311 is the same as the material of the isolation protection sublayer 312, that is, the material of the isolation protection sublayer 312 is also a transparent conductive material, and the isolation protection sublayer 312 can also be conductive.
  • the transparent conductive sub-layer 311 and the isolation protection sub-layer 312 can be formed in the same process step. Since the material of the transparent conductive sublayer is the same as the material of the isolation protection sublayer, and the transparent conductive sublayer and the isolation protection sublayer are formed in the same process step, the manufacturing process can be simplified and the cost can be reduced.
  • the material of the transparent conductive sub-layer 311 is indium tin oxide (ITO), and the material of the isolation protection sub-layer 312 is also indium tin oxide (ITO).
  • ITO indium tin oxide
  • the material of the transparent conductive sub-layer can also be graphene, indium zinc oxide or indium tin zinc oxide.
  • the material of the isolation and protection sub-layer can also be graphene, indium zinc oxide or indium tin zinc oxide.
  • the first electrode 321 is an opaque electrode
  • the second electrode 322 is an opaque electrode. Since the first electrode 321 is an opaque electrode, the light emitted from the light-emitting structure on the first electrode 321 toward the first electrode 321 can be reflected to the light-emitting surface, thereby improving the light-emitting efficiency of the light-emitting structure in the first display area. Since the second electrode is an opaque electrode, the light emitted from the light-emitting structure on the second electrode toward the second electrode can be reflected to the light-emitting surface, thereby improving the light-emitting efficiency of the light-emitting structure in the second display area.
  • the first electrode 321 includes a first transparent conductive layer, a first metal layer, and a second transparent conductive layer stacked in sequence.
  • the first transparent conductive layer is located on the intermediate layer 31.
  • the second electrode 322 includes a third transparent conductive layer, a second metal layer, and a fourth transparent conductive layer stacked in sequence.
  • the third transparent conductive layer is located on the intermediate layer 31.
  • the second electrode 322 includes a second metal layer and a third transparent conductive layer stacked in sequence.
  • the second metal layer is located on the intermediate layer 31.
  • the second electrode can be a structure of a third transparent conductive layer, a second metal layer, and a fourth transparent conductive layer that are sequentially stacked, or a second metal layer and a second metal layer that are stacked sequentially.
  • Three transparent conductive layer structure Since the isolation and protection sublayer can be conductive, the second electrode can be a structure of a third transparent conductive layer, a second metal layer, and a fourth transparent conductive layer that are sequentially stacked, or a second metal layer and a second metal layer that are stacked sequentially.
  • Three transparent conductive layer structure is possible.
  • the material of the first transparent conductive layer, the material of the second transparent conductive layer, the material of the third transparent conductive layer, and the material of the fourth transparent conductive layer may be ITO, but are not limited thereto.
  • the material of the first metal layer and the material of the second metal layer may be silver, but is not limited thereto.
  • the display substrate also includes a first pixel circuit.
  • the first electrode 321 is connected to the first pixel circuit via the transparent conductive sub-layer 311. In this way, the first electrode 321 can be connected to the first pixel circuit through the transparent conductive sublayer.
  • the projection of the first pixel circuit on the substrate 11 is located in the first area. That is, the first pixel circuit is located in the first display area. In another embodiment, the projection of the first pixel circuit on the substrate 11 is located in the second area, that is, the first pixel circuit is located in the second display area. Since the pixel circuits of the pixels in the first display area are located in the second display area, the light transmittance of the first display area can be improved.
  • the display substrate further includes an organic light-emitting layer 18.
  • the organic light emitting layer 18 is located on the first electrode layer 32.
  • each first electrode 321 includes m electrode blocks, and m is a natural number.
  • m can be 1, 2, 3, or other natural numbers.
  • the organic light-emitting layer 18 includes light-emitting structures of n light-emitting colors, and n is a natural number.
  • the organic light-emitting layer 18 includes a light-emitting structure with a red light-emitting color, a light-emitting structure with a green light-emitting color, and a light-emitting structure with a blue light-emitting color, but it is not limited thereto.
  • n can also be 1, 2, or other natural numbers.
  • each electrode block is provided with a light-emitting structure, and the light-emitting structure on the same first electrode has the same light-emitting color.
  • one first electrode 321 includes four electrode blocks, the light-emitting structures on the four electrode blocks have the same light-emitting color.
  • the intermediate layer includes a plurality of transparent conductive sublayers 311, and all electrode blocks in the same first electrode 321 are located on the same transparent conductive sublayer. All the electrode blocks in the same first electrode can be electrically connected through the same transparent conductive sublayer, so that the light-emitting structures on all the electrode blocks in the same first electrode can emit light at the same time.
  • Each second electrode 322 is provided with a light-emitting structure.
  • the contact area between the light-emitting structure on the second electrode 322 and the second electrode 322 is the pixel display area.
  • the first projection of the pixel display area on the planarization layer 13 is located in the corresponding area.
  • the isolation protection sub-layer 312 is within the second projection on the planarization layer 13, and the edge of the first projection does not coincide with the edge of the second projection. Since the edge of the first projection and the edge of the second projection do not overlap, the edge of the isolation protection sub-layer can be prevented from affecting the flatness of the second electrode, thereby preventing the display quality from being affected.
  • the area of the isolation protection sub-layer 312 is substantially the same as the area of the second electrode 322. Specifically, the area of the isolation protection sublayer 312 is the same as the area of the second electrode 322. Alternatively, the difference between the area of the isolation protection sub-layer 312 and the area of the second electrode 322 is within a specified range.
  • the above-mentioned display substrate further includes a second electrode layer 33.
  • the second electrode layer 33 is located on the organic light emitting layer 18.
  • the second electrode layer 33 may include a surface electrode located in the first display area 21 and the second display area 22.
  • the surface electrode is the cathode of the first pixel and the second pixel.
  • the above-mentioned display substrate further includes a driving circuit layer 12.
  • the driving circuit layer 12 is located between the substrate 11 and the planarization layer 13.
  • the material of the portion of the driving circuit layer 12 located in the first display area 21 may be a material with a higher light transmittance, so as to increase the light transmittance of the first display area 21.
  • the above-mentioned display substrate further includes a pixel definition layer 17.
  • the pixel definition layer 17 is located on the planarization layer 13 and is used to isolate two adjacent pixels.
  • the material of the pixel definition layer 17 may be an organic material.
  • the material of the pixel definition layer 17 may be polymethylmethacrylate or epoxy resin.
  • the embodiment of the present application also proposes a display substrate, which is included in the above-mentioned display panel.
  • the display substrate includes: a substrate, a planarization layer, an intermediate layer and a first electrode layer.
  • the substrate includes a first area and a second area; the planarization layer 13 is located on the substrate 11 and covers the first area and the second area.
  • the intermediate layer is located on the planarization layer.
  • the intermediate layer includes a transparent conductive sublayer and an isolation protection sublayer. The projection of the transparent conductive sublayer on the substrate is located in the first area, and the projection of the isolation protection sublayer on the substrate is located in the second area. .
  • the first electrode layer is located on the intermediate layer.
  • the first electrode layer includes a first electrode and a second electrode. The first electrode is located on the transparent conductive sub-layer, and the second electrode is located on the isolation protective sub-layer.
  • the intermediate layer located on the planarization layer includes an isolation protection sublayer, and the second electrode is located on the isolation protection sublayer, during the manufacturing process, even if the planarization layer under the second electrode is damaged Since the second electrode and the planarization layer are separated by the intermediate layer, the second electrode can also be prevented from being affected by damage to the planarization layer underneath, which can improve display abnormalities and increase yield.
  • the embodiment of the present application also proposes a display device, including the device body and the display panel of any of the above embodiments.
  • the display panel is covered on the device body, and the device body has a device area.
  • the device area is located below the first display area, and the device area includes a photosensitive device that emits or collects light passing through the first display area.
  • the photosensitive device includes at least one of the following: a camera, a light sensor, or a light emitter.
  • the intermediate layer located on the planarization layer includes an isolation protection sublayer, and the second electrode is located on the isolation protection sublayer, during the manufacturing process, even if the planarization layer under the second electrode is damaged Since the second electrode and the planarization layer are separated by the intermediate layer, the second electrode can be prevented from being affected by damage to the planarization layer underneath, and display abnormalities can be improved, and yield can be improved.
  • the display device in this embodiment may be any product or component with a display function, such as electronic paper, mobile phone, tablet computer, television, notebook computer, digital photo frame, navigator, etc.

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Abstract

提供一种显示基板、显示面板及显示装置。显示基板包括：衬底（11）、平坦化层（13）、中间层（31）与第一电极层（32）。衬底包括第一区与第二区；平坦化层位于衬底上，覆盖第一区与第二区；中间层位于平坦化层上，中间层包括至少一个透明导电子层（311）与至少一个隔离保护子层（312），透明导电子层在衬底上的投影位于第一区，隔离保护子层在衬底上的投影位于第二区；第一电极层位于中间层上，第一电极层包括至少一个第一电极（321）与至少一个第二电极（322），第一电极位于透明导电子层上，第二电极位于隔离保护子层上。

Description

显示基板、显示面板及显示装置 技术领域
本申请涉及OLED显示设备技术领域，尤其涉及一种显示基板、显示面板及显示装置。
背景技术
随着显示装置的快速发展，用户对屏幕占比的要求越来越高。由于屏幕顶部需要安装摄像头、传感器、听筒等元件，因此，屏幕顶部通常会预留一部分区域用于安装上述元件，例如，苹果手机iphoneX的“刘海”区域，影响了屏幕的整体一致性。目前，全面屏显示受到业界越来越多的关注。
发明内容
本申请提供一种显示基板、显示面板及显示装置，以解决上述的不足。
根据本申请实施例的第一方面，提供一种显示基板，包括：衬底，包括第一区与第二区；平坦化层，位于所述衬底上，覆盖所述第一区与所述第二区；中间层，位于所述平坦化层上，所述中间层包括至少一个透明导电子层与至少一个隔离保护子层，所述至少一个透明导电子层在所述衬底上的投影位于所述第一区，所述至少一个隔离保护子层在所述衬底上的投影位于所述第二区；第一电极层，位于所述中间层上，所述第一电极层包括至少一个第一电极与至少一个第二电极，所述至少一个第一电极位于所述至少一个透明导电子层上，所述至少一个第二电极位于所述至少一个隔离保护子层上。
根据本申请实施例的第二方面，提供一种显示面板，包括上述的显示基板与封装层，所述封装层位于所述显示基板上；所述显示面板包括第一显示区与第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率；所述第一显示区在所述衬底上的投影位于所述第一区，所述第二显示区在所述衬底上的投影位于所述第二区。
根据本申请实施例的第三方面，提供一种显示装置，包括：设备本体，具有器件区；以及上述的显示面板，所述显示面板覆盖在所述设备本体上；其中，所述器件区位于所述第一显示区的下方，且所述器件区包括发射或者采集透过所述第一显示区的光线的感光器件。
根据上述实施例可知，由于位于平坦化层上的中间层包括隔离保护子层，且第二电极位于隔离保护子层上，因此，在制备过程中，即使位于第二电极下方的平坦化层受损，由于第二电极与平坦化层被中间层隔开，因此，可以避免第二电极因其下方的平坦化层受损而受影响，可以改善显示异常，提升良率。
以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本申请。
附图说明
图1是示出了一种全面屏的结构示意图；
图2是根据本申请实施例示出的一种显示面板的结构示意图；
图3是根据本申请实施例示出的一种显示基板的结构示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。
图1示出了一种全面屏，该全面屏包括非透明显示区与透明显示区，透明显示区既可以实现透光功能，也可以实现显示功能。其中，透明显示区的下方设置有摄像头、距离传感器等感光元件。全面屏包括衬底11、驱动电路层12与平坦化层13。在透明显示区，平坦化层13上存在阵列排布的第一不透明阳极14，第一不透明阳极14可通过其下方的透明引线15连接至对应的像素电路，或者与其他第一不透明阳极14连接。在非透明显示区，平坦化层13上存在阵列排布的第二不透明阳极16。如图1所示，全面屏还包括像素定义层17、有机发光层18以及阴极19。其中，第一不透明阳极14可包括依次层叠的氧化铟锡(Indium tin oxide，简称为ITO)、银(Ag)、氧化铟锡，第二不透明阳极16可包括依次层叠的氧化铟锡、银、氧化铟锡。
在制备上述的全面屏的过程中，通常先制备透明引线15，再制备第一不透明阳极14与第二不透明阳极16。这样，平坦化层13的位于非透明显示区的部分经历了两次成膜、两次刻蚀。由于平坦化层13的材料为有机材料，稳定性比较差，因此，平坦化层13的位于非透明显示区的部分经历两次成膜、两次刻蚀之后，平坦化层13的位于非透明显 示区的部分容易受损，会引起非透明显示区中第二不透明阳极16不稳定，导致银发生迁移，进而导致显示异常。
针对上述的技术问题，本申请实施例提供一种显示基板、显示面板及显示装置，可以避免因平坦化层受损而导致的显示异常，提升良率。
本申请实施例提供一种显示面板。如图2所示，该显示面板2包括第一显示区21与第二显示区22。其中，第一显示区21的透光率大于第二显示区22的透光率。
该显示面板2包括显示基板与封装层，封装层位于显示基板上。如图3所示，显示基板包括衬底11、平坦化层13、中间层31与第一电极层32。
如图3所示，衬底11包括第一区与第二区，第一显示区21在衬底11上的投影位于第一区，第二显示区22在衬底11上的投影位于第二区。
如图3所示，平坦化层13位于衬底11上，覆盖第一区与第二区。中间层31位于平坦化层13上，第一电极层32位于中间层31上。其中，中间层31包括透明导电子层311与隔离保护子层312，透明导电子层311在衬底11上的投影位于第一区，隔离保护子层312在衬底上的投影位于第二区。第一电极层32包括第一电极321与第二电极322，第一电极321位于透明导电子层311上，第二电极322位于隔离保护子层312上。
本实施例中，由于位于平坦化层上的中间层包括隔离保护子层，且第二电极位于隔离保护子层上，因此，在制备过程中，即使位于第二电极下方的平坦化层受损，由于第二电极与平坦化层被中间层隔开，可以避免第二电极因其下方的平坦化层受损而受影响，可以改善显示异常，提升良率。
在一个实施例中，第一显示区21可包括阵列排布的多个第一像素，第二显示区22可包括阵列排布的多个第二像素。中间层31可包括阵列排布的多个透明导电子层311与阵列排布的多个隔离保护子层312。多个透明导电子层311位于第一显示区21，多个隔离保护子层312位于第二显示区22。第一电极层32可包括阵列排布的多个第一电极321与阵列排布的多个第二电极322。其中，一个第一像素包括一个第一电极321，第一电极321为第一像素的阳极。一个第二像素包括一个第二电极322，第二电极322为第二像素的阳极。也就是，第一显示区21包括阵列排布的多个第一电极321，第二显示区22包括阵列排布的多个第二电极322。一个第一电极321位于一个透明导电子层311上，一个第二电极322位于一个隔离保护子层312上。
在一个实施例中，第一电极321远离衬底11的表面与第二电极322远离衬底11的 表面齐平。
在一个实施例中，第一电极321的面积小于第二电极322的面积，且第一显示区21中第一像素的密度小于或等于第二显示区22中第二像素的密度。相邻两个第一电极321之间的间距大于相邻两个第二电极322之间的间距。由于第一电极321的面积比较小，且相邻两个第一电极之间的间距大于相邻两个第二电极之间的间距。因此，可以提高第一显示区的透光率。由于第二电极322的面积比较大，可以提高第二像素的开口率。
透明导电子层311的材料与隔离保护子层312的材料相同，也就是，隔离保护子层312的材料也是透明的导电材料，隔离保护子层312也可以导电。在本实施例中，透明导电子层311与隔离保护子层312可以在同一工艺步骤中形成。由于透明导电子层的材料与隔离保护子层的材料相同，且透明导电子层与隔离保护子层在同一工艺步骤中形成，这样，可以简化制备工艺，降低成本。
例如，透明导电子层311的材料为氧化铟锡(ITO)，隔离保护子层312的材料也为氧化铟锡(ITO)。当然，透明导电子层的材料还可以为石墨烯、氧化铟锌或者氧化铟锡锌。相应地，隔离保护子层的材料还可以为石墨烯、氧化铟锌或者氧化铟锡锌。
可选的，第一电极321为不透明电极，第二电极322为不透明电极。由于第一电极321为不透明电极，可以将第一电极321上的发光结构朝向第一电极321发射的光反射至出光面，提高第一显示区中发光结构的出光效率。由于第二电极为不透明电极，可以将第二电极上的发光结构朝向第二电极发射的光反射至出光面，提高第二显示区中发光结构的出光效率。
可选的，第一电极321包括依次层叠的第一透明导电层、第一金属层与第二透明导电层。第一透明导电层位于中间层31上。第二电极322包括依次层叠的第三透明导电层、第二金属层与第四透明导电层。第三透明导电层位于中间层31上。或者，第二电极322包括依次层叠的第二金属层与第三透明导电层。第二金属层位于中间层31上。由于隔离保护子层可以导电，因此，第二电极既可以为依次层叠的第三透明导电层、第二金属层与第四透明导电层的结构，也可以为依次层叠的第二金属层与第三透明导电层的结构。
第一透明导电层的材料、第二透明导电层的材料、第三透明导电层的材料、第四透明导电层的材料可为ITO，但不限于此。第一金属层的材料、第二金属层的材料可为银，但不限于此。
显示基板还包括第一像素电路。第一电极321经透明导电子层311与第一像素电路连接。这样，通过透明导电子层可以将第一电极321与第一像素电路连接起来。
第一像素电路在衬底11上的投影位于第一区。也就是，第一像素电路位于第一显示区。在另一个实施例中，第一像素电路在衬底11上的投影位于第二区，也就是，第一像素电路位于第二显示区。由于第一显示区中像素的像素电路位于第二显示区，因此，可以提升第一显示区的透光率。
如图3所示，显示基板还包括有机发光层18。有机发光层18位于第一电极层32上。在本实施例中，每个第一电极321包括m个电极块，m为自然数，例如，m可以为1、2、3或者其他自然数。有机发光层18包括n种发光颜色的发光结构，n为自然数。例如，n为3，有机发光层18包括发光颜色为红色的发光结构、发光颜色为绿色的发光结构与发光颜色为蓝色的发光结构，但不限于此。当然，n也可以为1、2、或者其他自然数。在本实施例中，每个电极块上设置有一个发光结构，同一个第一电极上的发光结构的发光颜色相同。例如，当一个第一电极321包括4个电极块时，该4个电极块上的发光结构的发光颜色相同。在本实施例中，中间层包括多个透明导电子层311，同一第一电极321中的所有电极块位于同一透明导电子层上。通过同一透明导电子层可以将同一第一电极中的所有电极块进行电连接，进而可以使同一第一电极中的所有电极块上的发光结构同时发光。
每个第二电极322上设有一个发光结构，第二电极322上的发光结构与第二电极322的接触区域为像素显示区域，该像素显示区域在平坦化层13上的第一投影位于相应的隔离保护子层312在平坦化层13上的第二投影之内，且第一投影的边缘与第二投影的边缘不重合。由于第一投影的边缘与第二投影的边缘不重合，可以避免隔离保护子层的边缘影响第二电极的平整度，进而可以避免影响显示质量。
可选的，隔离保护子层312的面积与第二电极322的面积基本相同。具体地，隔离保护子层312的面积与第二电极322的面积相同。或者，隔离保护子层312的面积与第二电极322的面积之差在指定的范围内。
如图3所示，上述的显示基板还包括第二电极层33。第二电极层33位于有机发光层18上。第二电极层33可以包括一个面电极，该面电极位于第一显示区21与第二显示区22。该面电极为第一像素与第二像素的阴极。
如图3所示，上述的显示基板还包括驱动电路层12。驱动电路层12位于衬底11与 平坦化层13之间。其中，驱动电路层12位于第一显示区21的部分的材料可采用透光率较高的材料，以提高第一显示区21的透光率。
如图3所示，上述的显示基板还包括像素定义层17。像素定义层17位于平坦化层13上，用于隔离相邻的两个像素。像素定义层17的材料可以是有机材料，例如，像素定义层17的材料可以是聚甲基丙烯酸甲酯或环氧树脂。
本申请的实施例还提出了一种显示基板，其包含于上述的显示面板中。所述显示基板包括：衬底、平坦化层、中间层与第一电极层。
其中，衬底包括第一区与第二区；平坦化层13位于衬底11上，覆盖第一区与第二区。中间层位于平坦化层上，中间层包括透明导电子层与隔离保护子层，透明导电子层在衬底上的投影位于第一区，隔离保护子层在衬底上的投影位于第二区。第一电极层位于中间层上，第一电极层包括第一电极与第二电极，第一电极位于透明导电子层上，第二电极位于隔离保护子层上。
本实施例中，由于位于平坦化层上的中间层包括隔离保护子层，且第二电极位于隔离保护子层上，因此，在制备过程中，即使位于第二电极下方的平坦化层受损，由于第二电极与平坦化层被中间层隔开，因此，也可以避免第二电极因其下方的平坦化层受损而受影响，可以改善显示异常，提升良率。
本申请的实施例还提出了一种显示装置，包括设备本体与上述任一实施例的显示面板。
显示面板覆盖在设备本体上，设备本体具有器件区。该器件区位于第一显示区的下方，且器件区包括发射或者采集透过第一显示区的光线的感光器件。其中，感光器件包括下述至少之一：摄像头、光线感应器、或光线发射器。
本实施例中，由于位于平坦化层上的中间层包括隔离保护子层，且第二电极位于隔离保护子层上，因此，在制备过程中，即使位于第二电极下方的平坦化层受损，由于第二电极与平坦化层被中间层隔开，因此，可以避免第二电极因其下方的平坦化层受损而受影响，可以改善显示异常，提升良率。
需要说明的是，本实施例中的显示装置可以为：电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本领域技术人员在考虑说明书及实践这里公开的公开后，将容易想到本申请的其它实施方案。本申请旨在涵盖本申请的任何变型、用途或者适应性变化，这些变型、用途 或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本申请的真正范围和精神由下面的权利要求指出。

Claims (16)

  1. 一种显示基板，包括：
    衬底，包括第一区与第二区；
    平坦化层，位于所述衬底上，覆盖所述第一区与所述第二区；
    中间层，位于所述平坦化层上，所述中间层包括：
    至少一个透明导电子层，所述至少一个透明导电子层在所述衬底上的投影位于所述第一区；以及
    至少一个隔离保护子层，所述至少一个隔离保护子层在所述衬底上的投影位于所述第二区；以及
    第一电极层，位于所述中间层上，所述第一电极层包括：
    位于所述至少一个透明导电子层上的至少一个第一电极，以及位于所述至少一个隔离保护子层上的至少一个第二电极。
  2. 根据权利要求1所述的显示基板，其中，所述至少一个第一电极包括多个呈阵列排布的第一电极，所述至少一个第二电极包括多个呈阵列排布的第二电极。
  3. 根据权利要求2所述的显示基板，其中，每个所述第一电极的面积小于相应的所述第二电极的面积。
  4. 根据权利要求2所述的显示基板，其中，相邻两个所述第一电极之间的间距大于相邻两个所述第二电极之间的间距。
  5. 根据权利要求1所述的显示基板，其中，所述至少一个透明导电子层的材料与所述至少一个隔离保护子层的材料相同。
  6. 根据权利要求3所述的显示基板，其中，所述多个第一电极为不透明电极，所述多个第二电极为不透明电极。
  7. 根据权利要求6所述的显示基板，其中，每个所述第一电极包括依次层叠的第一透明导电层、第一金属层与第二透明导电层，所述第一透明导电层位于所述中间层上；
    每个所述第二电极包括依次层叠的第三透明导电层、第二金属层与第四透明导电层，所述第三透明导电层位于所述中间层上；或者，
    每个所述第二电极包括依次层叠的第二金属层与第三透明导电层，所述第二金属层位于所述中间层上。
  8. 根据权利要求1所述的显示基板，其中，所述至少一个第一电极远离所述衬底的表面与所述至少一个第二电极远离所述衬底的表面齐平。
  9. 根据权利要求1所述的显示基板，还包括第一像素电路，每个所述第一电极经 相应的所述透明导电子层与所述第一像素电路连接。
  10. 根据权利要求9所述的显示基板，其中，所述第一像素电路在所述衬底上的投影位于所述第一区或者所述第二区。
  11. 根据权利要求2所述的显示基板，还包括：有机发光层，所述有机发光层位于所述第一电极层上；
    每个所述第一电极包括m个电极块，m为自然数；
    所述有机发光层包括n种发光颜色的发光结构，每个所述电极块上设置有一个发光结构，同一个所述第一电极上的发光结构的发光颜色相同，n为自然数；
    所述至少一个透明导电子层包括多个所述透明导电子层，同一所述第一电极中的所述电极块位于同一所述透明导电子层上。
  12. 根据权利要求2所述的显示基板，其中，每个所述第二电极上设有一个所述发光结构，所述一个发光结构与相应的所述第二电极的接触区域为像素显示区域，所述像素显示区域在所述平坦化层上的第一投影位于相应的所述隔离保护子层在所述平坦化层上的第二投影之内，且所述第一投影的边缘与所述第二投影的边缘不重合。
  13. 根据权利要求12所述的显示基板，其中，每个所述隔离保护子层的面积与相应的所述第二电极的面积基本相同。
  14. 一种显示面板，包括：
    如权利要求1-13任一项所述的显示基板；以及
    封装层，所述封装层位于所述显示基板上；
    所述显示面板包括第一显示区与第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率；
    所述第一显示区在所述衬底上的投影位于所述第一区，所述第二显示区在所述衬底上的投影位于所述第二区。
  15. 一种显示装置，包括：
    设备本体，具有器件区；以及
    如权利要求14所述的显示面板，所述显示面板覆盖在所述设备本体上；
    其中，所述器件区位于所述第一显示区的下方，且所述器件区包括发射或者采集透过所述第一显示区的光线的感光器件。
  16. 根据权利要求15所述的显示装置，其中，
    所述感光器件包括下述至少之一：摄像头、光线感应器、或光线发射器。
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CN111564466B (zh) * 2020-05-25 2023-11-21 京东方科技集团股份有限公司 显示基板、其制作方法和显示装置
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