WO2022100875A1 - Methods for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects and methods for forming an epitaxial wafer - Google Patents
Methods for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects and methods for forming an epitaxial wafer Download PDFInfo
- Publication number
- WO2022100875A1 WO2022100875A1 PCT/EP2020/087962 EP2020087962W WO2022100875A1 WO 2022100875 A1 WO2022100875 A1 WO 2022100875A1 EP 2020087962 W EP2020087962 W EP 2020087962W WO 2022100875 A1 WO2022100875 A1 WO 2022100875A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- silicon
- segment
- ingot
- atoms
- diameter portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/007—Pulling on a substrate
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/02—Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt
- C30B15/04—Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt adding doping materials, e.g. for n-p-junction
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/14—Heating of the melt or the crystallised materials
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/20—Controlling or regulating
- C30B15/203—Controlling or regulating the relationship of pull rate (v) to axial thermal gradient (G)
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/20—Controlling or regulating
- C30B15/206—Controlling or regulating the thermal history of growing the ingot
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
- C30B29/66—Crystals of complex geometrical shape, e.g. tubes, cylinders
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/10—Heating of the reaction chamber or the substrate
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
Definitions
- the field of the disclosure relates to preparation of single crystal silicon substrates for epitaxial growth and to methods for forming an epitaxial wafer .
- Epitaxial wafers include a single crystal silicon substrate with an epitaxial layer deposited on the front surface of the substrate. Epitaxial wafers may be used to form electronic devices suitable in microelectronic (integrated circuits or power applications) or photovoltaic use.
- Epitaxial wafers may have surface defects which degrade their performance. Some defects formed in the silicon substrate are not dissolved during the epitaxial process and are believed to lead to grown-in defect sites in the epitaxial layer (e.g., epi-stacking faults or "hillocks") following epitaxial deposition. Defect propagation through the epitaxial layer is believed to cause these grown-in defects to form. A thicker epitaxial layer, instead of covering the substrate defects, enlarges the size of the starting substrate surface defects due to the silicon epitaxial growth mode along ⁇ 111> crystallographic planes , causing larger and more visible epitaxial defects to form with increasing epitaxial layer thickness .
- One aspect of the present disclosure is directed to a method for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects .
- the silicon substrate is boron doped at a concentration of at least 2 . 8 x 10 18 atoms/cm 3 .
- An initial charge of polycrystalline silicon is added to a crucible .
- the crucible comprising the initial charge of polycrystalline silicon is heated to cause a silicon melt to form in the crucible .
- Boron is added to the crucible to produce a doped silicon melt .
- a silicon seed crystal is contacted with the doped silicon melt .
- the silicon seed crystal is withdrawn to grow a single crystal silicon ingot having a constant diameter portion.
- a segment of the constant diameter portion of the ingot has a boron concentration of at least about 2.8 x 10 18 atoms/cm 3 .
- a growth velocity, v, and/or (ii) an axial temperature gradient, G is controlled during the growth of the segment such that v/G is less than 0.20 mm 2 / (min*K) .
- a growth velocity, v, and/or (ii) an axial temperature gradient, G is controlled during the growth of the segment such that v/G is less than 0.25 mm 2 / (min*K) .
- a growth velocity, v, and/or (ii) an axial temperature gradient, G are operated at any value of v/G.
- the segment of the constant diameter portion of the ingot is cooled from its solidification temperature to 950 °C or less.
- the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150°C to 950°C is less than 160 minutes.
- Yet another aspect of the present disclosure is directed to a method for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects.
- An initial charge of polycrystalline silicon is added to a crucible.
- the crucible comprising the initial charge of polycrystalline silicon is heated to cause a silicon melt to form in the crucible.
- Boron is added to the crucible to prepare a doped silicon melt having a boron concentration of at least 3.8 x 10 18 atoms/cm 3 .
- a silicon seed crystal is contacted with the doped silicon melt.
- the silicon seed crystal is withdrawn to grow a single crystal silicon ingot.
- the ingot has a constant diameter portion.
- the method further includes controlling (i) a growth velocity, v, and/or ( ii ) an axial temperature gradient, G, during the growth of a segment of the constant diameter portion of the ingot such that the ratio v/G is less than a critical v/G .
- the segment of the constant diameter portion of the ingot is cooled from its solidification temperature to 950 °C or less .
- the dwell time the segment of the constant diameter portion of the ingot is in the temperature range from 1150 °C to 950 °C is less than 160 minutes .
- FIG . 1 is a cross-section of an ingot puller apparatus before silicon ingot growth
- FIG . 2 is a cross-section of an ingot puller apparatus of Figure 1 during silicon ingot growth
- FIG . 3 are schematic cross-section views of a single crystal silicon ingot showing the axial trend in vacancy-rich and interstitial-rich regions for three boron doping levels ( increasing from (a) to (c) ) ;
- FIG . 4 is a graph of epitaxial defect counts as a function of the axial position of the substrate wafer in the single crystal ingot with a relatively long time in the temperature range from 1150 °C to 950 °C;
- FIG . 5 is a graph of epitaxial defect counts as a function of the axial position of the substrate wafer in the single crystal ingot with a relatively short time in the temperature range from 1150 °C to 950 °C;
- FIG . 6 is a graph of the defect counts as a function of dwell time the ingot segment in the temperature range from 1150 °C to 950 °C;
- FIG . 7 is a graph of the dwell time over the crystal length for various single crystal silicon ingots .
- Provisions of the present disclosure relate to methods for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects ( i . e . , defects that occur after epitaxial silicon growth on a silicon substrate ) .
- the ratio (v/G) of the growth velocity (v) and the axial temperature gradient (G) may be controlled during growth of a segment or all of the constant diameter portion of the ingot and the period of time at which the segment is at the temperature range from 1150 °C to 950 °C is controlled to be 160 minutes or less to reduce the nuclei that lead to defects during epitaxial growth.
- the resulting substrate is suitable for epitaxial silicon growth with the epitaxial layer grown on the substrate having reduced or being substantially free of grown-in defects.
- the methods of the present disclosure may generally be carried out in any ingot puller apparatus that is configured to pull a single crystal silicon ingot.
- An example ingot puller apparatus (or more simply “ingot puller”) is indicated generally at “100" in FIG. 1.
- the ingot puller apparatus 100 includes a crucible 102 for holding a melt 104 of semiconductor or solar-grade material, such as silicon, supported by a susceptor 106.
- the ingot puller apparatus 100 includes a crystal puller housing 108 that defines a growth chamber 152 for pulling a silicon ingot 113 (Fig. 2) from the melt 104 along a pull axis A.
- the crucible 102 includes a floor 129 and a sidewall 131 that extends upward from the floor 129.
- the sidewall 131 is generally vertical.
- the floor 129 includes the curved portion of the crucible 102 that extends below the sidewall 131.
- a silicon melt 104 having a melt surface 111 (i.e., meltingot interface) .
- the crucible 102 is layered.
- the crucible 102 may be made of a quartz base layer and a synthetic quartz liner disposed on the quartz base layer.
- the susceptor 106 is supported by a shaft 105.
- the susceptor 106, crucible 102, shaft 105 and ingot 113 (Fig . 2 ) have a common longitudinal axis A or
- a pulling mechanism 114 is provided within the ingot puller apparatus 100 for growing and pulling an ingot 113 from the melt 104 .
- Pulling mechanism 114 includes a pulling cable 118 , a seed holder or chuck 120 coupled to one end of the pulling cable 118 , and a silicon seed crystal 122 coupled to the seed holder or chuck 120 for initiating crystal growth .
- One end of the pulling cable 118 is connected to a pulley (not shown) or a drum (not shown) , or any other suitable type of lifting mechanism, for example, a shaft, and the other end is connected to the chuck 120 that holds the seed crystal 122 .
- the seed crystal 122 is lowered to contact the melt 104 .
- the pulling mechanism 114 is operated to cause the seed crystal 122 to rise . This causes a single crystal ingot 113 (FIG . 2 ) to be withdrawn from the melt 104 .
- a crucible drive unit 107 (e . g . , a motor) rotates the crucible 102 and susceptor 106.
- a lift mechanism 112 raises and lowers the crucible 102 along the pull axis A during the growth process .
- the crucible 102 may be at a lowest position (near the bottom heater 126 ) in which an initial charge of solidphase polycrystalline silicon previously added to the crucible 102 is melted .
- Crystal growth commences by contacting the melt 104 with the seed crystal 122 and lifting the seed crystal 122 by the pulling mechanism 114 .
- the silicon melt 104 is consumed and the height of the melt in the crucible 102 decreases .
- the crucible 102 and susceptor 106 may be raised to maintain the melt surface 111 at or near the same position relative to the ingot puller apparatus 100 (FIG . 2 ) .
- a crystal drive unit may also rotate the pulling cable 118 and ingot 113 (FIG . 2 ) in a direction opposite the direction in which the crucible drive unit 107 rotates the crucible 102 (e . g . , counterrotation) .
- the crystal drive unit may rotate the pulling cable 118 in the same direction in which crucible drive unit 107 rotates the crucible 102 .
- the crystal drive unit raises and lowers the ingot 113 relative to the melt surface 111 as desired during the growth process .
- the ingot puller apparatus 100 may include an inert gas system to introduce and withdraw an inert gas such as argon from the growth chamber 152 .
- the ingot puller apparatus 100 may also include a dopant feed system (not shown) for introducing dopant into the melt 104 .
- the ingot puller apparatus 100 includes bottom insulation 110 and side insulation 124 to retain heat in the puller apparatus .
- the ingot puller apparatus 100 includes a bottom heater 126 disposed below the crucible floor 129 .
- the crucible 102 may be moved to be in relatively close proximity to the bottom heater 126 to melt the polycrystalline charged to the crucible 102 .
- the ingot 113 includes a crown portion 142 in which the ingot transitions and tapers outward from the seed crystal 122 to reach a target diameter .
- the ingot 113 includes a constant diameter portion 145 or cylindrical "main body" of the crystal which is grown by increasing the pull rate .
- the main body 145 of the ingot 113 has a relatively constant diameter .
- the ingot 113 includes a tail or end-cone (not shown) in which the ingot tapers in diameter after the main body 145 . When the diameter becomes small enough, the ingot 113 is then separated from the melt 104 .
- the ingot puller apparatus 100 includes a side heater 135 and a susceptor 106 that encircles the crucible 102 to maintain the temperature of the melt 104 during crystal growth .
- the side heater 135 is disposed radially outward to the crucible sidewall 131 as the crucible 102 travels up and down the pull axis A.
- the side heater 135 and bottom heater 126 may be any type of heater that allows the side heater 135 and bottom heater 126 to operate as described herein .
- the heaters 135 , 126 are resistance heaters .
- the side heater 135 and bottom heater 126 may be controlled by a control system (not shown) so that the temperature of the melt 104 is controlled throughout the pulling process .
- the ingot puller apparatus 100 may include a heat shield 151 .
- the heat shield 151 may shroud the ingot 113 and may be disposed within the crucible 102 during crystal growth (FIG. 2) .
- the silicon substrate that is produced by the methods described herein is doped (e.g., relatively heavily doped) with boron.
- the silicon melt may be doped with boron to produce a doped silicon ingot having a boron concentration of at least 2.8 x 10 18 atoms/cm 3 .
- Boron doping of the melt at a concentration of at least 3.8 x 10 18 atoms/cm 3 may be used to achieve an ingot with a concentration of at least 2.8 x 10 18 atoms/cm 3 at the seed end.
- the resulting ingot (and sliced wafers) may have a concentration of boron of at least 2.8 x 10 18 atoms/cm 3 .
- the melt is not doped with carbon (and in some embodiments no dopant other than boron is used) .
- a silicon substrate having a reduced amount of grown-in nuclei for epitaxial defects or even a substrate substantially free of such grown-in nuclei may be produced by (1) controlling the ratio of the crystal pullrate (v) to the magnitude of the axial temperature gradient (G) in the vicinity of the melt-crystal interface and (2) controlling the period of time (i.e., dwell time) at which the segment is at the temperature range from 1150 °C to 950°C to be 160 minutes or less.
- the type of dominant defect may be controlled.
- the convection of the point defects dominates their diffusion, and vacancies remain the incorporated dominant point defects, as the vacancy concentration at the interface is higher than the interstitial concentration.
- the diffusion dominates the convection, allowing the incorporation of the fast diffusing interstitials as the dominant point points.
- both the point defects are incorporated in very low and comparable concentrations .
- a growth velocity, v, and/or (ii) an axial temperature gradient, G may be controlled during the growth of an axial segment of the constant diameter portion of the ingot such that the ratio v/G is below the critical value of v/G to cause vacancy concentrations in the ingot to be reduced (or even controlled to be less than a value slightly above the critical v/G) .
- the critical v/G generally changes based on the amount of boron doping. Boron shifts the equilibrium to the interstitial regime. With increasing boron concentration (i.e., decreasing resistivity) , the vacancy-dominated region shrinks until it disappears entirely at the crystal center (FIG. 3C) . In boron doped ingots, it is believed that the vacancy-dominated region may be eliminated at boron doping greater than 8.0 x 10 18 atoms/cm 3 (e.g., resistivity of less than 10 mQ*cm) at all ratios of v/G.
- v/G may be controlled to be below the critical v/G (or even below a value that is slightly above the critical v/G) .
- the segment of the constant diameter portion of the ingot has a boron concentration from 2.8 x 10 18 atoms/cm 3 to 5.4 x 10 18 atoms/cm 3
- (i) the growth velocity, v, and/or (ii) the axial temperature gradient, G is controlled such that v/G is less than 0.20 mm 2 / (min*K) .
- the growth velocity, v, and/or (ii) the axial temperature gradient, G is controlled during the growth of the segment such that v/G is less than 0.25 mm 2 / (min*K) .
- v/G need not be controlled as interstitials are the dominant point defect throughout the segment over all ranges of v/G (i.e., any technologically feasible v/G may be used) .
- v/G is generally highest at the center of the ingot
- the ranges of v/G provided herein are generally measured at the center of the ingot to ensure that v/G is below the upper limit across the entire radius of the ingot.
- the ingot cools from solidification (about 1412°C) to room temperature.
- the cooling rate of the ingot is controlled such that the dwell time at which the segment (e.g., each portion of the segment) is in the temperature range from 1150 °C to 950 °C is minimized.
- all ingots may be controlled in this manner regardless of the boron doping concentration.
- the cooling rate of the ingot is controlled such that the period of time at which the segment is in the temperature range from 1150°C to 950°C is less than 160 minutes.
- the hot zone of the ingot puller may be arranged and/or modified to achieve such a cooling rate through this range of temperatures (e.g., cooling rate at least 1.25°C/minute, at least 1.5°C/minute, at least 2.0°C/min, at least 2.5°C/min, at least 3.0°C/min, or at least 3.5°C/min through the 1150 °C to 950 °C temperature range) .
- cooling rate at least 1.25°C/minute, at least 1.5°C/minute, at least 2.0°C/min, at least 2.5°C/min, at least 3.0°C/min, or at least 3.5°C/min through the 1150 °C to 950 °C temperature range
- Hot zones that may achieve such cooling may include any combination of one or more of the following: (1) active cooling elements (e.g., water cooling) near the ingot surface, (2) increasing thermal insulation between the crystal surface and the melt to reduce heat radiation from the melt to the crystal, (3) application of a jet of cold inert gas near the melt-ingot interface, (4) use of a conical heat shield (e.g., reflective material such as molybdenum) that surrounds the ingot to reflect heat irradiated by the ingot toward the ingot puller apparatus walls.
- the cooling rate of the ingot is controlled such that the period of time at which the segment is in the temperature range from 1150 °C to 950 °C is less than 120 minutes, less than 90 minutes or less than 60 minutes .
- v/G may be controlled such that interstitials are the dominant intrinsic point defect and with the cooling rate being controlled such that the ingot segment is in the temperature range from 1150 °C to 950°C for less than 160 minutes for at least a segment (e.g., axial segment) of the ingot.
- This segment of the ingot may have a length that is at least 0.5 times the length (D) of the constant diameter portion of the ingot (0.5*D) . In other embodiments, the length of the segment is at least 0.75*D or at least 0.9*D. In some embodiments, the segment is the entire constant diameter portion of the ingot .
- the ingot is sliced into substrates (i.e., wafers) .
- the resulting wafers have a reduced amount of grown-in nuclei for epitaxial defects that form during epitaxial growth.
- an epitaxial layer may be deposited on the front surface of the substrate by contacting the front surface with a silicon-containing gas that decomposes and forms an epitaxial silicon layer on the substrate.
- a silicon-containing gas that decomposes and forms an epitaxial silicon layer on the substrate.
- Silicon may be deposited by epitaxy to any suitable thickness depending on the device application.
- the silicon may be deposited using metalorganic chemical vapor deposition (MOCVD) , physical vapor deposition (PVD) , chemical vapor deposition (CVD) , low pressure chemical vapor deposition (LPCVD) , plasma enhanced chemical vapor deposition (PECVD) , or molecular beam epitaxy (MBE) .
- MOCVD metalorganic chemical vapor deposition
- PVD physical vapor deposition
- CVD chemical vapor deposition
- LPCVD low pressure chemical vapor deposition
- PECVD plasma enhanced chemical vapor deposition
- MBE molecular beam epitaxy
- Silicon precursors for LPCVD or PECVD include methyl silane, silicon tetrahydride (silane) , trisilane, disilane, pentasilane, neopentasilane, tetrasilane, dichlorosilane (SiH 2 Cl 2 ) , trichlorosilane (SiHCl 3 ) , silicon tetrachloride (SiCl 4 ) , among others.
- silicon may be deposited onto the surface oxidation layer by pyrolyzing silane (SiH 4 ) in a temperature range between about 550 °C and about 690 °C, such as between about 580 °C and about 650 °C.
- the chamber pressure may range from about 70 to about 400 mTorr.
- a boron-containing gas may be introduced into the epitaxial reactor to dope the epitaxial layer with boron.
- the resulting epitaxial structure i.e., substrate and epitaxial layer
- the epitaxial layer may have a reduced number of grown-in defects or may be substantially free of grown-in defects.
- the methods of the present disclosure have several advantages. Heavily doping the substrate with boron (e.g., a boron concentration of 2.8 x 10 18 atoms/cm 3 or more) has been found to suppress the formation of interstitial-type dislocation loops. Heavily doping the substrate with boron has also been found to enhance oxygen precipitation. In vacancy rich regions, oxygen precipitation is further enhanced (i.e. larger precipitates form) . Enhancement increases with higher vacancy concentrations.
- boron e.g., a boron concentration of 2.8 x 10 18 atoms/cm 3 or more
- the segment has a boron concentration of greater than 8.0 x 10 18 atoms/cm 3
- the segment is fully interstitial rich and any ratio of v/G may be used.
- process productivity may be preserved (e.g., by use of hot zone configured to provide high values of the thermal gradient G) .
- defects may be further reduced or eliminated regardless of the v/G value, even if vacancies are present.
- Example 1 Axial Trends in Vacancy-Rich and Interstitial- Rich Regions of a Silicon Ingot at Different Boron Doping Levels
- Figure 3 is a cross-section schematic view of a single crystal silicon ingot showing the axial trend in vacancy-rich and interstitial-rich regions for three boron doping levels .
- Figure 3 (a) shows the axial trend of the vacancy-rich and interstitial-rich regions for a silicon crystal heavily doped with boron (e . g . , relatively light doping at 2 . 8 x 10 18 atoms/cm 3 which corresponds to a target resistivity at the seed end of 22 mQ*cm which is a typical specification for heavily boron doped silicon substrates ) .
- boron e . g .
- the vacancy-rich region extends across the entire crystal radius , from center to edge, and shrinks gradually along the crystal length as the boron concentration increases axially due to the dopant segregation .
- the position of the OISF ring is also shown .
- the OISF ring vanishes where the vacancy-rich region shrinks completely .
- Figure 3 (b) shows the axial trend of the vacancy-rich and interstitial-rich regions for a silicon crystal heavily doped with boron to an intermediate concentration (e . g . , relatively intermediate doping at 4 . 5 x 10 18 atoms/cm 3 at the seed end which corresponds to a target resistivity at the seed end of 16 mQ*cm which is a resistivity that represents a typical intermediate resistivity specification for heavily boron doped silicon substrates ) .
- the vacancy-rich region extends only until a certain distance from the center even at the crystal seed end .
- the vacancy-rich region gradually shrinks along the crystal length as the boron concentration increases axially due to the dopant segregation and vanishes completely at some axial position .
- the position of the OISF ring is also shown .
- the OISF ring vanishes where the vacancy-rich region shrinks completely .
- Figure 3 (c) shows the axial trend of the vacancy-rich and interstitial-rich regions for a silicon crystal heavily doped with boron (e . g . , relatively high doping at 8 . 0 x 10 18 atoms/cm 3 at the seed end which corresponds to a target resistivity at the seed end of about 10 mQ*cm which is a typical resistivity specification for heavily boron doped crystals used to cover the common p++ range of 5-10 mQ*cm) .
- the defect pattern of Figure 3 (c) does not change for even lower resistivities such as 5 mQ*cm. No vacancy-rich region is present and the crystal is fully interstitial rich . No OISF ring forms . At this high doping level , no impact of the v/G ratio is observed and it can be concluded that the defect nature is fully determined by the dopant concentration alone .
- Example 2 Comparison of Epitaxial Defect Counts between Wafers from an Ingot Segment with a Relatively Long Time and a Relatively Short Time in the Temperature Range from 1150°C to 950°C
- Figure 4 is a graph of epitaxial defect counts measured by a laser inspection tool as a function of the axial position of the substrate wafer in the single crystal ingot with a relatively long time in the temperature range from 1150 °C to 950 °C ( labeled as "Example 1" ) .
- the data points to the left of Figure 4 are for crystals which were heavily doped with boron at relatively light doping (e . g . , 2 . 8 x 10 18 atoms/cm 3 ) as shown in Figure 3 (a) .
- the data points to the right of Figure 4 are for crystals which were heavily doped with boron at relatively intermediate doping (e.g., 4.5 x 10 18 atoms/cm 3 ) as shown in Figure 3 (b) .
- Figure 5 is a graph of epitaxial defect counts measured by a laser inspect tool as a function of the axial position of the substrate wafer in the single crystal ingot with a relatively short time in the temperature range from 1150°C to 950°C (labeled as "Example 2") .
- the data points to the left of Figure 5 are for crystals which were heavily doped with boron at relatively light doping (e.g., 2.8 x 10 18 atoms/cm 3 ) as shown in Figure 3 (a) .
- the data points to the right of Figure 5 are for crystals which were heavily doped with boron at relatively intermediate doping such as (e.g., 4.5 x 10 18 atoms/cm 3 ) as shown in Figure 3 (b) .
- FIG. 6 The defect counts of Figures 4 and 5 are shown in Figure 6 as a function of dwell time the ingot segment in the temperature range from 1150 °C to 950 °C. Ingot segments with excess vacancy concentration are shown in rhombs and segments grown under a relatively lower vacancy concentration are shown by crosses. As shown in Figure 6, the epitaxial defects depend on the dwell time the ingot segment is in the temperature range from 1150 °C to 950°C
- Figure 7 shows the dwell time of various ingot segments in the temperature range between 1150°C to 950°C. Relatively low cooling is indicated as “Example 1" and relatively fast cooling is indicated as “Example 2".
- An ingot segment having a boron concentration of 4.32-4.61 x 10 18 atoms/cm 3 and an oxygen concentration of 6.25 x 10 17 atoms/cm 3 was selected.
- v/G of the segment at its center was about 0.25 mm 2 / (min*K) which was more than the 0.20 mm 2 / (min*K) range specified above for the boron concentration of the segment.
- a segment having a 180 minute dwell time between 1150 °C and 950 °C was chosen.
- the segment was sliced in wafers and a silicon epitaxial layer was grown on the front surface of each substrate.
- the epitaxial wafers were measured by a laser inspection tool to determine the defect count.
- the average epitaxial defect count was 16 per wafer, much higher than the defect count of 3 per wafer that was achieved by embodiments of the present disclosure (see, e.g., FIGS. 5 and 6 and Table 1 below) .
- Figure 7 also shows data used to prepare Figure 4 ("Example 1") and Figure 5 (“Example 2") .
- Example 3 Defect Counts as a Function of v/G
- Table 1 shows the boron concentration, oxygen concentration target, and dwell time spent in the temperature range from 1150°C to 950°C in the crystal segment for various test lots.
- An epitaxial silicon layer was deposited on each substrate and the epitaxial defect counts as measured with laser inspection tools were measured.
- "Low" excess vacancies indicate that v/G was less than the v/G ranges specified above (v/G was less than 0.20 mm 2 / (min*K) for boron concentrations from 2.8 x 10 18 atoms/cm 3 to 5.4 x 10 18 atoms/cm 3 and was less than 0.25 for boron concentrations from 5.4 x 10 18 atoms/cm 3 to 8.0 x 10 18 atoms/cm 3 ) .
- low defect counts may be achieved when the excess vacancy concentration is low or when the dwell time in the temperature range from 1150°C to 950°C is low (or a combination of these conditions) .
- the terms “about,” “substantially, “ “essentially” and “approximately” when used in conjunction with ranges of dimensions, concentrations, temperatures or other physical or chemical properties or characteristics is meant to cover variations that may exist in the upper and/or lower limits of the ranges of the properties or characteristics, including, for example, variations resulting from rounding, measurement methodology or other statistical variation.
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020237019176A KR102906500B1 (ko) | 2020-11-11 | 2020-12-29 | 에피택셜 결함들에 대해 감소된 성장 핵들을 갖는 실리콘 기판을 형성하기 위한 방법들 및 에피택셜 웨이퍼를 형성하기 위한 방법들 |
| EP20842238.6A EP4244413A1 (en) | 2020-11-11 | 2020-12-29 | Methods for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects and methods for forming an epitaxial wafer |
| JP2023528068A JP2023548240A (ja) | 2020-11-11 | 2020-12-29 | エピタキシャル欠陥となるグローイン核を低減したシリコン基板を形成する方法およびエピタキシャルウエハを形成する方法 |
| CN202080107738.1A CN116648533B (zh) | 2020-11-11 | 2020-12-29 | 具有减量致外延缺陷的原生核的硅衬底的形成方法及外延晶片的形成方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US202063112424P | 2020-11-11 | 2020-11-11 | |
| US63/112,424 | 2020-11-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2022100875A1 true WO2022100875A1 (en) | 2022-05-19 |
Family
ID=74186650
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP2020/087962 Ceased WO2022100875A1 (en) | 2020-11-11 | 2020-12-29 | Methods for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects and methods for forming an epitaxial wafer |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US11987900B2 (enExample) |
| EP (1) | EP4244413A1 (enExample) |
| JP (1) | JP2023548240A (enExample) |
| KR (1) | KR102906500B1 (enExample) |
| CN (1) | CN116648533B (enExample) |
| TW (1) | TWI875905B (enExample) |
| WO (1) | WO2022100875A1 (enExample) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11130592A (ja) * | 1997-10-29 | 1999-05-18 | Komatsu Electron Metals Co Ltd | シリコン単結晶の製造方法 |
| JP2002064102A (ja) * | 2000-08-15 | 2002-02-28 | Wacker Nsce Corp | シリコン単結晶基板並びにエピタキシャルシリコンウエハおよびその製造方法 |
| DE10047346A1 (de) * | 2000-09-25 | 2002-05-02 | Mitsubishi Material Silicon | Silicium Wafer zur Abscheidung einer Epitaxieschicht, Epitaxiewafer und Verfahren zur Herstellung desselben |
| JP2005170778A (ja) * | 2003-11-21 | 2005-06-30 | Shin Etsu Handotai Co Ltd | シリコン単結晶の製造方法 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3552278B2 (ja) * | 1994-06-30 | 2004-08-11 | 三菱住友シリコン株式会社 | シリコン単結晶の製造方法 |
| JP3460551B2 (ja) * | 1997-11-11 | 2003-10-27 | 信越半導体株式会社 | 結晶欠陥の少ないシリコン単結晶ウエーハ及びその製造方法 |
| KR20010034789A (ko) | 1998-10-14 | 2001-04-25 | 헨넬리 헬렌 에프 | 실질적으로 성장 결점이 없는 에피택시얼 실리콘 웨이퍼 |
| US6458202B1 (en) * | 1999-09-02 | 2002-10-01 | Memc Electronic Materials, Inc. | Process for preparing single crystal silicon having uniform thermal history |
| JP4718668B2 (ja) * | 2000-06-26 | 2011-07-06 | 株式会社Sumco | エピタキシャルウェーハの製造方法 |
| US6818197B2 (en) * | 2000-09-25 | 2004-11-16 | Mitsubishi Materials Silicon Corporation | Epitaxial wafer |
| US20110263126A1 (en) * | 2000-11-22 | 2011-10-27 | Sumco Corporation | Method for manufacturing a silicon wafer |
| US20020084451A1 (en) * | 2000-12-29 | 2002-07-04 | Mohr Thomas C. | Silicon wafers substantially free of oxidation induced stacking faults |
| JP4192530B2 (ja) | 2002-08-27 | 2008-12-10 | 株式会社Sumco | パーティクルモニター用シリコン単結晶ウェーハの製造方法 |
| JP4570317B2 (ja) * | 2002-08-29 | 2010-10-27 | 株式会社Sumco | シリコン単結晶とエピタキシャルウェーハ並びにそれらの製造方法 |
| JP4236243B2 (ja) * | 2002-10-31 | 2009-03-11 | Sumco Techxiv株式会社 | シリコンウェーハの製造方法 |
| JP2004165489A (ja) | 2002-11-14 | 2004-06-10 | Sumitomo Mitsubishi Silicon Corp | エピタキシャルシリコンウェーハとその製造方法並びに半導体装置 |
| JP4983161B2 (ja) | 2005-10-24 | 2012-07-25 | 株式会社Sumco | シリコン半導体基板およびその製造方法 |
| WO2007137182A2 (en) * | 2006-05-19 | 2007-11-29 | Memc Electronic Materials, Inc. | Controlling agglomerated point defect and oxygen cluster formation induced by the lateral surface of a silicon single crystal during cz growth |
| JP5228671B2 (ja) * | 2008-07-24 | 2013-07-03 | 株式会社Sumco | シリコン単結晶の育成方法 |
| US20150044467A1 (en) * | 2012-04-23 | 2015-02-12 | Hwajin Jo | Method of growing ingot and ingot |
| DE102017213587A1 (de) * | 2017-08-04 | 2019-02-07 | Siltronic Ag | Halbleiterscheibe aus einkristallinem Silizium und Verfahren zur Herstellung der Halbleiterscheibe |
| JP7024700B2 (ja) * | 2018-12-19 | 2022-02-24 | 株式会社Sumco | 石英ガラスルツボ |
-
2020
- 2020-12-17 US US17/125,590 patent/US11987900B2/en active Active
- 2020-12-24 TW TW109146070A patent/TWI875905B/zh active
- 2020-12-29 JP JP2023528068A patent/JP2023548240A/ja active Pending
- 2020-12-29 CN CN202080107738.1A patent/CN116648533B/zh active Active
- 2020-12-29 KR KR1020237019176A patent/KR102906500B1/ko active Active
- 2020-12-29 WO PCT/EP2020/087962 patent/WO2022100875A1/en not_active Ceased
- 2020-12-29 EP EP20842238.6A patent/EP4244413A1/en active Pending
-
2022
- 2022-04-01 US US17/711,691 patent/US11987901B2/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11130592A (ja) * | 1997-10-29 | 1999-05-18 | Komatsu Electron Metals Co Ltd | シリコン単結晶の製造方法 |
| JP2002064102A (ja) * | 2000-08-15 | 2002-02-28 | Wacker Nsce Corp | シリコン単結晶基板並びにエピタキシャルシリコンウエハおよびその製造方法 |
| DE10047346A1 (de) * | 2000-09-25 | 2002-05-02 | Mitsubishi Material Silicon | Silicium Wafer zur Abscheidung einer Epitaxieschicht, Epitaxiewafer und Verfahren zur Herstellung desselben |
| JP2005170778A (ja) * | 2003-11-21 | 2005-06-30 | Shin Etsu Handotai Co Ltd | シリコン単結晶の製造方法 |
Non-Patent Citations (1)
| Title |
|---|
| See also references of EP4244413A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI875905B (zh) | 2025-03-11 |
| CN116648533B (zh) | 2026-04-14 |
| US20220220636A1 (en) | 2022-07-14 |
| US20220145493A1 (en) | 2022-05-12 |
| KR20230098871A (ko) | 2023-07-04 |
| US11987900B2 (en) | 2024-05-21 |
| TW202219330A (zh) | 2022-05-16 |
| KR102906500B1 (ko) | 2025-12-31 |
| EP4244413A1 (en) | 2023-09-20 |
| JP2023548240A (ja) | 2023-11-15 |
| US11987901B2 (en) | 2024-05-21 |
| CN116648533A (zh) | 2023-08-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP1325178B1 (en) | Nitrogen-doped silicon substantially free of oxidation induced stacking faults | |
| JP4760729B2 (ja) | Igbt用のシリコン単結晶ウェーハ及びigbt用のシリコン単結晶ウェーハの製造方法 | |
| JP5246163B2 (ja) | Igbt用のシリコン単結晶ウェーハ及びigbt用のシリコン単結晶ウェーハの製造方法 | |
| EP4028583B1 (en) | Method for growing a nitrogen doped single crystal silicon ingot using continuous czochralski method | |
| US11680336B2 (en) | Methods for growing a nitrogen doped single crystal silicon ingot using continuous Czochralski method | |
| JP2010222241A (ja) | Igbt用シリコン単結晶ウェーハ及びigbt用シリコン単結晶ウェーハの製造方法 | |
| US11680335B2 (en) | Single crystal silicon ingot having axial uniformity | |
| JPWO2009025342A1 (ja) | Igbt用のシリコン単結晶ウェーハ及びigbt用のシリコン単結晶ウェーハの製造方法 | |
| US20220359195A1 (en) | Methods for forming an epitaxial wafer | |
| US20060191468A1 (en) | Process for producing single crystal | |
| JP5278324B2 (ja) | Igbt用シリコン単結晶ウェーハの製造方法 | |
| CN113272479A (zh) | 控制硅熔融物中的掺杂剂浓度以增强铸锭质量 | |
| JP5304649B2 (ja) | Igbt用のシリコン単結晶ウェーハの製造方法 | |
| US11987901B2 (en) | Methods for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects and methods for forming an epitaxial wafer | |
| EP1669478B1 (en) | Nitrogen-doped silicon substantially free of oxidation induced stacking faults |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 20842238 Country of ref document: EP Kind code of ref document: A1 |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 2023528068 Country of ref document: JP |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 202080107738.1 Country of ref document: CN |
|
| ENP | Entry into the national phase |
Ref document number: 20237019176 Country of ref document: KR Kind code of ref document: A |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| ENP | Entry into the national phase |
Ref document number: 2020842238 Country of ref document: EP Effective date: 20230612 |
|
| WWR | Wipo information: refused in national office |
Ref document number: 1020237019176 Country of ref document: KR |
|
| WWC | Wipo information: continuation of processing after refusal or withdrawal |
Ref document number: 1020237019176 Country of ref document: KR |