WO2022095414A1 - 接触电阻的测试方法与装置 - Google Patents
接触电阻的测试方法与装置 Download PDFInfo
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- WO2022095414A1 WO2022095414A1 PCT/CN2021/095588 CN2021095588W WO2022095414A1 WO 2022095414 A1 WO2022095414 A1 WO 2022095414A1 CN 2021095588 W CN2021095588 W CN 2021095588W WO 2022095414 A1 WO2022095414 A1 WO 2022095414A1
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- resistance
- contact resistance
- temperature
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 238000012360 testing method Methods 0.000 claims description 50
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- 239000004065 semiconductor Substances 0.000 claims description 20
- 230000005669 field effect Effects 0.000 claims description 12
- 238000012545 processing Methods 0.000 claims description 12
- 238000001514 detection method Methods 0.000 claims description 9
- 238000005259 measurement Methods 0.000 abstract description 28
- 230000008569 process Effects 0.000 abstract description 7
- 230000006870 function Effects 0.000 description 8
- 239000000243 solution Substances 0.000 description 8
- 238000002513 implantation Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 230000008859 change Effects 0.000 description 5
- 238000004458 analytical method Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 3
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- 238000010168 coupling process Methods 0.000 description 3
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- 239000000463 material Substances 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000010998 test method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000009529 body temperature measurement Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000008014 freezing Effects 0.000 description 1
- 238000007710 freezing Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
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- Embodiments of the present application relate to the technical field of semiconductors, and in particular, to a method and device for testing contact resistance.
- MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
- Embodiments of the present application provide a method and device for testing contact resistance, which can improve the testing accuracy of MOS transistors in the prior art.
- an embodiment of the present application provides a method for testing contact resistance, which is used to test the contact resistance of a MOS transistor, including the following steps:
- the target resistance value of the contact resistance is determined according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the contact resistance.
- the contact resistance includes a first contact resistance and a second contact resistance
- the first contact resistance is connected to the source of the semiconductor field effect transistor
- the second contact resistance is connected to the source of the semiconductor field effect transistor.
- the obtaining the temperature coefficient of resistance of the contact resistance includes:
- the temperature coefficient of resistance of the contact resistance is obtained according to the preset standard temperature, the ambient temperature and the resistance temperature parameter.
- the resistance temperature parameter includes a first resistance temperature parameter and a second resistance temperature parameter
- the determining the resistance temperature parameter of the contact resistance includes:
- the first resistance temperature parameter and the second resistance temperature parameter are determined according to each sampling temperature and the corresponding resistance value of the contact resistance at each sampling temperature.
- the temperature coefficient of resistance of the contact resistance is obtained according to the preset standard temperature, the ambient temperature and the resistance temperature parameter, including:
- the temperature coefficient of resistance of the contact resistance is obtained by:
- rconfet_temper 1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
- rconfet_temper represents the resistance temperature coefficient
- temp represents the ambient temperature
- tnom represents the standard temperature
- tc1rcon represents the first resistance temperature parameter
- tc2rcon represents the second resistance temperature parameter
- the determining the target resistance value of the contact resistance according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the contact resistance includes:
- a second target resistance value of the second contact resistance is determined according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the second contact resistance.
- the determining the first target resistance value of the first contact resistance according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the first contact resistance includes:
- the first target resistance value is determined by:
- the resistance value per unit area the temperature coefficient of resistance, the area of the second contact resistance, determine the second target resistance value of the second contact resistance, including:
- the second target resistance value is determined by:
- rdc represents the first target resistance value
- rsc represents the second target resistance value
- rconfet represents the unit area resistance value
- rconfet_temper represents the resistance temperature coefficient
- S1 represents the area of the first contact resistance
- S2 represents the area of the second contact resistance.
- an embodiment of the present application provides a contact resistance testing device for testing the contact resistance of a MOS transistor, the device comprising:
- an acquisition module for acquiring the resistance value per unit area of the contact resistance
- the obtaining module is further configured to obtain the temperature coefficient of resistance of the contact resistance
- the processing module is configured to determine the target resistance value of the contact resistance according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the contact resistance.
- the contact resistance includes a first contact resistance and a second contact resistance
- the first contact resistance is connected to the source of the semiconductor field effect transistor
- the second contact resistance is connected to the source of the semiconductor field effect transistor.
- the obtaining module is used for:
- the temperature coefficient of resistance of the contact resistance is obtained according to the preset standard temperature, the ambient temperature and the resistance temperature parameter.
- the resistance temperature parameter includes a first resistance temperature parameter and a second resistance temperature parameter
- the obtaining module is used for:
- the first resistance temperature parameter and the second resistance temperature parameter are determined according to each sampling temperature and the corresponding resistance value of the contact resistance at each sampling temperature.
- the obtaining module is configured to obtain the temperature coefficient of resistance of the contact resistance in the following manner:
- rconfet_temper 1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
- rconfet_temper represents the resistance temperature coefficient
- temp represents the ambient temperature
- tnom represents the standard temperature
- tc1rcon represents the first resistance temperature parameter
- tc2rcon represents the second resistance temperature parameter
- the processing module is used for:
- a second target resistance value of the second contact resistance is determined according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the second contact resistance.
- the processing module is used for:
- the first target resistance value is determined by:
- the second target resistance value is determined by:
- rdc represents the first target resistance value
- rsc represents the second target resistance value
- rconfet represents the unit area resistance value
- rconfet_temper represents the resistance temperature coefficient
- S1 represents the area of the first contact resistance
- S2 represents the area of the second contact resistance.
- the method and device for testing contact resistance are used to test the contact resistance of a MOS transistor; the method includes: obtaining the resistance value per unit area and the temperature coefficient of resistance of the contact resistance, according to the resistance value per unit area, the temperature coefficient of resistance and the The area of the contact resistance determines the target resistance value of the contact resistance. That is, when the contact resistance of the MOS transistor is tested in the embodiment of the present application, the measurement result of the contact resistance can be corrected according to the resistance temperature coefficient of the contact resistance, so that the influence of the ambient temperature on the measurement result of the contact resistance can be effectively eliminated, thereby improving the MOS Transistor measurement accuracy.
- FIG. 1 is a schematic structural diagram of a semiconductor device provided in an embodiment of the application.
- FIG. 2 is a schematic flowchart of a method for testing contact resistance provided in an embodiment of the application
- Fig. 3 is the sub-flow schematic diagram of a kind of testing method of contact resistance provided in the embodiment of the application;
- FIG. 4 is a schematic diagram of a program module of a contact resistance testing device provided in an embodiment of the present application.
- FIG. 1 is a schematic structural diagram of a semiconductor device provided in an embodiment of the application.
- the above-mentioned semiconductor device is formed based on MOS transistors, and specifically includes:
- P-type substrate 100 P-substrate, referred to as Psub
- deep N-well structure 200 deep n-well, referred to as DNW
- P-well structure 300 P-well
- shallow trench isolation structure 400 shallow trench isolation, referred to as STI)
- an N+ implantation region 501 and an N+ implantation region 502 a polysilicon structure 600 (poly), a first contact resistance 701 and a second contact resistance 702 .
- the N+ implantation region 501 and the N+ implantation region 502 are trapped inside the P-well structure 300, the first contact resistance 701 is located above the N+ implantation region 501, and forms ohmic contact with the N+ implantation region 501; the second contact resistance 702 is located in the N+ implantation region 501. above the region 502 and form an ohmic contact with the N+ implanted region 502 .
- the N+ injection region 501 constitutes the source region of the MOS transistor
- the N+ injection region 502 constitutes the drain region of the MOS transistor
- the polysilicon structure 600 constitutes the gate region of the MOS transistor.
- the region formed by the source electrode, the drain electrode and the gate electrode of the MOS transistor can be tested based on the BSIM4 test model.
- the BSIM4 test model is a physical-based software simulation system with the characteristics of accuracy, upgradeability, robustness, language, etc. for testing circuit simulation and CMOS technology development. Analysis, instantaneous analysis, communication analysis and other data.
- the resistance value of the contact resistance of the MOS transistor needs to be added to the test model.
- the contact resistance of the MOS transistor is an important element of the MOS transistor, and the size of the resistance value is very important to the electrical characteristics of the MOS transistor.
- the resistance value of the contact resistance will change with the change of the ambient temperature, it may cause a large error in the test accuracy of the entire MOS transistor.
- the embodiments of the present application provide a method for testing contact resistance.
- the measurement result of the contact resistance is corrected according to the resistance temperature coefficient of the contact resistance, so as to effectively eliminate the The influence of ambient temperature on the measurement results of contact resistance, thereby improving the measurement accuracy of MOS transistors.
- Detailed description can be found in the following examples.
- FIG. 2 is a schematic flowchart of a method for testing contact resistance provided in an embodiment of the present application.
- the above-mentioned method for testing contact resistance includes the following steps:
- the above-mentioned resistance value per unit area of the contact resistance can be understood as the resistance value generated by the contact resistance in each unit area.
- the resistance value of the contact resistance has a linear relationship with the ambient temperature where it is located.
- the above-mentioned temperature coefficient of resistance (TCR) can be used to characterize the relationship between the resistance value of the contact resistance and the ambient temperature where it is located. relationship between. For example, it can be used to represent the relative change of the resistance value when the ambient temperature where the above-mentioned contact resistance is located changes by 1 degree Celsius, in units of ppm/°C.
- obtaining the temperature coefficient of resistance of the contact resistance in this embodiment refers to obtaining the temperature coefficient of resistance of the contact resistance at the current ambient temperature.
- S203 Determine the target resistance value of the contact resistance according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the contact resistance.
- the contact resistance value per unit area, the temperature coefficient of resistance and the area of the contact resistance can be calculated based on the resistance value per unit area, the temperature coefficient of resistance, and the area of the contact resistance.
- the target resistance value of the resistor is the target resistance value of the resistor.
- the target resistance value calculated in the embodiment of the present application introduces the resistance temperature coefficient of the contact resistance at the current ambient temperature, the influence of temperature on the measurement result of the contact resistance can be effectively eliminated, and the calculation result can be effectively reduced. Therefore, after the above target resistance value is input into the measurement model of the MOS transistor, the measurement accuracy of the MOS transistor can be effectively improved.
- the above contact resistance includes the first contact resistance 701 and the second contact resistance 702 shown in FIG. 1 .
- the target resistance values corresponding to the first contact resistance 701 and the second contact resistance 702 can be obtained respectively. .
- the contact resistance test method provided by the embodiment of the present application can correct the contact resistance measurement result according to the resistance temperature coefficient of the contact resistance during the test process, so that the influence of the ambient temperature on the contact resistance measurement result can be effectively eliminated, Thus, the measurement accuracy of the MOS transistor is improved.
- FIG. 3 is a schematic sub-flow diagram of a contact resistance testing method provided in an embodiment of the present application.
- obtaining the temperature coefficient of resistance of the contact resistance described in step S202 in the above embodiment specifically includes the following steps:
- some conventional temperature measurement methods may be used to detect the ambient temperature of the current test environment.
- the resistance temperature parameter of the contact resistance includes a first resistance temperature parameter and a second resistance temperature parameter, and the resistance temperature parameter of the contact resistance may be determined in the following manner:
- tc1rcon represents the above-mentioned first resistance temperature parameter
- tc2rcon represents the above-mentioned second resistance temperature parameter
- tx represents the sampling temperature
- the relationship between the resistance value R of the contact resistance and tc1rcon, tc2rcon, and tx can be calculated by a binary n times. function to represent.
- sampling temperature values can be randomly selected within a certain temperature range, and the real resistance value of the above-mentioned contact resistance at each sampling temperature value can be measured, and then each sampling temperature value can be compared with The resistance value corresponding to the contact resistance at each sampling temperature is input into the above-mentioned binary n-th function, and several points can be obtained in the coordinate system.
- the above-mentioned first resistance temperature parameter tc1rcon and the second resistance can be obtained.
- the optimal value of the temperature parameter tc2rcon The optimal value of the temperature parameter tc2rcon.
- the least squares method may be used to perform curve fitting on the above-mentioned binary n-th order function, or matlab software may be used to perform curve fitting on the above-mentioned binary n-th degree function. Do limit.
- the resistance temperature coefficient of the contact resistance can be obtained according to the resistance temperature parameter, the preset standard temperature and the ambient temperature of the current test environment.
- the temperature coefficient of resistance of the contact resistance can be obtained in the following manner:
- rconfet_temper 1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
- rconfet_temper represents the resistance temperature coefficient
- temp represents the ambient temperature
- tnom represents the standard temperature
- tc1rcon represents the first resistance temperature parameter
- tc2rcon represents the second resistance temperature parameter.
- the above standard temperature is set to standardize the measurement conditions to allow comparison between different sets of data.
- An internationally recognized value referenced by many measurement models can be chosen.
- the melting temperature of ice that is, the freezing point of water: 0°C (273.15K).
- the method for testing contact resistance after detecting the ambient temperature of the current detection environment and obtaining the resistance temperature parameter of the contact resistance through curve fitting, it can be determined according to the preset standard temperature, the current detection environment The ambient temperature and the above resistance temperature parameters are calculated to obtain the resistance temperature coefficient of the above contact resistance in the current detection environment, and then in the subsequent resistance value measurement process, the measurement result of the contact resistance can be corrected according to the resistance temperature coefficient to improve the contact resistance.
- the measurement accuracy of the resistance is improved, thereby improving the measurement accuracy of the MOS transistor.
- the contact resistance test method provided by the embodiments of the present application, after the resistance temperature coefficient of the contact resistance is determined, the resistance value per unit area of the contact resistance, the resistance temperature coefficient and the The area of the contact resistance was used to calculate the target resistance value of the above-mentioned contact resistance.
- the first target resistance value of the first contact resistance is determined in the following manner:
- the second target resistance value of the above-mentioned second contact resistance is determined by:
- rdc represents the first target resistance value
- rsc represents the second target resistance value
- rconfet represents the resistance value per unit area
- rconfet_temper represents the resistance temperature coefficient
- S1 represents the area of the first contact resistance
- S2 represents the second Area of contact resistance.
- the contact resistance test method provided by the embodiment of the present application can correct the contact resistance measurement result according to the resistance temperature coefficient of the contact resistance during the test process, so that the influence of the ambient temperature on the contact resistance measurement result can be effectively eliminated, Improve the measurement accuracy of contact resistance.
- FIG. 4 is a test device provided in the embodiments of the present application. Schematic diagram of the program module of the test device for contact resistance.
- the above-mentioned contact resistance testing device 40 includes:
- the obtaining module 401 is configured to obtain the resistance value per unit area of the contact resistance, and obtain the temperature coefficient of resistance of the above-mentioned contact resistance.
- the processing module 402 is configured to determine the target resistance value of the contact resistance according to the resistance value per unit area, the temperature coefficient of resistance, and the area of the contact resistance.
- the contact resistance testing device 40 provided by the embodiment of the present application can be used to test the contact resistance of a MOS transistor. During the test, the measurement result of the contact resistance is corrected according to the resistance temperature coefficient of the contact resistance, thereby effectively eliminating the The influence of ambient temperature on the measurement results of contact resistance improves the measurement accuracy of MOS transistors.
- the contact resistance includes a first contact resistance and a second contact resistance, the first contact resistance is connected to the source of the MOS transistor, and the second contact resistance is connected to the drain of the MOS transistor .
- the obtaining module 401 is used for:
- the resistance temperature parameter includes a first resistance temperature parameter and a second resistance temperature parameter
- the obtaining module 401 is used for:
- the obtaining module 401 is configured to obtain the temperature coefficient of resistance of the above-mentioned contact resistance in the following manner:
- rconfet_temper 1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
- rconfet_temper represents the resistance temperature coefficient
- temp represents the ambient temperature
- tnom represents the standard temperature
- tc1rcon represents the first resistance temperature parameter
- tc2rcon represents the second resistance temperature parameter.
- processing module 402 is used to:
- the first target resistance value of the first contact resistance is determined; according to the resistance value per unit area, the temperature coefficient of resistance, and the second contact resistance area, to determine the second target resistance value of the second contact resistance.
- processing module 402 is used to:
- the above-mentioned first target resistance value is determined by:
- the above-mentioned second target resistance value is determined by:
- rdc represents the first target resistance value
- rsc represents the second target resistance value
- rconfet represents the resistance value per unit area
- rconfet_temper represents the resistance temperature coefficient
- S1 represents the area of the first contact resistance
- S2 represents the above The area of the second contact resistance.
- each functional module in the above-mentioned contact resistance testing device 40 correspond to the steps in the contact resistance testing method described in the above-mentioned embodiments. Therefore, the above-mentioned contact resistance testing device For the detailed implementation process of each functional module in 40, reference may be made to each step in the contact resistance testing method described in the above embodiment, and details are not repeated here.
- the embodiments of the present application also provide a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and when the processor executes the computer-executable instructions When instructed, to implement the various steps in the method for testing the contact resistance as described in the above embodiments.
- the disclosed apparatus and method may be implemented in other manners.
- the device embodiments described above are only illustrative.
- the division of the modules is only a logical function division. In actual implementation, there may be other division methods.
- multiple modules may be combined or integrated. to another system, or some features can be ignored, or not implemented.
- the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or modules, and may be in electrical, mechanical or other forms.
- modules described as separate components may or may not be physically separated, and components shown as modules may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
- each functional module in each embodiment of the present application may be integrated in one processing unit, or each module may exist physically alone, or two or more modules may be integrated in one unit.
- the units formed by the above modules can be implemented in the form of hardware, or can be implemented in the form of hardware plus software functional units.
- the above-mentioned integrated modules implemented in the form of software functional modules may be stored in a computer-readable storage medium.
- the above-mentioned software function modules are stored in a storage medium, and include several instructions to enable a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to execute the various embodiments of the present application. part of the method.
- processor may be a central processing unit (English: Central Processing Unit, referred to as: CPU), or other general-purpose processors, digital signal processors (English: Digital Signal Processor, referred to as: DSP), application-specific integrated circuits (English: Application Specific Integrated Circuit, referred to as: ASIC) and so on.
- a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in conjunction with the application can be directly embodied as executed by a hardware processor, or executed by a combination of hardware and software modules in the processor.
- the memory may include a high-speed RAM memory, and may also include a non-volatile storage NVM, such as at least one magnetic disk memory, and may also be a U disk, a removable hard disk, a read-only memory, a magnetic disk or an optical disk, and the like.
- NVM non-volatile storage
- the bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, or the like.
- ISA Industry Standard Architecture
- PCI Peripheral Component
- EISA Extended Industry Standard Architecture
- the bus can be divided into address bus, data bus, control bus and so on.
- the buses in the drawings of the present application are not limited to only one bus or one type of bus.
- the above-mentioned storage medium may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable Except programmable read only memory (EPROM), programmable read only memory (PROM), read only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.
- SRAM static random access memory
- EEPROM electrically erasable programmable read only memory
- EPROM erasable except programmable read only memory
- PROM programmable read only memory
- ROM read only memory
- magnetic memory flash memory
- flash memory magnetic disk or optical disk.
- a storage medium can be any available medium that can be accessed by a general purpose or special purpose computer.
- An exemplary storage medium is coupled to the processor, such that the processor can read information from, and write information to, the storage medium.
- the storage medium can also be an integral part of the processor.
- the processor and the storage medium may be located in application specific integrated circuits (Application Specific Integrated Circuits, ASIC for short).
- ASIC Application Specific Integrated Circuits
- the processor and the storage medium may also exist in the electronic device or the host device as discrete components.
- the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps including the above method embodiments; and the aforementioned storage medium includes: ROM, RAM, magnetic disk or optical disk and other media that can store program codes.
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Abstract
一种接触电阻的测试方法与装置，用于测试MOS晶体管的接触电阻；上述方法包括：获取接触电阻的单位面积电阻值与电阻温度系数（S201、S202），根据上述单位面积电阻值、电阻温度系数以及接触电阻的面积，确定接触电阻的目标电阻值（S203）。本接触电阻的测试方法，在测试过程中能够根据接触电阻的电阻温度系数，对接触电阻的测量结果进行校正，可以有效消除环境温度对接触电阻的测量结果的影响，进而提升MOS晶体管的测量精确度。
Description
本申请要求于2020年11月09日提交中国专利局、申请号为202011241123.6、申请名称为“接触电阻的测试方法与装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
本申请实施例涉及半导体技术领域，尤其涉及一种接触电阻的测试方法与装置。
金属-氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor,简称MOSFET)又称MOS晶体管，是半导体器件制造过程中最基本的元器件，已经广泛应用于各种集成电路中。
在MOS晶体管制备过程中，通常需要对MOS晶体管的可靠性进行测试，比如对其接触电阻进行测试。但是，在实际测试过程中，由于接触电阻的阻值会随着环境温度的变化而变化，很难保持在一固定值，因此会对整个MOS晶体管的测试精确度存在较大影响。
发明内容
本申请实施例提供一种接触电阻的测试方法与装置，可以提升现有技术中MOS晶体管的测试精确度。
第一方面，本申请实施例提供一种接触电阻的测试方法，用于测试MOS晶体管的接触电阻，包括以下步骤：
获取所述接触电阻的单位面积电阻值；
获取所述接触电阻的电阻温度系数；
根据所述单位面积电阻值、所述电阻温度系数、所述接触电阻的面积确定所述接触电阻的目标电阻值。
在一种可行的实施方式中，所述接触电阻包括第一接触电阻与第二接触电阻，所述第一接触电阻与所述半导体场效应晶体管的源极连接，所述第二接触电阻与所述半导体场效应晶体管的漏极连接。
在一种可行的实施方式中，所述获取所述接触电阻的电阻温度系数，包括：
获取当前检测环境的环境温度；
确定所述接触电阻的电阻温度参数；
根据预设的标准温度、所述环境温度以及所述电阻温度参数，得到所述接触电阻的电阻温度系数。
在一种可行的实施方式中，所述电阻温度参数包括第一电阻温度参数与第二电阻温度参数，所述确定所述接触电阻的电阻温度参数，包括：
获取所述接触电阻在预设的多个采样温度下对应的电阻值；
根据各个采样温度与所述接触电阻在各个采样温度下对应的电阻值，确定所述第一电阻温度参数与所述第二电阻温度参数。
在一种可行的实施方式中，所述根据预设的标准温度、所述环境温度以及所述电阻温度参数，得到所述接触电阻的电阻温度系数，包括：
通过以下方式得到所述接触电阻的电阻温度系数：
rconfet_temper＝1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
其中，rconfet_temper表示所述电阻温度系数，temper表示所述环境温度，tnom表示所述标准温度，tc1rcon表示所述第一电阻温度参数，tc2rcon表示所述第二电阻温度参数。
在一种可行的实施方式中，所述根据所述单位面积电阻值、所述电阻温度系数、所述接触电阻的面积确定所述接触电阻的目标电阻值，包括：
根据所述单位面积电阻值、所述电阻温度系数、所述第一接触电阻的面积，确定所述第一接触电阻的第一目标电阻值；
根据所述单位面积电阻值、所述电阻温度系数、所述第二接触电阻的面积，确定所述第二接触电阻的第二目标电阻值。
在一种可行的实施方式中，所述根据所述单位面积电阻值、所述电阻温度系数、所述第一接触电阻的面积，确定所述第一接触电阻的第一目标电阻值，包括：
通过以下方式确定所述第一目标电阻值：
rdc＝rconfet*rconfet_temper*1/S1
所述根据所述单位面积电阻值、所述电阻温度系数、所述第二接触电 阻的面积，确定所述第二接触电阻的第二目标电阻值，包括：
通过以下方式确定所述第二目标电阻值：
rsc＝rconfet*rconfet_temper*1/S2
其中，rdc表示所述第一目标电阻值，rsc表示所述第二目标电阻值，rconfet表示所述单位面积电阻值，rconfet_temper表示所述电阻温度系数，S1表示所述第一接触电阻的面积，S2表示所述第二接触电阻的面积。
第二方面，本申请实施例提供一种接触电阻的测试装置，用于测试MOS晶体管的接触电阻，所述装置包括：
获取模块，用于获取所述接触电阻的单位面积电阻值；
所述获取模块，还用于获取所述接触电阻的电阻温度系数；
处理模块，用于根据所述单位面积电阻值、所述电阻温度系数、所述接触电阻的面积确定所述接触电阻的目标电阻值。
在一种可行的实施方式中，所述接触电阻包括第一接触电阻与第二接触电阻，所述第一接触电阻与所述半导体场效应晶体管的源极连接，所述第二接触电阻与所述半导体场效应晶体管的漏极连接。
在一种可行的实施方式中，所述获取模块用于：
获取当前检测环境的环境温度；
确定所述接触电阻的电阻温度参数；
根据预设的标准温度、所述环境温度以及所述电阻温度参数，得到所述接触电阻的电阻温度系数。
在一种可行的实施方式中，所述电阻温度参数包括第一电阻温度参数与第二电阻温度参数，所述获取模块用于：
获取所述接触电阻在预设的多个采样温度下对应的电阻值；
根据各个采样温度与所述接触电阻在各个采样温度下对应的电阻值，确定所述第一电阻温度参数与所述第二电阻温度参数。
在一种可行的实施方式中，所述获取模块用于通过以下方式得到所述接触电阻的电阻温度系数：
rconfet_temper＝1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
其中，rconfet_temper表示所述电阻温度系数，temper表示所述环境温度，tnom表示所述标准温度，tc1rcon表示所述第一电阻温度参数，tc2rcon 表示所述第二电阻温度参数。
在一种可行的实施方式中，所述处理模块用于：
根据所述单位面积电阻值、所述电阻温度系数、所述第一接触电阻的面积，确定所述第一接触电阻的第一目标电阻值；
根据所述单位面积电阻值、所述电阻温度系数、所述第二接触电阻的面积，确定所述第二接触电阻的第二目标电阻值。
在一种可行的实施方式中，所述处理模块用于：
通过以下方式确定所述第一目标电阻值：
rdc＝rconfet*rconfet_temper*1/S1
通过以下方式确定所述第二目标电阻值：
rsc＝rconfet*rconfet_temper*1/S2
其中，rdc表示所述第一目标电阻值，rsc表示所述第二目标电阻值，rconfet表示所述单位面积电阻值，rconfet_temper表示所述电阻温度系数，S1表示所述第一接触电阻的面积，S2表示所述第二接触电阻的面积。
本申请所提供的接触电阻的测试方法与装置，用于测试MOS晶体管的接触电阻；上述方法包括：获取接触电阻的单位面积电阻值与电阻温度系数，根据上述单位面积电阻值、电阻温度系数以及接触电阻的面积，确定接触电阻的目标电阻值。即本申请实施例在测试MOS晶体管的接触电阻时，能够根据接触电阻的电阻温度系数，对接触电阻的测量结果进行校正，从而可以有效消除环境温度对接触电阻的测量结果的影响，进而提升MOS晶体管的测量精确度。
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对本申请实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其它的附图。
图1为本申请实施例中提供的一种半导体器件的结构示意图；
图2为本申请实施例中提供的一种接触电阻的测试方法的流程示意图；
图3为本申请实施例中提供的一种接触电阻的测试方法的子流程示意 图；
图4为本申请实施例中提供的一种接触电阻的测试装置的程序模块示意图。
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在现有的集成电路制造中，随着半导体集成电路技术的不断进步和特征尺寸的不断减小，使得单片晶圆上的器件数量不断增加，电路的功能得到了改进，而随着工艺制造中的环节要求越来越精细，器件的可靠性也显得日益重要。
金属-氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor,简称MOSFET)又称MOS晶体管。MOS晶体管是半导体器件制造过程中最基本的元器件，已经广泛应用于各种集成电路中。参见图1，图1为本申请实施例中提供的一种半导体器件的结构示意图，在图1中，上述半导体器件基于MOS晶体管构成，具体包括：
P型衬底100(P-substrate，简称Psub)、深N阱结构200(deep n-well，简称DNW)、P阱结构300(简称PWell)、浅槽隔离结构400(shallow trench isolation，简称STI)、N+注入区501与N+注入区502、多晶硅结构600(poly)、第一接触电阻701以及第二接触电阻702。
其中，N+注入区501与N+注入区502陷入P阱结构300的内部，第一接触电阻701位于N+注入区501的上方，并与N+注入区501形成欧姆接触；第二接触电阻702位于N+注入区502的上方，并与N+注入区502形成欧姆接触。
其中，N+注入区501构成MOS晶体管的源极区，N+注入区502构成MOS晶体管的漏极区，多晶硅结构600构成MOS晶体管的栅极区。
在一些实施例中，在对MOS晶体管进行测试时，可以基于BSIM4测试模型对MOS晶体管的源极、漏极以及栅极构成的区域进行测试。其中， BSIM4测试模型是一种用于测试电路仿真和CMOS技术发展的一种基于物理的、具有精确性、可升级性、健壮性、语言性等特点的软件模拟系统，能提供标准电路的直流分析，瞬时分析，交流分析等数据。
在一些实施例中，在基于上述BSIM4测试模型对MOS晶体管进行测试时，还需要在测试模型中添加MOS晶体管的接触电阻的电阻值。其中，MOS晶体管的接触电阻作为MOS晶体管的重要元件，其电阻值的大小对MOS晶体管的电学特性而言至关重要。而由于接触电阻的阻值会随着环境温度的变化而变化，由此可能会导致整个MOS晶体管的测试精确度存在较大误差。
为了解决上述技术问题，本申请实施例提供了一种接触电阻的测试方法，在测试MOS晶体管的接触电阻时，根据接触电阻的电阻温度系数，对接触电阻的测量结果进行校正，从而可以有效消除环境温度对接触电阻的测量结果的影响，进而提升MOS晶体管的测量精确度。具体实施方式可以参加以下实施例中的描述。
参照图2，图2为本申请实施例中提供的一种接触电阻的测试方法的流程示意图，在本申请一种可行的实施方式中，上述接触电阻的测试方法包括以下步骤：
S201、获取接触电阻的单位面积电阻值。
可以理解的是，在温度一定的情况下，常规材料的电阻值R与材料的长度L成正比，与材料的面积S成反比，通常表示为：R＝ρL/S，其中，ρ表示材料的电阻率。
在一些实施例中，上述接触电阻的单位面积电阻值可以理解为是接触电阻在每个单位面积内所产生的电阻值。
S202、获取上述接触电阻的电阻温度系数。
在半导体结构中，接触电阻的阻值在与它所在的环境温度具有线性关系，上述电阻温度系数(temperature coefficient of resistance简称TCR)则可以用来表征接触电阻的阻值和它所在的环境温度之间的关系。例如，可以用于表示当上述接触电阻所在的环境温度改变1摄氏度时，其电阻值的相对变化量，单位为ppm/℃。
由于电阻温度系数并不恒定，而是一个随着温度变化而变化的值，随 着温度的增加，电阻温度系数通常会变小。因此，本实施例中获取上述接触电阻的电阻温度系数是指获取当前环境温度下上述接触电阻的电阻温度系数。
S203、根据上述单位面积电阻值、电阻温度系数、上述接触电阻的面积，确定上述接触电阻的目标电阻值。
本申请实施例中，在确定上述接触电阻的单位面积电阻值、当前环境温度下的电阻温度系数之后，即可根据上述单位面积电阻值、电阻温度系数以及上述接触电阻的面积，计算出上述接触电阻的目标电阻值。
可以理解的是，由于本申请实施例中所计算出的目标电阻值引入了接触电阻在当前环境温度下的电阻温度系数，因此，可以有效消除温度对接触电阻测量结果的影响，有效减小计算出的目标电阻值与接触电阻的实际电阻值之间的误差，由此，将上述目标电阻值输入MOS晶体管的测量模型中之后，能够有效提升MOS晶体管的测量精度。
需要说明的是，上述接触电阻包括图1所示的第一接触电阻701与第二接触电阻702，通过上述实施例，可以分别得到第一接触电阻701与第二接触电阻702对应的目标电阻值。
本申请实施例所提供的接触电阻的测试方法，在测试过程中能够根据接触电阻的电阻温度系数，对接触电阻的测量结果进行校正，从而可以有效消除环境温度对接触电阻的测量结果的影响，进而提升MOS晶体管的测量精度。
基于上述实施例中所描述的内容，参照图3，图3为本申请实施例中提供的一种接触电阻的测试方法的子流程示意图。在本申请一种可行的实施方式中，上述实施例中步骤S202描述的获取上述接触电阻的电阻温度系数，具体包括以下步骤：
S301、获取当前检测环境的环境温度。
S302、确定所述接触电阻的电阻温度参数。
S303、根据预设的标准温度、所述环境温度以及所述电阻温度参数，得到所述接触电阻的电阻温度系数。
可选的，可以采用一些常规的测温方式，来检测当前测试环境的环境温度。
可选的，上述接触电阻的电阻温度参数包括第一电阻温度参数与第二电阻温度参数，上述接触电阻的电阻温度参数可以通过以下方式来确定：
获取上述接触电阻在预设的多个采样温度下对应的电阻值；根据各个采样温度与接触电阻在各个采样温度下对应的电阻值，确定第一电阻温度参数与第二电阻温度参数。
示例性的，假设tc1rcon表示上述第一电阻温度参数，tc2rcon表示上述第二电阻温度参数，tx表示采样温度，则接触电阻的电阻值R与tc1rcon、tc2rcon、tx的关系可以通过一个二元n次函数来表示。例如：
R＝tc1rcon*tx+tc2rcon*tx2+C，C为预设系数；
在一种可行的实施方式中，可以在一定的温度范围内，随机选取若干个采样温度值，并测量出上述接触电阻在各个采样温度值下的真实的电阻值，然后将各个采样温度值与接触电阻在各个采样温度下对应的电阻值分别输入上述二元n次函数，即可在坐标系中获得若干个点，通过曲线拟合，即可得到上述第一电阻温度参数tc1rcon与第二电阻温度参数tc2rcon的最佳取值。
可选的，可以采用最小二乘法对上述二元n次函数进行曲线拟合，也可以采用matlab软件对上述二元n次函数进行曲线拟合，本申请实施例对具体的曲线拟合方式不做限定。
在一些实施例中，在确定出接触电阻的电阻温度参数之后，即可根据该电阻温度参数、以及预设的标准温度与当前测试环境的环境温度，得到上述接触电阻的电阻温度系数。
可选的，可以通过以下方式得到上述接触电阻的电阻温度系数：
rconfet_temper＝1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
其中，rconfet_temper表示上述电阻温度系数，temper表示上述环境温度，tnom表示上述标准温度，tc1rcon表示上述第一电阻温度参数，tc2rcon表示上述第二电阻温度参数。
其中，上述标准温度是为了使测量条件标准化而设定的，以允许在不同组数据之间进行比较。可以选用一个被许多测量模型所引用的国际公认数值。例如冰的熔化温度，即水的凝点：0℃(273.15K)。
本申请实施例所提供的接触电阻的测试方法，在检测当前检测环境的 环境温度，以及通过曲线拟合得到上述接触电阻的电阻温度参数之后，即可根据预设的标准温度、当前检测环境的环境温度以及上述电阻温度参数，计算得到上述接触电阻在当前检测环境下的电阻温度系数，进而在后续的电阻值测量过程中，能够根据该电阻温度系数对接触电阻的测量结果进行校正，提高接触电阻的测量准确度，进而提升MOS晶体管的测量精确度。
基于上述实施例中所描述的内容，本申请实施例所提供的接触电阻的测试方法中，在确定接触电阻的电阻温度系数之后，即可根据接触电阻的单位面积电阻值、上述电阻温度系数以及接触电阻的面积，计算出上述接触电阻的目标电阻值。
示例性的，通过以下方式确定上述第一接触电阻的第一目标电阻值：
rdc＝rconfet*rconfet_temper*1/S1
通过以下方式确定上述第二接触电阻的第二目标电阻值：
rsc＝rconfet*rconfet_temper*1/S2
其中，rdc表示上述第一目标电阻值，rsc表示上述第二目标电阻值，rconfet表示上述单位面积电阻值，rconfet_temper表示上述电阻温度系数，S1表示上述第一接触电阻的面积，S2表示上述第二接触电阻的面积。
本申请实施例所提供的接触电阻的测试方法，在测试过程中能够根据接触电阻的电阻温度系数，对接触电阻的测量结果进行校正，从而可以有效消除环境温度对接触电阻的测量结果的影响，提高接触电阻的测量准确度。
基于上述实施例中所描述的内容，本申请实施例中还提供一种接触电阻的测试装置，用于测试MOS晶体管的接触电阻，参照图4，图4为本申请实施例中提供的一种接触电阻的测试装置的程序模块示意图。
在本申请一种可行的实施方式中，上述接触电阻的测试装置40包括：
获取模块401，用于获取接触电阻的单位面积电阻值，以及获取上述接触电阻的电阻温度系数。
处理模块402，用于根据上述单位面积电阻值、电阻温度系数、上述接触电阻的面积，确定上述接触电阻的目标电阻值。
本申请实施例所提供的接触电阻的测试装置40，可以用于测试MOS晶体管的接触电阻，在测试过程中，根据接触电阻的电阻温度系数，对接 触电阻的测量结果进行校正，从而可以有效消除环境温度对接触电阻的测量结果的影响，提升MOS晶体管的测量精度。
在一种可行的实施方式中，上述接触电阻包括第一接触电阻与第二接触电阻，第一接触电阻与上述MOS晶体管的源极连接，所述第二接触电阻与上述MOS晶体管的漏极连接。
在一种可行的实施方式中，获取模块401用于：
获取当前检测环境的环境温度；确定上述接触电阻的电阻温度参数；根据预设的标准温度、上述环境温度以及上述电阻温度参数，得到上述接触电阻的电阻温度系数。
在一种可行的实施方式中，上述电阻温度参数包括第一电阻温度参数与第二电阻温度参数，上述获取模块401用于：
获取上述接触电阻在预设的多个采样温度下对应的电阻值；根据各个采样温度与上述接触电阻在各个采样温度下对应的电阻值，确定上述第一电阻温度参数与上述第二电阻温度参数。
在一种可行的实施方式中，获取模块401用于通过以下方式得到上述接触电阻的电阻温度系数：
rconfet_temper＝1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))
其中，rconfet_temper表示上述电阻温度系数，temper表示上述环境温度，tnom表示上述标准温度，tc1rcon表示上述第一电阻温度参数，tc2rcon表示上述第二电阻温度参数。
在一种可行的实施方式中，处理模块402用于：
根据上述单位面积电阻值、上述电阻温度系数、上述第一接触电阻的面积，确定上述第一接触电阻的第一目标电阻值；根据上述单位面积电阻值、上述电阻温度系数、上述第二接触电阻的面积，确定上述第二接触电阻的第二目标电阻值。
在一种可行的实施方式中，处理模块402用于：
通过以下方式确定上述第一目标电阻值：
rdc＝rconfet*rconfet_temper*1/S1
通过以下方式确定上述第二目标电阻值：
rsc＝rconfet*rconfet_temper*1/S2
其中，rdc表示上述第一目标电阻值，rsc表示上述所述第二目标电阻值，rconfet表示上述单位面积电阻值，rconfet_temper表示上述电阻温度系数，S1表示上述第一接触电阻的面积，S2表示上述第二接触电阻的面积。
可以理解的是，上述接触电阻的测试装置40中的各个功能模块所实现的功能，与上述实施例中所描述的接触电阻的测试方法中的各个步骤相对应，因此，上述接触电阻的测试装置40中的各个功能模块详细的实现过程，可以参照上述实施例中所描述的接触电阻的测试方法中的各个步骤，在此不再赘述。
进一步的，基于上述实施例中所描述的内容，本申请实施例中还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机执行指令，当处理器执行所述计算机执行指令时，以实现如上述实施例中描述的接触电阻的测试方法中的各个步骤。
在本申请所提供的几个实施例中，应该理解到，所揭露的设备和方法，可以通过其它的方式实现。例如，以上所描述的设备实施例仅仅是示意性的，例如，所述模块的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个模块可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或模块的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的模块可以是或者也可以不是物理上分开的，作为模块显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能模块可以集成在一个处理单元中，也可以是各个模块单独物理存在，也可以两个或两个以上模块集成在一个单元中。上述模块成的单元既可以采用硬件的形式实现，也可以采用硬件加软件功能单元的形式实现。
上述以软件功能模块的形式实现的集成的模块，可以存储在一个计算机可读取存储介质中。上述软件功能模块存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络 设备等)或处理器(英文：processor)执行本申请各个实施例所述方法的部分步骤。
应理解，上述处理器可以是中央处理单元(英文：Central Processing Unit，简称：CPU)，还可以是其他通用处理器、数字信号处理器(英文：Digital Signal Processor，简称：DSP)、专用集成电路(英文：Application Specific Integrated Circuit，简称：ASIC)等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合申请所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件模块组合执行完成。
存储器可能包含高速RAM存储器，也可能还包括非易失性存储NVM，例如至少一个磁盘存储器，还可以为U盘、移动硬盘、只读存储器、磁盘或光盘等。
总线可以是工业标准体系结构(Industry Standard Architecture，ISA)总线、外部设备互连(Peripheral Component，PCI)总线或扩展工业标准体系结构(Extended Industry Standard Architecture，EISA)总线等。总线可以分为地址总线、数据总线、控制总线等。为便于表示，本申请附图中的总线并不限定仅有一根总线或一种类型的总线。
上述存储介质可以是由任何类型的易失性或非易失性存储设备或者它们的组合实现，如静态随机存取存储器(SRAM)，电可擦除可编程只读存储器(EEPROM)，可擦除可编程只读存储器(EPROM)，可编程只读存储器(PROM)，只读存储器(ROM)，磁存储器，快闪存储器，磁盘或光盘。存储介质可以是通用或专用计算机能够存取的任何可用介质。
一种示例性的存储介质耦合至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息。当然，存储介质也可以是处理器的组成部分。处理器和存储介质可以位于专用集成电路(Application Specific Integrated Circuits，简称：ASIC)中。当然，处理器和存储介质也可以作为分立组件存在于电子设备或主控设备中。
本领域普通技术人员可以理解：实现上述各方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取存储介质中。该程序在执行时，执行包括上述各方法实施例的步 骤；而前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
最后应说明的是：以上各实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述各实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。
Claims (14)
- 一种接触电阻的测试方法，用于测试MOS晶体管的接触电阻，其特征在于，包括以下步骤：获取所述接触电阻的单位面积电阻值；获取所述接触电阻的电阻温度系数；根据所述单位面积电阻值、所述电阻温度系数、所述接触电阻的面积确定所述接触电阻的目标电阻值。
- 根据权利要求1所述的方法，其特征在于，所述接触电阻包括第一接触电阻与第二接触电阻，所述第一接触电阻与所述MOS晶体管的源极连接，所述第二接触电阻与所述半导体场效应晶体管的漏极连接。
- 根据权利要求2所述的方法，其特征在于，所述获取所述接触电阻的电阻温度系数，包括：获取当前检测环境的环境温度；确定所述接触电阻的电阻温度参数；根据预设的标准温度、所述环境温度以及所述电阻温度参数，得到所述接触电阻的电阻温度系数。
- 根据权利要求3所述的方法，其特征在于，所述电阻温度参数包括第一电阻温度参数与第二电阻温度参数，所述确定所述接触电阻的电阻温度参数，包括：获取所述接触电阻在预设的多个采样温度下对应的电阻值；根据各个采样温度与所述接触电阻在各个采样温度下对应的电阻值，确定所述第一电阻温度参数与所述第二电阻温度参数。
- 根据权利要求4所述的方法，其特征在于，所述根据预设的标准温度、所述环境温度以及所述电阻温度参数，得到所述接触电阻的电阻温度系数，包括：通过以下方式得到所述接触电阻的电阻温度系数：rconfet_temper＝1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))其中，rconfet_temper表示所述电阻温度系数，temper表示所述环境温度，tnom表示所述标准温度，tc1rcon表示所述第一电阻温度参数，tc2rcon表示所述第二电阻温度参数。
- 根据权利要求2所述的方法，其特征在于，所述根据所述单位面积电阻值、所述电阻温度系数、所述接触电阻的面积确定所述接触电阻的目标电阻值，包括：根据所述单位面积电阻值、所述电阻温度系数、所述第一接触电阻的面积，确定所述第一接触电阻的第一目标电阻值；根据所述单位面积电阻值、所述电阻温度系数、所述第二接触电阻的面积，确定所述第二接触电阻的第二目标电阻值。
- 根据权利要求6所述的方法，其特征在于，所述根据所述单位面积电阻值、所述电阻温度系数、所述第一接触电阻的面积，确定所述第一接触电阻的第一目标电阻值，包括：通过以下方式确定所述第一目标电阻值：rdc＝rconfet*rconfet_temper*1/S 1所述根据所述单位面积电阻值、所述电阻温度系数、所述第二接触电阻的面积，确定所述第二接触电阻的第二目标电阻值，包括：通过以下方式确定所述第二目标电阻值：rsc＝rconfet*rconfet_temper*1/S 2其中，rdc表示所述第一目标电阻值，rsc表示所述第二目标电阻值，rconfet表示所述单位面积电阻值，rconfet_temper表示所述电阻温度系数，S 1表示所述第一接触电阻的面积，S 2表示所述第二接触电阻的面积。
- 一种接触电阻的测试装置，用于测试半导体场效应晶体管的接触电阻，其特征在于，所述装置包括：获取模块，用于获取所述接触电阻的单位面积电阻值；所述获取模块，还用于获取所述接触电阻的电阻温度系数；处理模块，用于根据所述单位面积电阻值、所述电阻温度系数、所述接触电阻的面积确定所述接触电阻的目标电阻值。
- 根据权利要求8所述的装置，其特征在于，所述接触电阻包括第一接触电阻与第二接触电阻，所述第一接触电阻与所述半导体场效应晶体管的源极连接，所述第二接触电阻与所述半导体场效应晶体管的漏极连接。
- 根据权利要求9所述的装置，其特征在于，所述获取模块用于：获取当前检测环境的环境温度；确定所述接触电阻的电阻温度参数；根据预设的标准温度、所述环境温度以及所述电阻温度参数，得到所述接触电阻的电阻温度系数。
- 根据权利要求10所述的装置，其特征在于，所述电阻温度参数包括第一电阻温度参数与第二电阻温度参数，所述获取模块用于：获取所述接触电阻在预设的多个采样温度下对应的电阻值；根据各个采样温度与所述接触电阻在各个采样温度下对应的电阻值，确定所述第一电阻温度参数与所述第二电阻温度参数。
- 根据权利要求11所述的装置，其特征在于，所述获取模块用于通过以下方式得到所述接触电阻的电阻温度系数：rconfet_temper＝1+(temper-tnom)*(tc1rcon+tc2rcon*(temper-tnom))其中，rconfet_temper表示所述电阻温度系数，temper表示所述环境温度，tnom表示所述标准温度，tc1rcon表示所述第一电阻温度参数，tc2rcon表示所述第二电阻温度参数。
- 根据权利要求9所述的装置，其特征在于，所述处理模块用于：根据所述单位面积电阻值、所述电阻温度系数、所述第一接触电阻的面积，确定所述第一接触电阻的第一目标电阻值；根据所述单位面积电阻值、所述电阻温度系数、所述第二接触电阻的面积，确定所述第二接触电阻的第二目标电阻值。
- 根据权利要求13所述的装置，其特征在于，所述处理模块用于：通过以下方式确定所述第一目标电阻值：rdc＝rconfet*rconfet_temper*1/S 1通过以下方式确定所述第二目标电阻值：rsc＝rconfet*rconfet_temper*1/S 2其中，rdc表示所述第一目标电阻值，rsc表示所述第二目标电阻值，rconfet表示所述单位面积电阻值，rconfet_temper表示所述电阻温度系数，S 1表示所述第一接触电阻的面积，S 2表示所述第二接触电阻的面积。
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