WO2022068651A1 - 一种显示装置、驱动芯片及电子设备 - Google Patents

一种显示装置、驱动芯片及电子设备 Download PDF

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Publication number
WO2022068651A1
WO2022068651A1 PCT/CN2021/119633 CN2021119633W WO2022068651A1 WO 2022068651 A1 WO2022068651 A1 WO 2022068651A1 CN 2021119633 W CN2021119633 W CN 2021119633W WO 2022068651 A1 WO2022068651 A1 WO 2022068651A1
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Prior art keywords
signal
signal line
line
repair
electrically connected
Prior art date
Application number
PCT/CN2021/119633
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English (en)
French (fr)
Inventor
陈鹏名
梁吉德
李瑞亮
张峰
邓建懂
李牧遥
Original Assignee
荣耀终端有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 荣耀终端有限公司 filed Critical 荣耀终端有限公司
Priority to EP21874312.8A priority Critical patent/EP4083988A4/en
Priority to US17/795,688 priority patent/US11922847B2/en
Publication of WO2022068651A1 publication Critical patent/WO2022068651A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/08—Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • the present application relates to the field of display technology, and in particular, to a display device, a driver chip, and an electronic device.
  • the current repair method for the broken signal line of the display screen is to physically connect the broken signal line with the reserved signal line by means of laser sintering, and the reserved signal line is electrically connected with the output end of the driver chip from the display screen.
  • the non-display area is routed to the end of the signal line away from the driver chip.
  • the signal transmitted by the reserved signal line is the same as the signal that should be transmitted by the disconnected signal line, thereby ensuring that the display screen can be displayed normally.
  • the present application provides a display device, a driving chip and an electronic device to solve the above problems.
  • the present application provides a display device, comprising a plurality of sub-pixels for light-emitting display, a plurality of signal lines that are electrically connected to the sub-pixels and provide the sub-pixels with signals required for light-emitting display, and a plurality of signal lines Electrical connection, a signal line repair module for repairing broken signal lines, a driver chip that is electrically connected to a plurality of signal lines and the signal line repair module and provides the signal lines with signals required to control the sub-pixel light-emitting display
  • the signal line repair module includes at least one repair line, at least one set of connection switch groups set in one-to-one correspondence with the at least one repair line, and a first shift unit group including a multi-stage first shift unit;
  • the connection switch group includes multiple A connection switch and a plurality of connection switches are arranged in a one-to-one correspondence with a plurality of signal lines, the input ends of the connection switches in the same connection switch group are respectively electrically connected with different signal lines, and the output ends
  • the first shift unit includes a shift output end, and the shift output end of the first shift unit is controlled by the corresponding connection switch.
  • the terminals are electrically connected; when the drive chip determines that there is a broken signal line, it sends a control signal to the signal line repair module, so that the broken signal line is electrically connected to the repair line in the signal line repair module;
  • the line repairing module sends a control signal to make the broken signal line electrically connected to the repaired line in the signal line repairing module.
  • the shift output terminal outputs an enable signal to control the corresponding connection switches in a group of connection switch groups to be turned on, so that the broken signal line and a repair line are electrically connected.
  • the present application provides a driver chip, which is used to: provide signals to a plurality of signal lines to control sub-pixels to perform light-emitting display; when it is determined that there is a disconnected signal line, provide a control signal to make the disconnection
  • the signal line of the signal line is electrically connected to the repair line in the signal line repair module; wherein, providing a control signal to make the broken signal line electrically connected to the repair line in the signal line repair module includes: sending a control signal to the signal line repair module, controlling The shift output terminal of the first shift unit corresponding to the disconnected signal line outputs an enable signal, and controls the corresponding connection switches in a group of connection switch groups to be turned on, so that the disconnected signal line and a repair line are electrically connected.
  • the present application provides an electronic device, including the display device provided in the first aspect.
  • the signal line repair module can repair the broken signal line, that is, the display device can repair the broken signal line by itself without returning to the factory. It is easy to implement, has high repair efficiency and low cost; and the structure for controlling the conduction of the connection switch is the first shift unit that can sequentially output the enable signal, so manual laser sintering is not required, and the accuracy is high.
  • FIG. 1 is a schematic diagram of a display device according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of another display device provided by an embodiment of the present application.
  • FIG. 3 is a partial enlarged view of a display device provided by an embodiment of the present application.
  • FIG. 4 is an equivalent circuit diagram of a shift unit provided by an embodiment of the present application.
  • FIG. 5 is a timing diagram of the shift unit provided by the embodiment shown in FIG. 4;
  • FIG. 6 is a timing diagram of a signal line repair stage of the display device shown in FIG. 3;
  • FIG. 7 is a partial enlarged view of another display device provided by an embodiment of the present application.
  • FIG. 8 is a timing diagram of a signal line defect detection stage of the display device shown in FIG. 7;
  • FIG. 9 is a timing diagram of a signal line repair stage of the display device shown in FIG. 7;
  • FIG. 10 is a partial enlarged view of another display device provided by an embodiment of the present application.
  • FIG. 11 is a partial enlarged view of still another display device provided by an embodiment of the present application.
  • FIG. 12 is a partial enlarged view of still another display device provided by an embodiment of the present application.
  • FIG. 13 is a partial enlarged view of another display device provided by an embodiment of the present application.
  • FIG. 14 is a schematic structural diagram of a driver chip provided by an embodiment of the present application.
  • FIG. 15 is a schematic diagram of an electronic device provided by an embodiment of the present application.
  • FIG. 1 is a schematic diagram of a display device provided by an embodiment of the present application
  • FIG. 2 is a schematic diagram of another display device provided by an embodiment of the present application.
  • the display device provided by the embodiment of the present application includes a display panel 001 , and the display panel 001 includes a display area AA and a non-display area BB surrounding the display area AA.
  • a plurality of signal lines are arranged in the display area AA, wherein the plurality of signal lines include a first signal line DL and a second signal line SL, and the extension directions of the first signal line DL and the second signal line SL cross each other and the first signal line DL and the second signal line SL
  • the intersection of the line DL and the second signal line SL defines a plurality of sub-pixels P0, the sub-pixels P0 are used for light-emitting display, the first signal line DL and the second signal line SL are electrically connected to the corresponding sub-pixels P0, and the sub-pixels P0 provide light-emitting display desired signal.
  • the plurality of sub-pixels P0 include a first-color sub-pixel P1, a second-color sub-pixel P2, and a third-color sub-pixel P3.
  • the non-display area BB includes a signal line repair module 10, and the signal line repair module 10 can repair the disconnected first signal line DL in the signal line repair stage and the display stage of the display device.
  • the signal line repair module 10 is electrically connected to a plurality of first signal lines DL, and can repair the disconnected first signal line DL, and the first signal line DL can be any data line or scan line. A sort of.
  • the signal line repair module 10 may also be electrically connected to a plurality of second signal lines SL, and may repair the broken second signal lines SL.
  • the first signal line DL can be a data line extending in the column direction and arranged in the row direction, then the first signal line DL can provide the sub-pixel P0 with a data signal required for light-emitting display; the second signal line SL can be a data line along the row direction If the scan lines extend in the direction and are arranged along the column direction, the second signal lines SL can provide the sub-pixels P0 with scan signals required for light-emitting display.
  • the first signal line DL may be a scan line extending in the row direction and arranged in the column direction, then the first signal line DL may provide the sub-pixel P0 with scan signals required for light-emitting display;
  • the second signal line SL may be For the data lines extending in the column direction and arranged in the row direction, the second signal lines SL can provide the sub-pixels P0 with data signals required for light-emitting display.
  • the signal line repair module 10 for repairing the first signal line DL is mainly used as an example to illustrate the inventive concept of the present application, but it is understandable that the signal line repair module 10 provided in the embodiment of the present application also It can be used to repair the second signal line SL in the display panel 001 .
  • the display device may be a liquid crystal display device
  • the display panel 001 includes an array substrate, a color filter substrate, and a liquid crystal molecule layer between the array substrate and the color filter substrate.
  • the array substrate includes a plurality of pixel circuits located in the display area AA
  • the color filter substrate includes a color resist layer and a black matrix
  • the color resist layer at least includes color resists of different colors.
  • the display panel 001 further includes a touch module located on a side of the color filter substrate away from the array substrate.
  • a signal line repair module 10 is added to the display panel 001, wherein the signal line repair module 10 is located in the non-display area BB, and the signal line repair module 10 is disposed on the array substrate.
  • the display device may also be an organic light-emitting display device, and the display panel 001 includes an array substrate, a light-emitting device layer, and a packaging structure arranged in sequence.
  • the display panel 001 further includes a touch module located on a side of the package structure away from the array substrate.
  • the light emitting device layer includes a plurality of light emitting devices including a stacked anode, a light emitting layer, and a cathode.
  • the encapsulation structure is used to encapsulate and protect the light-emitting device, so as to ensure the service life of the light-emitting device.
  • a signal line repair module 10 is added to the display panel 001, wherein the signal line repair module 10 is located in the non-display area BB, and the signal line repair module 10 is disposed on the array substrate.
  • the display device may also be any display device in the prior art, such as a micro LED (Light Emitting Diode, light-emitting diode) display device, an electrophoretic display device, or the like.
  • a micro LED Light Emitting Diode, light-emitting diode
  • an electrophoretic display device or the like.
  • the display device provided by the embodiment of the present application further includes a driver chip 30, and the driver chip 30 is configured to provide the first signal line DL and the second signal line SL with signals required for controlling the sub-pixel P0 to emit light and display.
  • the driver chip can use the disconnection detection circuit to realize the automatic detection of disconnected signal lines.
  • the display device can also use other methods to detect whether there is a disconnection fault in the signal line, which will not be repeated here.
  • the signal line repair module 10 is disposed at one end of the first signal line DL in the extending direction, so as to facilitate electrical connection with the first signal line DL.
  • one end of the first signal line DL is provided with a driver chip 30
  • the driver chip 30 is electrically connected to the main board 003 through the flexible circuit board 002
  • the signal line repair module 10 is arranged on the first signal line 003 .
  • the other end of the DL is another implementation manner, as shown in FIG.
  • the driving chip 30 can provide signals for the first signal line DL through the multiplexing circuit 40, that is, one port of the driving chip 30 corresponds to one input port of the multiplexing circuit 40, and one input port of the multiplexing circuit 40 corresponds to multiple There are output ports corresponding to the first signal lines DL one-to-one.
  • the signal line repairing module 10 and the driving chip 30/multiplexing circuit 40 are arranged at opposite ends of the first signal line DL, so that the signal line repairing module 10 can not prevent the driving chip 30 from providing signals for the first signal line DL at the same time , and repair the broken first signal line DL.
  • FIG. 3 is a partial enlarged view of a display device according to an embodiment of the present application.
  • the signal line repair module 10 provided by the embodiment of the present application includes at least one set of connection switch groups and at least one repair line DUM, and the at least one group of connection switch groups and the at least one repair line DUM are provided in a one-to-one correspondence.
  • the connection switch group includes a plurality of connection switches 12 , the connection switches 12 in the same connection switch group are arranged in a one-to-one correspondence with the plurality of first signal lines, and the input end of the connection switch 12 is electrically connected to the corresponding first signal line DL And the output end is electrically connected with the corresponding repair line DUM.
  • connection switch 12 When any one of the connection switches 12 is turned on, the first signal line DL electrically connected to the input end and the output end of the connection switch 12 respectively is electrically connected to the repair line DUM. Then, when a first signal line DL is disconnected, by turning on the connection switch 12 electrically connected to the disconnected first signal line DL, the disconnected first signal line DL can be connected to a The repair line DUM is electrically connected, thereby realizing repair of the disconnected first signal line DL.
  • the signal line repair module 10 provided by the embodiment of the present application further includes a first shift unit group, and the first shift unit group includes a multi-stage first shift unit 11 , and the multi-stage first shift unit 11
  • the shift output terminal of can output the enable signal in sequence.
  • the lock connection switches in each connection switch group are set in one-to-one correspondence with the multi-stage first shift units, and the signal output by the shift output terminal OUT of the first shift unit 11 can control the output of at least one corresponding connection switch 12 is turned on or off, and at least one connection switch 12 controlled by each first shift unit 11 is electrically connected to the same first signal line DL.
  • the shift output terminal OUT of the first shift unit 11 in the signal line repair module 10 outputs the enable signal in turn, which can control the connection switches 12 electrically connected to the multi-stage first shift units 11 respectively. turn on sequentially.
  • the first shift unit 11 corresponding to the connection switch 12 to which the disconnected first signal line DL is electrically connected outputs an enable signal
  • the first shift unit 11 outputs an enabling signal.
  • the enable signal output by the bit unit 11 controls the connection switch 12 electrically connected to the first signal line DL where the disconnection occurs to be turned on; and in the display stage, the connection switch 12 electrically connected to the first signal line DL where the disconnection occurs can be maintained.
  • the disconnected first signal line DL can also receive signals in the display stage, while the other connection switches 12 are in the off state, so it will not affect the normal first signal line DL to receive signals.
  • the driving chip 30 is electrically connected to the plurality of first signal lines DL and the signal line repairing module 10, respectively, and is used for providing the first signal lines DL with signals required for controlling the light-emitting display of the sub-pixels.
  • the driving chip 30 sends a control signal to the signal line repair module 10 so that the disconnected first signal line DL is electrically connected to the repair line DUM of the signal line repair module 10 .
  • the driving chip 30 outputs a signal to the first shift unit 11, so that the shift output terminal of the first shift unit 11 corresponding to the disconnected first signal line DL outputs an enable signal, and controls a group of connection switch groups The corresponding connection switch 12 in the circuit is turned on, so that the disconnected first signal line DL is electrically connected to a repair line DUN.
  • the part of the line segment that is electrically connected to the signal line repair module 10 in the disconnected first signal line DL can also receive the display.
  • the display signal is transmitted by the repair line DUM for repairing the first signal line DL and can be the same as the original display signal of the first signal line DL; the disconnected first signal line DL is not connected to the signal line
  • the part of the line segment to which the repair module 10 is electrically connected can normally receive the display signal.
  • the disconnected first signal line DL is located in the non-display area BB, in the display stage, the disconnected first signal line DL can receive a display signal, and the display signal is sent to the first signal line.
  • the repaired line DUM transmitted by the DL for repairing may be the same as the original display signal of the first signal line DL.
  • the display device provided by the embodiment of the present application includes a signal line repair module 10, and the signal line repair module 10 can repair the disconnected first signal line DL, that is, the display device can repair the disconnected first signal by itself Line DL without returning to the factory, easy to implement, high repair efficiency and low cost.
  • the structure that controls the conduction of the connection switch 12 is the first shift unit 11 that outputs the enable signal, so manual sintering by laser is unnecessary, and the accuracy is high.
  • connection switch 12 may be a transistor, the input terminal and the output terminal of the connection switch 12 may be the source and drain of the transistor, respectively, and the first shift unit in the signal line repair module 10 The shift output OUT of 11 is electrically connected to the gate of the transistor.
  • FIG. 4 is an equivalent circuit diagram of a shift unit provided by an embodiment of the present application
  • FIG. 5 is a timing diagram of the shift unit provided by the embodiment shown in FIG. 4 .
  • the structure and working process of the first shift unit 11 in the embodiment of the present application will be illustrated below with reference to FIG. 4 and FIG. 5 .
  • the first shift unit 11 includes an output subunit 11a and a reset subunit 11b, wherein the output subunit 11a includes an on-signal input terminal IN and a clock signal input terminal CLK; the reset subunit 11b includes a reset control signal The input terminal RET and the reset signal input terminal are off.
  • the output sub-unit 11a is used to control the shift output end OUT of the first shift unit 11 to output an enable that can turn on the connection switch 12 under the control of the signal of the turn-on signal input end IN and the signal of the clock signal input end CLK Signal.
  • the reset subunit 11b is used to control the shift output end OUT of the first shift unit 11 to output a reset signal under the control of the reset control signal input end RET signal and the reset signal input end off signal, and the reset signal can make the connection switch 12 close .
  • the turn-on signal input terminal IN, the clock signal input terminal CLK, the reset control signal input terminal RET, and the reset signal input terminal off are all electrically connected to the driving chip 30 and obtain the signal for driving the first shift unit 11 to work from the driving chip 30 . .
  • the output sub-unit 11a further includes a first transistor T1, a second transistor T2 and a first capacitor C1.
  • the gate and source of the first transistor T1 are both connected to the turn-on signal input terminal IN, and the drain is electrically connected to the first plate of the first capacitor C1; the gate of the second transistor T2 is connected to the first electrode of the first capacitor C1
  • the board is electrically connected, the source is electrically connected to the clock signal input terminal CLK, and the drain is electrically connected to the shift output terminal OUT.
  • the second plate of the first capacitor C1 is electrically connected to the shift output terminal OUT.
  • the reset subunit 11b includes a third transistor T3 and a fourth transistor T4.
  • the gate of the third transistor T3 is electrically connected to the reset control signal input terminal RET, the source is electrically connected to the reset signal input terminal off, and the drain is electrically connected to the first plate of the capacitor; the gate of the fourth transistor T4 is electrically connected to the reset control signal
  • the signal input terminal RET is electrically connected, the source is electrically connected to the reset signal input terminal off, and the drain is electrically connected to the shift output terminal OUT.
  • T1 to T4 are N-type transistors as an example for description. In fact, T1 to T4 may also be P-type transistors.
  • FIG. 5 illustrates three working stages of the first displacement unit 11 .
  • the first transistor T1 when the turn-on signal input terminal IN receives a valid signal, that is, a high-level signal, the first transistor T1 is turned on, and the valid signal received by the turn-on signal input end IN is transmitted to the first transistor T1 through the turned-on first transistor T1.
  • the pulse signal received by the clock signal input terminal CLK is a low-level signal or an inactive-level signal, and the shift output terminal OUT outputs a low-level signal or an inactive-level signal.
  • the second transistor T2 is continuously turned on, the pulse signal received by the clock signal input terminal CLK is a valid signal, and the shift output terminal OUT outputs an enable signal.
  • the third transistor T3 and the fourth transistor T4 are turned on.
  • the third transistor T3 provides the reset signal received by the reset signal input terminal off to the first plate of the first capacitor C1 and the gate of the second transistor T2, and the second transistor T2 is turned off.
  • the fourth transistor T4 provides the reset signal received by the reset signal input terminal off to the shift output terminal OUT, and resets the shift output terminal OUT.
  • the multi-stage first shift units 11 included in the first shift unit group in the signal line repair module 10 are cascaded in sequence.
  • the first shift units 11 of two adjacent stages, and the shift output end of the first shift unit 11 of the previous stage OUT is electrically connected to the turn-on signal input terminal IN of the first shift unit 11 of the next stage, and the shift output terminal OUT of the first shift unit 11 of the next stage is input with the reset control signal of the first shift unit 11 of the previous stage Terminal RET is electrically connected. That is, the enable signal output by the shift output terminal OUT of the first shift unit 11 of the previous stage can not only control the connection switch 12 to which it is electrically connected to be turned on, but also can be used for the output of the first shift unit 11 of the next stage.
  • the enable signal input terminal IN provides the enable signal to control the first shift unit 11 of the next stage to start working; the enable signal output by the shift output terminal OUT of the first shift unit 11 of the next stage can not only control the electrical connection
  • the connection switch 12 is turned on, and an enable signal can also be provided for the reset control signal input terminal RET of the first shift unit 11 of the previous stage to control the first shift unit 11 of the previous stage to stop working.
  • the turn-on signal input terminal IN of the first-stage shift unit in the cascaded first shift units 11 is electrically connected to the start signal line, for example, to the first start signal line STV1, the start signal The line may provide an enable signal for the turn-on signal input terminal IN of the first-stage shift unit.
  • the clock signal input terminals CLK of the first shift units 11 of two adjacent stages are connected to different clock signal lines.
  • the clock signal input terminal CLK of the multi-stage first shift unit 11 in the signal line repair module 10 is alternately electrically connected to the first clock signal line CLK1 and the second clock signal line CLK2, and the first clock signal The line CLK1 and the second clock signal line CLK2 output pulse signals alternately, so that the first shift units 11 cascaded in the signal line repair module 10 can output the enable signals in sequence in conjunction with the signal received by the turn-on signal input terminal IN.
  • the reset signal input terminals off of the first shift unit 11 included in the signal line repair module 10 may all be electrically connected to the same reset signal line, and the reset signal line may continuously transmit reset during the signal line repair stage. Signal. For example, it is electrically connected to the first reset signal line OFF1, and the first reset signal line OFF1 continues to output the reset signal in the signal line repair stage.
  • FIG. 6 is a timing diagram of a signal line repair stage of the display device shown in FIG. 3 .
  • the signal line repairing module 10 includes m-stage cascaded first shift units 11 , which are the first-stage first shift unit 111 , the second-stage first shift unit 112 , . . . , The n-1th stage first shift unit 11n-1, the nth stage shift unit 11n, ..., the mth stage first shift unit 11m, where m is a positive integer greater than or equal to 3.
  • a connection switch group of the signal line repair module 10 includes m connection switches 12, which are a first connection switch 121, a second connection switch 122, ..., an n-1th connection switch 12n-1, and an nth connection switch 12n. , ..., the mth connection switch 12m.
  • the display area AA of the display panel 001 may include m first signal lines DL, which are the first first signal line DL1, the second first signal line DL2, . . . , and the n-1th first signal line respectively.
  • the input ends of the m first shift units 11 in one connection switch group are respectively electrically connected to the m first signal lines DL.
  • the specific working process of the signal line repair module 10 for repairing the nth first signal line DLn is as follows:
  • the turn-on signal input terminal IN of the first-stage first shift unit 111 in the signal line repair module 10 receives the valid signal transmitted by the first start signal line STV1 , and then communicates with the first-stage first shift unit 111
  • the first clock signal line CLK1 connected to the clock signal input terminal CLK transmits the enable signal
  • the shift output terminal OUT of the first stage first shift unit 111 outputs the enable signal
  • the shift output terminal OUT of the first stage first shift unit 111 outputs the enable signal.
  • the bit output terminal OUT controls the first connection switch 121 in a connection switch group to be turned on, then the first first signal line DL1 is electrically connected with a repair line DUM;
  • the enable signal input terminal IN of the second-stage first shift unit 112 in the signal line repair module 10 receives the enable signal output from the shift output terminal OUT of the first-stage first shift unit 111, and then communicates with The second clock signal line CLK2 connected to the clock signal input end CLK of the second stage first shift unit 112 transmits a valid signal, then the shift output end OUT of the second stage first shift unit 112 outputs an enable signal, and the second The shift output terminal OUT of the first shift unit 112 controls the second connection switch 122 in a connection switch group to be turned on, so that the second first signal line DL2 is electrically connected to a repair line DUM.
  • the reset control signal input terminal RET of the first shift unit 111 of the first stage receives the enable signal output by the shift output terminal OUT of the first shift unit 112 of the second stage, then the reset signal transmitted by the first reset signal line OFF1
  • the first-stage first shift unit 111 is controlled to be turned off and the shift output terminal OUT of the first-stage first shift unit 111 is reset.
  • the connection switch 121 is turned off, and the first first signal line DL1 is disconnected from the repair line DUM;
  • the turn-on signal input terminal IN of the n-th stage first shift unit 11n in the signal line repair module 10 receives the enable signal output by the shift output terminal OUT of the n-1th stage of the first shift unit 111 . energy signal.
  • the clock signal line connected to the clock signal input terminal CLK of the n-th stage first shift unit 11n for example, the first clock signal line CLK1 transmits a valid signal
  • the shift output terminal OUT of the n-th stage of the first shift unit 11n Output the enable signal
  • the shift output terminal OUT of the n-th first shift unit 11n controls the n-th connection switch 12n in a connection switch group to turn on, then the n-th first signal line DLn is electrically connected to a repair line DUM .
  • the reset control signal input terminal RET of the first shift unit 11n-1 of the n-1 stage receives the enable signal output by the shift output terminal OUT of the first shift unit 11n of the n-th stage, and the first reset signal line is OFF1
  • the transmitted reset signal controls the n-1 stage first shift unit 11n-1 to be turned off and the shift output terminal OUT of the n-1 stage first shift unit 11n-1 is reset, and the n-1 stage first shift unit 11n-1 is reset.
  • the n-1th connection switch 12n-1 in a connection switch group controlled by the bit unit 11n-1 is turned off, and the n-1th first signal line DLn-1 is disconnected from the repair line DUM;
  • the signal line repair module 10 is connected to the clock signal line of the clock signal input end CLK of the n-th first shift unit 11n, for example, the first clock signal line CLK1 keeps the transmission enabled in the signal line repair phase and the display phase signal, other clock signal lines continue to output non-enable signals, then the shift output terminal OUT of the n-th stage first shift unit 11n continues to output the enable signal, and the other first shift units 11 continue to be turned off. Then, the n-th first signal line DLn is continuously electrically connected to a repair line DUM, and therefore, the repair of the n-th first signal line DLn can be completed.
  • FIG. 7 is a partial enlarged view of another display device according to an embodiment of the present application
  • FIG. 8 is a timing diagram of a signal line defect detection stage of the display device shown in FIG. 7
  • at least one repair line DUM can be multiplexed into the detection line DET
  • the repair line multiplexed into the detection line can be used to transmit the signal on the first signal line DL to the driver in the signal line defect detection stage and the connection switches corresponding to the repair line DUM multiplexed as the detection line DET are multiplexed into the detection switch group, and the connection switches in the connection switch group multiplexed into the detection switch group are multiplexed into the detection switch.
  • the detection switch is turned on, and the signal on the first signal line DL electrically connected to its output end is transmitted to the output end of which is electrically connected to the repair line DUM multiplexed into the detection line DET, and then the first signal line The signal on the DL is transmitted to the driving chip 30 for processing through the repair line DUM multiplexed as the detection line DET.
  • the signal line repair module 10 further includes a plurality of reset switches 12 ′ and a second reset signal line REF.
  • the second reset signal line REF is used to obtain the reset signal from the driver chip 30 and transmit the reset signal to the multiplexer. Repair line for the detection line.
  • the input end of the reset switch 12' is electrically connected to at least one repair line DUM multiplexed as the detection line DET, and the output end is electrically connected to the second reset signal line REF.
  • the second reset signal line REF receives and transmits the reset signal output by the driver chip 30.
  • the reset switch 12' can be a transistor, the input terminal and the output terminal of the reset switch 12' are the source and drain of the transistor, respectively, and the control terminal is the gate of the transistor.
  • the signal line repair module 10 can not only repair the first signal line DL, but also detect defects of the first signal line DL. That is, the signal line repairing module 10 detects the defect of the first signal line DL in the signal line defect detection stage, and repairs the first signal line DL in the signal line repair stage. And the signal line defect detection stage is performed before the signal line repair stage, so as to provide the signal line repair stage with the position of the disconnected first signal line DL.
  • the corresponding connection switch 12 in the connection switch group that is multiplexed into the detection switch group is turned on, and the connected connection switch 12 electrically connects the
  • the first signal line DL is electrically connected to a detection line DET, and the detection line DET transmits the signal on the first signal line DL to the driving driver chip 3030 or the main board 003, and the driving driver chip 3030 or the main board 003 processes the signal to determine Whether the first signal line DL is disconnected.
  • the driver chip 3030 or the motherboard receives the signal, it compares the signal provided by the driver chip 3030 to the first signal line DL with the signal.
  • the two signals are different, it means that the first signal line DL is defective. Assuming that the signal transmitted by the detection line DET to the driving chip 3030 or the main board is zero potential, it can be determined that the first signal line DL has a disconnection problem.
  • the multi-stage first shift units 11 are also turned on in sequence to implement sequential detection of the first signal lines DL.
  • the signal on the detection line DET used for detecting the first signal line DL should be consistent with the detected signal on the first signal line DL. Then, after each first signal line DL is detected, the signal on the detection line DET for signal line defect detection may be reset.
  • one reset switch 12 ′ can be arranged in a one-to-one correspondence with the first signal line DL, that is, a plurality of reset switches 12 ′ can be alternately arranged one-to-one with the plurality of connection switches 12 in the connection switch group multiplexed into the detection switch group.
  • a plurality of reset switches 12' can be turned on in sequence and one reset switch 12' can be turned on after a corresponding one of the connection switches 12 is turned on and off, that is, after the corresponding first signal line DL is detected on.
  • the signal line repairing module 10 provided by the embodiment of the present application further includes a plurality of reset shift units 11 ′, and the plurality of reset shift units 11 ′ and reset switches are one by one. Correspondingly set and can output enable signal in sequence.
  • the shift output terminal OUT of the reset shift unit 11' is electrically connected to the control terminal of a corresponding reset switch 12', and the signal output by the shift output terminal OUT can control the reset switch 12' to be turned on or off.
  • the shift output terminal OUT of the reset shift unit 11 ′ in the signal line repair module 10 outputs an enable signal in turn, which can control the reset switches 12 electrically connected to the multi-stage reset shift units 11 ′ respectively. 'Turn on in sequence.
  • the reset switch 12 ′ corresponding to the first signal line DL can be controlled to be turned on by the reset shift unit 11 ′, so as to be used for detecting the first signal line DL
  • the signal on the repair line DUM is reset to ensure the accuracy of the signal on the repair line DUM when the next first signal line DL is detected.
  • the structure and working principle of the reset shift unit 11' may be the same as those of the first shift unit 11, which will not be repeated here.
  • the reset shift unit 11 ′ In an implementation manner of this embodiment, as shown in FIG. 7 , in the multi-level reset shift unit 11 ′ and the multi-level first shift unit 11 included in the signal line repair module 10 , the reset shift unit 11 ′ It is alternately arranged and cascaded with the first shift unit 11 in sequence.
  • the cascading manner of the reset shifting unit 11' and the first shifting unit 11 is the same as the cascading manner of the multi-stage first shifting unit 11 shown in FIG. 3, and will not be repeated here.
  • FIG. 8 is a timing diagram of a signal line defect detection stage of the display panel shown in FIG. 7 .
  • the signal line repair module 10 includes an m-level first shift unit 11 and an m-level reset shift unit 11 ′, and the m-level reset shift unit 11 ′ is a first-level reset shift unit 111 respectively.
  • the second stage reset and shift unit 112' ..., the n-1th stage of reset and shift unit 11n-1', the nth stage of reset and shift unit 11n', ..., the mth stage of reset and shift unit 11m '.
  • the specific working process of the signal line repair module 10 in the signal line defect detection stage is as follows:
  • the enable signal input terminal IN of the first shift unit 111 of the first stage receives the enable signal transmitted by the first start signal line STV1, and is then connected to the clock signal input terminal CLK of the first shift unit 111 of the first stage
  • the first clock signal line CLK1 transmits a valid signal
  • the shift output terminal OUT of the first-stage first shift unit 111 outputs an enable signal
  • the shift output terminal OUT of the first-stage first shift unit 111 controls the first
  • the connection switch 121 is turned on, and the signal on the first first signal line DL1 is transmitted to the detection line DET;
  • the turn-on signal input terminal IN of the first-stage reset shift unit 111 ′ receives the valid signal output by the shift output terminal OUT of the first-stage first-stage shift unit 111 , and then communicates with the first-stage reset shift unit 111
  • the second clock signal line CLK2 connected to the clock signal input terminal CLK of '' transmits a valid signal
  • the shift output terminal OUT of the first stage reset shift unit 111' outputs an enable signal to control the first stage reset shift unit 111'
  • the reset switch 12 ′ electrically connected to the shift output OUT of the first stage is turned on, and the reset signal transmitted on the second reset signal line REF is transmitted to the detection line DET;
  • the reset signal transmitted by the first reset signal line OFF1 controls the first-stage first shift unit 111 to turn off and the first-stage
  • the shift output terminal OUT of a shift unit 111 is reset, the first connection switch 121 controlled by the
  • the enable signal input terminal IN of the first shift unit 112 of the second stage receives the enable signal output by the shift output terminal OUT of the reset shift unit 111' of the first stage, and then communicates with the first shift unit of the second stage. If the first clock signal line CLK1 connected to the clock signal input terminal CLK of the unit 112 transmits a valid signal, the shift output terminal OUT of the second-stage first shift unit 112 outputs an enable signal, and the second-stage first shift unit 112 outputs an enable signal.
  • the second connection switch 122 controlled by the shift output end OUT of the first stage is turned on, and the signal on the second first signal line DL2 is transmitted to the detection line DET; at the same time, the reset control signal input end RET of the first stage reset shift unit 111'
  • the reset signal transmitted by the first reset signal line OFF1 controls the first-stage reset shift unit 111' to turn off and the first-stage reset
  • the shift output terminal OUT of the shift unit 111' is reset, the reset switch 12' electrically connected to the shift output terminal OUT of the first-stage reset shift unit 111' is turned off, and the detection line DET and the second reset signal line REF are disconnected open connection;
  • the turn-on signal input terminal IN of the second-stage reset shift unit 112 ′ receives the valid signal output by the shift output terminal OUT of the second-stage first shift unit 112 , and then communicates with the second-stage reset shift unit 112
  • the second clock signal line CLK2 connected to the clock signal input end CLK of '' transmits a valid signal, then the shift output end OUT of the second stage reset shift unit 112' outputs an enable signal to control the second stage reset shift unit 112'
  • the reset switch 12' electrically connected to the shift output terminal OUT of the second stage is turned on, and the reset signal transmitted on the second reset signal line REF is transmitted to the detection line DET; at the same time, the reset control signal input terminal RET of the second-stage first shift unit 112
  • the reset signal transmitted by the first reset signal line OFF1 controls the second-stage first shift unit 112 to be turned off and the second-stage first shift
  • FIG. 9 is a timing diagram of a signal line repair stage of the display device shown in FIG. 7 . Still assuming that the nth first signal line DLn is disconnected, the working process of the signal line repairing stage of the signal line repairing module 10 in the present application will be described below with reference to FIG. 7 and FIG. 9 .
  • the specific working process of the signal line repairing module 10 in the signal line repairing stage is shown in FIG. 9 .
  • the difference from the signal line detection stage shown in FIG. 8 is that at time t2n-1, the nth stage first shift unit
  • the turn-on signal input terminal IN of 11n receives the enable signal output from the shift output terminal OUT of the n-1th stage reset shift unit 111', and is then connected to the clock signal input terminal CLK of the nth stage first shift unit 11n.
  • the clock signal line for example, the first clock signal line CLK1 transmits a valid signal, then the shift output terminal OUT of the n-th stage first shift unit 11n outputs an enable signal, and the shift output terminal of the n-th stage first shift unit 11n
  • the nth connection switch 12n in a connection switch group controlled by OUT is turned on, and the nth first signal line DLn is electrically connected to a repair line DUM.
  • the clock signal line connected to the clock signal input terminal CLK of the n-th first shift unit 11n such as the first clock signal line CLK1, keeps transmitting valid signals in the signal line repair stage and the display stage, and other clock signals.
  • the shift output terminal OUT of the n-th stage first shift unit 11n continues to output an enable signal, and the other first shift units 11 continue to be turned off. Then, the nth first signal line DLn is continuously electrically connected to a repair line DUM, and the repair of the nth first signal line DLn is completed.
  • the signal line repair module 10 includes a connection switch group and a repair line DUM, and the shift output terminal OUT of the first shift unit 11 is connected to the connection switch
  • the control terminal of 12 is electrically connected, and when the shift output terminal OUT of the first shift unit 11 outputs an enable signal, the connection switch 12 of the first shift unit 11 is controlled to be turned on.
  • FIG. 10 is a partial enlarged view of another display device provided by an embodiment of the present application.
  • the signal line repair module 10 includes a plurality of connection switch groups and a plurality of repair lines DUM, there is a one-to-one correspondence between multiple connection switch groups and multiple repair lines DUM.
  • the connection switch group includes a plurality of connection switches 12, the input ends of the plurality of connection switches 12 in the same connection switch group are respectively electrically connected with different first signal lines DL, and the outputs of the plurality of connection switches 12 in the same connection switch group
  • the terminals are electrically connected to a corresponding repair wire DUM, and the connection switches 12 in different connection switch groups are electrically connected to different repair wires DUM.
  • the signal line repair module 10 further includes selection switch groups corresponding to the connection switch groups one-to-one, selection signal lines SEL corresponding to one-to-one, and one-to-one selection signal lines SEL. Corresponding storage capacitor bank.
  • the plurality of selection signal lines SEL are in a one-to-one correspondence with the plurality of selection switch groups.
  • the selection signal lines SEL are electrically connected to the control terminals of the plurality of selection switches 13 in the corresponding selection switch group.
  • the storage capacitor group includes a plurality of storage capacitors C3, the plurality of storage capacitors C3 in each storage capacitor group are in one-to-one correspondence with the plurality of connection switches 12 in the corresponding connection switch group, and the first plate of the storage capacitor C3 is connected to the The control terminals of the corresponding connection switches 12 are electrically connected.
  • the selection switch group includes a plurality of selection switches 13, and the plurality of selection switches 13 in each selection switch group are in one-to-one correspondence with the plurality of storage capacitors C3 in the corresponding storage capacitor group, and the corresponding selection switch group, storage capacitor
  • the output terminal of the selection switch 13 is electrically connected to the second plate of the corresponding storage capacitor C3
  • the input terminal of the selection switch 13 is electrically connected to the shift output terminal OUT of the corresponding first shift unit 11, and the selection switch 13
  • the control terminals of 13 are electrically connected to the corresponding selection signal lines SEL
  • the control terminals of the selection switches 13 in different selection switch groups are electrically connected to different selection signal lines SEL.
  • the enable signal output from the shift output terminal OUT of the first shift unit 11 electrically connected to the selection switch 13 is transmitted to the connection electrically connected to the selection switch 13 through the selection switch 13
  • the control terminal of the switch 12 in an implementation manner of the present application, the selection switch 13 may be a transistor, the source of the transistor is used as its input terminal, the drain is used as its output terminal, and the gate is used as its control terminal.
  • the driving chip 30 sends a control signal to the signal line repair module 10 including sending a selection signal to the selection signal line SEL, then the selection switch 13 electrically connected to the selection signal line SEL for transmitting the selection signal is turned on, and the output of the first shift unit 11 makes the selection switch 13 turned on.
  • the energy signal is transmitted to the control terminal of the corresponding connection switch 12, so that the corresponding connection switch 12 is turned on.
  • the first shift unit 11 corresponding to one disconnected first signal line DL When a plurality of first signal lines are disconnected, when the first shift unit 11 corresponding to one disconnected first signal line DL outputs an enable signal, the corresponding selection switches in one of the selection switch groups are turned on, so that The energy signal can control the corresponding connection switches in a group of connection switch groups to be turned on, the disconnected first signal line DL can be electrically connected with a repair line DUM; the first shift corresponding to the other disconnected first signal line DL
  • the unit 11 When the unit 11 outputs the enable signal, the corresponding selection switch in another group of selection switch groups is turned on, and the enable signal can control the corresponding connection switches in the other group of connection switch groups to be turned on, so as to realize the disconnection of the first signal line.
  • the DL can be electrically connected to another repair line DUM.
  • the enable signals sequentially output by the shift output terminals OUT of the multi-stage first shift unit 11 correspond to the one of the disconnected first signal lines DL.
  • the selection switch 13 in a selection switch group is turned on, then the enable signal output by the first shift unit 11 of this stage is transmitted to the storage capacitor, pulled high or Pull down the potential of the gate of the connection switch 12, and then control the connection switch 12 to turn on.
  • the repair of one first signal line DL can be completed.
  • FIG. 10 is a partial enlarged view of another display device according to an embodiment of the present application, and the repair of the plurality of first signal lines DL will be described below with reference to FIG. 10 .
  • FIG. 10 only illustrates that the signal line repair module 10 can repair the two first signal lines DL.
  • the signal line repair module 10 selects switch groups and connects switch groups. and the number of repair lines is different, the repair can be performed on different numbers of the first signal lines DL.
  • the number of selection switch groups, connection switch groups and repair lines is the same and the same as the number of repairable first signal lines DL.
  • the signal line repair module 10 includes two selection switch groups, a plurality of selection switches included in one selection switch group are the first-type selection switches 13a, and the other selection switch group includes a plurality of selection switches is the second type of selection switch 13b;
  • the signal line repair module 10 includes two connection switch groups, the plurality of connection switches included in one connection switch group are the first type connection switches 12a, and the other selection switch group includes a plurality of connection switches
  • the connection switch is a second type of connection switch 12b;
  • the signal line repair module 10 includes two repair lines DUM, which are the first repair lines DUM1 and DUM2 respectively;
  • the signal line repair module 10 includes two selection signal lines SEL, which are respectively the first repair line DUM1 and DUM2.
  • a selection signal line SEL1 and a second selection signal line SEL2, the signal line repair module 10 includes two storage capacitor groups, one storage capacitor group includes a plurality of storage capacitors C2 of the first type, and the other storage capacitor group The plurality of storage capacitors included in are the second type of storage capacitors C3.
  • the control terminal of the first type selection switch 13a is electrically connected to the first selection signal line SEL1, the control terminal of the second type selection switch 13b is electrically connected to the second selection signal wire SEL2; the output terminal of the first type connection switch 12a is electrically connected to The first repair line DUM1 is electrically connected, and the output end of the second type connection switch 12b is electrically connected to the second repair line DUM2; a first signal line DL is electrically connected to the input end of a first type connection switch 12a and is simultaneously connected to a second repair line DUM2.
  • the input end of the second type connection switch 12b is electrically connected; the input end of the first type selection switch 13a corresponding to the first type connection switch 12a electrically connected to the same first signal line DL and the second type selection switch 12b corresponding to the second type connection switch 12b are electrically connected.
  • the input terminal of the class selection switch 13b is electrically connected to the shift output terminal of the same shift unit 11 .
  • the nth first signal line DLn is repaired first, when the nth stage first shift unit 11 outputs the enable signal, one selection signal line SEL transmits the enable signal, and all the selection switches 13 in one selection switch group If the first selection signal line SEL1 transmits the enable signal to turn on all the first-type selection switches 13a, then the first plates and the first shift unit of all the first-type storage capacitors C2 in a corresponding storage capacitor group
  • the shift output terminal OUT of 11 is electrically connected, that is, the nth first signal line DLn is electrically connected to the first repair line DUM1, then the nth stage first shift unit 11 outputs an enable signal and transmits it to the corresponding first signal line DLn.
  • Type storage capacitor C2 complete the repair of the nth first signal line DLn, and then the first selection signal line SEL1 transmits a turn-off signal to turn off all the first selection switches 13a, but due to the existence of the first type storage capacitor C2 , the first type of connection switch 12a corresponding to the nth first signal line DLn is still turned on and maintains the repair of the nth first signal line DLn.
  • the other selection signal line SEL transmits the enable signal, then the other selection switch All the selection switches 13 in the group are turned on. If the second selection signal line SEL2 transmits an enable signal to make all the second-type selection switches 13b turned on, then all the second-type storage capacitors C3 in the corresponding other storage capacitor group are turned on.
  • the first electrode plate is electrically connected to the shift output terminal OUT of the first shift unit 11 .
  • the principle of electrical connection between the n-th first signal line DLn and the first repair line DUM1 is the same, then the n-1-th first signal line DLn-1 is electrically connected with the second repair-line DUM2, and the n-1-th first signal line DLn-1 is electrically connected to the second repair line DUM2. Repair of the first signal line DLn-1, and then the second selection signal line SEL2 transmits a turn-off signal so that all the second-type selection switches 13b are turned off, but the repair of the n-1th first signal line DLn-1 is maintained .
  • the signal line repair module 10 includes multiple selection switch groups, multiple selection signal lines SEL and multiple storage capacitor groups, in the process of repairing the n-th first signal line DLn, the selection signal
  • the time when the line SEL transmits the signal to turn on the selection switch 13 can be simultaneously or slightly later than the time when the n-th stage first shift unit 11 outputs the enable signal, so as to avoid erroneous repair of other first signal lines DL.
  • FIG. 11 is a partial enlarged view of still another display device according to an embodiment of the present application.
  • the signal line repair module 10 further includes a multi-stage reset shift unit 11 ′ and a plurality of reset switches 12 ′, and a repair line DUM is multiplexed as a detection line DET, that is, the signal line repairing module 10 shown in FIG. 11 , can reset the plurality of first signal lines DL and detect signal line defects.
  • the cascading manner of the reset shift unit 11 ′ and the first shift unit 11 shown in FIG. 11 is the same as that of the embodiment shown in FIG. 7 , and the reset switch 12 ′ is connected to the reset shift unit 11 ′ and the second reset signal line REF The manner is also the same as that of the embodiment shown in FIG. 7 . It should be noted that, when the signal line repair module 10 shown in FIG. 11 detects the defects of the first signal line DL, it is necessary to turn on the selection switch 13 corresponding to the connection switch 12 corresponding to the repair line DUM multiplexed as the detection line DET.
  • the connection switch 12 corresponding to the repair line DUM multiplexed as the detection line DET to be turned on to ensure that the signal output by the shift output terminal OUT of the first shift unit 11 can control the connection switch 12 corresponding to the repair line DUM multiplexed as the detection line DET to be turned on, and the next signal line defect detection process is the same as that shown in FIG. 7 .
  • the detection process of the illustrated embodiment is the same.
  • the second type selection switch 13 b is first turned on, so that the shift output terminal OUT of the first shift unit 11 is turned on.
  • the output enable signal can be transmitted to the second-type storage capacitor C2 and control the second-type connection switch 12b.
  • the basic process of the signal line repair module 10 shown in FIG. 11 is the same as that of the signal line repair module 10 shown in FIG. 10 in the signal line repair stage.
  • the repair of the first signal line DL is started, that is, the repair line DUM multiplexed as the detection line DET is the last choice for repairing the first signal line DL. That is, in the signal line repair stage, the repair line DUM multiplexed as the detection line DET is electrically connected to the broken first signal line DL and the repair time is later than that of the other repair lines DUM and the broken first signal line DL. Time to connect and repair.
  • the multiple first signal lines DL may be repaired in sequence in a period of time.
  • the repair line DUM which is multiplexed as the detection line DET, repairs the first signal line DL at the end, which can ensure that the first signal line DL is defective before other repair lines repair the first signal line DL in different time periods. detection.
  • the second repair line DUM2 when the second repair line DUM2 is multiplexed into the detection line DET, when repairing the first signal line DL, the first selection switch 13a, the first connection switch 12a, the first selection switch 13a, the first selection switch The signal line SEL1 and the first repair line DUM1 repair the first signal line DL; finally, the second selection switch 13b, the second connection switch 12b, the second selection signal line SEL2 and the second repair line DUM2 are used to repair the first signal line DL. Repair the signal line DL.
  • FIG. 12 is a partial enlarged view of still another display device provided by an embodiment of the present application.
  • the difference between the display panel shown in FIG. 12 and the display panel shown in FIG. 11 is that all the repair lines DUM are multiplexed into the detection line DET, then one detection line DET can be used to determine the disconnection of the first signal line DL once And use the repair line DUM multiplexed by the detection line DET to repair a broken first signal line DL, and then use another detection line DET to determine the disconnection of the first signal line DL and use the detection line.
  • the repair line DUM multiplexed by the DET repairs another disconnected first signal line DL.
  • all the repair lines DUM are used for repairing the first signal line DL.
  • the first repair line DUM1 is multiplexed into the detection line DET
  • the second repair line DUM2 is also multiplexed into the detection line DET.
  • the detection line DET of the multiplexed first repair line DUM1, the first selection signal line SEL1, the first type selection switch 13a, the first type storage capacitor C2 and the first type connection switch 12a can be used to connect all the first signal lines.
  • DL detects and repairs a broken first signal line DL; then the detection line DET, the second selection signal line SEL2, the second-type selection switch 13b, the second-type selection switch 13b, the second-type repair line DUM2 multiplexed with the second repair line DUM2 are used.
  • the storage capacitor C3 and the second type of connection switch 12b detect all the first signal lines DL and repair the other first signal line DL confirmed to be disconnected.
  • the reset switch 12 ′ and the reset shift unit 11 ′ are still set in a one-to-one correspondence, and the reset shift unit 11 ′ and the first shift unit 11 are still set in one-to-one correspondence.
  • the output end of one reset switch 12 ′ can be electrically connected to a plurality of repair lines multiplexed as detection lines DET.
  • FIG. 13 is a partial enlarged view of still another display device provided by an embodiment of the present application.
  • the non-display area BB of the display panel 001 of the display device is further provided with a signal line defect detection module 20 , and the signal line defect detection module 20 is electrically connected to the first signal line DL for detecting the first signal line DL. Perform defect detection.
  • the signal line defect detection module 20 includes a detection line DET, a second reset signal line REF, a plurality of detection switches 22, a plurality of reset switches 12', a plurality of second shift units 21, and a plurality of reset shift units 11'.
  • the difference between the embodiment shown in FIG. 13 and the embodiment shown in FIG. 7 , FIG. 11 and FIG. 12 is that the structure for signal line defect detection is the signal line defect detection module 20 independent of the signal line repair module 10 .
  • the detection line DET is used to receive the signal on the first signal line DL and transmit it to the driving chip 30, and the driving chip 30 judges whether the signal on a certain first signal line DL is consistent with the reference signal.
  • the first signal line DL is defective, and if there is no signal on a certain first signal line DL, it is determined that the first signal line DL is disconnected.
  • the second reset signal line REF is used to obtain a reset signal from the driving chip 30 and transmit the reset signal to the detection line DET to reset the signal on the detection line DET.
  • the plurality of detection switches 22 are arranged in a one-to-one correspondence with the plurality of first signal lines DL, and the input end of the detection switch 22 is electrically connected to a first signal line DL, and the output end is electrically connected to the detection line DET.
  • the detection switch 22 When the detection switch 22 is turned on, it can be The signal on the first signal line DL electrically connected to its input end is transmitted to the detection line DET electrically connected to its output end, then the signal on the first signal line DL can be transmitted to the driving chip 3030 or the driver chip 3030 through the detection line DET.
  • the output end of the reset switch 12' is electrically connected to the detection line DET, and the input end is electrically connected to the second reset signal line REF.
  • the reset switch 12' When the reset switch 12' is turned on, the reset signal transmitted on the reset line REF electrically connected to the input end is transmitted to the second reset signal line REF.
  • the detection line DET can reset the signal on the detection line DET.
  • the detection switch 22 and the second shift unit 21 are arranged in a one-to-one correspondence, and the shift output terminal OUT of the second shift unit 21 is electrically connected to the control terminal of the detection switch 22 , and the reset switch 12 ′ is one-to-one with the reset shift unit 11 ′ Correspondingly set and reset the shift output terminal OUT of the shift unit 11' is electrically connected to the control terminal of the reset switch 12', and the signal output by the shift output terminal OUT of the second shift unit 21 and the reset shift unit 11' The signal output by the shift output terminal OUT is respectively used to control the turn-on or turn-off of the detection switch 22 and the reset switch 12 ′ electrically connected thereto.
  • the detection switch 22 can be a transistor, the source of the detection switch 22 is the source of the transistor, the drain is the drain of the transistor, and the gate is the control terminal of the transistor.
  • the signal on the detection line DET is the signal on the first signal line DL to which the detection switch 22 is electrically connected.
  • the reset switches 12' and the detection switches 22 may be alternately arranged one by one, and the reset switches 11' are turned on after the corresponding detection switches 22 are turned on and off.
  • the structure of the second shift unit 21 may be the same as that of the first shift unit 11 and the working principle is the same.
  • the reset signal input terminal off of the second shift unit 21 included in the signal line defect detection module 200 may all be electrically connected to the same reset signal line, and the reset signal line may continue to transmit during the signal line repair stage reset signal. For example, it is electrically connected to the second reset signal line OFF2, and the second reset signal line OFF2 continues to output the reset signal in the signal line repair stage.
  • the signals on the first signal lines DL should be sequentially transmitted to the driving driver chip 3030 or the main board 004 by the detection line DET, and the second shift unit 21 should be turned on in sequence.
  • the corresponding detection switches 22 are sequentially turned on.
  • the reset shift units 11' should also be turned on in sequence, so that the corresponding reset switches 12' are turned on in sequence.
  • the second shift unit 21 and the reset shift unit 11 ′ are alternately arranged and cascaded in sequence, that is, the cascade connection of the second shift unit 21 and the reset shift unit 11 ′ can be the same as that shown in FIG. 7.
  • the cascaded manner of the first shift unit 11 and the reset shift unit 11 ′ is the same.
  • the cascade connection method of the first shift unit 11 is the same, and the turn-on signal input terminal IN of the second shift unit 21 of the first stage is electrically connected to the start signal line, such as the second start signal line STV2, and the second start signal
  • the line STV2 provides an enable signal for the enable signal input terminal IN of the first-stage second shift unit 21 .
  • the clock signal input terminals CLK of the adjacent second shift units 21 and the reset shift unit 11' are connected to different clock signal lines. As shown in FIG. 13 , the clock signal input terminals CLK of the second shift unit 21 and the reset shift unit 11 ′ are alternately electrically connected to the third clock signal line CLK3 and the fourth clock signal line CLK4 , and the third clock signal line CLK3 By outputting pulse signals alternately with the fourth clock signal line CLK4, the cascaded second shift unit 21 and the reset shift unit 11' can output enable signals in sequence in conjunction with the signal received by the turn-on signal input terminal IN.
  • the second shift units 21 are cascaded in sequence and the reset shift units 11' are cascaded in sequence. Then, after a second shift unit 21 outputs the enable signal, the detection of a first signal line DL is completed, and then the second shift unit 21 of this stage is turned off and the reset shift unit 11 ′ outputs the enable signal to complete the detection of the first signal line DL.
  • the defect detection of the first signal line DL does not require detection software or detection equipment such as a microscope, which can reduce the detection cost and improve the detection efficiency.
  • the working stage of the display device further includes a signal line defect detection stage.
  • the signal line defect detection module 20 works and locates the defective first signal line DL.
  • the signal line repair module 10 can be activated, and the signal line repair module 10 repairs the first signal line DL with the same working process as any of the above-mentioned embodiments. Repair of the broken first signal line DL.
  • FIG. 14 is a schematic structural diagram of the driver chip provided by the embodiment of the present application. As shown in FIG. 14 , the driver chip includes a control unit 311 and an input/output unit 312 .
  • the driver chip When it is determined that there is a broken first signal line, the driver chip provides a control signal, so that the broken first signal line is electrically connected to the repair line DUM in the signal line repair module 10 .
  • providing a control signal so that the broken first signal line is electrically connected to the repair line DUM in the signal line repair module 10 includes: the control unit 311 instructing the input and output unit 312 to perform a multi-stage first shift to the signal line repair module 10
  • the unit 11 sends a control signal to control the shift output terminal of the first shift unit 11 corresponding to the disconnected first signal line DL to output an enable signal, so that the corresponding connection switch in the group connection switch group is turned on, so that the disconnection
  • the first signal line DL is electrically connected to a repair line DUM.
  • the enable signal is supplied to the start signal line
  • the reset signal is supplied to the reset signal line
  • the pulse signal is supplied to the clock signal line
  • the enable signal or the disable signal is continuously output after outputting a plurality of pulse signals
  • the chip determines that there is a disconnection of the first signal
  • the control unit 311 is also used to instruct the input and output unit 312 to output selection signals to the multiple selection signal lines respectively, so as to activate the selection switch group and the connection switch group respectively, and then respectively control the plurality of first signals for disconnection.
  • the line DL is in electrical conduction with the different repair line DUM.
  • the driving chip also provides signals to the plurality of first signal lines DL to control the sub-pixels P0 to emit light and display.
  • the driver chip in FIG. 1 or FIG. 2 is the driver chip 30 provided by the embodiment of FIG. 14 of the present application.
  • FIG. 15 is a schematic diagram of the electronic device provided by the embodiment of the present application.
  • the electronic device includes the display device provided by any embodiment of the present application.
  • the specific structure of the display device has been described in detail in the above-mentioned embodiments, and will not be repeated here.
  • the electronic device shown in FIG. 15 is only a schematic illustration, for example, it can be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic paper book, a TV, and a smart watch.

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Abstract

一种显示装置、驱动芯片及电子设备，显示装置的信号线修复模块（10）中的一个连接开关组中的多个连接开关（12）与多条信号线（DL）一一对应设置，同一连接开关组中的连接开关（12）的输入端与对应的信号线（DL）电连接，输出端与对应的一条修复线（DUM）电连接；每一组连接开关组中的多个连接开关（12）与多级第一移位单元（11）一一对应设置；驱动芯片（30）在确定存在断线的信号线（DL）时，向信号线修复模块（10）发送控制信号，使发生断线的信号线（DL）对应的第一移位单元（11）的移位输出端（OUT）输出使能信号，控制一组连接开关组中对应的连接开关（12）开启，使得断线的信号线（DL）与一条修复线（DUM）电导通。显示装置可以对断线的信号线进行修复，无需返厂且无需人工操作。

Description

一种显示装置、驱动芯片及电子设备
本申请要求于2020年9月30日提交中国专利局、申请号为202011063292.5、申请名称为“一种显示装置、驱动芯片及电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示装置、驱动芯片及电子设备。
背景技术
随着显示技术的发展，具有显示功能的手机、电脑、电视、智能穿戴设备等在人们工作和生活中的重要性越来越高，用户对这些显示产品的品质要求也越来越高。无论是液晶显示技术还是有机自发光显示技术，为了实现显示都需要在显示面板中设置各种信号线。而由于信号线的工艺制程或者其他原因，信号线存在断线风险，导致显示时出现黑线条或者白线条，而影响显示效果、甚至影响显示信息的准确性。
当前对于显示屏信号线断线的修复方式为，通过激光烧结的方式将断线的信号线与预留的信号线物理相连，预留的信号线与驱动芯片的输出端电连接从显示屏的非显示区绕线到信号线远离驱动芯片的一端。预留的信号线传输的信号与断线的信号线应该传输的信号相同，进而可以保证显示屏能够正常显示。
但是现有的断线修复方式需要将显示屏返厂后由人工操作，该过程繁琐、成本高且效率低。
发明内容
本申请提供了一种显示装置、驱动芯片及电子设备，以解决以上问题。
第一方面，本申请提供一种显示装置，包括多个用于进行发光显示的子像素、多条与子像素电连接并为子像素提供发光显示所需信号的信号线、与多条信号线电连接，用于对发生断线的信号线进行修复的信号线修复模块、分别与多条信号线及信号线修复模块电连接并为信号线提供控制子像素发光显示所需的信号的驱动芯片；信号线修复模块包括至少一条修复线、与至少一条修复线一一对应设置的至少一组连接开关组、包括多级第一移位单元的第一移位单元组；连接开关组内包括多个连接开关且多个连接开关与多条信号线一一对应设置，同一连接开关组中的连接开关的输入端分别与不同的信号线电连接，输出端与对应的修复线电连接；每一组连接开关组中的多个连接开关与多级第一移位单元一一对应设置第一移位单元包括移位输出端，第一移位单元的移位输出端与对应的连接开关的控制端电连接；驱动芯片在确定存在断线的信号线 时，向信号线修复模块发送控制信号，使得断线的信号线与信号线修复模块中的修复线电导通；具体的，驱动芯片向信号线修复模块发送控制信号，使得断线的信号线与信号线修复模块中的修复线电导通包括：向信号线修复模块发送控制信号，使发生断线的信号线对应的第一移位单元的移位输出端输出使能信号，控制一组连接开关组中对应的连接开关开启，使得断线的信号线与一条修复线电导通。
第二方面，本申请提供一种驱动芯片，驱动芯片用于：提供信号给多个信号线，以控制子像素进行发光显示；在确定存在断线的信号线时，提供控制信号，使得断线的信号线与信号线修复模块中的修复线电导通；其中，提供控制信号，使得断线的信号线与信号线修复模块中的修复线电导通包括：向信号线修复模块发送控制信号，控制发生断线的信号线对应的第一移位单元的移位输出端输出使能信号，并控制一组连接开关组中对应的连接开关开启，使得断线的信号线与一条修复线电导通。
第三方面，本申请提供一种电子设备，包括如第一方面提供的显示装置。
本申请实施例提供的显示装置、驱动芯片及电子设备中，信号线修复模块可以对发生断线的信号线进行修复，也就是显示装置可以自行修复发生断线的信号线，而无需返厂，易于实现、修复效率高且成本低；并且控制连接开关导通的结构为可以依次输出使能信号的第一移位单元，因此无需人工进行通过激光烧结，准确度高。
附图说明
图1为本申请实施例提供的一种显示装置的示意图；
图2为本申请实施例提供的另一种显示装置的示意图；
图3为本申请实施例提供的一种显示装置的局部放大图；
图4为本申请实施例提供的一种移位单元的等效电路图；
图5为图4所示实施例提供的移位单元的一种时序图；
图6为图3所示显示装置信号线修复阶段的一种时序图；
图7为本申请实施例提供的另一种显示装置的局部放大图；
图8为图7所示显示装置信号线缺陷检测阶段的一种时序图；
图9为图7所示显示装置信号线修复阶段的一种时序图；
图10为本申请实施例提供的又一种显示装置的局部放大图；
图11为本申请实施例提供的再一种显示装置的局部放大图；
图12为本申请实施例提供的还一种显示装置的局部放大图；
图13为本申请实施例提供的又一种显示装置的局部放大图；
图14为本申请实施例提供的驱动芯片的结构示意图；
图15为本申请实施例提供的电子设备示意图。
具体实施方式
本申请的实施方式部分使用的术语仅用于对本申请的具体实施例进行解释，而非旨在限定本申请。
图1为本申请实施例提供的一种显示装置的示意图，图2为本申请实施例提供的 另一种显示装置的示意图。
如图1及图2所示，本申请实施例提供的显示装置包括显示面板001，显示面板001包括显示区AA和围绕显示区AA的非显示区BB。显示区AA内设置有多条信号线，其中，多条信号线包括第一信号线DL和第二信号线SL，第一信号线DL与第二信号线SL的延伸方向相互交叉且第一信号线DL与第二信号线SL交叉限定多个子像素P0，子像素P0用于进行发光显示，第一信号线DL及第二信号线SL与对应的子像素P0电连接并且子像素P0提供发光显示所需的信号。多个子像素P0中包括第一颜色子像素P1、第二颜色子像素P2及第三颜色子像素P3。非显示区BB内包括信号线修复模块10，信号线修复模块10在显示装置的信号线修复阶段及显示阶段可以对发生断线的第一信号线DL进行修复。
需要说明的是，信号线修复模块10与多条第一信号线DL电连接，可以对发生断线的第一信号线DL进行修复，第一信号线DL可以为数据线、扫描线中的任意一种。信号线修复模块10也可以与多条第二信号线SL电连接，可以对发生断线的第二信号线SL进行修复。第一信号线DL可以为沿列方向延伸且沿行方向排布的数据线，则第一信号线DL可以为子像素P0提供发光显示所需的数据信号；第二信号线SL可以为沿行方向延伸且沿列方向排布的扫描线，则第二信号线SL可以为子像素P0提供发光显示所需的扫描信号。或者，第一信号线DL可以为沿行方向延伸且沿列方向排布的扫描线，则第一信号线DL可以为子像素P0提供发光显示所需的扫描信号；第二信号线SL可以为沿列方向延伸且沿行方向排布的数据线，则第二信号线SL可以为子像素P0提供发光显示所需的数据信号。在本申请实施例中，主要以对第一信号线DL进行修复的信号线修复模块10为例对本申请的发明构思进行阐述，但是可以理解的，本申请实施例提供的信号线修复模块10也可以用于对显示面板001中的第二信号线SL进行修复。
在一种实施例中，显示装置可以为液晶显示装置，则显示面板001包括阵列基板、彩膜基板、以及位于阵列基板和彩膜基板之间的液晶分子层。其中，阵列基板包括位于显示区AA的多个像素电路，彩膜基板包括色阻层和黑矩阵，色阻层至少包括不同颜色的色阻。可选的，显示面板001还包括位于彩膜基板远离阵列基板一侧的触控模组。本申请实施例中，在显示面板001中增加信号线修复模块10，其中，信号线修复模块10位于非显示区BB，且信号线修复模块10设置在阵列基板上。
在另一种实施例中，显示装置也可以为有机发光显示装置，则显示面板001包括依次排列的阵列基板、发光器件层、封装结构。可选的，显示面板001还包括位于封装结构远离阵列基板一侧的触控模组。发光器件层包括多个发光器件，发光器件包括堆叠的阳极、发光层和阴极。封装结构用于对发光器件进行封装保护，以保证发光器件的使用寿命。本申请实施例中，在显示面板001中增加信号线修复模块10，其中，信号线修复模块10位于非显示区BB，且信号线修复模块10设置在阵列基板上。
在其他实施例中，显示装置还可以为微型LED(Light Emitting Diode，发光二极管)显示装置、电泳显示装置等现有技术中任意一种显示装置。
本申请实施例提供的显示装置还包括驱动芯片30，驱动芯片30用于为第一信号线DL和第二信号线SL提供控制子像素P0发光显示所需的信号。驱动芯片可以利用 断线检测电路实现断线信号线的自动检测，具体参考2020年9月24日提交的名称为“一种显示线缺陷检测方法”的专利申请CN202011014217.X。当然，显示装置还可以用其他方法检测信号线是否存在断线故障，在此不再赘述。
在本申请的一个实施例中，如图1及图2所示，信号线修复模块10设置在第一信号线DL延伸方向的一端，便于与第一信号线DL电连接。一种可实现方式中，如图1所示，第一信号线DL的一端设置驱动芯片30，驱动芯片30通过柔性电路板002与主板003电连接，信号线修复模块10设置在第一信号线DL的另一端。在另一种实现方式中，如图2所示，第一信号线DL的一端绑定覆晶薄膜004，覆晶薄膜004的柔性线路板上设置驱动芯片30且覆晶薄膜004通过柔性电路板002与主板003电连接，信号线修复模块10设置在第一信号线DL的另一端。此外，驱动芯片30可以通过多路选择电路40为第一信号线DL提供信号，即驱动芯片30的一个端口对应多路选择电路40的一个输入端口，多路选择电路40的一个输入端口对应多个与第一信号线DL一一对应的输出端口。
信号线修复模块10与驱动芯片30/多路选择电路40设置在第一信号线DL的相对两端，则信号线修复模块10可以在不妨碍驱动芯片30为第一信号线DL提供信号的同时，对断线的第一信号线DL进行修复。
图3为本申请实施例提供的一种显示装置的局部放大图。如图3所示，本申请实施例提供的信号线修复模块10包括至少一组连接开关组及至少一条修复线DUM，该至少一组连接开关组与该至少一条修复线DUM一一对应设置。连接开关组中包括多个连接开关12，同一连接开关组中的多个连接开关12与多条第一信号线一一对应设置，连接开关12的输入端与对应的第一信号线DL电连接且输出端与对应的修复线DUM电连接。当任意一个连接开关12导通时，与该连接开关12的输入端及输出端分别电连接的第一信号线DL与修复线DUM实现电连接。那么，当一条第一信号线DL断线时，通过将与该发生断线的第一信号线DL电连接的连接开关12导通，则可以将该发生断线的第一信号线DL与一条修复线DUM电连接，进而实现对发生断线的第一信号线DL进行修复。
如图3所示，本申请实施例提供的信号线修复模块10还包括第一移位单元组，第一移位单元组包括多级第一移位单元11，多级第一移位单元11的移位输出端可以依次输出使能信号。每一组连接开关组中的锁哥连接开关与多级第一移位单元一一对应设置，第一移位单元11的移位输出端OUT输出的信号能够控制至少一个对应的连接开关12的导通或关断，并且每一个第一移位单元11所控制的至少一个连接开关12均与同一条第一信号线DL电连接。在本申请实施例中，信号线修复模块10中的第一移位单元11的移位输出端OUT依次输出使能信号，可以控制与多级第一移位单元11分别电连接的连接开关12依次导通。当有第一信号线DL断线时，在信号线修复阶段，发生断线的第一信号线DL所电连接的连接开关12对应的第一移位单元11输出使能信号，并且第一移位单元11输出的使能信号控制与发生断线的第一信号线DL电连接的连接开关12导通；并且在显示阶段，发生断线的第一信号线DL电连接的连接开关12可以保持导通，进而使发生断线的第一信号线DL在显示阶段也可以接收信号，而其他连接开关12处于关断状态，因此不会影响正常的第一信号线DL接收信号。
驱动芯片30分别与多条第一信号线DL及信号线修复模块10电连接，用于为第一信号线DL提供控制子像素发光显示所需的信号。
当确定存在第一信号线DL断线时，驱动芯片30向信号线修复模块10发送控制信号，使得断线的第一信号线DL与信号线修复模块10的修复线DUM电导通。具体的，驱动芯片30向第一移位单元11输出信号，使发生断线的第一信号线DL对应的第一移位单元11的移位输出端输出使能信号，控制一组连接开关组中对应的连接开关12开启，使得断线的第一信号线DL与一条修复线DUN电导通。
若发生断线的第一信号线DL断线的位置位于显示区AA，在显示阶段，发生断线的第一信号线DL中与信号线修复模块10电连接的那部分线段也可以接收到显示信号，该显示信号由对该第一信号线DL进行修复的修复线DUM传输且可以与该第一信号线DL原有的显示信号相同；发生断线的第一信号线DL中未与信号线修复模块10电连接的那部分线段可以正常的接收显示信号。若发生断线的第一信号线DL发生断线的位置位于非显示区BB，在显示阶段，发生断线的第一信号线DL可以接收到显示信号，该显示信号由对该第一信号线DL进行修复的修复线DUM传输且可以与该第一信号线DL原有的显示信号相同。
本申请实施例提供的显示装置中包括信号线修复模块10，且信号线修复模块10可以对发生断线的第一信号线DL进行修复，也就是显示装置可以自行修复发生断线的第一信号线DL，而无需返厂，易于实现、修复效率高且成本低。在本申请的实施例中，控制连接开关12导通的结构为输出使能信号的第一移位单元11，因此无需人工进行通过激光烧结，准确度高。
在本申请的一个实施例中，连接开关12可以为晶体管，则连接开关12的输入端及输出端可以分别为晶体管的源极和漏极，并且信号线修复模块10中的第一移位单元11的移位输出端OUT与晶体管的栅极电连接。
图4为本申请实施例提供的一种移位单元的等效电路图，图5为图4所示实施例提供的移位单元的一种时序图。下面结合图4及图5对本申请实施例中第一移位单元11的结构及工作过程进行举例说明。
如图4所示，第一移位单元11包括输出子单元11a及复位子单元11b，其中，输出子单元11a包括开启信号输入端IN、时钟信号输入端CLK；复位子单元11b包括复位控制信号输入端RET、复位信号输入端off。输出子单元11a用于在开启信号输入端IN的信号、时钟信号输入端CLK的信号的控制下，控制第一移位单元11的移位输出端OUT输出可以使连接开关12导通的使能信号。复位子单元11b用于在复位控制信号输入端RET信号、复位信号输入端off信号的控制下，控制第一移位单元11的移位输出端OUT输出复位信号，复位信号可以使连接开关12关闭。
其中，开启信号输入端IN、时钟信号输入端CLK、复位控制信号输入端RET及复位信号输入端off均与驱动芯片30电连接并从驱动芯片30处获得驱动第一移位单元11工作的信号。
如图4所示，输出子单元11a还包括第一晶体管T1、第二晶体管T2及第一电容C1。第一晶体管T1的栅极及源极均与开启信号输入端IN连接，漏极与第一电容C1的第一极板电连接；第二晶体管T2的栅极与第一电容C1的第一极板电连接，源极与 时钟信号输入端CLK电连接，漏极与移位输出端OUT电连接。第一电容C1的第二极板与移位输出端OUT电连接。如图4所示，复位子单元11b包括第三晶体管T3及第四晶体管T4。第三晶体管T3的栅极与复位控制信号输入端RET电连接，源极与复位信号输入端off电连接，漏极与电容的第一极板电连接；第四晶体管T4的栅极与复位控制信号输入端RET电连接，源极与复位信号输入端off电连接，漏极与移位输出端OUT电连接。
需要说明的是，图4、图5及以下阐述是以T1～T4为N型晶体管为例进行说明的，实际上，T1～T4也可以为P型晶体管。图5示意出了第一移位单元11的三个工作阶段。
在第一阶段P1，开启信号输入端IN接收有效信号，即高电平信号时，第一晶体管T1导通，且开启信号输入端IN接收的有效信号通过导通的第一晶体管T1传输至第一电容C1的第一极板；由于第二晶体管T2的栅极与第一电容C1的第一极板电连接，则第二晶体管T2导通且保持导通状态。此时，时钟信号输入端CLK所接收的脉冲信号为低电平信号或者非有效电平信号，则移位输出端OUT输出低电平信号或者非有效电平信号。
在第二阶段P2，由于第一电容C1的作用第二晶体管T2持续打开，时钟信号输入端CLK所接收的脉冲信号为有效信号，则移位输出端OUT输出使能信号。
在第三阶段P3，复位控制信号输入端RET接收有效信号，即高电平信号时，第三晶体管T3和第四晶体管T4打开。第三晶体管T3将复位信号输入端off接收的复位信号提供给第一电容C1的第一极板及第二晶体管T2的栅极，第二晶体管T2关断。第四晶体管T4将复位信号输入端off接收的复位信号提供给移位输出端OUT，对移位输出端OUT进行复位。
在本申请的一个实施例中，信号线修复模块10中第一移位单元组内包括的多级第一移位单元11依次级联。
如图3所示，信号线修复模块10所包括的级联的第一移位单元11中相邻两级的第一移位单元11，上一级第一移位单元11的移位输出端OUT与下一级第一移位单元11的开启信号输入端IN电连接，下一级第一移位单元11的移位输出端OUT与上一级第一移位单元11的复位控制信号输入端RET电连接。也就是，上一级第一移位单元11的移位输出端OUT输出的使能信号不仅可以控制其所电连接的连接开关12导通，还可以为下一级第一移位单元11的开启信号输入端IN提供使能信号进而控制下一级第一移位单元11开始工作；下一级第一移位单元11的移位输出端OUT输出的使能信号不仅可以控制其所电连接的连接开关12导通，还可以为上一级第一移位单元11的复位控制信号输入端RET提供使能信号进而控制上一级第一移位单元11停止工作。需要说明的是，级联的第一移位单元11中的第一级移位单元的开启信号输入端IN与起始信号线电连接，如与第一起始信号线STV1电连接，起始信号线可以为第一级移位单元的开启信号输入端IN提供使能信号。
如图3所示，信号线修复模块10所包括的级联的第一移位单元11中相邻两级的第一移位单元11的时钟信号输入端CLK连接不同的时钟信号线。如图3所示，信号线修复模块10中的多级第一移位单元11的时钟信号输入端CLK交替与第一时钟信号线CLK1和第二时钟信号线CLK2电连接，并且第一时钟信号线CLK1与第二时钟信 号线CLK2交替输出脉冲信号，则可以配合开启信号输入端IN接收的信号实现信号线修复模块10中级联的第一移位单元11依次输出使能信号。
如图3所示，信号线修复模块10所包括的第一移位单元11的复位信号输入端off可以均与同一条复位信号线电连接，并且复位信号线可以在信号线修复阶段持续传输复位信号。如与第一复位信号线OFF1电连接，并且第一复位信号线OFF1在信号线修复阶段持续输出复位信号。
图6为图3所示显示装置信号线修复阶段的一种时序图。下面结合图3及图6对本申请中信号线修复模块10的工作过程进行说明。如图3所示，信号线修复模块10中包括m级级联的第一移位单元11，分别为第一级第一移位单元111、第二级第一移位单元112、……、第n-1级第一移位单元11n-1、第n级移位单元11n、……、第m级第一移位单元11m，m为大于等于3的正整数。信号线修复模块10的一个连接开关组中包括m个连接开关12，分别为第一连接开关121、第二连接开关122、……、第n-1连接开关12n-1、第n连接开关12n、……、第m连接开关12m。其中，显示面板001的显示区AA可以包括m条第一信号线DL，分别为第一条第一信号线DL1、第二条第一信号线DL2、……、第n-1条第一信号线DLn-1、第n条第一信号线DLn、……、第m条第一信号线DLm。且一个连接开关组中的m个第一移位单元11的输入端分别与m条第一信号线DL电连接。假设第n条第一信号线DLn发生断线，信号线修复模块10对第n条第一信号线DLn修复的具体工作过程如下：
在时刻t1，信号线修复模块10中的第一级第一移位单元111的开启信号输入端IN接收第一起始信号线STV1传输的有效信号，随后与第一级第一移位单元111的时钟信号输入端CLK连接的第一时钟信号线CLK1传输使能信号，则第一级第一移位单元111的移位输出端OUT输出使能信号，第一级第一移位单元111的移位输出端OUT控制一个连接开关组中的第一连接开关121开启，则第一条第一信号线DL1与一条修复线DUM电连接；
在时刻t2，信号线修复模块10中的第二级第一移位单元112的开启信号输入端IN接收第一级第一移位单元111的移位输出端OUT输出的使能信号，随后与第二级第一移位单元112的时钟信号输入端CLK连接的第二时钟信号线CLK2传输有效信号，则第二级第一移位单元112的移位输出端OUT输出使能信号，第二级第一移位单元112的移位输出端OUT控制一个连接开关组中的第二连接开关122开启，则第二条第一信号线DL2与一条修复线DUM电连接。同时第一级第一移位单元111的复位控制信号输入端RET接收第二级第一移位单元112的移位输出端OUT输出的使能信号，则第一复位信号线OFF1传输的复位信号控制第一级第一移位单元111关断并且第一级第一移位单元111的移位输出端OUT复位，第一级第一移位单元111所控制的一个连接开关组中的第一连接开关121关断，第一条第一信号线DL1与修复线DUM断开连接；
依次类推，在时刻tn，信号线修复模块10中的第n级第一移位单元11n的开启信号输入端IN接收第n-1级第一移位单元111的移位输出端OUT输出的使能信号。随后与第n级第一移位单元11n的时钟信号输入端CLK连接的时钟信号线，例如第一时钟信号线CLK1传输有效信号，则第n级第一移位单元11n的移位输出端OUT输出使 能信号，第n级第一移位单元11n的移位输出端OUT控制一个连接开关组中的第n连接开关12n开启,则第n条第一信号线DLn与一条修复线DUM电连接。同时第n-1级第一移位单元11n-1的复位控制信号输入端RET接收第n级第一移位单元11n的移位输出端OUT输出的使能信号，则第一复位信号线OFF1传输的复位信号控制第n-1级第一移位单元11n-1关断并且第n-1级第一移位单元11n-1的移位输出端OUT复位，第n-1级第一移位单元11n-1所控制的一个连接开关组中的第n-1连接开关12n-1关断，第n-1条第一信号线DLn-1与修复线DUM断开连接；
在时刻tn，信号线修复模块10与第n级第一移位单元11n的时钟信号输入端CLK连接的时钟信号线，例如第一时钟信号线CLK1在信号线修复阶段及显示阶段保持传输使能信号，其他时钟信号线持续输出非使能信号，则第n级第一移位单元11n的移位输出端OUT持续输出使能信号，其他第一移位单元11持续关断。那么，第n条第一信号线DLn与一条修复线DUM持续电连接，因此，可以完成对该第n条第一信号线DLn的修复。
图7为本申请实施例提供的另一种显示装置的局部放大图，图8为图7所示显示装置信号线缺陷检测阶段的一种时序图。在一种实现方式中，至少一条修复线DUM可以复用为检测线DET，则复用为检测线的修复线在信号线缺陷检测阶段可以用于将第一信号线DL上的信号传输至驱动芯片30；并且复用为检测线DET的修复线DUM所对应的连接开关复用为检测开关组，则复用为检测开关组的连接开关组中的连接开关复用为检测开关。在信号线缺陷检测阶段，检测开关开启，其输出端所电连接的第一信号线DL上的信号传输至其输出端电连接复用为检测线DET的修复线DUM，进而将第一信号线DL上的信号通过复用为检测线DET的修复线DUM传输至驱动芯片30进行处理。
如图7所示，信号线修复模块10中还包括多个复位开关12’及第二复位信号线REF，第二复位信号线REF用从驱动芯片30获取复位信号并将复位信号传输至复用为检测线的修复线。复位开关12’的输入端与至少一条复用为检测线DET的修复线DUM电连接，输出端与第二复位信号线REF电连接。第二复位信号线REF接收并传输驱动芯片30输出的复位信号，则当复位开关12’导通时，复位开关12’的输入端电连接的修复线DUM上的信号被复位。复位开关12’可以为晶体管，复位开关12’的输入端和输出端分别为晶体管的源极和漏极、控制端为晶体管的栅极。
在本申请的一个实施例中，信号线修复模块10不仅可以对第一信号线DL进行修复，还可以对第一信号线DL的缺陷进行检测。也就是，信号线修复模块10在信号线缺陷检测阶段对第一信号线DL的缺陷进行检测，在信号线修复阶段对第一信号线DL进行修复。并且信号线缺陷检测阶段在信号线修复阶段之前进行，以为信号线修复阶段提供发生断线的第一信号线DL的位置。
在信号线缺陷检测阶段，一个第一移位单元11开启后复用为检测开关组的连接开关组中的对应的连接开关12导通，则该导通的连接开关12将其所电连接的第一信号线DL与一条检测线DET电连接，检测线DET将该第一信号线DL上的信号传输至驱动驱动芯片3030或主板003，驱动驱动芯片3030或主板003通过对该信号进行处理确定该第一信号线DL是否断线。例如，驱动驱动芯片3030或主板接收到该信号后， 将驱动驱动芯片3030提供给该第一信号线DL的信号与该信号进行比较，若两个信号不同则说明第一信号线DL存在缺陷，假设检测线DET传输给驱动驱动芯片3030或主板的信号为零电位则可判断该第一信号线DL存在断线问题。
需要说明的是，在本申请的一个实施例中，如图7所示，在信号线缺陷检测阶段，多级第一移位单元11也是依次开启，实现对第一信号线DL的依次检测。在对不同的第一信号线DL进行检测时，用于对第一信号线DL进行检测的检测线DET上的信号应该与所检测的第一信号线DL上的信号保持一致。那么，在对每一条第一信号线DL进行检测之后，可以对用于进行信号线缺陷检测的检测线DET上的信号进行复位。则一个复位开关12’可以与第一信号线DL一一对应设置，也就是，多个复位开关12’可以与复用为检测开关组的连接开关组中的多个连接开关12一一交替设置，在信号线缺陷检测阶段，多个复位开关12’可以依次开启并且一个复位开关12’可以在对应的一个连接开关12开启并关断后开启，即在对应的第一信号线DL完成检测后开启。
在本申请的一个实施例中，如图7所示，本申请实施例提供的信号线修复模块10还包括多个复位移位单元11’，多个复位移位单元11’与复位开关一一对应设置且可以依次输出使能信号。复位移位单元11’的移位输出端OUT与对应的一个复位开关12’的控制端电连接并且其移位输出端OUT输出的信号能控制复位开关12’导通或关断。在本申请实施例中，信号线修复模块10中的复位移位单元11’的移位输出端OUT依次输出使能信号，可以控制与多级复位移位单元11’分别电连接的复位开关12’依次导通。当完成对一条第一信号线DL的检测时，可以通过复位移位单元11’控制与该第一信号线DL对应的复位开关12’导通，进而使得用于对第一信号线DL进行检测的修复线DUM上的信号得以复位，以保证对下一第一信号线DL进行检测时修复线DUM上的信号准确性。复位移位单元11’的结构及工作原理可以与第一移位单元11相同，在此不再赘述。
在本实施例的一种实现方式中，如图7所示，信号线修复模块10中包括的多级复位移位单元11’与多级第一移位单元11中，复位移位单元11’与第一移位单元11依次交替设置且级联。其中，复位移位单元11’与第一移位单元11的级联方式相同与图3所示的多级第一移位单元11的级联方式相同，在此不再赘述。
图8为图7所示显示面板信号线缺陷检测阶段的一种时序图。下面结合图7及图8对本申请中信号线修复模块10的信号线缺陷检测阶段的工作过程进行说明。如图7所示，信号线修复模块10中包括m级第一移位单元11和m级复位移位单元11’，m级复位移位单元11’，分别为第一级复位移位单元111’、第二级复位移位单元112’、……、第n-1级复位移位单元11n-1’、第n级复位移位单元11n’、……、第m级复位移位单元11m’。信号线修复模块10在信号线缺陷检测阶段的具体工作过程如下：
在时刻t1，第一级第一移位单元111的开启信号输入端IN接收第一起始信号线STV1传输的使能信号，随后与第一级第一移位单元111的时钟信号输入端CLK连接的第一时钟信号线CLK1传输有效信号，则第一级第一移位单元111的移位输出端OUT输出使能信号，第一级第一移位单元111的移位输出端OUT控制第一连接开关121开启，第一条第一信号线DL1上的信号传输至检测线DET；
在时刻t2，第一级复位移位单元111’的开启信号输入端IN接收第一级第一移位单元111的移位输出端OUT输出的有效信号，随后与第一级复位移位单元111’的时钟信号输入端CLK连接的第二时钟信号线CLK2传输有效信号，则第一级复位移位单元111’的移位输出端OUT输出使能信号，控制第一级复位移位单元111’的移位输出端OUT所电连接的复位开关12’开启，第二复位信号线REF上传输的复位信号传输至检测线DET；同时第一级第一移位单元111的复位控制信号输入端RET接收第一级复位移位单元111’的移位输出端OUT输出的使能信号，则第一复位信号线OFF1传输的复位信号控制第一级第一移位单元111关断并且第一级第一移位单元111的移位输出端OUT复位，第一级第一移位单元111的移位输出端OUT所控制第一连接开关121关断，第一信号线DL1与检测线DET断开电连接；
在时刻t3，第二级第一移位单元112的开启信号输入端IN接收第一级复位移位单元111’的移位输出端OUT输出的使能信号，随后与第二级第一移位单元112的时钟信号输入端CLK连接的第一时钟信号线CLK1传输有效信号，则第二级第一移位单元112的移位输出端OUT输出使能信号，第二级第一移位单元112的移位输出端OUT所控制的第二连接开关122开启，第二条第一信号线DL2上的信号传输至检测线DET；同时第一级复位移位单元111’的复位控制信号输入端RET接收第二级第一移位单元112的移位输出端OUT输出的使能信号，则第一复位信号线OFF1传输的复位信号控制第一级复位移位单元111’关断并且第一级复位移位单元111’的移位输出端OUT复位，第一级复位移位单元111’的移位输出端OUT所电连接的复位开关12’关断，检测线DET与第二复位信号线REF断开连接；
在时刻t4，第二级复位移位单元112’的开启信号输入端IN接收第二级第一移位单元112的移位输出端OUT输出的有效信号，随后与第二级复位移位单元112’的时钟信号输入端CLK连接的第二时钟信号线CLK2传输有效信号，则第二级复位移位单元112’的移位输出端OUT输出使能信号，控制第二级复位移位单元112’的移位输出端OUT所电连接的复位开关12’开启，第二复位信号线REF上传输的复位信号传输至检测线DET；同时第二级第一移位单元112的复位控制信号输入端RET接收第二级复位移位单元112’的移位输出端OUT输出的使能信号，则第一复位信号线OFF1传输的复位信号控制第二级第一移位单元112关断并且第二级第一移位单元112的移位输出端OUT复位，第二级第一移位单元112的移位输出端OUT所控制的第二连接开关122关断，第二信号线DL2与检测线DET断开电连接；
依次类推，完成对所有第一信号线DL的缺陷检测。
图9为图7所示显示装置信号线修复阶段的一种时序图。仍然假设第n条第一信号线DLn发生断线，下面结合图7及图9对本申请中信号线修复模块10的信号线修复阶段的工作过程进行说明。
信号线修复模块10在信号线修复阶段的具体工作过程如图9所示，与图8所示的信号线检测阶段的不同之处在于，在时刻t2n-1，第n级第一移位单元11n的开启信号输入端IN接收第n-1级复位移位单元111’的移位输出端OUT输出的使能信号，随后与第n级第一移位单元11n的时钟信号输入端CLK连接的时钟信号线，例如第一时钟信号线CLK1传输有效信号，则第n级第一移位单元11n的移位输出端OUT输出使 能信号，第n级第一移位单元11n的移位输出端OUT所控制的一个连接开关组中的第n连接开关12n开启，第n条第一信号线DLn和一条修复线DUM电连接。且在该时刻，与第n级第一移位单元11n的时钟信号输入端CLK连接的时钟信号线，例如第一时钟信号线CLK1在信号线修复阶段及显示阶段保持传输有效信号，其他时钟信号线持续输出非有效信号，则第n级第一移位单元11n的移位输出端OUT持续输出使能信号，其他第一移位单元11持续关断。那么，第n条第一信号线DLn和一条修复线DUM持续电连接，完成对第n条第一信号线DLn的修复。
在本申请的一个实施例中，如图3及图7所示，信号线修复模块10包括一个连接开关组及一条修复线DUM，则第一移位单元11的移位输出端OUT与连接开关12的控制端电连接，当第一移位单元11的移位输出端OUT输出使能信号时则控制其连接开关12导通。
图10为本申请实施例提供的又一种显示装置的局部放大图，如图10所示，在本申请的一个实施例中，信号线修复模块10包括多个连接开关组及多条修复线DUM，多个连接开关组与多条修复线DUM一一对应。连接开关组中包括多个连接开关12，同一连接开关组中的多个连接开关12的输入端分别与不同的第一信号线DL电连接，同一连接开关组中的多个连接开关12的输出端与对应的一条修复线DUM电连接并且不同连接开关组中的连接开关12与不同的修复线DUM电连接。
当信号线修复模块包括多组连接开关组和多条修复线DUM时，信号线修复模块10中还包括与连接开关组一一对应的选择开关组、一一对应的选择信号线SEL及一一对应的存储电容组。
多条选择信号线SEL与多个选择开关组一一对应设置选择信号线SEL与对应的选择开关组中的多个选择开关13的控制端电连接。
存储电容组内包括多个存储电容C3，每一个存储电容组中的多个存储电容C3与对应的连接开关组中的多个连接开关12一一对应，且存储电容C3的第一极板与对应的连接开关12的控制端电连接。
选择开关组内包括多个选择开关13，每一个选择开关组中的多个选择开关13与对应的存储电容组中的多个存储电容C3一一对应，并且对应设置的选择开关组、存储电容组中，选择开关13的输出端与对应的存储电容C3的第二极板电连接，选择开关13的输入端与对应的第一移位单元11的移位输出端OUT电连接，选择开关13的控制端与对应的选择信号线SEL电连接，并且不同选择开关组中的选择开关13的控制端与不同的选择信号线SEL电连接。当一个选择开关13导通时，与该选择开关13电连接的第一移位单元11的移位输出端OUT输出的使能信号通过该选择开关13传输至与该选择开关13电连接的连接开关12的控制端，则在本申请的一种实现方式中，选择开关13可以为晶体管，晶体管的源极作为其输入端、漏极作为其输出端、栅极作为其控制端。
驱动芯片30向信号线修复模块10发送控制信号包括，向选择信号线SEL发送选择信号，则传输选择信号的选择信号线SEL所电连接的选择开关13开启，第一移位单元11输出的使能信号传输至对应的连接开关12的控制端，使对应的连接开关12开启。当多条第一信号线发生断线时，一条断线的第一信号线DL对应的第一移位单 元11输出使能信号时，其中一组选择开关组中对应的选择开关开启，则使能信号可以控制一组连接开关组中对应的连接开关开启，该断线的第一信号线DL可以与一条修复线DUM电连接；另一条断线的第一信号线DL对应的第一移位单元11输出使能信号时，另一组选择开关组中对应的选择开关开启，则使能信号可以控制另一组连接开关组中对应的连接开关开启，实现对该断线的第一信号线DL可以与另一条修复线DUM电连接。
具体地，假设多条第一信号线DL发生了断线，则多级第一移位单元11的移位输出端OUT依次输出的使能信号，当发生断线的一条第一信号线DL对应的那一级第一移位单元11输出使能信号时，将一个选择开关组中的选择开关13开启，则该级第一移位单元11输出的使能信号传输至存储电容，拉高或者拉低连接开关12的栅极的电位，进而控制连接开关12开启，根据上述对第一信号线DL的修复方式可以完成对一条第一信号线DL的修复，一条第一信号线DL修复完成后，将开启的选择开关13关闭，由于存储电容的存在，开启的连接开关12仍然开启；然后通过上述方法，将另一个选择开关组中的选择开关13开启，则可以实现对另一条第一信号线DL的修复。通过设置多组连接开关组、多条修复线、多组选择开关组及存储电容组，可以将多条断线的第一信号线DL与多条修复线DUM一一电连接，从而实现对多条第一信号线DL的修复。
图10为本申请实施例提供的又一种显示装置的局部放大图，下面结合图10对多条第一信号线DL的修复进行说明。需要说明的是，图10仅以信号线修复模组10可以对两条第一信号线DL进行修复进行说明，根据本申请的发明构思，信号线修复模组10中选择开关组、连接开关组及修复线的数量不同，则可以对不同数量的第一信号线DL进行修复。选择开关组、连接开关组及修复线的数量相同且与可修复的第一信号线DL的数量相同。
如图10所示，信号线修复模组10包括两个选择开关组，一个选择开关组中包括的多个选择开关为第一类选择开关13a，另一个选择开关组中包括的多个选择开关为第二类选择开关13b；信号线修复模组10包括两个连接开关组，一个连接开关组中包括的多个连接开关为第一类连接开关12a，另一个选择开关组中包括的多个连接开关为第二类连接开关12b；信号线修复模组10包括两条修复线DUM，分别为第一修复线DUM1和DUM2；信号线修复模组10包括两条选择信号线SEL，分别为第一选择信号线SEL1和第二选择信号线SEL2，信号线修复模组10包括两个存储电容组，一个存储电容组中包括的多个存储电容为第一类存储电容C2，另一个存储电容组中包括的多个存储电容为第二类存储电容C3。其中，第一类选择开关13a的控制端与第一选择信号线SEL1电连接，第二类选择开关13b的控制端与第二选择信号线SEL2电连接；第一类连接开关12a的输出端与第一修复线DUM1电连接，第二类连接开关12b的输出端与第二修复线DUM2电连接；一条第一信号线DL与一个第一类连接开关12a的输入端电连接并同时与一个第二类连接开关12b的输入端电连接；与同一条第一信号线DL电连接的第一类连接开关12a对应的第一类选择开关13a的输入端和第二类连接开关12b对应的第二类选择开关13b的输入端与同一个移位单元11的移位输出端电连接。
假设第n条第一信号线DLn和第n-1条第一信号线DLn-1均发生了断线，首先对其中一条第一信号线DL进行修复，然后再对另一条第一信号线DL进行修复。
例如先对第n条第一信号线DLn进行修复，当第n级第一移位单元11输出使能信号时，一条选择信号线SEL传输使能信号，一个选择开关组中的选择开关13全部开启，如第一选择信号线SEL1传输使能信号使得所有的第一类选择开关13a开启，则对应的一个存储电容组中所有第一类存储电容C2的第一极板与第一移位单元11的移位输出端OUT电连接，也就包括第n条第一信号线DLn与第一修复线DUM1电连接，则第n级第一移位单元11输出使能信号传输至对应的第一类存储电容C2，完成对第n条第一信号线DLn的修复，然后第一选择信号线SEL1传输关断信号使得所有的第一选择开关13a关断，但是由于第一类存储电容C2的存在，第n条第一信号线DLn对应的第一类连接开关12a仍然开启并保持对第n条第一信号线DLn的修复。
然后对第n-1条第一信号线DLn-1进行修复，当第n-1级第一移位单元输出使能信号时，另一条选择信号线SEL传输使能信号，则另一个选择开关组中的选择开关13全部开启，如第二选择信号线SEL2传输使能信号使得所有的第二类选择开关13b开启，则对应的另一个存储电容组中的所有的第二类存储电容C3的第一极板与第一移位单元11的移位输出端OUT电连接。与第n条第一信号线DLn与第一修复线DUM1电连接的原理相同，则第n-1条第一信号线DLn-1与第二修复线DUM2电连接，完成对第n-1条第一信号线DLn-1的修复，然后第二选择信号线SEL2传输关断信号使得所有的第二类选择开关13b关断，但是保持对第n-1条第一信号线DLn-1的修复。
需要说明的是，当信号线修复模块10中包括多个选择开关组、多个选择信号线SEL及多个存储电容组，在对第n条第一信号线DLn进行修复的过程中，选择信号线SEL传输信号使选择开关13开启的时间可以同时于或者略晚于第n级第一移位单元11输出使能信号的时间，避免对其他第一信号线DL进行误修复。
图11为本申请实施例提供的再一种显示装置的局部放大图。图11所示显示装置与图10所示显示装置的不同在于，信号线修复模块10还包括多级复位移位单元11’和多个复位开关12’，并且一条修复线DUM复用为检测线DET，即图11所示的信号线修复模块10即可以对多条第一信号线DL进行复位且可以进行信号线缺陷进行检测。
图11所示复位移位单元11’与第一移位单元11的级联方式与图7所示实施例相同，复位开关12’与复位移位单元11’及第二复位信号线REF的连接方式与图7所示实施例也相同。需要说明的是，图11所示信号线修复模块10对第一信号线DL的缺陷进行检测时，需要将复用为检测线DET的修复线DUM对应的连接开关12所对应的选择开关13开启，以保证第一移位单元11的移位输出端OUT输出的信号可以控制复用为检测线DET的修复线DUM所对应的连接开关12开启，接下来的信号线缺陷检测过程与图7所示实施例的检测过程相同。如图11所示，假设第二修复线DUM2复用为检测线DET，则在信号线缺陷检测阶段，首先将第二类选择开关13b开启，使得第一移位单元11的移位输出端OUT输出的使能信号可以传递至第二类存储电容C2，并控制第二类连接开关12b。
图11所示信号线修复模块10与图10所示信号线修复模块10在信号线修复阶段 的基本过程相同，区别点在于，复用为检测线DET的修复线DUM在其他修复线DUM完成对第一信号线DL进行修复后再开始对第一信号线DL进行修复，即复用为检测线DET的修复线DUM为对第一信号线DL进行修复的最后的选择。也就是，在信号线修复阶段，复用为检测线DET的修复线DUM与断线的第一信号线DL电连接且修复的时间晚于其他修复线DUM与断线的第一信号线DL电连接且修复的时间。在本申请的实施例中，在一个时间段可以依次对多条第一信号线DL进行修复。但是当多条第一信号线DL不是同时发生断线时，则需要在不同的时间段对不同的第一信号线DL进行缺陷检测并对检测出的新发生断线的第一信号线DL进行修复，因此复用为检测线DET的修复线DUM最后对第一信号线DL修复，可以保证其在不同时间段中其他修复线对第一信号线DL进行修复前对第一信号线DL进行缺陷检测。
如图11所示，第二修复线DUM2复用为检测线DET时，则在对第一信号线DL进行修复时，首先利用第一类选择开关13a、第一类连接开关12a、第一选择信号线SEL1及第一修复线DUM1对第一信号线DL进行修复；最后再利用第二类选择开关13b、第二类连接开关12b、第二选择信号线SEL2及第二修复线DUM2对第一信号线DL进行修复。
图12为本申请实施例提供的还一种显示装置的局部放大图。图12所示显示面板与图11所示显示面板的不同之处在于，所有的修复线DUM均复用为检测线DET，则可以利用一条检测线DET确定一次第一信号线DL的断线情况并利用该检测线DET所复用的修复线DUM对一条断线的第一信号线DL进行修复，然后再利用另一条检测线DET确定一次第一信号线DL的断线情况并利用该检测线DET所复用的修复线DUM对另一条断线的第一信号线DL进行修复。依次类推，所有的修复线DUM均用于对第一信号线DL进行修复。
如图12所示，第一修复线DUM1复用为检测线DET，且第二修复线DUM2也复用为检测线DET。则可以先利用复用第一修复线DUM1的检测线DET、第一选择信号线SEL1、第一类选择开关13a、第一类存储电容C2及第一类连接开关12a对所有的第一信号线DL进行检测并对确认断线的一条第一信号线DL进行修复；然后再利用复用第二修复线DUM2的检测线DET、第二选择信号线SEL2、第二类选择开关13b、第二类存储电容C3及第二类连接开关12b对所有的第一信号线DL进行检测并对确认断线的另一条第一信号线DL进行修复。
需要说明的是，当所有修复线DUM均复用为检测线DET时，复位开关12’与复位移位单元11’仍然一一对应设置，并且复位移位单元11’与第一移位单元11一一交替设置，则一个复位开关12’的输出端可以与多条复用为检测线DET的修复线电连接。
图13为本申请实施例提供的又一种显示装置的局部放大图。如图13所示，显示装置的显示面板001中非显示区BB还设置有信号线缺陷检测模块20，信号线缺陷检测模块20与第一信号线DL电连接，用于对第一信号线DL进行缺陷检测。
信号线缺陷检测模块20包括检测线DET、第二复位信号线REF、多个检测开关22、多个复位开关12’、多个第二移位单元21及多个复位移位单元11’。图13所示实施例与图7、图11及图12所示实施例的不同之处在于，用于信号线缺陷检测的结 构为独立于信号线修复模块10的信号线缺陷检测模块20。
检测线DET用于接收第一信号线DL上的信号，并传输至驱动芯片30，由驱动芯片30判断某条第一信号线DL上的信号与参考信号是否一致，若结果为不一致，则判断该第一信号线DL存在缺陷，若某条第一信号线DL上的不存在信号，则判断第一信号线DL发生了断线。
第二复位信号线REF用于从驱动芯片30获取复位信号，并将该复位信号传输至检测线DET，对检测线DET上的信号进行复位。
多个检测开关22与多条第一信号线DL一一对应设置，且检测开关22的输入端与一条第一信号线DL电连接，输出端与检测线DET电连接，检测开关22开启时可以将其输入端所电连接的第一信号线DL上的信号传输至其输出端所电连接检测线DET上，则第一信号线DL上的信号可以通过检测线DET传输至驱动驱动芯片3030或主板003，通过对该信号进行处理，确认第一信号线DL是否存在缺陷。
复位开关12’的输出端与检测线DET电连接，输入端与第二复位信号线REF电连接，复位开关12’开启时，其输入端所电连接的复位线REF上传输的复位信号传输至检测线DET，可以将检测线DET上的信号进行复位。
检测开关22与第二移位单元21一一对应设置且第二移位单元21的移位输出端OUT与检测开关22的控制端电连接，复位开关12’与复位移位单元11’一一对应设置且复位移位单元11’的移位输出端OUT与复位开关12’的控制端电连接，并且第二移位单元21的移位输出端OUT输出的信号及复位移位单元11’的移位输出端OUT输出的信号分别用于控制其所电连接的检测开关22与复位开关12’的导通或关断。检测开关22可以为晶体管，检测开关22的源极为晶体管的源极、漏极为晶体管的漏极、栅极为晶体管的控制端。
由于一个检测开关22导通后，检测线DET上的信号为该检测开关22所电连接的第一信号线DL上的信号，为了保证对下一条第一信号线DL的检测准确度，需对检测线DET上的信号进行复位。因此，复位开关12’可以与检测开关22一一交替设置，并且复位开关11’在对应的检测开关22导通并关断后导通。
在本实施例中，第二移位单元21的结构可以与第一移位单元11的结构相同且工作原理相同。
如图13所示，信号线缺陷检测模块200所包括的第二移位单元21的复位信号输入端off可以均与同一条复位信号线电连接，并且复位信号线可以在信号线修复阶段持续传输复位信号。如与第二复位信号线OFF2电连接，并且第二复位信号线OFF2在信号线修复阶段持续输出复位信号。
为了实现对各第一信号线DL的依次检测，则各第一信号线DL上的信号应该依次由检测线DET传输至驱动驱动芯片3030或主板004，则第二移位单元21应该依次开启，使得对应的检测开关22顺序导通。对应地，复位移位单元11’也应该依次开启，使得对应的复位开关12’顺序导通。
在本申请的一个实施例中，第二移位单元21与复位移位单元11’依次交替设置且级联，即第二移位单元21与复位移位单元11’级联的方式可以与图7、图11及图12所示实施例中第一移位单元11与复位移位单元11’的级联方式相同。第一移位单 元11的级联方式相同，并且第一级第二移位单元21的开启信号输入端IN与起始信号线，例如第二起始信号线STV2电连接，第二起始信号线STV2为第一级第二移位单元21的开启信号输入端IN提供使能信号。级联的第二移位单元21与复位移位单元11’中，相邻的第二移位单元21与复位移位单元11’的时钟信号输入端CLK连接不同的时钟信号线。如图13所示，第二移位单元21及复位移位单元11’的时钟信号输入端CLK交替与第三时钟信号线CLK3和第四时钟信号线CLK4电连接，并且第三时钟信号线CLK3与第四时钟信号线CLK4交替输出脉冲信号，则可以配合开启信号输入端IN接收的信号实现级联的的第二移位单元21与复位移位单元11’依次输出使能信号。则一个第二移位单元21输出使能信号后，完成对一条第一信号线DL的检测；随后第二移位单元21关断且与其级联并相邻的复位移位单元11’输出使能信号，完成对检测线DET的复位，且上一级第二移位单元21关断；下一级第二移位单元21输出使能信号，完成对另一条第一信号线DL的检测；……；如此重复完成对所有第一信号线DL的检测。
在本申请的另一个实施例中，第二移位单元21依次级联且复位移位单元11’依次级联。则一个第二移位单元21输出使能信号后，完成对一条第一信号线DL的检测，随后该级第二移位单元21关断且复位移位单元11’输出使能信号，完成对检测线DET的复位；随后与上一个第二移位单元21级联且相邻的第二移位单元21输出使能信号，完成对一条第一信号线DL的检测；……；如此重复完成对所有第一信号线DL的检测。
在本申请实施例中，对第一信号线DL的缺陷检测无需借助检测软件或者显微镜等检测设备，能够降低检测成本，提高检测效率。
显示装置的工作阶段还包括信号线缺陷检测阶段，在信号线缺陷检测阶段，信号线缺陷检测模块20工作并定位存在缺陷的第一信号线DL。当检测到存在断线缺陷的第一信号线DL时，则可以启动信号线修复模块10，信号线修复模块10对第一信号线DL修复的工作过程与上述任意一个实施例相同，完成对发生断线的第一信号线DL的修复。
本申请实施例还提供一种驱动芯片，能够用于对本申请实施例提供的显示面板进行信号线修复的控制，图14为本申请实施例提供的驱动芯片的结构示意图。如图14所示，驱动芯片包括控制单元311和输入输出单元312。
驱动芯片在确定存在断线的第一信号线时，提供控制信号，使得断线的第一信号线与信号线修复模块10中的修复线DUM电导通。其中，提供控制信号，使得断线的第一信号线与信号线修复模块10中的修复线DUM电导通包括：控制单元311指示输入输出单元312向信号线修复模块10的多级第一移位单元11发送控制信号，控制发生断线的第一信号线DL对应的第一移位单元11的移位输出端输出使能信号，使得以组连接开关组中对应的连接开关开启，使得断线的第一信号线DL与一条修复线DUM电导通。例如，向起始信号线提供使能信号、向复位信号线提供复位信号、向时钟信号线提供脉冲信号，向时钟信号线输出多个脉冲信号之后持续输出使能信号或非使能信号。
当信号线修复模块10包括一一对应的多条修复线、多组连接开关组、多组存储电 容组、多组选择开关组及多条选择信号线，芯片在确定存在断线的第一信号线DL时，控制单元311还用于指示输入输出单元312向多条选择信号线分别输出选择信号，以分别启动选择开关组进而分别启动连接开关组，进而分别控制断线的多条第一信号线DL与不同的修复线DUM电导通。
驱动芯片还提供信号给多个第一信号线DL，以控制子像素P0进行发光显示。
参考上述图1或图2的示意，图1或图2中驱动芯片为本申请图14实施例提供的驱动芯片30。
本申请还提供一种电子设备，图15为本申请实施例提供的电子设备示意图，如图15所示，电子设备包括本申请任意实施例提供的显示装置。其中，显示装置的具体结构已经在上述实施例中进行了详细说明，此处不再赘述。当然，图15所示的电子设备仅仅为示意说明，例如可以是手机、平板计算机、笔记本电脑、电纸书、电视机、智能手表等任何具有显示功能的电子设备。
以上所述，仅为本申请的具体实施方式，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。本申请的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种显示装置，其特征在于，包括：
    多个子像素，所述子像素用于进行发光显示；
    多条信号线，所述多条信号线与所述子像素电连接并为所述子像素提供发光显示所需的信号；
    信号线修复模块，所述信号线修复模块与所述多条信号线电连接，用于对发生断线的所述信号线进行修复；所述信号线修复模块包括：
    至少一条修复线；
    至少一组连接开关组，所述至少一组连接开关组与所述至少一条修复线一一对应设置；所述连接开关组内包括多个连接开关，同一所述连接开关组中的所述多个连接开关与所述多条信号线一一对应设置，且所述连接开关的输入端与对应的所述信号线电连接，输出端与对应的所述修复线电连接；
    第一移位单元组，所述第一移位单元组内包括多级第一移位单元，每一组所述连接开关组中的所述多个连接开关与所述多级第一移位单元一一对应设置；所述第一移位单元包括移位输出端，第一移位单元的所述移位输出端与对应的所述连接开关的控制端电连接；
    驱动芯片，所述驱动芯片分别与所述多条信号线及所述信号线修复模块电连接，用于为所述信号线提供控制所述子像素发光显示所需的信号；在确定存在断线的所述信号线时，向所述信号线修复模块发送控制信号，使得所述断线的信号线与所述信号线修复模块中的所述修复线电导通；具体的，向所述信号线修复模块发送控制信号，使得所述断线的信号线与信号线修复模块中的所述修复线电导通包括：向所述信号线修复模块发送控制信号，使发生断线的所述信号线对应的所述第一移位单元的移位输出端输出使能信号，控制一组连接开关组中对应的所述连接开关开启，使得所述断线的信号线与一条所述修复线电导通。
  2. 根据权利要求1所述的显示装置，其特征在于，所述第一移位单元组内的所述多级第一移位单元依次级联。
  3. 根据权利要求1所述的显示装置，其特征在于，至少一条所述修复线复用为检测线，复用为所述检测线的所述修复线用于将信号线上的信号传输至所述驱动芯片；
    与复用为所述检测线的所述修复线对应的所述连接开关组复用为所述检测开关组，复用为所述检测开关组的所述连接开关组中的所述连接开关复用为检测开关，所述检测开关开启时，其输出端所电连接的所述信号线上的信号传输至其输出端所电连接复用为所述检测线的所述修复线；
    所述信号线修复模块还包括：
    第二复位信号线，用于从所述驱动芯片获取复位信号并将复位信号传输至复用为所述检测线的修复线；
    复位开关，所述复位开关的输入端与至少一条复用为所述检测线的所述修复线电连接，输出端与所述第二复位信号线电连接，所述复位开关开启时，其输入端所电连接的所述复位线上传输的复位信号传输至复用为所述检测线的所述修复线。
  4. 根据权利要求3所述的显示装置，其特征在于，多个所述复位开关与一个复用为所述检测开关组的所述连接开关组中的多个所述连接开关一一交替设置。
  5. 根据权权利要求4所示的显示装置，其特征在于，所述信号线修复模块还包括多个与所述复位开关一一对应设置的复位移位单元，所述复位移位单元的移位输出端与对应的所述复位开关的控制端电连接；所述复位移位单元的所述移位输出端输出的 信号控制复位开关导通或关断；所述复位移位单元与所述第一移位单元一一对应设置且级联。
  6. 根据权利要求1所示的显示装置，其特征在于，所述信号线修复模块包括：
    多条修复线；
    多个连接开关组，不同所述连接开关组中的所述连接开关的输出端分别与不同的所述修复线电连接；
    多个存储电容组，所述多个存储电容组与所述多个连接开关组一一对应设置；所述存储电容组内包括多个存储电容，每一个所述存储电容组中的所述多个存储电容与对应的所述连接开关组中的所述多个连接开关一一对应，且存储电容的第一极板与对应的所述连接开关的控制端电连接；
    多个选择开关组，所述多个选择开关组与所述多个存储电容组一一对应设置；所述选择开关组内包括多个选择开关，每一个所述选择开关组中的所述多个选择开关与对应的所述存储电容组中的所述多个存储电容一一对应，所述选择开关的输出端与对应的所述存储电容的第二极板电连接，所述选择开关的输入端与对应的所述第一移位单元的移位输出端电连接；
    多条选择信号线，所述多条选择信号线与所述多个选择开关组一一对应设置，所述选择信号线与对应的所述选择开关组中的所述多个选择开关的控制端电连接；
    所述驱动芯片向所述信号线修复模块发送控制信号包括，向所述选择信号线发送选择信号，则传输所述选择信号的所述选择信号线所电连接的所述连接开关开启，所述第一移位单元输出的使能信号传输至对应的所述连接开关的控制端，使对应的所述连接开关开启。
  7. 根据权利要求6所述的显示装置，其特征在于，一条所述修复线复用为所述检测线，复用为所述检测线的所述修复线与断线的所述信号线电连接且修复的时间晚于其他所述修复线与断线的所述信号线电连接且修复的时间。
  8. 根据权利要求6所述的显示装置，其特征在于，所有的所述修复线均复用为检测线。
  9. 一种驱动芯片，其特征在于，所述驱动芯片用于：
    提供信号给多个信号线，以控制子像素进行发光显示；
    在确定存在断线的信号线时，提供控制信号，使得所述断线的信号线与信号线修复模块中的修复线电导通；其中，提供控制信号，使得所述断线的信号线与信号线修复模块中的修复线电导通包括：向所述信号线修复模块发送控制信号，控制所述发生断线的信号线对应的第一移位单元的移位输出端输出使能信号，并控制一组连接开关组中对应的连接开关开启，使得断线的信号线与一条修复线电导通。
  10. 一种电子设备，其特征在于，包括如权利要求1-8任意一项所述的显示装置。
PCT/CN2021/119633 2020-09-30 2021-09-22 一种显示装置、驱动芯片及电子设备 WO2022068651A1 (zh)

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Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
CN115171615B (zh) * 2022-05-13 2023-06-02 广州华星光电半导体显示技术有限公司 面板修复电路、显示面板及显示设备
TWI814631B (zh) * 2022-11-01 2023-09-01 友達光電股份有限公司 觸控顯示面板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050110738A1 (en) * 2003-11-20 2005-05-26 Samsung Electronics., Co., Ltd. Source line repair circuit, source driver circuit, liquid crystal display device with source line repair function, and method of repairing source line
CN1797141A (zh) * 2004-12-20 2006-07-05 凌阳科技股份有限公司 具修复断线功能的薄膜晶体管液晶显示器及高阻抗侦测电路
CN102879964A (zh) * 2012-10-11 2013-01-16 深圳市华星光电技术有限公司 一种阵列基板及psva型液晶显示面板
US8830153B2 (en) * 2010-07-30 2014-09-09 Chunghwa Picture Tubes, Ltd. Liquid crystal display panel and method for repairing signal line thereof
CN110806667A (zh) * 2019-11-05 2020-02-18 昆山龙腾光电股份有限公司 显示面板、显示面板的数据线的修复方法和液晶显示装置
CN211603773U (zh) * 2020-01-08 2020-09-29 昆山龙腾光电股份有限公司 一种液晶显示器

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101388199B (zh) * 2008-11-07 2010-06-02 上海广电光电子有限公司 液晶显示装置的预加强模块及其驱动方法
KR101910080B1 (ko) * 2011-12-08 2018-12-20 삼성디스플레이 주식회사 주사 구동 회로 및 이의 리페어 방법
US9299299B2 (en) * 2012-10-11 2016-03-29 Shenzhen China Star Optoelectronics Technology Co., Ltd Array substrate, PSAV liquid crystal display panel and manufacturing method thereof
CN103838047B (zh) * 2014-02-27 2017-01-25 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
KR20160057553A (ko) * 2014-11-13 2016-05-24 삼성디스플레이 주식회사 표시장치
CN105652482A (zh) * 2016-03-15 2016-06-08 深圳市华星光电技术有限公司 液晶显示装置及其液晶显示面板
CN105575305B (zh) * 2016-03-17 2018-10-30 京东方科技集团股份有限公司 一种信号线断线修复电路、方法和显示面板
CN105974624A (zh) * 2016-07-20 2016-09-28 深圳市华星光电技术有限公司 显示装置及其修复方法
CN106328038B (zh) * 2016-10-31 2019-04-02 京东方科技集团股份有限公司 一种栅极驱动电路、其修复方法及显示装置
CN106445249B (zh) * 2016-12-20 2019-11-22 厦门天马微电子有限公司 触控显示面板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050110738A1 (en) * 2003-11-20 2005-05-26 Samsung Electronics., Co., Ltd. Source line repair circuit, source driver circuit, liquid crystal display device with source line repair function, and method of repairing source line
CN1797141A (zh) * 2004-12-20 2006-07-05 凌阳科技股份有限公司 具修复断线功能的薄膜晶体管液晶显示器及高阻抗侦测电路
US8830153B2 (en) * 2010-07-30 2014-09-09 Chunghwa Picture Tubes, Ltd. Liquid crystal display panel and method for repairing signal line thereof
CN102879964A (zh) * 2012-10-11 2013-01-16 深圳市华星光电技术有限公司 一种阵列基板及psva型液晶显示面板
CN110806667A (zh) * 2019-11-05 2020-02-18 昆山龙腾光电股份有限公司 显示面板、显示面板的数据线的修复方法和液晶显示装置
CN211603773U (zh) * 2020-01-08 2020-09-29 昆山龙腾光电股份有限公司 一种液晶显示器

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4083988A4

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