WO2022062064A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2022062064A1
WO2022062064A1 PCT/CN2020/125130 CN2020125130W WO2022062064A1 WO 2022062064 A1 WO2022062064 A1 WO 2022062064A1 CN 2020125130 W CN2020125130 W CN 2020125130W WO 2022062064 A1 WO2022062064 A1 WO 2022062064A1
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Prior art keywords
layer
display panel
sub
electrode layer
pixel electrode
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Ceased
Application number
PCT/CN2020/125130
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English (en)
French (fr)
Inventor
卢延涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to US17/056,802 priority Critical patent/US11567379B2/en
Publication of WO2022062064A1 publication Critical patent/WO2022062064A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1347—Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133528—Polarisers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/50—OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays

Definitions

  • the present application relates to the field of display, and in particular, to a display panel and a display device.
  • HDR High Dynamic Range Imaging, high dynamic lighting rendering
  • the present application provides a display panel and a display device to solve the technical problem of the complex structure of the display panel for realizing the HDR display effect.
  • the present application provides a display panel, the display panel includes a first sub-display panel and a second sub-display panel located on one side of the first sub-display panel, the first sub-display panel includes a first substrate, A driving circuit layer located on the first substrate, the driving circuit layer making the first sub-display panel or/and the second sub-display panel light-transmitting.
  • the first sub-display panel further includes a first pixel electrode layer on the driving circuit layer, a first liquid crystal layer on the first pixel electrode layer, and a first pixel electrode layer on the first pixel electrode layer.
  • a first common electrode layer on the liquid crystal layer, the first pixel electrode layer and the first common electrode layer form a first electric field;
  • the second sub-display panel includes a second common electrode layer located on the first substrate, opposite to the first substrate, and located between the first substrate and the second common electrode layer the second liquid crystal layer;
  • the driving electrode layer further includes a second pixel electrode layer disposed in the same layer as at least one metal layer in the driving electrode layer, and a second electric field formed by the second pixel electrode layer and the second common electrode layer .
  • the driving circuit layer includes a light shielding layer located on the first substrate, an active layer located on the light shielding layer, a gate layer located on the active layer, and a light shielding layer located on the active layer.
  • a source and drain layer on the gate layer, the second pixel electrode layer is the same layer as at least one of the light shielding layer, the active layer, the gate layer, and the source and drain layers set up.
  • the driving circuit layer further includes a third common electrode layer located between the source and drain layers and the first pixel electrode layer, the third common electrode layer and the first pixel
  • the electrode layer forms a third electric field, and the first electric field and the third electric field drive the first liquid crystal layer to deflect.
  • the display panel further includes a first polarizer layer located between the first sub-display panel and the second sub-display panel, and the first sub-display panel is located far from the The second polarizer layer on the side of the second sub-display panel and the third polarizer layer on the side of the second sub-display panel away from the first sub-display panel.
  • one of the first sub-display panel and the second sub-display panel is a liquid crystal display panel
  • the other of the first sub-display panel and the second sub-display panel is a liquid crystal display panel.
  • One is an OLED display panel.
  • the first sub-display panel further includes a first pixel electrode layer on the driving circuit layer, a first light-emitting layer on the first pixel electrode layer, and a first light-emitting layer on the first pixel electrode layer. a first cathodic reflection layer on the light-emitting layer;
  • the second sub-display panel includes a second liquid crystal layer on the first substrate and a side away from the driving circuit layer, and a second common electrode layer on the second liquid crystal layer;
  • the driving electrode layer further includes a second pixel electrode layer disposed in the same layer as at least one metal layer in the driving electrode layer, and a second electric field formed by the second pixel electrode layer and the second common electrode layer .
  • the first sub-display panel further includes a first pixel electrode layer on the driving circuit layer, a first liquid crystal layer on the first pixel electrode layer, and a first pixel electrode layer on the first pixel electrode layer.
  • a first common electrode layer on the liquid crystal layer, the first pixel electrode layer and the first common electrode layer form a first electric field;
  • the second sub-display panel includes a second pixel electrode layer located on the first substrate and away from the driving circuit layer, a second light emitting layer located on the second pixel electrode layer, and a second pixel electrode layer located on the second pixel electrode layer. a second cathodic reflection layer on the second light-emitting layer;
  • the second pixel electrode layer is electrically connected to the source and drain layers in the driving circuit layer or the first pixel electrode layer through a first via hole.
  • the display panel includes a first polarizer layer located between the first sub-display panel and the second sub-display panel, and a first polarizer layer located away from the first sub-display panel The fourth polarizer layer on the side of the second sub-display panel or the side of the second sub-display panel away from the first sub-display panel.
  • the display panel further includes a second substrate located on the side of the first sub-display panel away from the second sub-display panel, and a second substrate located on the side of the second sub-display panel away from the first sub-display panel.
  • a third substrate on one side of the sub-display panel, the thickness of the first substrate is smaller than that of the second substrate or the third substrate.
  • the present application also provides a display device, the display device includes a display panel, the display panel includes a first sub-display panel and a second sub-display panel located on one side of the first sub-display panel, the first sub-display panel
  • the sub-display panel includes a first substrate, a driving circuit layer on the first substrate, and the driving circuit layer allows the first sub-display panel or/and the second sub-display panel to transmit light.
  • the first sub-display panel further includes a first pixel electrode layer on the driving circuit layer, a first liquid crystal layer on the first pixel electrode layer, and a first pixel electrode layer on the first pixel electrode layer.
  • a first common electrode layer on the liquid crystal layer, the first pixel electrode layer and the first common electrode layer form a first electric field;
  • the second sub-display panel includes a second common electrode layer located on the first substrate, opposite to the first substrate, and located between the first substrate and the second common electrode layer the second liquid crystal layer;
  • the driving electrode layer includes a second pixel electrode layer disposed in the same layer as at least one metal layer in the driving electrode layer, and a second electric field formed by the second pixel electrode layer and the second common electrode layer.
  • the driving circuit layer includes a light shielding layer located on the first substrate, an active layer located on the light shielding layer, a gate layer located on the active layer, and a light shielding layer located on the active layer.
  • a source and drain layer on the gate layer, the second pixel electrode layer is the same layer as at least one of the light shielding layer, the active layer, the gate layer, and the source and drain layers set up.
  • the driving circuit layer further includes a third common electrode layer located between the source and drain layers and the first pixel electrode layer, the third common electrode layer and the first pixel The electrode layer forms a third electric field.
  • the display panel further includes a first polarizer layer located between the first sub-display panel and the second sub-display panel, and the first sub-display panel is located far from the The second polarizer layer on the side of the second sub-display panel and the third polarizer layer on the side of the second sub-display panel away from the first sub-display panel.
  • one of the first sub-display panel and the second sub-display panel is a liquid crystal display panel
  • the other of the first sub-display panel and the second sub-display panel is a liquid crystal display panel.
  • One is an OLED display panel.
  • the first sub-display panel further includes a first pixel electrode layer located on the driving circuit layer, a first light-emitting layer located on the first pixel electrode layer, and a first pixel electrode layer located on the first pixel electrode layer. a first cathodic reflection layer on the light-emitting layer;
  • the second sub-display panel includes a second liquid crystal layer on the first substrate and a side away from the driving circuit layer, and a second common electrode layer on the second liquid crystal layer;
  • the driving electrode layer further includes a second pixel electrode layer disposed in the same layer as at least one metal layer in the driving electrode layer, and a second electric field formed by the second pixel electrode layer and the second common electrode layer .
  • the first sub-display panel further includes a first pixel electrode layer on the driving circuit layer, a first liquid crystal layer on the first pixel electrode layer, and a first pixel electrode layer on the first pixel electrode layer.
  • a first common electrode layer on the liquid crystal layer, the first pixel electrode layer and the first common electrode layer form a first electric field;
  • the second sub-display panel includes a second pixel electrode layer located on the first substrate and away from the driving circuit layer, a second light emitting layer located on the second pixel electrode layer, and a second pixel electrode layer located on the second pixel electrode layer. a second cathodic reflection layer on the second light-emitting layer;
  • the second pixel electrode layer is electrically connected to the source and drain layers in the driving circuit layer or the first pixel electrode layer through a first via hole.
  • the display panel includes a first polarizer layer located between the first sub-display panel and the second sub-display panel, and a first polarizer layer located between the first sub-display panel and the second sub-display panel and away from the first sub-display panel.
  • the fourth polarizer layer on the side of the second sub-display panel or the side of the second sub-display panel away from the first sub-display panel.
  • the display panel further includes a second substrate located on a side of the first sub-display panel away from the second sub-display panel, and a second substrate located on the side of the second sub-display panel away from the first sub-display panel.
  • a third substrate on one side of the sub-display panel, the thickness of the first substrate is smaller than that of the second substrate or the third substrate.
  • a driving circuit layer is arranged in the display panel, and the driving circuit layer simultaneously drives the adjacent two-layer sub-display panels to emit light or transmit light.
  • the adjustment of the light source by the double-layer sub-display panel enables the product to achieve multi-dimensional brightness. Adjustment to improve the display effect of the product.
  • FIG. 1 is a first structural diagram of a display panel of the present application
  • FIG. 2 is a second structure diagram of the display panel of the present application.
  • FIG. 3 is a third structural diagram of the display panel of the present application.
  • FIG. 4 is a fourth structural diagram of the display panel of the present application.
  • FIG. 5 is a fifth structural diagram of the display panel of the application.
  • FIG. 6 is a sixth structural diagram of the display panel of the present application.
  • the present application provides a display panel 100 .
  • the display panel 100 includes a first sub-display panel 10 and a second sub-display panel 20 located on one side of the first sub-display panel 10 .
  • the first sub-display panel 10 includes a first substrate 11 and a driving circuit layer 12 located on the first substrate 11, and the driving circuit layer 12 drives the first sub-display panel 10 or/and the The second sub-display panel 20 transmits light.
  • a driving circuit layer 12 is provided in the display panel 100, and the driving circuit layer 12 drives the adjacent two-layer sub-display panels 100 to emit light or transmit light at the same time.
  • the adjustment of the light source by the double-layer sub-display panel 100 enables the product to Multi-dimensional brightness adjustment is carried out to improve the display effect of the product.
  • the first sub-display panel 10 or the second sub-display panel 20 may be one of a liquid crystal display panel, an OLED display panel, a Micro-LED display panel, etc. specific restrictions. Referring to FIGS. 1 to 4 , the first sub-display panel 10 and the second sub-display panel 20 are both liquid crystal display panels.
  • the first sub-display panel 10 may further include a first pixel electrode layer 13 located on the driving circuit layer 12 and a first liquid crystal layer located on the first pixel electrode layer 13 layer 14 and a first common electrode layer 15 on the first liquid crystal layer 14, the first pixel electrode layer 13 and the first common electrode layer 15 form a first electric field to drive the first liquid crystal layer 14 to deflect .
  • the first common electrode layer 15 is located on the side of the first liquid crystal layer 14 away from the driving circuit layer 12 .
  • the second sub-display panel 20 may include a second liquid crystal layer 21 on the first substrate 11 and a side away from the driving circuit layer 12 and a second liquid crystal layer 21 on the side On the second common electrode layer 22 , the first common electrode layer 15 is located on the side of the second liquid crystal layer 21 away from the driving circuit layer 12 .
  • the driving electrode layer further includes a second pixel electrode layer 30 disposed in the same layer as at least one metal layer in the driving electrode layer, the second pixel electrode layer 30 and the second common electrode
  • the second electric field formed by the layer 22 drives the second liquid crystal layer 21 to deflect.
  • the material of the first substrate 11 can be determined according to the rigidity and flexibility of the product, such as rigid materials of glass, quartz or flexible materials of polyimide, etc.
  • the specific material of the first substrate 11 This application is not limited in detail.
  • the driving circuit layer 12 may include a plurality of thin film transistors.
  • the thin film transistor may be of an etch stop type, a back channel etch type, or a top gate type thin film transistor, etc., which is not specifically limited.
  • a top-gate thin film transistor may include a light shielding layer 121 on the first substrate 11, an active layer 122 on the light shielding layer 121, a gate layer 123 on the active layer 122, The source and drain layers 124 on the gate layer 123 .
  • the above-mentioned thin film transistor further includes an insulating layer between the light shielding layer 121 , the active layer 122 , the gate layer 123 , and the source and drain layers 124 , which will not be described in detail here.
  • the driving circuit layer 12 may further include at least one of the light shielding layer 121 , the active layer 122 , the gate layer 123 , and the source and drain layers 124 . Same layer settings.
  • the first pixel electrode layer 13 , the second pixel electrode layer 30 , the first common electrode layer 15 , and the second common electrode layer 22 may be ITO (Indium tin oxide, oxide) indium tin).
  • the second pixel electrode layer 30 and the source and drain layers 124 may be disposed in the same layer.
  • the process of forming the source/drain layer 124 may be followed by the process of the second pixel electrode layer 30 , so that the second pixel electrode layer 30 is electrically connected to the source/drain electrode.
  • the first common electrode layer 15 inputs a constant first voltage
  • the second common electrode layer 22 inputs a constant second voltage
  • the first pixel electrode layer 13 and the The second pixel electrode is input with the same pixel voltage from the source/drain
  • the first voltage and the pixel voltage form a first electric field to drive the first liquid crystal layer 14 to deflect
  • the second voltage and the pixel voltage form a first electric field to deflect.
  • the pixel voltage forms a second electric field to drive the second liquid crystal layer 21 to deflect.
  • the source/drain layer 124 may be made of the same material as the second pixel electrode layer 30 , that is, the second pixel may be formed simultaneously in the process of forming the source/drain layer 124 For the electrode layer 30, the process of removing the second pixel electrode layer 30 simplifies the process.
  • the deflection of two liquid crystal layers is driven by one driving circuit layer 12.
  • the deflection of the first liquid crystal layer 14 adjusts the brightness of the backlight in the first dimension
  • the second The deflection of the liquid crystal layer 21 can adjust the brightness of the backlight source in the second dimension.
  • the superposition of the first dimension and the second dimension enables the display panel 100 to achieve higher-dimensional brightness adjustment, thereby improving the effect of the display panel 100 .
  • the second pixel electrode layer 30 may be disposed in the same layer as the active layer 122 .
  • the active layer 122 may include a channel region 1221 and doped regions 1222 on both sides of the channel region 1221 , the doped regions 1221 on one side of the active layer 122 are the second
  • the pixel electrode layer 30 is electrically connected, and the pixel voltage transmitted to the source/drain electrode is transmitted to the second pixel electrode layer 30 and the first pixel electrode layer 13, and the pixel voltage is formed with the first voltage or the second voltage
  • the corresponding electric field drives the liquid crystal molecules to deflect, thereby realizing multi-dimensional brightness adjustment of the display panel 100 .
  • the structure of the second pixel electrode layer 30 in FIG. 2 has a smaller distance between the structure of the second pixel electrode layer 30 and the second common electrode than the structure of the second pixel electrode layer 30 in FIG. 1 .
  • the intensity of the second voltage between the second common electrode layers 22 is higher, which is more favorable for driving the second liquid crystal layer 21 to deflect through the driving circuit layer 12 .
  • the active layer 122 is not directly electrically connected to the second pixel electrode layer 30 , and the source and drain layers 124 are electrically connected to the second pixel electrode layer 30 through via holes. Since the distance between the active layer 122 and the source-drain layer 124 is relatively large, if the electrical connection between the source-drain layer 124 and the second pixel electrode layer 30 is performed directly through the via hole, the opening of the via hole is relatively large, which increases the Etching difficulty.
  • the structure of FIG. 3 reduces the distance between the second pixel electrode layer 30 and the source-drain layer 124 by disposing a conductive block 1231 on the edge of the second pixel electrode layer 30 as a step, and reduces the opening size of the corresponding contact via.
  • the conductive block 1231 located on the second pixel electrode layer 30 can be formed by a separate process, or a conductive block 1231 can be directly formed in the region when the gate layer 123 is formed, that is, the conductive block 1231 and the gate layer are formed. 123 is formed in the same mask process.
  • the second pixel electrode layer 30 may also be disposed in the same layer as the light shielding layer 121 that is closer to the second common electrode layer 22; , which is not specifically limited in this application.
  • the driving circuit layer 12 further includes a third common electrode layer 16 located between the source and drain layers 124 and the first pixel electrode layer 13 , the third common electrode layer 16 A third electric field is formed with the first pixel electrode layer 13 , and the first electric field and the third electric field drive the first liquid crystal layer 14 to deflect.
  • the third common electrode layer 16 may be located in an insulating layer, such as a passivation layer, between the source/drain layer 124 and the first pixel electrode layer 13 , Alternatively, two insulating layers are provided, and the third common electrode layer 16 is located between two different insulating layers, or the like.
  • the third common electrode layer 16 and the first pixel electrode layer 13 form a third electric field
  • the third electric field is a lateral electric field
  • the first electric field formed by the electrode layer 13 is a vertical electric field
  • the superposition of the vertical electric field and the lateral electric field forms a new driving electric field to drive the liquid crystal molecules in the first liquid crystal layer 14 to deflect.
  • the voltages in the first common electrode layer 15 , the second common electrode layer 22 and the third common electrode layer 16 are not specifically limited, and the voltages may be equal or unequal.
  • two thin film transistors can also be arranged in any sub-pixel region of the present application.
  • the source/drain of one thin film transistor is electrically connected to the first pixel electrode layer 13, and one thin film transistor is electrically connected to the second pixel electrode layer 30, and different pixels are input to different pixel electrode layers through two different thin film transistors voltage, and then control the liquid crystal molecules in the two liquid crystal layers in the same sub-pixel to deflect at different angles.
  • the gray scale displayed by the brightness of the backlight is 0 ⁇ 255, and the superposition of the first liquid crystal layer 14 and the second liquid crystal layer 21 makes the display panel 100 display the gray scale of the backlight brightness is 0 ⁇ 65535, from the original
  • the 8-bit image data is changed to 16-bit image data, and the display panel 100 is more delicate and accurate.
  • the structure of this embodiment is equivalent to sacrificing part of the aperture ratio in exchange for high-dimensional brightness adjustment.
  • the source is the input terminal of the pixel voltage
  • the drain is the output terminal of the pixel voltage, which can electrically connect the second pixel electrode layer 30 to the source
  • the first The pixel electrode layer 13 is electrically connected to the drain electrode
  • a voltage divider module is connected in series with the port of the drain electrode to adjust the voltage input to the first pixel electrode layer 13 .
  • different pixel voltages can be input through one thin film transistor. Compared with the above-mentioned embodiments, the aperture ratio of the display panel 100 is guaranteed on the premise of realizing multi-dimensional brightness adjustment.
  • the display panel 100 further includes a first polarizer layer 41 located between the first sub-display panel 10 and the second sub-display panel 20, and a first polarizer layer 41 located between the first sub-display panel 10 and the second sub-display panel 20.
  • the second polarizer layer 42 on the side of the display panel 10 away from the second sub-display panel 20 and the third polarizer layer 43 on the side of the second sub-display panel 20 away from the first sub-display panel 10 are.
  • the second sub-display panel 20 may include a third polarizer layer 43, a third substrate 24 on the third polarizer layer 43, a second common electrode layer 22 on the third substrate 24, and a third substrate 24 on the third substrate 24.
  • the second substrate 18 is further disposed between the second polarizer layer 42 and the first common electrode layer 15 . Since the third substrate 24 and the second substrate 18 are located on both sides of the display panel 100, the first substrate 11 is located between the first sub-display panel 10 and the second sub-display panel 20, in order to further To reduce the size of the display panel 100 and increase the effect of the second pixel electrode layer 30 on the second liquid crystal layer 21, the thickness of the first substrate 11 in the present application is smaller than that of the second substrate 18 or the third Thickness of substrate 24 .
  • the first substrate 11 is configured as a flexible substrate, and the second substrate 18 and the third substrate 24 are configured as rigid substrates.
  • the display panel further includes a first alignment layer 17 on both sides of the first liquid crystal layer 14 and a second alignment layer 23 on both sides of the second liquid crystal layer 21 , which are not described in detail here. introduce.
  • the display panel 100 further includes a color filter layer 19 in the first sub-display panel 10 .
  • the color filter layer 19 may be located on the side of the first sub-display panel 10 close to the first common electrode layer 15 ; when the first sub-display panel 10 has a conventional structure
  • 10 is a COA (CF on Array, the color filter layer 19 is located on the array layer) substrate, the color filter layer 19 may be located on the side of the first sub-display panel 10 close to the first pixel electrode layer 13 .
  • the structure of the present application is a conventional display panel 100, and the color filter layer 19 may include at least three color resist units and a light shielding layer 121 located between two adjacent color resist units.
  • One of the color resist units corresponds to one of the pixel units.
  • the color resistance unit may be one of red color resistance, green color resistance or blue color resistance.
  • a black shading unit is arranged between two adjacent color resist units.
  • a driving circuit layer 12 is provided in the display panel 100, and the driving circuit layer 12 drives the liquid crystal molecules of two adjacent liquid crystal layers to deflect at the same time, so that the two liquid crystal layers can adjust the brightness of the backlight source and realize the display.
  • the multi-dimensional brightness adjustment of the panel 100 improves the effect of the display panel 100 .
  • one of the first sub-display panel 10 and the second sub-display panel 20 is a liquid crystal display panel, and the first sub-display panel 10 and the second sub-display panel The other of the panels 20 is an OLED display panel.
  • the second sub-display panel 20 is a liquid crystal display panel
  • the first sub-display panel 10 is an OLED display panel. Since the liquid crystal display panel at the lower layer is required as a dimming member, the first sub-display panel 10 is The sub-display panel 10 is a bottom-emitting OLED display panel.
  • the first sub-display panel 10 is a liquid crystal display panel
  • the second sub-display panel 20 is an OLED display panel, that is, the lower sub-display panel 100 emits light
  • the upper-layer sub-display panel 100 is a dimming component.
  • the second sub-display panel 20 is an inverted bottom-emitting OLED display panel, that is, the light-emitting direction of the top-emitting OLED display panel is still emitted from the anode layer side, and only the bottom-emitting OLED display panel is inverted to form top-emitting light.
  • the first sub-display panel 10 further includes a first pixel electrode layer 13 located on the driving circuit layer 12 and located on the first pixel electrode layer 13
  • the second sub-display panel 20 includes a second liquid crystal layer 21 located on the first substrate 11 and away from the driving circuit layer 12 and a second common electrode layer 22 located on the second liquid crystal layer 21 .
  • the driving electrode layer further includes a second pixel electrode layer 30 disposed in the same layer as at least one metal layer in the driving electrode layer, the second pixel electrode layer 30 and the second common electrode
  • the second electric field formed by the layer 22 drives the second liquid crystal layer 21 to deflect.
  • the first pixel electrode layer 13 is equivalent to the anode layer in the OLED display panel, the light emitted by the light emitting layer is partially led out from the light-emitting side through the anode layer, and part of the light is emitted from the product through the first cathode reflection layer 52 side export.
  • the first polarizer layer 41 needs to be disposed between the first sub-display panel 10 and the second sub-display panel 20 and on the light-emitting side of the display panel 100 That is, a fourth polarizer layer 44 is provided on the side of the second sub-display panel 20 away from the first sub-display panel 10 , and the fourth polarizer layer 44 is equivalent to the third polarizer layer 43 in the first embodiment.
  • the structure located on the first cathode reflection layer 52 can encapsulate the cover plate layer 54, and the detailed structure is not described in detail in this application.
  • the first sub-display panel 10 further includes a first pixel electrode layer 13 located on the driving circuit layer 12 and located on the first pixel electrode layer 13
  • the first liquid crystal layer 14 and the first common electrode layer 15 located on the first liquid crystal layer 14, the first pixel electrode layer 13 and the first common electrode layer 15 form a first electric field to drive the first
  • the liquid crystal layer 14 is deflected.
  • the second sub-display panel 20 includes a second pixel electrode layer 30 located on the first substrate 11 and a side away from the driving circuit layer 12 , and a second light-emitting electrode layer 30 located on the second pixel electrode layer 30 . layer 61 , and a second cathodic reflection layer 62 located on the second light-emitting layer 61 .
  • the second pixel electrode layer 30 is electrically connected to the source and drain layers 124 in the driving circuit layer 12 or the first pixel electrode layer 13 through a first via hole.
  • the OLED display panel is located in the lower structure of the display panel 100 , the second cathodic reflection layer 62 is close to the third substrate 24 , and the second pixel electrode layer 30 is disposed close to the first substrate 11 . Since the first substrate 11 and the first polarizer layer 41 are spaced between the second pixel electrode layer 30 and the driving circuit layer 12 , the structure of this embodiment needs to correspond to the first substrate 11 and the first polarizer layer 41 .
  • a via structure is formed in the driver circuit layer 12, so that the pixel voltage output by the source/drain in the driving circuit layer 12 can be input into the second pixel electrode layer 30, and the pixel voltage of the second pixel electrode layer 30 and the second cathodic reflection layer 62 form a structural drive
  • the second light emitting layer 61 emits light.
  • the first polarizer layer 41 needs to be disposed between the first sub-display panel 10 and the second sub-display panel 20 and on the light-emitting side of the display panel 100 That is, a fourth polarizer layer 44 is provided on the side of the first sub-display panel 10 away from the second sub-display panel 20 , and the fourth polarizer layer 44 is equivalent to the second polarizer layer 42 in the first embodiment.
  • the present application also proposes a display device, wherein the display device includes the above-mentioned display panel.
  • the display device may include a display device located on one side of the display panel.
  • the working principle of the display device in this embodiment is the same as or similar to that of the above-mentioned display panel, which will not be repeated here. .
  • the present application proposes a display panel and a display device.
  • the display panel includes a first sub-display panel and a second sub-display panel located on one side of the first sub-display panel.
  • the first sub-display panel includes a first substrate, A driving circuit layer located on the first substrate, the driving circuit layer driving the first sub-display panel or/and the second sub-display panel to transmit light.
  • a driver circuit layer is arranged in the display panel, and the driver circuit layer simultaneously drives the adjacent two-layer sub-display panels to emit light or transmit light.
  • the adjustment of the light source by the two-layer sub-display panel enables the product to perform multi-dimensional brightness adjustment. , which improves the display effect of the product.

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Abstract

一种显示面板（100）及显示装置，显示面板（100）包括第一子显示面板（10）及位于第一子显示面板（10）一侧的第二子显示面板（20），第一子显示面板（10）包括第一衬底（11）、位于第一衬底（11）上的驱动电路层（12），驱动电路层（12）使第一子显示面板（10）或/和第二子显示面板（20）透光。

Description

显示面板及显示装置 技术领域
本申请涉及显示领域，特别涉及一种显示面板及显示装置。
 背景技术
随着显示设备的发展，HDR(High Dynamic Range Imaging，高动态光照渲染)技术逐渐应用于常规显示器中，以实现显示屏的多维度的亮度调节。
在现有LCD(Liquid crystal displays，液晶显示器)面板中，其通常利用双层显示屏来进行多维度的亮度调节。但是由于该方案需要四层偏光片进行对位调节，增加了产品的对位精度以及亮度的损失。
因此，亟需一种显示面板以解决上述技术问题。
 技术问题
本申请提供一种显示面板及显示装置，以解决实现HDR显示效果的显示面板结构复杂的技术问题。
 技术解决方案
本申请提供了一种显示面板，所述显示面板包括第一子显示面板及位于所述第一子显示面板一侧的第二子显示面板，所述第一子显示面板包括第一衬底、位于所述第一衬底上的驱动电路层，所述驱动电路层使所述第一子显示面板或/和所述第二子显示面板透光。
在本申请的显示面板中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
所述第二子显示面板包括位于所述第一衬底上、与所述第一衬底相对设置的第二公共电极层及位于所述第一衬底与所述第二公共电极层之间的第二液晶层；
其中，所述驱动电极层还包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
在本申请的显示面板中，所述驱动电路层包括位于所述第一衬底上的遮光层、位于所述遮光层上的有源层、位于所述有源层上的栅极层、位于所述栅极层上的源漏极层，所述第二像素电极层与所述遮光层、所述有源层、所述栅极层、所述源漏极层中的至少一者同层设置。
在本申请的显示面板中，所述驱动电路层还包括位于源漏极层与所述第一像素电极层之间的第三公共电极层，所述第三公共电极层与所述第一像素电极层形成第三电场，所述第一电场与所述第三电场驱动所述第一液晶层偏转。
在本申请的显示面板中，所述显示面板还包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层、位于所述第一子显示面板远离所述第二子显示面板一侧的第二偏光片层及位于所述第二子显示面板远离所述第一子显示面板一侧的第三偏光片层。
在本申请的显示面板中，所述第一子显示面板和所述第二子显示面板中的一者为液晶显示面板，所述第一子显示面板和所述第二子显示面板中的另一者为OLED显示面板。
在本申请的显示面板中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一发光层、位于所述第一发光层上的第一阴极反射层；
所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二液晶层及位于所述第二液晶层上第二公共电极层；
其中，所述驱动电极层还包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
在本申请的显示面板中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二像素电极层、位于所述第二像素电极层上的第二发光层、位于所述第二发光层上的第二阴极反射层；
其中，所述第二像素电极层通过第一过孔与所述驱动电路层中的源漏极层或第一像素电极层电连接。
在本申请的显示面板中，所述显示面板包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层以及位于所述第一子显示面板远离所述第二子显示面板一侧或所述第二子显示面板远离所述第一子显示面板一侧的第四偏光片层。
在本申请的显示面板中，所述显示面板还包括位于所述第一子显示面板远离所述第二子显示面板一侧的第二衬底及位于所述第二子显示面板远离所述第一子显示面板一侧的第三衬底，所述第一衬底的厚度小于所述第二衬底或所述第三衬底的厚度。
本申请还提出了一种显示装置，所述显示装置包括显示面板，所述显示面板包括第一子显示面板及位于所述第一子显示面板一侧的第二子显示面板，所述第一子显示面板包括第一衬底、位于所述第一衬底上的驱动电路层，所述驱动电路层使所述第一子显示面板或/和所述第二子显示面板透光。
在本申请的显示装置中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
所述第二子显示面板包括位于所述第一衬底上、与所述第一衬底相对设置的第二公共电极层及位于所述第一衬底与所述第二公共电极层之间的第二液晶层；
其中，所述驱动电极层包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
在本申请的显示装置中，所述驱动电路层包括位于所述第一衬底上的遮光层、位于所述遮光层上的有源层、位于所述有源层上的栅极层、位于所述栅极层上的源漏极层，所述第二像素电极层与所述遮光层、所述有源层、所述栅极层、所述源漏极层中的至少一者同层设置。
在本申请的显示装置中，所述驱动电路层还包括位于源漏极层与所述第一像素电极层之间的第三公共电极层，所述第三公共电极层与所述第一像素电极层形成第三电场。
在本申请的显示装置中，所述显示面板还包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层、位于所述第一子显示面板远离所述第二子显示面板一侧的第二偏光片层及位于所述第二子显示面板远离所述第一子显示面板一侧的第三偏光片层。
在本申请的显示装置中，所述第一子显示面板和所述第二子显示面板中的一者为液晶显示面板，所述第一子显示面板和所述第二子显示面板中的另一者为OLED显示面板。
在本申请的显示装置中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一发光层、位于所述第一发光层上的第一阴极反射层；
所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二液晶层及位于所述第二液晶层上第二公共电极层；
其中，所述驱动电极层还包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
在本申请的显示装置中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二像素电极层、位于所述第二像素电极层上的第二发光层、位于所述第二发光层上的第二阴极反射层；
其中，所述第二像素电极层通过第一过孔与所述驱动电路层中的源漏极层或第一像素电极层电连接。
在本申请的显示装置中，所述显示面板包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层以及位于所述第一子显示面板远离所述第二子显示面板一侧或所述第二子显示面板远离所述第一子显示面板一侧的第四偏光片层。
在本申请的显示装置中，所述显示面板还包括位于所述第一子显示面板远离所述第二子显示面板一侧的第二衬底及位于所述第二子显示面板远离所述第一子显示面板一侧的第三衬底，所述第一衬底的厚度小于所述第二衬底或所述第三衬底的厚度。
 有益效果
本申请通过将在显示面板中设置一驱动电路层，以及该驱动电路层同时驱动相邻两层子显示面板发光或透光，双层子显示面板对光源的调节使得产品能进行多维度的亮度调节，提高了产品的显示效果。
 附图说明
图1为本申请显示面板的第一种结构图；
图2为本申请显示面板的第二种结构图；
图3为本申请显示面板的第三种结构图；
图4为本申请显示面板的第四种结构图；
图5为本申请显示面板的第五种结构图；
图6为本申请显示面板的第六种结构图。
 本发明的实施方式
为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
在现有LCD面板中，其通常利用双层显示屏来进行多维度的亮度调节。但是由于该方案需要四层偏光片进行对位调节，增加了产品的对位精度以及亮度的损失。为解决上述技术问题，本申请提出了下列技术方案：
请参阅图1~图6，本申请提供了一种显示面板100，所述显示面板100包括第一子显示面板10及位于所述第一子显示面板10一侧的第二子显示面板20，所述第一子显示面板10包括第一衬底11、位于所述第一衬底11上的驱动电路层12，所述驱动电路层12驱动所述第一子显示面板10或/和所述第二子显示面板20透光。
本申请通过将在显示面板100中设置一驱动电路层12，以及该驱动电路层12同时驱动相邻两层子显示面板100发光或透光，双层子显示面板100对光源的调节使得产品能进行多维度的亮度调节，提高了产品的显示效果。
现结合具体实施例对本申请的技术方案进行描述。
实施例一
在本申请的显示面板100中，所述第一子显示面板10或所述第二子显示面板20可以为液晶显示面板或OLED显示面板、Micro-LED显示面板等中的一种，本申请不作具体的限定。请参阅图1~图4，所述第一子显示面板10与所述第二子显示面板20均为液晶显示面板。
在本申请的显示面板100中，所述第一子显示面板10还可以包括位于所述驱动电路层12上的第一像素电极层13、位于所述第一像素电极层13上的第一液晶层14及位于所述第一液晶层14上的第一公共电极层15，所述第一像素电极层13与所述第一公共电极层15形成第一电场驱动所述第一液晶层14偏转。所述第一公共电极层15位于所述第一液晶层14远离所述驱动电路层12的一侧。
在本实施例中，所述第二子显示面板20可以包括位于所述第一衬底11上以及远离所述驱动电路层12一侧的第二液晶层21及位于所述第二液晶层21上第二公共电极层22，所述第一公共电极层15位于所述第二液晶层21远离所述驱动电路层12的一侧。
在本实施例中，所述驱动电极层还包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层30，所述第二像素电极层30与所述第二公共电极层22形成的第二电场驱动所述第二液晶层21偏转。
请参阅图1，所述第一衬底11的材料可以根据产品的刚性及柔性确定，例如玻璃、石英的刚性材料或者聚酰亚胺的柔性材料等，所述第一衬底11具体的材料本申请不作详细限定。
在本实施例中，所述驱动电路层12可以包括多个薄膜晶体管。所述薄膜晶体管可以为蚀刻阻挡型、背沟道蚀刻型或顶栅型薄膜晶体管等结构，具体没有限制。例如顶栅型薄膜晶体管可以包括位于所述第一衬底11上的遮光层121、位于所述遮光层121上的有源层122、位于所述有源层122上的栅极层123、位于所述栅极层123上的源漏极层124。其中，上述薄膜晶体管还包括位于遮光层121、有源层122、栅极层123、源漏极层124之间的绝缘层，此处不作详细介绍。
请参阅图1~图4，所述驱动电路层12还可以包括与所述遮光层121、所述有源层122、所述栅极层123、所述源漏极层124中的至少一者同层设置。
在本实施例中，所述第一像素电极层13、所述第二像素电极层30、所述第一公共电极层15、所述第二公共电极层22可以为ITO（Indium tin oxide，氧化铟锡）。
请参阅图1，所述第二像素电极层30可以与所述源漏极层124同层设置。
在本实施例中，可以在形成源漏极层124的工艺之后，进行所述第二像素电极层30的工艺，使得所述第二像素电极层30与源/漏极电连接。在所述显示面板100工作时，所述第一公共电极层15输入恒定的第一电压，所述第二公共电极层22输入恒定的第二电压，所述第一像素电极层13和所述第二像素电极由所述源/漏极输入相同的像素电压，所述第一电压与所述像素电压形成第一电场以驱动所述第一液晶层14偏转，所述第二电压与所述像素电压形成第二电场以驱动所述第二液晶层21偏转。
在本实施例中，所述源漏极层124的可以采用与所述第二像素电极层30相同的材料，即可以在形成所述源漏极层124的工艺中同时形成所述第二像素电极层30，去除了所述第二像素电极层30的工艺，简化了制程。
本申请通过一层驱动电路层12驱动两层液晶层的偏转，当背光源进入显示面板100时，所述第一液晶层14的偏转对背光源进行第一维度的亮度调节，所述第二液晶层21的偏转可以对背光源进行第二维度的亮度调节，第一维度与第二维度的叠加使得所述显示面板100可以实现更高维度的亮度调节，提高了显示面板100的效果。
请参阅图2，所述第二像素电极层30可以与所述有源层122同层设置。
在本实施例中，所述有源层122可以为包括沟道区1221及位于沟道区1221两侧的掺杂区1222，所述有源层122一侧的掺杂区1221所述第二像素电极层30电连接，将传输至源/漏极中的像素电压传输至所述第二像素电极层30及所述第一像素电极层13中，像素电压与第一电压或第二电压形成对应的电场驱动液晶分子偏转，从而实现显示面板100多维度的亮度调节。
在本实施例中，图2中的第二像素电极层30的结构较图1中的第二像素电极层30的结构与所述第二公共电极的间距更小，第二像素电极层30与第二公共电极层22之间的第二电压强度更大，更有利于通过所述驱动电路层12驱动第二液晶层21偏转。
请参阅图3，所述有源层122与所述第二像素电极层30非直接的电连接，所述源漏极层124通过过孔与所述第二像素电极层30电连接。由于有源层122与所述源漏极层124的间距较大，如果直接通过过孔进行源漏极层124与第二像素电极层30的电连接，该过孔的开口较大，增加了蚀刻难度。图3的结构通过在第二像素电极层30的边缘设置一导电块1231作为台阶，降低第二像素电极层30与源漏极层124的间距，减小对应接触过孔的开口大小。本实施例中位于第二像素电极层30上的导电块1231可以由单独工艺形成，或者在形成栅极层123工艺时直接在该区域形成一导电块1231，即该导电块1231与栅极层123在同一道光罩工艺中形成。
在本实施例中，所述第二像素电极层30还可以与更接近第二公共电极层22的遮光层121同层设置；或者，上述实施例中的任意两者或三者形成的叠加电极，本申请不作具体限定。
在本申请的显示面板100中，所述驱动电路层12还包括位于源漏极层124与所述第一像素电极层13之间的第三公共电极层16，所述第三公共电极层16与所述第一像素电极层13形成第三电场，所述第一电场与所述第三电场驱动所述第一液晶层14偏转。
以图1的结构为例，请参阅图4，所述第三公共电极层16可以位于源漏极层124与所述第一像素电极层13之间的绝缘层中，例如钝化层中，或者设置两层绝缘层，将第三公共电极层16位于两层不同的绝缘层之间等。
在本实施例，所述第三公共电极层16与所述第一像素电极层13形成第三电场，所述第三电场为横向电场，所述第一公共电极层15与所述第一像素电极层13形成的第一电场为垂直电场，垂直电场与横向电场的叠加形成新的驱动电场来驱动所述第一液晶层14中的液晶分子偏转。
在本申请上述实施例中，所述第一公共电极层15、所述第二公共电极层22及所述第三公共电极层16中的电压大小不作具体限定，三者可以相等或不等。
在上述图1~图4的结构中，本申请还可在任一子像素区域内设置两个薄膜晶体管。一个薄膜晶体管的源/漏极电连接所述第一像素电极层13，一个薄膜晶体管电连接所述第二像素电极层30，通过两个不同的薄膜晶体管向不同的像素电极层输入不同的像素电压，进而控制位于同一子像素内的两层液晶层中液晶分子进行不同角度的偏转，例如，第一液晶层14的驱动背光源亮度显示的灰阶为0~255，第二液晶层21驱动背光源亮度显示的灰阶为0~255，所述第一液晶层14与所述第二液晶层21的叠加使得所述显示面板100对于背光源亮度显示的灰阶为0~65535，从原来的8bit的图像数据变更为16bit的图像数据，显示面板100更加的细腻、精确。与图1~图4的结构相比，本实施例的结构相当于牺牲了部分的开口率从而换取了高维度的亮度调节。
在上述图1~图4的结构中，例如源极为像素电压输入端，漏极为像素电压的输出端，其可以将所述第二像素电极层30与所述源极电连接，所述第一像素电极层13与所述漏极电连接，以及在所述漏极的端口串联一分压模块，对输入至所述第一像素电极层13中的电压进行调节。本实施例可以通过一个薄膜晶体管进行不同的像素电压的输入，与上述实施例相比，在实现多维度亮度调节的前提下，保证了显示面板100的开口率。
在本申请的显示面板100中，所述显示面板100还包括位于所述第一子显示面板10与所述第二子显示面板20之间的第一偏光片层41、位于所述第一子显示面板10远离所述第二子显示面板20一侧的第二偏光片层42及位于所述第二子显示面板20远离所述第一子显示面板10一侧的第三偏光片层43。
请参阅图1~图4，由于本申请的结构为液晶显示面板，而进入液晶层的光线需要为偏振光线，因此在靠近背光源一侧的所述第二子显示面板20需要设置一偏光片。在第二子显示面板20中，可以包括第三偏光片层43、位于第三偏光片层43上的第三衬底24、位于第三衬底24上的第二公共电极层22、位于第二公共电极层22上的第二液晶层21、位于第二液晶层21上的所述第一偏光片层41，第三偏光片层43位于第一子显示面板10远离第一偏光片层41的一侧。
在上述实施例中，所述第二偏光片层42与第一公共电极层15之间还设置有第二衬底18。由于第三衬底24和第二衬底18位于所述显示面板100的两侧，所述第一衬底11位于所述第一子显示面板10及第二子显示面板20之间，为了进一步减小显示面板100的尺寸，以及增加第二像素电极层30对第二液晶层21的作用，本申请的所述第一衬底11的厚度小于所述第二衬底18或所述第三衬底24的厚度。或者，将所述第一衬底11设置成柔性衬底，所述第二衬底18及所述第三衬底24设置成刚性衬底。
在上述实施例中，所述显示面板还包括位于所述第一液晶层14两侧的第一配向层17及位于所述第二液晶层21两侧的第二配向层23，此处不作详细介绍。
请参阅图1~图4，所述显示面板100还包括位于所述第一子显示面板10内的彩膜层19。当所述第一子显示面板10为常规结构时，所述彩膜层19可以位于所述第一子显示面板10中靠近第一公共电极层15的一侧；当所述第一子显示面板10为COA（CF on Array，彩膜层19位于阵列层上）基板时，所述彩膜层19可以位于所述第一子显示面板10中靠近第一像素电极层13的一侧。例如，本申请的结构为常规显示面板100，所述彩膜层19可以包括至少三个色阻单元及位于相邻两个所述色阻单元之间的遮光层121。一所述色阻单元对应一所述像素单元。所述色阻单元可以为红色色阻、绿色色阻或蓝色色阻中的一者。相邻两个所述色阻单元之间设置有黑色遮光单元。
本申请通过将在显示面板100中设置一驱动电路层12，以及所述驱动电路层12同时驱动相邻两层液晶层的液晶分子偏转，实现两层液晶层对背光源进行亮度调节，实现显示面板100的多维度的亮度调节，提高了显示面板100的效果。
实施例二
本实施例与实施例一相同或相似，不同之处在于：
在本申请的显示面板100中，所述第一子显示面板10和所述第二子显示面板20中的一者为液晶显示面板，所述第一子显示面板10和所述第二子显示面板20中的另一者为OLED显示面板。
例如，如图5所示的结构，第二子显示面板20为液晶显示面板，第一子显示面板10为OLED显示面板，由于需要位于下层的液晶显示面板作为调光构件，因此所述第一子显示面板10为底发光OLED显示面板。如图6所示的结构，第一子显示面板10为液晶显示面板，第二子显示面板20为OLED显示面板，即相当于下层子显示面板100发光，上层子显示面板100为调光构件，则第二子显示面板20为倒置的底发光OLED显示面板，即该顶发光OLED显示面板的出光方向还是从阳极层一侧发出，仅仅将底发光OLED显示面板进行倒置形成顶发光。
请参阅图5，在本申请的显示面板100中，所述第一子显示面板10还包括位于所述驱动电路层12上的第一像素电极层13、位于所述第一像素电极层13上的第一发光层51、位于所述第一发光层51上的第一阴极反射层52以及与所述第一发光层51同层的像素定义层53。所述第二子显示面板20包括位于所述第一衬底11上以及远离所述驱动电路层12一侧的第二液晶层21及位于所述第二液晶层21上第二公共电极层22。
在本实施例中，所述驱动电极层还包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层30，所述第二像素电极层30与所述第二公共电极层22形成的第二电场驱动所述第二液晶层21偏转。
本实施例中的所述驱动电路层12及所述第二像素电极层30的结构可以参阅实施例一种的结构，此处不再详细赘述。
在本实施例中，所述第一像素电极层13相当于OLED显示面板中的阳极层，发光层发出的光线部分经过阳极层从出光侧导出，部分光线经过第一阴极反射层52从产品出光侧导出。
在本实施例中，由于进入液晶层的光线为偏振光，因此需要在第一子显示面板10与第二子显示面板20之间设置第一偏光片层41，以及在显示面板100的出光侧，即所述第二子显示面板20远离第一子显示面板10的一侧设置第四偏光片层44，所述第四偏光片层44相当于实施例一中的第三偏光片层43。
在本实施例中，位于所述第一阴极反射层52上的结构可以封装盖板层54，详细结构本申请不作具体介绍。
请参阅图6，在本申请的显示面板100中，所述第一子显示面板10还包括位于所述驱动电路层12上的第一像素电极层13、位于所述第一像素电极层13上的第一液晶层14及位于所述第一液晶层14上的第一公共电极层15，所述第一像素电极层13与所述第一公共电极层15形成第一电场驱动所述第一液晶层14偏转。
所述第二子显示面板20包括位于所述第一衬底11上以及远离所述驱动电路层12一侧的第二像素电极层30、位于所述第二像素电极层30上的第二发光层61、位于所述第二发光层61上的第二阴极反射层62。所述第二像素电极层30通过第一过孔与所述驱动电路层12中的源漏极层124或第一像素电极层13电连接。
在本实施例中，由于OLED显示面板位于所述显示面板100下层结构，第二阴极反射层62靠近第三衬底24，第二像素电极层30靠近第一衬底11设置。由于第二像素电极层30与驱动电路层12之间间隔了第一衬底11及第一偏光片层41，因此本实施例的结构需要在对应第一衬底11及第一偏光片层41中形成过孔结构，使得驱动电路层12中源/漏极输出的像素电压能够输入至第二像素电极层30中，第二像素电极层30的像素电压与第二阴极反射层62形成结构驱动第二发光层61发光。
在本实施例中，由于进入液晶层的光线为偏振光，因此需要在第一子显示面板10与第二子显示面板20之间设置第一偏光片层41，以及在显示面板100的出光侧，即所述第一子显示面板10远离第二子显示面板20的一侧设置第四偏光片层44，所述第四偏光片层44相当于实施例一中的第二偏光片层42。
本申请还提出了一种显示装置，其中，所述显示装置包括上述显示面板。当显示面板均为液晶显示面板时，所述显示装置可以包括位于显示面板一侧的本实施例中的所述显示装置的工作原理与上述显示面板的工作原理相同或相似，此处不再赘述。
本申请提出了一种显示面板及显示装置，该显示面板包括第一子显示面板及位于该第一子显示面板一侧的第二子显示面板，该第一子显示面板包括第一衬底、位于该第一衬底上的驱动电路层，该驱动电路层驱动该第一子显示面板或/和该第二子显示面板透光。本申请通过在显示面板中设置一驱动电路层，以及该驱动电路层同时驱动相邻两层子显示面板发光或透光，双层子显示面板对光源的调节使得产品能进行多维度的亮度调节，提高了产品的显示效果。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (20)

  1. 一种显示面板，其中，所述显示面板包括第一子显示面板及位于所述第一子显示面板一侧的第二子显示面板，所述第一子显示面板包括第一衬底、位于所述第一衬底上的驱动电路层，所述驱动电路层使所述第一子显示面板或/和所述第二子显示面板透光。
  2. 根据权利要求1所述的显示面板，其中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
    所述第二子显示面板包括位于所述第一衬底上、与所述第一衬底相对设置的第二公共电极层及位于所述第一衬底与所述第二公共电极层之间的第二液晶层；
    其中，所述驱动电极层包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
  3. 根据权利要求2所述的显示面板，其中，所述驱动电路层包括位于所述第一衬底上的遮光层、位于所述遮光层上的有源层、位于所述有源层上的栅极层、位于所述栅极层上的源漏极层，所述第二像素电极层与所述遮光层、所述有源层、所述栅极层、所述源漏极层中的至少一者同层设置。
  4. 根据权利要求3所述的显示面板，其中，所述驱动电路层还包括位于源漏极层与所述第一像素电极层之间的第三公共电极层，所述第三公共电极层与所述第一像素电极层形成第三电场。
  5. 根据权利要求3所述的显示面板，其中，所述显示面板还包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层、位于所述第一子显示面板远离所述第二子显示面板一侧的第二偏光片层及位于所述第二子显示面板远离所述第一子显示面板一侧的第三偏光片层。
  6. 根据权利要求1所述的显示面板，其中，所述第一子显示面板和所述第二子显示面板中的一者为液晶显示面板，所述第一子显示面板和所述第二子显示面板中的另一者为OLED显示面板。
  7. 根据权利要求6所述的显示面板，其中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一发光层、位于所述第一发光层上的第一阴极反射层；
    所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二液晶层及位于所述第二液晶层上第二公共电极层；
    其中，所述驱动电极层还包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
  8. 根据权利要求6所述的显示面板，其中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
    所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二像素电极层、位于所述第二像素电极层上的第二发光层、位于所述第二发光层上的第二阴极反射层；
    其中，所述第二像素电极层通过第一过孔与所述驱动电路层中的源漏极层或第一像素电极层电连接。
  9. 根据权利要求6所述的显示面板，其中，所述显示面板包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层以及位于所述第一子显示面板远离所述第二子显示面板一侧或所述第二子显示面板远离所述第一子显示面板一侧的第四偏光片层。
  10. 根据权利要求1所述的显示面板，其中，所述显示面板还包括位于所述第一子显示面板远离所述第二子显示面板一侧的第二衬底及位于所述第二子显示面板远离所述第一子显示面板一侧的第三衬底，所述第一衬底的厚度小于所述第二衬底或所述第三衬底的厚度。
  11. 一种显示装置，所述显示装置包括显示面板，其中，所述显示面板包括第一子显示面板及位于所述第一子显示面板一侧的第二子显示面板，所述第一子显示面板包括第一衬底、位于所述第一衬底上的驱动电路层，所述驱动电路层使所述第一子显示面板或/和所述第二子显示面板透光。
  12. 根据权利要求11所述的显示装置，其中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
    所述第二子显示面板包括位于所述第一衬底上、与所述第一衬底相对设置的第二公共电极层及位于所述第一衬底与所述第二公共电极层之间的第二液晶层；
    其中，所述驱动电极层包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
  13. 根据权利要求12所述的显示装置，其中，所述驱动电路层包括位于所述第一衬底上的遮光层、位于所述遮光层上的有源层、位于所述有源层上的栅极层、位于所述栅极层上的源漏极层，所述第二像素电极层与所述遮光层、所述有源层、所述栅极层、所述源漏极层中的至少一者同层设置。
  14. 根据权利要求13所述的显示装置，其中，所述驱动电路层还包括位于源漏极层与所述第一像素电极层之间的第三公共电极层，所述第三公共电极层与所述第一像素电极层形成第三电场。
  15. 根据权利要求13所述的显示装置，其中，所述显示面板还包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层、位于所述第一子显示面板远离所述第二子显示面板一侧的第二偏光片层及位于所述第二子显示面板远离所述第一子显示面板一侧的第三偏光片层。
  16. 根据权利要求11所述的显示装置，其中，所述第一子显示面板和所述第二子显示面板中的一者为液晶显示面板，所述第一子显示面板和所述第二子显示面板中的另一者为OLED显示面板。
  17. 根据权利要求16所述的显示装置，其中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一发光层、位于所述第一发光层上的第一阴极反射层；
    所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二液晶层及位于所述第二液晶层上第二公共电极层；
    其中，所述驱动电极层还包括与所述驱动电极层中至少一金属层同层设置的第二像素电极层，所述第二像素电极层与所述第二公共电极层形成的第二电场。
  18. 根据权利要求16所述的显示装置，其中，所述第一子显示面板还包括位于所述驱动电路层上的第一像素电极层、位于所述第一像素电极层上的第一液晶层及位于所述第一液晶层上的第一公共电极层，所述第一像素电极层与所述第一公共电极层形成第一电场；
    所述第二子显示面板包括位于所述第一衬底上以及远离所述驱动电路层一侧的第二像素电极层、位于所述第二像素电极层上的第二发光层、位于所述第二发光层上的第二阴极反射层；
    其中，所述第二像素电极层通过第一过孔与所述驱动电路层中的源漏极层或第一像素电极层电连接。
  19. 根据权利要求16所述的显示装置，其中，所述显示面板包括位于所述第一子显示面板与所述第二子显示面板之间的第一偏光片层以及位于所述第一子显示面板远离所述第二子显示面板一侧或所述第二子显示面板远离所述第一子显示面板一侧的第四偏光片层。
  20. 根据权利要求11所述的显示装置，其中，所述显示面板还包括位于所述第一子显示面板远离所述第二子显示面板一侧的第二衬底及位于所述第二子显示面板远离所述第一子显示面板一侧的第三衬底，所述第一衬底的厚度小于所述第二衬底或所述第三衬底的厚度。
PCT/CN2020/125130 2020-09-24 2020-10-30 显示面板及显示装置 Ceased WO2022062064A1 (zh)

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