WO2022057548A1

WO2022057548A1 - Battery protection circuit

Info

Publication number: WO2022057548A1
Application number: PCT/CN2021/112960
Authority: WO
Inventors: 李�杰; 白青刚; 杨小华
Original assignee: 深圳市创芯微微电子有限公司
Priority date: 2020-09-21
Filing date: 2021-08-17
Publication date: 2022-03-24
Also published as: CN112152288A

Abstract

Provided in the preset application is a battery protection circuit. A clamping circuit is added to an existing battery protection circuit. A first terminal of the clamping circuit is connected to a power supply voltage sampling point, a second terminal and a negative electrode of a battery are both connected to the ground, and a third terminal is connected to a loop current sampling point. The loop current sampling point is located at the negative electrode of a charging power supply or a load side. By means of the clamping circuit receiving electrical energy from the power supply voltage sampling point, a voltage value at the loop current sampling point is detected, and clamping processing is performed on the loop current sampling point when a negative high voltage occurs at the loop current sampling point, thus the problem of a low-voltage switch transistor being broken down by a negative high voltage, thereby damaging a chip is effectively solved. The high voltage resistance of a battery protection chip is achieved while using a low-voltage switch transistor, and the area and costs of a chip are reduced.

Description

A battery protection circuit

This application claims the priority of the Chinese patent application with the application number 202010995509.X and the invention titled "A Battery Protection Circuit" filed with the China Patent Office on September 21, 2020, the entire contents of which are incorporated into this application by reference .

technical field

The present application relates to the field of electronic technology, and in particular, to a battery protection circuit.

Background technique

The inventor found that the existing battery protection chip includes an over-discharge protection circuit and an over-charge protection circuit for detecting the battery voltage, a discharge over-current protection circuit, a charging over-current protection and a short-circuit protection circuit for detecting the loop current, and a charging and discharging switch tube. The on-off switch tube control module realizes the protection of battery charging and discharging. However, the switching tubes in the existing battery protection chips mainly use low-voltage MOS tubes, and the withstand voltage of the device is about 10V. The tube is damaged, so that the battery protection chip cannot work normally. Replacing the switch tube with a high-voltage tube will greatly increase the chip area and cost.

SUMMARY OF THE INVENTION

The present application provides a battery protection circuit to solve the problems that the existing battery protection circuit is easily broken down when using a low-voltage switch tube and damages the chip, and increases the chip area and cost when using a high-voltage switch tube

The present application is implemented in this way, a battery protection circuit, comprising:

Reference and bias circuit, voltage protection circuit, current protection circuit, delay circuit, switch control circuit, switch and clamp circuit;

The first end of the voltage protection circuit is connected to the power supply voltage sampling point, and the second end is connected to the first end of the delay circuit;

The first end of the current protection circuit is connected to the loop current sampling point, and the second end is connected to the second end of the delay circuit;

The second end of the delay circuit is connected to the first end of the switch control circuit;

The second end of the switch tube control circuit is connected to the gate of the switch tube;

The source and drain of the switch tube are connected in series in the charging and discharging loop between the battery and the charging power source or the load;

The first end of the clamping circuit is connected to the power supply voltage sampling point, the second end is connected to the ground with the negative electrode of the battery, and the third end is connected to the loop current sampling point;

The loop current sampling point is located at the negative pole of the charging power supply or the load side;

the reference and bias circuits are connected to the power supply voltage sampling point;

The reference and bias circuits are used to generate the bias voltage required by the voltage protection circuit and the bias current required by the current protection circuit; the voltage protection circuit is used to detect the power supply voltage, and when the power supply voltage is abnormal generating a detection inversion signal; the current protection circuit is used for detecting charging current and discharging current, and generating a detection inversion signal when the charging current and discharging current are abnormal; the delay circuit is used for delaying the detection inversion signal processing; the switch tube control circuit is used to generate a control signal according to the output signal of the delay circuit, and send the control signal to the switch tube to control the start or close of the switch tube; the clamp circuit is used to The loop current sampling point is clamped when a negative high voltage occurs at the loop current sampling point.

Optionally, when the clamp circuit operates, the voltage drop between the second end and the third end of the clamp circuit is less than the source-drain breakdown voltage of the switch tube.

Optionally, the clamping circuit includes an NMOS transistor and a diode string group, and the diode string group includes a plurality of diodes connected in series;

The drain of the NMOS tube is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the positive electrode of the diode string group;

The cathode of the diode string is connected to the loop current sampling point.

Optionally, the sum of the threshold voltage of the NMOS transistor and the turn-on voltages of the plurality of diodes is less than the source-drain breakdown voltage of the switching transistor.

Optionally, the clamping circuit includes an NMOS transistor string group, and the NMOS transistor string group includes several NMOS transistors connected in series;

Wherein, the source of each NMOS transistor is connected to the common junction between the drain and the gate of the next NMOS transistor;

The drain of the first NMOS transistor is connected to the power supply voltage sampling point, and the gate is connected to the ground with the negative electrode of the battery;

The source of the last NMOS transistor is connected to the loop current sampling point.

Optionally, the sum of the threshold voltages of the several NMOS transistors is less than the source-drain breakdown voltage of the switching transistors.

Optionally, the clamping circuit includes an NMOS transistor and a PMOS transistor string group, and the PMOS transistor string group includes a plurality of PMOS transistors connected in series;

The drain of the NMOS tube is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the source of the first PMOS tube in the PMOS tube string group;

In the PMOS transistor string group, the common junction between the gate and drain of each PMOS transistor is connected to the source of the next PMOS transistor, and the common junction between the gate and drain of the last PMOS transistor is connected to The loop current sampling point is connected.

Optionally, the sum of the threshold voltage of the NMOS transistor and the threshold voltages of the several PMOS transistors is less than the source-drain breakdown voltage of the switch transistor.

Optionally, the switch tube control circuit includes a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.

Optionally, the switch tube is an isolated MOSFET.

Optionally, the switch tube is a non-isolated MOSFET.

In the battery protection circuit provided by the present application, a clamp circuit is added to the existing battery protection circuit. The first end of the clamp circuit is connected to the power supply voltage sampling point, and the second end is connected to the ground with the negative electrode of the battery. , the third end is connected to the loop current sampling point, and the loop current sampling point is located at the negative pole of the charging power supply or the load side. Receive electrical energy from the power supply voltage sampling point through the clamping circuit, detect the voltage value on the loop current sampling point, and perform clamping processing on the loop current sampling point when a negative high voltage occurs at the loop current sampling point, Therefore, the problem that the low voltage switch tube is broken down by the negative high voltage and damage the chip is effectively solved, the high withstand voltage of the battery protection chip is realized while the low voltage switch tube is used, and the chip area and cost are reduced.

Description of drawings

In order to illustrate the technical solutions in the embodiments of the present application more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only for the present application. In some embodiments, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

FIG. 1 is a schematic diagram of a battery protection circuit provided by an embodiment of the present application;

2 is a schematic diagram of a switch tube in a battery protection circuit provided by an embodiment of the present application;

3 is a schematic diagram of a clamp circuit in a battery protection circuit provided by an embodiment of the present application;

4 is a schematic diagram of a clamp circuit in a battery protection circuit provided by another embodiment of the present application;

5 is a schematic diagram of a clamp circuit in a battery protection circuit provided by another embodiment of the present application;

FIG. 6 is an application schematic diagram of a battery protection circuit provided by another embodiment of the present application.

detailed description

In order to make the purpose, technical solutions and advantages of the present application more clearly understood, the present application will be described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.

FIG. 1 is a schematic diagram of a battery protection circuit provided by an embodiment of the present application. As shown in FIG. 1 , the battery protection circuit 1 includes a reference and bias circuit 10 , a voltage protection circuit 20 , a current protection circuit 30 , a delay circuit 40 , a switch control circuit 50 , a switch 60 and a clamp circuit 70 ;

The first end of the voltage protection circuit 20 is connected to the power supply voltage sampling point VDD, and the second end is connected to the first end of the delay circuit 40;

The first end of the current protection circuit 30 is connected to the loop current sampling point VM, and the second end is connected to the second end of the delay circuit 40;

The second end of the delay circuit 40 is connected to the first end of the switch control circuit 50;

The second end of the switch tube control circuit 50 is connected to the gate of the switch tube 60;

The source and drain of the switch tube 60 are connected in series in the charging and discharging loop between the battery and the charging power source or load;

The first end of the clamping circuit 70 is connected to the power supply voltage sampling point VDD, the second end and the negative electrode of the battery are connected to the ground VSS, and the third end is connected to the loop current sampling point VM;

The loop current sampling point VM is located at the negative pole of the charging power supply or the load side;

The reference and bias circuit 10 is connected to the power supply voltage sampling point VDD;

The reference and bias circuit 10 is used to generate the bias voltage required by the voltage protection circuit 20 and the bias current required by the current protection circuit 30; the voltage protection circuit 20 is used to detect the power supply voltage, and A detection inversion signal is generated when the voltage is abnormal; the current protection circuit 30 is used to detect the charging current and the discharging current, and generate a detection inversion signal when the charging current and the discharging current are abnormal; the delay circuit 40 is used for the The inversion signal is detected for delay processing; the switch control circuit 50 is used to generate a control signal according to the output signal of the delay circuit 40 , and send the control signal to the switch 60 to control the start of the switch 60 or off; the clamping circuit 70 is configured to perform clamping processing on the loop current sampling point VM when a negative high voltage occurs at the loop current sampling point VM.

Here, the reference and bias circuit 10 is connected to the power supply voltage sampling point VDD. The power supply voltage sampling point VDD is the voltage sampling point of the positive pole of the power supply of the battery protection chip. Applied to the battery protection chip, the power supply voltage sampling point VDD is the voltage sampling point after the positive electrode of the battery passes through a preset resistance, such as VDD as shown in FIG. 1 . The loop current sampling point VM is the current sampling point of the charging and discharging loop between the battery and the charging power source or the load. As shown in FIG. 1, VM is set at the negative electrode of the charging power source or the load side. The reference and bias circuit 10 obtains a voltage sample value of the chip power supply from the power supply voltage sample point VDD, and then generates a bias voltage and a bias current according to the voltage sample value. The bias voltage is the detection threshold of the voltage protection circuit 20 , and the bias current is the detection threshold of the current protection circuit 30 .

When the voltage protection circuit 20 is enabled, the power supply voltage is detected, and the power supply voltage is compared with the bias voltage to determine whether the battery is abnormally over-discharged or over-charged. When the power supply voltage is abnormal A detection toggle signal is generated. When the current protection circuit 30 is enabled, the charging current and the discharging current are detected, and the charging current and the discharging current are respectively compared with the corresponding bias current to judge whether the circuit is abnormally over-discharged, over-charged or short-circuited. And a detection inversion signal is generated when the charging current and the discharging current are abnormal. The delay circuit 40 performs delay processing on the detection inversion signal sent by the voltage protection circuit 20 or the current protection circuit 30 , and outputs the delayed detection inversion signal to the switch control circuit 50 . The switch control circuit 50 performs logic processing on the output signal of the delay circuit 40 to generate a control signal for the switch 60 . Wherein, the control signal is a switch signal of the switch tube 60 to control the start or stop of the switch tube 60 . The switch tube 60 is connected in series in the charging and discharging circuit between the battery and the charging power source or the load, and by controlling the start or shutdown of the switch tube 60, the voltage overcharge or overdischarge, loop overdischarge or overcharge or short circuit can be realized. Protect.

The clamping circuit 70 receives power from the power supply voltage sampling point VDD, detects the voltage information of the loop current sampling point VM, and clamps the loop current sampling point VM when a negative high voltage occurs at the loop current sampling point VM. bit processing. In this embodiment, when the clamping circuit 70 is working, the voltage drop between the second terminal and the third terminal is smaller than the source-drain breakdown voltage of the switch tube 60 . Since the second terminal of the clamping circuit 70 and the negative electrode of the battery are connected to the ground VSS, the absolute value of the voltage of the third terminal in the clamping circuit 70 is the voltage of the loop current sampling point VM. The absolute value is smaller than the breakdown voltage between the source electrode and the drain electrode of the switch tube 60, thereby preventing the source electrode and the drain electrode of the switch tube 60 from being broken down.

Exemplarily, for ease of understanding, a 5V low-voltage switch tube is used as an example for description below. The breakdown voltage VDS between the source and drain of the switch tube 60 is about 10V, and the battery voltage is 4V. When the battery protection chip is used normally, the potential on the loop current sampling point VM is close to the voltage VSS of the negative electrode of the battery, and the clamping circuit 70 does not work at this time. When the battery is connected to a high-voltage charger, such as a 20V charger, if the battery voltage is 4V, the voltage on the loop current sampling point VM is -16V high voltage. At this time, the three poles of the switch tube 60 The potential is shown in Figure 2, where VSS represents the drain, VM represents the source, and SW represents the gate. The voltage difference between the drain and the source of the switch tube 60 is 16V, which is greater than the breakdown voltage VDS between the source and drain electrodes, and the switch tube 60 will be broken down and burned without the clamping circuit 70 , the battery protection chip fails. In the embodiment of the present application, by introducing a clamping circuit 70 at the loop current sampling point VM, when a high-voltage charger is inserted, the negative voltage of the loop current sampling point VM is clamped, so that the absolute value of the negative voltage of the loop current sampling point VM is less than The breakdown voltage between the source and drain of the switch tube 60 is clamped to -4V, for example, and the voltage difference between the drain and the source of the switch tube 60 is 4V, which is much smaller than the difference between the source and the drain. The breakdown voltage VDS between. The switch 60 will not be damaged due to breakdown, and the battery protection chip can still work normally.

It can be seen that in the embodiment of the present application, the clamp circuit 70 is used to clamp the loop current sampling point VM when a negative high voltage occurs at the loop current sampling point VM. The high withstand voltage ensures the high withstand voltage and reliability of the chip while reducing the area and cost of the battery protection chip.

Optionally, as mentioned above, when the clamping circuit 70 is working, the voltage drop between the second terminal and the third terminal is less than the source-drain breakdown voltage VDS of the switching tube. As an embodiment, the clamping circuit 70 includes an NMOS transistor M1 and a diode string group, and the diode string group includes a plurality of diodes connected in series;

The drain of the NMOS transistor M1 is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the positive electrode of the diode string;

Here, when the clamping circuit 70 is working, the voltage drop between the gate of the NMOS transistor M1 and the negative electrode of the diode string is less than the source-drain breakdown voltage VDS of the switching transistor. The number of diodes in the diode string can be set according to the actual value of the source-drain breakdown voltage VDS of the switch, as long as the threshold voltage of the NMOS transistor and the turn-on voltage of the diodes are satisfied. and less than the source-drain breakdown voltage of the switch.

For ease of understanding, following the previous example, taking a 5V low-voltage switch as an example, it is assumed that the breakdown voltage VDS between the source and drain of the switch is about 10V, and the battery voltage is 4V. As shown in FIG. 3 , if the diode string group includes three diodes connected in series, they are denoted as a first diode D1 , a second diode D2 , and a third diode D3 . The drain of the NMOS transistor M1 is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the positive electrode of the first diode D1; the first The cathode of the diode D1 is connected to the anode of the second diode D2, the cathode of the second diode D2 is connected to the anode of the third diode D3, and the third diode D3 The negative pole of is connected to the loop current sampling point VM. The turn-on voltages of the NMOS transistor M1, the first diode D1, the second diode D2, and the third diode D3 are all 1V, 4V in total. When the battery protection chip is used normally, the potential on the loop current sampling point VM is close to the voltage VSS of the negative electrode of the battery. At this time, VM>VSS-4V, the NMOS transistor M1 and the diode string in the clamping circuit 70 are not connected to each other. on. When the battery is connected to a high-voltage charger, such as a 20V charger, VM=4-20=-16V, VSS-4V=-4V, VM<VSS-4V, the NMOS in the clamping circuit 70 The tube M1 and the diode string are turned on, and after the turn-on, the voltage of the loop current sampling point VM is forcibly pulled up to -4V, so that the voltage difference between the drain and the source of the switch tube is 4V, It is much smaller than the breakdown voltage VDS between the source and drain, which avoids the damage of the switch tube 60 . It should be understood that the above number of diodes is only a preferred example of the present application, and can be specifically set according to actual conditions.

As an embodiment, the clamping circuit 70 includes an NMOS transistor string group, and the NMOS transistor string group includes a plurality of NMOS transistors connected in series;

The drain of the first NMOS transistor is connected to the sampling point of the power supply voltage, and the gate is connected to the ground with the negative electrode of the battery.

Here, when the clamping circuit 70 is working, the voltage drop between the gate of the first NMOS transistor and the source of the last NMOS transistor is less than the source-drain breakdown voltage VDS of the switching transistor. The number of NMOS transistors in the NMOS transistor string group can be set according to the actual value of the source-drain breakdown voltage VDS of the switching transistors, as long as the sum of the threshold voltages of the NMOS transistors is less than the source of the switching transistors. leakage breakdown voltage.

For ease of understanding, following the previous example, taking a 5V low-voltage switch as an example, it is assumed that the breakdown voltage VDS between the source and drain of the switch is about 10V, and the battery voltage is 4V. As shown in FIG. 4 , if the NMOS transistor string group includes four NMOS transistors connected in series, they are denoted as a first NMOS transistor M1 , a second NMOS transistor M2 , a third NMOS transistor M3 , and a fourth NMOS transistor M4 . The drain of the first NMOS transistor M1 is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the drain and the gate of the second NMOS transistor M2. The source of the second NMOS transistor M2 is connected to the common contact between the drain and the gate of the third NMOS transistor M3; the source of the third NMOS transistor M3 is connected to the The common contact between the drain and the gate of the fourth NMOS transistor M4 is connected; the source of the fourth NMOS transistor M4 is connected to the loop current sampling point VM. The threshold voltages of the first NMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3, and the fourth NMOS transistor M4 are all 1V, 4V in total. When the battery protection chip is used normally, the potential on the loop current sampling point VM is close to the voltage VSS of the negative electrode of the battery, at this time VM>VSS-4V, the first NMOS transistor M1 and the second NMOS transistor in the clamping circuit 70 The NMOS transistor M2, the third NMOS transistor M3, and the fourth NMOS transistor M4 are all non-conductive. When the battery is connected to a high-voltage charger, such as a 20V charger, at this time VM=4-20=-16V, VSS-4V=-4V, VM<VSS-4V, the first voltage in the clamping circuit 70 An NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3, and a fourth NMOS transistor M4 are turned on, and after they are turned on, the voltage of the loop current sampling point VM is forcibly pulled up to -4V, so that the The voltage difference between the drain electrode and the source electrode of the switch tube is 4V, which is much smaller than the breakdown voltage VDS between the source and drain electrodes, which avoids the damage of the switch tube 60 . It should be understood that the above-mentioned number of NMOS transistors is only a preferred example of the present application, and can be specifically set according to actual conditions.

As an embodiment, the clamping circuit 70 includes an NMOS transistor and a PMOS transistor string group, and the PMOS transistor string group includes a plurality of PMOS transistors connected in series;

Here, when the clamping circuit 70 is working, the voltage drop between the gate of the NMOS transistor and the common junction of the gate and drain of the last PMOS transistor is less than the source-drain breakdown voltage VDS of the switch. The number of PMOS transistors in the PMOS transistor string group can be set according to the actual value of the source-drain breakdown voltage VDS of the switching transistors, as long as the threshold voltage of the NMOS transistors and the threshold value of the several PMOS transistors are satisfied. The sum of the voltages is less than the source-drain breakdown voltage of the switch tube.

For ease of understanding, following the previous example, taking a 5V low-voltage switch as an example, it is assumed that the breakdown voltage VDS between the source and drain of the switch is about 10V, and the battery voltage is 4V. As shown in FIG. 5 , the clamping circuit 70 includes an NMOS transistor M1 and a PMOS transistor string group. If the PMOS transistor string group includes three PMOS transistors connected in series, they are denoted as the first PMOS transistor M2 and the second PMOS transistor. The PMOS transistor M3 and the third PMOS transistor M4. The drain of the NMOS transistor M1 is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the source of the first PMOS transistor M2; the first The common junction between the gate and the drain of the PMOS transistor M2 is connected to the source of the second PMOS transistor M3; the common junction between the gate and the drain of the second PMOS transistor M3 is connected to the third The source of the PMOS transistor M4 is connected; the common junction between the gate and the drain of the third PMOS transistor M4 is connected to the loop current sampling point. The threshold voltages of the NMOS transistor M1, the first PMOS transistor M2, the second PMOS transistor M3, and the third PMOS transistor M4 are all 1V, 4V in total. When the battery protection chip is used normally, the potential on the loop current sampling point VM is close to the voltage VSS of the negative electrode of the battery, at this time VM>VSS-4V, the NMOS transistor M1 and the first PMOS transistor in the clamping circuit 70 M2, the second PMOS transistor M3, and the third PMOS transistor M4 are all non-conductive. When the battery is connected to a high-voltage charger, such as a 20V charger, VM=4-20=-16V, VSS-4V=-4V, VM<VSS-4V, the NMOS in the clamping circuit 70 The transistor M1, the first PMOS transistor M2, the second PMOS transistor M3, and the third PMOS transistor M4 are turned on, and after they are turned on, the voltage of the loop current sampling point VM is forcibly pulled up to -4V, thereby making the switching transistor The voltage difference between the drain and the source is 4V, which is much smaller than the breakdown voltage VDS between the source and the drain, which avoids damage to the switch tube 60 . It should be understood that the above-mentioned number of PMOS transistors is only a preferred example of the present application, and can be specifically set according to actual conditions.

Optionally, in this embodiment, the source and drain of the switch tube 60 are symmetrical. The substrate switching signal and the control signal output by the switch tube control circuit 50 are used to instruct the switch tube 60 to be turned on or off. Optionally, as shown in FIG. 6 , a schematic diagram of the application of the battery protection circuit provided in this embodiment is shown. After the battery passes through the preset resistor R4 and the preset capacitor C1, the power supply voltage VDD is provided to the battery protection circuit.

The switch control circuit 50 includes a logic circuit 51, a substrate switching circuit 52, and a gate control circuit 53;

The input end of the logic circuit 51 is connected to the second end of the delay circuit 40, the first output end is connected to the first end of the substrate switching circuit 52, and the second output end is connected to the gate control circuit The first end of 53 is connected;

The second end of the substrate switching circuit 52 is connected to the substrate of the switch tube;

The output end of the gate control circuit 53 is connected to the gate of the switch tube;

The logic circuit 51 is used to perform logic processing on the output signal of the delay circuit 40, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit 52, and generate a control signal, and send the substrate switching signal to the substrate switching circuit 52. The control signal is sent to the gate control circuit 53; the substrate switching circuit 52 is used to switch the substrate polarity of the switch tube 60 according to the substrate switching signal; the gate control circuit 53 uses The gate control signal is output to the switch tube 60 according to the control signal, so as to control the activation or shutdown of the gate of the switch tube 60 .

Here, after receiving the output signal of the delay circuit 40, the logic circuit 51 performs logic processing on the output signal, generates a substrate switching signal and sends it to the substrate switching circuit 52, and generates a control signal and sends it to the substrate switching circuit 52. sent to the gate control circuit 53 . The substrate switching circuit 52 switches the substrate polarity of the switching transistor 60 according to the substrate switching signal, so as to select the switching transistor 60 as an N-type substrate or a P-type substrate. The gate control circuit 53 controls the activation or deactivation of the gate of the switch tube 60 according to the control signal, so as to realize the protection of the charging and discharging of the battery.

Optionally, as a preferred example of the present application, as shown in FIG. 6 , the voltage protection circuit 20 includes a first resistor R1, a second resistor R2, a third resistor R3, an overdischarge protection circuit 21, and an overcharge protection circuit. twenty two;

The first end of the overdischarge protection circuit 21 is connected to the common contact between the first resistor R1 and the second resistor R2, and the second end is connected to the delay circuit 40;

The first end of the overcharge protection circuit 22 is connected to the common contact between the second resistor R2 and the third resistor R3, and the second end is connected to the delay circuit 40;

The other end of the first resistor R1 is connected to the power supply voltage sampling point; the other end of the third resistor R3 is connected to the ground with the negative electrode of the battery;

Wherein, the over-discharge protection circuit 21 is used to obtain the power supply voltage from the power supply voltage sampling point, and when the power supply voltage is less than the first voltage threshold, send a detection inversion signal to the delay circuit 40; the overcharge The protection circuit 22 is configured to obtain the power supply voltage from the power supply voltage sampling point, and send a detection inversion signal to the delay circuit 40 when the power supply voltage is greater than a second voltage threshold.

Here, the first voltage threshold is a discharge protection voltage threshold, which is a criterion for judging whether the battery is over-discharged. The second voltage threshold is a charging protection voltage threshold, which is a criterion for judging whether the battery is overcharged.

When the overdischarge protection circuit 21 is enabled, the power supply voltage is detected, and the power supply voltage is compared with the first voltage threshold to determine whether the battery is overdischarged, when the power supply voltage is less than the first voltage When the threshold value is reached, it is considered that the battery is over-discharged, and a detection inversion signal is generated and sent to the delay circuit 40 .

When the overcharge protection circuit 22 is enabled, the power supply voltage is detected, and the power supply voltage is compared with the second voltage threshold to determine whether the battery is overcharged. When the power supply voltage is greater than the second voltage When the threshold value is reached, it is considered that the battery is over-discharged, and a detection inversion signal is generated and sent to the delay circuit 40 .

Optionally, as a preferred example of the present application, as shown in FIG. 6 , the current protection circuit 30 includes a discharge overcurrent protection circuit 31 , a short circuit protection circuit 32 , and a charge overcurrent protection circuit 33 ;

The first ends of the discharge overcurrent protection circuit 31, the short circuit protection circuit 32, and the charging overcurrent protection circuit 33 are respectively connected to the loop current sampling point;

The second ends of the discharge overcurrent protection circuit 31 , the short circuit protection circuit 32 and the charging overcurrent protection circuit 33 are respectively connected to the delay circuit 40 ;

The discharge overcurrent protection circuit 31 is used to obtain the discharge current from the loop current sampling point, and send a detection inversion signal to the delay circuit 40 when the discharge current is greater than the first current threshold; the charging overcurrent The protection circuit 33 is used for obtaining the charging current from the loop current sampling point, and when the charging current is greater than the second current threshold, a detection inversion signal is sent to the delay circuit 40; The loop current sampling point acquires the short-circuit voltage, and sends a detection inversion signal to the delay circuit 40 when the short-circuit voltage is greater than the short-circuit protection voltage threshold.

Here, the first current threshold is the discharge protection current threshold, which is a criterion for judging whether the loop current is too large during the discharging process of the battery. The second current threshold is the charging protection current threshold, which is a criterion for judging whether the loop current is too large during the battery charging process. The short-circuit protection voltage threshold is a criterion for judging whether a short-circuit occurs during charging and discharging of the battery.

When the discharge overcurrent protection circuit 31 is enabled, the loop current is detected. In practical applications, the first current threshold value can be converted into the first protection voltage, and then the voltage value of the loop current sampling point VM can be obtained through the current detection resistor, and the voltage value can be compared with the first protection voltage. When the value is greater than the first protection voltage, it is considered that the loop current is greater than the first current threshold, and the loop current is too large during battery discharge, a detection inversion signal is generated and sent to the delay circuit 40 .

When the charging overcurrent protection circuit 33 is enabled, the loop current is detected. In practical applications, the second current threshold value can be converted into the second protection voltage, and then the voltage value of the loop current sampling point VM can be obtained through the current detection resistor, and the voltage value can be compared with the second protection voltage. When the value is less than the second protection voltage, it is considered that the loop current is greater than the second current threshold, and the loop current is too large during battery charging, and a detection inversion signal is generated and sent to the delay circuit 40 .

When the short-circuit protection circuit 32 is enabled, it is detected whether the battery is short-circuited. In practical applications, the short-circuit protection voltage threshold is preset, the voltage value of the loop current sampling point VM is obtained, and the voltage value is compared with the short-circuit protection voltage threshold. If the voltage value is smaller than the short-circuit protection voltage threshold, Then, it is considered that the battery is short-circuited, and a detection inversion signal is generated and sent to the delay circuit 40 .

The above-mentioned embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the above-mentioned embodiments, those of ordinary skill in the art should understand that: it can still be used for the above-mentioned implementations. The technical solutions described in the examples are modified, or some technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions depart from the spirit and scope of the technical solutions of the various embodiments of the application, and should be included in the within the scope of protection of this application.

Claims

A battery protection circuit, comprising:

Reference and bias circuit, voltage protection circuit, current protection circuit, delay circuit, switch control circuit, switch and clamp circuit;

The first end of the voltage protection circuit is connected to the power supply voltage sampling point, and the second end is connected to the first end of the delay circuit;

The first end of the current protection circuit is connected to the loop current sampling point, and the second end is connected to the second end of the delay circuit;

The second end of the delay circuit is connected to the first end of the switch control circuit;

The second end of the switch tube control circuit is connected to the gate of the switch tube;

The source and drain of the switch tube are connected in series in the charging and discharging loop between the battery and the charging power source or the load;

The first end of the clamping circuit is connected to the power supply voltage sampling point, the second end is connected to the ground with the negative electrode of the battery, and the third end is connected to the loop current sampling point;

The loop current sampling point is located at the negative pole of the charging power supply or the load side;

the reference and bias circuits are connected to the power supply voltage sampling point;

The reference and bias circuits are used to generate the bias voltage required by the voltage protection circuit and the bias current required by the current protection circuit; the voltage protection circuit is used to detect the power supply voltage, and when the power supply voltage is abnormal generating a detection inversion signal; the current protection circuit is used for detecting charging current and discharging current, and generating a detection inversion signal when the charging current and discharging current are abnormal; the delay circuit is used for delaying the detection inversion signal processing; the switch tube control circuit is used to generate a control signal according to the output signal of the delay circuit, and send the control signal to the switch tube to control the start or close of the switch tube; the clamp circuit is used for The loop current sampling point is clamped when a negative high voltage occurs at the loop current sampling point.
The battery protection circuit according to claim 1, wherein when the clamping circuit operates, the voltage drop between the second terminal and the third terminal thereof is smaller than the source-drain breakdown voltage of the switch tube.
The battery protection circuit of claim 2, wherein the clamping circuit comprises an NMOS transistor and a diode string group, and the diode string group comprises a plurality of diodes connected in series;

The drain of the NMOS tube is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the positive electrode of the diode string group;

The cathode of the diode string is connected to the loop current sampling point.
The battery protection circuit of claim 3, wherein the sum of the threshold voltage of the NMOS transistor and the turn-on voltages of the plurality of diodes is less than the source-drain breakdown voltage of the switch transistor.
The battery protection circuit according to claim 2, wherein the clamping circuit comprises an NMOS transistor string group, and the NMOS transistor string group comprises a plurality of NMOS transistors connected in series;

Wherein, the source of each NMOS transistor is connected to the common junction between the drain and the gate of the next NMOS transistor;

The drain of the first NMOS transistor is connected to the power supply voltage sampling point, and the gate is connected to the ground with the negative electrode of the battery;

The source of the last NMOS transistor is connected to the loop current sampling point.
The battery protection circuit of claim 5, wherein the sum of the threshold voltages of the plurality of NMOS transistors is less than the source-drain breakdown voltage of the switching transistors.
The battery protection circuit according to claim 2, wherein the clamping circuit comprises an NMOS transistor and a PMOS transistor string group, and the PMOS transistor string group comprises a plurality of PMOS transistors connected in series;

The drain of the NMOS tube is connected to the power supply voltage sampling point, the gate is connected to the ground with the negative electrode of the battery, and the source is connected to the source of the first PMOS tube in the PMOS tube string group;

In the PMOS transistor string group, the common junction between the gate and drain of each PMOS transistor is connected to the source of the next PMOS transistor, and the common junction between the gate and drain of the last PMOS transistor is connected to The loop current sampling point is connected.
The battery protection circuit according to claim 7, wherein the sum of the threshold voltage of the NMOS transistors and the threshold voltages of the plurality of PMOS transistors is less than the source-drain breakdown voltage of the switching transistors.
The battery protection circuit of claim 1, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 2, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 3, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 4, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 5, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 6, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 7, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 8, wherein the switch control circuit comprises a logic circuit, a substrate switching circuit, and a gate control circuit;

The input end of the logic circuit is connected to the second end of the delay circuit, the first output end is connected to the first end of the substrate switching circuit, and the second output end is connected to the first end of the gate control circuit end connection;

The second end of the substrate switching circuit is connected to the substrate of the switch tube;

The output end of the gate control circuit is connected to the gate of the switch tube;

The logic circuit is used to perform logic processing on the output signal of the delay circuit, generate a substrate switching signal, send the substrate switching signal to the substrate switching circuit, generate a control signal, and send the control signal to the substrate switching circuit. A signal is sent to the gate control circuit; the substrate switching circuit is used for switching the substrate polarity of the switch tube according to the substrate switching signal; the gate control circuit is used for outputting according to the control signal The gate control signal is sent to the switch tube to control the startup or shutdown of the gate of the switch tube.
The battery protection circuit of claim 1, wherein the switch is an isolated MOSFET.
The battery protection circuit of claim 1, wherein the switch is a non-isolated MOSFET.