CN214755515U - Battery protection chip and its protection circuit - Google Patents
Battery protection chip and its protection circuit Download PDFInfo
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- CN214755515U CN214755515U CN202023121200.2U CN202023121200U CN214755515U CN 214755515 U CN214755515 U CN 214755515U CN 202023121200 U CN202023121200 U CN 202023121200U CN 214755515 U CN214755515 U CN 214755515U
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Abstract
本实用新型提供一种电池保护芯片及其保护电路，保护电路包括第一保护模块和第二保护模块，第一保护模块用于对输入电压进行嵌位后得到第一电压，第二保护模块用于对第一电压进行嵌位后得到第二电压，并将第二电压输出电池检测模块。本实用新型通过设置第一保护模块和第二保护模块，将过高的尖峰电压钳位在芯片工艺的击穿电压以下，在不增加额外功耗和成本下实现了芯片不被尖峰电压损坏，提高了芯片的可靠性，解决了现有技术中为了避免尖峰电压击穿芯片采用高压工艺使得芯片面积和成本增加的问题。
The utility model provides a battery protection chip and a protection circuit thereof. The protection circuit comprises a first protection module and a second protection module. The first protection module is used for clamping an input voltage to obtain a first voltage, and the second protection module is used for The second voltage is obtained after clamping the first voltage, and the second voltage is output to the battery detection module. By arranging the first protection module and the second protection module, the utility model clamps the excessively high peak voltage below the breakdown voltage of the chip process, and realizes that the chip is not damaged by the peak voltage without increasing extra power consumption and cost. The reliability of the chip is improved, and the problem of increasing the chip area and cost by using a high-voltage process in order to avoid the breakdown of the chip by the peak voltage in the prior art is solved.
Description
Technical Field
The utility model relates to a battery protection technology field, in particular to battery protection chip and protection circuit thereof.
Background
Fig. 1 shows a basic structure block diagram of a conventional battery protection chip 10 in the prior art, which includes a battery detection module 11, a delay module 12 and a logic control module 13. The battery detection module 11 detects a battery voltage VDD, the delay module 12 delays an output signal of the battery detection module 11, an output of the delay module is used as an input of the logic control module 13, DO and CO signals are output after being processed by the logic control module 13, and the DO and the CO realize protection of battery charging and discharging by controlling an external switching tube.
According to the scheme, the 5V CMOS process is adopted, the voltage resistance of the device is about 10V generally, peak voltage of about 16V can be generated when short circuit occurs between VDD and VSS in the production test process, and a battery protection chip made of the 5V CMOS can be broken down by the peak voltage to cause damage to the chip. If a high-pressure process capable of resisting high pressure is adopted, the area and the cost of the chip are increased.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a battery protection chip and protection circuit thereof to solve among the prior art to avoid peak voltage to puncture the chip and adopt high-pressure technology to make chip area and cost increase's problem.
The embodiment of the utility model provides a first aspect provides a protection circuit of battery protection chip, protection circuit includes:
the first protection module is connected with the power supply input end at a first end, connected with the grounding end at a second end and used for clamping input voltage to obtain first voltage, and the first end of the first protection module is the input end of the battery protection chip;
and the first end of the second protection module is connected with the power input end of the first protection module, the second end of the second protection module is connected with the power input end of the battery protection chip, and the third end of the second protection module is connected with the grounding end and used for clamping the first voltage to obtain second voltage, and outputting the second voltage to the battery detection module.
The utility model discloses the second aspect provides a battery protection chip, battery protection chip includes:
the first end of the first protection module is an input end of the battery protection chip and is used for clamping an input voltage to obtain a first voltage;
the first end of the second protection module is connected with a power supply input end and the first end of the first protection module, the second end is a voltage output end, and the third end is connected with a grounding end and is used for clamping the first voltage to obtain a second voltage;
the input end of the battery detection module is connected with the second end of the second protection module and used for comparing the second voltage with a preset voltage and outputting a control signal comprising a comparison result;
the input end of the delay module is connected with the output end of the battery detection module and is used for delaying the control signal;
the input end of the logic control module is connected with the output end of the delay module, the first output end of the logic control module is connected with the substrate of the switch tube, and the second output end of the logic control module is connected with the grid electrode of the switch tube and used for outputting a first control signal and a second control signal according to the delayed control signal so as to control the switch tube.
The utility model discloses the third aspect provides a battery protection chip, battery protection chip includes:
the first end of the first protection module is an input end of the battery protection chip and is used for clamping an input voltage to obtain a first voltage;
the first end of the second protection module is connected with a power supply input end and the first end of the first protection module, the second end is a voltage output end, and the third end is connected with a grounding end and is used for clamping the first voltage to obtain a second voltage;
the input end of the battery detection module is connected with the second end of the second protection module and used for comparing the second voltage with a preset voltage and outputting a control signal comprising a comparison result;
the input end of the delay module is connected with the output end of the battery detection module and is used for delaying the control signal;
the input end of the logic control module is connected with the output end of the delay module and used for outputting a first control signal and a second control signal according to the delayed control signal;
the input end of the substrate switching module is connected with the first output end of the logic control module, the output end of the substrate switching module is connected with the substrate of the charge-discharge control switch tube, and the substrate switching module is used for receiving the first control signal and selecting the substrate of the charge-discharge control switch tube according to the first control signal;
and the input end of the grid control module is connected with the second output end of the logic control module, and the output end of the grid control module is connected with the grid of the charge and discharge control switch tube and is used for receiving the second control signal and controlling the charge and discharge control switch tube to be switched on or switched off according to the second control signal.
The utility model provides a battery protection chip and protection circuit thereof, protection circuit include first protection module and second protection module, and first protection module is used for obtaining first voltage after carrying out the clamping to input voltage, and second protection module is used for obtaining the second voltage after carrying out the clamping to first voltage to export the second voltage for battery detection module. The utility model discloses a set up first protection module and second protection module, with too high peak voltage clamp below the breakdown voltage of chip technology, realized under not increasing extra consumption and cost that the chip is not damaged by peak voltage, improved the reliability of chip, solved among the prior art in order to avoid peak voltage to puncture the chip and adopt high-pressure technology to make chip area and cost increase's problem.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the embodiments or the prior art descriptions will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a battery protection chip provided in the prior art;
fig. 2 is a schematic structural diagram of a battery protection chip according to a first embodiment of the present invention;
fig. 3 is a circuit diagram of a first protection module in a battery protection chip according to a first embodiment of the present invention;
fig. 4 is another circuit diagram of a first protection module in a battery protection chip according to an embodiment of the present invention;
fig. 5 is a circuit diagram of a second protection module in a battery protection chip according to a first embodiment of the present invention;
fig. 6 is a schematic structural diagram of a battery protection chip according to a third embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
An embodiment of the utility model provides a protection circuit of battery protection chip, as shown in fig. 2, protection circuit includes:
a first protection module 21, a first end of which is connected to the power input end, a second end of which is connected to the ground end, and is used for clamping the input voltage to obtain a first voltage, wherein the first end of the first protection module 21 is the input end of the battery protection chip;
and a first end of the second protection module 22 is connected with the power input end and the first end of the first protection module 21, a second end of the second protection module is connected with the battery detection module 11 of the battery protection chip 10, and a third end of the second protection module is connected with the grounding end, and is used for obtaining a second voltage after the first voltage is clamped and outputting the second voltage to the battery detection module 11.
The first protection module 21 is configured to clamp the peak voltage in the input voltage, and clamp the peak voltage at a clamping voltage VH (for example, VH is 12V), so as to clamp the peak voltage for the first time, and avoid the output peak voltage from being too high.
As a first embodiment, as shown in fig. 3, the first protection module 21 includes a MOS transistor Q1, a drain of the MOS transistor Q1 is a first end of the first protection module 21, and a gate and a source of the MOS transistor Q1 are connected in common to form a second end of the first protection module 21.
In fig. 3, the MOS transistor Q1 is a 12V high-voltage transistor, and the trigger voltage of the TLP curve is generally 15V, that is, when the peak voltage of VDD exceeds 15V, the MOS transistor Q1 starts to work in the negative resistance process in the TLP curve, and then clamps the peak voltage of VDD to about VH (about 13V).
As a second embodiment, as shown in fig. 4, the first protection module 21 includes a MOS transistor Q2 and a MOS transistor Q3, a drain of the MOS transistor Q2 is a first end of the first protection module 21, a gate and a source of the MOS transistor Q2 are connected to a drain of the MOS transistor Q2, and a gate and a source of the MOS transistor Q3 are connected to a second end of the first protection module 21.
The first protection module in fig. 4 is formed by connecting two ESD transistors of 5V in series, the trigger voltage of the TLP curve is generally 12V, when the peak voltage of VDD exceeds 12V, the MOS transistor Q1 and the MOS transistor Q2 start to operate in a negative resistance process, and then the peak voltage of VDD is clamped around VH (about 11V).
The second protection module 22 further clamps the clamping voltage output by the first protection module 21 to obtain a second voltage, and the second voltage is lower than (about 10V) of the breakdown voltage VBV (e.g., 6V) of the battery protection chip, so as to prevent the breakdown of the post-stage circuit, thereby effectively protecting the anti-spike voltage capability of the chip without increasing any extra power consumption, and improving the reliability of the chip.
As an embodiment, as shown in fig. 5, the second protection module 22 includes a resistor R1 and a MOS transistor Q4, a first end of the resistor R1 is a first end of the second protection module 22, a first end of the resistor R1 is connected to a drain of the MOS transistor Q4 to form a second end of the second protection module 22, and a gate and a source of the MOS transistor Q4 are connected to form a third end of the second protection module 22.
Wherein, the resistor R1 is used for current limiting, the MOS transistor Q4 is used for clamping, the MOS transistor Q4 is an NMOS transistor, since the first protection circuit has clamped the peak voltage of VDD around VH, the MOS transistor Q4 can use a common 5V NMOS transistor, the clamping voltage of which is generally around 6V, so the voltage of VDD0 is clamped around 6V, and the current I flowing through the resistor R1 is (VDD-VDD0)/R1, where VDD is the voltage clamped by the first protection module 21, VDD0 is the voltage clamped by the second protection module 22, and the voltage value must be lower than the breakdown voltage VBV (about 10V) of the 5V CMOS transistor, so only the width-to-length ratio of the MOS transistor Q4 needs to be selected reasonably, so that the current that can flow after the negative resistance process is greater than I, namely, the VDD0 can be clamped around 6V and is much lower than the breakdown voltage VBV (about 10V) of the post-stage circuit connected to the second protection module 22, therefore, even if the VDD end has high peak voltage, the chip can not be damaged after passing through the two-stage protection circuit.
The embodiment of the utility model provides a protection circuit of battery protection chip, protection circuit include first protection module 21 and second protection module 22, and first protection module 21 is used for obtaining first voltage after carrying out the clamping to input voltage, and second protection module 22 is used for obtaining the second voltage after carrying out the clamping to first voltage to export the second voltage for battery detection module. The utility model discloses a set up first protection module 21 and second protection module 22, with too high peak voltage clamp below the breakdown voltage of chip technology, realized under not increasing extra consumption and cost that the chip is not damaged by peak voltage, improved the reliability of chip, solved among the prior art in order to avoid peak voltage to puncture the chip and adopt high-pressure technology to make chip area and cost-push's problem.
The embodiment of the utility model provides a second provides a battery protection chip, as shown in figure 2, battery protection chip includes:
a first end of the first protection module 21 is connected to the power input end, a second end of the first protection module is connected to the ground end, and the first end of the first protection module 21 is an input end of the battery protection chip and is used for clamping an input voltage to obtain a first voltage;
a first end of the second protection module 22 is connected to the power input end and the first end of the first protection module 21, a second end is a voltage output end, and a third end is connected to a ground end, and is used for clamping the first voltage to obtain a second voltage;
a battery detection module 11, an input end of which is connected to a second end of the second protection module 22, for comparing the second voltage with a preset voltage and outputting a control signal including a comparison result;
a delay module 12, the input end of which is connected to the output end of the battery detection module 11, for delaying the control signal;
the input end of the logic control module 13 is connected to the output end of the delay module 12, the first output end of the logic control module is connected to the substrate of the switch tube, and the second output end of the logic control module is connected to the gate of the switch tube, and the logic control module is configured to output a first control signal and a second control signal according to the delayed control signal to control the switch tube.
The first protection module 21 clamps the peak voltage of the input voltage at a clamping voltage VH (for example, VH is 12V), so as to clamp the peak voltage for the first time, and avoid the peak voltage from being too high.
The second protection module 22 further clamps the clamping voltage output by the first protection module 21 to obtain a second voltage, and the second voltage is lower than (about 10V) of the breakdown voltage VBV (e.g., 6V) of the battery protection chip, so as to prevent the breakdown of the post-stage circuit, thereby effectively protecting the anti-spike voltage capability of the chip without increasing any extra power consumption, and improving the reliability of the chip.
The battery detection module 11 includes an over-discharge protection circuit and an over-charge protection circuit for detecting the battery voltage, and compares different reference voltages with the second voltage to perform discharge over-current protection, short-circuit protection and charge over-current protection on the chip, for example, when the second voltage is greater than the upper limit protection voltage, the output end turns off the control signal to control the circuit to turn off.
The delay module 12 delays an output signal of the battery detection module 11, an output of the delay module 12 is used as an input of the logic control module 13, and the output of the delay module 13 outputs control signals DO and CO after being processed by the logic control module 13, and the control signals DO and CO realize protection of battery charging and discharging by controlling an external switching tube.
As for the first protection module 21, as a first embodiment, as shown in fig. 3, the first protection module 21 includes a MOS transistor Q1, a drain of the MOS transistor Q1 is a first end of the first protection module 21, and a gate and a source of the MOS transistor Q1 are connected in common to form a second end of the first protection module 21.
In fig. 3, the MOS transistor Q1 is a 12V high-voltage transistor, and the trigger voltage of the TLP curve is generally 15V, that is, when the peak voltage of VDD exceeds 15V, the MOS transistor Q1 starts to work in the negative resistance process of the TLP curve, and then clamps the VDD voltage to about VH (about 13V).
As a second embodiment, as shown in fig. 4, the first protection module 21 includes a MOS transistor Q2 and a MOS transistor Q3, a drain of the MOS transistor Q2 is a first end of the first protection module 21, a gate and a source of the MOS transistor Q2 are connected to a drain of the MOS transistor Q2, and a gate and a source of the MOS transistor Q3 are connected to a second end of the first protection module 21.
The first protection module in fig. 4 is formed by connecting two ESD transistors of 5V in series, the trigger voltage of the TLP curve is generally 12V, when the peak voltage of VDD exceeds 12V, the MOS transistor Q1 and the MOS transistor Q2 start to operate in a negative resistance process, and then the peak voltage of VDD is clamped around VH (about 11V).
The second protection module 22 further clamps the clamping voltage output by the first protection module 21 to obtain a second voltage, and the second voltage is lower than (about 10V) of the breakdown voltage VBV (e.g., 6V) of the battery protection chip, so as to prevent the breakdown of the post-stage circuit, thereby effectively protecting the anti-spike voltage capability of the chip without increasing any extra power consumption, and improving the reliability of the chip.
As an embodiment of the second protection module 22, as shown in fig. 5, the second protection module 22 includes a resistor R1 and a MOS transistor Q4, a first end of the resistor R1 is a first end of the second protection module 22, a first end of the resistor R1 is commonly connected to a drain of the MOS transistor Q4 and forms a second end of the second protection module 22, and a gate and a source of the MOS transistor Q4 are commonly connected to form a third end of the second protection module 22.
Wherein, the resistor R1 is used for current limiting, the MOS transistor Q4 is used for clamping, since the first protection circuit has clamped the peak voltage of VDD around VH, the MOS transistor Q4 can use a common 5V NMOS transistor, the clamping voltage of which is generally around 6V, so the voltage of VDD0 is clamped around 6V, and the current I flowing through the resistor R1 is (VDD-VDD0)/R1, where VDD is the voltage clamped by the first protection module 21, VDD0 is the voltage clamped by the second protection module 22, and the voltage value must be lower than the breakdown voltage VBV (about 10V) of the 5V CMOS transistor, so the width-length ratio of the MOS transistor Q4 only needs to be selected reasonably, so that the current flowing after the negative resistance process is larger than I, VDD0 can be clamped around 6V and is much lower than the breakdown voltage VBV (about 10V) of the post-stage circuit connected to the second protection module 22, therefore, even though the VDD end has a very high peak voltage, the chip can not be damaged after passing through the two-stage protection circuit.
The embodiment of the utility model provides a battery protection chip, protection circuit includes first protection module 21, second protection module 22, battery detection module 11, time delay module 12, logic control module 13, substrate switching module 14, first protection module 21 is used for obtaining first voltage after carrying out the clamping to input voltage, second protection module 22 is used for obtaining second voltage after carrying out the clamping to first voltage, and export second voltage for battery protection chip, battery detection module 11 compares second voltage with preset voltage, and output the control signal including the comparison result; the delay module 12 is used for delaying the control signal; the logic control module 13 outputs a first control signal and a second control signal according to the delayed control signal to control the switching tube; the utility model discloses a set up first protection module 21 and second protection module 22, with too high peak voltage clamp below the breakdown voltage of chip technology, realized under not increasing extra consumption and cost that the chip is not damaged by peak voltage, improved the reliability of chip, solved among the prior art in order to avoid peak voltage to puncture the chip and adopt high-pressure technology to make chip area and cost-push's problem.
The third embodiment of the present invention provides a battery protection chip, as shown in fig. 6, the battery protection chip includes:
a first end 21 of the first protection module is connected to the power input end, a second end of the first protection module is connected to the ground end, and the first end 21 of the first protection module is an input end of the battery protection chip and is used for clamping an input voltage to obtain a first voltage;
a first end of the second protection module 22 is connected to the power input end and the first end of the first protection module 21, a second end is a voltage output end, and a third end is connected to a ground end, and is used for clamping the first voltage to obtain a second voltage;
a battery detection module 11, an input end of which is connected to a second end of the second protection module 22, for comparing the second voltage with a preset voltage and outputting a control signal including a comparison result;
a delay module 12, the input end of which is connected to the output end of the battery detection module 11, for delaying the control signal;
a logic control module 13, an input end of which is connected to the output end of the delay module 12, and configured to output a first control signal and a second control signal according to the delayed control signal;
the substrate switching module 14 and the charge-discharge control switch tube M1 have input ends connected to the first output end of the logic control module 13, and output ends connected to the substrate of the charge-discharge control switch tube M1, and are configured to receive a first control signal and select the substrate of the charge-discharge control switch tube M1 according to the first control signal;
and the input end of the grid control module 15 is connected with the second output end of the logic control module 13, and the output end of the grid control module is connected with the grid of the charge and discharge control switch tube, and the grid control module is used for receiving a second control signal and controlling the charge and discharge control switch tube to be switched on or switched off according to the second control signal.
The first protection module 21 clamps the peak voltage of the input voltage at a clamping voltage VH (for example, VH is 12V), so as to clamp the peak voltage for the first time, and avoid the peak voltage from being too high.
The second protection module 22 further clamps the clamping voltage output by the first protection module 21 to obtain a second voltage, and the second voltage is lower than (about 10V) of the breakdown voltage VBV (e.g., 6V) of the battery protection chip, so as to prevent the breakdown of the post-stage circuit, thereby effectively protecting the anti-spike voltage capability of the chip without increasing any extra power consumption, and improving the reliability of the chip.
The battery detection module 11 includes an over-discharge protection circuit and an over-charge protection circuit for detecting the battery voltage, and a discharge over-current protection circuit, a short-circuit protection circuit and a charge over-current protection circuit for comparing different reference voltages with the second voltage, for example, when the second voltage is greater than the upper limit protection voltage, the control circuit is controlled to be turned off by the output-end turn-off control signal.
The delay module 12 delays an output signal of the battery detection module, an output of the delay module is used as an input of the logic control module 13, and the output signals are processed by the logic control module 13 to output control signals DO and CO.
The substrate switching module 14 determines the substrate selection switching of the charge/discharge control switch M1 through the substrate switching circuit.
The gate control module 15 determines the on/off state of the charge/discharge control switch M1, and outputs a high level or a low level to the charge/discharge control switch to control the charge/discharge control switch M1 to turn on or off.
The third embodiment is different from the second embodiment in that a substrate switching module 14 and a gate control module 15 are added, so that accurate control of the charge and discharge control switch tube is realized.
The foregoing is a more detailed description of the present invention, taken in conjunction with the specific preferred embodiments thereof, and it is not intended that the invention be limited to the specific embodiments shown and described. For those skilled in the art to which the invention pertains, equivalent substitutions or obvious modifications may be made without departing from the spirit of the invention, and the same properties or uses are deemed to fall within the scope of the invention as defined by the claims as filed.
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| CN112769113A (en) * | 2020-12-22 | 2021-05-07 | 深圳市创芯微微电子有限公司 | Battery protection chip and protection circuit thereof |
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Address after: Building 3A28, Smart Home Phase II, No. 76 Baohe Avenue, Baolong Community, Baolong Street, Longgang District, Shenzhen City, Guangdong Province, 518000 Patentee after: Shenzhen Chuangxin Microelectronics Co.,Ltd. Address before: 518116 Room 401, block a, Longgang smart home, 76 Baohe Avenue, Baolong community, Baolong street, Longgang District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN CHUANGXINWEI MICROELECTRONICS Co.,Ltd. |
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Address after: Building 3A28, Smart Home Phase II, No. 76 Baohe Avenue, Baolong Community, Baolong Street, Longgang District, Shenzhen City, Guangdong Province, 518000 Patentee after: SHENZHEN CHUANGXINWEI MICROELECTRONICS Co.,Ltd. Country or region after: China Address before: 28th Floor, 3A2, Smart Home Phase II, 76 Baohe Avenue, Baolong Community, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Chuangxin Microelectronics Co.,Ltd. Country or region before: China |