WO2022048641A1 - 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置 - Google Patents

一种嵌入式多媒体卡eMMC的数据信号处理方法和装置 Download PDF

Info

Publication number
WO2022048641A1
WO2022048641A1 PCT/CN2021/116468 CN2021116468W WO2022048641A1 WO 2022048641 A1 WO2022048641 A1 WO 2022048641A1 CN 2021116468 W CN2021116468 W CN 2021116468W WO 2022048641 A1 WO2022048641 A1 WO 2022048641A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
cmd
data
write
value
Prior art date
Application number
PCT/CN2021/116468
Other languages
English (en)
French (fr)
Inventor
胡国振
Original Assignee
广州小鹏汽车科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 广州小鹏汽车科技有限公司 filed Critical 广州小鹏汽车科技有限公司
Priority to EP21863703.1A priority Critical patent/EP4141683A1/en
Publication of WO2022048641A1 publication Critical patent/WO2022048641A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4072Drivers or receivers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/02Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
    • G01R29/027Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values
    • G01R29/0276Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values the pulse characteristic being rise time
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2825Testing of electronic circuits specially adapted for particular applications not provided for elsewhere in household appliances or professional audio/video equipment
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4265Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus

Definitions

  • the present invention relates to the technical field of signal processing, in particular to a data signal processing method and device of an embedded multimedia card eMMC.
  • eMMC embedded Multi Media Card
  • MMC Multi Media Card
  • main controller main controller.
  • CLK Lock, clock signal
  • CMD Common, bidirectional command and response signal
  • DATA Data, bidirectional data signal
  • the read and write timing parameters can be measured with the help of the oscilloscope's consistency analysis software.
  • the oscilloscope's consistency analysis software integrates the function of logic analysis. It can judge whether the current direction of the DATA signal is read or write by analyzing the CLK signal and the CMD signal. This method needs to measure 3 signals (CLK, CMD, DATA) at the same time, which is more troublesome, and the optional parts of the oscilloscope's compliance analysis software need to be purchased additionally, and the price is relatively expensive.
  • embodiments of the present invention are proposed to provide a data signal processing method for an embedded multimedia card eMMC that overcomes the above problems or at least partially solves the above problems.
  • the embodiment of the present invention also provides a data signal processing device of an embedded multimedia card eMMC, so as to ensure the implementation of the above method.
  • an embodiment of the present invention discloses a data signal processing method for an embedded multimedia card eMMC, wherein the eMMC is connected to a preset electronic chip, and the method includes:
  • Tr value of the CMD write signal and the CMD read signal from the first DATA signal and the second DATA signal, determine the DATA write signal and the DATA read signal;
  • the DATA write signal and the DATA read signal are separated.
  • determining the DATA write signal and the DATA read signal from the first DATA signal and the second DATA signal according to the Tr value of the CMD write signal and the CMD read signal including:
  • Tr value of the CMD write signal is larger than the Tr value of the CMD read signal, from the Tr values of the first DATA signal and the second DATA signal, determine that the larger value is the DATA write signal , the smaller value is the DATA read signal;
  • Tr value of the CMD read signal is larger than the Tr value of the CMD write signal, among the Tr values of the first DATA signal and the second DATA signal, it is determined that the larger value is the DATA read signal , the smaller value is the DATA write signal.
  • the determining of the CMD write signal and the CMD read signal in the first CMD signal and the second CMD signal includes:
  • the second CMD signal is a CMD read signal.
  • the separating the DATA write signal and the DATA read signal includes:
  • the DATA write signal and the DATA read signal are separated by slope triggering with an oscilloscope, and the DATA write signal and the DATA read signal are obtained respectively.
  • An embodiment of the present invention also provides a data signal processing device for an embedded multimedia card eMMC, where the eMMC is connected to a preset electronic chip, and the device includes:
  • a signal acquisition module for acquiring the first CMD signal and the second CMD signal transmitted between the eMMC and the preset electronic chip, and for acquiring the first CMD signal transmitted between the eMMC and the preset electronic chip a DATA signal and a second DATA signal;
  • a CMD signal determination module configured to determine a CMD write signal and a CMD read signal in the first CMD signal and the second CMD signal;
  • a signal detection module for detecting the Tr value of the CMD write signal and the CMD read signal, and for detecting the Tr value of the first DATA signal and the second DATA signal;
  • a DATA signal determination module for determining a DATA write signal and a DATA read signal from the first DATA signal and the second DATA signal according to the Tr value of the CMD write signal and the CMD read signal;
  • a DATA signal separation module configured to separate the DATA write signal and the DATA read signal.
  • the DATA signal determination module includes:
  • the first DATA signal determination submodule is configured to, when the Tr value of the CMD write signal is larger than the Tr value of the CMD read signal, from the Tr values of the first DATA signal and the second DATA signal, It is determined that the larger value is the DATA write signal, and the smaller value is the DATA read signal;
  • the second DATA signal determination submodule is configured to, when the Tr value of the CMD read signal is larger than the Tr value of the CMD write signal, in the Tr values of the first DATA signal and the second DATA signal, It is determined that the larger value is the DATA read signal, and the smaller value is the DATA write signal.
  • the CMD signal determination module includes:
  • a first CMD signal determination submodule configured to determine that the first CMD signal is a CMD write signal when the second bit in the frame structure of the first CMD signal is 1;
  • a second CMD signal determination submodule configured to determine that the first CMD signal is a CMD read signal when the second bit in the frame structure of the first CMD signal is 0;
  • a third CMD signal determination submodule configured to determine that the second CMD signal is a CMD write signal when the second bit in the frame structure of the second CMD signal is 1;
  • the fourth CMD signal determination sub-module is configured to determine that the second CMD signal is a CMD read signal when the second bit in the frame structure of the second CMD signal is 0.
  • the DATA signal separation module includes:
  • the first DATA signal separation submodule is used to separate the DATA write signal
  • the second DATA signal separation sub-module is used for separating the DATA read signal.
  • Embodiments of the present invention also provide an electronic device including a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors.
  • one or more programs include a data signal processing method for executing the embedded multimedia card eMMC according to any one of the embodiments of the present invention.
  • the embodiment of the present invention further provides a readable storage medium, when the instructions in the storage medium are executed by the processor of the electronic device, the electronic device can execute the embedded multimedia card according to any one of the embodiments of the present invention
  • the data signal processing method of eMMC is not limited to any one of the embodiments of the present invention.
  • the embodiments of the present invention include the following advantages:
  • the first CMD signal and the second CMD signal transmitted between the eMMC and the preset electronic chip can be acquired, and the first CMD signal transmitted between the eMMC and the preset electronic chip can be acquired.
  • DATA signal and second DATA signal determine the CMD write signal and CMD read signal in the first CMD signal and the second CMD signal; then detect the Tr value of the CMD write signal and the CMD read signal, and after detecting the Tr value of the first DATA signal and the second DATA signal, according to the Tr value of the CMD write signal and the CMD read signal, from the first DATA signal and the second DATA signal
  • the DATA write signal and the DATA read signal are determined; finally, the DATA write signal and the DATA read signal are separated.
  • the embodiment of the present invention does not need to analyze the content of the data to judge the direction of the DATA signal through the logic analysis of the paid consistency analysis software, and has the advantages of simplicity, speed and low cost.
  • Fig. 1 is the step flow chart of the data signal processing method of a kind of embedded multimedia card eMMC of the present invention
  • Fig. 2 is the simplified circuit diagram of the eMMC signal of the present invention
  • Fig. 3 is the schematic diagram of the frame structure of the CMD signal of the present invention.
  • Fig. 4 is the schematic diagram of the Tr value of the detection CMD write signal of the present invention.
  • Fig. 5 is the schematic diagram of the Tr value of the detection CMD read signal of the present invention.
  • Fig. 6 is the schematic diagram of the Tr value of the detection first DATA signal of the present invention.
  • Fig. 7 is the schematic diagram of the Tr value of the detection second DATA signal of the present invention.
  • Fig. 8 is the step flow chart that the present invention separates DATA write signal and DATA read signal by the slope trigger function of oscilloscope;
  • Fig. 9 is the separation effect diagram of the DATA write signal of the present invention.
  • Fig. 10 is the separation effect diagram of the DATA read signal of the present invention.
  • FIG. 11 is a structural block diagram of a data signal processing device of an embedded multimedia card eMMC according to the present invention.
  • FIG. 1 there is shown a flow chart of the steps of a data signal processing method for an embedded multimedia card eMMC of the present invention, where the eMMC is connected to the preset electronic chip, and the method may specifically include the following steps:
  • Step 102 acquiring the first bidirectional command and response signal CMD signal and the second bidirectional command and response signal CMD signal transmitted between the eMMC and the preset electronic chip, and acquiring the eMMC and the preset electronic chip
  • the first bidirectional data signal DATA signal and the second bidirectional data signal DATA signal are transmitted between.
  • the preset electronic chip may include, but is not limited to, a CPU (Central Processing Unit, central processing unit), a GPU (Graphics Processing Unit, graphics processor), a communication baseband, and the like.
  • eMMC and the CPU perform signal transmission, and both the eMMC and the CPU include CLK, The three signals of CMD and DATA, wherein, the CLK signal is unidirectional, and both the CMD signal and the DATA signal are bidirectional.
  • Step 104 Determine a CMD write signal and a CMD read signal in the first CMD signal and the second CMD signal.
  • the first CMD signal and the second CMD signal are bidirectional command and response signals, and the first CMD signal and the second CMD signal are a complete CMD signal of one frame, wherein the complete CMD signal of one frame includes Command sending and return signal, in this embodiment of the present invention, the direction of command sending is that the CPU sends to the eMMC, and the direction of the return signal is that the eMMC returns to the CPU.
  • the CMD write signal and the CMD read signal can be determined according to the frame structure of the first CMD signal and the second CMD signal.
  • step 102 may include the following sub-steps:
  • Sub-step S1042 when the second bit in the frame structure of the first CMD signal is 1, determine that the first CMD signal is a CMD write signal;
  • content in the frame structure of the first CMD signal represents that the CPU sends a signal to the eMMC, and it is determined that the first CMD signal is a CMD write signal.
  • Sub-step S1044 when the second bit in the frame structure of the first CMD signal is 0, determine that the first CMD signal is a CMD read signal;
  • content in the frame format of the first CMD signal represents a signal returned by the eMMC to the CPU, and it is determined that the first CMD signal is a CMD read signal.
  • content in the frame structure of the second CMD signal represents that the CPU sends a signal to the eMMC, and it is determined that the second CMD signal is a CMD write signal.
  • content in the frame format of the second CMD signal represents the signal returned by the eMMC to the CPU, and it is determined that the second CMD signal is a CMD read signal.
  • those skilled in the art usually judge the direction of the CMD signal of the eMMC through the optional eMMC consistency analysis software in the oscilloscope.
  • the principle is to judge the CMD write signal and the CMD read signal according to the message of the CMD signal.
  • the message of the CMD signal is CMD17 and CMD18, it indicates that the current operation is a read operation; when the message of the CMD signal is CMD30 and CMD31, it indicates that the current operation is a write operation, but the consistency analysis software needs to purchase additional options to analyze
  • the message of the CMD signal is relatively expensive.
  • the CMD write signal and the CMD read signal are determined by the frame structure of the first CMD signal and the second CMD signal, and the embodiment of the present invention does not require additional purchase of optional components to parse the CMD
  • the direction of the CMD signal of the eMMC is judged by the message of the signal, which has the advantage of saving cost.
  • Step 106 Detect the rise time Tr value of the CMD write signal and the CMD read signal, and detect the rise time Tr value of the first DATA signal and the second DATA signal.
  • the rise time of the output signal of different chips is different, and the direction of the signal can be judged according to the difference in the rise time of the signal.
  • eMMC and CPU are two different chips, and the output signal of eMMC is a read signal.
  • the output signal of the CPU is a write signal. Specifically, when the CPU sends an instruction signal to the eMMC, the CPU writes the eMMC.
  • the output signal of the CPU is a write signal
  • the The input signal of the eMMC is a write signal
  • the CPU reads the eMMC
  • the output signal of the eMMC is a read signal
  • the input signal of the CPU is read signal.
  • FIG. 4 a schematic diagram of detecting the Tr value of the CMD write signal of the present invention is shown.
  • FIG. 5 a schematic diagram of detecting the Tr value of the CMD read signal of the present invention is shown.
  • the waveform 1062 is the CMD write signal
  • the waveform 1064 is the CMD read signal
  • the waveform 1066 is the transition of the signal direction. A partial magnified view of .
  • the rise time of the pulse signal refers to the interval between two instants when the instantaneous value of the pulse first reaches the predetermined lower limit and the predetermined upper limit. Unless otherwise specified, the lower and upper limits are set at 10% and 90% of the pulse peak amplitude, respectively.
  • the rise time refers to the time from the zero time of the response curve to the first reaching the steady-state value, which is usually defined as the time required for the response curve to rise from 10% of the steady-state value to 90% of the steady-state value.
  • FIG. 6 there is shown a schematic diagram of detecting the Tr value of the first DATA signal according to the present invention.
  • FIG. 7 a schematic diagram of detecting the Tr value of the second DATA signal according to the present invention is shown.
  • the waveforms of the two directions of the DATA signal are superimposed together, the waveform 1068 is the waveform of the first DATA signal, and the waveform 1070 is the waveform of the second DATA signal. Since the DATA signal does not have a frame structure such as the CMD signal, the direction of the DATA signal cannot be judged from the frame structure of the DATA signal alone. Therefore, the embodiment of the present invention needs to determine the DATA write signal and the DATA read signal from the first DATA signal and the second DATA signal.
  • the rise time of the pulse signal refers to the interval between two instants when the instantaneous value of the pulse first reaches the predetermined lower limit and the predetermined upper limit. Unless otherwise specified, the lower and upper limits are set at 10% and 90% of the pulse peak amplitude, respectively.
  • the rise time refers to the time from the zero time of the response curve to the first reaching the steady-state value, which is usually defined as the time required for the response curve to rise from 10% of the steady-state value to 90% of the steady-state value.
  • Step 108 Determine a DATA write signal and a DATA read signal from the first DATA signal and the second DATA signal according to the Tr value of the CMD write signal and the CMD read signal.
  • the Tr value of the CMD write signal and the CMD read signal has a corresponding relationship with the Tr value of the DATA write signal and the DATA read signal.
  • This corresponding relationship is jointly determined by two aspects.
  • the pins of the signal and the DATA signal belong to the same type of IO interface, so the CMD signal and the DATA signal have the same input and output characteristics.
  • the hardware peripheral circuit design of the chip and the PCB design have the same characteristics, such as wiring. Equal length, 50 ⁇ impedance design, parallel traces, etc. Therefore, the embodiment of the present invention determines the DATA write signal and the DATA read signal according to the corresponding relationship.
  • step 108 may include the following sub-steps:
  • Sub-step S1082 when the Tr value of the CMD write signal is larger than the Tr value of the CMD read signal, from the Tr values of the first DATA signal and the second DATA signal, determine that the larger value is the specified value.
  • Described DATA write signal numerical value is the described DATA read signal;
  • Sub-step S1084 when the Tr value of the CMD read signal is larger than the Tr value of the CMD write signal, among the Tr values of the first DATA signal and the second DATA signal, determine that the larger value is the specified value.
  • the DATA read signal, and the smaller value is the DATA write signal.
  • the Tr value of the write signal is large.
  • the larger value is the second DATA signal, and the smaller value is the first DATA signal, thus it is determined that the first DATA signal is the DATA write signal and the second DATA signal read signal for the DATA.
  • the input and output directions of the DATA signal need to be determined, so that the measurement items in the input and output directions can be accurately measured.
  • the DATA write signal and the DATA read signal need to be determined in the actual measurement.
  • the measurement items of the DATA write signal and the DATA read signal are accurately measured.
  • the conformance analysis software of the oscilloscope integrates the function of logic analysis, which can analyze the CLK signal by analyzing the software. and the CMD signal to determine whether the current DATA signal is read or written, but the consistency analysis software needs to measure the three signals of CLK, CMD, and DATA at the same time, which is more troublesome, and the embodiment of the present invention does not need to be analyzed by the logic analysis of the consistency analysis software.
  • the content of the data is used to determine the direction of the DATA signal.
  • the rise time Tr values of the CMD write signal and the CMD read signal are detected, and the first DATA signal and the CMD read signal are detected.
  • the rise time Tr value of the second DATA signal is determined according to the corresponding relationship between the Tr values of the CMD write signal and the CMD read signal and the Tr values of the DATA write signal and the DATA read signal.
  • the embodiment of the present invention does not need to analyze the content of the data through the logical analysis of the consistency analysis software to determine the direction of the DATA signal, which has the advantages of convenience and speed.
  • Step 110 separate the DATA write signal and the DATA read signal.
  • the slope trigger is to set the oscilloscope to trigger on the positive slope or negative slope of the specified time.
  • the slope time setting range is 20ns to 10s. When the signal meets the set conditions, the sampling will be triggered. You can select the key to adjust the LEVEL A , LEVEL B, or adjust LEVEL A and LEVEL B at the same time.
  • step 110 may include the following sub-steps:
  • Sub-step S1102 performing slope triggering on an oscilloscope to separate the DATA write signal and the DATA read signal, and obtain the DATA write signal and the DATA read signal respectively.
  • sub-step 1102 may include the following sub-steps:
  • Sub-step S11022 click the Trigger button of the RS RTO2044 oscilloscope to display the interface of the trigger event;
  • Sub-step S11024 setting the trigger type to slope trigger
  • Sub-step S11026 set the rising edge trigger
  • Sub-step S11028 select the high and low level as the slope measurement interval
  • Sub-step S11030 select a preset slope value
  • Sub-step S11032 select whether it is greater than or less than the slope trigger
  • Sub-step S11034 select the trigger type as Normal
  • Sub-step S11036 click the run button to start separating the read and write directions of the DATA signal.
  • the separation effect diagram of the DATA write signal of the present invention is shown; with reference to FIG. 10 , the separation effect diagram of the DATA read signal of the present invention is shown.
  • the embodiment of the present invention performs slope triggering through an oscilloscope to separate the DATA write signal and the DATA read signal.
  • the first CMD signal and the second CMD signal transmitted between the eMMC and the preset electronic chip can be acquired, and the first CMD signal transmitted between the eMMC and the preset electronic chip can be acquired.
  • DATA signal and second DATA signal determine the CMD write signal and CMD read signal in the first CMD signal and the second CMD signal; then detect the Tr value of the CMD write signal and the CMD read signal, and after detecting the Tr value of the first DATA signal and the second DATA signal, according to the Tr value of the CMD write signal and the CMD read signal, from the first DATA signal and the second DATA signal
  • the DATA write signal and the DATA read signal are determined; finally, the DATA write signal and the DATA read signal are separated.
  • the embodiment of the present invention does not need to analyze the content of the data to judge the direction of the DATA signal through the logic analysis of the paid consistency analysis software, and has the advantages of simplicity, speed and low cost.
  • An embodiment of the present invention also provides a data signal processing device for an embedded multimedia card eMMC, characterized in that the eMMC is connected to a preset electronic chip, and the device includes:
  • FIG. 11 a structural block diagram of a data signal processing device of an embedded multimedia card eMMC of the present invention is shown, which may specifically include the following modules:
  • the signal acquisition module 1102 is used for acquiring the first CMD signal and the second CMD signal transmitted between the eMMC and the preset electronic chip, and for acquiring the signal transmitted between the eMMC and the preset electronic chip. the first DATA signal and the second DATA signal;
  • a CMD signal determination module 1104 configured to determine a CMD write signal and a CMD read signal in the first CMD signal and the second CMD signal;
  • a signal detection module 1106, configured to detect the Tr value of the CMD write signal and the CMD read signal, and to detect the Tr value of the first DATA signal and the second DATA signal;
  • the DATA signal determination module 1108 is used to determine the DATA write signal and the DATA read signal from the first DATA signal and the second DATA signal according to the Tr value of the CMD write signal and the CMD read signal;
  • a DATA signal separation module 1110 configured to separate the DATA write signal and the DATA read signal.
  • the DATA signal determination module 1108 includes:
  • the first DATA signal determination submodule is configured to, when the Tr value of the CMD write signal is larger than the Tr value of the CMD read signal, from the Tr values of the first DATA signal and the second DATA signal, It is determined that the larger value is the DATA write signal, and the smaller value is the DATA read signal;
  • the second DATA signal determination submodule is configured to, when the Tr value of the CMD read signal is larger than the Tr value of the CMD write signal, in the Tr values of the first DATA signal and the second DATA signal, It is determined that the larger value is the DATA read signal, and the smaller value is the DATA write signal.
  • the CMD signal determination module 1104 includes:
  • a first CMD signal determination submodule configured to determine that the first CMD signal is a CMD write signal when the second bit in the frame structure of the first CMD signal is 1;
  • a second CMD signal determination submodule configured to determine that the first CMD signal is a CMD read signal when the second bit in the frame structure of the first CMD signal is 0;
  • a third CMD signal determination submodule configured to determine that the second CMD signal is a CMD write signal when the second bit in the frame structure of the second CMD signal is 1;
  • the fourth CMD signal determination sub-module is configured to determine that the second CMD signal is a CMD read signal when the second bit in the frame structure of the second CMD signal is 0.
  • the DATA signal separation module 1110 includes:
  • the first DATA signal separation submodule is used to separate the DATA write signal
  • the second DATA signal separation sub-module is used for separating the DATA read signal.
  • the first CMD signal and the second CMD signal transmitted between the eMMC and the preset electronic chip can be acquired, and the first CMD signal transmitted between the eMMC and the preset electronic chip can be acquired.
  • DATA signal and second DATA signal determine the CMD write signal and CMD read signal in the first CMD signal and the second CMD signal; then detect the Tr value of the CMD write signal and the CMD read signal, and after detecting the Tr value of the first DATA signal and the second DATA signal, according to the Tr value of the CMD write signal and the CMD read signal, from the first DATA signal and the second DATA signal
  • the DATA write signal and the DATA read signal are determined; finally, the DATA write signal and the DATA read signal are separated.
  • the embodiment of the present invention does not need to analyze the content of the data to determine the direction of the DATA signal through logical analysis of the paid consistency analysis software, and has the advantages of simplicity, speed, and low cost.
  • Embodiments of the present invention also provide an electronic device including a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors.
  • one or more programs include a data signal processing method for executing the embedded multimedia card eMMC according to any one of the embodiments of the present invention.
  • the embodiment of the present invention also provides a readable storage medium, when the instructions in the storage medium are executed by the processor of the electronic device, the electronic device can execute the embedded multimedia card according to any one of the embodiments of the present invention
  • the data signal processing method of eMMC is not limited to:
  • embodiments of the embodiments of the present invention may be provided as a method, an apparatus, or a computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
  • computer-usable storage media including, but not limited to, disk storage, CD-ROM, optical storage, etc.
  • Embodiments of the present invention are described with reference to flowcharts and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the present invention. It will be understood that each flow and/or block in the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing terminal equipment to produce a machine that causes the instructions to be executed by the processor of the computer or other programmable data processing terminal equipment Means are created for implementing the functions specified in the flow or flows of the flowcharts and/or the blocks or blocks of the block diagrams.
  • These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal equipment to operate in a particular manner, such that the instructions stored in the computer readable memory result in an article of manufacture comprising instruction means, the The instruction means implement the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multimedia (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

本发明实施例提供一种嵌入式多媒体卡eMMC的数据信号处理方法和装置,该方法包括:获取eMMC与预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及获取eMMC与预设电子芯片之间传输的第一DATA信号和第二DATA信号;确定第一CMD信号和第二CMD信号中的CMD写信号和CMD读信号;检测CMD写信号和CMD读信号的Tr值,以及检测第一DATA信号和第二DATA信号的Tr值;根据CMD写信号和CMD读信号的Tr值,从第一DATA信号和第二DATA信号中,确定出DATA写信号和DATA读信号;分离DATA写信号和DATA读信号。本发明实施例不需要通过一致性分析软件的逻辑分析去解析数据的内容来判断DATA信号的方向,具有简单快捷,成本低的优点。

Description

一种嵌入式多媒体卡eMMC的数据信号处理方法和装置
本申请要求在2020年09月03日提交中国专利局、申请号202010917560.9、发明名称为“一种嵌入式多媒体卡eMMC的数据信号处理方法和装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及信号处理技术领域,特别是涉及一种嵌入式多媒体卡eMMC的数据信号处理方法和装置。
背景技术
eMMC(Embedded Multi Media Card,嵌入式多媒体卡)由一个嵌入式存储解决方案组成,带有MMC(Multi Media Card,多媒体卡)接口、快闪存储器设备及主控制器。eMMC中CLK信号(Clock,时钟信号)是单向的,CMD信号(Command,双向命令和响应信号)和DATA信号(Data,双向数据信号)都是双向的。在实际测量中需要确定DATA信号的输入和输出方向,才能准确的测量出输入和输出方向的测量项目。
当前借助示波器的一致性分析软件可以测量读写时序参数,示波器的一致性分析软件内集成了逻辑分析的功能,可以通过解析CLK信号和CMD信号来判断DATA信号的当前方向是读还是写,但是这种方法需要同时测量3个信号(CLK,CMD,DATA),比较麻烦,而且示波器的一致性分析软件的选配件需要额外购买,价格比较昂贵。
发明内容
鉴于上述问题,提出了本发明实施例以便提供一种克服上述问题或者至少部分地解决上述问题的一种嵌入式多媒体卡eMMC的数据信号处理方法。
本发明实施例还提供了一种嵌入式多媒体卡eMMC的数据信号处理装置,以保证上述方法的实施。
为了解决上述问题,本发明实施例公开了一种嵌入式多媒体卡eMMC 的数据信号处理方法,所述eMMC与预设电子芯片连接,所述方法包括:
获取所述eMMC与所述预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及获取所述eMMC与所述预设电子芯片之间传输的第一DATA信号和第二DATA信号;
确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;
检测所述CMD写信号和所述CMD读信号的Tr值,以及检测所述第一DATA信号和所述第二DATA信号的Tr值;
根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;
分离所述DATA写信号和所述DATA读信号。
可选地,所述根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号,包括:
当所述CMD写信号的Tr值比所述CMD读信号的Tr值大时,从所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA写信号,数值小的为所述DATA读信号;
当所述CMD读信号的Tr值比所述CMD写信号的Tr值大时,在所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA读信号,数值小的为所述DATA写信号。
可选地,所述确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号,包括:
当所述第一CMD信号的帧结构中的第二位为1时,确定所述第一CMD信号为CMD写信号;
当所述第一CMD信号的帧结构中的第二位为0时,确定所述第一CMD信号为CMD读信号;
当所述第二CMD信号的帧结构中的第二位为1时,确定所述第二CMD信号为CMD写信号;
当所述第二CMD信号的帧结构中的第二位为0时,确定所述第二CMD信号为CMD读信号。
可选地,所述分离所述DATA写信号和所述DATA读信号,包括:
通过示波器进行斜率触发分离所述DATA写信号和所述DATA读信号,分别获得所述DATA写信号和所述DATA读信号。
本发明实施例还提供了一种嵌入式多媒体卡eMMC的数据信号处理装置,所述eMMC与预设电子芯片连接,所述装置包括:
信号获取模块,用于获取所述eMMC与所述预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及用于获取所述eMMC与所述预设电子芯片之间传输的第一DATA信号和第二DATA信号;
CMD信号确定模块,用于确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;
信号检测模块,用于检测所述CMD写信号和所述CMD读信号的Tr值,以及用于检测所述第一DATA信号和所述第二DATA信号的Tr值;
DATA信号确定模块,用于根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;
DATA信号分离模块,用于分离所述DATA写信号和所述DATA读信号。
可选地,所述DATA信号确定模块,包括:
第一DATA信号确定子模块,用于当所述CMD写信号的Tr值比所述CMD读信号的Tr值大时,从所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA写信号,数值小的为所述DATA读信号;
第二DATA信号确定子模块,用于当所述CMD读信号的Tr值比所述CMD写信号的Tr值大时,在所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA读信号,数值小的为所述DATA写信号。
可选地,所述CMD信号确定模块,包括:
第一CMD信号确定子模块,用于当所述第一CMD信号的帧结构中的第二位为1时,确定所述第一CMD信号为CMD写信号;
第二CMD信号确定子模块,用于当所述第一CMD信号的帧结构中的第二位为0时,确定所述第一CMD信号为CMD读信号;
第三CMD信号确定子模块,用于当所述第二CMD信号的帧结构中的第二位为1时,确定所述第二CMD信号为CMD写信号;
第四CMD信号确定子模块,用于当所述第二CMD信号的帧结构中的第二位为0时,确定所述第二CMD信号为CMD读信号。
可选地,所述DATA信号分离模块,包括:
第一DATA信号分离子模块,用于分离所述DATA写信号;
第二DATA信号分离子模块,用于分离所述DATA读信号。
本发明实施例还提供了一种电子设备,包括有存储器,以及一个或者一个以上的程序,其中一个或者一个以上程序存储于存储器中,且经配置以由一个或者一个以上处理器执行所述一个或者一个以上程序包含用于执行如本发明实施例任一所述的嵌入式多媒体卡eMMC的数据信号处理方法。
本发明实施例还提供了一种可读存储介质,当所述存储介质中的指令由电子设备的处理器执行时,使得电子设备能够执行如本发明实施例任一所述的嵌入式多媒体卡eMMC的数据信号处理方法。
与现有技术相比,本发明实施例包括以下优点:
本发明实施例中,可以获取所述eMMC与所述预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及获取所述eMMC与所述预设电子芯片之间传输的第一DATA信号和第二DATA信号;然后确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;接着检测所述CMD写信号和所述CMD读信号的Tr值,以及检测所述第一DATA信号和所述第二DATA信号的Tr值之后,根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;最后分离出所述DATA写信号和所述DATA读信号。本发明实施例不需要通过付费的一致性分析软件的逻辑分析去解析数据的内容来判断DATA信号的方向,具有简单快捷,成本低的优点。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是本发明的一种嵌入式多媒体卡eMMC的数据信号处理方法的步骤流程图;
图2是本发明的eMMC信号简化的线路图;
图3是本发明的CMD信号的帧结构的示意图;
图4是本发明的检测CMD写信号的Tr值的示意图;
图5是本发明的检测CMD读信号的Tr值的示意图;
图6是本发明的检测第一DATA信号的Tr值的示意图;
图7是本发明的检测第二DATA信号的Tr值的示意图;
图8是本发明通过示波器的斜率触发功能分离DATA写信号和DATA读信号的步骤流程图;
图9是本发明的DATA写信号的分离效果图;
图10是本发明的DATA读信号的分离效果图;
图11是本发明的一种嵌入式多媒体卡eMMC的数据信号处理装置的结构框图。
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂,下面结合附图和具体实施方式对本发明作进一步详细的说明。
参照图1,示出了本发明的一种嵌入式多媒体卡eMMC的数据信号处理方法的步骤流程图,所述eMMC与所述预设电子芯片连接,该方法具体可以包括如下步骤:
步骤102,获取所述eMMC与所述预设电子芯片之间传输的第一双向命令和响应信号CMD信号和第二双向命令和响应信号CMD信号,以及获取所述eMMC与所述预设电子芯片之间传输的第一双向数据信号DATA信号和第二双向数据信号DATA信号。
在本发明实施例中,所述预设电子芯片可以包括但不限于CPU(Central Processing Unit,中央处理器)、GPU(Graphics Processing Unit,图形处理器)、通信基带等。
参照图2,示出本发明的eMMC信号简化的线路图,在本发明实施例的一种实际应用中,所述eMMC与所述CPU进行信号传输,所述eMMC与所述CPU都包括CLK、CMD、DATA这三种信号,其中,所述CLK信号是单向的,所述CMD信号和所述DATA信号都是双向的。
步骤104,确定所述第一CMD信号和所述第二CMD信号中的CMD写 信号和CMD读信号。
所述第一CMD信号和所述第二CMD信号是双向命令和响应信号,所述第一CMD信号和所述第二CMD信号为1帧完整的CMD信号,其中,1帧完整的CMD信号包含命令发送和返回信号,在本发明实施例中,命令发送的方向是所述CPU向所述eMMC发送,返回信号的方向是所述eMMC向所述CPU返回。本发明实施例可以通过所述第一CMD信号和所述第二CMD信号的帧结构来判断所述CMD写信号和所述CMD读信号。
具体地,参考图3,示出本发明的CMD信号的帧结构的示意图,步骤102可以包括以下子步骤:
子步骤S1042,当所述第一CMD信号的帧结构中的第二位为1时,确定所述第一CMD信号为CMD写信号;
当所述第一CMD信号的帧结构中的第二位为1时,所述第一CMD信号的帧结构中content代表所述CPU向所述eMMC发送信号,确定所述第一CMD信号为CMD写信号。
子步骤S1044,当所述第一CMD信号的帧结构中的第二位为0时,确定所述第一CMD信号为CMD读信号;
当所述第一CMD信号的帧结构中的第二位为0时,所述第一CMD信号的帧格式中content代表所述eMMC向所述CPU返回信号,确定所述第一CMD信号为CMD读信号。
子步骤S1046,当所述第二CMD信号的帧结构中的第二位为1时,确定所述第二CMD信号为CMD写信号;
当所述第二CMD信号的帧结构中的第二位为1时,所述第二CMD信号的帧结构中content代表所述CPU向所述eMMC发送信号,确定所述第二CMD信号为CMD写信号。
子步骤S1048,当所述第二CMD信号的帧结构中的第二位为0时,确定所述第二CMD信号为CMD读信号。
当所述第二CMD信号的帧结构中的第二位为0时,所述第二CMD信号的帧格式中content代表所述eMMC向所述CPU返回信号,确定所述第二CMD信号为CMD读信号。
在现有技术中,本领域技术人员通常通过示波器中选配的eMMC一致性分析软件来判断eMMC的CMD信号的方向,其原理是根据CMD信号的 报文判断CMD写信号和CMD读信号,当CMD信号的报文是CMD17和CMD18时,表示当前操作是读操作;当CMD信号的报文是CMD30和CMD31时,表示当前操作是写操作,然而一致性分析软件的需要额外购买选配件来解析CMD信号的报文,价格比较昂贵。
在本发明实施例中,通过所述第一CMD信号和所述第二CMD信号的帧结构来判断所述CMD写信号和所述CMD读信号,本发明实施例不需要另外购买选配件解析CMD信号的报文来判断eMMC的CMD信号的方向,具有节省成本的优点。
步骤106,检测所述CMD写信号和所述CMD读信号的上升时间Tr值,以及检测所述第一DATA信号和所述第二DATA信号的上升时间Tr值。
不同的芯片其输出信号的上升时间是不同的,可以根据信号上升时间的区别来判断信号的方向,在本发明实施例中,eMMC与CPU是两种不同的芯片,eMMC的输出信号是读信号,CPU的输出信号是写信号,具体来说,当所述CPU向所述eMMC发送指令信号时,所述CPU写入所述eMMC,此时,所述CPU的输出信号是写信号,所述eMMC的输入信号是写信号;当所述eMMC向所述CPU返回指令信号时,所述CPU读入所述eMMC,此时,所述eMMC的输出信号是读信号,所述CPU的输入信号是读信号。
参照图4,示出本发明的检测CMD写信号的Tr值的示意图。参照图5,示出本发明的检测CMD读信号的Tr值的示意图。在本发明实施例中,波形1062是所述CMD写信号,波形1064是所述CMD读信号,波形1066是信号方向的过渡,其中,波形10622是波形1062的局部放大图,波形10642是波形1064的局部放大图。
需要说明的是,脉冲信号的上升时间是指脉冲瞬时值最初到达规定下限和规定上限的两瞬时之间的间隔。除另有规定之外,下限和上限分别定为脉冲峰值幅度的10%和90%。在控制领域中,上升时间是指响应曲线从零时刻到首次达到稳态值的时间,通常定义为响应曲线从稳态值的10%上升到稳态值90%所需的时间。
在本发明实施例中,参照图4,检测CMD写信号的Tr值,标号10624为所述CMD写信号的Tr值,所述CMD写信号的Tr值为Δx=0.6ns,记录所述CMD写信号的Tr值;参照图5,检测CMD读信号的Tr值,标号10644为所述CMD读信号的Tr值,所述CMD读信号的Tr值为Δx=1.8ns,记录所 述CMD读信号的Tr值。
参考图6,示出本发明的检测第一DATA信号的Tr值的示意图。参考图7,示出本发明的检测第二DATA信号的Tr值的示意图。DATA信号的两个方向的波形叠加在一起,波形1068是第一DATA信号的波形,波形1070是第二DATA信号的波形。由于DATA信号没有CMD信号这样的帧结构,所以DATA信号的方向不能单独从DATA信号的帧结构上判断。因此,本发明实施例需要从所述第一DATA信号和所述第二DATA信号中确定DATA写信号和DATA读信号。
需要说明的是,脉冲信号的上升时间是指脉冲瞬时值最初到达规定下限和规定上限的两瞬时之间的间隔。除另有规定之外,下限和上限分别定为脉冲峰值幅度的10%和90%。在控制领域中,上升时间是指响应曲线从零时刻到首次达到稳态值的时间,通常定义为响应曲线从稳态值的10%上升到稳态值90%所需的时间。
在本发明实施例中,参考图6,检测所述第一DATA信号的Tr值,标号10682为所述第一DATA信号的Tr值,所述第一DATA信号的Tr值为Δx=0.6ns,记录所述第一DATA信号的Tr值;参考图7,检测所述第二DATA信号的Tr值,标号10702为所述第二DATA信号的Tr值,所述第二DATA信号的Tr值为Δx=1.67ns,记录所述第二DATA信号的Tr值。
步骤108,根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号。
在本发明实施例中,CMD写信号和CMD读信号的Tr值与DATA写信号和DATA读信号的Tr值具有大小对应关系,这个对应关系由两个方面共同决定,一方面是由于芯片的CMD信号和DATA信号的管脚都属于同类型的IO接口,所以CMD信号和DATA信号具有相同的输入输出特性,另一方面是由于芯片的硬件外围电路设计和PCB设计具有相同的特性,例如走线等长,50Ω阻抗设计,平行走线等等。因此,本发明实施例根据所述对应关系,确定DATA写信号和DATA读信号,具体地,步骤108可以包括以下子步骤:
子步骤S1082,当所述CMD写信号的Tr值比所述CMD读信号的Tr值大时,从所述第一DATA信号和所述第二DATA信号的Tr值中,确定数 值大的为所述DATA写信号,数值小的为所述DATA读信号;
子步骤S1084,当所述CMD读信号的Tr值比所述CMD写信号的Tr值大时,在所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA读信号,数值小的为所述DATA写信号。
在本发明实施中,所述CMD写信号的Tr值为Δx=0.6ns,所述CMD读信号的Tr值为Δx=1.8ns,可以得出,所述CMD读信号的Tr值比所述CMD写信号的Tr值大,在所述第一DATA信号和所述第二DATA信号的Tr值中,所述第一DATA信号的Tr值为Δx=0.6ns,所述第二DATA信号的Tr值为Δx=1.67ns,可以得出,数值大的为第二DATA信号,数值小的为第一DATA信号,由此确定所述第一DATA信号为所述DATA写信号,所述第二DATA信号为所述DATA读信号。
在实际测量中需要确定DATA信号的输入和输出方向,才能准确的测量出输入和输出方向的测量项目,具体来说,在实际测量中需要确定所述DATA写信号和所述DATA读信号,才能准确的测量出所述DATA写信号的测量项目和所述DATA读信号。
在现有技术中,本领域技术人员通常通过示波器中选配的eMMC一致性分析软件来确定eMMC的DATA信号的方向,示波器的一致性分析软件内集成了逻辑分析的功能,可以通过解析CLK信号和CMD信号来判断当前DATA信号是读还是写,然而一致性分析软件需要同时测量CLK、CMD、DATA这三种信号,比较麻烦,本发明实施例不需要通过一致性分析软件的逻辑分析去解析数据的内容来判断DATA信号的方向。
在本发明实施例中,确定所述CMD写信号和所述CMD读信号后,检测所述CMD写信号和所述CMD读信号的上升时间Tr值,以及检测所述第一DATA信号和所述第二DATA信号的上升时间Tr值,根据所述CMD写信号和所述CMD读信号的Tr值与所述DATA写信号和所述DATA读信号的Tr值的大小对应关系,确定出所述DATA写信号和所述DATA读信号,本发明实施例不需要通过一致性分析软件的逻辑分析去解析数据的内容来判断DATA信号的方向,具有方便快捷的优点。
步骤110,分离所述DATA写信号和所述DATA读信号。
需要说明的是,斜率触发是把示波器设置为对指定时间的正斜率或负斜率触发,斜率时间设置范围为20ns~10s,在信号满足设定条件时,将触发 采样,可选择键调节LEVEL A,LEVEL B,或者同时调节LEVEL A和LEVEL B。
具体地,步骤110可以包括以下子步骤:
子步骤S1102,通过示波器进行斜率触发分离所述DATA写信号和所述DATA读信号,分别获得所述DATA写信号和所述DATA读信号。
参考图8,示出本发明通过示波器的斜率触发功能分离DATA写信号和DATA读信号的步骤流程图,具体地,子步骤1102可以包括以下子步骤:
子步骤S11022,点击RS RTO2044示波器的Trigger按钮,显示触发事件的界面;
子步骤S11024,设置触发类型为斜率触发;
子步骤S11026,设置上升沿触发;
子步骤S11028,选择高低电平为斜率测量区间;
子步骤S11030,选择预设的斜率值;
子步骤S11032,选择是大于还是小于所述斜率触发;
子步骤S11034,选择触发类型为Normal;
子步骤S11036,点击run按钮,开始分离DATA信号的读写方向。
参考图9,示出本发明的DATA写信号的分离效果图;参照图10,示出本发明的DATA读信号的分离效果图,本发明实施例通过示波器进行斜率触发单独分离出DATA写信号和DATA读信号。
本发明实施例中,可以获取所述eMMC与所述预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及获取所述eMMC与所述预设电子芯片之间传输的第一DATA信号和第二DATA信号;然后确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;接着检测所述CMD写信号和所述CMD读信号的Tr值,以及检测所述第一DATA信号和所述第二DATA信号的Tr值之后,根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;最后分离出所述DATA写信号和所述DATA读信号。本发明实施例不需要通过付费的一致性分析软件的逻辑分析去解析数据的内容来判断DATA信号的方向,具有简单快捷,成本低的优点。
需要说明的是,对于方法实施例,为了简单描述,故将其都表述为一系列的动作组合,但是本领域技术人员应该知悉,本发明实施例并不受所描述 的动作顺序的限制,因为依据本发明实施例,某些步骤可以采用其他顺序或者同时进行。其次,本领域技术人员也应该知悉,说明书中所描述的实施例均属于优选实施例,所涉及的动作并不一定是本发明实施例所必须的。
本发明实施例还提供了一种嵌入式多媒体卡eMMC的数据信号处理装置,其特征在于,所述eMMC与预设电子芯片连接,所述装置包括:
参考图11,示出本发明的一种嵌入式多媒体卡eMMC的数据信号处理装置的结构框图,具体可以包括如下模块:
信号获取模块1102,用于获取所述eMMC与所述预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及用于获取所述eMMC与所述预设电子芯片之间传输的第一DATA信号和第二DATA信号;
CMD信号确定模块1104,用于确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;
信号检测模块1106,用于检测所述CMD写信号和所述CMD读信号的Tr值,以及用于检测所述第一DATA信号和所述第二DATA信号的Tr值;
DATA信号确定模块1108,用于根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;
DATA信号分离模块1110,用于分离所述DATA写信号和所述DATA读信号。
本发明的一个可选实施例中,所述DATA信号确定模块1108,包括:
第一DATA信号确定子模块,用于当所述CMD写信号的Tr值比所述CMD读信号的Tr值大时,从所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA写信号,数值小的为所述DATA读信号;
第二DATA信号确定子模块,用于当所述CMD读信号的Tr值比所述CMD写信号的Tr值大时,在所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA读信号,数值小的为所述DATA写信号。
本发明的一个可选实施例中,所述CMD信号确定模块1104,包括:
第一CMD信号确定子模块,用于当所述第一CMD信号的帧结构中的第二位为1时,确定所述第一CMD信号为CMD写信号;
第二CMD信号确定子模块,用于当所述第一CMD信号的帧结构中的第二位为0时,确定所述第一CMD信号为CMD读信号;
第三CMD信号确定子模块,用于当所述第二CMD信号的帧结构中的第二位为1时,确定所述第二CMD信号为CMD写信号;
第四CMD信号确定子模块,用于当所述第二CMD信号的帧结构中的第二位为0时,确定所述第二CMD信号为CMD读信号。
本发明的一个可选实施例中,所述DATA信号分离模块1110,包括:
第一DATA信号分离子模块,用于分离所述DATA写信号;
第二DATA信号分离子模块,用于分离所述DATA读信号。
本发明实施例中,可以获取所述eMMC与所述预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及获取所述eMMC与所述预设电子芯片之间传输的第一DATA信号和第二DATA信号;然后确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;接着检测所述CMD写信号和所述CMD读信号的Tr值,以及检测所述第一DATA信号和所述第二DATA信号的Tr值之后,根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;最后分离出所述DATA写信号和所述DATA读信号。本发明实施例不需要通过付费的一致性分析软件的逻辑分析去解析数据的内容来判断DATA信号的方向,具有简单快捷,成本低的优点。
对于装置实施例而言,由于其与方法实施例基本相似,所以描述的比较简单,相关之处参见方法实施例的部分说明即可。
本发明实施例还提供了一种电子设备,包括有存储器,以及一个或者一个以上的程序,其中一个或者一个以上程序存储于存储器中,且经配置以由一个或者一个以上处理器执行所述一个或者一个以上程序包含用于执行如本发明实施例任一所述的嵌入式多媒体卡eMMC的数据信号处理方法。
本发明实施例还提供了一种可读存储介质,当所述存储介质中的指令由电子设备的处理器执行时,使得电子设备能够执行如本发明实施例任一所述的嵌入式多媒体卡eMMC的数据信号处理方法。
本说明书中的各个实施例均采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似的部分互相参见即可。
本领域内的技术人员应明白,本发明实施例的实施例可提供为方法、装置、或计算机程序产品。因此,本发明实施例可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本发明实施例可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本发明实施例是参照根据本发明实施例的方法、终端设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理终端设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理终端设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理终端设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理终端设备上,使得在计算机或其他可编程终端设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程终端设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本发明实施例的优选实施例,但本领域内的技术人员一旦得知了基本创造性概念,则可对这些实施例做出另外的变更和修改。所以,所附权利要求意欲解释为包括优选实施例以及落入本发明实施例范围的所有变更和修改。
最后,还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而 使得包括一系列要素的过程、方法、物品或者终端设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者终端设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、物品或者终端设备中还存在另外的相同要素。
以上对本发明所提供的一种嵌入式多媒体卡eMMC的数据信号处理方法、装置、电子设备和可读存储介质,进行了详细介绍,本文中应用了具体个例对本发明的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本发明的方法及其核心思想;同时,对于本领域的一般技术人员,依据本发明的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本发明的限制。

Claims (10)

  1. 一种嵌入式多媒体卡eMMC的数据信号处理方法,其特征在于,所述eMMC与预设电子芯片连接,所述方法包括:
    获取所述eMMC与所述预设电子芯片之间传输的第一双向命令和响应信号CMD信号和第二双向命令和响应信号CMD信号,以及获取所述eMMC与所述预设电子芯片之间传输的第一双向数据信号DATA信号和第二双向数据信号DATA信号;
    确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;
    检测所述CMD写信号和所述CMD读信号的上升时间Tr值,以及检测所述第一DATA信号和所述第二DATA信号的上升时间Tr值;
    根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;
    分离所述DATA写信号和所述DATA读信号。
  2. 根据权利要求1所述的方法,其特征在于,所述根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号,包括:
    当所述CMD写信号的Tr值比所述CMD读信号的Tr值大时,从所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA写信号,数值小的为所述DATA读信号;
    当所述CMD读信号的Tr值比所述CMD写信号的Tr值大时,从所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA读信号,数值小的为所述DATA写信号。
  3. 根据权利要求1所述的方法,其特征在于,所述确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号,包括:
    当所述第一CMD信号的帧结构中的第二位为1时,确定所述第一CMD信号为CMD写信号;
    当所述第一CMD信号的帧结构中的第二位为0时,确定所述第一CMD信号为CMD读信号;
    当所述第二CMD信号的帧结构中的第二位为1时,确定所述第二CMD信号为CMD写信号;
    当所述第二CMD信号的帧结构中的第二位为0时,确定所述第二CMD信号为CMD读信号。
  4. 根据权利要求1所述的方法,其特征在于,所述分离所述DATA写信号和所述DATA读信号,包括:
    通过示波器进行斜率触发分离所述DATA写信号和所述DATA读信号,分别获得所述DATA写信号和所述DATA读信号。
  5. 一种嵌入式多媒体卡eMMC的数据信号处理装置,其特征在于,所述eMMC与预设电子芯片连接,所述装置包括:
    信号获取模块,用于获取所述eMMC与所述预设电子芯片之间传输的第一CMD信号和第二CMD信号,以及用于获取所述eMMC与所述预设电子芯片之间传输的第一DATA信号和第二DATA信号;
    CMD信号确定模块,用于确定所述第一CMD信号和所述第二CMD信号中的CMD写信号和CMD读信号;
    信号检测模块,用于检测所述CMD写信号和所述CMD读信号的Tr值,以及用于检测所述第一DATA信号和所述第二DATA信号的Tr值;
    DATA信号确定模块,用于根据所述CMD写信号和所述CMD读信号的Tr值,从所述第一DATA信号和所述第二DATA信号中,确定出DATA写信号和DATA读信号;
    DATA信号分离模块,用于分离所述DATA写信号和所述DATA读信号。
  6. 根据权利要求5所述的装置,其特征在于,所述DATA信号确定模块,包括:
    第一DATA信号确定子模块,用于当所述CMD写信号的Tr值比所述CMD读信号的Tr值大时,从所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA写信号,数值小的为所述DATA读信号;
    第二DATA信号确定子模块,用于当所述CMD读信号的Tr值比所述 CMD写信号的Tr值大时,在所述第一DATA信号和所述第二DATA信号的Tr值中,确定数值大的为所述DATA读信号,数值小的为所述DATA写信号。
  7. 根据权利要求5所述的装置,其特征在于,所述CMD信号确定模块,包括:
    第一CMD信号确定子模块,用于当所述第一CMD信号的帧结构中的第二位为1时,确定所述第一CMD信号为CMD写信号;
    第二CMD信号确定子模块,用于当所述第一CMD信号的帧结构中的第二位为0时,确定所述第一CMD信号为CMD读信号;
    第三CMD信号确定子模块,用于当所述第二CMD信号的帧结构中的第二位为1时,确定所述第二CMD信号为CMD写信号;
    第四CMD信号确定子模块,用于当所述第二CMD信号的帧结构中的第二位为0时,确定所述第二CMD信号为CMD读信号。
  8. 所述权利要求5所述的装置,其特征在于,所述DATA信号分离模块,包括:
    第一DATA信号分离子模块,用于分离所述DATA写信号;
    第二DATA信号分离子模块,用于分离所述DATA读信号。
  9. 一种电子设备,其特征在于,包括有存储器,以及一个或者一个以上的程序,其中一个或者一个以上程序存储于存储器中,且经配置以由一个或者一个以上处理器执行所述一个或者一个以上程序包含用于执行如方法权利要求1-4任一所述的嵌入式多媒体卡eMMC的数据信号处理方法。
  10. 一种可读存储介质,其特征在于,当所述存储介质中的指令由电子设备的处理器执行时,使得电子设备能够执行如方法权利要求1-4任一所述的嵌入式多媒体卡eMMC的数据信号处理方法。
PCT/CN2021/116468 2020-09-03 2021-09-03 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置 WO2022048641A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP21863703.1A EP4141683A1 (en) 2020-09-03 2021-09-03 Data signal processing method and apparatus for embedded multimedia card (emmc)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010917560.9A CN112084124B (zh) 2020-09-03 2020-09-03 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置
CN202010917560.9 2020-09-03

Publications (1)

Publication Number Publication Date
WO2022048641A1 true WO2022048641A1 (zh) 2022-03-10

Family

ID=73731619

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/116468 WO2022048641A1 (zh) 2020-09-03 2021-09-03 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置

Country Status (3)

Country Link
EP (1) EP4141683A1 (zh)
CN (1) CN112084124B (zh)
WO (1) WO2022048641A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112084124B (zh) * 2020-09-03 2022-05-13 广州小鹏汽车科技有限公司 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104700902A (zh) * 2013-12-09 2015-06-10 慧荣科技股份有限公司 数据储存装置及其模式检测方法
CN110931062A (zh) * 2019-10-29 2020-03-27 晶晨半导体(上海)股份有限公司 一种提高emmc数据信号采样精度的方法
US20200152245A1 (en) * 2018-06-28 2020-05-14 Micron Technology, Inc. Data strobe calibration
CN112084124A (zh) * 2020-09-03 2020-12-15 广州小鹏汽车科技有限公司 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5628027A (en) * 1993-10-29 1997-05-06 Compaq Computer Corporation Method of determining the configuration of devices installed on a computer bus
JP2003151260A (ja) * 2001-11-13 2003-05-23 Mitsubishi Electric Corp 薄膜磁性体記憶装置
JP5887989B2 (ja) * 2012-02-24 2016-03-16 富士ゼロックス株式会社 情報処理装置、制御装置および画像形成装置
KR102672108B1 (ko) * 2019-01-21 2024-06-05 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104700902A (zh) * 2013-12-09 2015-06-10 慧荣科技股份有限公司 数据储存装置及其模式检测方法
US20200152245A1 (en) * 2018-06-28 2020-05-14 Micron Technology, Inc. Data strobe calibration
CN110931062A (zh) * 2019-10-29 2020-03-27 晶晨半导体(上海)股份有限公司 一种提高emmc数据信号采样精度的方法
CN112084124A (zh) * 2020-09-03 2020-12-15 广州小鹏汽车科技有限公司 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置

Also Published As

Publication number Publication date
EP4141683A1 (en) 2023-03-01
CN112084124A (zh) 2020-12-15
CN112084124B (zh) 2022-05-13

Similar Documents

Publication Publication Date Title
JP6803373B2 (ja) 立ち上がり及び立ち下がりエッジのデスキュー
WO2022048641A1 (zh) 一种嵌入式多媒体卡eMMC的数据信号处理方法和装置
US20140163914A1 (en) Scrolling measurement display ticker for test and measurement instruments
CN104977448A (zh) 具有高级触发能力的测试和测量仪器
CN112345982B (zh) 电路元件焊接情况检测方法及装置
CN111190089B (zh) 抖动时间的确定方法及装置、存储介质和电子设备
JPS59186415A (ja) スキユ−検出器
TWI635298B (zh) 邏輯分析儀及其資料擷取與效能測試之方法
CN102254569B (zh) 四倍数据速率qdr控制器及其实现方法
CN115470125B (zh) 基于日志文件的调试方法、设备以及存储介质
JP5025638B2 (ja) 信号出力装置、試験装置、およびプログラム
US8359503B2 (en) Method and system for generating an integrated circuit chip facility waveform from a series of chip snapshots
CN113495225A (zh) 一种电源稳定性测试方法、系统及设备
TW200933160A (en) Automatic signal identifying method and signal skew measurement method
US11068381B2 (en) Program analysis device, program analysis system, program analysis method and computer readable medium
US11906583B2 (en) Method and measurement instrument for testing a device under test
CN104133174A (zh) 一种基于SignaltapⅡ的FPGA开发板测试方法
JP5481272B2 (ja) 測定方法
CN218938940U (zh) 一种i2c总线测试工装
CN116339608B (zh) 一种数据采样方法、系统、芯片、装置与存储介质
US8307312B2 (en) Simulation method of logic circuit
Bhagwath et al. SI Analysis of DDR Bus during Read/Write operation transitions
CN117491776A (zh) 固件芯片数据针脚识别方法与装置
JP4001739B2 (ja) メモリの検査解析方法及び装置
CN202267469U (zh) 膜厚测试及数据采集系统

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21863703

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2021863703

Country of ref document: EP

Effective date: 20221122

NENP Non-entry into the national phase

Ref country code: DE