WO2022023859A1 - 撮像装置、電子機器および移動体 - Google Patents
撮像装置、電子機器および移動体 Download PDFInfo
- Publication number
- WO2022023859A1 WO2022023859A1 PCT/IB2021/056422 IB2021056422W WO2022023859A1 WO 2022023859 A1 WO2022023859 A1 WO 2022023859A1 IB 2021056422 W IB2021056422 W IB 2021056422W WO 2022023859 A1 WO2022023859 A1 WO 2022023859A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- pixel
- region
- transistor
- light
- wiring
- Prior art date
Links
- 238000003384 imaging method Methods 0.000 title abstract description 26
- 238000006243 chemical reaction Methods 0.000 claims abstract description 136
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 12
- 239000004065 semiconductor Substances 0.000 claims description 90
- 239000004973 liquid crystal related substance Substances 0.000 claims description 67
- 239000000758 substrate Substances 0.000 claims description 41
- 230000003287 optical effect Effects 0.000 claims description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 15
- 229910052710 silicon Inorganic materials 0.000 claims description 15
- 239000010703 silicon Substances 0.000 claims description 15
- 238000012545 processing Methods 0.000 claims description 14
- 238000001514 detection method Methods 0.000 claims description 9
- 230000000903 blocking effect Effects 0.000 claims description 7
- 239000010410 layer Substances 0.000 description 294
- 230000006870 function Effects 0.000 description 103
- 239000003990 capacitor Substances 0.000 description 35
- 230000000875 corresponding effect Effects 0.000 description 32
- 239000011701 zinc Substances 0.000 description 32
- 239000010408 film Substances 0.000 description 29
- 238000000034 method Methods 0.000 description 25
- 238000010586 diagram Methods 0.000 description 24
- 238000004364 calculation method Methods 0.000 description 22
- 210000002569 neuron Anatomy 0.000 description 19
- 210000004027 cell Anatomy 0.000 description 18
- 238000013528 artificial neural network Methods 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 14
- 230000001276 controlling effect Effects 0.000 description 13
- 239000013078 crystal Substances 0.000 description 13
- 239000001257 hydrogen Substances 0.000 description 13
- 229910052739 hydrogen Inorganic materials 0.000 description 13
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 12
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 12
- 125000004429 atom Chemical group 0.000 description 12
- 239000000463 material Substances 0.000 description 12
- 230000005684 electric field Effects 0.000 description 11
- 239000002184 metal Substances 0.000 description 10
- 239000000203 mixture Substances 0.000 description 10
- 238000002834 transmittance Methods 0.000 description 10
- 238000009413 insulation Methods 0.000 description 9
- 230000007547 defect Effects 0.000 description 8
- 239000011347 resin Substances 0.000 description 8
- 229920005989 resin Polymers 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 7
- 230000004913 activation Effects 0.000 description 7
- 230000008878 coupling Effects 0.000 description 7
- 238000010168 coupling process Methods 0.000 description 7
- 238000005859 coupling reaction Methods 0.000 description 7
- 229910052733 gallium Inorganic materials 0.000 description 7
- 229910052732 germanium Inorganic materials 0.000 description 7
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 7
- 229910052738 indium Inorganic materials 0.000 description 7
- 239000011159 matrix material Substances 0.000 description 7
- 230000035945 sensitivity Effects 0.000 description 7
- 238000000926 separation method Methods 0.000 description 7
- 239000011787 zinc oxide Substances 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 230000008859 change Effects 0.000 description 6
- 239000004020 conductor Substances 0.000 description 6
- 238000003860 storage Methods 0.000 description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 5
- 206010021143 Hypoxia Diseases 0.000 description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000000969 carrier Substances 0.000 description 5
- 150000001875 compounds Chemical class 0.000 description 5
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 5
- 229910001195 gallium oxide Inorganic materials 0.000 description 5
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 229910044991 metal oxide Inorganic materials 0.000 description 5
- 150000004706 metal oxides Chemical class 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 229910052719 titanium Inorganic materials 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 4
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 4
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 230000004907 flux Effects 0.000 description 4
- 229910052735 hafnium Inorganic materials 0.000 description 4
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 4
- 229910052746 lanthanum Inorganic materials 0.000 description 4
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 239000011733 molybdenum Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 229910052715 tantalum Inorganic materials 0.000 description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- 229910052725 zinc Inorganic materials 0.000 description 4
- 229910052726 zirconium Inorganic materials 0.000 description 4
- UWCWUCKPEYNDNV-LBPRGKRZSA-N 2,6-dimethyl-n-[[(2s)-pyrrolidin-2-yl]methyl]aniline Chemical compound CC1=CC=CC(C)=C1NC[C@H]1NCCC1 UWCWUCKPEYNDNV-LBPRGKRZSA-N 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 229910052684 Cerium Inorganic materials 0.000 description 3
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 3
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 3
- 229910052779 Neodymium Inorganic materials 0.000 description 3
- 239000004983 Polymer Dispersed Liquid Crystal Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- MDPILPRLPQYEEN-UHFFFAOYSA-N aluminium arsenide Chemical compound [As]#[Al] MDPILPRLPQYEEN-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- ZMIGMASIKSOYAM-UHFFFAOYSA-N cerium Chemical compound [Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce] ZMIGMASIKSOYAM-UHFFFAOYSA-N 0.000 description 3
- 230000002596 correlated effect Effects 0.000 description 3
- 239000006059 cover glass Substances 0.000 description 3
- 229910001882 dioxygen Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000002149 energy-dispersive X-ray emission spectroscopy Methods 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- -1 ittrium Chemical compound 0.000 description 3
- 229910052749 magnesium Inorganic materials 0.000 description 3
- 239000011777 magnesium Substances 0.000 description 3
- 239000002105 nanoparticle Substances 0.000 description 3
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000005070 sampling Methods 0.000 description 3
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 description 3
- 238000005477 sputtering target Methods 0.000 description 3
- 229910052720 vanadium Inorganic materials 0.000 description 3
- GPPXJZIENCGNKB-UHFFFAOYSA-N vanadium Chemical compound [V]#[V] GPPXJZIENCGNKB-UHFFFAOYSA-N 0.000 description 3
- VUFNLQXQSDUXKB-DOFZRALJSA-N 2-[4-[4-[bis(2-chloroethyl)amino]phenyl]butanoyloxy]ethyl (5z,8z,11z,14z)-icosa-5,8,11,14-tetraenoate Chemical group CCCCC\C=C/C\C=C/C\C=C/C\C=C/CCCC(=O)OCCOC(=O)CCCC1=CC=C(N(CCCl)CCCl)C=C1 VUFNLQXQSDUXKB-DOFZRALJSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- 229910052688 Gadolinium Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 229910052783 alkali metal Inorganic materials 0.000 description 2
- 150000001340 alkali metals Chemical class 0.000 description 2
- 229910052784 alkaline earth metal Inorganic materials 0.000 description 2
- 150000001342 alkaline earth metals Chemical class 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 229910052790 beryllium Inorganic materials 0.000 description 2
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000002775 capsule Substances 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 230000003098 cholesteric effect Effects 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 238000013527 convolutional neural network Methods 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000002524 electron diffraction data Methods 0.000 description 2
- 230000001747 exhibiting effect Effects 0.000 description 2
- 239000005262 ferroelectric liquid crystals (FLCs) Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 238000003702 image correction Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910003437 indium oxide Inorganic materials 0.000 description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 239000013081 microcrystal Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 239000002159 nanocrystal Substances 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 210000001747 pupil Anatomy 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 238000005096 rolling process Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 229910001233 yttria-stabilized zirconia Inorganic materials 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 229910016036 BaF 2 Inorganic materials 0.000 description 1
- 229910004261 CaF 2 Inorganic materials 0.000 description 1
- 229910020156 CeF Inorganic materials 0.000 description 1
- 239000004986 Cholesteric liquid crystals (ChLC) Substances 0.000 description 1
- 235000015842 Hesperis Nutrition 0.000 description 1
- 239000005264 High molar mass liquid crystal Substances 0.000 description 1
- 235000012633 Iberis amara Nutrition 0.000 description 1
- 229910052777 Praseodymium Inorganic materials 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000004990 Smectic liquid crystal Substances 0.000 description 1
- 229910052771 Terbium Inorganic materials 0.000 description 1
- 239000004974 Thermotropic liquid crystal Substances 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- XQPRBTXUXXVTKB-UHFFFAOYSA-M caesium iodide Inorganic materials [I-].[Cs+] XQPRBTXUXXVTKB-UHFFFAOYSA-M 0.000 description 1
- 229910052800 carbon group element Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000002485 combustion reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000013135 deep learning Methods 0.000 description 1
- 230000000779 depleting effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 210000003128 head Anatomy 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000002558 medical inspection Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 238000011017 operating method Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000005424 photoluminescence Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- FVAUCKIRQBBSSJ-UHFFFAOYSA-M sodium iodide Inorganic materials [Na+].[I-] FVAUCKIRQBBSSJ-UHFFFAOYSA-M 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 210000003462 vein Anatomy 0.000 description 1
- 238000012800 visualization Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14607—Geometry of the photosensitive area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/1461—Pixel-elements with integrated switching, control, storage or amplification elements characterised by the photosensitive area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14616—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor characterised by the channel of the transistor, e.g. channel having a doping gradient
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14621—Colour filter arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14623—Optical shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14627—Microlenses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14641—Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14645—Colour imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/10—Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming different wavelengths into image signals
- H04N25/11—Arrangement of colour filter arrays [CFA]; Filter mosaics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/703—SSIS architectures incorporating pixels for producing signals other than image signals
- H04N25/704—Pixels specially adapted for focusing, e.g. phase difference pixel sets
Definitions
- One aspect of the present invention relates to an image pickup device.
- one aspect of the present invention is not limited to the above technical fields.
- the technical field of one aspect of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method.
- one aspect of the invention relates to a process, machine, manufacture, or composition (composition of matter).
- the technical fields of one aspect of the present invention disclosed in the present specification include semiconductor devices, display devices, liquid crystal display devices, light emitting devices, lighting devices, power storage devices, storage devices, image pickup devices, and operating methods thereof. , Or their manufacturing methods, can be mentioned as an example.
- the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics.
- Transistors and semiconductor circuits are one aspect of semiconductor devices.
- the storage device, the display device, the image pickup device, and the electronic device may have a semiconductor device.
- Patent Document 1 discloses an image pickup apparatus having an oxide semiconductor and using a transistor having an extremely low off-current in a pixel circuit.
- Non-Patent Document 1 As an example of the performance required for the image pickup apparatus, there is a high definition and a highly accurate autofocus (auto-focus) function (Non-Patent Document 1).
- Patent Document 2 discloses an example in which the pupil division phase difference method is used as the focus detection method.
- One aspect of the present invention is to provide a high-performance image pickup apparatus.
- one of the purposes is to provide a small image pickup device.
- one of the purposes is to provide an image pickup device capable of high-speed operation.
- one of the purposes is to provide a highly reliable image pickup apparatus.
- one of the purposes is to provide a new image pickup device or the like.
- one of the purposes is to provide a driving method for the image pickup apparatus.
- one of the purposes is to provide a new semiconductor device or the like.
- One aspect of the present invention includes a pixel array having n pixels (n is a natural number of 4 or more), a light-shielding layer and a transparent conductive layer arranged on the pixel array, and each of the n pixels.
- the light-shielding layer has a first region that overlaps with the first pixel and a second region that overlaps with the second pixel, and the transparent conductive layer overlaps with the first region. It has a region and a region that overlaps with the second region, the transparent conductive layer has translucency, and the transparent conductive layer is electrically connected to the first region and the second region, and the first pixel.
- the first light is incident on the photoelectric conversion device of the second pixel
- the second light is incident on the photoelectric conversion device of the second pixel
- the first electricity is converted and generated. It is an image pickup apparatus having a function of performing processing using a signal and a second electric signal generated by converting a second light.
- the focal position of the image formation is formed by using the first electric signal generated by converting the first light and the second electric signal generated by converting the second light. It is preferable to have a function of detecting.
- the transparent conductive layer has a region overlapping with two or more of the third pixel to the nth pixel.
- the transparent conductive layer has a plurality of arranged openings, each of which is superimposed on one or more of the third pixel to the nth pixel, and the plurality of openings are arranged. Therefore, it is preferable to form a grid-like shape.
- the microlens array having m microlenses (m is a natural number of (n-1) or less) is provided, the first microlens is superimposed on the first pixel, and the second microlens is.
- the first region is the first region.
- the 2nd pixel is connected to the 5th region and the 6th region by the second straight line passing through the optical axis of the second microlens.
- the second region overlaps with 70% or more of the fifth region and overlaps with less than 40% of the sixth region, and the first straight line and the second straight line are parallel to each other and are viewed from above.
- the x-axis is the direction perpendicular to the first straight line and the second straight line
- the fourth region is arranged in a region having a larger x-coordinate than the third region
- the sixth region is located in a region having a larger x-coordinate than the fifth region. It is preferable to be arranged.
- the microlens array having m microlenses (m is a natural number of (n-1) or less) is provided, and the first microlenses are the first pixel, the second pixel, the third pixel, and the third pixel. It is preferable that the second microlens is superimposed on the fourth pixel and the second microlens is superimposed on the fifth pixel, the sixth pixel, the seventh pixel and the eighth pixel.
- the light-shielding layer has a first opening, the first opening overlaps with the fifth pixel, the sixth pixel, the seventh pixel, and the eighth pixel, and the transparent conductive layer is the first. It is preferable to have a region that overlaps with the opening of 1.
- a color filter of any one of red, green, and blue is superposed on each of the third pixel to the nth pixel, and the first pixel, the second pixel, the third pixel, and the third pixel are provided. It is preferable that the fourth pixel is provided with a color filter of the same color, and the fifth pixel, the sixth pixel, the seventh pixel, and the eighth pixel are provided with a color filter of the same color.
- each of the n pixels has a transistor, and the light-shielding layer is superimposed on one or more of the transistors of each of the third pixel to the nth pixel.
- each of the n pixels has a transistor having an oxide semiconductor in the channel forming region.
- the photoelectric conversion device is preferably a pn junction diode provided on a silicon substrate.
- one aspect of the present invention includes a pixel array having two or more pixels and a liquid crystal element arranged on the pixel array, and each of the pixels of the pixel array has a photoelectric conversion device.
- the liquid crystal element has a first region superimposed on the first pixel and a second region superimposed on the second pixel, and the photoelectric conversion device included in the first pixel is incident with the first light and has a second region.
- a second light is incident on the photoelectric conversion device having two pixels, and a first electric signal generated by converting the first light and a second electric signal generated by converting the second light are generated.
- the liquid crystal element has a function of blocking light when detecting the focal position and transmitting light when not detecting the focal position.
- one aspect of the present invention is an electronic device having the image pickup apparatus and the display unit according to any one of the above.
- one aspect of the present invention is a mobile body having the image pickup apparatus according to any one of the above and an integrated circuit having a function of performing image processing.
- a high-performance imaging device By using one aspect of the present invention, it is possible to provide a high-performance imaging device. Alternatively, a small imaging device can be provided. Alternatively, it is possible to provide an image pickup device capable of high-speed operation. Alternatively, a highly reliable image pickup device can be provided. Alternatively, a new image pickup device or the like can be provided. Alternatively, it is possible to provide a method for driving the image pickup device. Alternatively, a new semiconductor device or the like can be provided.
- FIG. 1 is a diagram illustrating pixels.
- FIG. 2 is a diagram illustrating pixels.
- 3A and 3B are diagrams illustrating a pixel circuit.
- 4A and 4B are diagrams illustrating the layout of the pixel circuit.
- 5A and 5B are diagrams illustrating a pixel circuit.
- FIG. 6 is a timing chart illustrating the operation of the pixels.
- FIG. 7 is a block diagram illustrating an image pickup apparatus.
- 8A and 8B are diagrams illustrating a pixel circuit.
- FIG. 9 is a block diagram illustrating an image pickup apparatus.
- FIG. 10 is a diagram illustrating the pixel block 200 and the circuit 201.
- 11A and 11B are diagrams illustrating the pixel 100.
- FIG. 12A and 12B are timing charts illustrating the operation of the pixel block 200 and the circuit 201.
- 13A and 13B are diagrams illustrating the circuit 301 and the circuit 302.
- FIG. 14 is a diagram illustrating a memory cell.
- 15A and 15B are diagrams showing a configuration example of a neural network.
- 16A and 16B are diagrams illustrating a configuration example of a photoelectric conversion device.
- FIG. 17 is an example of a cross-sectional view of the image pickup apparatus.
- 18A, 18B, and 18C are examples of cross sections of transistors.
- 19A and 19B are examples of top views of the image pickup apparatus.
- 20A and 20B are examples of top views of the image pickup apparatus.
- 21A and 21B are examples of top views of the image pickup apparatus.
- FIG. 22A and 22B are examples of top views of the image pickup apparatus.
- 23A and 23B are examples of top views of the image pickup apparatus.
- 24A and 24B are examples of top views of the image pickup apparatus.
- 25A and 25B are examples of top views of the image pickup apparatus.
- FIG. 26 is an example of a cross-sectional view of the image pickup apparatus.
- FIG. 27 is an example of a cross-sectional view of the image pickup apparatus.
- FIG. 28 is an example of a cross-sectional view of the image pickup apparatus.
- FIG. 29 is an example of a cross-sectional view of the image pickup apparatus.
- FIG. 30 is an example of a cross-sectional view of the image pickup apparatus.
- FIG. 31 is an example of a cross-sectional view of the image pickup apparatus.
- 32A, 32B, 32C, and 32D are examples of cross sections of transistors.
- 33A to 33F are perspective views of a package and a module containing an image pickup apparatus.
- 34A to 34F are views showing electronic devices.
- 35A and 35B are diagrams illustrating an automobile.
- the element may be composed of a plurality of elements if there is no functional inconvenience.
- a plurality of transistors operating as switches may be connected in series or in parallel.
- the capacitor may be divided and arranged at a plurality of positions.
- one conductor may have a plurality of functions such as wiring, electrodes and terminals, and in the present specification, a plurality of names may be used for the same element. Further, even if the elements are shown to be directly connected on the circuit diagram, the elements may actually be connected via one or a plurality of conductors. , In the present specification, such a configuration is also included in the category of direct connection.
- FIG. 1 is a cross-sectional view of pixels of an image pickup apparatus according to an aspect of the present invention.
- the pixel has a structure in which a layer 21, a layer 24, a layer 25, and a layer 26 are laminated.
- the layer 21 has a support substrate and the like.
- the layer 24 includes a transistor, a photoelectric conversion device, and the like.
- the layer 25 has an optical conversion layer and the like.
- the layer 26 has a microlens array and the like.
- a pixel circuit (excluding photoelectric conversion devices), a pixel circuit drive circuit, a read circuit, a memory circuit, an arithmetic circuit, and the like can be configured by a transistor or the like provided on the layer 24. In the following description, these circuits may be collectively referred to as a functional circuit.
- FIG. 2 is a diagram in which the laminated structure shown in FIG. 1 is separated into each layer.
- the elements of each layer are not limited to the elements shown in FIG. 2, and other elements may be included.
- the element such as the insulating layer arranged in the vicinity of the boundary thereof is shown as an element of one layer for convenience, but may be an element of the other layer.
- the layer 21 is a support substrate, and is preferably hard and has a flat surface.
- a semiconductor substrate such as silicon, a glass substrate, a ceramics substrate, a metal substrate, a resin substrate, or the like can be used.
- the layer 21 is composed of a substrate 411 and an insulating layer 412 covering the substrate 411. Further, the layer 21 may not be provided.
- the layer 24 has a photoelectric conversion device 101 provided on the substrate 441 and a circuit unit 901.
- the circuit unit 901 has, for example, a transistor having a channel region formed on the substrate 441.
- silicon, silicon carbide, germanium, silicon germanium, an oxide semiconductor, or the like can be used.
- a photodiode can be used as the photoelectric conversion device 101.
- a pn junction type photodiode in which one surface of the substrate 441 is used as the first light receiving surface can be used.
- the region showing the photoelectric conversion device 101 and the region showing the circuit unit 901 are shown in a rectangular shape, but each region can have a region having a free shape.
- one of the source and the drain can also serve as an n-type region or a p-type region of the photoelectric conversion device 101.
- the layer 25 is a layer provided with an optical conversion layer, and here, an example in which color filters 452R, 452G1, 452G2, and 452B corresponding to color imaging are provided is shown. Further, the layer 25 has a light-shielding layer 451.
- the color filter 452R is colored red
- the color filter 452G1 and the color filter 452G2 are colored green
- the color filter 452B is colored blue.
- the color filter 452R, the color filter 452G1, the color filter 452G2, and the color filter 452B are provided in an area overlapping the photoelectric conversion device 101 corresponding to each.
- the light-shielding layer 451 is provided between the color filters, for example, at a position overlapping the boundary, and can prevent light passing through the color filters from entering adjacent pixels.
- the light-shielding layer 451 preferably has a region that overlaps with one or more of the transistors of the circuit unit 901. More specifically, for example, the light-shielding layer 451 has a region that overlaps with the transistor 102 described later. Further, the light-shielding layer 451 may have a region overlapping with the transistor 103 described later.
- the light-shielding layer 451 By superimposing the light-shielding layer 451 on the transistor, it is possible to suppress the incident light on the transistor, and it is possible to suppress the leakage current flowing through the transistor, the deterioration of the transistor, and the like. In particular, when the global shutter method is applied to the image pickup apparatus, it is preferable because the leakage of the retained charge can be suppressed by suppressing the leakage current.
- the light-shielding layer 451 may not be superimposed on the transistor included in the circuit unit 901.
- the transparent conductive layer 455 described later may be used instead of the light-shielding layer 451.
- the transparent conductive layer 455 By using the transparent conductive layer 455, the amount of light incident on the photoelectric conversion device 101 is increased, and the sensitivity of the image pickup apparatus may be increased.
- the layer 25 may have a shutter.
- the shutter preferably has a function of controlling the transmittance of light.
- the shutter can switch between a light blocking mode and a translucent mode according to an electric signal. It is preferable that the shutter is provided so as to be superimposed on at least a part of the photoelectric conversion device 101.
- a liquid crystal element can be used as the shutter.
- the liquid crystal element is provided, for example, in place of the light-shielding layer 451.
- the liquid crystal element is provided, for example, so as to overlap with at least one of the light shielding layer and the color filter. Further, the liquid crystal element is provided between the layer 24 and the color filter, for example.
- a plurality of liquid crystal elements are arranged in a matrix.
- one liquid crystal element is provided for one pixel.
- one liquid crystal element may be provided for a plurality of pixels.
- a plurality of liquid crystal elements may be provided for one pixel.
- the transmittance of the liquid crystal element can be controlled.
- the liquid crystal element can function as a light-shielding layer.
- the liquid crystal element has a structure in which the liquid crystal layer is sandwiched between a pair of translucent electrodes. With such a configuration, the transmittance of the liquid crystal element can be increased by controlling the electric field applied to the liquid crystal element when there is no need for shading.
- the layer 26 has a microlens array 462 and an insulating layer 461.
- the microlens array 462 has a function of efficiently incident light on the photoelectric conversion device 101 by condensing the incident light.
- FIG. 3A is a circuit diagram illustrating an example of the pixel 10.
- the pixel 10 includes a photoelectric conversion device 101, a transistor 102, a transistor 103, a transistor 104, a transistor 105, and a capacitor 106.
- the transistor 102, the transistor 103, the transistor 104, the transistor 105, and the capacitor 106 can be elements of the circuit unit 901 shown in FIG.
- One electrode of the photoelectric conversion device 101 is electrically connected to one of the source and drain of the transistor 102.
- the other of the source or drain of the transistor 102 is electrically connected to one of the source or drain of the transistor 103, the gate of the transistor 104, and one electrode of the capacitor 106.
- One of the source or drain of the transistor 104 is electrically connected to the other of the source or drain of the transistor 105.
- a node FD is a point where the other electrode of the source or drain of the transistor 102, one of the source or drain of the transistor 103, the gate of the transistor 104, and one electrode of the capacitor 106 are electrically connected.
- the node FD can function as a charge detection unit.
- the other electrode of the photoelectric conversion device 101 is electrically connected to the wiring 121.
- the other of the source or drain of the transistor 103 is electrically connected to the wiring 122.
- the other of the source or drain of the transistor 104 is electrically connected to the wiring 122.
- the other of the source or drain of the transistor 105 is electrically connected to the wiring 123.
- the gate of the transistor 102 is electrically connected to the wiring 131.
- the gate of the transistor 103 is electrically connected to the wiring 132.
- the gate of the transistor 105 is electrically connected to the wiring 133.
- Wiring 121 and 122 can have a function as a power line.
- the wiring 121 may function as a low-potential power supply line
- the wiring 122 may function as a high-potential power supply line.
- Wiring 131, 132, 133 can have a function as a signal line for controlling the continuity of each transistor.
- the wiring 123 can have a function as an output line, and is electrically connected to, for example, a readout circuit having a correlated double sampling circuit (CDS circuit), an A / D conversion circuit, and the like.
- CDS circuit correlated double sampling circuit
- the transistor 102 has a function of reading the electric charge from the photoelectric conversion device 101 and controlling the potential of the node FD.
- the transistor 103 has a function of resetting the potential of the node FD.
- the transistor 104 functions as an element of the source follower circuit.
- the transistor 105 has a function of selecting the output of the pixel.
- the relationship between the cathode and the anode of the photoelectric conversion device 101 may be reversed from that in FIG. 3A.
- the other side of the source or drain of the transistor 103 may be electrically connected to the wiring 124, the wiring 121 and 122 may function as the high potential power supply line, and the wiring 124 may function as the low potential power supply line.
- FIG. 4A shows an example of a top view in which the elements of the pixel 10 shown in FIGS. 3A and 3B are simply laid out. Further, FIG. 4B is an enlarged view showing the circuit unit 901 and its vicinity in FIG. 4A.
- the transistor 102 has a gate electrode 142 sandwiched between a source region and a drain region.
- the transistor 103 has a gate electrode 143 sandwiched between a source region and a drain region.
- the transistor 104 has a gate electrode 144 sandwiched between a source region and a drain region.
- the transistor 105 has a gate electrode 145 sandwiched between a source region and a drain region.
- one electrode of the photoelectric conversion device 101 and one of the source and drain of the transistor 102 are shared.
- the other of the source and drain of the transistor 102 and one of the source and drain of the transistor 103 are shared.
- the other of the source and drain of the transistor 102 and the gate electrode 144 of the transistor 104 are electrically connected via the wiring 127.
- the other electrode of the photoelectric conversion device 101 and the wiring 121 are electrically connected.
- the capacitor 106 has a wiring 128 that functions as a first electrode and a wiring 129 that functions as a second electrode.
- FIG. 4A shows an example in which the photoelectric conversion device 101 and the circuit unit 901 of the pixel 10 are arranged in a region surrounded by the element separation layer 443.
- transistors can be applied to the transistor 102, the transistor 103, the transistor 104, and the transistor 105.
- a transistor (Si transistor) using silicon in the channel forming region can be applied.
- a transistor (OS transistor) using a metal oxide in the channel forming region can be applied.
- a transistor using silicon carbide, germanium, silicon germanium, gallium arsenic, gallium aluminum arsenide, indium phosphide, zinc selenium, gallium nitride, gallium oxide, or the like for the channel formation region can be applied. Further, these transistors may be applied in any combination.
- the OS transistor has a characteristic that the off current is extremely low.
- the period during which the charge can be held in the node FD can be extremely long, and image data with little deterioration can be read out. That is, it enables a global shutter operation in which all pixels simultaneously perform an imaging operation. The rolling shutter operation is also possible.
- Si transistors may be particularly excellent in amplification characteristics. Therefore, for example, it can be suitably used as a transistor 104.
- Si transistors have high mobility and can operate at higher speeds. Therefore, for example, it can be suitably used as a transistor 105.
- the pixel 10 of one aspect of the present invention may have the circuit configuration shown in FIGS. 5A and 5B.
- the pixel 10 shown in FIGS. 5A and 5B has a configuration in which a transistor 107 is added to the circuit shown in FIGS. 3A and 3B.
- One of the source or drain of the transistor 107 is electrically connected to one of the source or drain of the transistor 102 and one of the source or drain of the transistor 103.
- the other of the source or drain of the transistor 107 is electrically connected to the gate of the transistor 104 and one electrode of the capacitor 106.
- transistors can be applied to the transistor 102, the transistor 103, the transistor 104 and the transistor 105.
- a transistor Si transistor
- a transistor OS transistor
- a transistor using a metal oxide in the channel forming region can be applied.
- a transistor using silicon carbide, germanium, silicon germanium, gallium arsenic, gallium aluminum arsenide, indium phosphide, zinc selenium, gallium nitride, gallium oxide, or the like for the channel formation region can be applied. Further, these transistors may be applied in any combination.
- the OS transistor Since the OS transistor has a small off current, by using the OS transistor for the transistor 107, the charge of the node FD can be retained for a long period of time even when the off current of the transistor 102 and the transistor 103 is relatively large.
- the effect can be obtained even when an OS transistor is used for the transistor 102 and the transistor 103.
- the transistor 102 and the photoelectric conversion device 101 are connected via wiring. It can be connected directly without any noise, and it can be configured with less noise. In such a case, for example, by using the configurations shown in FIGS. 4A and 4B and using the OS transistor as the transistor 107, it is possible to realize a pixel circuit having less noise and capable of holding the charge of the node FD for a long time. ..
- FIG. 6 is a timing chart illustrating an example of pixel operation.
- the pixel circuit shown in FIG. 3A can be operated according to the timing chart. Further, the pixel circuit shown in FIG. 5A can also be operated by supplying the same signal potential to the wiring 131 and the wiring 134. The pixel circuit shown in FIG. 5A may be operated by supplying different signal potentials to the wiring 131 and the wiring 134.
- the potential for conducting the transistor is "H", and the potential for making the transistor non-conducting is "L". Further, it is assumed that a high potential (for example, VDD) is constantly supplied to the wiring 122 and a low potential (for example, VSS) is constantly supplied to the wiring 121.
- a high potential for example, VDD
- VSS low potential
- the transistor 102 becomes non-conducting and charge accumulation starts in the photoelectric conversion device 101 according to the intensity of the emitted light. .. Further, the transistor 103 becomes non-conducting, and the potential of the node FD is maintained.
- the transistor 102 When the potential of the wiring 131 is set to "H" at time T3, the transistor 102 conducts, and the electric charge accumulated in the cathode of the photoelectric conversion device 101 is transferred to the node FD. At this time, the potential of the node FD decreases according to the transferred charge amount.
- the transistor 105 When the potential of the wiring 133 is set to "H" at the time T5, the transistor 105 conducts, the transistor 104 operates according to the potential of the node FD, and data is output to the wiring 123. At time T6, the potential of the wiring 133 is set to “L”, and the transistor 105 is made non-conducting.
- the potential of the wiring 133 is set to “L”, and the transistor 105 is made non-conducting.
- FIG. 7 is a block diagram illustrating an image pickup apparatus according to an aspect of the present invention.
- the image pickup apparatus includes a pixel array 31 having pixels 10 arranged in a matrix, a circuit 32 (low driver) having a function of selecting rows of the pixel array 31, and a circuit 33 having a function of reading data from the pixels 10. And a circuit 38 for supplying the power supply potential.
- the number of wirings connecting each element is simplified. Further, the circuits 32, 33, and 38 may be plural.
- the circuit 33 includes a circuit 34 (CDS circuit) for performing correlated double sampling processing on the output data of the pixel 10, and a circuit 35 (A) having a function of converting analog data output from the circuit 34 into digital data. It can have a / D conversion circuit or the like) and a circuit 36 (column driver) or the like having a function of selecting a column for outputting data.
- CDS circuit circuit 34
- A circuit 35
- 36 column driver
- the transistor may be provided with a back gate.
- FIG. 8A shows a configuration in which the back gate is electrically connected to the front gate, which has the effect of increasing the on-current.
- FIG. 8B a configuration capable of supplying a constant potential to the back gate may be used. In this configuration, the threshold voltage of the transistor can be controlled. Further, the configurations of FIGS. 8A and 8B may be mixed in one circuit. Further, a transistor without a back gate may be provided.
- the imaging device has a function of holding analog data (image data) acquired in an imaging operation in pixels and extracting data obtained by multiplying the analog data by an arbitrary weighting factor. It also has a function (product-sum calculation function) of adding the data output from a plurality of pixels.
- processing such as image recognition can be performed.
- a huge amount of image data can be held in a pixel in the state of analog data and can be calculated in the pixel, so that processing can be performed efficiently.
- FIG. 9 is a block diagram illustrating an image pickup apparatus according to an aspect of the present invention.
- the image pickup apparatus includes a pixel array 300, a circuit 201, a circuit 301, a circuit 302, a circuit 303, a circuit 304, and a circuit 305.
- one or more of the circuit 201, the circuit 301, the circuit 302, the circuit 303, and the circuit 304, and the circuit 305 may have a region overlapping with the pixel array 300. With this configuration, the area of the image pickup device can be reduced.
- circuits 201 and the circuits 301 to 305 instead of the circuit 201 and the circuits 301 to 305, a circuit having two or more functions among the functions of the circuits may be used instead. Further, circuits other than the circuit 201 and the circuits 301 to 305 may be used. Further, one or more of the functions of the circuit 201 and the circuits 301 to 305 may be replaced by the operation by software. Further, some of the circuits of the circuit 201 and the circuits 301 to 305 may be outside the image pickup apparatus.
- the pixel array 300 can have an image pickup function and a calculation function.
- the circuits 201 and 301 can have an arithmetic function.
- the circuit 302 can have an arithmetic function or a data conversion function, and can output data to the wiring 311.
- the circuits 303 and 304 can have a selection function.
- the circuit 305 can have a function of supplying an electric potential (weight, etc.) to a pixel.
- a shift register, a decoder, or the like can be used for the circuit having the selection function.
- the pixel array 300 has a plurality of pixel blocks 200. As shown in FIG. 10, the pixel block 200 has a plurality of pixels 100 arranged in a matrix. The pixel 100 has wiring such as wiring 124, wiring 125, wiring 133, and wiring 135. The pixel 100 will be described in detail in FIGS. 11A and 11B. Each pixel 100 is electrically connected to the circuit 201 via wiring 124. The circuit 201 can also be provided in the pixel block 200.
- the number of pixels of the pixel block 200 is set to 3 ⁇ 3 as an example, but the number of pixels is not limited to this. For example, it can be 2 ⁇ 2, 4 ⁇ 4, or the like. Alternatively, the number of pixels in the horizontal direction and the number of pixels in the vertical direction may be different. Further, some pixels may be shared by adjacent pixel blocks.
- the pixel block 200 and the circuit 201 can be operated as a product-sum calculation circuit.
- the pixel 100 can have a photoelectric conversion device 101, a transistor 102, a transistor 103, a transistor 104, a transistor 105, a capacitor 106, and a transistor 108.
- the pixel circuit shown in FIG. 11A is different from the pixel circuit shown in FIGS. 3A and 3B of the first embodiment at a point having a transistor 108, and the other electrode of the capacitor 106 is one of the source or drain of the transistor 108.
- the points that are electrically connected, the wiring that is electrically connected to the transistor 104, and the wiring that is electrically connected to the transistor 105 are different.
- One electrode of the photoelectric conversion device 101 is electrically connected to one of the source and drain of the transistor 102.
- the other of the source or drain of the transistor 102 is electrically connected to one of the source or drain of the transistor 103, one electrode of the capacitor 106, and the gate of the transistor 104.
- One of the source or drain of the transistor 104 is electrically connected to one of the source or drain of the transistor 105.
- the other electrode of the capacitor 106 is electrically connected to one of the source or drain of the transistor 108.
- the other electrode of the photoelectric conversion device 101 is electrically connected to the wiring 121.
- the gate of the transistor 102 is electrically connected to the wiring 131.
- the other of the source or drain of the transistor 103 is electrically connected to the wiring 122.
- the gate of the transistor 103 is electrically connected to the wiring 132.
- the other of the source or drain of the transistor 104 is electrically connected to a GND wiring or the like.
- the other of the source or drain of the transistor 105 is electrically connected to the wiring 124.
- the gate of the transistor 105 is electrically connected to the wiring 133.
- the other of the source or drain of the transistor 108 is electrically connected to the wiring 125.
- the gate of the transistor 108 is electrically connected to the wiring 135.
- a node N is an electrical connection point between the other of the source or drain of the transistor 102, one of the source or drain of the transistor 103, one electrode of the capacitor 106, and the gate of the transistor 104.
- Wiring 121, 122 can have a function as a power line.
- the wiring 121 can function as a high-potential power supply line
- the wiring 122 can function as a low-potential power supply line.
- the wirings 131, 132, 133, and 135 can function as signal lines for controlling the continuity of each transistor.
- the wiring 125 can function as a wiring that supplies a potential corresponding to a weighting factor to the pixel 100.
- the wiring 124 can function as a wiring that electrically connects the pixel 100 and the circuit 201.
- An amplifier circuit or a gain adjustment circuit may be electrically connected to the wiring 124.
- a photodiode can be used as the photoelectric conversion device 101.
- the transistor 102 can have a function of controlling the potential of the node N.
- the transistor 103 can have a function of initializing the potential of the node N.
- the transistor 104 can have a function of controlling the current flowing through the circuit 201 according to the potential of the node N.
- the transistor 105 can have a function of selecting pixels.
- the transistor 108 can have a function of supplying a potential corresponding to a weighting factor to the node N.
- the transistor 104 and the transistor 105 electrically connect one of the source or drain of the transistor 104 and one of the source or drain of the transistor 105, and wire the other of the source or drain of the transistor 104. It may be connected to 124 and the other of the source or drain of the transistor 105 may be electrically connected to the GND wiring or the like.
- the direction of connection of the pair of electrodes of the photoelectric conversion device 101 may be reversed.
- the wiring 121 may function as a low-potential power supply line
- the wiring 122 may function as a high-potential power supply line.
- various transistors can be applied to the transistor 102, the transistor 103, the transistor 104, the transistor 105, and the transistor 108.
- a transistor (Si transistor) using silicon in the channel forming region can be applied.
- a transistor (OS transistor) using a metal oxide in the channel forming region can be applied.
- a transistor using silicon carbide, germanium, silicon germanium, gallium arsenic, gallium aluminum arsenide, indium phosphide, zinc selenium, gallium nitride, gallium oxide, or the like for the channel formation region can be applied. Further, these transistors may be applied in any combination.
- the OS transistor has a characteristic that the off current is extremely low.
- the period during which the electric charge can be held at the node N can be made extremely long. Further, it is possible to apply a global shutter method in which charge storage operation is simultaneously performed on all pixels without complicating the circuit configuration and operation method. Further, it is also possible to perform a plurality of operations using the image data while holding the image data in the node N.
- Si transistors may be particularly excellent in amplification characteristics. Therefore, for example, a Si transistor can be preferably used as the transistor 104.
- Si transistors have high mobility and can operate at higher speeds. Therefore, for example, a Si transistor can be preferably used as the transistor 105 and the transistor 108.
- the potential of the node N in the pixel 100 is determined by the sum of the reset potential supplied from the wiring 122 and the potential (image data) generated by the photoelectric conversion by the photoelectric conversion device 101.
- the potential corresponding to the weighting coefficient supplied from the wiring 125 is capacitively coupled and determined. Therefore, the transistor 104 can pass a current corresponding to the data in which an arbitrary weighting factor is added to the image data.
- each pixel 100 is electrically connected to each other by wiring 124.
- the circuit 201 can perform an operation using the sum of the currents flowing through the transistor 104 of each pixel 100.
- the circuit 201 includes a capacitor 202, a transistor 203, a transistor 204, a transistor 205, a transistor 206, and a transistor 207 as a voltage conversion circuit.
- An appropriate analog potential (Bias) is applied to the gate of the transistor 207.
- One electrode of the capacitor 202 is electrically connected to one of the source or drain of the transistor 203 and the gate of the transistor 204.
- One of the source or drain of transistor 204 is electrically connected to one of the source or drain of transistor 205 and one of the source or drain of transistor 206.
- the other electrode of the capacitor 202 is electrically connected to one of the wiring 124 and the source or drain of the transistor 207.
- the other side of the source or drain of the transistor 203 is electrically connected to the wiring 218.
- the other of the source or drain of transistor 204 is electrically connected to wiring 219.
- the other of the source or drain of the transistor 205 is electrically connected to a reference power line such as GND wiring.
- the other of the source or drain of the transistor 206 is electrically connected to the wiring 212.
- the other of the source or drain of transistor 207 is electrically connected to wiring 217.
- the gate of the transistor 203 is electrically connected to the wiring 216.
- the gate of the transistor 205 is electrically connected to the wiring 215.
- the gate of the transistor 206 is electrically connected to the wiring 213.
- Wiring 217, 218, 219 can have a function as a power line.
- the wiring 218 can have a function as a wiring for supplying a reset potential (Vr) for reading.
- Wiring 217 and 219 can function as high potential power lines.
- the wirings 213, 215, and 216 can function as signal lines for controlling the continuity of each transistor.
- the wiring 212 is an output line and can be electrically connected to, for example, the circuit 301 shown in FIG.
- the transistor 203 can have a function of resetting the potential of the wiring 211 to the potential of the wiring 218.
- the transistors 204 and 205 can have a function as a source follower circuit.
- the transistor 206 can have a function of controlling reading.
- the circuit 201 has a function as a correlated double sampling circuit (CDS circuit), and can be replaced with a circuit having another configuration having the function.
- CDS circuit correlated double sampling circuit
- an offset component other than the product of the image data (X) and the weighting factor (W) is removed, and the target WX is extracted.
- the WX can be calculated by using the data with exposure (with imaging) and without exposure (without imaging) acquired by the same pixel and the data when weights are given to each of them.
- the total current (I p ) flowing through the pixel 100 when exposed is k ⁇ (X-V th ) 2
- the total current (I p ) flowing through the pixel 100 when weighted is k ⁇ (W + X-V th ).
- the total current (I ref ) flowing through the pixel 100 without exposure is k ⁇ (0 ⁇ V th ) 2
- the total current (I ref ) flowing through the pixel 100 when weighted is k ⁇ (W ⁇ ).
- V th ) 2 is a constant and Vth is the threshold voltage of the transistor 104.
- circuit 201 data A and data B can be read out.
- the difference calculation between the data A and the data B can be performed by, for example, the circuit 301.
- FIG. 12A is a timing chart illustrating an operation of calculating the difference (data A) between the data with exposure and the data weighted to the data in the pixel block 200 and the circuit 201.
- the timing at which each signal is converted is also shown for convenience, it is actually preferable to shift the signal in consideration of the delay inside the circuit. Further, in the following description, the high potential is represented by “H” and the low potential is represented by "L”.
- the potential of the wiring 132 is set to "H”
- the potential of the wiring 131 is set to "H”
- the node N of the pixel 100 is set to the reset potential.
- the potential of the wiring 125 is set to "L”
- the potential of the wirings 135_1 to 135_3 (wiring 135 in the first to third rows) is set to "H”
- the weighting coefficient 0 is written.
- the potential X (image data) is written to the node N by the photoelectric conversion of the photoelectric conversion device 101.
- the potentials of the wiring 133 (referred to as wiring 133_1, wiring 133_2, and wiring 133_3, respectively) connected to each of the pixel 100 in the first row, the pixel 100 in the second row, and the pixel 100 in the third row in FIG. All the pixels 100 in the pixel block are selected as "H”.
- a current corresponding to the potential X flows through the transistor 104 of each pixel 100.
- the potential Vr of the wiring 218 is written in the wiring 211.
- the operation of the periods T1 to T3 corresponds to the acquisition of data with exposure, and the data is initialized to the potential Vr of the wiring 211.
- the potential of the wiring 125 is set to the potential corresponding to the weighting coefficient W11 (weight applied to the pixel in the first row), and the potential of the wiring 135_1 is set to “H”, so that the node N of the pixel 100 in the first row is set.
- the weighting coefficient W11 is added to the capacitor 106 by the capacitive coupling.
- the potential of the wiring 125 is set to the potential corresponding to the weighting coefficient W12 (weight applied to the pixel in the second row), and the potential of the wiring 135_2 is set to “H”, so that the node N of the pixel 100 in the second row is N.
- the weighting coefficient W12 is added to the capacitor 106 by the capacitive coupling.
- the potential of the wiring 125 is set to the potential corresponding to the weighting coefficient W13 (weight applied to the pixel in the third row), and the potential of the wiring 135_3 is set to “H”, so that the node N of the pixel 100 in the third row is N.
- the weighting coefficient W13 is added to the capacitor 106 by the capacitive coupling.
- all the pixels 100 in the pixel block are selected with the potentials of the wiring 133_1, the wiring 133_2, and the wiring 133_3 as “H”.
- a current corresponding to the potential W11 + X flows through the transistor 104 of the pixel 100 in the first row.
- a current corresponding to the potential W12 + X flows through the transistor 104 of the pixel 100 in the second row.
- a current corresponding to the potential W13 + X flows through the transistor 104 of the pixel 100 in the third row.
- the potential of the other electrode of the capacitor 202 changes according to the current flowing through the wiring 124, and the change Y is added to the potential Vr of the wiring 211 by capacitive coupling. Therefore, the potential of the wiring 211 becomes "Vr + Y".
- Vr 0, Y is the difference itself, and the data A is calculated.
- the circuit 201 responds to the data A of the pixel block 200 in the first row by the source follower operation.
- the signal potential can be output.
- FIG. 12B is a timing chart illustrating an operation of calculating the difference (data B) between the unexposed data and the data weighted to the data in the pixel block 200 and the circuit 201.
- the data B may be acquired as needed. For example, if there is no change in the input weight, the acquired data B may be stored in the memory and the data B may be read from the memory. In addition, a plurality of data B corresponding to a plurality of weights may be stored in the memory. Further, either data A or data B may be acquired first.
- the potential of the wiring 132 is set to "H”
- the potential of the wiring 131 is set to "H”
- the node N of the pixel 100 is set to the reset potential (0).
- the potential of the wiring 132 is set to “L” and the potential of the wiring 131 is set to “L”. That is, during the period, the potential of the node N is the reset potential regardless of the operation of the photoelectric conversion device 101.
- the potential of the wiring 125 is set to "L”
- the wirings 135_1, 135_2, and 135_3 are set to "H”
- the weight coefficient 0 is written.
- the operation may be performed during the period when the potential of the node N is the reset potential.
- the potential of the wiring 125 is set to the potential corresponding to the weighting coefficient W11 (weight applied to the pixel in the first row), and the potential of the wiring 135_1 is set to “H”, so that the node N of the pixel 100 in the first row is set.
- the weighting coefficient W11 is added to the capacitor 106 by the capacitive coupling.
- the potential of the wiring 125 is set to the potential corresponding to the weighting coefficient W12 (weight applied to the pixel in the second row), and the potential of the wiring 135_2 is set to “H”, so that the node N of the pixel 100 in the second row is N.
- the weighting coefficient W12 is added to the capacitor 106 by the capacitive coupling.
- period T6 the potential of the wiring 125 is set to the potential corresponding to the weighting coefficient W13 (weight applied to the pixel in the third row), and the potential of the wiring 135_3 is set to “H”, so that the node N of the pixel 100 in the third row is N.
- the weighting coefficient W13 is added to the capacitor 106 by the capacitive coupling.
- Period T4 The operation of period T6 corresponds to the generation of weighted data without imaging.
- the potential of the other electrode of the capacitor 202 changes according to the current flowing through the wiring 124, and the change Y is added to the potential Vr of the wiring 211. Therefore, the potential of the wiring 211 becomes "Vr + Z".
- Vr 0, Z is the difference itself, and the data B is calculated.
- the circuit 201 responds to the data B of the pixel block 200 in the first row by the source follower operation.
- the signal potential can be output.
- Data A and data B output from the circuit 201 by the above operation are input to the circuit 301.
- an operation for taking the difference between the data A and the data B is performed, and an unnecessary offset component other than the product of the image data (potential X) and the weighting coefficient (potential W) can be removed.
- the circuit 301 may be configured to have an arithmetic circuit such as the circuit 201, or may be configured to take a difference by using a memory circuit and software processing.
- the operation corresponds to the initial operation of the neural network that performs inference and the like. Therefore, at least one calculation can be performed in the image pickup device before taking out a huge amount of image data to the outside, reducing the load such as external calculation and data input / output, speeding up processing, and power consumption. It can be reduced.
- the potential of the wiring 211 of the circuit 201 may be initialized to a different potential by the data A acquisition operation and the data B acquisition operation.
- the potential “Vr1” is initialized during the acquisition operation of the data A
- the potential “Vr2” is initialized during the acquisition operation of the data B.
- “(Vr1 + Y)-(Vr2 + Z)” "(Vr1-Vr2) + (Y-Z)”.
- “YZ” is extracted as the product of the image data (potential X) and the weighting coefficient (potential W) in the same manner as in the above operation, and “Vr1-Vr2” is further added.
- Vr1-Vr2 corresponds to the bias used as the threshold adjustment in the calculation of the intermediate layer of the neural network.
- the weight has a role of a filter of, for example, a convolutional neural network (CNN), but may also have a role of amplifying or attenuating data in addition to the role of a filter.
- the weighting coefficient (W) at the time of the acquisition operation of the data A is the product of the filtered portion and the amplified portion
- the product of the image data and the weighted coefficient of the filtered portion is amplified and the data is corrected to a bright image.
- the data B is data without imaging and can be said to be black level data. Therefore, it can be said that the operation of taking the difference between the data A and the data B is an operation for promoting the visualization of the image captured in the dark place. That is, it is possible to correct the luminance using a neural network.
- the present invention it is possible to generate a bias by operating in the image pickup apparatus. It is also possible to add functional weights within the image pickup device. Therefore, it is possible to reduce the load of external calculation and the like, and it can be used for various purposes. For example, in addition to inferring the subject, resolution correction of image data, brightness correction, generation of color images from monochrome images, generation of 3D images from 2D images, restoration of missing information, generation of moving images from still images, out-of-focus. In processing such as image correction, a part of the processing can be performed in the image pickup apparatus.
- FIG. 13A is a diagram illustrating a circuit 301 and a circuit 302 connected to the circuit 201.
- the data of the product-sum calculation result output from the circuit 201 is sequentially input to the circuit 301.
- the circuit 301 may have various calculation functions in addition to the above-mentioned function of calculating the difference between the data A and the data B.
- the circuit 301 can have the same configuration as the circuit 201.
- the function of the circuit 301 may be replaced by processing by software.
- the circuit 301 may have a circuit that performs an operation of the activation function.
- a comparator circuit can be used for the circuit.
- the comparator circuit outputs the result of comparing the input data with the set threshold value as binary data. That is, the pixel block 200 and the circuit 301 can act as a part of the neural network.
- the circuit 301 may have an A / D converter.
- the circuit 301 can convert the analog data into digital data.
- the pixel block 200 having 3 ⁇ 3 pixels 100, if the weight supplied to all the pixels 100 is the same (for example, 0) and the transistor 108 of the pixel for which data is to be output is conducted, the pixel block The sum of the image data of the entire 200, the sum of the image data for each row, the data for each pixel, and the like can be output from the pixel block 200.
- the data output by the pixel block 200 corresponds to the image data of a plurality of bits, but if it can be binarized by the circuit 301, it can be said that the image data is compressed.
- the data output from the circuit 301 is sequentially input to the circuit 302.
- the circuit 302 can be configured to include, for example, a latch circuit and a shift register. With this configuration, parallel serial conversion can be performed, and the data input in parallel can be output to the wiring 311 as serial data.
- the circuit 302 may have a neural network.
- the neural network has memory cells arranged in a matrix, and each memory cell holds a weighting coefficient.
- the data output from the circuit 301 is input to each of the memory cells 320, and the product-sum operation can be performed.
- the number of memory cells shown in FIG. 13B is an example, and is not limited thereto.
- the data after the product-sum calculation can be output to the wiring 311.
- connection destination of the wiring 311 is not limited.
- it can be connected to a neural network, a storage device, a communication device, or the like.
- the neural network shown in FIG. 13B has a memory cell 320 and a reference memory cell 325 installed in a matrix, a circuit 330, a circuit 350, a circuit 360, and a circuit 370.
- FIG. 14 shows an example of the memory cell 320 and the reference memory cell 325.
- Reference memory cells 325 are provided in any one row.
- the memory cell 320 and the reference memory cell 325 have a similar configuration and include a transistor 161 and a transistor 162 and a capacitor 163.
- One of the source and drain of the transistor 161 is electrically connected to the gate of the transistor 162.
- the gate of the transistor 162 is electrically connected to one electrode of the capacitor 163.
- a node NM is a point to which one of the source and drain of the transistor 161, the gate of the transistor 162, and one electrode of the capacitor 163 are connected.
- the gate of the transistor 161 is electrically connected to the wiring WL.
- the other electrode of the capacitor 163 is electrically connected to the wiring RW.
- One of the source and drain of the transistor 162 is electrically connected to a reference potential wiring such as a GND wiring.
- the other side of the source or drain of the transistor 161 is electrically connected to the wiring WD.
- the other of the source or drain of the transistor 162 is electrically connected to the wiring BL.
- the other of the source or drain of the transistor 161 is electrically connected to the wiring WDref.
- the other of the source or drain of the transistor 162 is electrically connected to the wiring BLref.
- the wiring WL is electrically connected to the circuit 330.
- a decoder, a shift register, or the like can be used for the circuit 330.
- the wiring RW is electrically connected to the circuit 301.
- Binary data output from the circuit 301 is written in each memory cell. It should be noted that a sequential circuit such as a shift register may be provided between the circuit 301 and each memory cell.
- the wiring WD and the wiring WDref are electrically connected to the circuit 350.
- a decoder, a shift register, or the like can be used in the circuit 350.
- the circuit 350 may have a D / A converter or SRAM.
- the circuit 350 can output the weighting factor written to the node NM.
- the wiring BL and the wiring BLref are electrically connected to the circuit 360.
- the circuit 360 can have the same configuration as the circuit 201.
- the circuit 360 can obtain a signal obtained by removing the offset component from the product-sum calculation result.
- the circuit 360 is electrically connected to the circuit 370.
- the circuit 370 can also be rephrased as an activation function circuit.
- the activation function circuit has a function of performing an operation for converting a signal input from the circuit 360 according to a predefined activation function.
- As the activation function for example, a sigmoid function, a tanh function, a softmax function, a ReLU function, a threshold function, and the like can be used.
- the signal converted by the activation function circuit is output to the outside as output data.
- the neural network NN can be composed of an input layer IL, an output layer OL, and an intermediate layer (hidden layer) HL.
- the input layer IL, the output layer OL, and the intermediate layer HL each have one or more neurons (units).
- the intermediate layer HL may be one layer or two or more layers.
- a neural network having two or more intermediate layers HL can also be called a DNN (deep neural network). Learning using a deep neural network can also be called deep learning.
- Input data is input to each neuron in the input layer IL.
- the output signals of the neurons in the anterior layer or the posterior layer are input to each neuron in the middle layer HL.
- the output signal of the neuron in the anterior layer is input to each neuron in the output layer OL.
- each neuron may be connected to all neurons in the anterior and posterior layers (fully connected), or may be connected to some neurons.
- FIG. 15B shows an example of an operation by a neuron.
- two neurons in the presheaf layer that output a signal to the neuron N are shown.
- the output x 1 of the presheaf neuron and the output x 2 of the presheaf neuron are input to the neuron N.
- the sum of the multiplication result of the output x 1 and the weight w 1 (x 1 w 1 ) and the multiplication result of the output x 2 and the weight w 2 (x 2 w 2 ) is x 1 w 1 + x 2 w 2 .
- the operation by the neuron includes the operation of adding the product of the output of the neuron in the previous layer and the weight, that is, the product-sum operation (x 1 w 1 + x 2 w 2 above).
- This product-sum operation may be performed by software using a program or by hardware.
- the product-sum calculation is performed using an analog circuit as hardware.
- an analog circuit is used for the product-sum calculation circuit, it is possible to improve the processing speed and reduce the power consumption by reducing the circuit scale of the product-sum calculation circuit or reducing the number of times the memory is accessed.
- the product-sum calculation circuit is preferably configured to have an OS transistor. Since the OS transistor has an extremely small off current, it is suitable as a transistor constituting an analog memory of a product-sum calculation circuit.
- a product-sum calculation circuit may be configured by using both a Si transistor and an OS transistor.
- the photoelectric conversion device 101C shown in FIG. 16A is an example of a structure that can be used for the photoelectric conversion device 101 included in the layer 24 shown in the first embodiment.
- the photoelectric conversion device 101C can have a layer 565a and a layer 565b. In some cases, the layer may be referred to as a region.
- the photoelectric conversion device 101C is a pn junction type photodiode.
- a p-type semiconductor can be used for the layer 565a and an n-type semiconductor can be used for the layer 565b.
- an n-type semiconductor may be used for the layer 565a and a p-type semiconductor may be used for the layer 565b.
- the photoelectric conversion device 101D shown in FIG. 16B may be used for the photoelectric conversion device 101.
- the photoelectric conversion device 101D is a pin junction type photodiode.
- a p-type semiconductor can be used for the layer 565a
- an i-type semiconductor can be used for the layer 565c
- an n-type semiconductor can be used for the layer 565b.
- an n-type semiconductor may be used for the layer 565a and a p-type semiconductor may be used for the layer 565b.
- the pn junction type photodiode and the pin junction type diode can be typically formed by using single crystal silicon.
- a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used.
- a typical example is an oxide semiconductor containing indium, and for example, CAAC-OS or CAC-OS, which will be described later, can be used.
- CAAC-OS is suitable for transistors and the like in which the atoms constituting the crystal are stable and reliability is important. Further, since the CAC-OS exhibits high mobility characteristics, it is suitable for a transistor or the like that is driven at high speed.
- the OS transistor Since the OS transistor has a large energy gap in the semiconductor layer, it exhibits an extremely low off-current characteristic of several yA / ⁇ m (current value per 1 ⁇ m of channel width). Further, the OS transistor has features different from those of the Si transistor such as impact ionization, avalanche breakdown, and short channel effect, and can form a circuit having high withstand voltage and high reliability. In addition, variations in electrical characteristics due to crystallinity non-uniformity, which is a problem with Si transistors, are unlikely to occur with OS transistors.
- the semiconductor layer of the OS transistor includes, for example, indium, zinc and M (one or more selected from metals such as aluminum, titanium, gallium, germanium, ittrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium). It can be a film represented by an In—M—Zn-based oxide containing.
- the In-M-Zn-based oxide can be formed by, for example, a sputtering method, an ALD (Atomic layer deposition) method, a MOCVD (Metalorganic chemical vapor deposition) method, or the like.
- the atomic number ratio of the metal element of the sputtering target satisfies In ⁇ M and Zn ⁇ M.
- the atomic number ratio of the semiconductor layer to be formed includes a variation of plus or minus 40% of the atomic number ratio of the metal element contained in the sputtering target.
- the semiconductor layer an oxide semiconductor having a low carrier density is used.
- the semiconductor layer has a carrier density of 1 ⁇ 10 17 / cm 3 or less, preferably 1 ⁇ 10 15 / cm 3 or less, more preferably 1 ⁇ 10 13 / cm 3 or less, and more preferably 1 ⁇ 10 11 / cm.
- Oxide semiconductors of 3 or less, more preferably less than 1 ⁇ 10 10 / cm 3 and 1 ⁇ 10 -9 / cm 3 or more can be used.
- Such oxide semiconductors are referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. It can be said that the oxide semiconductor is an oxide semiconductor having a low defect level density and stable characteristics.
- a transistor having an appropriate composition may be used according to the required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. Further, in order to obtain the required semiconductor characteristics of the semiconductor, it is preferable that the carrier density, impurity concentration, defect density, atomic number ratio between metal element and oxygen, interatomic distance, density, etc. of the semiconductor layer are appropriate. ..
- the concentration of silicon or carbon in the semiconductor layer is set to 2 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
- the concentration of the alkali metal or alkaline earth metal in the semiconductor layer is 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less.
- the nitrogen concentration in the semiconductor layer is preferably 5 ⁇ 10 18 atoms / cm 3 or less.
- the oxide semiconductor constituting the semiconductor layer contains hydrogen, it reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency in the oxide semiconductor. If the channel formation region in the oxide semiconductor contains oxygen deficiency, the transistor may have normally-on characteristics. In addition, a defect containing hydrogen in an oxygen deficiency may function as a donor and generate electrons as carriers. In addition, a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have normally-on characteristics.
- Defects containing hydrogen in oxygen deficiencies can function as donors for oxide semiconductors. However, it is difficult to quantitatively evaluate the defect. Therefore, in oxide semiconductors, the carrier concentration may be used for evaluation instead of the donor concentration. Therefore, in the present specification and the like, as a parameter of the oxide semiconductor, a carrier concentration assuming a state in which an electric field is not applied may be used instead of the donor concentration. That is, the "carrier concentration" described in the present specification and the like may be paraphrased as a "donor concentration".
- the hydrogen concentration obtained by secondary ion mass spectrometry is less than 1 ⁇ 10 20 atoms / cm 3 , preferably 1 ⁇ 10 19 atoms / cm. It is less than 3 , more preferably less than 5 ⁇ 10 18 atoms / cm 3 , and even more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
- the semiconductor layer may have, for example, a non-single crystal structure.
- the non-single crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor) having crystals oriented on the c-axis, a polycrystalline structure, a microcrystal structure, or an amorphous structure.
- CAAC-OS C-Axis Aligned Crystalline Oxide Semiconductor
- the amorphous structure has the highest defect level density
- CAAC-OS has the lowest defect level density.
- the oxide semiconductor film having an amorphous structure has a disordered atomic arrangement and does not have a crystal component.
- the oxide film having an amorphous structure is, for example, a completely amorphous structure and has no crystal portion.
- the semiconductor layer is a mixed film having two or more of an amorphous structure region, a microcrystal structure region, a polycrystal structure region, a CAAC-OS region, and a single crystal structure region.
- the mixed film may have, for example, a single-layer structure or a laminated structure including any two or more of the above-mentioned regions.
- CAC Cloud-Aligned Complex
- CAC-OS is, for example, a composition of a material in which elements constituting an oxide semiconductor are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof.
- the oxide semiconductor one or more metal elements are unevenly distributed, and the region having the metal elements is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or a size in the vicinity thereof.
- the state of being mixed in is also called a mosaic shape or a patch shape.
- the oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. Also, in addition to them, aluminum, gallium, ittrium, copper, vanadium, berylium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc. One or more selected from the above may be included.
- CAC-OS in In-Ga-Zn oxide is an indium oxide (hereinafter, InO).
- InO indium oxide
- X1 X1 is a real number larger than 0
- In X2 Zn Y2 O Z2 X2, Y2, and Z2 are real numbers larger than 0
- gallium With an oxide (hereinafter, GaO X3 (X3 is a real number larger than 0)) or gallium zinc oxide (hereinafter, Ga X4 Zn Y4 O Z4 (X4, Y4, and Z4 are real numbers larger than 0)).
- Ga X4 Zn Y4 O Z4 X4, Y4, and Z4 are real numbers larger than 0
- the CAC-OS is a composite oxide semiconductor having a structure in which a region containing GaO X3 as a main component and a region containing In X2 Zn Y2 O Z2 or InO X1 as a main component are mixed.
- the atomic number ratio of In to the element M in the first region is larger than the atomic number ratio of In to the element M in the second region. It is assumed that the concentration of In is higher than that in the region 2.
- IGZO is a common name and may refer to one compound consisting of In, Ga, Zn, and O. As a typical example, it is represented by InGaO 3 (ZnO) m1 (m1 is a natural number) or In (1 + x0) Ga (1-x0) O 3 (ZnO) m0 (-1 ⁇ x0 ⁇ 1, m0 is an arbitrary number). Crystalline compounds can be mentioned.
- the crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure.
- the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without being oriented on the ab plane.
- CAC-OS relates to the material composition of oxide semiconductors.
- CAC-OS is a region that is observed in the form of nanoparticles mainly composed of Ga in a material structure containing In, Ga, Zn, and O, and nanoparticles mainly composed of In. The regions observed in the shape are randomly dispersed in a mosaic pattern. Therefore, in CAC-OS, the crystal structure is a secondary element.
- CAC-OS does not include a laminated structure of two or more types of films having different compositions. For example, it does not include a structure consisting of two layers, a film containing In as a main component and a film containing Ga as a main component.
- CAC-OS has a region observed in the form of nanoparticles mainly composed of the metal element and a nano portion containing In as a main component.
- the regions observed in the form of particles refer to a configuration in which the regions are randomly dispersed in a mosaic pattern.
- CAC-OS can be formed by a sputtering method, for example, under the condition that the substrate is not heated.
- a sputtering method one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas may be used as the film forming gas. good.
- the lower the flow rate ratio of the oxygen gas to the total flow rate of the film-forming gas at the time of film formation is preferable, and for example, the flow rate ratio of the oxygen gas is preferably 0% or more and less than 30%, preferably 0% or more and 10% or less. ..
- CAC-OS is characterized by the fact that no clear peak is observed when measured using the ⁇ / 2 ⁇ scan by the Out-of-plane method, which is one of the X-ray diffraction (XRD) measurement methods. Have. That is, from the X-ray diffraction measurement, it can be seen that the orientation of the measurement region in the ab plane direction and the c axis direction is not observed.
- XRD X-ray diffraction
- the CAC-OS has a ring-shaped high-brightness region (ring region) and the ring in the electron diffraction pattern obtained by irradiating an electron beam (also referred to as a nanobeam electron beam) having a probe diameter of 1 nm. Multiple bright spots are observed in the area. Therefore, from the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure having no orientation in the planar direction and the cross-sectional direction.
- nc nano-crystal
- GaO X3 is the main component by EDX mapping obtained by using energy dispersive X-ray spectroscopy (EDX). It can be confirmed that the region and the region containing In X2 Zn Y2 O Z2 or InO X1 as a main component have a structure in which they are unevenly distributed and mixed.
- EDX energy dispersive X-ray spectroscopy
- CAC-OS has a structure different from that of the IGZO compound in which metal elements are uniformly distributed, and has properties different from those of the IGZO compound. That is, the CAC-OS is phase-separated into a region containing GaO X3 or the like as a main component and a region containing In X2 Zn Y2 O Z2 or InO X1 as a main component, and a region containing each element as a main component. Has a mosaic-like structure.
- the region in which In X2 Zn Y2 O Z2 or InO X1 is the main component is a region having higher conductivity than the region in which GaO X3 or the like is the main component. That is, the conductivity as an oxide semiconductor is exhibited by the carrier flowing through the region where In X2 Zn Y2 O Z2 or InO X1 is the main component. Therefore, a high field effect mobility ( ⁇ ) can be realized by distributing the region containing In X2 Zn Y2 O Z2 or InO X1 as a main component in the oxide semiconductor in a cloud shape.
- the region in which GaO X3 or the like is the main component is a region having higher insulating properties than the region in which In X2 Zn Y2 O Z2 or InO X1 is the main component. That is, since the region containing GaO X3 or the like as the main component is distributed in the oxide semiconductor, leakage current can be suppressed and good switching operation can be realized.
- CAC-OS when CAC-OS is used for a semiconductor element, the insulating property caused by GaO X3 and the like and the conductivity caused by In X2 Zn Y2 O Z2 or InO X1 act in a complementary manner, so that the insulation is high. On current (Ion) and high field effect mobility ( ⁇ ) can be achieved.
- CAC-OS is suitable as a constituent material for various semiconductor devices.
- the cross-sectional view corresponds to a plane in the height direction including the alternate long and short dash line A1-A2 shown in layer 24 of FIG.
- the elements such as the insulating layer and the conductive layer shown below are examples, and other elements may be included. Alternatively, some of the elements shown below may be omitted.
- the laminated structure shown below can be formed by repeating a film forming step, a polishing step, and the like, if necessary.
- FIG. 17 is an example of a cross-sectional view of an image pickup apparatus to which the layout shown in FIG. 4 is applied.
- the layer 24 shows a transistor 102 and a transistor 103 as transistors having a channel forming region on the substrate 441. Further, the layer 24 shows a photoelectric conversion device 101 and a capacitor 106. Although not shown in FIG. 17, it is preferable to apply a transistor having a channel forming region to the substrate 441 as a configuration of the transistor 104 and the transistor 105. Further, FIG. 17 shows an example in which a transistor having a channel forming region is applied to the substrate 441 as a configuration of the transistor 102 and the transistor 103, but an OS transistor may be applied.
- FIG. 17 Although the transistor is shown in a planar type in FIG. 17, it may be a fin type as shown in FIGS. 18A and 18B.
- 18A is a cross-sectional view in the channel length direction
- FIG. 18B is a cross-sectional view in the channel width direction at the position of the alternate long and short dash line B1-B2 shown in FIG. 18A.
- the semiconductor layer 417 can be, for example, single crystal silicon (SOI (Silicon on Insulator)) formed on the insulating layer 416 on the substrate 441 of the layer 24.
- SOI Silicon on Insulator
- the photoelectric conversion device 101 shown in the layer 24 has the configuration of the pn junction type photodiode shown in FIG. 16A, and is composed of the layer 441n (n-type region) and the layer 441p (p-type region, a part of the substrate 441). There is.
- the photoelectric conversion device 101 possessed by one pixel is surrounded by the element separation layer 443 and is separated from the photoelectric conversion device 101 of adjacent pixels.
- the element separation layer 443 may have a function as a light-shielding layer or a reflection layer.
- an inorganic insulating layer, an organic insulating layer, or the like can be used as the element separation layer 443.
- a space may be provided in a part of the element separation layer 443.
- the space may have a gas such as air or an inert gas. Further, the space may be in a decompressed state.
- the transistor 102 when the transistor 102 is an n-channel type and the conductive type of each low resistance region functioning as a source and a drain is an n-type, one of the source or drain of the transistor 102 and n of the photoelectric conversion device 101. Is shared with the type area. In this configuration, the charge can be completely transferred by completely depleting the photoelectric conversion device 101, and noise can be reduced. Further, the region 441n_2 formed on the substrate 441 functions as the source or drain of the transistor 102.
- the transistor 103 and the transistor 102 each have a gate electrode and a gate insulating layer, and in each transistor, the gate insulating layer is sandwiched between the gate electrode and the layer 441p.
- the electrode 102G functions as a gate electrode of the transistor 102.
- the insulating layer 222 is provided so as to cover the transistor 102, the transistor 103, and the photoelectric conversion device 101
- the insulating layer 223 is provided so as to cover the insulating layer 222
- the insulating layer 222 and the insulating layer 223 are provided. Is located between the substrate 441 and the capacitor 106.
- the layer 24 has a capacitor 106.
- the capacitor 106 has a wiring 128, a wiring 129, and an insulating layer 226 sandwiched between the wiring 128 and the wiring 129 and functioning as a dielectric. In FIG. 17, the capacitor 106 superimposes on the transistor 102, the transistor 103, and the photoelectric conversion device 101.
- the wiring 128 and the wiring 121 are provided, for example, in contact with the insulating layer 223. Further, in the configuration shown in FIG. 17, the wiring 128 is electrically connected to one of the source and the drain of the transistor 103 via a plug provided in the insulating layer 223, and the wiring 121 is in the insulating layer 223 and the insulating layer 242. It is electrically connected to the layer 441p via a plug provided in.
- the insulating layer 227 is provided so as to cover the capacitor 106, and the insulating layer 227 is located on the insulating layer 412 provided on the layer 21. In the configuration shown in FIG. 17 and the like, it is preferable to bond the insulating layer 227 and the insulating layer 412.
- an inorganic insulating film such as a silicon oxide film or an organic insulating film such as an acrylic resin or a polyimide resin can be used.
- a silicon nitride film, a silicon oxide film, an aluminum oxide film and the like may be laminated.
- Conductors that can be used as wiring, electrodes and plugs for electrical connections between devices include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten and hafnium. , Vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc. Etc. may be appropriately selected and used.
- the conductor is not limited to a single layer, and may be a plurality of layers made of different materials.
- the layer 25 is provided with a light-shielding layer 451 and an optical conversion layer.
- the color filter 452G1 is shown as the optical conversion layer.
- the layer 26 has an insulating layer 461 and a microlens array 462.
- the light passing through the individual lenses of the microlens array 462 passes through the optical conversion layer directly below and irradiates the photoelectric conversion device 101.
- the microlens array 462 the collected light can be incident on the photoelectric conversion device 101, so that photoelectric conversion can be performed efficiently.
- the microlens array 462 is preferably formed of a resin or glass having high translucency with respect to light of a target wavelength.
- the light-shielding layer 451 can suppress the inflow of light to adjacent pixels.
- a material having a light-shielding property can be used for the light-shielding layer 451.
- a material having a light transmittance of 15% or less can be used. More specifically, for example, a material having a light transmittance of 15% or less detected by the photoelectric conversion device 101 can be used.
- a metal layer such as aluminum, tungsten, titanium, tantalum, molybdenum, chromium, or copper can be used. Further, the metal layer and the dielectric film may be laminated.
- the dielectric film has a function as an antireflection film.
- a color filter can be used for the optical conversion layer.
- a color image can be obtained by assigning colors such as R (red), G (green), B (blue), Y (yellow), C (cyan), and M (magenta) to the color filter for each pixel.
- visible light refers to, for example, light of 360 nm or more and 760 nm or less.
- FIG. 19A shows a light-shielding layer 451, a plurality of photoelectric conversion devices 101 arranged in a matrix, a microlens array 462, and an optical conversion layer 452.
- FIG. 19B shows a diagram in which the optical conversion layer 452 is omitted in FIG. 19A in order to make the photoelectric conversion device 101 and the microlens array 462 easier to see.
- the light-shielding layer 451 is arranged in a grid pattern and has openings arranged in a matrix pattern. It is preferable that each of the plurality of photoelectric conversion devices 101 is arranged so that at least a part thereof is superimposed on the opening of the light shielding layer 451.
- the color filter 452R red
- the color filter 452G1 green
- the color filter 452G2 green
- the color filter 452B blue
- the arrangement of the optical conversion layers shown in FIG. 19A may be referred to as a Bayer arrangement.
- an example is shown in which one, one, or two color filters corresponding to red, blue, and green are used, but two color filters corresponding to red, blue, and green are used. It may be one, one, or one, or one, two, or one color filter corresponding to red, blue, and green, respectively.
- the arrangement of the optical conversion layers can use adjacent 2 rows and 2 columns of pixels as color filters of the same color.
- the arrangement of the optical conversion layers shown in FIG. 20A may be referred to as a quad Bayer arrangement.
- the quad Bayer array is effective as a method of widening the dynamic range in a high-resolution image pickup device.
- four pixels of the same color are arranged adjacent to each other. By processing the light detected by each of the four pixels of the same color as signals of different pixels, a high-resolution image can be obtained. Further, when the illuminance is low, the sensitivity can be increased and the dynamic range can be widened by operating adjacent four pixels of the same color as one pixel.
- the ratio of the number of color filters corresponding to red: blue: green is 1: 1: 2 is shown, but the color filters corresponding to red: blue: green are shown.
- the ratio of the number of color filters may be 2: 1: 1, or the ratio of the number of color filters corresponding to red: blue: green may be 1: 2: 1.
- FIGS. 19A and 20A show a configuration in which one microlens is provided for one photoelectric conversion device 101, but as shown in FIG. 20B, two rows and two columns of pixels having the same color filter (2 rows and 2 columns). A microlens may be provided for a total of 4 pixels).
- a light-shielding layer 451 is arranged between adjacent color filters, and the light-shielding layer 451 suppresses the inflow of light to adjacent pixels and suppresses color mixing in adjacent pixels. be able to.
- the light-shielding layer 451 can be not provided between the adjacent color filters of the same color.
- the light-receiving area of the pixel can be widened. Therefore, the sensitivity of the image pickup device can be increased, and the dynamic range of the image pickup device can be further expanded.
- a conductor having translucency can be used.
- a metal oxide having a transmittance of 70% or more and 100% or less, preferably 80% or more and less than 100% with respect to visible light is used.
- the translucent conductor indium oxide, tin oxide, zinc oxide, indium-tin oxide, gallium-zinc oxide, indium-gallium-zinc oxide, graphene and the like can be used.
- the photoelectric conversion device 101 has a pixel 10 whose approximately half surface is covered with a light-shielding layer 451.
- the pixel 10 having the opening of the light-shielding layer 451 superimposed on the left half surface of the photoelectric conversion device 101 is named pixel 10_L.
- the substantially right half surface of the photoelectric conversion device 101 and the light-shielding layer 451 are superimposed.
- the pixel 10 having the opening of the light-shielding layer 451 on the substantially right half surface of the photoelectric conversion device 101 is named pixel 10_R.
- pixel 10_R the left half surface and the light-shielding layer 451 are superimposed. Note that FIG.
- FIG. 22A shows a top view in which the optical conversion layer 452, the microlens array 462, etc. are omitted in order to make the figure easier to see, but FIG. 23A also shows the microlens array 462, which is shown in FIG. 24A. Further shows the optical conversion layer 452 as well.
- FIG. 22B shows a configuration in which a transparent conductive layer 455 is provided in place of a part of the light-shielding layer 451 in FIG. 22A. Note that FIG. 22B shows a top view in which the optical conversion layer 452, the microlens array 462, etc. are omitted in order to make the figure easier to see, but FIG. 23B also shows the microlens array 462, which is shown in FIG. 24B. Further shows the optical conversion layer 452 as well.
- Pixel 10_L is superposed on the substantially left half of a square concentric with the optical axis of the microlens and the opening of the light-shielding layer 451.
- the substantially right half of the square concentric with the optical axis of the microlens and the opening of the light-shielding layer 451 overlap.
- Focus detection by the pupil division phase difference method can be performed by comparing the amount of light incident on the pixel 10_L and the amount of light incident on the pixel 10_R.
- the optical axis of the microlens is, for example, a straight line passing through the center of the microlens when viewed from the upper surface.
- the optical axis of the microlens is, for example, substantially perpendicular to the substrate 441.
- both the pixel 10_L and the pixel 10_R have a photoelectric conversion device 101 having substantially the same shape when viewed from the upper surface.
- at least a part of the portion where the photoelectric conversion device 101 of the pixel 10_L overlaps with the opening of the light-shielding layer 451 does not overlap with the opening of the light-shielding layer 451 in the photoelectric conversion device 101 of the pixel 10_R. It is a part.
- the amount of light incident on the pixel 10_L and the amount of light incident on the pixel 10_R change according to the amount of deviation (defocus amount) from the focal position of the image formation.
- the photographing lens is placed in front of the microlens and the photographing lens is adjusted back and forth to focus.
- the amount of light incident on one pixel 10_L becomes stronger in one defocus state and weaker in the other defocus state.
- the amount of light incident on the pixel 10_R is such that the amount of incident light becomes weaker in one defocus state, that is, the amount of light incident on the pixel 10_L becomes stronger, and the amount of light incident on the other defocus state, that is, the pixel 10_L. In the weakened state, the amount of incident light becomes strong.
- the amount of deviation from the focal position can be detected.
- the focus detection is performed here by comparing the light amounts of the substantially left half of the pixel and the substantially right half of the pixel, the upper half of the pixel and the lower half of the pixel may be used.
- the shape of the light-shielding region and the openings are various. Can have.
- the pixel 10_L is divided into two regions (hereinafter, the third region and the fourth region) by the optical axis of the microlens (hereinafter, the first microlens) superimposed on the pixel 10_L, or by the first straight line passing through the center.
- the light-shielding layer 451 overlaps with preferably less than 30%, more preferably less than 20% of the third region. Further, the light-shielding layer 451 overlaps with preferably 60% or more, more preferably 70% or more, still more preferably 80% or more of the fourth region.
- the fourth region is arranged in a region having a larger x-coordinate than the third region.
- the opening of the light-shielding layer 451 overlaps with, for example, preferably 70% or more, more preferably 80% or more of the third region.
- the pixel 10_R is divided into two regions (hereinafter, the fifth region and the sixth region) by the optical axis of the microlens (hereinafter, the second microlens) superimposed on the pixel 10_R, or by the second straight line passing through the center.
- the light-shielding layer 451 overlaps with preferably 70% or more, more preferably 80% or more of the fifth region. Further, the light-shielding layer 451 superimposes on the sixth region, preferably less than 40%, more preferably less than 30%, still more preferably less than 20%.
- the second straight line is a straight line perpendicular to the x-axis.
- the sixth region is arranged in a region having a larger x coordinate than the fifth region.
- the opening of the light-shielding layer 451 is superimposed, for example, preferably 60% or more, more preferably 70% or more, and further preferably 80% or more of the sixth region.
- the fourth region is arranged on the right side of the third region. That is, when the pixel 10_L is divided into left and right regions by the first straight line, the light-shielding layer 451 is superimposed on the left region, preferably less than 40%, more preferably less than 30%, still more preferably less than 20%.
- the area on the right side is preferably superimposed with 70% or more, more preferably 80% or more.
- the opening of the light-shielding layer 451 overlaps, for example, preferably 60% or more, more preferably 70% or more, still more preferably 80% or more in the left region.
- the sixth region is arranged on the right side of the fifth region. That is, when the pixel 10_R is divided into left and right regions by the second straight line, the light-shielding layer 451 superimposes preferably 70% or more, more preferably 80% or more on the left side region, and preferably 40 on the right side region. %, More preferably less than 30%, still more preferably less than 20%.
- the opening of the light-shielding layer 451 overlaps, for example, preferably 60% or more, more preferably 70% or more, still more preferably 80% or more in the right region.
- FIG. 24B an example in which a color filter corresponding to green is used in the pixel 10_L and the pixel 10_R is shown, but the color filter may not be provided in the pixel 10_L and the pixel 10_R.
- the amount of light can be increased and the time required for focus detection may be shortened.
- a wavelength cut filter is used for the optical conversion layer 452, it can be used as an image pickup device that can obtain images in various wavelength regions.
- an infrared filter that blocks light below the wavelength of visible light is used in the optical conversion layer 452, it can be used as an infrared image pickup device. Further, if a filter that blocks light having a wavelength of near infrared rays or less is used for the optical conversion layer 452, a far infrared ray imaging device can be obtained. Further, if the optical conversion layer 452 uses an ultraviolet filter that blocks light having a wavelength equal to or higher than that of visible light, the optical conversion layer 452 can be used as an ultraviolet image pickup device.
- optical conversion layers having different functions may be mixed and arranged in one image pickup apparatus.
- each filter corresponding to red, green, blue, and infrared can be assigned to a different pixel.
- FIG. 25A shows an example in which the color filter 452R (red), the color filter 452G1 (green), the color filter 452B (blue), and the infrared filter 452IR are assigned to different pixels in the quad Bayer arrangement. In this configuration, a visible light image and an infrared light image can be acquired at the same time.
- each filter corresponding to red, green, blue, and ultraviolet can be assigned to different pixels.
- FIG. 25B shows an example in which the color filter 452R (red), the color filter 452G1 (green), the color filter 452B (blue), and the ultraviolet filter 452UV are assigned to different pixels in the quad Bayer arrangement. In this configuration, a visible light image and an ultraviolet light image can be acquired at the same time.
- a scintillator is used for the optical conversion layer 452, it can be an image pickup device that obtains an image that visualizes the intensity of radiation used in an X-ray image pickup device or the like.
- radiation such as X-rays transmitted through a subject
- a scintillator it is converted into light (fluorescence) such as visible light or ultraviolet light by a photoluminescence phenomenon.
- the image data is acquired by detecting the light with the photoelectric conversion device 101.
- an image pickup device having the above configuration may be used for a radiation detector or the like.
- the scintillator contains a substance that absorbs the energy and emits visible light or ultraviolet light when irradiated with radiation such as X-rays and gamma rays.
- Gd 2 O 2 S Tb
- Gd 2 O 2 S Pr
- Gd 2 O 2 S Eu
- BaFCl Eu
- NaI, CsI, CaF 2 , BaF 2 , CeF 3 LiF, LiI, ZnO and the like.
- Those dispersed in resin or ceramics can be used.
- imaging with infrared light or ultraviolet light inspection functions, security functions, sensor functions, etc. can be added to the imaging device. For example, by performing imaging with infrared light, non-destructive inspection of products, selection of agricultural products (sugar content meter function, etc.), vein recognition, medical inspection, etc. can be performed. Further, by performing imaging with ultraviolet light, it is possible to detect ultraviolet light emitted from a light source or a flame, and it is possible to manage a light source, a heat source, a production device, and the like.
- FIG. 26 is a cross-sectional view corresponding to the configuration shown in FIGS. 21B, 25, etc., in which a part of the light-shielding layer 451 is replaced with the transparent conductive layer 455.
- the insulating layer 453 is provided on the light-shielding layer 451 and the transparent conductive layer 455 is provided on the insulating layer 453.
- An opening is provided in the insulating layer 453, and the transparent conductive layer 455 and the light shielding layer 451 can be electrically connected to each other.
- an opening of the insulating layer 453 is provided on the light-shielding layer 451 so that the transparent conductive layer 455 is embedded in the opening, and the light-shielding layer 451 and the transparent conductive layer 455 are in contact with each other. It is shown.
- adjacent color filters may be arranged at intervals, and the resin may be arranged between the adjacent color filters.
- the resin is provided, for example, on the transparent conductive layer 455. Further, the resin may be in contact with the upper surface of the transparent conductive layer 455. Further, in FIG. 27, for example, the color filter is covered with a resin or the like.
- a gap may be provided between adjacent color filters.
- the resin provided between the adjacent color filters may come into contact with the upper surface of the light-shielding layer 451.
- FIG. 28 shows an example of a cross-sectional configuration applicable to the pixel 10_L.
- FIG. 29 shows an example of a cross-sectional configuration applicable to the pixel 10_R.
- the light-shielding layer 451 has an opening that overlaps with approximately the left half surface of the photoelectric conversion device 101. Further, the light-shielding layer 451 has a function of light-shielding approximately the right half surface of the photoelectric conversion device 101.
- the microlens array 462 of the luminous flux 454 incident on the microlens superimposed on the photoelectric conversion device and 101 the luminous flux incident on the left half surface of the lens is incident on the photoelectric conversion device 101.
- the light-shielding layer 451 has an opening that overlaps with the approximately right half surface of the photoelectric conversion device 101. Further, the light-shielding layer 451 has a function of light-shielding approximately the left half surface of the photoelectric conversion device 101.
- the microlens array 462 of the luminous flux 454 incident on the microlens superimposed on the photoelectric conversion device and 101 the luminous flux incident on the right half surface of the lens is incident on the photoelectric conversion device 101.
- FIG. 30 shows an example in which the layer 25 has a liquid crystal element 470.
- the liquid crystal element 470 shown in FIG. 30 has a transparent conductive layer 455, a transparent conductive layer 471, and a liquid crystal layer 472.
- a substrate 463a and a polarizing plate 464a are provided between the liquid crystal element 470 and the substrate 441, and a substrate 463b and a polarizing plate 464b are provided between the liquid crystal element 470 and the microlens array 462.
- an insulating layer 473 may be provided between the liquid crystal element 470 and the optical conversion layer 452.
- the transmittance of the liquid crystal element 470 can be controlled.
- the liquid crystal element 470 can function as a light-shielding layer. For example, only when the image pickup apparatus performs focus detection, an electric signal is given to the liquid crystal element 470 to block only one side of the photoelectric conversion device 101, and when focus detection is not performed, the transmittance is increased to detect focus. If this is not done, the sensitivity of the pixel can be increased.
- liquid crystal element for example, a liquid crystal element to which a vertical orientation (VA: Vertical Alignment) mode is applied can be used.
- VA Vertical Alignment
- the vertical alignment mode an MVA (Multi-Domain Vertical Alignment) mode, a PVA (Patterned Vertical Alignment) mode, an ASV (Advanced Superior View) mode and the like can be used.
- liquid crystal element a liquid crystal element to which various modes are applied can be used.
- a TN (Twisted Nematic) mode a TN (Twisted Nematic) mode, an IPS (In-Plane-Switching) mode, an FFS (Fringe Field Switching) mode, an ASM (Axially Synmetrically assigned Micro-cell) mode, and an OCere , FLC (Ferroelectric Liquid Crystal) mode, AFLC (Antiferroelectric Liquid Crystal) mode, ECB (Electricularly Controlled Birefringence) mode, guest host mode and the like can be used.
- the liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal.
- the optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field).
- the liquid crystal used for the liquid crystal element includes a thermotropic liquid crystal, a low molecular weight liquid crystal, a polymer liquid crystal, a polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal), a polymer network type liquid crystal (PNLC: Polymer Network Liquid Crystal), and the like.
- PDLC Polymer Dispersed Liquid Crystal
- PNLC Polymer network Liquid Crystal
- a strong dielectric liquid crystal, an anti-strong dielectric liquid crystal, or the like can be used.
- These liquid crystal materials show a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase and
- liquid crystal material either a positive type liquid crystal or a negative type liquid crystal may be used, and the optimum liquid crystal material may be used according to the applicable mode and design.
- an alignment film can be provided to control the orientation of the liquid crystal display.
- a liquid crystal showing a blue phase without using an alignment film may be used.
- the blue phase is one of the liquid crystal phases, and is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase when the temperature of the cholesteric liquid crystal is raised. Since the blue phase is expressed only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent of several weight% or more is used for the liquid crystal layer in order to improve the temperature range.
- a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response rate and is optically isotropic.
- the liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent does not require an orientation treatment and has a small viewing angle dependence.
- the rubbing process is not required, so that electrostatic breakdown caused by the rubbing process can be prevented, and defects and breakage of the liquid crystal display device during the manufacturing process can be reduced. ..
- FIG. 31 shows an example of a configuration in which an OS transistor is used as the transistor 102 and the transistor 103.
- the transistor 102 and the transistor 103 are provided so as to overlap with the photoelectric conversion device 101, and the capacitor 106 is provided between the photoelectric conversion device 101 and the transistor 102 and the transistor 103.
- the transistor 102 and the transistor 103 may be arranged between the photoelectric conversion device 101 and the capacitor 106.
- the transistor 102 and the transistor 103 are arranged in a region deeper than the photoelectric conversion device 101 when viewed from the surface of the substrate 441 to be irradiated with light. Therefore, the influence of light irradiation on the transistor 102 and the transistor 103 can be reduced. Therefore, it may not be necessary to provide the light-shielding layer 451. Further, a transparent conductive layer 455 may be provided instead of the light-shielding layer 451.
- the substrate 441 can be provided with transistors such as transistors 104 and transistors 105, capacitive elements, and the like.
- an insulating layer 425 is provided between the transistor 102 and the transistor 103 and a semiconductor element such as a transistor provided on the substrate 441.
- 32A to 32D are used to show an example of the configuration of the OS transistor applicable to the transistor of one aspect of the present invention.
- the OS transistor shown in FIG. 32A is a self-aligned type in which an insulating layer is provided on a laminate of an oxide semiconductor layer and a conductive layer, and an opening reaching the oxide semiconductor layer is provided to form a source electrode 705 and a drain electrode 706. It is the composition of.
- the OS transistor can be configured to have a channel forming region 708, a source region 703, and a drain region 704 formed in the oxide semiconductor layer, as well as a gate electrode 701 and a gate insulating film 702. At least the gate insulating film 702 and the gate electrode 701 are provided in the opening. An oxide semiconductor layer 707 may be further provided in the opening.
- the OS transistor may have a self-aligned configuration in which the source region 703 and the drain region 704 are formed in the semiconductor layer using the gate electrode 701 as a mask.
- FIG. 32C it may be a non-self-aligned top gate type transistor having a region where the source electrode 705 or the drain electrode 706 and the gate electrode 701 overlap.
- the OS transistor shows a structure having a back gate 735, it may have a structure without a back gate.
- the back gate 735 may be electrically connected to the front gate of the transistor provided opposite to each other as shown in the cross-sectional view in the channel width direction of the transistor shown in FIG. 32D.
- FIG. 32D shows a cross section of the transistor C1-C2 of FIG. 32A as an example, but the same applies to transistors having other structures.
- the back gate 735 may be configured to be able to supply a fixed potential different from that of the front gate.
- the insulating layer 425 has a function as a blocking layer.
- the blocking layer it is preferable to use a film having a function of preventing the diffusion of hydrogen.
- hydrogen is required to terminate dangling bonds, but hydrogen in the vicinity of the OS transistor is one of the factors that generate carriers in the oxide semiconductor layer, which reduces reliability. .. Therefore, it is preferable to provide a hydrogen blocking film between the layer on which the Si device is formed and the layer on which the OS transistor is formed.
- the blocking film for example, aluminum oxide, aluminum nitride, gallium oxide, gallium oxide, yttrium oxide, yttrium oxide, hafnium oxide, hafnium oxide, yttria-stabilized zirconia (YSZ) and the like can be used.
- aluminum oxide, aluminum nitride, gallium oxide, gallium oxide, yttrium oxide, yttrium oxide, hafnium oxide, hafnium oxide, yttria-stabilized zirconia (YSZ) and the like can be used.
- FIG. 33A is an external perspective view of the upper surface side of the package containing the image sensor chip.
- the package has a package substrate 510 for fixing the image sensor chip 550 (see FIG. 33C), a cover glass 520, an adhesive 530 for adhering the two, and the like.
- FIG. 33B is an external perspective view of the lower surface side of the package.
- the lower surface of the package has a BGA (Ball grid array) with solder balls as bumps 540.
- BGA Ball grid array
- LGA Land grid array
- PGA Peripheral Component Interconnect Express
- FIG. 33C is a perspective view of the package shown by omitting a part of the cover glass 520 and the adhesive 530.
- An electrode pad 560 is formed on the package substrate 510, and the electrode pad 560 and the bump 540 are electrically connected via a through hole.
- the electrode pad 560 is electrically connected to the image sensor chip 550 by a wire 570.
- FIG. 33D is an external perspective view of the upper surface side of the camera module in which the image sensor chip is housed in a lens-integrated package.
- the camera module has a package substrate 511 for fixing an image sensor chip 551 (see FIG. 33F), a lens cover 521, a lens 535, and the like.
- an IC chip 590 (see FIG. 33F) having functions such as a drive circuit for an image pickup device and a signal conversion circuit is also provided between the package substrate 511 and the image sensor chip 551, and is used as a SiP (System in package). It has a configuration.
- FIG. 33E is an external perspective view of the lower surface side of the camera module.
- the lower surface and the side surface of the package substrate 511 have a QFN (Quad flat no-lead package) configuration in which a land 541 for mounting is provided.
- the configuration is an example, and a QFP (Quad flat package) or the above-mentioned BGA may be provided.
- FIG. 33F is a perspective view of the module shown by omitting a part of the lens cover 521 and the lens 535.
- the land 541 is electrically connected to the electrode pad 561, and the electrode pad 561 is electrically connected to the image sensor chip 551 or the IC chip 590 by a wire 571.
- the image sensor chip By housing the image sensor chip in the above-mentioned package, it can be easily mounted on a printed circuit board or the like, and the image sensor chip can be incorporated into various semiconductor devices and electronic devices.
- Electronic devices that can use the image pickup device include a display device, a personal computer, an image storage device or image reproduction device provided with a recording medium, a mobile phone, a game machine including a portable type, and a portable data terminal.
- Electronic book terminals video cameras, cameras such as digital still cameras, goggle type displays (head mount displays), navigation systems, sound reproduction devices (car audio, digital audio players, etc.), copiers, facsimiles, printers, multifunction printers , Automatic cash deposit / payment machine (ATM), vending machine, etc.
- Specific examples of these electronic devices are shown in FIGS. 34A to 34F.
- FIG. 34A is an example of a mobile phone, which has a housing 981, a display unit 982, an operation button 983, an external connection port 984, a speaker 985, a microphone 986, a camera 987, and the like.
- the mobile phone includes a touch sensor on the display unit 982. All operations such as making a phone call or inputting characters can be performed by touching the display unit 982 with a finger or a stylus.
- the image pickup apparatus of one aspect of the present invention and the operation method thereof can be applied to the mobile phone, and an infrared light image can be acquired in addition to a color image.
- FIG. 34B is a portable data terminal, which has a housing 911, a display unit 912, a speaker 913, a camera 919, and the like.
- Information can be input / output by the touch panel function of the display unit 912.
- characters and the like can be recognized from the image acquired by the camera 919, and the characters can be output as voice by the speaker 913.
- the image pickup apparatus of one aspect of the present invention and the operation method thereof can be applied to the portable data terminal, and an infrared light image can be acquired in addition to a color image.
- FIG. 34C is a surveillance camera, which has a support base 951, a camera unit 952, a protective cover 953, and the like.
- the camera unit 952 is provided with a rotation mechanism or the like, and by installing it on the ceiling, it is possible to take an image of the entire surroundings.
- An image pickup apparatus according to one aspect of the present invention and an operation method thereof can be applied to an element for image acquisition in the camera unit, and an infrared light image can be acquired in addition to a color image.
- the surveillance camera is an idiomatic name and does not limit its use.
- a device having a function as a surveillance camera is also called a camera or a video camera.
- FIG. 34D is a video camera, which has a first housing 971, a second housing 972, a display unit 973, an operation key 974, a lens 975, a connection unit 976, a speaker 977, a microphone 978, and the like.
- the operation key 974 and the lens 975 are provided in the first housing 971, and the display unit 973 is provided in the second housing 972.
- the image pickup apparatus of one aspect of the present invention and the operation method thereof can be applied to the video camera, and an infrared light image can be acquired in addition to a color image.
- FIG. 34E is a digital camera, which has a housing 961, a shutter button 962, a microphone 963, a light emitting unit 967, a lens 965, and the like.
- the image pickup apparatus of one aspect of the present invention and the operation method thereof can be applied to the digital camera, and an infrared light image can be acquired in addition to a color image.
- FIG. 34F is a wristwatch-type information terminal, which has a display unit 932, a housing / wristband 933, a camera 939, and the like.
- the display unit 932 includes a touch panel for operating the information terminal.
- the display unit 932 and the housing / wristband 933 have flexibility and are excellent in wearability to the body.
- the image pickup apparatus of one aspect of the present invention and the operation method thereof can be applied to the information terminal, and an infrared light image can be acquired in addition to a color image.
- FIG. 35A illustrates an external view of an automobile as an example of a moving body.
- FIG. 35B is a diagram that simplifies the exchange of data in the automobile.
- the automobile 890 has a plurality of cameras 891 and the like. An image pickup apparatus of one aspect of the present invention and an operation method thereof can be applied to the camera 891. Further, the automobile 890 is equipped with various sensors (not shown) such as an infrared radar, a millimeter wave radar, and a laser radar.
- the integrated circuit 893 can be used for the camera 891 and the like.
- the camera 891 processes a plurality of images obtained in a plurality of imaging directions 892 by the integrated circuit 893, and the host controller 895 or the like collectively analyzes the plurality of images via the bus 894 or the like to perform a guard rail. It is possible to judge the surrounding traffic conditions such as the presence or absence of pedestrians and perform automatic driving. It can also be used in systems for road guidance, danger prediction, and the like.
- the obtained image data is subjected to arithmetic processing such as a neural network to increase the resolution of the image, reduce image noise, face recognition (security purpose, etc.), and object recognition (purpose of automatic driving).
- arithmetic processing such as a neural network to increase the resolution of the image, reduce image noise, face recognition (security purpose, etc.), and object recognition (purpose of automatic driving).
- Etc. image compression, image correction (wide dynamic range), image restoration of lensless image sensor, positioning, character recognition, reduction of reflection reflection, etc. can be performed.
- the automobile may be an automobile having an internal combustion engine, an electric vehicle, a hydrogen vehicle, or the like.
- the moving body is not limited to the automobile.
- examples of moving objects include trains, monorails, ships, flying objects (helicopters, unmanned aerial vehicles (drones), airplanes, rockets), etc., and the computer of one aspect of the present invention is applied to these moving objects. Therefore, it is possible to provide a system using artificial intelligence.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
図2は、画素を説明する図である。
図3A、図3Bは、画素回路を説明する図である。
図4A、図4Bは、画素回路のレイアウトを説明する図である。
図5A、図5Bは、画素回路を説明する図である。
図6は、画素の動作を説明するタイミングチャートである。
図7は、撮像装置を説明するブロック図である。
図8A、図8Bは、画素回路を説明する図である。
図9は、撮像装置を説明するブロック図である。
図10は、画素ブロック200および回路201を説明する図である。
図11A、図11Bは、画素100を説明する図である。
図12A、図12Bは、画素ブロック200および回路201の動作を説明するタイミングチャートである。
図13A、図13Bは、回路301および回路302を説明する図である。
図14は、メモリセルを説明する図である。
図15A、図15Bは、ニューラルネットワークの構成例を示す図である。
図16A、図16Bは、光電変換デバイスの構成例を説明する図である。
図17は、撮像装置の断面図の一例である。
図18A、図18B、図18Cは、トランジスタの断面の一例である。
図19A、図19Bは、撮像装置の上面図の一例である。
図20A、図20Bは、撮像装置の上面図の一例である。
図21A、図21Bは、撮像装置の上面図の一例である。
図22A、図22Bは、撮像装置の上面図の一例である。
図23A、図23Bは、撮像装置の上面図の一例である。
図24A、図24Bは、撮像装置の上面図の一例である。
図25A、図25Bは、撮像装置の上面図の一例である。
図26は、撮像装置の断面図の一例である。
図27は、撮像装置の断面図の一例である。
図28は、撮像装置の断面図の一例である。
図29は、撮像装置の断面図の一例である。
図30は、撮像装置の断面図の一例である。
図31は、撮像装置の断面図の一例である。
図32A、図32B、図32C、図32Dは、トランジスタの断面の一例である。
図33A乃至図33Fは、撮像装置を収めたパッケージ、モジュールの斜視図である。
図34A乃至図34Fは、電子機器を明する図である。
図35A、図35Bは、自動車を説明する図である。
本実施の形態では、本発明の一態様である撮像装置について、図面を参照して説明する。
図1は、本発明の一態様の撮像装置の画素の断面図である。画素は層21、層24、層25、層26が積層された構造を有する。層21は、支持基板等を有する。層24は、トランジスタ、光電変換デバイス等を有する。層25は、光学変換層等を有する。層26は、マイクロレンズアレイ等を有する。
層21は支持基板であり、硬質で表面が平坦であることが好ましい。例えば、シリコン等の半導体基板、ガラス基板、セラミクス基板、金属基板、樹脂基板などを用いることができる。例えば後述する図17に示す構成においては、層21は、基板411と、基板411を覆う絶縁層412と、により構成される。また、層21が設けられない構成としてもよい。
層24は、基板441に設けられた光電変換デバイス101と、回路部901と、を有する。回路部901は例えば、基板441にチャネル領域が形成されたトランジスタを有する。基板441としてシリコン、炭化シリコン、ゲルマニウム、シリコンゲルマニウム、酸化物半導体、等を用いることができる。光電変換デバイス101として例えば、フォトダイオードを用いることができる。フォトダイオードとして、基板441の一つの面を第1の受光面としたpn接合型フォトダイオードを用いることができる。なお、図2において光電変換デバイス101を示す領域と、回路部901を示す領域と、は矩形の形状で示しているが、それぞれの領域は自由な形状の領域を有することができる。また、互いが重畳する領域を有してもよい。また、互いの構成要素の一部を共通としてもよい。例えば、光電変換デバイス101と電気的に接続されるトランジスタは、ソースおよびドレインの一方を、光電変換デバイス101のn型領域あるいはp型領域と兼ねることができる。
層25は、光学変換層が設けられた層であり、ここでは、カラー撮像に対応するカラーフィルタ452R、452G1、452G2、452Bが設けられた例を示している。また、層25は、遮光層451を有する。
層26は、マイクロレンズアレイ462、および絶縁層461を有する。マイクロレンズアレイ462は、入射した光を集光することにより、光電変換デバイス101に効率よく光を入射させる機能を有する。
図4Aに、図3A、図3Bに示す画素10の要素を簡易的にレイアウトした上面図の一例を示す。また、図4Bは、図4Aにおいて、回路部901およびその近傍を拡大して示した図である。
図6は、画素の動作の一例を説明するタイミングチャートである。当該タイミングチャートに従って、図3Aに示す画素回路を動作させることができる。また、図5Aに示す画素回路も配線131と配線134に同じ信号電位を供給することによって、動作させることができる。なお、図5Aに示す画素回路は、配線131と配線134に異なる信号電位を供給して、動作させてもよい。
図7は、本発明の一態様の撮像装置を説明するブロック図である。当該撮像装置は、マトリクス状に配列された画素10を有する画素アレイ31と、画素アレイ31の行を選択する機能を有する回路32(ロードライバ)と、画素10からデータを読み出す機能を有する回路33と、電源電位を供給する回路38を有する。なお、図7では、それぞれの要素を接続する配線数を簡略化している。また、回路32、33、38は複数であってもよい。
本実施の形態では、本発明の一態様である演算機能を有する撮像装置について、図面を参照して説明する。本実施の形態で説明する撮像装置には、実施の形態1で説明した積層構造を有する撮像装置を用いることができる。なお、実施の形態1と異なる部分については、都度説明を行う。また、実施の形態1と共通の要素については、共通の符号を用いて説明を行う。
図9は、本発明の一態様の撮像装置を説明するブロック図である。撮像装置は、画素アレイ300と、回路201と、回路301と、回路302と、回路303と、回路304と、回路305と、を有する。なお、回路201、回路301、回路302、回路303、および回路304、および回路305の一つ以上は、画素アレイ300と重なる領域を有していてもよい。当該構成とすることで、撮像装置の面積を小さくすることができる。
画素100は、図11Aに示すように、光電変換デバイス101と、トランジスタ102と、トランジスタ103と、トランジスタ104と、トランジスタ105と、キャパシタ106と、トランジスタ108を有することができる。
図10に示すように、各画素100は、配線124で互いに電気的に接続される。回路201は、各画素100のトランジスタ104に流れる電流の和を用いて演算を行うことができる。
図12Aは、画素ブロック200および回路201において、露光ありのデータと、当該データに重みを与えたデータとの差分(データA)を算出する動作を説明するタイミングチャートである。なお、便宜的に各信号が変換するタイミングをあわせて図示しているが、実際には回路内部の遅延を考慮してずらすことが好ましい。また、以下の説明においては、高電位を“H”、低電位を“L”で表している。
図13Aは、回路201と接続する回路301および回路302を説明する図である。回路201から出力される積和演算結果のデータは、回路301に順次入力される。回路301には、前述したデータAとデータBとの差分を演算する機能のほかに、様々な演算機能を有していてもよい。例えば、回路301は、回路201と同等の構成とすることができる。または、回路301の機能をソフトウェアによる処理で置き換えてもよい。
本実施の形態では、本発明の一態様の撮像装置の構造例などについて説明する。
図16Aに示す光電変換デバイス101Cは、実施の形態1に示した層24が有する光電変換デバイス101に用いることのできる構造の一例である。光電変換デバイス101Cは、層565aおよび層565bを有することができる。なお、場合によって、層を領域と言い換えてもよい。
次に、本発明の一態様の画素回路に適用可能なOSトランジスタについて説明する。
図17は、図4に示したレイアウトが適用された撮像装置の断面図の一例である。層24には基板441にチャネル形成領域を有するトランジスタとして、トランジスタ102およびトランジスタ103を示す。また、層24には、光電変換デバイス101と、キャパシタ106と、を示す。なお、図17には示していないが、トランジスタ104およびトランジスタ105の構成として、基板441にチャネル形成領域を有するトランジスタを適用することが好ましい。また、図17はトランジスタ102およびトランジスタ103の構成として、基板441にチャネル形成領域を有するトランジスタを適用する例を示すが、OSトランジスタを適用してもよい。
図26は、図21B、図25等に示した、遮光層451の一部を透明導電層455に替えた構成に対応する断面図である。図26に示す構成においては、遮光層451上に絶縁層453が設けられ、絶縁層453上に透明導電層455が設けられる。
図33Aは、イメージセンサチップを収めたパッケージの上面側の外観斜視図である。当該パッケージは、イメージセンサチップ550(図33C参照)を固定するパッケージ基板510、カバーガラス520および両者を接着する接着剤530等を有する。
本発明の一態様に係る撮像装置を用いることができる電子機器として、表示機器、パーソナルコンピュータ、記録媒体を備えた画像記憶装置または画像再生装置、携帯電話、携帯型を含むゲーム機、携帯データ端末、電子書籍端末、ビデオカメラ、デジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンタ、プリンタ複合機、現金自動預け入れ払い機(ATM)、自動販売機などが挙げられる。これら電子機器の具体例を図34A乃至図34Fに示す。
Claims (15)
- n個の画素(nは4以上の自然数)を有する画素アレイと、前記画素アレイ上に配置される遮光層および透明導電層と、を有し、
前記n個の画素のそれぞれは、光電変換デバイスを有し、
前記遮光層は、第1画素と重畳する第1領域と、第2画素と重畳する第2領域と、を有し、
前記透明導電層は、前記第1領域と重畳する領域と、前記第2領域と重畳する領域と、を有し、
前記透明導電層は、透光性を有し、
前記透明導電層は、前記第1領域と前記第2領域に電気的に接続され、
前記第1画素が有する光電変換デバイスには、第1の光が入射し、
前記第2画素が有する光電変換デバイスには、第2の光が入射し、
前記第1の光が変換されて生成される第1の電気信号と、前記第2の光が変換されて生成される第2の電気信号と、を用いて処理を行う機能を有する撮像装置。 - 請求項1において、
前記第1の光が変換されて生成される第1の電気信号と、前記第2の光が変換されて生成される第2の電気信号と、を用いて結像の焦点位置の検出を行う機能を有する撮像装置。 - 請求項1または請求項2において、
前記透明導電層は、第3画素乃至第n画素の2以上と重畳する領域を有する撮像装置。 - 請求項1において、
前記透明導電層は、配列された複数の開口部を有し、
前記複数の開口部のそれぞれは、前記第3画素乃至前記第n画素の一以上と重畳し、
前記複数の開口部が配列することにより格子状の形状を成す撮像装置。 - 請求項4において、
m個のマイクロレンズ(mは(n−1)以下の自然数)を有するマイクロレンズアレイを有し、
第1マイクロレンズは、前記第1画素と重畳し、
第2マイクロレンズは、前記第2画素と重畳し、
上面視において、前記第1マイクロレンズの光軸を通る第1直線により前記第1画素を第3領域および第4領域の2つの領域に分ける場合において、前記第1領域は、前記第3領域の40%未満と重畳し、前記第4領域の70%以上と重畳し、
上面視において、前記第2マイクロレンズの光軸を通る第2直線により前記第2画素を第5領域および第6領域の2つの領域に分ける場合において、前記第2領域は、前記第5領域の70%以上と重畳し、前記第6領域の40%未満と重畳し、
前記第1直線と前記第2直線は平行であり、
上面視において、前記第1直線および前記第2直線に垂直な方向をx軸とし、前記第4領域は前記第3領域よりもx座標の大きい領域に配置され、前記第6領域は前記第5領域よりもx座標の大きい領域に配置される撮像装置。 - 請求項4において、
m個のマイクロレンズ(mは(n−1)以下の自然数)を有するマイクロレンズアレイを有し、
第1マイクロレンズは、前記第1画素、前記第2画素、前記第3画素および第4画素と重畳し、
第2マイクロレンズは、第5画素、第6画素、第7画素および第8画素と重畳する撮像装置。 - 請求項6において、
前記遮光層は、第1の開口部を有し、
前記第1の開口部は、前記第5画素、前記第6画素、前記第7画素および前記第8画素と重畳し、
前記透明導電層は、前記第1の開口部と重畳する領域を有する撮像装置。 - 請求項6または請求項7において、
前記第3画素乃至前記第n画素のそれぞれの上に、赤色、緑色または青色のいずれかの色のカラーフィルタが重畳して設けられ、
前記第1画素、前記第2画素、前記第3画素および前記第4画素には、同じ色のカラーフィルタが設けられ、
前記第5画素、前記第6画素、前記第7画素および前記第8画素には、同じ色のカラーフィルタが設けられる撮像装置。 - 請求項1において、
前記n個の画素のそれぞれは、トランジスタを有し、
前記遮光層は、前記第3画素乃至前記第n画素のそれぞれが有する前記トランジスタの一以上と重畳する撮像装置。 - 請求項1において、
前記n個の画素のそれぞれは、チャネル形成領域に酸化物半導体を有するトランジスタを有する撮像装置。 - 請求項1において、
前記光電変換デバイスは、シリコン基板上に設けられるpn接合型ダイオードである撮像装置。 - 2以上の画素を有する画素アレイと、前記画素アレイ上に配置される液晶素子と、を有し、
前記画素アレイが有する画素のそれぞれは、光電変換デバイスを有し、
前記液晶素子は、第1画素と重畳する第1領域と、第2画素と重畳する第2領域と、を有し、
前記第1画素が有する光電変換デバイスには、第1の光が入射し、
前記第2画素が有する光電変換デバイスには、第2の光が入射し、
前記第1の光が変換されて生成される第1の電気信号と、前記第2の光が変換されて生成される第2の電気信号と、を用い、結像の焦点位置の検出を行う機能を有する撮像装置。 - 請求項12において、
前記液晶素子は、
前記焦点位置の前記検出を行う場合においては光を遮光し、行わない場合においては光を透過する機能を有する撮像装置。 - 請求項1乃至請求項13のいずれか一に記載の撮像装置と、
表示部と、を有する電子機器。 - 請求項1乃至請求項13のいずれか一に記載の撮像装置と、
画像処理を行う機能を有する集積回路と、を有する移動体。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US18/014,207 US20230261017A1 (en) | 2020-07-31 | 2021-07-16 | Imaging device, electronic device, and moving object |
KR1020237004400A KR20230044228A (ko) | 2020-07-31 | 2021-07-16 | 촬상 장치, 전자 기기, 및 이동체 |
CN202180047723.5A CN116057951A (zh) | 2020-07-31 | 2021-07-16 | 摄像装置、电子设备及移动体 |
JP2022539781A JPWO2022023859A1 (ja) | 2020-07-31 | 2021-07-16 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2020-129838 | 2020-07-31 | ||
JP2020129838 | 2020-07-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2022023859A1 true WO2022023859A1 (ja) | 2022-02-03 |
Family
ID=80037727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2021/056422 WO2022023859A1 (ja) | 2020-07-31 | 2021-07-16 | 撮像装置、電子機器および移動体 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20230261017A1 (ja) |
JP (1) | JPWO2022023859A1 (ja) |
KR (1) | KR20230044228A (ja) |
CN (1) | CN116057951A (ja) |
WO (1) | WO2022023859A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20230014551A (ko) * | 2021-07-21 | 2023-01-30 | 삼성전자주식회사 | 이미지 센서, 이미지 처리 장치 및 이미지 처리 방법 |
CN114640763A (zh) * | 2022-02-28 | 2022-06-17 | 北京极感科技有限公司 | 屏下摄像头传感器、图像处理方法、电子设备及存储介质 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012165070A (ja) * | 2011-02-03 | 2012-08-30 | Nikon Corp | 固体撮像素子及びこれを用いた撮像装置 |
WO2013031348A1 (ja) * | 2011-08-30 | 2013-03-07 | 富士フイルム株式会社 | 撮像装置 |
JP2013211790A (ja) * | 2012-03-30 | 2013-10-10 | Fujifilm Corp | 撮像装置 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101645680B1 (ko) | 2009-11-06 | 2016-08-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
-
2021
- 2021-07-16 US US18/014,207 patent/US20230261017A1/en active Pending
- 2021-07-16 KR KR1020237004400A patent/KR20230044228A/ko unknown
- 2021-07-16 JP JP2022539781A patent/JPWO2022023859A1/ja active Pending
- 2021-07-16 WO PCT/IB2021/056422 patent/WO2022023859A1/ja active Application Filing
- 2021-07-16 CN CN202180047723.5A patent/CN116057951A/zh active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012165070A (ja) * | 2011-02-03 | 2012-08-30 | Nikon Corp | 固体撮像素子及びこれを用いた撮像装置 |
WO2013031348A1 (ja) * | 2011-08-30 | 2013-03-07 | 富士フイルム株式会社 | 撮像装置 |
JP2013211790A (ja) * | 2012-03-30 | 2013-10-10 | Fujifilm Corp | 撮像装置 |
Also Published As
Publication number | Publication date |
---|---|
CN116057951A (zh) | 2023-05-02 |
JPWO2022023859A1 (ja) | 2022-02-03 |
KR20230044228A (ko) | 2023-04-03 |
US20230261017A1 (en) | 2023-08-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7467587B2 (ja) | 撮像装置及び電子機器 | |
JP6956784B2 (ja) | 撮像装置 | |
WO2018215882A1 (ja) | 撮像装置および電子機器 | |
WO2022023859A1 (ja) | 撮像装置、電子機器および移動体 | |
JP2021027351A (ja) | 撮像装置および電子機器 | |
WO2021033065A1 (ja) | 撮像装置および電子機器 | |
JP2019009640A (ja) | 撮像装置および電子機器 | |
WO2020250095A1 (ja) | 撮像装置および電子機器 | |
WO2020222059A1 (ja) | 撮像装置、その動作方法、および電子機器 | |
WO2021090110A1 (ja) | 撮像装置、その動作方法および電子機器 | |
WO2019243949A1 (ja) | 撮像装置の動作方法 | |
WO2021165781A1 (ja) | 撮像装置、電子機器および移動体 | |
JP2021100025A (ja) | 撮像装置、撮像装置の駆動方法 | |
WO2021209868A1 (ja) | 撮像装置および電子機器 | |
WO2021214616A1 (ja) | 撮像装置 | |
KR20210029726A (ko) | 촬상 패널, 촬상 장치 | |
WO2021191719A1 (ja) | 撮像装置および電子機器 | |
WO2022018561A1 (ja) | 撮像装置および電子機器 | |
WO2021028754A1 (ja) | 撮像装置、または撮像システム | |
WO2022064317A1 (ja) | 撮像装置および電子機器 | |
JP7336441B2 (ja) | 撮像装置および電子機器 | |
WO2021053449A1 (ja) | 撮像システムおよび電子機器 | |
WO2021099889A1 (ja) | 撮像装置および電子機器 | |
JPWO2020026080A1 (ja) | 撮像装置の動作方法 | |
JP2018164139A (ja) | 撮像装置および電子機器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 21849408 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2022539781 Country of ref document: JP Kind code of ref document: A |
|
ENP | Entry into the national phase |
Ref document number: 20237004400 Country of ref document: KR Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 21849408 Country of ref document: EP Kind code of ref document: A1 |