WO2022022098A1 - 阵列基板及显示装置 - Google Patents

阵列基板及显示装置 Download PDF

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Publication number
WO2022022098A1
WO2022022098A1 PCT/CN2021/099317 CN2021099317W WO2022022098A1 WO 2022022098 A1 WO2022022098 A1 WO 2022022098A1 CN 2021099317 W CN2021099317 W CN 2021099317W WO 2022022098 A1 WO2022022098 A1 WO 2022022098A1
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pixel
pixels
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PCT/CN2021/099317
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English (en)
French (fr)
Inventor
钱学强
陈东川
李岩锋
邢宇
王凯旋
刘冰洋
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to US17/789,551 priority Critical patent/US11796876B2/en
Publication of WO2022022098A1 publication Critical patent/WO2022022098A1/zh
Priority to US18/467,337 priority patent/US20240004247A1/en

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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G—PHYSICS
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G—PHYSICS
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Definitions

  • the present disclosure relates to the field of display technology, and in particular, to an array substrate and a display device.
  • LCD Liquid Crystal Display
  • an array substrate has a plurality of sub-pixel regions arranged in an array, and the plurality of sub-pixel regions include a plurality of white sub-pixel regions and a plurality of primary color sub-pixel regions.
  • the array substrate includes: a first substrate; and a plurality of sub-pixels disposed on one side of the first substrate.
  • the plurality of sub-pixels includes a plurality of white sub-pixels and a plurality of primary color sub-pixels; along the column direction, each white sub-pixel is adjacent to at least one primary color sub-pixel.
  • each sub-pixel has a plurality of light-shielding patterns; along the column direction, among the plurality of light-shielding patterns of a primary color sub-pixel adjacent to the white sub-pixel, a part of the light-shielding pattern is set on the white sub-pixel where the white sub-pixel is located. In the sub-pixel area, another part of the light-shielding pattern is arranged in the primary-color sub-pixel area corresponding to the primary-color sub-pixel.
  • the plurality of light-shielding patterns of the sub-pixels include: in the data lines extending in the column direction or substantially along the column direction, a portion passing through the sub-pixels; in the row direction or substantially Among the gate lines extending in the row direction, the part passing through the sub-pixels; the row direction intersects the column direction; and the gate lines are electrically connected to the data lines and the gate lines and used for driving all The thin film transistor of the sub-pixel.
  • a part of the light-shielding patterns disposed in the white sub-pixel area where the white sub-pixel is located includes: the The portion of the gate line passing through the primary color sub-pixel and/or the thin film transistor.
  • the plurality of primary color subpixels includes a plurality of first color subpixels, a plurality of second color subpixels, and a plurality of third color subpixels.
  • the ratio range of the opening area of the first color sub-pixel, the second color sub-pixel, the third color sub-pixel and the white sub-pixel is (0.8 ⁇ 1.2):(0.8 ⁇ 1.2):(0.8 ⁇ 1.2):(0.4 ⁇ 0.8).
  • the first color subpixels include red subpixels
  • the second color subpixels include green subpixels
  • the third color subpixels include blue subpixels.
  • the white sub-pixels are adjacent to the green sub-pixels.
  • the red sub-pixel and the blue sub-pixel are located on opposite sides of the green sub-pixel.
  • the opening size of the red sub-pixel is equal or approximately equal to the opening size of the blue sub-pixel, and the opening size of the red sub-pixel is larger than that of the green sub-pixel
  • the opening size, the opening size of the green sub-pixel is larger than the opening size of the white sub-pixel.
  • the opening size of the green sub-pixel is larger than that of the red sub-pixel
  • the opening size of the red sub-pixel is equal to or approximately equal to the opening size of the blue sub-pixel
  • the The opening size of the red sub-pixel is larger than the opening size of the white sub-pixel.
  • the ratio of the opening size of the red sub-pixel, the opening size of the green sub-pixel, the opening size of the blue sub-pixel, and the opening size of the white sub-pixel The range is (1.4 ⁇ 1.5):(1.2 ⁇ 1.4):(1.4 ⁇ 1.5):1.
  • the ratio of the aperture size of the red sub-pixel, the aperture size of the green sub-pixel, the aperture size of the blue sub-pixel and the aperture size of the white sub-pixel is in the range of (1.2 ⁇ 1.3):(1.3 ⁇ 1.8):(1.2 ⁇ 1.3):1.
  • the array substrate further includes: a plurality of common electrode lines extending along the column direction.
  • the sub-pixel further includes a common electrode disposed on a side of the plurality of light shielding patterns away from the first substrate.
  • the common electrode is electrically connected with at least one common electrode line.
  • the plurality of common electrode lines and the data lines are disposed in the same layer.
  • the ratio of the size of the common electrode line in the direction perpendicular to the column to the size of the data line in the direction perpendicular to the column ranges from 1:2 to 1:1.
  • the sub-pixel further includes a pixel electrode disposed on a side of the common electrode away from the first substrate.
  • the pixel electrode has at least one slit; the extending direction of the at least one slit is parallel to the column direction or at an acute angle.
  • the pixel electrode includes strip-shaped sub-electrodes located on both sides of the slit.
  • the plurality of primary color sub-pixels include a plurality of red sub-pixels, a plurality of green sub-pixels and a plurality of blue sub-pixels, in the row direction
  • the size of the slit of the pixel electrode in the white sub-pixel is the same as that of the stripe
  • the ratio range between the sizes of the strip-shaped sub-electrodes is the same or approximately the same as the ratio range between the size of the slit of the pixel electrode and the size of the strip-shaped sub-electrodes in the green sub-pixel.
  • the ratio between the size of the slit of the pixel electrode in the white sub-pixel and the size of the strip-shaped sub-electrode ranges from (2.4 ⁇ 2.8):(2.0 ⁇ 2.7).
  • the ratio range between the size of the slit of the pixel electrode in the red sub-pixel and the size of the strip-shaped sub-electrode is the same as the size of the slit of the pixel electrode in the blue sub-pixel.
  • the ratio range between the size of and the size of the strip-shaped sub-electrodes is the same or approximately the same.
  • the ratio between the size of the slit of the pixel electrode and the size of the strip-shaped sub-electrode in the red sub-pixel ranges from (2.2-2.8):(2.0-2.5).
  • a display device in another aspect, includes: the array substrate according to any one of the above-mentioned embodiments; an opposite substrate disposed opposite to the array substrate; and a liquid crystal layer disposed between the array substrate and the opposite substrate.
  • the opposite substrate includes: a second substrate; a black matrix disposed on a side of the second substrate close to the array substrate, the black matrix has a plurality of openings, the plurality of The openings include a plurality of first openings respectively opposite to the plurality of white sub-pixels in the array substrate and a plurality of second openings respectively opposite to the plurality of primary color sub-pixels in the array substrate; a color filter layer in the second opening; and a flat layer disposed on the side of the color filter layer away from the second substrate, a part of the flat layer sinking into the plurality of first openings.
  • FIG. 1 is a structural diagram of an array substrate according to some embodiments of the present disclosure
  • FIG. 2 is a structural diagram of another array substrate according to some embodiments of the present disclosure.
  • FIG. 3 is a structural diagram of yet another array substrate according to some embodiments of the present disclosure.
  • FIG. 4 is a structural diagram of yet another array substrate according to some embodiments of the present disclosure.
  • FIG. 5 is a structural diagram of yet another array substrate according to some embodiments of the present disclosure.
  • FIG. 6 is a structural diagram of yet another array substrate according to some embodiments of the present disclosure.
  • FIG. 7 is a cross-sectional view of the array substrate shown in FIG. 6 along the A-A' direction;
  • FIG. 8 is a partial structural diagram of the array substrate shown in FIG. 7;
  • Fig. 9 is a kind of sectional view along C-C' direction of the structure shown in Fig. 8;
  • FIG. 10 is a structural diagram of a common electrode according to some embodiments of the present disclosure.
  • FIG. 11 is a structural diagram of another common electrode according to some embodiments of the present disclosure.
  • FIG. 12 is a structural diagram of a display device according to some embodiments of the present disclosure.
  • FIG. 13 is a top view of a display device according to some embodiments of the present disclosure.
  • FIG. 14 is a cross-sectional view of the display device shown in FIG. 13 along the D-D' direction.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as “first” or “second” may expressly or implicitly include one or more of that feature.
  • plural means two or more.
  • connection and its derivatives may be used.
  • the term “connected” may be used in describing some embodiments to indicate that two or more components are in direct physical or electrical contact with each other.
  • the embodiments disclosed herein are not necessarily limited by the content herein.
  • the term “if” is optionally construed to mean “when” or “at” or “in response to determining” or “in response to detecting,” depending on the context.
  • the phrases “if it is determined that" or “if a [statement or event] is detected” are optionally interpreted to mean “in determining" or “in response to determining" or “on detection of [recited condition or event]” or “in response to detection of [recited condition or event]”.
  • Exemplary embodiments are described herein with reference to cross-sectional and/or plan views that are idealized exemplary drawings.
  • the thickness of layers and regions are exaggerated for clarity. Accordingly, variations from the shapes of the drawings due to, for example, manufacturing techniques and/or tolerances, are contemplated.
  • example embodiments should not be construed as limited to the shapes of the regions shown herein, but to include deviations in shapes due, for example, to manufacturing. For example, an etched area shown as a rectangle will typically have curved features.
  • the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
  • An LCD usually has a plurality of pixels (eg, each pixel includes a red sub-pixel, a green sub-pixel and a blue sub-pixel), and the plurality of pixels can cooperate with each other to enable the LCD to perform image display.
  • each of the above-mentioned pixels further includes a white sub-pixel, so that the white sub-pixel can be used to improve the display brightness of the LCD.
  • the area occupied by each pixel in the LCD is basically constant, and the area occupied by the white sub-pixel in each pixel is the sum of the total area occupied by the red sub-pixel, the green sub-pixel and the blue sub-pixel It is easy to make the ratio between the brightness of white light displayed by the white sub-pixel and the brightness of white light displayed by the red sub-pixel, green sub-pixel and blue sub-pixel is relatively high, which exceeds the brightness specification of the white light of the product. Causes a waste of white light.
  • the proportion of the total area occupied by the red sub-pixels, the green sub-pixels and the blue sub-pixels is small, which easily leads to the decrease of the brightness of the red, green and blue monochrome images, which in turn leads to the deterioration of the image quality of the monochrome images.
  • the array substrate 100 has a plurality of sub-pixel regions P arranged in an array, and the plurality of sub-pixel regions P include a plurality of white sub-pixel regions W1 and a plurality of primary color sub-pixel regions P1 .
  • the colors corresponding to the plurality of primary color sub-pixel regions P1 may include a first color, a second color and a third color.
  • the types of the first color, the second color and the third color include multiple types, which can be selected and set according to actual needs.
  • the first color includes red
  • the second color includes green
  • the third color includes blue. That is, the plurality of primary color sub-pixel regions P1 may include a plurality of red sub-pixel regions R1, a plurality of green sub-pixel regions G1, and a plurality of blue sub-pixel regions B1.
  • the first color includes magenta
  • the second color includes yellow
  • the third color includes cyan. That is, the plurality of primary color sub-pixel regions P1 may include a plurality of magenta sub-pixel regions, a plurality of yellow sub-pixel regions, and a plurality of cyan sub-pixel regions.
  • the plurality of sub-pixel regions P are arranged in an array, that is, the plurality of white sub-pixel regions W1 and the plurality of primary color sub-pixel regions P1 are arranged in an array.
  • the arrangement between the plurality of white sub-pixel regions W1 and the plurality of primary color sub-pixel regions P1 includes a variety of ways, which can be selected and set according to actual needs.
  • the plurality of primary color sub-pixel regions P1 including a plurality of red sub-pixel regions R1, a plurality of green sub-pixel regions G1 and a plurality of blue sub-pixel regions B1 as an example, for the plurality of white sub-pixel regions W1 and the multi-color sub-pixel regions
  • the arrangement between the primary color sub-pixel regions P1 is schematically illustrated.
  • a red sub-pixel region R1 along the row direction X, among the plurality of sub-pixel regions P in each row, a red sub-pixel region R1 , a green sub-pixel region G1 , a blue sub-pixel region B1 and a white sub-pixel region W1 Alternately arranged.
  • red sub-pixel regions R1, green sub-pixel regions G1, blue sub-pixel regions B1 and white sub-pixel regions W1 are alternately arranged in sequence.
  • a red sub-pixel region R1, a green sub-pixel region G1, a blue sub-pixel region B1 and a white sub-pixel region W1 are arranged alternately in sequence.
  • the red sub-pixel regions R1 and the blue sub-pixel regions B1 are alternately arranged in sequence, or the green sub-pixel regions G1 and the white sub-pixel regions W1 are alternately arranged in sequence.
  • a red sub-pixel region R1 , a green sub-pixel region G1 , a blue sub-pixel region B1 and a white sub-pixel region W1 are arranged alternately in sequence.
  • red sub-pixel regions R1, white sub-pixel regions W1, blue sub-pixel regions B1 and green sub-pixel regions G1 are alternately arranged in sequence.
  • the multiple sub-pixel regions P in each row are not limited to the red sub-pixel region R1, the green sub-pixel region G1, the blue sub-pixel region B1, and the white sub-pixel region W1 alternate in turn.
  • One arrangement of the arrangement can also be arranged in other order, or, two or three of the red sub-pixel region R1, the green sub-pixel region G1, the blue sub-pixel region B1 and the white sub-pixel region W1. are arranged alternately.
  • the arrangement between the plurality of white sub-pixel regions W1 and the plurality of primary color sub-pixel regions P1 is not limited to the three exemplified above.
  • the sizes of the plurality of sub-pixel regions P included in the array substrate 100 are equal or approximately equal.
  • a line connecting a part of the boundaries located on the same side along the row direction X is a straight line or a substantially straight line.
  • the row direction X and the column direction Y cross each other.
  • the size of the included angle between the two can be selected and set according to actual needs.
  • the row direction X and the column direction Y can be perpendicular to each other.
  • the above-mentioned array substrate 100 includes: a first substrate 1 .
  • the above-mentioned types of the plurality of first substrates 1 include various types, which can be selected and set according to actual needs.
  • the first substrate 1 may be a blank base substrate.
  • the first substrate 1 may include a blank base substrate and a functional film (for example, a buffer layer) disposed on one side of the blank base substrate.
  • the blank substrate can be a PMMA (Polymethyl methacrylate, polymethyl methacrylate) substrate or a glass substrate.
  • the above-mentioned array substrate 100 further includes: a plurality of sub-pixels S disposed on one side of the first substrate 1 .
  • the plurality of sub-pixels S can be disposed in a position where the functional film is far from the blank base substrate. side.
  • the above-mentioned plurality of sub-pixels S include a plurality of white sub-pixels W2 and a plurality of primary color sub-pixels S1.
  • the colors corresponding to the plurality of primary color sub-pixels S1 are the same as the colors corresponding to the plurality of primary color sub-pixel regions P1. That is, the plurality of primary color sub-pixels S1 may include a plurality of first color sub-pixels S11, a plurality of second color sub-pixels S12 and a plurality of third color sub-pixels S13.
  • the plurality of primary color sub-pixel regions P1 include a plurality of red sub-pixel regions R1, a plurality of green sub-pixel regions G1 and a plurality of blue sub-pixel regions B1
  • the plurality of first color sub-pixel regions S11 may include a plurality of red sub-pixels R2
  • the plurality of second-color sub-pixels S12 may include a plurality of green sub-pixels G2
  • the plurality of third-color sub-pixels S13 may include a plurality of blue sub-pixels B2.
  • the plurality of first-color sub-pixel regions S11 may include a plurality of magenta sub-pixel regions Subpixels, the plurality of second color subpixels S12 may include a plurality of yellow subpixels, and the plurality of third color subpixels S13 may include a plurality of cyan subpixels.
  • the arrangement positions of the plurality of white sub-pixels W2 correspond to the arrangement positions of the plurality of white sub-pixel regions W1
  • the arrangement positions of the plurality of primary-color sub-pixels S1 correspond to the arrangement positions of the plurality of primary-color sub-pixel regions P1.
  • each white sub-pixel W2 is adjacent to at least one primary color sub-pixel S1 . That is, in the column direction Y, each white sub-pixel W2 is not adjacent to the white sub-pixel W2.
  • each white sub-pixel W2 is adjacent to one primary color sub-pixel S1.
  • the colors corresponding to the two primary color sub-pixels S1 located on opposite sides of each white sub-pixel W2 are the same.
  • the colors corresponding to the two primary color sub-pixels S1 located on opposite sides of each white sub-pixel W2 are both green.
  • each white sub-pixel W2 is adjacent to a plurality of primary color sub-pixels S1.
  • the colors corresponding to the two primary color sub-pixels S1 located on opposite sides of each white sub-pixel W2 are different.
  • the colors corresponding to the two primary color sub-pixels S1 located on opposite sides of each white sub-pixel W2 are red and blue, respectively.
  • each sub-pixel S has a plurality of light-shielding patterns 2 .
  • a part of the light-shielding patterns 2 are arranged in the white sub-pixel region W1 where the white sub-pixel W2 is located, and the other part of the light-shielding patterns 2 It is arranged in the base-color sub-pixel area P1 corresponding to the base-color sub-pixel S1.
  • the plurality of light-shielding patterns 2 included in the plurality of primary-color sub-pixels S1 other than the primary-color sub-pixel S1 adjacent to the white sub-pixel W1 along the column direction Y are respectively disposed in the corresponding in the primary color sub-pixel region P1.
  • red sub-pixels R2 and blue sub-pixels B2 are provided with red sub-pixels R2 and blue sub-pixels B2; wherein,
  • the plurality of light-shielding patterns 2 included in the red sub-pixel R2 may be located in the red sub-pixel region R1 where the red sub-pixel R2 is located, and the plurality of light-shielding patterns 2 included in the blue sub-pixel B2 may be located in the blue sub-pixel B2. in the blue sub-pixel area B1.
  • the size of the opening in the green sub-pixel G2 in the column direction Y can be increased, that is, the white sub-pixel can be reduced in size.
  • the area of the opening in W2 is increased.
  • the area of the above-mentioned opening refers to the difference between the area occupied by the sub-pixel region P and the area occupied by the light-shielding pattern 2 located in the sub-pixel region P.
  • each white sub-pixel W2 is adjacent to at least one primary color sub-pixel S1, And make a part of the light-shielding patterns 2 in the plurality of light-shielding patterns 2 included in one of the primary color sub-pixels S1 arranged in the white sub-pixel region W1 where the white sub-pixel W2 is located, and another part of the light-shielding patterns 2 are arranged in the primary color sub-pixel.
  • the area of the opening in the white sub-pixel W2 can be effectively reduced, and the area of the opening of a primary color sub-pixel S1 adjacent to the white sub-pixel W2 can be increased.
  • This is beneficial to reduce the ratio between the area occupied by the plurality of white sub-pixels W2 included in the array substrate 100 and the total area occupied by the plurality of primary color sub-pixels S1, thereby reducing the white light displayed by the plurality of white sub-pixels W2
  • the ratio between the brightness and the brightness of the white light jointly displayed by the plurality of primary color sub-pixels S1 avoids exceeding the brightness specification of the white light, and reduces or even avoids the waste of the white light.
  • the image quality of a monochrome picture displayed by the LCD can be effectively improved.
  • the white sub-pixel W1 and the primary color sub-pixel S1 in the row direction X can be reduced on the basis of The size of the two primary color sub-pixels S1 in the row direction X, that is, the area of the openings of the two primary color sub-pixels S1 is increased, which can further reduce the area occupied by the plurality of white sub-pixels W2 included in the array substrate 100
  • the ratio between the total area occupied by the plurality of primary color sub-pixels S1 further reduces or even avoids the waste of white light, and improves the display brightness of the plurality of primary color sub-pixels S1, and further improves the display of the LCD using the above-mentioned array substrate 100.
  • the array substrate 100 further includes: a plurality of gate lines GL and a plurality of data lines DL disposed on one side of the first substrate 1 .
  • the plurality of gate lines GL extend in the row direction X or substantially in the row direction X
  • the plurality of data lines DL extend in the column direction Y or substantially in the column direction Y.
  • the plurality of gate lines GL and the plurality of data lines DL intersect and are insulated from each other.
  • the plurality of light-shielding patterns 2 included in each sub-pixel S include: a portion GL1 of the gate line GL passing through the sub-pixel S, and a portion DL1 of the data line DL passing through the sub-pixel S , and the thin film transistor 21 electrically connected to the gate line GL and the data line DL and used for driving the sub-pixel S.
  • the thin film transistors 21 in the multiple sub-pixels S in the same row can be electrically connected to the same gate line GL; along the column direction Y, the thin film transistors 21 in the multiple sub-pixels S in the same column It can be electrically connected to the same data line DL.
  • the above-mentioned arrangement between the gate line GL, the data line DL and the thin film transistor 21 includes various arrangements, wherein the arrangement is related to the structure of the thin film transistor 21 (the thin film transistor 21 includes a single-gate transistor and a double-gate transistor).
  • the thin film transistor 21 includes a single-gate transistor and a double-gate transistor.
  • the arrangement among the three is schematically described.
  • each gate line GL and the plurality of thin film transistors 21 in the same row may be alternately arranged in sequence, and each data line DL and the plurality of thin film transistors 21 in the same column are also arranged alternately. can be arranged alternately. That is, a plurality of thin film transistors 21 in the same row may be adjacent to two gate lines GL, and a plurality of thin film transistors 21 in the same column may be adjacent to two data lines DL.
  • every two gate lines GL and a plurality of thin film transistors 21 in two rows are alternately arranged in sequence, and each data line DL and a plurality of thin film transistors 21 in the same column can also be arranged alternately in sequence. That is, a plurality of thin film transistors 21 in the same row may be adjacent to one gate line GL, and a plurality of thin film transistors 21 in the same column may be adjacent to two data lines DL.
  • the plurality of light shielding patterns 2 of one primary color sub-pixel S1 adjacent to the white sub-pixel W2 are arranged in the white sub-pixel area W1 where the white sub-pixel W2 is located
  • a portion of the light shielding pattern 2 in the inner portion includes: the portion GL1 and/or the thin film transistor 21 of the gate line GL passing through the primary color sub-pixel S1.
  • a part of the light-shielding pattern 2 disposed in the white sub-pixel region W1 where the white sub-pixel W2 is located may include the portion GL1 of the gate line GL passing through the primary color sub-pixel S1, or may include the thin film transistor 21, or may include both The gate line GL passes through the portion GL1 of the primary color sub-pixel S1 and the thin film transistor 21 .
  • the two primary color sub-pixels S1 adjacent to the white sub-pixel W2 are both green sub-pixels G2 as an example.
  • a part of the light-shielding pattern 2 disposed in the white sub-pixel region W1 where the white sub-pixel W2 is located includes a thin film transistor 21 . That is, the thin film transistor 21 in the green sub-pixel G2 is inverted in the white sub-pixel region W1 where the white sub-pixel W2 is located.
  • the thin film transistor 21 can occupy a part of the white sub-pixel W2, reducing the area of the opening in the white sub-pixel W2 and increasing the area of the opening in the green sub-pixel G2. In this way, the ratio between the area occupied by the white sub-pixel W2 and the total area occupied by the red sub-pixel R2 , the green sub-pixel G2 and the blue sub-pixel B2 can be effectively adjusted.
  • each gate line GL may be linear or substantially linear, and then the gate line GL and the data line DL may be directly used as a plurality of subsections in the array substrate 100 The boundary of the pixel region P.
  • a part of the shading pattern 2 disposed in the white sub-pixel area W1 where the white sub-pixel W2 is located includes the part GL1 of the grid line GL passing through the green sub-pixel G2 .
  • the portion GL1 of the gate line GL passing through the green sub-pixel G2 is bent toward the white sub-pixel W2, and the entire gate line GL is in the shape of a zigzag line.
  • the portion GL1 of the gate line GL passing through the green sub-pixel G2 can occupy a part of the white sub-pixel W2, thereby reducing the area of the opening in the white sub-pixel W2.
  • the thin film transistor 21 in the green sub-pixel G2 will move toward the white sub-pixel W2 accordingly, thereby increasing the size of the The area of the opening in the green sub-pixel G2. This can ensure the effect of adjusting the ratio between the area occupied by the white sub-pixel W2 and the total area occupied by the red sub-pixel R2 , the green sub-pixel G2 , and the blue sub-pixel B2 .
  • connection between the unbent parts of each gate line GL and the data line DL can be used as multiple sub-pixel regions in the array substrate 100 Boundary of P.
  • a part of the light-shielding pattern 2 disposed in the white sub-pixel area W1 where the white sub-pixel W2 is located also includes the part GL1 and the thin film of the grid line GL passing through the green sub-pixel G2.
  • transistor 21 the portion GL1 of the gate line GL passing through the green sub-pixel G2 is bent toward the white sub-pixel W2, and the gate line GL is in the shape of a zigzag line; In the white sub-pixel area W1 where W2 is located.
  • the effect of improving the image quality of the monochrome screen displayed by the LCD can further ensure the effect of adjusting the ratio between the area occupied by the white sub-pixel W2 and the total area occupied by the red sub-pixel R2, the green sub-pixel G2 and the blue sub-pixel B2, thereby ensuring that the array substrate 100 is applied.
  • the types of the above-mentioned thin film transistors 21 include various types.
  • the thin film transistor 21 in at least one sub-pixel S is a top-gate thin film transistor.
  • the thin film transistor 21 in at least one sub-pixel S is a bottom-gate thin film transistor.
  • the thin film transistors 21 in the plurality of sub-pixels S included in the array substrate 100 are all top-gate thin film transistors as an example.
  • the thin film transistor 21 includes: an active layer 211 disposed on one side of the first substrate 1 , and an active layer 211 disposed on a side away from the first substrate 1 .
  • the source electrode 213, the drain electrode 214 and the data line DL may be disposed in the same layer.
  • the "same layer” mentioned herein refers to a layer structure formed by using the same film forming process to form a film layer for forming a specific pattern, and then using the same mask to form a layer structure through one patterning process.
  • a patterning process may include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights Or have different thicknesses.
  • a plurality of data lines DL and the source electrode 213 and the drain electrode 214 of each thin film transistor 21 can be prepared and formed at the same time, which is beneficial to simplify the fabrication process of the array substrate 100 .
  • the shape of the orthographic projection of the above-mentioned active layer 211 on the first substrate 1 includes various shapes. Exemplarily, as shown in FIG. 5 and FIG. 7 , the shape of the orthographic projection of the active layer 211 on the first substrate 1 is a “U” shape.
  • the opening direction of the active layer 211 can be selected and set according to actual needs, which is not limited in the present disclosure.
  • the opening directions of the active layers 211 of the thin film transistors 21 in the array substrate 100 are in the same direction. This is beneficial to reduce the difficulty of preparing and forming the array substrate 100 .
  • the thin film transistor 21 of a primary color sub-pixel S1 adjacent to the white sub-pixel W2 is inverted in the white sub-pixel area W1 where the white sub-pixel W2 is located.
  • the opening direction of the active layer 211 of the thin film transistor 21 may be opposite to the opening direction of the active layers 211 of other thin film transistors 21, so as to ensure the inversion of the thin film transistor 21, and the above-mentioned primary color sub-pixels The effect of increasing the opening area of S1.
  • the opening direction of the active layer 211 of the reversed thin film transistor 21 is the same as the opening direction of the active layers 211 of the other thin film transistors 21, and the opening area of the primary color sub-pixel S1 can be increased, this
  • the opening direction of the active layer 211 of the inverted thin film transistor 21 may be the same as the opening direction of the active layers 211 of the other thin film transistors 21 .
  • the array substrate 100 further includes at least one light shielding layer LS disposed on one side of each thin film transistor 21 close to the first substrate 1 .
  • the array substrate 100 further includes at least one light shielding layer LS disposed on one side of each thin film transistor 21 close to the first substrate 1 .
  • two light shielding layers LS are provided on one side of each thin film transistor 21 close to the first substrate 1 .
  • the light shielding layer LS is configured to shield the conductive channel of the active layer 211 of the corresponding thin film transistor 21 .
  • the two primary color subpixels S1 adjacent to the white subpixel W2 are both the second color subpixels S12, and in the row direction X, the first color subpixel S11 and the third color subpixel S11 It is an example that the sub-pixels S13 are respectively disposed on opposite sides of the second-color sub-pixels S12.
  • a part of the light-shielding patterns 2 included in the second-color sub-pixel S11 adjacent to the white sub-pixel W2 is arranged in the white sub-pixel where the white sub-pixel W2 is located.
  • the sizes of the white sub-pixels W1 and the second-color sub-pixels S11 in the row direction X are reduced, and the first-color sub-pixels S11 and the third-color sub-pixels S13 are in the row direction.
  • the size on X is increased, so that the opening area ratios of the first color sub-pixel S11, the second color sub-pixel S12, the third color sub-pixel S13 and the white sub-pixel W2 are within the above range, and a plurality of white sub-pixels
  • the ratio between the brightness of white light displayed by W2 and the brightness of white light jointly displayed by the plurality of primary color sub-pixels S1 ranges from 2:5 to 6:5. This can reduce or even avoid the waste of white light.
  • the ratio of the opening area of the first color sub-pixel S11, the second color sub-pixel S12, the third color sub-pixel S13 and the white sub-pixel W2 may be: or
  • each numerical value in the above proportional range is only for representing the degree of fluctuation compared to the numerical value 1, and does not represent the actual value of the aperture area of each sub-pixel.
  • the arrangement between the red sub-pixels R2, the green sub-pixels G2, the blue sub-pixels B2 and the white sub-pixels W2 may be, for example: along the column direction Y, the white sub-pixels W2 and the green sub-pixels W2 are arranged in the following manner.
  • the pixels G2 are adjacent; along the row direction X, the red sub-pixel R2 and the blue sub-pixel B2 are located on opposite sides of the green sub-pixel G2.
  • the aperture size of the green sub-pixel G2 (denoted by L GY , for example) is larger than the aperture size of the red sub-pixel R2 (denoted by L RY , for example), the aperture size of the red sub-pixel R2 is L RY and the blue sub-pixel
  • the opening size of B2 (denoted by L BY , for example) is equal or approximately equal
  • each sub-pixel S along the row direction X may refer to the maximum size in the row direction X, or may refer to the minimum size in the row direction X, or may refer to is the average size in the row direction x.
  • the aperture size LRX of the red subpixel R2, the aperture size LGX of the green subpixel G2, the aperture size L BX of the blue subpixel B2, and the aperture size L of the white subpixel W2 The ratio range of WX is (1.4 ⁇ 1.5):(1.2 ⁇ 1.4):(1.4 ⁇ 1.5):1.
  • the ratio range of the aperture size L RY of the red sub-pixel R2, the aperture size L GY of the green sub-pixel G2, the aperture size L BY of the blue sub-pixel B2 and the aperture size L WY of the white sub-pixel W2 is (1.2 ⁇ 1.3):(1.3 ⁇ 1.8):(1.2 ⁇ 1.3):1.
  • the ratio between L RX , L GX , L BX , and L WX may be 1.4:1.2:1.4:1, 1.42:1.23:1.45:1, or 1.5:1.4:1.5:1, and so on.
  • L RX can be 22 ⁇ m
  • L GX can be 21 ⁇ m
  • L BX can be 22 ⁇ m
  • L WX can be 15 ⁇ m.
  • the ratio between L RY , L GY , L BY , and L WY may be 1.2:1.3:1.2:1, 1.25:1.4:1.26:1, or 1.3:1.8:1.3:1, and so on.
  • LRY may be 50.4 ⁇ m
  • L GY may be 54.6 ⁇ m
  • L BY may be 50.4 ⁇ m
  • L WY may be 42 ⁇ m.
  • the white point coordinates may be (0.299, 0.315).
  • the array substrate 100 further includes: a plurality of common electrode lines VL extending along the column direction Y.
  • each sub-pixel S further includes a common electrode 3 disposed on a side of the plurality of light shielding patterns 2 away from the first substrate 1 .
  • the common electrode 3 is electrically connected to at least one common electrode line VL. At this time, the at least one common electrode line VL can be used to transmit a common voltage signal to the common electrode 3 .
  • the relationship between the common electrode 3 and the common electrode line VL includes many kinds, which can be selected and set according to actual needs.
  • the common electrode 3 may be electrically connected to the common electrode line VL in a one-to-one correspondence. In this way, the number of the common electrode lines VL can be reduced, thereby reducing the space ratio of the common electrode lines VL in the array substrate 100 .
  • each common electrode 3 may be electrically connected to a plurality of common electrode lines VL.
  • common electrode lines VL when the connection between one common electrode line VL among the plurality of common electrode lines VL and the common electrode 3 is abnormal, other common electrode lines VL can also be used to transmit common voltage signals to the common electrode 3, which is beneficial to The reliability between the common electrode 3 and the common electrode line VL is improved.
  • the above-mentioned relationship between the common electrode 3 and the sub-pixel S includes many kinds, which can be selected and set according to actual needs.
  • each sub-pixel S includes one common electrode 3 .
  • each sub-pixel S can be provided with a common voltage signal independently, so as to avoid the situation of cross-talk between common voltage signals in different sub-pixels S.
  • each common electrode 3 corresponds to a plurality of sub-pixels S.
  • the common electrodes 3 in the plurality of sub-pixels S are electrically connected to each other and form an integrated structure. This is beneficial to simplify the process difficulty of preparing and forming the common electrode 3 .
  • each common electrode 3 may correspond to two subpixels S, or may correspond to three subpixels S, or may correspond to four subpixels S.
  • each common electrode 3 may correspond to sixteen sub-pixels S.
  • sixteen sub-pixels S four sub-pixels S (for example, including a red sub-pixel R2, a green sub-pixel G2, a blue sub-pixel B2 and a white sub-pixel W2) arranged in sequence along the row direction X constitute a group
  • four groups of sub-pixels are arranged in sequence along the column direction Y.
  • the plurality of common electrodes 3 may be arranged in an array, and along the column direction Y, the plurality of common electrodes 3 in each column may be electrically connected to, for example, one common electrode line VL.
  • each common electrode 3 corresponds to a plurality of sub-pixels S
  • the common electrodes 3 in the plurality of sub-pixels S can be connected, for example, as shown in FIG. 10 , or, for example, as shown in FIG. 11 . connection method.
  • each common electrode line VL may be disposed between, for example, the red sub-pixel R2 and the green sub-pixel G2 and between the blue sub-pixel B2 and the white sub-pixel W2.
  • each common electrode line VL may also be located between the red sub-pixel R2 and the white sub-pixel W2 and between the green sub-pixel G2 and the blue sub-pixel B2.
  • the positional relationship between the plurality of common electrode lines VL and the common electrode 3 includes various types. Exemplarily, as shown in FIG. 6 and FIG. 7 , the above-mentioned plurality of common electrode lines VL and the data lines DL included in the array substrate 100 are arranged in the same layer. At this time, the above-mentioned plurality of common electrode lines VL are located on the side of the common electrode 3 close to the first substrate 1 .
  • the common electrode line VL and the data line DL can be prepared and formed at the same time in one patterning process, which simplifies the fabrication process of the array substrate 100.
  • the extension direction of the common electrode line VL and the data line DL is the same, by arranging the common electrode line VL and the data line DL in the same layer, it is possible to avoid the situation that the common electrode line VL and the data line DL cross and cause a short circuit,
  • the number of film layers included in the array substrate 100 can be reduced to avoid increasing the thickness of the array substrate 100 .
  • the ratio of the size of each common electrode line VL in the direction perpendicular to the column direction Y and the size of the data line DL in the direction perpendicular to the column direction Y ranges from 1:2 to 1:1.
  • each common electrode line VL in the vertical direction Y may be the same as or different from the size of the different data lines DL in the vertical direction Y.
  • each common electrode line VL in the direction perpendicular to the column direction Y is the same as the size of the different data lines DL in the direction perpendicular to the column direction Y.
  • the ratio can be, for example, 1:2, or 1:1.
  • each common electrode line VL in the direction perpendicular to the column direction Y is different in proportion to the size of the different data lines DL in the direction perpendicular to the column direction Y.
  • the dimension of each common electrode line VL in the direction perpendicular to the column direction Y is the same as that of a part of the data lines DL (for example, adjacent to the common electrode line VL and not arranged between the two).
  • the ratio of the dimensions of the data lines DL) of other structures in the direction perpendicular to the column direction Y is 1:1, and the ratio of the dimensions of the other part of the data lines DL) in the direction perpendicular to the column direction Y is 1:2.
  • each common electrode line VL in the direction Y perpendicular to the column may refer to, for example, the average size of each common electrode line VL in the direction Y perpendicular to the column, and the size of the data line DL in the direction perpendicular to the column
  • the size in the direction Y may refer to, for example, the average size of each data line DL in the direction Y perpendicular to the column.
  • the above-mentioned common electrodes 3 are multiplexed as touch electrodes, and the above-mentioned common electrode lines VL are multiplexed as touch signal lines.
  • the array substrate 100 provided by some embodiments of the present disclosure can be applied to an LCD in a self-capacitance mode, and the LCD can implement a display function and a touch function in time intervals.
  • a common voltage signal can be transmitted to the common electrode 3 by using the common electrode line VL.
  • the common electrode line VL can be used to input a signal (eg, a touch detection signal) to the common electrode 3 , or output a signal (eg, a capacitance value signal) in the common electrode 3 .
  • a signal eg, a touch detection signal
  • a capacitance value signal e.g., a capacitance value signal
  • the capacitance value borne by each common electrode 3 is a fixed value; and when the human body touches the LCD, the capacitance borne by the common electrode 3 corresponding to the position touched by the human body is The value is a fixed value superimposed on the human body capacitance value, and then the capacitance value of each common electrode 3 can be transmitted through the common electrode line VL, the change of the capacitance value of each common electrode 3 can be detected, and the position touched by the human body can be determined.
  • each sub-pixel S further includes a pixel electrode 4 disposed on the side of the common electrode 3 away from the first substrate 1 .
  • the pixel electrode 4 can be electrically connected to the source electrode 213 or the drain electrode 214 of the thin film transistor 21 in the same sub-pixel S.
  • each pixel electrode 4 is electrically connected to the drain electrode 214 of the thin film transistor 21 in the same sub-pixel S, and the source electrode 213 of the thin film transistor 21 is electrically connected to the corresponding data line DL. connect.
  • the thin film transistor 21 is turned on, the data voltage signal in the data line DL can be sequentially transmitted to the pixel electrode 4 through the source electrode 213 and the drain electrode 214 .
  • the pixel electrode 4 has at least one slit 41 . That is, the pixel electrode 4 may have one slit 41 or may have a plurality of slits 41 .
  • the pixel electrode 4 in the white sub-pixel W2 has one slit 41
  • the pixel electrode 4 in each primary color sub-pixel S1 has two slits 41 .
  • the gap between the common electrode 3 and the pixel electrode 4 can be made A part of the electric field generated between the two is located on the side of the pixel electrode 4 away from the common electrode 3 through the at least one slit.
  • a part of the electric field on the side of the pixel electrode 4 away from the common electrode 3 can be used to drive the liquid crystal molecules to deflect, so that the LCD can realize image display.
  • the above-mentioned materials of the common electrode 3 and the pixel electrode 4 may be conductive materials with high light transmittance.
  • the conductive material may be Indium Tin Oxide (ITO for short) or Indium Gallium Zinc Oxide (IGZO for short). This can avoid affecting the display effect of the LCD.
  • the extending direction of the at least one slit 41 may be parallel to the column direction Y or at an acute angle.
  • the pixel electrode 4 includes strip-shaped sub-electrodes 42 located on both sides of each slit 41 .
  • the pixel electrode 4 may include two strip-shaped sub-electrodes 42; if the pixel electrode 4 has two slits 41, the pixel electrode 4 may include three Strip-shaped sub-electrodes 42 . That is, the number of strip-shaped sub-electrodes 42 is one more than the number of slits 41 .
  • the pixels in the white sub-pixel W2 includes a plurality of red sub-pixels R2, a plurality of green sub-pixels G2 and a plurality of blue sub-pixels B2, in the row direction X, the pixels in the white sub-pixel W2
  • the ratio range between the size of the slit 41 of the electrode 4 and the size of the strip-shaped sub-electrode 42 is the same as the ratio range between the size of the slit 41 of the pixel electrode 4 and the size of the strip-shaped sub-electrode 42 in the green sub-pixel G2 or roughly the same.
  • the size of the slit 41 of the pixel electrode 4 in the white sub-pixel W2 is the same or approximately the same as the size of the slit 41 of the pixel electrode 4 in the green sub-pixel G2;
  • the size of the strip-shaped sub-electrodes 42 of the electrode 4 is the same or approximately the same as the size of the strip-shaped sub-electrodes 42 of the pixel electrode 4 in the green sub-pixel G2. In this way, the data line DL can be prevented from taking a broken line.
  • the ratio range between the size of the slit 41 of the pixel electrode 4 in the white sub-pixel W2 and the size of the strip-shaped sub-electrode 42 is (2.4 ⁇ 2.8):(2.0 ⁇ 2.7).
  • the ratio range between the size of the slit 41 of the pixel electrode 4 in the green sub-pixel G2 and the size of the strip-shaped sub-electrode 42 may be (2.4 ⁇ 2.8):(2.0 ⁇ 2.7).
  • the size of the slit 41 of the pixel electrode 4 in the white sub-pixel W2 is 2.4 ⁇ m
  • the size of the strip-shaped sub-electrode 42 of the pixel electrode 4 in the white sub-pixel W2 is 2.0 ⁇ m.
  • the two The ratio between can be 2.4:2.0.
  • the size of the slit 41 of the pixel electrode 4 in the white sub-pixel W2 is 2.8 ⁇ m
  • the size of the strip-shaped sub-electrode 42 of the pixel electrode 4 in the white sub-pixel W2 is 2.7 ⁇ m. The ratio between them can be 2.8:2.7.
  • the size of the slit 41 of the pixel electrode 4 in the white sub-pixel W2 is 2.6 ⁇ m, and the size of the strip-shaped sub-electrode 42 of the pixel electrode 4 in the white sub-pixel W2 is 2.5 ⁇ m.
  • the ratio between them can be 2.6:2.5.
  • the pixels in the red sub-pixel R2 includes a plurality of red sub-pixels R2, a plurality of green sub-pixels G2 and a plurality of blue sub-pixels B2, in the row direction X, the pixels in the red sub-pixel R2
  • the ratio range between the size of the slit 41 of the electrode 4 and the size of the strip-shaped sub-electrode 42 is the same as the ratio range between the size of the slit 41 of the pixel electrode 4 and the size of the strip-shaped sub-electrode 42 in the blue sub-pixel B2 or roughly the same.
  • the size of the slit 41 of the pixel electrode 4 in the red sub-pixel R2 is the same or approximately the same as the size of the slit 41 of the pixel electrode 4 in the blue sub-pixel B2; in the red sub-pixel R2
  • the size of the strip-shaped sub-electrodes 42 of the pixel electrode 4 is the same or approximately the same as the size of the strip-shaped sub-electrodes 42 of the pixel electrode 4 in the blue sub-pixel B2. In this way, the data line DL can be prevented from taking a broken line.
  • the ratio between the size of the slit 41 of the pixel electrode 4 in the red sub-pixel R2 and the size of the strip-shaped sub-electrode 42 ranges from (2.2 ⁇ 2.8):(2.0 ⁇ 2.5).
  • the ratio range between the size of the slit 41 of the pixel electrode 4 and the size of the stripe-shaped sub-electrode 42 in the blue subpixel B2 may also be (2.2 ⁇ 2.8):(2.0 ⁇ 2.5).
  • the size of the slit 41 of the pixel electrode 4 in the red sub-pixel R2 is 2.8 ⁇ m, and the size of the strip-shaped sub-electrode 42 of the pixel electrode 4 in the red sub-pixel R2 is 2.0 ⁇ m.
  • the ratio between can be 2.8:2.0.
  • the size of the slit 41 of the pixel electrode 4 in the red sub-pixel R2 is 2.2 ⁇ m, and the size of the strip-shaped sub-electrode 42 of the pixel electrode 4 in the red sub-pixel R2 is 2.5 ⁇ m. The ratio between them can be 2.2:2.5.
  • the size of the slit 41 of the pixel electrode 4 in the red sub-pixel R2 is 2.4 ⁇ m
  • the size of the strip-shaped sub-electrode 42 of the pixel electrode 4 in the red sub-pixel R2 is 2.3 ⁇ m.
  • the ratio between them can be 2.4:2.3.
  • the size relationship between the slit 41 and the strip-shaped sub-electrode 42 along the row direction X can ensure that a part of the electric field formed on the side of the pixel electrode 4 away from the common electrode 3 is or approximately parallel electric field.
  • the array substrate 100 when the array substrate 100 is applied to an LCD, it can be ensured that the liquid crystal molecules in the LCD can be angularly deflected in a direction parallel to the plane of the LCD under the action of the partial electric field, thereby changing the polarization state of polarized light.
  • the size of the slit 41 of each pixel electrode 4 and the size of the strip-shaped sub-electrodes 42 refer to the maximum size in the row direction X, or refer to the maximum size in the row direction The smallest dimension in X, or the average dimension in the row direction X.
  • the display device 1000 includes: an array substrate 100 as provided in some of the above embodiments, an opposite substrate 200 disposed opposite to the array substrate 100 , and disposed between the array substrate 100 and the opposite substrate 200 the liquid crystal layer 300.
  • the above-mentioned liquid crystal layer 300 includes a plurality of liquid crystal molecules.
  • the electric field generated between the pixel electrode 4 and the common electrode 3 in the array substrate 100 can drive the deflection of the liquid crystal molecules in the liquid crystal layer 300, so that the display device 1000 realizes image display.
  • the display device 1000 further includes: a backlight source 400 disposed on the side of the array substrate 100 away from the opposite substrate 100 .
  • the backlight 400 is configured to provide the display device 1000 with a light source required for image display.
  • the display device 1000 provided in some embodiments of the present disclosure can achieve the same beneficial effects as the array substrate 100 provided in the above-mentioned embodiments, and will not be repeated here.
  • the display of the display device 1000 can be improved.
  • brightness Exemplarily, in the display device 1000 provided in some embodiments of the present disclosure, the display brightness can be improved by 3% compared to the LCD in the related art.
  • the display device 1000 in the case where the array substrate 100 provided in some of the above embodiments is applied to the display device 1000 , it is beneficial to improve the dislocation resistance between the array substrate 100 and the opposite substrate 200 .
  • the display device 1000 provided in some embodiments of the present disclosure can improve the display brightness by 2 compared to the LCD in the related art. %.
  • the above-mentioned opposite substrate 200 includes: a second substrate 5 .
  • the second substrate 5 can have the same structure as the first substrate 1, for example.
  • the above-mentioned opposite substrate 200 further includes: a black matrix 6 disposed on the side of the second substrate 5 close to the array substrate 100 .
  • the black matrix 6 has a plurality of openings K.
  • the plurality of openings K include a plurality of first openings K1 respectively opposite to the plurality of white sub-pixels W2 in the array substrate 100 and a plurality of second openings K1 respectively opposite to the plurality of primary color sub-pixels S1 in the array substrate 100 Opening K2.
  • the above-mentioned black matrix 6 is configured to shield a plurality of gate lines GL, a plurality of data lines DL and a plurality of thin film transistors 21 in the array substrate 100 .
  • the orthographic projections of the above-mentioned plurality of thin film transistors 21 on the first substrate 1 may be located within the orthographic projection range of the black matrix 6 on the first substrate 1 .
  • the black matrix 6 can be used to block the external light emitted to the plurality of thin film transistors 21 , so as to prevent the external light from adversely affecting the performance of the plurality of thin film transistors 21 .
  • the orthographic projections of the above-mentioned plurality of gate lines GL and the plurality of data lines DL on the first substrate 1 may be located within the orthographic projection range of the black matrix 6 on the first substrate 1 .
  • the black matrix 6 can be used to block the external light emitted to the plurality of grid lines GL and the plurality of data lines DL, so as to avoid the reflection of the external light by the plurality of grid lines GL and the plurality of data lines DL, which is beneficial to the display Device 1000 has a high contrast ratio.
  • the orthographic projection of the black matrix 6 on the first substrate 1 may also be located within the orthographic projection range of the plurality of gate lines GL and the plurality of data lines DL on the first substrate 1, and also That is, the black matrix 6 does not completely block the plurality of gate lines GL and the plurality of data lines DL.
  • the reflection of the external light by the plurality of gate lines GL and the plurality of data lines DL can be reduced, the area of the orthographic projection of the black matrix 6 on the first substrate 1 can be reduced, and the amount of the black matrix 6 can be increased.
  • the area of the plurality of openings K increases the aperture ratio of the display device 1000 .
  • the opposite substrate 200 further includes: a color filter layer 7 disposed in the plurality of second openings K2 .
  • the color filter layer 7 includes The red color filter portions 71 corresponding to the plurality of red sub-pixels R2, the green color filter portions 72 corresponding to the plurality of green sub-pixels G2 respectively, and the blue filter portions 72 corresponding to the plurality of blue sub-pixels B2 respectively Color part 73.
  • the surface of the color filter layer 7 away from the second substrate 5 and the surface of the black matrix 6 away from the second substrate 5 may be flush with each other.
  • the surface of the color filter layer 7 on the side away from the second substrate 5 is higher or lower than the surface of the black matrix 6 on the side away from the second substrate 5 .
  • the above-mentioned opposite substrate 200 further includes: a flat layer 8 disposed on the side of the color filter layer 7 away from the second substrate 5 . A portion of the flat layer is trapped in the plurality of first openings K1 of the black matrix 6 .
  • the thickness of the portion of the liquid crystal layer 300 corresponding to the plurality of second openings K2 ie, the dimension along the direction perpendicular to the second substrate 5
  • the thickness is equal or approximately equal, which is beneficial to avoid affecting the light extraction effect.
  • the display device 1000 further includes: a plurality of spacers disposed between the array substrate 100 and the opposite substrate 200 .
  • the plurality of spacers described above are configured to form support for the array substrate 100 and the opposite substrate 200 , so that the distances between different positions of the array substrate 100 and the opposite substrate 200 are consistent or substantially consistent, avoiding The display effect of the display device 1000 is affected.
  • the above-mentioned spacers can be arranged at positions corresponding to the white sub-pixel region W1, so that the spacers can be well arranged while avoiding an additional increase in the area blocked by the black matrix 6. , thereby avoiding reducing the aperture ratio of the display device 1000 .
  • the shape of a color filter portion adjacent to the first opening K1 may be set so that the color filter portion forms a half-encirclement of the first opening K1 .
  • the orthographic projection of the red color filter portion 71 on the array substrate 100 is an “L” shape. In this way, it is convenient to set the spacer 500 at the position of the "L"-shaped red color filter portion 71 .
  • the display device 1000 when the common electrodes 3 in the array substrate 100 are multiplexed as touch electrodes and the common electrode lines VL are multiplexed as touch signal lines, the display device 1000 further includes: disposed on the array substrate 100 The touch and display driver integration (Touch and Display Driver Integration, referred to as TDDI) chip in the border area of the device.
  • TDDI touch and Display Driver Integration
  • the above-mentioned TDDI chip is configured to transmit a common voltage signal to the common electrode 3 of the array substrate 100 through the common electrode line VL in the display stage of the display device 1000 , so that the common electrode 3 can be in phase with the pixel electrode 4 In cooperation, the display device 1000 can display images.
  • the above TDDI chip is also configured to transmit a touch control signal to the common electrode 3 through the common electrode line VL in the touch control stage of the display device 1000 , so as to realize the touch control function by using the common electrode 3 .
  • the display device 1000 can realize different functions. That is, the touch function and the display function are integrated together, which is beneficial to simplify the structure of the display device 1000 and simplify the manufacturing process of the display device 1000 .
  • display device 1000 may be any device that displays text or images, whether in motion (eg, video) or stationary (eg, still images). More specifically, it is contemplated that the embodiments may be implemented in or associated with a wide variety of electronic devices, such as, but not limited to, mobile phones, wireless devices, personal data assistants (Personal Digital Assistants) Assistant, PDA for short), handheld or portable computer, Global Positioning System (GPS) receiver/navigator, camera, Moving Picture Experts Group 4 (MP4) video player, video camera , game consoles, watches, clocks, calculators, television monitors, computer monitors, automotive displays (eg, odometer displays, etc.), navigators, cockpit controls and/or displays, camera-view displays (eg, vehicles rear view camera displays), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging and aesthetic structures (eg, displays for an image of a piece of jewelry), etc.
  • GPS Global Positioning System
  • MP4 Moving Picture Experts Group 4

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Abstract

一种阵列基板，具有呈阵列状排布的多个子像素区域，所述多个子像素区域包括多个白色子像素区域和多个基色子像素区域。所述阵列基板包括：第一衬底；以及，设置在所述第一衬底一侧的多个子像素。所述多个子像素包括多个白色子像素和多个基色子像素；沿列方向，每个白色子像素与至少一个基色子像素相邻。其中，每个子像素具有多个遮光图案。沿所述列方向，与所述白色子像素相邻的一个基色子像素的多个遮光图案中，一部分遮光图案设置在所述白色子像素所在的白色子像素区域内，另一部分遮光图案设置在该基色子像素对应的基色子像素区域内。

Description

阵列基板及显示装置
本申请要求于2020年07月31日提交的、申请号为202010763238.5的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，尤其涉及一种阵列基板及显示装置。
背景技术
液晶显示装置(Liquid Crystal Display，简称LCD)由于具有功耗小、微型化、轻薄等优点，因而得到广泛地应用。
发明内容
一方面，提供一种阵列基板。所述阵列基板具有呈阵列状排布的多个子像素区域，所述多个子像素区域包括多个白色子像素区域和多个基色子像素区域。所述阵列基板包括：第一衬底；以及，设置在所述第一衬底一侧的多个子像素。所述多个子像素包括多个白色子像素和多个基色子像素；沿列方向，每个白色子像素与至少一个基色子像素相邻。其中，每个子像素具有多个遮光图案；沿所述列方向，与所述白色子像素相邻的一个基色子像素的多个遮光图案中，一部分遮光图案设置在所述白色子像素所在的白色子像素区域内，另一部分遮光图案设置在该基色子像素对应的基色子像素区域内。
在一些实施例中，所述子像素的所述多个遮光图案包括：沿所述列方向或大致沿所述列方向延伸的数据线中，经过所述子像素的部分；沿行方向或大致沿所述行方向延伸的栅线中，经过所述子像素的部分；所述行方向与所述列方向交叉；以及，与所述数据线和所述栅线电连接、且用于驱动所述子像素的薄膜晶体管。其中，沿所述列方向，与所述白色子像素相邻的一个基色子像素的多个遮光图案中，设置在所述白色子像素所在的白色子像素区域内的一部分遮光图案包括：所述栅线中经过所述基色子像素的部分和/或所述薄膜晶体管。
在一些实施例中，所述多个基色子像素包括多个第一颜色子像素、多个第二颜色子像素和多个第三颜色子像素。其中，第一颜色子像素、第二颜色子像素、第三颜色子像素和白色子像素的开口面积比例范围为(0.8～1.2):(0.8～1.2):(0.8～1.2):(0.4～0.8)。
在一些实施例中，所述第一颜色子像素包括红色子像素，所述第二颜色子像素包括绿色子像素，所述第三颜色子像素包括蓝色子像素。沿所述列方向，所述白色子像素与所述绿色子像素相邻。沿行方向，所述红色子像素和所述蓝色子像素位于所述绿色子像素的相对两侧。
在一些实施例中，在所述行方向上，所述红色子像素的开口尺寸和所述蓝色子像素的开口尺寸相等或大致相等，所述红色子像素的开口尺寸大于所述绿色子像素的开口尺寸，所述绿色子像素的开口尺寸大于所述白色子像素的开口尺寸。在所述列方向上，所述绿色子像素的开口尺寸大于所述红色子像素的开口尺寸，所述红色子像素的开口尺寸和所述蓝色子像素的开口尺寸相等或大致相等，所述红色子像素的开口尺寸大于所述白色子像素的开口尺寸。
在一些实施例中，在所述行方向上，所述红色子像素的开口尺寸、所述绿色子像素的开口尺寸、所述蓝色子像素的开口尺寸和所述白色子像素的开口尺寸的比例范围为(1.4～1.5):(1.2～1.4):(1.4～1.5):1。在所述列方向上，所述红色子像素的开口尺寸、所述绿色子像素的开口尺寸、所述蓝色子像素的开口尺寸和所述白色子像素的开口尺寸的比例范围为(1.2～1.3):(1.3～1.8):(1.2～1.3):1。
在一些实施例中，所述阵列基板，还包括：沿所述列方向延伸的多条公共电极线。其中，所述子像素还包括设置在所述多个遮光图案远离所述第一衬底一侧的公共电极。所述公共电极与至少一条公共电极线电连接。
在一些实施例中，在所述多个遮光图案包括数据线中经过所述子像素的部分的情况下，所述多条公共电极线与所述数据线同层设置。
在一些实施例中，所述公共电极线在垂直于所述列方向上的尺寸，与所述数据线在垂直于所述列方向上的尺寸的比例范围为1:2～1:1。
在一些实施例中，所述子像素还包括设置在所述公共电极远离所述第一衬底一侧的像素电极。所述像素电极具有至少一个狭缝；所述至少一个狭缝的延伸方向与所述列方向平行或呈锐角。
在一些实施例中，所述像素电极包括位于所述狭缝两侧的条状子电极。在所述多个基色子像素包括多个红色子像素、多个绿色子像素和多个蓝色子像素的情况下，在行方向上，所述白色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围，与所述绿色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围相同或大致相同。
在一些实施例中，在所述行方向上，所述白色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围为(2.4～2.8):(2.0～2.7)。
在一些实施例中，在所述行方向上，所述红色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围，与所述蓝色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围相同或大致相同。
在一些实施例中，在所述行方向上，所述红色子像素中像素电极的狭缝的 尺寸与条状子电极的尺寸之间的比例范围为(2.2～2.8):(2.0～2.5)。
另一方面，提供一种显示装置。所述显示装置包括：如上述任一实施例所述的阵列基板；与所述阵列基板相对设置的对置基板；以及，设置在所述阵列基板和所述对置基板之间的液晶层。
在一些实施例中，所述对置基板包括：第二衬底；设置在所述第二衬底靠近所述阵列基板一侧的黑矩阵，所述黑矩阵具有多个开口，所述多个开口包括分别与所述阵列基板中的多个白色子像素相对的多个第一开口和分别与所述阵列基板中的多个基色子像素相对的多个第二开口；设置在所述多个第二开口内的滤色层；以及，设置在所述滤色层远离所述第二衬底一侧的平坦层，所述平坦层的一部分陷入所述多个第一开口内。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程等的限制。
图1为根据本公开的一些实施例中的一种阵列基板的结构图；
图2为根据本公开的一些实施例中的另一种阵列基板的结构图；
图3为根据本公开的一些实施例中的又一种阵列基板的结构图；
图4为根据本公开的一些实施例中的又一种阵列基板的结构图；
图5为根据本公开的一些实施例中的又一种阵列基板的结构图；
图6为根据本公开的一些实施例中的又一种阵列基板的结构图；
图7为图6所示阵列基板的沿A-A＇向的一种剖视图；
图8为图7所示阵列基板的一种局部结构图；
图9为图8所示结构的沿C-C＇向的一种剖视图；
图10为根据本公开的一些实施例中的一种公共电极的结构图；
图11为根据本公开的一些实施例中的另一种公共电极的结构图；
图12为根据本公开的一些实施例中的一种显示装置的结构图；
图13为根据本公开的一些实施例中的一种显示装置的俯视图；
图14为图13所示显示装置沿D-D＇向的一种剖视图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描 述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。这里所公开的实施例并不必然限制于本文内容。
如本文中所使用，根据上下文，术语“如果”任选地被解释为意思是“当……时”或“在……时”或“响应于确定”或“响应于检测到”。类似地，根据上下文，短语“如果确定……”或“如果检测到[所陈述的条件或事件]”任选地被解释为是指“在确定……时”或“响应于确定……”或“在检测到[所陈述的条件或事件]时”或“响应于检测到[所陈述的条件或事件]”。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
如本文所使用的那样，“约”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统 的局限性)所确定。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
LCD通常具有多个像素(例如每个像素包括红色子像素、绿色子像素和蓝色子像素)，该多个像素可以相互配合，使得LCD能够进行图像显示。
在相关技术中，上述每个像素还会包括白色子像素，以便于能够利用该白色子像素提高LCD的显示亮度。
然而，由于LCD中的每个像素所占据的面积基本上是一定的，且每个像素中白色子像素所占据的面积与红色子像素、绿色子像素和蓝色子像素所占据的总面积之间的比例较高，容易使得白色子像素所显示的白光亮度与红色子像素、绿色子像素和蓝色子像素共同显示的白光亮度之间的比例较高，超出产品白光的亮度规格，进而容易造成白光的浪费。而且，红色子像素、绿色子像素和蓝色子像素所占据的总面积的比例较小，这样容易导致红色、绿色和蓝色等单色画面的亮度下降，进而导致单色画面的图像品质下降。
基于此，本公开的一些实施例提供了一种阵列基板100。如图1～图3所示，该阵列基板100具有呈阵列状排布的多个子像素区域P，该多个子像素区域P包括多个白色子像素区域W1和多个基色子像素区域P1。
上述多个基色子像素区域P1所对应的颜色可以包括第一颜色、第二颜色和第三颜色。其中，第一颜色、第二颜色和第三颜色的种类包括多种，可以根据实际需要选择设置。
在一些示例中，如图1～图3所示，第一颜色包括红色，第二颜色包括绿色，第三颜色包括蓝色。也即，上述多个基色子像素区域P1可以包括多个红色子像素区域R1、多个绿色子像素区域G1和多个蓝色子像素区域B1。
在另一些示例中，第一颜色包括品红色，第二颜色包括黄色，第三颜色包括青色。也即，上述多个基色子像素区域P1可以包括多个品红色子像素区域、多个黄色子像素区域和多个青色子像素区域。
上述多个子像素区域P呈阵列状排布，也即上述多个白色子像素区域W1和上述多个基色子像素区域P1呈阵列状排布。其中，该多个白色子像素区域 W1和多个基色子像素区域P1之间的排布方式包括多种，可以根据实际需要选择设置。
此处，以该多个基色子像素区域P1包括多个红色子像素区域R1、多个绿色子像素区域G1和多个蓝色子像素区域B1为例，对多个白色子像素区域W1和多个基色子像素区域P1之间的排布方式进行示意性说明。
在一些示例中，如图1所示，沿行方向X，每行的多个子像素区域P中，红色子像素区域R1、绿色子像素区域G1、蓝色子像素区域B1和白色子像素区域W1依次交替排布。沿列方向Y，每列的多个子像素区域P中，红色子像素区域R1、绿色子像素区域G1、蓝色子像素区域B1和白色子像素区域W1依次交替排布。
在另一些示例中，如图2所示，沿行方向X，每行的多个子像素区域P中，红色子像素区域R1、绿色子像素区域G1、蓝色子像素区域B1和白色子像素区域W1依次交替排布。沿列方向Y，每列的多个子像素区域P中，红色子像素区域R1和蓝色子像素区域B1依次交替排布，或者，绿色子像素区域G1和白色子像素区域W1依次交替排布。
在又一些示例中，如图3所示，沿行方向X，每行的多个子像素区域P中，红色子像素区域R1、绿色子像素区域G1、蓝色子像素区域B1和白色子像素区域W1依次交替排布。沿列方向Y，每列的多个子像素区域P中，红色子像素区域R1、白色子像素区域W1、蓝色子像素区域B1和绿色子像素区域G1依次交替排布。
需要说明的是，沿行方向X，每行的多个子像素区域P中，并不局限于红色子像素区域R1、绿色子像素区域G1、蓝色子像素区域B1和白色子像素区域W1依次交替排布的一种排布方式，还可以按照其他的次序排布，或者，红色子像素区域R1、绿色子像素区域G1、蓝色子像素区域B1和白色子像素区域W1中的两者或者三者依次交替排布。相应的，多个白色子像素区域W1和多个基色子像素区域P1之间的排布方式也便不局限于上述所举例的三种。
此外，沿列方向Y，阵列基板100所具有的多个子像素区域P的尺寸相等或大致相等。每行的多个子像素区域P的边界中，沿行方向X、且位于同一侧的一部分边界之间的连线呈直线或大致呈直线。
在一些示例中，行方向X和列方向Y相互交叉。其中，两者之间的夹角大小可以根据实际需要选择设置，示例性的，行方向X和列方向Y可以相互垂直。
此处，本文中提及的“行”，并不是指纸面上的行方向；本文中提及的“列”， 并不是指纸面上的列方向。在某些情况下，涉及“行”方向的实施例可以在“列”方向的情况下实施，相反亦如此。将本公开所述方案进行90°旋转或镜像后亦属本公开要求保护的权利范畴。
在一些实施例中，如图5～图7所示，上述阵列基板100包括：第一衬底1。
上述多个第一衬底1的类型包括多种，可以根据实际需要选择设置。
例如，第一衬底1可以为空白的衬底基板。又如，第一衬底1可以包括空白的衬底基板以及设置在该空白的衬底基板一侧的功能薄膜(该功能薄膜例如可以为缓冲层)。
上述空白的衬底基板的类型包括多种，具体可以根据实际需要选择设置。例如，空白的衬底基板可以为PMMA(Polymethyl methacrylate，聚甲基丙烯酸甲酯)衬底基板或者玻璃衬底基板。
在一些实施例中，上述阵列基板100还包括：设置在第一衬底1一侧的多个子像素S。其中，在第一衬底1包括空白的衬底基板以及设置在该空白的衬底基板一侧的功能薄膜的情况下，该多个子像素S可以设置在功能薄膜远离空白的衬底基板的一侧。
在一些示例中，上述多个子像素S包括多个白色子像素W2和多个基色子像素S1。
此处，上述多个基色子像素S1所对应的颜色与上述多个基色子像素区域P1所对应的颜色相同。也即，该多个基色子像素S1可以包括多个第一颜色子像素S11、多个第二颜色子像素S12和多个第三颜色子像素S13。
在上述多个基色子像素区域P1包括多个红色子像素区域R1、多个绿色子像素区域G1和多个蓝色子像素区域B1的情况下，上述多个第一颜色子像素S11可以包括多个红色子像素R2，上述多个第二颜色子像素S12可以包括多个绿色子像素G2，上述多个第三颜色子像素S13可以包括多个蓝色子像素B2。在上述多个基色子像素区域P1包括多个品红色子像素区域、多个黄色子像素区域和多个青色子像素区域的情况下，上述多个第一颜色子像素S11可以包括多个品红色子像素，上述多个第二颜色子像素S12可以包括多个黄色子像素，上述多个第三颜色子像素S13可以包括多个青色子像素。
需要说明的是，上述多个白色子像素W2的设置位置和上述多个白色子像素区域W1的设置位置相对应，上述多个基色子像素S1的设置位置和上述多个基色子像素区域P1的设置位置相对应。也即，上述多个白色子像素W2和多个基色子像素S1之间的排布方式，与上述多个白色子像素区域W1和多 个基色子像素区域P1之间的排布方式相同。
在一些示例中，如图1～图3所示，沿列方向Y，每个白色子像素W2与至少一个基色子像素S1相邻。也就是说，沿列方向Y，每个白色子像素W2未与白色子像素W2相邻。
示例性的，如图2所示，沿列方向Y，每个白色子像素W2与一个基色子像素S1相邻。此时，沿列方向Y，位于每个白色子像素W2相对两侧的两个基色子像素S1所对应的颜色相同。例如，如图2所示，沿列方向Y，位于每个白色子像素W2相对两侧的两个基色子像素S1所对应的颜色均为绿色。
示例性的，如图1和图3所示，每个白色子像素W2与多个基色子像素S1相邻。此时，沿列方向Y，位于每个白色子像素W2相对两侧的两个基色子像素S1所对应的颜色不同。例如，如图1所示，沿列方向Y，位于每个白色子像素W2相对两侧的两个基色子像素S1所对应的颜色分别为红色和蓝色。
在一些示例中，如图4所示，每个子像素S具有多个遮光图案2。沿列方向Y，与白色子像素W2相邻的一个基色子像素S1的多个遮光图案2中，一部分遮光图案2设置在白色子像素W2所在的白色子像素区域W1内，另一部分遮光图案2设置在该基色子像素S1对应的基色子像素区域P1内。
在一些示例中，如图4所示，除沿列方向Y与白色子像素W1相邻的基色子像素S1以外的多个基色子像素S1所包括的多个遮光图案2，分别设置在对应的基色子像素区域P1内。
示例性的，如图4所示，沿列方向Y，以白色子像素W2与两个绿色子像素G2相邻为例，其中一个绿色子像素G2的多个遮光图案2中，一部分遮光图案2设置在该白色子像素W2所在的白色子像素区域W1内，另一部分遮光图案2设置在该绿色子像素G2所在的绿色子像素区域G1内。沿行方向X，白色子像素W2的相对两侧设置有红色子像素R2和蓝色子像素B2，绿色子像素G2的相对两侧也设置有红色子像素R2和蓝色子像素B2；其中，红色子像素R2所包括的多个遮光图案2可以位于该红色子像素R2所在的红色子像素区域R1内，蓝色子像素B2所包括的多个遮光图案2可以位于该蓝色子像素B2所在的蓝色子像素区域B1内。
这样可以在减小白色子像素W2中的开口在列方向Y上的尺寸的同时，增大该绿色子像素G2中的开口在列方向Y上的尺寸，也即，可以在减小白色子像素W2中的开口的面积的同时，增大该绿色子像素G2中的开口的面积。
需要说明的是，上述开口的面积指的是，子像素区域P所占据的面积与位于该子像素区域P内的遮光图案2所占据的面积之差。
由此，本公开的一些实施例所提供的阵列基板100，通过设置多个子像素S的排布方式，在列方向Y上，使得每个白色子像素W2与至少一个基色子像素S1相邻，并使得其中的一个基色子像素S1所包括的多个遮光图案2中的一部分遮光图案2，设置在该白色子像素W2所在的白色子像素区域W1内，另一部分遮光图案2设置在该基色子像素S1所对应的基色子像素区域P1内，可以有效减小白色子像素W2中的开口的面积，并增大与白色子像素W2相邻的一个基色子像素S1的开口的面积。这样有利于降低阵列基板100所包括的多个白色子像素W2所占据的面积与多个基色子像素S1所占据的总面积之间的比例，进而降低该多个白色子像素W2所显示的白光亮度与该多个基色子像素S1共同显示的白光亮度之间的比例，避免超出白光的亮度规格，减少甚至避免白光的浪费。而且，在将上述阵列基板100应用至LCD中的情况下，可以有效改善LCD所显示单色画面的图像品质。
此外，在列方向Y上，在将与白色子像素W2相邻的一个基色子像素S1的多个遮光图案2中的一部分遮光图案2，设置在该白色子像素W2所在的白色子像素区域W1内的基础上，可以减小白色子像素W1以及该基色子像素S1在行方向X上的尺寸，并增大设置在该基色子像素S1相对两侧(行方向X上的相对两侧)的两个基色子像素S1在行方向X上的尺寸，也即增大该两个基色子像素S1的开口的面积，这样可以进一步降低阵列基板100所包括的多个白色子像素W2所占据的面积与多个基色子像素S1所占据的总面积之间的比例，进一步减少甚至避免白光的浪费，并提高多个基色子像素S1的显示亮度，进一步改善应用有上述阵列基板100的LCD所显示单色画面的图像品质。
在一些实施例中，如图4～图6所示，阵列基板100还包括：设置在第一衬底1一侧的多条栅线GL和多条数据线DL。该多条栅线GL沿行方向X或大致沿行方向X延伸，该多条数据线DL沿列方向Y或大致沿列方向Y延伸。此处，该多条栅线GL和多条数据线DL交叉且相互绝缘。
在一些示例中，如图4所示，每个子像素S所包括的多个遮光图案2包括：栅线GL中经过该子像素S的部分GL1，数据线DL中经过该子像素S的部分DL1，以及与该栅线GL和数据线DL电连接、且用于驱动该子像素S的薄膜晶体管21。
这也就意味着，沿行方向X，同一行的多个子像素S中的薄膜晶体管21 可以与同一条栅线GL电连接；沿列方向Y，同一列的多个子像素S中的薄膜晶体管21可以与同一条数据线DL电连接。
上述栅线GL、数据线DL以及薄膜晶体管21之间的排布方式包括多种，其中，该排布方式与薄膜晶体管21的结构(薄膜晶体管21包括单栅晶体管和双栅晶体管)相关。此处，以薄膜晶体管21为单栅晶体管为例，对三者之间的排布方式进行示意性说明。
例如，如图4～图6所示，每条栅线GL和同一行的多个薄膜晶体管21之间可以依次交替排布，每条数据线DL和同一列的多个薄膜晶体管21之间也可以依次交替排布。也即，同一行的多个薄膜晶体管21可以和两条栅线GL相邻，同一列的多个薄膜晶体管21可以和两条数据线DL相邻。
又如，每两条栅线GL和两行的多个薄膜晶体管21之间依次交替排布，每条数据线DL和同一列的多个薄膜晶体管21之间也可以依次交替排布。也即，同一行的多个薄膜晶体管21可以和一条栅线GL相邻，同一列的多个薄膜晶体管21可以和两条数据线DL相邻。
在一些示例中，如图4所示，沿列方向Y，与白色子像素W2相邻的一个基色子像素S1的多个遮光图案2中，设置在白色子像素W2所在的白色子像素区域W1内的一部分遮光图案2包括：栅线GL中经过该基色子像素S1的部分GL1和/或薄膜晶体管21。也即，设置在白色子像素W2所在的白色子像素区域W1内的一部分遮光图案2，可以包括栅线GL中经过该基色子像素S1的部分GL1，或者可以包括薄膜晶体管21，或者可以同时包括栅线GL中经过该基色子像素S1的部分GL1和薄膜晶体管21。
此处，以沿列方向Y，与白色子像素W2相邻的两个基色子像素S1均为绿色子像素G2为例。
示例性的，如图4所示，设置在白色子像素W2所在的白色子像素区域W1内的一部分遮光图案2，包括薄膜晶体管21。也即，绿色子像素G2中的薄膜晶体管21反置在该白色子像素W2所在的白色子像素区域W1内。
此时，上述薄膜晶体管21可以占据白色子像素W2的一部分，减小白色子像素W2中开口的面积，并增大绿色子像素G2中开口的面积。这样能够有效调整白色子像素W2所占据的面积与红色子像素R2、绿色子像素G2及蓝色子像素B2所占据的总面积之间的比例。
需要说明的是，在此情况下，如图4所示，每条栅线GL可以呈直线状或大致呈直线状，进而可以直接把栅线GL和数据线DL作为阵列基板100中的多个子像素区域P的边界。
示例性的，如图5和图6所示，设置在白色子像素W2所在的白色子像素区域W1内的一部分遮光图案2，包括栅线GL中经过该绿色子像素G2的部分GL1。此时，栅线GL中经过该绿色子像素G2的部分GL1朝向白色子像素W2弯折，栅线GL整体呈折线形。
这样，栅线GL中经过该绿色子像素G2的部分GL1可以占据白色子像素W2的一部分，减小白色子像素W2中开口的面积。而且，在栅线GL中经过该绿色子像素G2的部分GL1朝向白色子像素W2弯折的同时，该绿色子像素G2中的薄膜晶体管21会随之朝向白色子像素W2移动，进而会增大绿色子像素G2中开口的面积。这样能够确保对白色子像素W2所占据的面积与红色子像素R2、绿色子像素G2及蓝色子像素B2所占据的总面积之间的比例的调整效果。
需要说明的是，在此情况下，如图5和图6所示，可以把每条栅线GL中未弯折部分之间的连线以及数据线DL作为阵列基板100中的多个子像素区域P的边界。
示例性的，如图5和图6所示，设置在白色子像素W2所在的白色子像素区域W1内的一部分遮光图案2，同时包括栅线GL中经过该绿色子像素G2的部分GL1和薄膜晶体管21。也即，栅线GL中经过该绿色子像素G2的部分GL1朝向白色子像素W2弯折，栅线GL整体呈折线形；同时，绿色子像素G2中的薄膜晶体管21反置在该白色子像素W2所在的白色子像素区域W1内。
这样能够进一步确保对白色子像素W2所占据的面积与红色子像素R2、绿色子像素G2及蓝色子像素B2所占据的总面积之间的比例的调整效果，进而确保对应用有阵列基板100的LCD所显示单色画面图像品质的改善效果。
上述薄膜晶体管21的类型包括多种。例如，至少一个子像素S中的薄膜晶体管21为顶栅型薄膜晶体管。又如，至少一个子像素S中的薄膜晶体管21为底栅型薄膜晶体管。此处，本公开的一些实施例以阵列基板100所包括的多个子像素S中的薄膜晶体管21均为顶栅型薄膜晶体管为例。
在一些示例中，如图5～图9所示，薄膜晶体管21包括：设置在第一衬底1的一侧的有源层211、设置在有源层211远离第一衬底1的一侧的栅极212、以及设置在栅极212远离第一衬底1的一侧的源极213和漏极214。其中，源极213、漏极214和数据线DL可以同层设置。
需要说明的是，本文中提及的“同层”指的是采用同一成膜工艺形成用于形成特定图形的膜层，然后利用同一掩模板通过一次构图工艺形成的层结构。 根据特定图形的不同，一次构图工艺可能包括多次曝光、显影或刻蚀工艺，而形成的层结构中的特定图形可以是连续的也可以是不连续的，这些特定图形还可能处于不同的高度或者具有不同的厚度。这样一来，可以同时制备形成多条数据线DL以及每个薄膜晶体管21的源极213和漏极214，有利于简化阵列基板100的制作工艺。
上述有源层211在第一衬底1上的正投影的形状包括多种。示例性的，如图5和图7所示，有源层211在第一衬底1上的正投影的形状呈“U”型。
此处，有源层211的开口方向可以根据实际需要选择设置，本公开对此不做限定。
示例性的，阵列基板100中的各薄膜晶体管21的有源层211的开口方向为同一方向。这样有利于降低制备形成阵列基板100的难度。
此外，如图5和图6所示，在沿列方向Y，与白色子像素W2相邻的一个基色子像素S1的薄膜晶体管21，反置在该白色子像素W2所在的白色子像素区域W1内的情况下，该薄膜晶体管21的有源层211的开口方向可以与其他的薄膜晶体管21的有源层211的开口方向相反，以便于能够确保薄膜晶体管21的反置，对上述基色子像素S1的开口面积的增大效果。当然，在反置的薄膜晶体管21的有源层211的开口方向与其他的薄膜晶体管21的有源层211的开口方向相同、且能够增大上述基色子像素S1的开口面积的情况下，该反置的薄膜晶体管21的有源层211的开口方向也可以与其他的薄膜晶体管21的有源层211的开口方向相同。
在一些实施例中，如图5～图9所示，阵列基板100还包括设置在每个薄膜晶体管21靠近第一衬底1一侧的至少一个遮光层LS。示例性的，每个薄膜晶体管21靠近第一衬底1的一侧设置有两个遮光层LS。该遮光层LS被配置为，对相应的薄膜晶体管21的有源层211的导电沟道进行遮挡。
在一些实施例中，阵列基板100所包括的多个基色子像素S1中，第一颜色子像素S11、第二颜色子像素S12、第三颜色子像素S13和白色子像素W2的开口面积比例范围为(0.8～1.2):(0.8～1.2):(0.8～1.2):(0.4～0.8)。
此处，以在列方向Y上，与白色子像素W2相邻的两个基色子像素S1均为第二颜色子像素S12，且在行方向X上，第一颜色子像素S11和第三颜色子像素S13分别设置在第二颜色子像素S12的相对两侧为例。在列方向Y上，通过将与白色子像素W2相邻的一个第二颜色子像素S11所包括的多个遮光图案2中的一部分遮光图案2，设置在该白色子像素W2所在的白色子像素区域W1内，或者在此基础上，将白色子像素W1以及第二颜色子像素S11在 行方向X上的尺寸减小，并将第一颜色子像素S11和第三颜色子像素S13在行方向X上的尺寸增大，可以使得第一颜色子像素S11、第二颜色子像素S12、第三颜色子像素S13和白色子像素W2的开口面积比例范围为上述范围，并使得多个白色子像素W2所显示的白光亮度与上述多个基色子像素S1共同显示的白光亮度之间的比例范围为2:5～6:5。这样可以减少甚至避免白光的浪费。而且，有利于改善应用有上述阵列基板100的LCD所显示单色画面的图像品质。
示例性的，第一颜色子像素S11、第二颜色子像素S12、第三颜色子像素S13和白色子像素W2的开口面积比例可以为
Figure PCTCN2021099317-appb-000001
或
Figure PCTCN2021099317-appb-000002
需要说明的是，上述比例范围中的每个数值，仅是为了表示相比于数值1的波动程度，而不代表各子像素的开口面积的实际值。
下面，以第一颜色子像素S11包括红色子像素R2，第二颜色子像素S12包括绿色子像素G2，第三颜色子像素S13包括蓝色子像素B2为例，对该三者和白色子像素W2之间的尺寸关系进行示意性说明。其中，如图2所示，红色子像素R2、绿色子像素G2、蓝色子像素B2和白色子像素W2之间的排布方式例如可以为：沿列方向Y，白色子像素W2与绿色子像素G2相邻；沿行方向X，红色子像素R2和蓝色子像素B2位于该绿色子像素G2的相对两侧。
在一些示例中，在行方向X上，红色子像素R2的开口尺寸L RX和蓝色子像素B2的开口尺寸(例如以L BX表示)相等或大致相等，红色子像素R2的开口尺寸(例如以L RX表示)大于绿色子像素G2的开口尺寸(例如以L GX表示)，绿色子像素G2的开口尺寸L GX大于白色子像素W2的开口尺寸(例如以L WX表示)；也即，L RX＝L BX＞L GX＞L WX。在列方向Y上，绿色子像素G2的开口尺寸(例如以L GY表示)大于红色子像素R2的开口尺寸(例如以L RY表示)，红色子像素R2的开口尺寸L RY和蓝色子像素B2的开口尺寸(例如以L BY表示)相等或大致相等，红色子像素R2的开口尺寸L RY大于白色子像素W2的开口尺寸(例如以L WY表示)；也即，L GY＞L RY＝L BY＞L WY。
这样可以确保红色子像素R2、绿色子像素G2和蓝色子像素B2的开口的面积相等或大致相等，且确保该三者的开口的面积大于白色子像素W2的开口的面积。
需要说明的是，各子像素S的沿行方向X上的开口尺寸，例如可以指的 是在行方向X上的最大尺寸，或者可以指的是在行方向X上的最小尺寸，或者可以指的是在行方向X上的平均尺寸。
在一些示例中，在行方向X上，红色子像素R2的开口尺寸L RX、绿色子像素G2的开口尺寸L GX、蓝色子像素B2的开口尺寸L BX和白色子像素W2的开口尺寸L WX的比例范围为(1.4～1.5):(1.2～1.4):(1.4～1.5):1。在列方向Y上，红色子像素R2的开口尺寸L RY、绿色子像素G2的开口尺寸L GY、蓝色子像素B2的开口尺寸L BY和白色子像素W2的开口尺寸L WY的比例范围为(1.2～1.3):(1.3～1.8):(1.2～1.3):1。
示例性的，L RX、L GX、L BX、L WX之间的比例可以为1.4:1.2:1.4:1、1.42:1.23:1.45：1或1.5:1.4:1.5:1等。例如，L RX可以为22μm，L GX可以为21μm，L BX可以为22μm，L WX可以为15μm。
示例性的，L RY、L GY、L BY、L WY之间的比例可以为1.2:1.3:1.2:1、1.25:1.4:1.26:1或1.3:1.8:1.3:1等。例如，L RY可以50.4μm，L GY可以为54.6μm，L BY可以为50.4μm，L WY可以为42μm。
本公开通过设置在行方向X上L RX、L GX、L BX、L WX之间的比例以及L RY、L GY、L BY、L WY之间的比例，可以在提高降低白色子像素W2所显示的白光亮度与红色子像素R2、绿色子像素G2和蓝色子像素B2共同显示的白光亮度的同时，保证红色子像素R2、绿色子像素G2和蓝色子像素B2的白点坐标。例如，该白点坐标可以为(0.299,0.315)。
在一些实施例中，如图5和图6所示，阵列基板100还包括：沿列方向Y延伸的多条公共电极线VL。
在一些示例中，如图6～图8所示，每个子像素S还包括设置在多个遮光图案2远离第一衬底1一侧的公共电极3。该公共电极3与至少一条公共电极线VL电连接。此时，可以利用该至少一条公共电极线VL向该公共电极3传输公共电压信号。
此处，公共电极3和公共电极线VL之间的关系包括多种，可以根据实际需要选择设置。
示例性的，公共电极3可以和公共电极线VL一一对应地电连接。这样可以减少公共电极线VL的数量，进而降低公共电极线VL在阵列基板100中的空间占比。
示例性的，每个公共电极3可以和多条公共电极线VL电连接。这样在该多条公共电极线VL中的一条公共电极线VL与公共电极3之间的连接出现异常的情况下，还可以利用其它的公共电极线VL向公共电极3传输公共电压 信号，有利于提高公共电极3和公共电极线VL之间的可靠性。
上述公共电极3和子像素S之间的关系包括多种，可以根据实际需要选择设置。
示例性的，上述公共电极3和子像素S一一对应。也即，每个子像素S包括一个公共电极3。这样可以独立地为每个子像素S提供公共电压信号，避免出现不同子像素S中的公共电压信号发生串扰的情况。
示例性的，如图5和图6所示，每个公共电极3与多个子像素S相对应。此时，多个子像素S中的公共电极3相互电连接，呈一体结构。这样有利于简化制备形成公共电极3的工艺难度。
此处，每个公共电极3所对应的子像素S的数量可以根据实际需要选择设置。例如，每个公共电极3可以与两个子像素S相对应，或者可以与三个子像素S相对应，或者可以与四个子像素S相对应。
又或者，如图10所示，阵列基板100所包括的多个公共电极3中，每个公共电极3可以与十六个子像素S相对应。该十六个子像素S中，沿行方向X依次排列的四个子像素S(例如包括一个红色子像素R2、一个绿色子像G2、一个蓝色子像素B2和一个白色子像素W2)构成一组子像素，四组子像素沿列方向Y依次排列。基于此，上述多个公共电极3可以呈阵列状排布，沿列方向Y，每一列的多个公共电极3例如可以与一条公共电极线VL电连接。
在每个公共电极3与多个子像素S相对应的情况下，多个子像素S中的公共电极3之间例如可以采用如图10所示的连接方式，或者，例如可以采用如图11所示的连接方式。
上述多条公共电极线VL与子像素S之间的位置关系包括多种。此处，以多个基色子像素S1包括多个红色子像素R2、多个绿色子像素G2和多个蓝色子像素B2，且多个基色子像素S1和白色子像素W2之间采用如图2所示的排布方式为例，每条公共电极线VL例如可以设置在红色子像素R2和绿色子像素G2之间以及蓝色子像素B2和白色子像素W2之间。当然，每条公共电极线VL也可以位于红色子像素R2和白色子像素W2之间以及绿色子像素G2和蓝色子像素B2之间。
上述多条公共电极线VL与公共电极3之间的位置关系包括多种。示例性的，如图6和图7所示，上述多条公共电极线VL与阵列基板100所包括的数据线DL同层设置。此时，上述多条公共电极线VL位于公共电极3靠近第一衬底1的一侧。
通过将公共电极线VL和数据线DL同层设置，可以在一次构图工艺中同 时制备形成公共电极线VL和数据线DL，简化阵列基板100的制备工艺。而且，由于公共电极线VL和数据线DL的延伸方向相同，通过将公共电极线VL和数据线DL同层设置，既可以避免公共电极线VL和数据线DL出现交叉进而导致短接的情况，又可以减少阵列基板100所包括的膜层的数量，避免增大阵列基板100的厚度。
在一些示例中，每条公共电极线VL在垂直于列方向Y上的尺寸，与数据线DL在垂直于列方向Y上的尺寸的比例范围为1:2～1:1。
此处，每条公共电极线VL在垂直于列方向Y上的尺寸，与不同数据线DL在垂直于列方向Y上的尺寸的比例可以相同，也可以不同。
示例性的，每条公共电极线VL在垂直于列方向Y上的尺寸，与不同数据线DL在垂直于列方向Y上的尺寸的比例相同。此时，该比例例如可以为1:2、
Figure PCTCN2021099317-appb-000003
或1:1。
示例性的，每条公共电极线VL在垂直于列方向Y上的尺寸，与不同数据线DL在垂直于列方向Y上的尺寸的比例不同。例如，如图6和图14所示，每条公共电极线VL在垂直于列方向Y上的尺寸，与一部分数据线DL(例如为与公共电极线VL相邻、且两者之间未设置其他结构的数据线DL)在垂直于列方向Y上的尺寸的比例为1:1，与另一部分数据线DL在垂直于列方向Y上的尺寸的比例为1:2。
需要说明的是，上述每条公共电极线VL在垂直于列方向Y上的尺寸例如可以指的是每条公共电极线VL在垂直于列方向Y上的平均尺寸，数据线DL在垂直于列方向Y上的尺寸例如可以指的是每条数据线DL在垂直于列方向Y上的平均尺寸。
在一些示例中，上述公共电极3被复用为触控电极，上述公共电极线VL被复用为触控信号线。
基于此，本公开的一些实施例提供的阵列基板100，可以应用于自电容模式的LCD中，该LCD可以分时段实现显示功能和触控功能。
在显示阶段，可以利用公共电极线VL向公共电极3传输公共电压信号。
在触控阶段，可以利用公共电极线VL向公共电极3中输入信号(例如为触控检测信号)，或者将公共电极3中的信号(例如为电容值信号)输出。在此情况下，在人体未触碰LCD时，各个公共电极3所承受的电容值为一个固定值；而在人体触碰LCD时，人体触碰的位置所对应的公共电极3所承受的电容值为固定值叠加人体电容值，之后可以通过公共电极线VL传输各个公共 电极3的电容值，检测各个公共电极3的电容值的变化，判断出人体所触碰的位置。
在一些实施例中，如图6～图9所示，每个子像素S还包括设置在公共电极3远离第一衬底1一侧的像素电极4。该像素电极4可以与同一子像素S中薄膜晶体管21的源极213或漏极214电连接。
在一些示例中，如图6～图7所示，每个像素电极4和同一子像素S中薄膜晶体管21的漏极214电连接，该薄膜晶体管21的源极213和相应的数据线DL电连接。此时，在薄膜晶体管21导通的情况下，数据线DL中的数据电压信号便可以依次通过源极213、漏极214传输至像素电极4。
在一些示例中，如图6～图7所示，像素电极4具有至少一个狭缝41。也即，像素电极4可以具有一个狭缝41，也可以具有多个狭缝41。
示例性的，白色子像素W2中的像素电极4具有一个狭缝41，每个基色子像素S1中的像素电极4具有两个狭缝41。
通过在像素电极4中设置至少一个狭缝41，这样在同一子像素S中的公共电极3具有公共电压信、像素电极4具有数据电压信号的情况下，可以使得公共电极3和像素电极4之间产生的电场的一部分，通过该至少一个狭缝位于像素电极4远离公共电极3的一侧。在将阵列基板100应用至LCD中的情况下，可以利用位于像素电极4远离公共电极3的一侧的一部分电场，驱动液晶分子偏转，使得LCD实现图像显示。
在一些示例中，上述公共电极3和像素电极4的材料均可以采用具有较高的光线透过率的导电材料。示例性的，该导电材料可以为氧化铟锡(Indium Tin Oxide，简称ITO)或氧化铟镓锌(Indium Gallium Zinc Oxide，简称IGZO)等。这样可以避免影响LCD的显示效果。
在一些示例中，如图6所示，上述至少一个狭缝41的延伸方向可以与列方向Y平行或者呈锐角。
在一些示例中，如图6～图9所示，像素电极4包括位于每个狭缝41两侧的条状子电极42。示例性的，在像素电极4具有一个狭缝41的情况下，像素电极4可以包括两个条状子电极42；在像素电极4具有两个狭缝41的情况下，像素电极4可以包括三个条状子电极42。也即，条状子电极42的数量相比狭缝41的数量多一个。
在一些示例中，在多个基色子像素S1包括多个红色子像素R2、多个绿色子像素G2和多个蓝色子像素B2的情况下，在行方向X上，白色子像素W2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围， 与绿色子像素G2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围相同或大致相同。
也就是说，在行方向X上，白色子像素W2中像素电极4的狭缝41的尺寸与绿色子像素G2中像素电极4的狭缝41的尺寸相同或大致相同；白色子像素W2中像素电极4的条状子电极42的尺寸与绿色子像素G2中像素电极4的条状子电极42的尺寸相同或大致相同。这样可以避免数据线DL走折线。
示例性的，在行方向X上，白色子像素W2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围为(2.4～2.8):(2.0～2.7)。此时，绿色子像素G2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围也可以为(2.4～2.8):(2.0～2.7)。
例如，在行方向X上，白色子像素W2中像素电极4的狭缝41的尺寸为2.4μm，白色子像素W2中像素电极4的条状子电极42的尺寸为2.0μm，此时，两者之间的比例可以为2.4:2.0。又如，在行方向X上，白色子像素W2中像素电极4的狭缝41的尺寸为2.8μm，白色子像素W2中像素电极4的条状子电极42的尺寸为2.7μm，此时，两者之间的比例可以为2.8:2.7。又如，在行方向X上，白色子像素W2中像素电极4的狭缝41的尺寸为2.6μm，白色子像素W2中像素电极4的条状子电极42的尺寸为2.5μm，此时，两者之间的比例可以为2.6:2.5。
在一些示例中，在多个基色子像素S1包括多个红色子像素R2、多个绿色子像素G2和多个蓝色子像素B2的情况下，在行方向X上，红色子像素R2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围，与蓝色子像素B2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围相同或大致相同。
也就是说，在行方向X上，红色子像素R2中像素电极4的狭缝41的尺寸与蓝色子像素B2中像素电极4的狭缝41的尺寸相同或大致相同；红色子像素R2中像素电极4的条状子电极42的尺寸与蓝色子像素B2中像素电极4的条状子电极42的尺寸相同或大致相同。这样可以避免数据线DL走折线。
示例性的，在行方向X上，红色子像素R2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围为(2.2～2.8):(2.0～2.5)。此时，蓝色子像素B2中像素电极4的狭缝41的尺寸与条状子电极42的尺寸之间的比例范围也可以为(2.2～2.8):(2.0～2.5)。
例如，在行方向X上，红色子像素R2中像素电极4的狭缝41的尺寸为2.8μm，红色子像素R2中像素电极4的条状子电极42的尺寸为2.0μm，此时， 两者之间的比例可以为2.8:2.0。又如，在行方向X上，红色子像素R2中像素电极4的狭缝41的尺寸为2.2μm，红色子像素R2中像素电极4的条状子电极42的尺寸为2.5μm，此时，两者之间的比例可以为2.2:2.5。又如，在行方向X上，红色子像素R2中像素电极4的狭缝41的尺寸为2.4μm，红色子像素R2中像素电极4的条状子电极42的尺寸为2.3μm，此时，两者之间的比例可以为2.4:2.3。
通过设置每个子像素S的像素电极4，狭缝41和条状子电极42之间沿行方向X上的尺寸关系，可以确保形成在像素电极4远离公共电极3一侧的一部分电场为或大致为平行电场。这样在将阵列基板100应用至LCD中的情况下，可以确保LCD中的液晶分子能够在该一部分电场的作用下，在平行于LCD所在平面方向的产生角度偏转，改变偏振光的偏振态。
需要说明的是，在行方向X上，每个像素电极4的狭缝41的尺寸以及条状子电极42的尺寸，例如指的是在行方向X上的最大尺寸，或者指的是在行方向X上的最小尺寸，或者指的是在行方向X上的平均尺寸。
本公开的一些实施例提供了一种显示装置1000。如图12所示，该显示装置1000包括：如上述一些实施例中提供的阵列基板100，与该阵列基板100相对设置的对置基板200，以及设置在阵列基板100和对置基板200之间的液晶层300。
在一些示例中，上述液晶层300包括多个液晶分子。在显示装置1000进行显示的过程中，阵列基板100中的像素电极4和公共电极3之间产生的电场，可以驱动该液晶层300中的液晶分子的偏转，使得显示装置1000实现图像显示。
在一些示例中，如图12所示，该显示装置1000还包括：设置在阵列基板100远离对置基板100一侧的背光源400。该背光源400被配置为，为显示装置1000提供图像显示所需的光源。
本公开的一些实施例中所提供的显示装置1000，所能实现额有益效果，与上述一些实施例中所提供的阵列基板100所能实现的有益效果相同，此处不再赘述。
需要说明的是，在降低阵列基板100中的多个白色子像素W2所显示的白光亮度与多个基色子像素S1共同显示的白光亮度之间的比例的情况下，可以提高显示装置1000的显示亮度。示例性的，本公开的一些实施例中所提供的显示装置1000相比相关技术中的LCD，显示亮度可以提高3％。
此外，在显示装置1000中应用有上述一些实施例中提供的阵列基板100 的情况下，有利于提高阵列基板100和对置基板200之间的抗错位能力。示例性的，在阵列基板100和对置基板200之间出现对位偏移的情况下，本公开的一些实施例中所提供的显示装置1000相比相关技术中的LCD，显示亮度可以提高2％。
在一些实施例中，如图12和图14所示，上述对置基板200包括：第二衬底5。
此处，第二衬底5例如可以采用与第一衬底1相同的结构。
在一些实施例中，如图12和图14所示，上述对置基板200还包括：设置在第二衬底5靠近阵列基板100一侧的黑矩阵6。该黑矩阵6具有多个开口K。其中，该多个开口K包括分别与阵列基板100中的多个白色子像素W2相对的多个第一开口K1，以及分别与阵列基板100中的多个基色子像素S1相对的多个第二开口K2。
在一些示例中，上述黑矩阵6被配置为，对阵列基板100中的多条栅线GL、多条数据线DL以及多个薄膜晶体管21进行遮挡。
示例性的，上述多个薄膜晶体管21在第一衬底1上的正投影可以位于黑矩阵6在第一衬底1上的正投影范围内。这样可以利用黑矩阵6对射向该多个薄膜晶体管21的外界光线进行遮挡，避免外界光线对该多个薄膜晶体管21的性能产生不良影响。
示例性的，上述多条栅线GL以及多条数据线DL在第一衬底1上的正投影可以位于黑矩阵6在第一衬底1上的正投影范围内。这样可以利用黑矩阵6对射向该多条栅线GL以及多条数据线DL的外界光线进行遮挡，避免该多条栅线GL以及多条数据线DL对外界光线形成反射，有利于使得显示装置1000具有较高的对比度。
当然，如图14所示，黑矩阵6在第一衬底1上的正投影也可以位于该多条栅线GL以及多条数据线DL在第一衬底1上的正投影范围内，也即，黑矩阵6未对该多条栅线GL以及多条数据线DL形成完全的遮挡。这样可以在减少该多条栅线GL以及多条数据线DL对外界光线的反射的同时，减小黑矩阵6在第一衬底1上的正投影的面积，增大黑矩阵6所具有的多个开口K的面积，提高显示装置1000的开口率。
在一些实施例中，如图12～图14所示，上述对置基板200还包括：设置在上述多个第二开口K2内的滤色层7。
此处，以阵列基板100中的多个基色子像素S1包括多个红色子像素R2、多个绿色子像素G2和多个蓝色子像素B2为例，相应的，滤色层7包括分别 与该多个红色子像素R2相对应的红色滤色部71、分别与该多个绿色子像素G2相对应的绿色滤色部72以及分别与该多个蓝色子像素B2相对应的蓝色滤色部73。
需要说明的是，滤色层7远离第二衬底5的一侧表面与黑矩阵6远离第二衬底5的一侧表面可以相互持平。或者，相比第二衬底5，滤色层7远离第二衬底5的一侧表面高于或低于黑矩阵6远离第二衬底5的一侧表面。
在一些实施例中，如图14所示，上述对置基板200还包括：设置在滤色层7远离第二衬底5一侧的平坦层8。该平坦层的一部分陷入黑矩阵6的多个第一开口K1内。
由于与多个白色子像素W2相对应的多个第一开口K1内无需设置滤色层7，因此，在形成平坦层8后，平坦层8中的一部分可以自然而然地陷入该多个第一开口K1内，对该多个第一开口K1内的空间进行填补。这样可以使得液晶层300中与多个第二开口K2相对应的部分的厚度(也即沿垂直于第二衬底5的方向上的尺寸)，以及与多个第一开口K1相对应的部分的厚度(也即沿垂直于第二衬底5的方向上的尺寸)相等或大致相等，有利于避免影响出光效果。
在一些实施例中，显示装置1000还包括：设置在阵列基板100和对置基板200之间的多个隔垫物。
在一些示例中，上述多个隔垫物被配置为对阵列基板100和对置基板200形成支撑，使得对阵列基板100和对置基板200不同位置之间的间距保持一致或基本保持一致，避免影响显示装置1000的显示效果。
在一些示例中，在沿列方向Y，将与白色子像素W2中的一个基色子像素S1中的一部分遮光图案2设置在该白色子像素W2所在白色子像素区域W1内的情况下，会使得该白色子像素区域W1中被黑矩阵6遮挡的面积增大。基于此，可以将上述多个隔垫物设置在与白色子像素区域W1相对应的位置，这样能够在良好地设置该多个隔垫物的同时，避免额外增大被黑矩阵6遮挡的面积，进而避免减小显示装置1000的开口率。
在一些示例中，如图13所示，沿行方向X，可以对与第一开口K1相邻的一个滤色部的形状进行设置，使得该滤色部对该第一开口K1形成半包围。
示例性的，如图13所示，以红色滤色部71在阵列基板100上的正投影的形成呈“L”型为例。这样可以便于将隔垫物500设置在该“L”型的红色滤色部71位置处。
在一些实施例中，在阵列基板100中的公共电极3被复用为触控电极、 公共电极线VL被复用为触控信号线的情况下，显示装置1000还包括：设置在阵列基板100的边框区的触控与显示驱动集成(Touch and Display Driver Integration，简称TDDI)芯片。
在一些示例中，上述TDDI芯片被配置为，在显示装置1000的显示阶段，通过公共电极线VL向阵列基板100的公共电极3传输公共电压信号，以使得可以公共电极3可以和像素电极4相配合，使得显示装置1000能够进行图像显示。上述TDDI芯片还被配置为，在显示装置1000的触控阶段，通过公共电极线VL向公共电极3传输触摸控制信号，以便于利用公共电极3实现触控功能。
通过设置TDDI芯片，可以在不同的阶段向公共电极3传输不同的信号，使得显示装置1000实现不同的功能。也即，将触控功能和显示功能集成在一起，这样有利于简化显示装置1000的结构，简化显示装置1000的制备工艺。
在一些实施例中，显示装置1000可以是显示不论运动(例如，视频)还是固定(例如，静止图像)的且不论文字还是图像的任何装置。更明确地说，预期所述实施例可实施在多种电子装置中或与多种电子装置关联，所述多种电子装置例如(但不限于)移动电话、无线装置、个人数据助理(Personal Digital Assistant，简称PDA)、手持式或便携式计算机、全球定位系统(Global Positioning System，简称GPS)接收器/导航器、相机、动态图像专家组(Moving Picture Experts Group 4，简称MP4)视频播放器、摄像机、游戏控制台、手表、时钟、计算器、电视监视器、计算机监视器、汽车显示器(例如，里程表显示器等)、导航仪、座舱控制器和/或显示器、相机视图的显示器(例如，车辆中后视相机的显示器)、电子相片、电子广告牌或指示牌、投影仪、建筑结构、包装和美学结构(例如，对于一件珠宝的图像的显示器)等。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (16)

  1. 一种阵列基板，具有呈阵列状排布的多个子像素区域，所述多个子像素区域包括多个白色子像素区域和多个基色子像素区域；所述阵列基板包括：
    第一衬底；以及，
    设置在所述第一衬底一侧的多个子像素，所述多个子像素包括多个白色子像素和多个基色子像素；沿列方向，每个白色子像素与至少一个基色子像素相邻；
    其中，每个子像素具有多个遮光图案；沿所述列方向，与所述白色子像素相邻的一个基色子像素的多个遮光图案中，一部分遮光图案设置在所述白色子像素所在的白色子像素区域内，另一部分遮光图案设置在该基色子像素对应的基色子像素区域内。
  2. 根据权利要求1所述的阵列基板，其中，所述子像素的所述多个遮光图案包括：
    沿所述列方向或大致沿所述列方向延伸的数据线中，经过所述子像素的部分；
    沿行方向或大致沿所述行方向延伸的栅线中，经过所述子像素的部分；所述行方向与所述列方向交叉；以及，
    与所述数据线和所述栅线电连接、且用于驱动所述子像素的薄膜晶体管；
    其中，沿所述列方向，与所述白色子像素相邻的一个基色子像素的多个遮光图案中，设置在所述白色子像素所在的白色子像素区域内的一部分遮光图案包括：所述栅线中经过所述基色子像素的部分和/或所述薄膜晶体管。
  3. 根据权利要求1或2所述的阵列基板，其中，所述多个基色子像素包括多个第一颜色子像素、多个第二颜色子像素和多个第三颜色子像素；
    其中，第一颜色子像素、第二颜色子像素、第三颜色子像素和白色子像素的开口面积比例范围为(0.8～1.2):(0.8～1.2):(0.8～1.2):(0.4～0.8)。
  4. 根据权利要求3所述的阵列基板，其中，所述第一颜色子像素包括红色子像素，所述第二颜色子像素包括绿色子像素，所述第三颜色子像素包括蓝色子像素；
    沿所述列方向，所述白色子像素与所述绿色子像素相邻；
    沿行方向，所述红色子像素和所述蓝色子像素位于所述绿色子像素的相对两侧。
  5. 根据权利要求4所述的阵列基板，其中，在所述行方向上，所述红色子像素的开口尺寸和所述蓝色子像素的开口尺寸相等或大致相等，所述红色 子像素的开口尺寸大于所述绿色子像素的开口尺寸，所述绿色子像素的开口尺寸大于所述白色子像素的开口尺寸；
    在所述列方向上，所述绿色子像素的开口尺寸大于所述红色子像素的开口尺寸，所述红色子像素的开口尺寸和所述蓝色子像素的开口尺寸相等或大致相等，所述红色子像素的开口尺寸大于所述白色子像素的开口尺寸。
  6. 根据权利要求5所述的阵列基板，其中，在所述行方向上，所述红色子像素的开口尺寸、所述绿色子像素的开口尺寸、所述蓝色子像素的开口尺寸和所述白色子像素的开口尺寸的比例范围为(1.4～1.5):(1.2～1.4):(1.4～1.5):1；
    在所述列方向上，所述红色子像素的开口尺寸、所述绿色子像素的开口尺寸、所述蓝色子像素的开口尺寸和所述白色子像素的开口尺寸的比例范围为(1.2～1.3):(1.3～1.8):(1.2～1.3):1。
  7. 根据权利要求1～6中任一项所述的阵列基板，还包括：沿所述列方向延伸的多条公共电极线；
    其中，所述子像素还包括设置在所述多个遮光图案远离所述第一衬底一侧的公共电极；
    所述公共电极与至少一条公共电极线电连接。
  8. 根据权利要求7所述的阵列基板，其中，在所述多个遮光图案包括数据线中经过所述子像素的部分的情况下，
    所述多条公共电极线与所述数据线同层设置。
  9. 根据权利要求8所述的阵列基板，其中，所述公共电极线在垂直于所述列方向上的尺寸，与所述数据线在垂直于所述列方向上的尺寸的比例范围为1:2～1:1。
  10. 根据权利要求7～9中任一项所述的阵列基板，其中，所述子像素还包括设置在所述公共电极远离所述第一衬底一侧的像素电极；
    所述像素电极具有至少一个狭缝；所述至少一个狭缝的延伸方向与所述列方向平行或呈锐角。
  11. 根据权利要求10所述的阵列基板，其中，所述像素电极包括位于所述狭缝两侧的条状子电极；
    在所述多个基色子像素包括多个红色子像素、多个绿色子像素和多个蓝色子像素的情况下，
    在行方向上，所述白色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围，与所述绿色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围相同或大致相同。
  12. 根据权利要求11所述的阵列基板，其中，在所述行方向上，所述白色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围为(2.4～2.8):(2.0～2.7)。
  13. 根据权利要求11或12所述的阵列基板，其中，在所述行方向上，所述红色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围，与所述蓝色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围相同或大致相同。
  14. 根据权利要求13所述的阵列基板，其中，在所述行方向上，所述红色子像素中像素电极的狭缝的尺寸与条状子电极的尺寸之间的比例范围为(2.2～2.8):(2.0～2.5)。
  15. 一种显示装置，包括：
    如权利要求1～14中任一项所述的阵列基板；
    与所述阵列基板相对设置的对置基板；以及，
    设置在所述阵列基板和所述对置基板之间的液晶层。
  16. 根据权利要求15所述的显示装置，其中，所述对置基板包括：
    第二衬底；
    设置在所述第二衬底靠近所述阵列基板一侧的黑矩阵，所述黑矩阵具有多个开口，所述多个开口包括分别与所述阵列基板中的多个白色子像素相对的多个第一开口和分别与所述阵列基板中的多个基色子像素相对的多个第二开口；
    设置在所述多个第二开口内的滤色层；以及，
    设置在所述滤色层远离所述第二衬底一侧的平坦层，所述平坦层的一部分陷入所述多个第一开口内。
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