WO2022007161A1 - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置 Download PDF

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Publication number
WO2022007161A1
WO2022007161A1 PCT/CN2020/113373 CN2020113373W WO2022007161A1 WO 2022007161 A1 WO2022007161 A1 WO 2022007161A1 CN 2020113373 W CN2020113373 W CN 2020113373W WO 2022007161 A1 WO2022007161 A1 WO 2022007161A1
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WIPO (PCT)
Prior art keywords
display area
substrate
goa
area
array substrate
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Ceased
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PCT/CN2020/113373
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English (en)
French (fr)
Inventor
张翼鹤
韩斗渊
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TCL China Star Optoelectronics Technology Co Ltd
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TCL China Star Optoelectronics Technology Co Ltd
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Priority to US17/057,029 priority Critical patent/US11462576B2/en
Publication of WO2022007161A1 publication Critical patent/WO2022007161A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel, a method for manufacturing the same, and a display device.
  • Mini LED transistors are assembled on PCB boards.
  • the technical cost of assembling Mini LED transistors on the PCB board is high and the power consumption is high. Therefore, they can only be driven passively, and the low partition leads to a small number of required Scan/Data signals. Therefore, it is not conducive to the realization of large-scale display. panel.
  • the application of Mini LED crystals on glass substrates is more competitive in the market than on PCB boards. It not only has better display performance and is suitable for large-screen products, but also can greatly reduce manufacturing costs and improve product cost performance.
  • Active drive can achieve a high number of partitions, so that the color display effect of the picture is better. Active Mini LED needs to control TFT or MOS to work, usually needs to input in-plane scan signal (Scan) or data signal (Data), and the higher the number of partitions, the more signals of Scan/Data required.
  • the existing display panel 2000 includes a display area 500 and a non-display area 600 , and the non-display area 600 has a fan-out area 601 and a COF area 602 .
  • the conventional display panel 2000 further includes a first substrate 501 , an array substrate 502 and an LED 503 .
  • the first substrate 501 and the array substrate 502 extend from the display area 500 to the non-display area 600 , and the LEDs 503 are arranged in the display area 500 .
  • the array substrate 502 includes a plurality of data lines 701 and a plurality of scan lines 702 extending from the display area 500 to the fan-out area 601 and connected to the COF area 602 .
  • the data lines in the fan-out area 601 are data signal lines
  • the scan lines are scan signal lines, wherein the scan lines 702 are connected to the GOA area (not shown) through switching elements. It can be seen that in order to splicing a small-sized display panel into a large-sized display panel, those skilled in the art usually combine the Scan signal, Data signal, VDD signal, and VSS signal and other signals from the panel in order to simplify the mechanism splicing process. Feed on one side.
  • a large-sized display panel is formed by splicing several small-sized display panels, and the optical performance at the splicing place is prone to sudden changes resulting in poor display, and the splicing place needs to reserve the tolerance of the splicing mechanism, the border design is limited, and there is no splicing integrated type
  • the display panel is still the trend of development.
  • the size of the large-sized display panel increases, the number of partitions on each small-sized display panel also increases, the number of Scan or Data signals doubles, and the number of COFs (chip on FPC) increases accordingly.
  • the size of the large-size display panel increases, the warpage deformation of the glass will increase accordingly, which will increase the difficulty of the post-processing process, and will also increase the probability of turning off the lights.
  • the purpose of the present invention is to provide a display panel, a preparation method thereof, and a display device, so as to solve the need for splicing of the existing large-sized backlight, the splicing cost is high, the optical performance at the splicing seam is uneven, and it is difficult to realize the left and right dual drive. technical issues.
  • the present invention provides a display panel, comprising a display area and a non-display area surrounding the display area, the non-display area has a GOA area; the display panel further includes
  • a first substrate extending from the display area to the non-display area; an array substrate, disposed on one side of the first substrate, and extending from the display area to the non-display area; an anti-deformation layer, disposed on One side of the first substrate away from the array substrate is located in the GOA area.
  • the display panel further includes: a reflective layer disposed on the side of the array substrate away from the first substrate; LEDs distributed on the reflective layer; and a first protective layer disposed on the array substrate A side away from the first substrate and covering the LED.
  • the display panel further includes: a second protective layer disposed on the side of the first substrate away from the array substrate and covering the anti-deformation layer.
  • the material of the reflective layer is white oil.
  • the array substrate located in the display area includes:
  • a plurality of data lines, a plurality of scan lines and a plurality of pixel units wherein the plurality of scan lines and the plurality of data lines are arranged in a criss-cross pattern, and two adjacent scan lines and two adjacent data lines
  • a pixel area is surrounded between them to form a plurality of pixel areas arranged in an array, each of the pixel areas is provided with one of the pixel units, and each of the pixel units corresponds to one of the LEDs.
  • the array substrate located in the non-display area includes:
  • a plurality of first GOA units and second GOA units are located in the GOA area, and the first GOA units and the second GOA units are respectively located at opposite sides of the display area; , which is arranged in other areas of the non-display area except the GOA area; and a COF circuit, which is connected to the fan-out wiring.
  • the material of the anti-deformation layer is metal.
  • the present invention also provides a preparation method for preparing the aforementioned display panel, wherein the display panel includes a display area and a non-display area surrounding the display area, and the non-display area has GOA district; Described preparation method comprises the steps:
  • the method further includes:
  • forming a reflective layer on the array substrate attaching LEDs on the reflective layer; forming a first protective layer on the side of the array substrate away from the first substrate and covering the LEDs.
  • the steps include:
  • a plurality of data lines, a plurality of scan lines and a plurality of pixel units are formed, wherein the plurality of scan lines and the plurality of data lines are arranged in a criss-cross pattern, and two adjacent scan lines and two adjacent data lines are formed
  • a pixel area is formed between the lines to form a plurality of pixel areas arranged in an array, each of the pixel areas is provided with one of the pixel units, and each of the pixel units corresponds to one of the LEDs.
  • step of fabricating an array substrate on one side of the first substrate it also includes:
  • a plurality of first GOA units and a plurality of second GOA units are formed, and the first GOA units and the second GOA units are respectively arranged on opposite sides of the display area;
  • a fan-out trace is formed in other areas of the non-display area except the GOA area; and
  • a COF circuit is formed at a position close to the fan-out trace in the non-display area and connected to the fan-out trace.
  • the method further includes: forming a second protective layer on a side of the first substrate away from the array substrate and covering the anti-deformation layer.
  • the method further includes: performing a binding process on the array substrate located in the non-display area.
  • the material of the anti-deformation layer is metal.
  • the material of the reflective layer is white oil.
  • the present invention also provides a display device, including the aforementioned display panel, the display panel includes a display area and a non-display area surrounding the display area, and the non-display area has a GOA area;
  • the display panel further includes a first substrate extending from the display area to the non-display area; an array substrate disposed on one side of the first substrate and extending from the display area to the non-display area;
  • the deformation layer is disposed on the side of the first substrate away from the array substrate, and is located in the GOA area.
  • the display panel also includes:
  • a reflective layer is arranged on the side of the array substrate away from the first substrate; LEDs are distributed on the reflective layer; a first protective layer is arranged on the side of the array substrate away from the first substrate and covers the the LED; and a second protective layer, which is arranged on the side of the first substrate away from the array substrate and covers the anti-deformation layer.
  • the array substrate located in the display area includes:
  • a plurality of data lines, a plurality of scan lines and a plurality of pixel units wherein the plurality of scan lines and the plurality of data lines are arranged in a criss-cross pattern, and two adjacent scan lines and two adjacent data lines
  • a pixel area is surrounded between them to form a plurality of pixel areas arranged in an array, each of the pixel areas is provided with one of the pixel units, and each of the pixel units corresponds to one of the LEDs.
  • the array substrate located in the non-display area includes:
  • a plurality of first GOA units and second GOA units are located in the GOA area, and the first GOA units and the second GOA units are respectively located at opposite sides of the display area; , which is arranged in other areas of the non-display area except the GOA area; and a COF circuit, which is connected to the fan-out wiring.
  • the display device is electronic paper, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, and navigator.
  • the technical effect of the present invention is to provide a display panel, a method for manufacturing the same, and a display device.
  • FIG. 1 is a schematic structural diagram of the conventional display panel.
  • FIG. 2 is a plan view of a conventional display panel.
  • FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 4 is a plan view of a display panel according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of the warpage deformation of the first substrate and the array substrate of the conventional display panel.
  • FIG. 6 is a schematic structural diagram of warpage deformation of the first substrate and the array substrate according to an embodiment of the present application.
  • FIG. 7 is a manufacturing method of a display panel according to an embodiment of the present application.
  • a first feature "on” or “under” a second feature may include direct contact between the first and second features, or may include the first and second features Not directly but through additional features between them.
  • the first feature being “above”, “over” and “above” the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature.
  • the first feature is “below”, “below” and “below” the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.
  • this embodiment provides a display panel 1000 , which includes a display area 100 and a non-display area 200 surrounding the display area 100 .
  • the non-display area 200 has a GOA area 201 , a fan-out area 202 and a COF area 203 , wherein , the two GOA areas 201 are arranged at the opposite side edges of the display area 100 respectively.
  • the display panel 1000 further includes a first substrate 301 , an array substrate 302 , a reflective layer 303 , an LED 304 , a first protective layer 305 , an anti-deformation layer 306 and a second protective layer 307 .
  • the first substrate 301 extends from the display area 100 to the non-display area 200 .
  • the array substrate 302 is disposed on the upper surface of the first substrate 301 and extends from the display area 100 to the non-display area 200 .
  • the reflective layer 303 is disposed on the upper surface of the array substrate 302 .
  • the material of the reflection layer 303 is white oil, which has a good reflection effect.
  • the LEDs 304 are distributed on the upper surface of the reflective layer 303 .
  • a plurality of LEDs 304 are arranged on the upper surface of the reflective layer 303 in an array.
  • the first protective layer 305 is disposed on the upper surface of the array substrate 302 and covers the upper surface of the LEDs 304 .
  • the anti-deformation layer 306 is disposed on the upper surface of the first substrate 301 and located in the GOA region 201 .
  • the material of the anti-deformation layer 306 is metal.
  • the second protective layer 307 is disposed on the lower surface of the first substrate 301 and covers the lower surface of the anti-deformation layer 306 .
  • the array substrate 302 located in the display area 100 includes: a plurality of data lines 101 , a plurality of scan lines 102 and a plurality of pixel units 103 .
  • the array substrate 302 located in the non-display area 200 includes: a first GOA unit 2031 , a second GOA unit 2032 , a fan-out trace 2021 and a COF circuit 2031 a.
  • a plurality of scan lines 102 and a plurality of data lines 101 are arranged in a crisscross pattern, and a pixel area 104 is enclosed between two adjacent scan lines 102 and two adjacent data lines 101 to form a plurality of pixels arranged in an array Area 104, each pixel area 104 is provided with a pixel unit 103, each pixel unit 103 corresponds to an LED 304, each pixel unit 103 is also provided with a switch element, and the gate of the switch element in each pixel unit in the same pixel row They are all connected to the same scan line 102 , and the connection between the switch element and the scan line 102 is not shown in FIGS. 3 and 4 , and the related content can refer to the prior art, and the switch element is a thin film transistor.
  • a plurality of first GOA units 2031 and a plurality of second GOA units 2032 are located in the GOA region 203, and each GOA unit is electrically connected to each scan line 102 through a switching element.
  • the first GOA unit 2031 is disposed on the left side of the display area 100 to drive the pixel units 103 in odd rows; the second GOA unit 2032 is disposed on the right side of the display area 100 for driving the pixel units 103 in each even row.
  • the fan-out traces 2021 are located in the fan-out area 202 and are arranged in other areas of the non-display area 200 except the GOA area 203 .
  • the fan-out traces 2021 are arranged on one side of the display area 100 except that the first GOA unit 2031 connects to the left side of the display area 100 and the second GOA unit 2032 connects to the right side of the display area 100 , preferably, the fan-out traces 2021 are arranged on one side of the lower side of the display area 100 .
  • the fan-out trace 2021 includes a data signal line 401 connected to the data line 101 and a signal line 402 connected to the GOA.
  • the COF circuit 2031a is located in the COF region 203 and is connected to the fan-out traces.
  • the process of preparing a reflective layer, arranging LEDs, and bonding on the subsequent array substrate 502 is a high-temperature process.
  • the metal traces in the array substrate 502 will be cooled to room temperature and then shrink.
  • the first substrate 501 and the array substrate 502 will warp to different degrees, and the deformation amount is d1, which affects the yield of the display panel.
  • the LED chips will generate heat, the first substrate 501 and the array substrate 502 will also be warped to varying degrees. Risk of lights out.
  • the GOA area 201 is disposed at the edges of opposite sides of the display area. Due to the dense metal traces in the GOA area 201, the first substrate 301 will be aggravated. Compared with the warpage of the array substrate 302 , the deformation amount of the first substrate 301 and the array substrate 302 is d2 . It can be seen from the comparison of FIG. 5 and FIG. 6 that d2 is much smaller than d1 .
  • the metal material of the GOA region 201 is the same as the metal material of the anti-deformation layer 306 , so that the first substrate 301 is up and down
  • the thermal expansion coefficients of the metals on both sides are the same, thereby effectively reducing the warpage of the first substrate 301 and the array substrate 302 .
  • the GOA area is arranged at the opposite sides of the respective display areas, and there is no need to perform multiple small-sized display panels. It is only necessary to increase the number of data signal lines 401, and it is beneficial to control the number of circuit lines in the COF area, thereby saving production costs. Further, since the large-size display panel 1000 does not need to be spliced, the problem of large seams of the small-size display panel is solved, no seams in the plane are realized, the border design is free, and it is easy to realize the left and right dual drive, high number of partitions, etc.
  • this embodiment also provides a preparation method for preparing the aforementioned display panel, including a display area and a non-display area surrounding the display area, the non-display area having a GOA area;
  • the preparation method includes the following steps S1)-S9).
  • the steps include:
  • a plurality of data lines, a plurality of scan lines and a plurality of pixel units are formed, wherein the plurality of scan lines and the plurality of data lines are arranged in a criss-cross pattern, and two adjacent scan lines are arranged
  • a pixel area is formed between two adjacent data lines to form a plurality of pixel areas arranged in an array, each of the pixel areas is provided with one of the pixel units, and each of the pixel units corresponds to one of the LEDs.
  • a plurality of first GOA units and a plurality of second GOA units are formed, and the first GOA units and the second GOA units are respectively arranged on opposite sides of the display area;
  • a fan-out trace is formed in other areas of the non-display area except the GOA area; and
  • a COF circuit is formed at a position close to the fan-out trace in the non-display area and connected to the fan-out trace.
  • the material of the reflection layer is white oil, which has a good reflection effect.
  • Binding processing is performed on the array substrate located in the non-display area. Specifically, binding processing is performed on the GOA area, the fan-out line, and the FPC circuit.
  • the array substrate, the reflective layer, the LED, and the first protective layer are first prepared on one surface of the first substrate, and then the anti-deformation layer and the second protective layer are first prepared on the other surface.
  • the protective layer as long as the subsequently formed display panel can be provided with the anti-deformation layer on the lower surface of the first substrate and at a position corresponding to the GOA area, this embodiment is not particularly limited.
  • No components are disposed under the existing display panel 2000.
  • the thermal expansion coefficient of the first substrate 501 is inconsistent with the thermal expansion coefficient of the metal traces (such as copper, aluminum, molybdenum, etc.) in the array substrate 502
  • the subsequent processes of preparing the reflective layer, arranging the LEDs, and bonding on the array substrate 502 are high-temperature processes. After these processes are completed, the metal traces in the array substrate 502 will be cooled to room temperature and then shrink.
  • a substrate 501 and an array substrate 502 warp to different degrees, and the deformation amount is d1, which affects the yield of the display panel.
  • the first substrate 501 and the array substrate 502 will also be warped to varying degrees. Risk of lights out.
  • the GOA area 201 is disposed at the opposite sides of the display area. Since the metal lines in the GOA area 201 are dense, the first substrate 301 and the array will be intensified. The warpage of the substrate 302, the deformation of the first substrate 301 and the array substrate 302 is d2, and it can be seen from the comparison of FIG. 5 and FIG. 6 that d2 is much larger than d1.
  • the metal material of the GOA region 201 is the same as the metal material of the anti-deformation layer 306 , so that the first substrate 301 is up and down
  • the thermal expansion coefficients of the metals on both sides are the same, thereby effectively reducing the warpage of the first substrate 301 and the array substrate 302 .
  • the GOA area is arranged at the opposite sides of the respective display areas, and there is no need to perform multiple small-sized display panels. It is only necessary to increase the number of data signal lines 401, and it is beneficial to control the number of circuit lines in the COF area, thereby saving production costs. Further, since the large-size display panel 1000 does not need to be spliced, the problem of large seams of the small-size display panel is solved, no seams in the plane are realized, the border design is free, and it is easy to realize the left and right dual drive, high number of partitions, etc.
  • This embodiment also provides a display device, including the aforementioned display panel, the display device can be: electronic paper, mobile phone, tablet computer, TV, monitor, notebook computer, digital photo frame, navigator, etc. products or parts.
  • a display panel, a manufacturing method thereof, and a display device provided by the embodiments of the present application have been introduced in detail above.
  • the principles and implementations of the present application are described with specific examples. The descriptions of the above embodiments are only used for Help to understand the technical solution of the present application and its core idea; those of ordinary skill in the art should understand: it can still make modifications to the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements to some of the technical features; and these modifications Or alternatively, the essence of the corresponding technical solution does not deviate from the scope of the technical solutions of the embodiments of the present application.

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Abstract

公开一种显示面板及其制备方法、显示装置，显示面板包括显示区和非显示区，非显示区具有GOA区，其还包括第一基板、阵列基板以及防形变层。本申请在第一基板的下表面且与GOA区对应的位置设置防形变层，GOA区的金属的材质与防形变层金属材质相同，使得第一基板上下两面金属热膨胀系数相同，有效减缓第一基板和阵列基板的翘曲。

Description

显示面板及其制备方法、显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制备方法、显示装置。
 背景技术
现有的显示产品中，是将Mini LED晶体管组装在PCB板。但是，Mini LED晶体管组装在PCB板的技术成本高、功耗大，因此，只能通过被动式驱动，且分区低导致所需Scan/Data的信号数量较少，因此，不利于实现大尺寸的显示面板。然而，将Mini LED晶体应用在玻璃基板上，比应用在PCB板上更具市场竞争力，不仅显示性能更好，适合大屏产品，还可以大幅度降低制造成本，提高产品性价比。主动式驱动可以实现高分区数，使画面色彩显示效果更好。主动式Mini LED需控制TFT或MOS工作，通常需要输入面内扫描信号（Scan）或者数据信号（Data），且分区数越高，所需Scan/Data的信号数量越多。
具体的，如图1所示，现有显示面板2000包括显示区500和非显示区600，非显示区600具有扇出区601以及COF区602。
如图2所示，现有显示面板2000还包括第一基板501、阵列基板502以及LED503。其中，第一基板501和阵列基板502，从显示区500延伸至非显示区600，LED503设于显示区500。
结合图1和图2，阵列基板502包括多条数据线701和多条扫描线702，从显示区500延伸至扇出区601且连接至COF区602。扇出区601中的数据线为数据信号线，扫描线为扫描信号线，其中，扫描线702通过开关元件连接至GOA区（图未示）。由此可见，本领域的技术人员为了将小尺寸的显示面板拼接成大尺寸的显示面板，在为了简化机构拼接工艺，通常将Scan信号、Data信号、VDD信号以及VSS信号等信号统一从面板的一侧给入。
然而，一个大尺寸的显示面板由若干小尺寸显示面板拼接而成，拼接处光学表现容易突变造成显示不良，并且拼接处需预留拼接机构公差，边框（border）设计受限，无拼接一体式的显示面板依然是发展的趋势。当大尺寸的显示面板的尺寸增加后，每个小尺寸的显示面板上的分区数也随之增加， Scan或者Data的信号数量随之加倍，COF（chip on FPC）数量会有相应增加。当大尺寸的显示面板的尺寸增加后，玻璃翘曲形变量会相应增加，对后制程难度增加，同时会增加灭灯的几率。
 技术问题
本发明的目的在于，提供一种显示面板及其制备方法、显示装置，以解决现有的大尺寸背光需要拼接，其拼接成本较高，拼接缝处光学表现不均匀，难以实现左右双驱的技术问题。
 技术解决方案
为实现上述目的，本发明提供一种显示面板，包括显示区和围绕所述显示区的非显示区，所述非显示区具有GOA区；所述显示面板还包括
第一基板，从所述显示区延伸至所述非显示区；阵列基板，设于所述第一基板的一面，且从所述显示区延伸至所述非显示区；防形变层，设于所述第一基板远离所述阵列基板的一面，且位于所述GOA区。
进一步地，所述的显示面板还包括：反射层，设于所述阵列基板远离所述第一基板的一面；LED，分布于所述反射层上；第一保护层，设于所述阵列基板远离所述第一基板的一面且覆盖所述LED。
进一步地，所述的显示面板还包括：第二保护层，设于所述第一基板远离所述阵列基板的一面且覆盖所述防形变层。
进一步地，所述反射层的材质为白油。
进一步地，位于所述显示区的阵列基板包括：
多条数据线、多条扫描线以及多个像素单元，其中，所述多条扫描线和所述多条数据线纵横交错设置，且相邻两条所述扫描线和相邻两条数据线之间围成像素区以形成多个阵列排布的像素区，每一所述像素区设置有一所述像素单元，每一所述像素单元对应一所述LED。
进一步地，位于所述非显示区的阵列基板包括：
多个第一GOA单元和第二GOA单元，位于所述GOA区，所述第一GOA单元和所述第二GOA单元，分别设于所述显示区相对设置的两侧边缘处；扇出走线，设于所述非显示区的除所述GOA区的其他区域；以及COF电路，连接至所述扇出走线。
进一步地，所述防形变层的材质为金属。
为实现上述目的，本发明还提供一种制备方法，用以制备前文所述的显示面板，其中，所述显示面板包括显示区和围绕所述显示区的非显示区，所述非显示区具有GOA区；所述制备方法包括如下步骤：
提供一第一基板；制作一阵列基板于一第一基板一面上，且从显示区延伸至非显示区；以及形成一防形变层于所述第一基板的另一面上，且位于所述GOA区。
进一步地，在制作一阵列基板于第一基板的一面上步骤至后，且在形成一防形变层步骤之前还包括：
形成一反射层于所述阵列基板上；贴附LED于所述反射层上；形成一第一保护层于所述阵列基板远离所述第一基板的一面且覆盖所述LED。
进一步地，在制作一阵列基板于第一基板的一面上步骤中，包括：
形成多条数据线、多条扫描线以及多个像素单元，其中，所述多条扫描线和所述多条数据线纵横交错设置，且相邻两条所述扫描线和相邻两条数据线之间围成像素区以形成多个阵列排布的像素区，每一所述像素区设置有一所述像素单元，每一所述像素单元对应一所述LED。
进一步地，在制作一阵列基板于第一基板的一面上步骤中，还包括：
在所述GOA区，形成多个第一GOA单元和多个第二GOA单元，所述第一GOA单元和所述第二GOA单元分别设于所述显示区相对设置的两侧；在所述非显示区的除所述GOA区的其他区域，形成扇出走线；以及在所述非显示区的靠近所述扇出走线位置，形成COF电路连接至所述扇出走线。
进一步地，在形成一防形变层步骤之后还包括：形成一第二保护层于所述第一基板远离所述阵列基板的一面且覆盖所述防形变层。
进一步地，在形成一第二保护层步骤之后还包括：对位于所述非显示区的阵列基板进行绑定处理。
进一步地，所述防形变层的材质为金属。
进一步地，所述反射层的材质为白油。
为实现上述目的，本发明还提供一种显示装置，包括前文所述的显示面板，所述显示面板包括显示区和围绕所述显示区的非显示区，所述非显示区具有GOA区；所述显示面板还包括第一基板，从所述显示区延伸至所述非显示区；阵列基板，设于所述第一基板的一面，且从所述显示区延伸至所述非显示区；防形变层，设于所述第一基板远离所述阵列基板的一面，且位于所述GOA区。
进一步地，所述显示面板还包括：
反射层，设于所述阵列基板远离所述第一基板的一面；LED，分布于所述反射层上；第一保护层，设于所述阵列基板远离所述第一基板的一面且覆盖所述LED；第二保护层，设于所述第一基板远离所述阵列基板的一面且覆盖所述防形变层。
进一步地，位于所述显示区的阵列基板包括：
多条数据线、多条扫描线以及多个像素单元，其中，所述多条扫描线和所述多条数据线纵横交错设置，且相邻两条所述扫描线和相邻两条数据线之间围成像素区以形成多个阵列排布的像素区，每一所述像素区设置有一所述像素单元，每一所述像素单元对应一所述LED。
进一步地，位于所述非显示区的阵列基板包括：
多个第一GOA单元和第二GOA单元，位于所述GOA区，所述第一GOA单元和所述第二GOA单元，分别设于所述显示区相对设置的两侧边缘处；扇出走线，设于所述非显示区的除所述GOA区的其他区域；以及COF电路，连接至所述扇出走线。
进一步地，所述显示装置为电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪。
 有益效果
本发明的技术效果在于，提供一种显示面板及其制备方法、显示装置，通过在所述第一基板的下表面且与所述GOA区对应的位置设置防形变层，所述GOA区的金属的材质与所述防形变层金属材质相同，从而使得所述第一基板上下两面金属热膨胀系数相同，进而有效减缓第一基板和阵列基板的翘曲。
 附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1为现有所述显示面板的结构示意图。
图2为现有显示面板的平面图。
图3为本申请实施例所述显示面板的结构示意图。
图4为本申请实施例所述显示面板的平面图。
图5为现有显示面板所述第一基板与所述阵列基板的翘曲形变的结构示意图。
图6为本申请实施例所述第一基板与所述阵列基板的翘曲形变的结构示意图。
图7为本申请实施例所述显示面板的制备方法。
附图部件标识如下：
1000显示面板；             100显示区；
200非显示区；              201GOA区；
202扇出区；                203COF区；
301第一基板；              302阵列基板；
303反射层；                304LED；
305第一保护层；            306防形变层；
307第二保护层；            101数据线；
102扫描线；                103像素单元；
104像素区；                2031第一GOA单元；
2032第二GOA单元；         2021扇出走线；
2031aCOF电路；             401数据信号线；
402GOA信号线；
2000现有显示面板；         500显示区；
600非显示区；              601扇出区；
602COF区；                501第一基板；
502阵列基板；              503LED；
701数据线；                702扫描线。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
如图3所示，本实施例提供一种显示面板1000，包括显示区100和围绕显示区100的非显示区200，非显示区200具有GOA区201、扇出区202以及COF区203，其中，两个GOA区201设于分别显示区100相对设置的两侧边缘处。
如图4所示，显示面板1000还包括第一基板301、阵列基板302、反射层303、LED304、第一保护层305、防形变层306以及第二保护层307。
第一基板301从显示区100延伸至非显示区200。
阵列基板302设于第一基板301的上表面，且从显示区100延伸至非显示区200。
反射层303设于阵列基板302的上表面。反射层303的材质为白油，具有良好的反射效果。
LED304分布于反射层303的上表面。优选地，多个LED304成阵列排布于反射层303的上表面。
第一保护层305设于阵列基板302的上表面且覆盖LED304的上表面。
防形变层306设于第一基板301的上表面，且位于GOA区201。防形变层306的材质为金属。
第二保护层307设于第一基板301的下表面，且覆于防形变层306的下表面。
如图3-4所示，本实施例中，位于显示区100的阵列基板302包括：多条数据线101、多条扫描线102以及多个像素单元103。位于非显示区200的阵列基板302包括：第一GOA单元2031、第二GOA单元2032、扇出走线2021以及COF电路2031a。
具体的，多条扫描线102和多条数据线101纵横交错设置，且相邻两条扫描线102和相邻两条数据线101之间围成像素区104以形成多个阵列排布的像素区104，每一像素区104设置有一像素单元103，每一像素单元103对应一LED304，每个像素单元103内还设置有开关元件，位于同一像素行的各像素单元内的开关元件的栅极均连接同一条扫描线102，开关元件与扫描线102的连接在图3和图4中未示出，相关内容可以参考现有技术，所述开关元件为薄膜晶体管。
多个第一GOA单元2031和多个第二GOA单元2032位于GOA区203，每一GOA单元通过一开关元件电连接至每一扫描线102。第一GOA单元2031设于显示区100的左侧，用以驱动各奇数行像素单元103；第二GOA单元2032设于显示区100右侧，用以驱动各偶数行像素单元103。扇出走线2021位于扇出区202，设于非显示区200的除GOA区203的其他区域。换句话来说，扇出走线2021设于除第一GOA单元2031衔接显示区100的左侧边和第二GOA单元2032衔接显示区100的右侧边之外的显示区100的一侧边，优选地，扇出走线2021设于显示区100下方的一侧边。其中，扇出走线2021包括连接数据线101的数据信号线401以及连接至GOA信号线402。COF电路2031a位于COF区203连接至所述扇出走线。
如图5所示，现有显示面板2000的下方不设置任何部件，由于第一基板501的热膨胀系数与阵列基板502中的金属走线（如铜、铝、钼等）的热膨胀系数不一致，因而，在后续阵列基板502上制备反射层、设置LED以及绑定（bonding）的工艺制程为高温制程，待完成这些工艺制程之后，阵列基板502中的金属走线会冷却至室温后收缩，此时，第一基板501和阵列基板502会发生不同程度的翘曲，其形变量为d1，影响显示面板的良率。另外，在使用显示面板的过程中，由于LED的芯片会发热，从而也会造成第一基板501和阵列基板502不同程度的翘曲，若翘曲严重LED灯503受到应力作用会有暗灯或者灭灯的风险。
如图6所示，本实施例提供的显示面板1000，将GOA区201设置在分别所述显示区相对设置的两侧边缘处，由于GOA区201的金属走线密集，会加剧第一基板301和阵列基板302的翘曲度，第一基板301和阵列基板302的形变量为d2，通过图5和图6对比可知，d2远小于d1。因此，通过在第一基板301的下表面且与GOA区201对应的位置设置防形变层306，其中，GOA区201的金属的材质与防形变层306金属材质相同，从而使得第一基板301上下两面金属热膨胀系数相同，进而有效减缓第一基板301和阵列基板302的翘曲。
与现有技术相比，本实施例提供的显示面板1000，在实现大尺寸显示面板时，将GOA区设置在分别显示区相对设置的两侧边缘处，无需将多个小尺寸的显示面板进行拼接而成，只需增加数据信号线401的数量即可，且有利于控制COF区的电路走线的数量，从而节约生产成本。进一步地，由于大尺寸显示面板1000不需要拼接，从而解决了小尺寸显示面板的拼缝较大的问题，实现了面内无拼缝，边框（border）设计自由，易实现左右双驱、高分区数等功能。
如图7所示，本实施例还提供一种制备方法，用以制备前文所述的显示面板，包括显示区和围绕所述显示区的非显示区，所述非显示区具有GOA区；所述制备方法包括如下步骤S1）-S9）。
S1）提供一第一基板。
S2）形成一阵列基板于一第一基板一面上，且从显示区延伸至非显示区。具体的，在制作一阵列基板于第一基板的一面上步骤中，包括：
在所述显示区，形成多条数据线、多条扫描线以及多个像素单元，其中，所述多条扫描线和所述多条数据线纵横交错设置，且相邻两条所述扫描线和相邻两条数据线之间围成像素区以形成多个阵列排布的像素区，每一所述像素区设置有一所述像素单元，每一所述像素单元对应一所述LED。在所述GOA区，形成多个第一GOA单元和多个第二GOA单元，所述第一GOA单元和所述第二GOA单元分别设于所述显示区相对设置的两侧；在所述非显示区的除所述GOA区的其他区域，形成扇出走线；以及在所述非显示区的靠近所述扇出走线位置，形成COF电路连接至所述扇出走线。
S3）形成一反射层于所述阵列基板上。所述反射层的材质为白油，具有良好的反射效果。
S4）贴附LED于所述反射层上。具体的，多个所述LED成阵列排布于所述反射层的上表面。
S5）形成一第一保护层于所述阵列基板远离所述第一基板的一面且覆盖所述LED。
S6）翻转所述第一基板。将所述第一基板翻转之后，所述阵列基板、所述反射层、所述LED、所述第一保护层依次设于所述第一基板的下表面。
S7）形成一防形变层于所述第一基板的另一面上，且位于所述GOA区。
S8）形成一第二保护层于所述防形变层及所述第一基板远离所述阵列基板的一面。
S9）对位于所述非显示区的阵列基板进行绑定处理。具体的，对所述GOA区、所述扇出线、FPC电路进行绑定处理。
本实施例中无论先在所述第一基板一表面上制备所述阵列基板、所述反射层、所述LED 、所述第一保护层，再在另一表面先制备防形变层、第二保护层，只要可以使得后续形成的显示面板在所述第一基板的下表面且与所述GOA区对应的位置设置所述防形变层即可，本实施例不做特别的限定。
现有显示面板2000的下方不设置任何部件，参照图5，由于第一基板501的热膨胀系数与阵列基板502中的金属走线（如铜、铝、钼等）的热膨胀系数不一致，因而，在后续阵列基板502上制备反射层、设置LED以及绑定（bonding）的工艺制程为高温制程，待完成这些工艺制程之后，阵列基板502中的金属走线会冷却至室温后收缩，此时，第一基板501和阵列基板502会发生不同程度的翘曲，其形变量为d1，影响显示面板的良率。另外，在使用显示面板的过程中，由于LED的芯片会发热，从而也会造成第一基板501和阵列基板502不同程度的翘曲，若翘曲严重LED灯503受到应力作用会有暗灯或者灭灯的风险。
本实施例提供的显示面板1000，参照图6，将GOA区201设置在分别所述显示区相对设置的两侧边缘处，由于GOA区201的金属走线密集，会加剧第一基板301和阵列基板302的翘曲度，第一基板301和阵列基板302的形变量为d2，通过图5和图6对比可知， d2远大于d1。因此，通过在第一基板301的下表面且与GOA区201对应的位置设置防形变层306，其中，GOA区201的金属的材质与防形变层306金属材质相同，从而使得第一基板301上下两面金属热膨胀系数相同，进而有效减缓第一基板301和阵列基板302的翘曲。
与现有技术相比，本实施例提供的显示面板1000，在实现大尺寸显示面板时，将GOA区设置在分别显示区相对设置的两侧边缘处，无需将多个小尺寸的显示面板进行拼接而成，只需增加数据信号线401的数量即可，且有利于控制COF区的电路走线的数量，从而节约生产成本。进一步地，由于大尺寸显示面板1000不需要拼接，从而解决了小尺寸显示面板的拼缝较大的问题，实现了面内无拼缝，边框（border）设计自由，易实现左右双驱、高分区数等功能。
本实施例还提供一种显示装置，包括前文所述的显示面板，该显示装置可以为：电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例所提供的一种显示面板及其制备方法、显示装置进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，其中，包括显示区和围绕所述显示区的非显示区，所述非显示区具有GOA区；所述显示面板还包括
    第一基板，从所述显示区延伸至所述非显示区；
    阵列基板，设于所述第一基板的一面，且从所述显示区延伸至所述非显示区；
    防形变层，设于所述第一基板远离所述阵列基板的一面，且位于所述GOA区。
  2. 根据权利要求1所述的显示面板，其中，还包括：
    反射层，设于所述阵列基板远离所述第一基板的一面；
    LED，分布于所述反射层上；
    第一保护层，设于所述阵列基板远离所述第一基板的一面且覆盖所述LED。
  3. 根据权利要求1所述的显示面板，其中，还包括：
    第二保护层，设于所述第一基板远离所述阵列基板的一面且覆盖所述防形变层。
  4. 根据权利要求2所述的显示面板，其中，所述反射层的材质为白油。
  5. 根据权利要求1所述的显示面板，其中，位于所述显示区的阵列基板包括：
    多条数据线、多条扫描线以及多个像素单元，其中，所述多条扫描线和所述多条数据线纵横交错设置，且相邻两条所述扫描线和相邻两条数据线之间围成像素区以形成多个阵列排布的像素区，每一所述像素区设置有一所述像素单元，每一所述像素单元对应一所述LED。
  6. 根据权利要求1所述的显示面板，其中，位于所述非显示区的阵列基板包括：
    多个第一GOA单元和第二GOA单元，位于所述GOA区，所述第一GOA单元和所述第二GOA单元，分别设于所述显示区相对设置的两侧边缘处；
    扇出走线，设于所述非显示区的除所述GOA区的其他区域；以及
    COF电路，连接至所述扇出走线。
  7. 根据权利要求1所述的显示面板，其中，所述防形变层的材质为金属。
  8. 一种制备方法，用以制备如权利要求1所述的显示面板，其中，所述显示面板包括显示区和围绕所述显示区的非显示区，所述非显示区具有GOA区；所述制备方法包括如下步骤：
    提供一第一基板；
    制作一阵列基板于一第一基板一面上，且从显示区延伸至非显示区；以及
    形成一防形变层于所述第一基板的另一面上，且位于所述GOA区。
  9. 根据权利要求8所述的制备方法，其中，
    在制作一阵列基板于第一基板的一面上步骤至后，且在形成一防形变层步骤之前还包括：
    形成一反射层于所述阵列基板上；
    贴附LED于所述反射层上；
    形成一第一保护层于所述阵列基板远离所述第一基板的一面且覆盖所述LED。
  10. 根据权利要求9所述的制备方法，其中，
    在制作一阵列基板于第一基板的一面上步骤中，包括：
    形成多条数据线、多条扫描线以及多个像素单元，其中，所述多条扫描线和所述多条数据线纵横交错设置，且相邻两条所述扫描线和相邻两条数据线之间围成像素区以形成多个阵列排布的像素区，每一所述像素区设置有一所述像素单元，每一所述像素单元对应一所述LED。
  11. 根据权利要求10所述的制备方法，其中，在制作一阵列基板于第一基板的一面上步骤中，还包括：
    在所述GOA区，形成多个第一GOA单元和多个第二GOA单元，所述第一GOA单元和所述第二GOA单元分别设于所述显示区相对设置的两侧；
    在所述非显示区的除所述GOA区的其他区域，形成扇出走线；以及
    在所述非显示区的靠近所述扇出走线位置，形成COF电路连接至所述扇出走线。
  12. 根据权利要求8所述的制备方法，其中，
    在形成一防形变层步骤之后还包括：
    形成一第二保护层于所述第一基板远离所述阵列基板的一面且覆盖所述防形变层。
  13. 根据权利要求12所述的制备方法，其中，
    在形成一第二保护层步骤之后还包括：
    对位于所述非显示区的阵列基板进行绑定处理。
  14. 根据权利要求8所述的制备方法，其中，所述防形变层的材质为金属。
  15. 根据权利要求9所述的制备方法，其中，所述反射层的材质为白油。
  16. 一种显示装置，包括权利要求1所述的显示面板，所述显示面板包括显示区和围绕所述显示区的非显示区，所述非显示区具有GOA区；所述显示面板还包括
    第一基板，从所述显示区延伸至所述非显示区；
    阵列基板，设于所述第一基板的一面，且从所述显示区延伸至所述非显示区；
    防形变层，设于所述第一基板远离所述阵列基板的一面，且位于所述GOA区。
  17. 根据权利要求16所述的显示装置，其中，所述显示面板还包括：
    反射层，设于所述阵列基板远离所述第一基板的一面；
    LED，分布于所述反射层上；
    第一保护层，设于所述阵列基板远离所述第一基板的一面且覆盖所述LED；
    第二保护层，设于所述第一基板远离所述阵列基板的一面且覆盖所述防形变层。
  18. 根据权利要求要求16所述的显示装置，其中，位于所述显示区的阵列基板包括：
    多条数据线、多条扫描线以及多个像素单元，其中，所述多条扫描线和所述多条数据线纵横交错设置，且相邻两条所述扫描线和相邻两条数据线之间围成像素区以形成多个阵列排布的像素区，每一所述像素区设置有一所述像素单元，每一所述像素单元对应一所述LED。
  19. 根据权利要求16所述的显示装置，其中，位于所述非显示区的阵列基板包括：
    多个第一GOA单元和第二GOA单元，位于所述GOA区，所述第一GOA单元和所述第二GOA单元，分别设于所述显示区相对设置的两侧边缘处；
    扇出走线，设于所述非显示区的除所述GOA区的其他区域；以及
    COF电路，连接至所述扇出走线。
  20. 根据权利要求16所述的显示装置，其中，所述显示装置为电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪。
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