WO2022001037A1 - 一种高温熔盐电沉积制备单晶硅材料的方法 - Google Patents

一种高温熔盐电沉积制备单晶硅材料的方法 Download PDF

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WO2022001037A1
WO2022001037A1 PCT/CN2020/139729 CN2020139729W WO2022001037A1 WO 2022001037 A1 WO2022001037 A1 WO 2022001037A1 CN 2020139729 W CN2020139729 W CN 2020139729W WO 2022001037 A1 WO2022001037 A1 WO 2022001037A1
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single crystal
crystal silicon
molten salt
preparing
electrodeposition
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PCT/CN2020/139729
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French (fr)
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邹星礼
庞忠亚
唐蔚
李想
张学强
汪淑娟
卢明辉
许茜
鲁雄刚
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上海大学
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B9/00—Single-crystal growth from melt solutions using molten solvents
    • C30B9/14—Single-crystal growth from melt solutions using molten solvents by electrolysis
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D9/00—Electrolytic coating other than with metals
    • C25D9/04—Electrolytic coating other than with metals with inorganic materials
    • C25D9/08—Electrolytic coating other than with metals with inorganic materials by cathodic processes
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon

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  • the invention relates to the technical field of semiconductors, in particular to a method for preparing a single crystal silicon film and a silicon P-N junction by high-temperature molten salt electrodeposition.
  • P-N junction photovoltaic cells made of monocrystalline silicon are currently the most widely used, and in the foreseeable future, silicon-based photovoltaic technology will still be the mainstream technology in the photovoltaic field.
  • the methods for preparing P-N junction single crystal silicon include diffusion method, ion implantation method, epitaxial growth method, etc., but these methods have complicated production process or low degree of controllability.
  • the mixed solution of alkali and alcohol is often used in industrial production to corrode the surface of monocrystalline silicon wafers, thereby constructing a pyramid-like texture and reducing the reflectivity of the silicon wafer surface. , increasing the travel length of the light in the silicon wafer, thereby increasing the spectral absorption.
  • this method has strict requirements on the corrosion time and the quality control of the solution system.
  • the technical problem to be solved by the present invention is how to provide a single crystal silicon which has a simple and controllable operation process, and can integrate the preparation of single crystal silicon materials and the construction of an inverted pyramid surface topography structure.
  • a new approach to membrane materials is how to provide a single crystal silicon which has a simple and controllable operation process, and can integrate the preparation of single crystal silicon materials and the construction of an inverted pyramid surface topography structure.
  • the present invention provides a method for preparing a single crystal silicon film and a silicon P-N junction by high-temperature molten salt electrodeposition, the method comprising the following steps:
  • a method for preparing monocrystalline silicon material by high temperature molten salt electrodeposition comprises the following steps:
  • Step 1 Add the raw materials into the crucible in proportion, and add dopants, then put the crucible into a high-temperature resistance furnace, heat it to 400-600° C. in an inert atmosphere, and keep the temperature for 12-24 hours to remove the raw materials. After moisture, heat to 850°C in an inert atmosphere, and keep the temperature for 24-48h;
  • Step 2 using two high-purity graphite rods as anode and cathode respectively, and performing pre-electrolysis under constant voltage conditions, the parameter setting range of the pre-electrolysis is voltage 1.5-2.5V, temperature 850°C, and time 12-48h;
  • Step 3 re-insert one of the high-purity graphite rods as an anode, replace the electrodeposited substrate as a cathode, and then perform electrodeposition, so that a silicon film material is prepared by epitaxial growth on the electrodeposited substrate;
  • Step 4 soaking and cleaning the silicon film material obtained in the step 3 with deionized water to remove the molten salt, and then drying to obtain a single crystal silicon material.
  • the raw material in the step 1 selects a CaCl 2 -SiO 2 -CaO system or a CaCl 2 -CaSiO 3 system; wherein, the mass ratio of CaCl 2 , SiO 2 and CaO in the system is 1:1 -5%: 1-5%, the mass ratio of CaCl 2 and CaSiO 3 in the CaCl 2 -CaSiO 3 system is 1: 1-5%.
  • the crucible includes a high-purity alumina crucible or a high-purity quartz crucible.
  • the dopant is any one of Ca 3 (PO 4 ) 2 , Sb 2 O 3 , B 2 O 3 and Al 2 O 3 .
  • the electrodeposited substrate is a single crystal substrate material.
  • the single crystal base material is a single crystal silicon wafer.
  • the single crystal silicon wafer includes a P-type single crystal silicon wafer or an N-type single crystal silicon wafer.
  • the inert atmosphere is a high-purity argon atmosphere.
  • an intermittent pre-electrolysis treatment is performed.
  • the electrodeposition conditions in the step 3 include constant voltage, constant current or pulse current, the parameter setting range of the electrodeposition conditions is current 5-50 mA/cm 2 , and the voltage is lower than 2.7V, and by changing The electrodeposition conditions or the electrodeposition time regulate the thickness of the silicon film material.
  • the single crystal silicon material obtained in the step 4 includes P-P, N-N, and P-N junction type single crystal silicon materials.
  • the raw material and the dopant are added periodically to realize the continuous preparation of the single crystal silicon material.
  • the present invention has the following beneficial technical effects:
  • the high-temperature molten salt electrodeposition epitaxial growth preparation method adopted in the present invention uses anhydrous calcium chloride as a molten salt medium, silicon dioxide or calcium silicate as a raw material, and calcium oxide as an auxiliary solvent.
  • PP, PN junction or NN type single crystal silicon splicing material with inverted pyramid morphology on the surface is prepared by electrodeposition directly on a single crystal substrate (such as single crystal silicon) at 850 °C, and the operation process is simple;
  • the present invention can realize the control and preparation of the thickness of the silicon film material by changing the current density, voltage value or electrodeposition time of the electrodeposition process;
  • the present invention can also realize the continuous preparation of single crystal silicon material through the operation mode of periodically adding raw materials, shorten the process, improve the preparation efficiency, and reduce the preparation energy consumption.
  • FIG. 1 is a schematic structural diagram of an electrolytic cell for preparing a single crystal silicon film and a silicon P-N junction material according to a preferred embodiment of the present invention
  • FIG. 2 is a typical cyclic voltammetry diagram of the process of preparing a single crystal silicon film material according to Embodiment 1 of the present invention
  • FIG. 3 is a microscopic topography of a surface inverted pyramid of a single crystal silicon film material prepared on a silicon [100] substrate according to Embodiment 1 of the present invention
  • FIG. 4 is a cross-sectional topography diagram and an enlarged inverted gold tower structure diagram of a single crystal silicon film material prepared on a silicon [100] substrate according to Embodiment 1 of the present invention
  • Fig. 5 is the microscopic topography of the surface of the single crystal silicon film material prepared on the silicon [100] substrate according to the second embodiment of the present invention
  • FIG. 6 is a cross-sectional topography diagram of a single crystal silicon film material prepared on a silicon [100] substrate according to the second embodiment of the present invention.
  • FIG. 7 is a current-time curve diagram of the process of preparing a single crystal silicon film material according to Embodiment 3 of the present invention.
  • FIG. 8 is a surface microscopic topography diagram of a single crystal silicon film material prepared on a silicon [100] substrate according to Embodiment 3 of the present invention.
  • Example 9 is a cross-sectional microscopic topography diagram of a single crystal silicon film material prepared in Example 3 of the present invention.
  • FIG. 10 is a voltage-time curve diagram of the process of preparing a single crystal silicon film material according to Embodiment 4 of the present invention.
  • FIG. 11 is a cross-sectional topography diagram of a single crystal silicon film material prepared on a silicon [111] substrate according to Embodiment 4 of the present invention.
  • FIG. 12 is a surface topography diagram of a single crystal silicon film material prepared on a silicon [111] substrate according to the fourth embodiment of the present invention.
  • 1-high temperature resistance furnace 2-crucible, 3-anode lead, 4-cathode lead, 5-air inlet, 6-air outlet, 7-anode, 8-cathode, 9-single crystal silicon film.
  • high-purity quartz crucible is selected for high-temperature molten salt electrodeposition preparation, as shown in Figure 1, including high-temperature resistance furnace 1, crucible 2, anode lead 3 and cathode lead 4, air inlet 5 and air outlet 6, and anode 7 and cathode 8.
  • the preparation process is mainly as follows: first, put raw materials and dopants in the crucible 2, and heat at high temperature to remove moisture; secondly, two high-purity graphite rods are used as the anode 7 and the cathode 8 respectively, and pre-heating is carried out.
  • Electrolysis again, during electrodeposition, the anode 7 is replaced with a new high-purity graphite rod, the cathode 8 is replaced with an electrodeposited substrate, and a single-crystal silicon film 9 is epitaxially grown on the electrodeposited substrate; finally, Wash and dry to obtain the product.
  • a high-purity graphite rod was put in again as the anode of the electrolysis cell, and the P-type single crystal silicon wafer [100] was used as the cathode of the electrolysis cell, that is, the base of the product, for electrodeposition.
  • the obtained cyclic voltammetry curve is shown in Fig. 2, and the reduction peak around -1.5V indicates that the silicate ion is reduced to silicon.
  • Ca 3 (PO 4 ) 2 is used as the source of the doping element. This time, a constant current with a current density of 15 mA ⁇ cm -2 was used.
  • the surface topography of the single crystal silicon film obtained after 3 hours is shown in Figure 3, and the cross-sectional topography is shown in Figure 4. It can be found that the single crystal silicon film The surface forms an array of inverted pyramids, and the thickness of the silicon film is about 5 ⁇ m.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • the implementation of this case is roughly the same as that of Example 1, but the electrodeposition time is 1 h.
  • the surface morphology of the obtained product is shown in Figure 5, and the cross section is shown in Figure 6. It can be seen that the surface of the epitaxially grown silicon film in this embodiment is composed of inverted pyramids, but the size of the pyramid is significantly smaller than the size of the pyramid on the surface of the silicon film in the first embodiment, and the thickness of the deposited single crystal silicon film is about 3 ⁇ m. . It is shown that the surface morphology and thickness of the single crystal silicon film can be effectively controlled by controlling the electrodeposition time.
  • the surface morphology of the deposited single crystal silicon material is shown in Figure 8, and its cross-sectional microscopic morphology is shown in Figure 9.
  • the surface of the silicon film is composed of inverted pyramids, and the deposited silicon film is closely related to P-type silicon.
  • the substrate is densely bonded, and the thickness of the silicon film is about 3 ⁇ m.
  • Embodiment 4 is a diagrammatic representation of Embodiment 4:

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Abstract

一种高温熔盐电沉积制备单晶硅膜及硅P-N结的方法，涉及半导体技术领域。可选用CaCl 2-SiO 2-CaO体系或CaCl 2-CaSiO 3体系为原料，并加入掺杂剂，在恒电流、恒电压或脉冲电流条件、以及惰性气体气氛、850℃条件下，通过电沉积在单晶基体上外延生长得到单晶硅膜材料。

Description

一种高温熔盐电沉积制备单晶硅材料的方法
本申请要求于2020年6月29日提交中国专利局、申请号为CN202010608312.6、发明名称为“一种高温熔盐电沉积制备单晶硅膜及硅P-N结的方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及一种半导体技术领域，具体为一种高温熔盐电沉积制备单晶硅膜及硅P-N结的方法。
背景技术
面对化石能源的日渐枯竭及其对环境的污染，探索和开发利用可持续新能源就显得尤为重要。利用太阳能光伏电池发电是一种新兴的、可再生的清洁能源，因此引起了人们的广泛关注。而在所有这些能产生光伏发电的材料中，由单晶硅做成的P-N结光伏电池是目前应用最广泛的，而且在可以预见的将来，硅基光电技术仍然将是光伏领域的主流技术。目前，制备P-N结单晶硅的方法有扩散法、离子注入法、外延生长法等，但这些方法生产过程复杂或可控度低。
此外，为了进一步提高单晶硅太阳能电池的光电转换效率，工业生产中经常会利用碱与醇的混合溶液对单晶硅片表面进行腐蚀，从而构造类似金字塔绒面，降低硅片表面的反射率，增加光在硅片中的行进长度，从而增加光谱吸收。但是此种方法对于腐蚀时间和溶液体系质量控制要求严格。
因此，本领域的技术人员致力于开发一种操作过程简单、可控，且能在制备单晶硅膜或硅P-N结材料的同时，构筑倒金字塔表面形貌结构的单晶硅膜材料的新方法。
发明内容
有鉴于现有技术的上述缺陷，本发明所要解决的技术问题是如何提供一种操作过程简单、可控，且能集单晶硅材料制备与构筑倒金字塔表面形貌结构于一体的单晶硅膜材料的新方法。
为实现上述目的，本发明提供了一种高温熔盐电沉积制备单晶硅膜及硅P-N结的方法，所述方法包括以下步骤：
一种高温熔盐电沉积制备单晶硅材料的方法，所述方法包括以下步骤：
步骤1、将原料按比例加入坩埚中，并加入掺杂剂，然后将所述坩埚放入高温电阻炉内，在惰性气氛下加热至400～600℃，保温12～24h除去所述原料中的水分后，在惰性气氛下加热至850℃，保温24～48h；
步骤2、采用两根高纯石墨棒分别作为阳极和阴极，在恒电压条件下进行预电解，所述预电解的参数设置范围为电压1.5～2.5V，温度850℃，时间12～48h；
步骤3、重新放入一根所述高纯石墨棒作为阳极，更换电沉积基体作为阴极，然后进行电沉积，使得在所述电沉积基体上通过外延生长制备硅膜材料；
步骤4、将所述步骤3得到的所述硅膜材料用去离子水浸泡清洗，除去熔盐，然后烘干得到单晶硅材料。
优选地，所述步骤1中的所述原料选用CaCl 2-SiO 2-CaO体系或CaCl 2-CaSiO 3体系；其中，所述体系中CaCl 2、SiO 2和CaO的质量配比为1：1-5％：1-5％，所述CaCl 2-CaSiO 3体系中CaCl 2和CaSiO 3的质量配比为1：1-5％。
优选地，所述坩埚包括高纯氧化铝坩埚或高纯石英坩埚。
优选地，所述掺杂剂为Ca 3(PO 4) 2、Sb 2O 3、B 2O 3和Al 2O 3中的任一种。
优选地，所述电沉积基体为单晶基体材料。
优选地，所述单晶基体材料为单晶硅片。
优选地，所述单晶硅片包括P型单晶硅片或N型单晶硅片。
优选地，所述惰性气氛为高纯氩气气氛。
优选地，所述步骤2中在所述预电解后，进行间歇式预电解处理。
优选地，所述步骤3中的电沉积条件包括恒电压、恒电流或脉冲电流，所述电沉积条件的参数设置范围为电流5～50mA/cm 2，电压为低于2.7V，且通过改变所述电沉积条件或所述电沉积的时间调控所述硅膜材料的厚 度。
优选地，所述步骤4得到的所述单晶硅材料包括P-P、N-N、P-N结型单晶硅材料。
优选地，所述步骤1中所述原料及所述掺杂剂采用周期性加入方式实现连续制备单晶硅材料。
与现有技术相比，本发明具有以下有益技术效果：
(1)本发明采用的高温熔盐电沉积外延生长制备方法，以无水氯化钙为熔盐介质，二氧化硅或硅酸钙为原料，氧化钙为辅助溶剂，通过添加微量掺杂剂，于850℃条件下直接在单晶基体(如单晶硅)上电沉积制备出表面具有倒金字塔形貌的P-P、P-N结或N-N型单晶硅拼接材料，操作过程简单；
(2)本发明通过对电沉积过程的电流密度、电压值或电沉积时间的改变即可实现对硅膜材料厚度的调控制备；
(3)本发明还可通过周期性加入原料的操作方式实现连续制备单晶硅材料，缩短流程、提高制备效率，降低制备能耗。
以下将结合附图对本发明的构思、具体结构及产生的技术效果作进一步说明，以充分地了解本发明的目的、特征和效果。
说明书附图
图1是本发明的一个较佳实施例的用于制备单晶硅膜及硅P-N结材料的电解池结构示意图；
图2是本发明实施例一制备单晶硅膜材料过程的典型循环伏安曲线图；
图3是本发明实施例一在硅[100]基体上制备的单晶硅膜材料的表面倒金字塔微观形貌图；
图4是本发明实施例一在硅[100]基体上制备的单晶硅膜材料的横截面形貌图及放大倒金子塔结构图；
图5是本发明实施例二在硅[100]基体上制备的单晶硅膜材料表面微观形貌图；
图6是本发明实施例二在硅[100]基体上制备的单晶硅膜材料的横截面形貌图；
图7是本发明实施例三制备单晶硅膜材料过程的电流-时间曲线图；
图8是本发明实施例三在硅[100]基体上制备的单晶硅膜材料的表面微观形貌图；
图9是本发明实施例三制备的单晶硅膜材料的截面微观形貌图；
图10是本发明实施例四制备单晶硅膜材料过程的电压-时间曲线图；
图11是本发明实施例四在硅[111]基体上制备的单晶硅膜材料的截面形貌图；
图12是本发明实施例四在硅[111]基体上制备的单晶硅膜材料的表面形貌图。
其中，1-高温电阻炉，2-坩埚，3-阳极引线，4-阴极引线，5-进气口，6-出气口，7-阳极，8-阴极，9-单晶硅膜。
具体实施方式
以下参考说明书附图介绍本发明的多个优选实施例，使其技术内容更加清楚和便于理解。本发明可以通过许多不同形式的实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例。
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。附图所示的每一组件的尺寸和厚度是任意示出的，本发明并没有限定每个组件的尺寸和厚度。为了使图示更清晰，附图中有些地方适当夸大了部件的厚度。
实施例中高温熔盐电沉积制备选用高纯石英坩埚，如图1所示，包括高温电阻炉1，坩埚2，阳极引线3和阴极引线4，进气口5和出气口6，以及阳极7和阴极8。制备过程主要为：首先，在所述坩埚2中放入原料和掺杂剂，高温加热除去水分；其次，采用两根高纯石墨棒分别作为所述阳极7和所述阴极8，并进行预电解；再次，电沉积时，所述阳极7更换新的所述高纯石墨棒，所述阴极8更换为电沉积基体，在所述电沉积基体上外延生长出单晶硅膜9；最后，清洗、烘干得到产物。
实施例一：
在本实施例中，具体操作步骤如下：
将(75g)CaCl 2-(2.0g)SiO 2-(2.0g)CaO原料加入高纯石英坩埚中，在高纯氩气气氛下升温至500℃，保温24h。随后在高纯氩气气氛下加热至 850℃，保温48h。将两根高纯石墨棒作为阳极和阴极，放入坩埚中进行预电解，预电解电压为2.5V，时间为12h。预电解结束后，重新放入一根高纯石墨棒作为电解池的阳极，以P型单晶硅片[100]作为电解池阴极即产物的基底，进行电沉积。得到的循环伏安曲线如图2所示，在-1.5V左右的还原峰表明硅酸根离子被还原为硅。本实施例采用Ca 3(PO 4) 2作为掺杂元素来源。此次采用电流密度为15mA·cm -2的恒电流，3h后得到的单晶硅膜表面形貌图如图3所示，横截面形貌图如图4所示，可以发现单晶硅膜表面形成了一个个排列的倒金字塔型，硅膜厚度约为5μm。
实施例二：
本案例的实施方案与实施例一大致相同，但电沉积时间为1h，得到的产物表面形貌如图5所示，横截面如图6所示。可以看出本实施例中外延生长出的硅膜表面为一个个倒立的金字塔组成，但金字塔尺寸明显小于实施例一中硅膜表面的金字塔尺寸，且沉积出的单晶硅膜厚度为3μm左右。表明通过控制电沉积时间可以有效调控单晶硅膜的表面形貌及硅膜厚度。
实施例三：
将(75g)CaCl 2-(1.8g)SiO 2-(1.6g)CaO原料加入高纯石英坩埚中，在高纯氩气气氛下升温至500℃，保温24h。随后在高纯氩气气氛下加热至850℃，保温48h。将两根高纯石墨棒作为阳极和阴极，放入坩埚中预电解，预电解电压为2.5V，时间为12h。随后再进行间歇式三次预电解。电沉积时重新放入一根高纯石墨棒作为电解池的阳极，[100]方向的P型单晶硅片作为电解池阴极即产物的基底，本次掺杂采用Ca 3(PO 4) 2作为掺杂元素来源，在电解池中加入微量Ca 3(PO 4) 2，并施加2.4V的恒电压连续沉积5h。电流-时间曲线如图7所示，可以看出沉积电流在0.05A左右，硅膜在持续稳定的沉积生长。沉积得到的单晶硅材料表面形貌如图8所示，其横截面微观形貌图如图9所示，硅膜表面为一个个倒立的金字塔组成，且所沉积的硅膜与P型硅基底结合致密，硅膜厚度约为3μm。
实施例四：
将(100g)CaCl 2-(2.5g)SiO 2-(2.5g)CaO原料加入高纯石英坩埚中，在高纯氩气气氛下升温至500℃，保温24h。随后在高纯氩气气氛下加热至 850℃，保温48h。将两根高纯石墨棒作为阳极和阴极，放入坩埚中预电解，预电解电压为2.5V，时间为12h。随后再进行三次间歇性预电解。预电解结束后重新放入一根高纯石墨棒作为电解池的阳极，[111]方向的P型单晶硅片作为电解池阴极基体，放入Sb 2O 3作为掺杂剂，施加20mA·cm -2的电流，连续沉积5h。得到的电压-时间曲线如图10所示，电压在40min内逐渐降低并稳定在-2.5V左右。外延生长硅膜的截面形貌图如图11所示，其表面形貌图如图12所示，可以看出硅膜厚度为20μm左右，表面为不规则的结构。
以上实施例的说明只是用于帮助理解本发明的方法及其核心思想。应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以对本发明进行若干改进和修饰，这些改进和修饰也落入本发明权利要求的保护范围内。对这些实施例的多种修改对本领域的专业技术人员来说是显而易见的，本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下在其它实施例中实现。因此，本发明将不会被限制于本文所示的这些实施例，而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (12)

  1. 一种高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述方法包括以下步骤：
    步骤1、将原料按比例加入坩埚中，并加入掺杂剂，然后将所述坩埚放入高温电阻炉内，在惰性气氛下加热至400～600℃，保温12～24h除去所述原料中的水分后，在惰性气氛下加热至850℃，保温24～48h；
    步骤2、采用两根高纯石墨棒分别作为阳极和阴极，在恒电压条件下进行预电解，所述预电解的参数设置范围为电压1.5～2.5V，温度850℃，时间12～48h；
    步骤3、重新放入一根所述高纯石墨棒作为阳极，更换电沉积基体作为阴极，然后进行电沉积，使得在所述电沉积基体上通过外延生长制备硅膜材料；
    步骤4、将所述步骤3得到的所述硅膜材料用去离子水浸泡清洗，除去熔盐，然后烘干得到单晶硅材料。
  2. 如权利要求1所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述步骤1中的所述原料选用CaCl 2-SiO 2-CaO体系或CaCl 2-CaSiO 3体系；其中，所述体系中CaCl 2、SiO 2和CaO的质量配比为1：1-5％：1-5％，所述CaCl 2-CaSiO 3体系中CaCl 2和CaSiO 3的质量配比为1：1-5％。
  3. 如权利要求1所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述坩埚包括高纯氧化铝坩埚或高纯石英坩埚。
  4. 如权利要求1所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述掺杂剂为Ca 3(PO 4) 2、Sb 2O 3、B 2O 3和Al 2O 3中的任一种。
  5. 如权利要求1所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述电沉积基体为单晶基体材料。
  6. 如权利要求5所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述单晶基体材料为单晶硅片。
  7. 如权利要求6所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述单晶硅片包括P型单晶硅片或N型单晶硅片。
  8. 如权利要求1所述的高温熔盐电沉积制备单晶硅膜材料的方法，其特征在于，所述惰性气氛为高纯氩气气氛。
  9. 如权利要求1所述的高温熔盐电沉积制备单晶硅膜材料的方法，其特征在于，所述步骤2中在所述预电解后，进行间歇式预电解处理。
  10. 如权利要求1所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述步骤3中的电沉积条件包括恒电压、恒电流或脉冲电流，所述电沉积条件的参数设置范围为电流5～50mA/cm 2，电压为低于2.7V，且通过改变所述电沉积条件或所述电沉积的时间调控所述硅膜材料的厚度。
  11. 如权利要求1所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述步骤4得到的所述单晶硅材料包括P-P、N-N、P-N结型单晶硅材料。
  12. 如权利要求1所述的高温熔盐电沉积制备单晶硅材料的方法，其特征在于，所述步骤1中所述原料及所述掺杂剂采用周期性加入方式实现连续制备单晶硅材料。
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RU2797969C1 (ru) * 2022-06-16 2023-06-13 Федеральное государственное автономное образовательное учреждение высшего образования "Уральский федеральный университет имени первого Президента России Б.Н. Ельцина" Способ электролитического получения микроразмерных пленок кремния из расплавленных солей

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