WO2021241137A1 - 故障検知装置及びその方法 - Google Patents

故障検知装置及びその方法 Download PDF

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Publication number
WO2021241137A1
WO2021241137A1 PCT/JP2021/017160 JP2021017160W WO2021241137A1 WO 2021241137 A1 WO2021241137 A1 WO 2021241137A1 JP 2021017160 W JP2021017160 W JP 2021017160W WO 2021241137 A1 WO2021241137 A1 WO 2021241137A1
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Prior art keywords
circuit
output
gate
signal
gate driver
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English (en)
French (fr)
Japanese (ja)
Inventor
恭彦 河野
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Hitachi Ltd
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Hitachi Ltd
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Priority to EP21813409.6A priority Critical patent/EP4160899B1/en
Priority to JP2022527620A priority patent/JP7500720B2/ja
Publication of WO2021241137A1 publication Critical patent/WO2021241137A1/ja
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/0812—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H03K17/08122—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/0812—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H03K17/08128—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit in composite switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/18—Modifications for indicating state of switch

Definitions

  • the present invention relates to a failure detection device and a method thereof related to a semiconductor element drive circuit, and particularly to detection of disconnection of a gate wiring of a semiconductor element.
  • the power converters used to drive motors for electric vehicles, railroad vehicles, steel rolling mills, etc. include IGBTs (Insulated Gate Bipolar Transistors) and power MOSFETs called power semiconductors. (Metal-Oxide-Semiconductor Field Effect Transistor; metal oxide film semiconductor field effect transistor) and the like are used. IGBTs and power MOSFETs are called voltage-driven elements, and the conduction state (on and off) can be controlled by controlling the voltage of the gate electrode.
  • IGBTs for power converters are n-channel elements that turn on when a predetermined positive voltage is applied to the gate electrode, and to turn it off, the applied voltage of the gate is set to 0 or negative. Apply the voltage of.
  • the circuit that controls the applied voltage is called a gate driver, and is connected to the gate electrode of the IGBT via the gate wiring.
  • the gate wiring, gate driver, and IGBT are connected by connectors, screws, etc., but in the case of power conversion devices for electric vehicles and railway vehicles, the wiring may come off or break due to vibration during driving. May cause problems.
  • the IGBT When the IGBT is off, that is, a high voltage is applied between the collector and emitter, which are the main terminals, and the applied voltage of the gate electrode is 0 or minus, and no current is flowing between the main terminals (collector-emitter) of the IGBT.
  • the gate electrode becomes floating, a leakage current flows into the gate through the parasitic capacitance (feedback capacitance) between the collector of the IGBT and the gate, which increases the gate voltage and causes the IGBT to erroneously turn on.
  • Patent Document 1 is disclosed as a technique for detecting such disconnection of gate wiring.
  • a part of the main current of the IGBT is shunted, the shunt current is passed through a resistor for detection, and the phase difference between the gate command output from the gate driver and the voltage generated in the resistor is compared. Detects abnormalities in gate wiring.
  • Patent Document 1 has the following problems. As described above, Patent Document 1 requires an IGBT having a structure that divides a part of the main current, but a generally used high withstand voltage power IGBT does not have such a function, and Patent Document 1 The configuration of is not applicable.
  • Patent Document 1 discloses a method of using a current sensor that detects a current flowing through a booster circuit as another configuration, but a high-power power conversion device requires a current sensor having a large diameter, and the device becomes large in size. There is a problem of doing.
  • the present invention solves the above-mentioned problems, and an object thereof is to improve the reliability of applicable equipment by detecting a connection abnormality of a control line controlling a voltage-driven element and outputting an abnormality detection signal. It is an object of the present invention to provide a simple failure detection device which has been improved.
  • the present invention that solves the above problems is a connection of a control line that electrically connects an auxiliary terminal for controlling a path related to a main terminal of a semiconductor switching element and a control unit that drives and controls the semiconductor switching element.
  • a failure detection device that detects whether the state is normal or abnormal, and if the rate of change of the output voltage output from the control unit to the control line is greater than a predetermined value, a connection error has occurred in the control line. Is determined and an abnormality detection signal is output.
  • the present invention it is possible to provide a simple failure detection device that improves the reliability of applicable equipment by detecting a connection abnormality of a control line that controls a voltage-driven element and outputting an abnormality detection signal. ..
  • FIG. 1 is a functional block diagram of the failure detection device 1 according to the first embodiment of the present invention.
  • the failure detection device 1 of FIG. 1 describes a partial circuit of an inverter configured by using an IGBT module.
  • the inverter is composed of two IGBT modules 100a and 100b connected in series between a positive power supply (+ 1500V in Example 1) and a negative power supply (0V in Example 1). ..
  • the IGBTs 101a and 101b which are the main components of the IGBT modules 100a and 100b, are collectively referred to as a semiconductor switching element 101.
  • the "two IGBT modules 100a and 100b" in such an inverter configuration are commonly called “upper arm and lower arm”.
  • the inverter is a circuit that outputs desired voltage, current, and electric power to the load output terminal by operating the IGBTs of the upper arm and the lower arm in a predetermined order.
  • FIG. 1 In the case of a general inverter, the configuration shown in FIG. 1 is used as a unit, and in many cases, a so-called three-phase inverter configuration in which three of them are connected in parallel is adopted.
  • the components related to the upper arm are designated by a reference numeral with a suffix a
  • the components related to the lower arm are designated by a reference numeral with a suffix b.
  • Reference numerals 100 in FIGS. 1 to 4 are IGBT modules, in which the IGBT 101 and the freewheel diode 102 are housed in a package molded of resin or the like.
  • the IGBT module 100 has a collector terminal 103 and an emitter terminal 104 through which the main current flows. Further, the IGBT module 100 has a gate terminal 105 and an auxiliary emitter terminal 106, and by controlling the voltage applied between these terminals, the current flowing between the collector terminal 103 and the emitter terminal 104 can be controlled.
  • the IGBT 101 when a voltage equal to or higher than the threshold voltage Ref.V of the IGBT is applied to the gate terminal 105 with respect to the auxiliary emitter terminal 106, the IGBT 101 turns on. On the contrary, when the voltage of the gate terminal 105 is set to the threshold voltage Ref.V or less with respect to the auxiliary emitter terminal 106, the IGBT 101 is turned off.
  • this threshold voltage Ref.V is about 4 to 7 V, which is + 15 V when on and -15 V when off in consideration of margins such as malfunction due to noise and fluctuations in the power supply. There are many examples of application.
  • the 110 is a control unit (hereinafter, also referred to as a “gate driver”), and applies a voltage for controlling the IGBT between the gate terminal 105 and the auxiliary emitter terminal 106 of the IGBT module 100 as described above.
  • the gate driver 110 receives an on / off command from a higher-level controller that generates a PWM control signal of the converter, and receives an output of the signal input circuit 111 to control the IGBT.
  • the upper controller and the gate driver are connected by an optical fiber and communicated in an electrically isolated state.
  • the method is widely used.
  • the signal input circuit 111 has a role of receiving an optical signal and converting it into an electric signal to the drive circuit 112.
  • communication with the host controller is performed by an electric signal, and a highly insulated photocoupler is built in the signal input circuit 111 between the input and output sections of the input circuit 111.
  • a highly insulated photocoupler is built in the signal input circuit 111 between the input and output sections of the input circuit 111.
  • the drive circuit 112 is a circuit that receives an electric signal from the signal input circuit 111 and outputs the voltage that controls the gate of the IGBT module 100 via the gate resistor 120.
  • the output of the signal input circuit 111 is often composed of TTL or CMOS level voltage, and the IGBT module 100 cannot be directly controlled by the output of the signal input circuit 111. Therefore, the drive circuit 112 outputs the signal of the signal input circuit 111. Amplifies to + 15V, -15V, etc. to drive the IGBT.
  • the drive circuit 112 is connected to a positive power supply (+ 15V, etc.) and a negative power supply (-15V).
  • the gate resistor 120 is provided to adjust the rate of change of the voltage applied to the gate terminal 105, and when the resistance value is increased, the change of the gate voltage becomes gradual and the switching speed of the IGBT 101 can be slowed down.
  • the feature of the first embodiment is that the disconnection of the gate wiring 119 is detected by using the output of the signal input circuit 111 and the output of the drive circuit 112.
  • the gate voltage determination circuit 114 monitors the output of the gate drive circuit 112 at the output side node of the gate resistor 120, and when the voltage becomes larger than the reference voltage 115, it determines that the IGBT module 100 is turned on and the voltage is small. If it becomes, it is determined that the IGBT module 100 is turned off, and the determination result is transmitted to the XOR circuit 116.
  • the output of the signal input circuit 111 is also input to the delay circuit 113, and a signal is output to the XOR circuit 116 after a predetermined delay time.
  • the XOR circuit 116 takes the exclusive OR of the output of the delay circuit 113 and the output of the gate voltage determination circuit 114, and transmits the result to the filter circuit 117.
  • the filter circuit 117 excludes the output of the XOR circuit 116 if it does not last for a predetermined time (ie, if it is a short output). As the predetermined time, for example, about several hundred ns to 2 ⁇ s is set. As a result, the filter circuit 117 exhibits a malfunction prevention function, which will be described later.
  • the feedback circuit 118 is a circuit that receives the output of the filter circuit 117 and returns a signal to the upper controller (not shown) described above. As described above, the feedback circuit 118 converts an electric signal into an optical signal and outputs the signal through an optical fiber. It works such as returning. Next, the operation of the circuit of FIG. 1 will be described with reference to FIGS. 5 to 7.
  • FIG. 5 is a timing chart showing an operation when the gate wiring 119b is not broken in the failure detection device 1 of FIG. 1.
  • the input 111 In of the signal input circuit 111 is inverted from low to high.
  • the output 111 Out of the signal input circuit 111 is inverted from low to high.
  • the reason why the time difference from the time t1 to t2 occurs is that the optical signal is converted into an electric signal in the signal input circuit 111 as described above.
  • the output of the signal input circuit 111 is input to the drive circuit 112, and at time t2, the output of the drive circuit 112 is inverted from low to high, and the voltage between the gate and emitter of the IGBT module 100 (gate terminal 105, auxiliary emitter terminal 106). (Voltage between) is increased.
  • the gate voltage determination circuit 114 determines that the IGBT 101 is turned on and inverts the output from low to high.
  • the reference voltage 115 is set to the threshold voltage Ref.V of the IGBT 101.
  • the output of the gate voltage determination circuit 114 is input to the XOR circuit 116.
  • the output of the signal input circuit 111 is also input to the delay circuit 113, and after a predetermined time ⁇ t1 elapses, the output signal is inverted from low to high at time t3.
  • the output of this delay circuit 113 is input to the XOR circuit 116.
  • the delay time ⁇ t1 of the delay circuit 113 is set to be the same as the time from when the output 111 Out of the signal input circuit 111 is inverted until the gate-emitter voltage of the IGBT module 100 reaches the threshold voltage Ref.V. ..
  • a CR charging circuit in which a capacitor and a resistor are combined may be connected in series in multiple stages.
  • the exclusive OR of the signal 113 Out from the delay circuit 113 and the signal 114 Out from the gate voltage determination circuit 114 is taken to generate the output 116 Out. Therefore, as shown in FIG. 5, both inputs are input until time t3.
  • the output 116 Out is also low because it is low, and both inputs are high at the same time after time t3, so the output 116 Out remains low. Therefore, the signal 118 Out of the feedback output circuit 118 that operates by receiving the output 116 Out of the XOR circuit 116 is not inverted, and the signal 118 Out is low, so that the connection state of the gate wiring 119 is determined to be normal. ..
  • FIG. 6 is a timing chart showing an operation when the gate wiring 119 is broken in the failure detection device 1 of FIG. 1.
  • a signal is input to the signal input circuit 111 from the upper controller, and at time t2, the output 111 Out of the signal input circuit 111 is inverted from low to high, and the input 112 In and output 112 Out of the drive circuit 112 are also low. Invert from to high.
  • the output voltage G.Dr.Out.V of the gate driver 110 also increases.
  • the difference from FIG. 5 is that the output of the gate driver 110 is in the open state because the gate wiring 119 is broken, and the voltage increases sharply because there is no capacity of the gate to be charged. Therefore, only the output 114 Out of the gate voltage determination circuit 114 is inverted at the time t3 before the time t5 when the output of the delay circuit 113 is inverted.
  • the XOR circuit 116 inverts the output 116 Out from low to high when only one input is inverted.
  • the output 116 Out of the inverted XOR circuit 116 is input to the filter circuit 117, and the filter circuit 117 inverts the output 117 Out from low to high after the delay time ⁇ t2.
  • This delay time ⁇ t2 is a time constant of the filter and is determined from the viewpoint of preventing malfunction, which will be described later.
  • the output 118 Out of the feedback output circuit 118 is inverted from low to high, notifying the upper controller of the disconnection.
  • the output 113 Out of the delay circuit 113 is inverted from low to high at time t5 after the delay time ⁇ t1
  • the output 116 Out of the XOR circuit 116 is inverted to low again, and the input 117 In of the filter circuit 117 is also inverted to low.
  • the filter circuit 117 by providing the filter circuit 117 with a latch function, the output 117 Out is kept high even if the input 117 In is inverted to low as shown in FIG. 6, and the disconnection is continuously notified to the upper controller.
  • the filter circuit 117 is not provided with the latch function as in the first embodiment and the feedback output circuit 118 is provided with the latch circuit, or a configuration in which the upper controller has a function of holding an abnormality is also conceivable.
  • the output of the feedback output circuit 118b of the lower arm is connected to the input of the gate driver 110a of the upper arm via the inverter 121 of the open collector, and when a disconnection is detected, the upper arm is detected. It is configured to stop the on command from the host controller input to the gate driver 110a of.
  • the command of the paired arm is immediately turned off to protect the system.
  • the disconnection when the gate wiring 119 is disconnected, the disconnection can be detected by monitoring the timing of the increase in the gate voltage, and the disconnection can be easily detected with a simple configuration. It has the feature.
  • the change in the gate voltage of the IGBT has fluctuations due to the manufacturing variation of the IGBT, and the gate-emitter voltage does not always reach the threshold value in the same time in all IGBTs. This time also fluctuates depending on the temperature.
  • the circuit operation of the delay circuit 113 also has fluctuations in operation due to manufacturing variations of the parts used and the temperature of the usage environment. If there is a fluctuation, the delay time ⁇ t1 by the delay circuit 113 and the time until the output voltage 105-106V of the gate driver 110 reaches the threshold voltage Ref.V of the IGBT 101 may not match. This will be described with reference to FIG.
  • FIG. 7 is a timing chart showing an operation in the failure detection device 1 of FIG. 1 when the delay time ⁇ t1 of the delay circuit 113 is shorter than the state shown in FIG.
  • FIG. 7 shows a case where the delay time ⁇ t1 of the delay circuit 113 is shorter than that of FIG. 5 due to the variation in the characteristics of the IGBT described above. Therefore, the output of the delay circuit 113 is inverted before the output of the gate voltage determination circuit 114, the output 116 Out of the XOR circuit 116 is inverted at time t3, and the input 117 In of the filter circuit 117 is also inverted from low to high. do.
  • the gate / emitter voltage 105-106V of the IGBT module 100 increases and reaches the threshold voltage Ref.V, and the output 114Out of the gate voltage determination circuit 114 reverses from low to high.
  • the output 116 Out of the XOR circuit 116 is inverted to low again, and the input 117 In of the filter circuit 117 is also inverted from high to low.
  • the output 117 Out of the filter circuit 117 does not invert from low to high, and the output 118 Out of the feedback output circuit 118 does not change either. Since pulse fluctuations due to manufacturing variations of parts and temperature changes always occur, it is possible to reliably prevent false detection due to fluctuations by appropriately setting the filter time constant of the filter circuit 117.
  • FIG. 2 is a functional block diagram of the failure detection device 2 according to the second embodiment of the present invention.
  • the same components as those in FIG. 1 are designated by the same reference numerals.
  • reference numeral 201 is a timing determination circuit
  • reference numeral 202 is a timer circuit.
  • the feature of Example 2 is that the timer circuit 202 can be used to accurately determine the abnormality.
  • the timer circuit 202 includes a clock and an arithmetic circuit, and although not shown, it can realize a function such as changing the delay time based on information from a temperature sensor or the like. As a result, it becomes possible to detect the disconnection of the wiring without erroneously detecting the fluctuation of the delay time.
  • FIG. 3 is a functional block diagram of the failure detection device 3 according to the third embodiment of the present invention.
  • FIG. 8 is a timing chart showing the operation of the failure detection device 3 shown in FIG.
  • the same components as those in FIGS. 1 and 2 are designated by the same reference numerals.
  • the feature of the failure detection device 3 is that it is possible to detect the disconnection of the gate wiring of the IGBT 101 which is driven in parallel.
  • the IGBT 101 driven in parallel has the same characteristics and is controlled on and off at the same timing to increase the current capacity.
  • the failure detection device 3 of FIG. 3 a case is shown in which two are branched and wired from one gate driver 110 to each gate terminal 105 of the IGBT 101 connected in parallel. More specifically, the drive circuit 112 provided inside the gate driver 110 generates a control signal and applies it to the two gate terminals 105 via one gate resistor 120.
  • the gate wiring branched after the gate resistor 120 is connected to the gate terminal 105. In this configuration, if one of the gate wirings is broken, only the gate of the other IGBT will be charged and discharged. In the case of the failure detection device 3 shown in FIG. 3, since the input capacitance of the element seen from the gate driver 110 is reduced to 1/2, the change in the gate voltage becomes faster than in the normal state.
  • the operation of the failure detection device 3 shown in FIG. 3 will be described with reference to FIG.
  • the voltage waveform when there is no disconnection is shown by a broken line in the output voltage G.DrOut.V of the gate driver 110 after starting to increase at time t2 in FIG.
  • the output voltage G.Dr.Out.V is about about the voltage waveform when there is no disconnection. It increases in 1/2 time.
  • the output 114 Out of the gate voltage determination circuit 114 is inverted, and the output 116 Out of the XOR circuit 116 and the input 117 In of the filter circuit 117 are also inverted high.
  • the output 117 Out of the filter circuit 117 is inverted to high after the delay time ⁇ t2 of the filter circuit elapses, and the output 118 Out of the feedback output circuit 118 is inverted to high.
  • a method of detecting the disconnection of the gate wiring is provided without increasing the number of circuit elements such as the gate voltage determination circuit 114.
  • FIG. 4 is a functional block diagram of the failure detection device 4 according to the fourth embodiment of the present invention.
  • the same components as those in FIGS. 1 to 3 are designated by the same reference numerals.
  • reference numerals 401 and 402 are gate voltage determination circuits
  • reference numerals 403 and 404 are gate resistors.
  • the feature of the failure detection device 4 is that the gate voltage determination circuit 114 shown in FIGS. 1 to 3 is provided in each IGBT as shown by reference numerals 401 and 402 in FIG. 4, and the determination is made individually.
  • the configuration for detecting the disconnection of the gate wiring of a plurality of IGBTs by one gate voltage determination circuit 114 has been described.
  • the sensitivity of disconnection detection decreases according to the increased number of parallel IGBT elements.
  • the number of parallels increases, for example, when four IGBT elements are connected in parallel, even if one gate wiring is broken, the total input capacitance of the IGBT elements as seen from the gate driver 110 is reduced to only 3/4, and FIG.
  • the rise of the output voltage of the gate driver of is not much different from the normal case.
  • the gate resistances 403,404 and the gate voltage determination circuits 401,402 are provided in the same number as the number of parallel IGBT elements, and the potential of the node on the output side of the gate resistance 403,404 is monitored to detect when the number of parallels is increased. It prevents the decrease in sensitivity.
  • the failure detection device 4 according to the fourth embodiment can quickly detect that only the voltage of the broken gate wiring has increased. As a result, the failure detection device 4 can detect the disconnection of the gate wiring without lowering the detection sensitivity.
  • the IGBT has been described as an example of the driven element, the same effect can be obtained if the MOSFET or JFET (JFET Field Effect Transistor) is a voltage-driven device such as a junction field effect transistor). That is clear. Further, in the first embodiment, the configuration for protecting the system destruction by turning off the gate command of the paired element when the disconnection is detected has been described, but another method is to turn off the main power supply of the system. The same protective effect can be obtained by.
  • JFET JFET Field Effect Transistor
  • the IGBT that turns on / off a high voltage such as 1 kV and the gate drive circuit equipped with the logic of low voltage drive are arranged at a considerable distance for safety. Therefore, the gate wiring 119b connecting them is wired with a length corresponding to the separation distance. In the work process until the gate wiring 119b is completed, it is necessary to consider the possibility of potential wiring defects due to work quality.
  • the time required for the gate voltage to rise is shorter than the time of the transient phenomenon determined by the time constant of the capacitance component inside the IGBT. Will be done. Therefore, the rise of the gate voltage becomes steeper than the transient phenomenon in the normal state.
  • the failure detection devices 1 to 4 detect that a difference has occurred in the rising speed of the gate voltage according to the normal state and the gate disconnection by comparing the rising gate voltage with the threshold value to some extent. In other words, when the rate of change of the output voltage of the control unit (gate driver) 110 is larger than the predetermined value, it is determined that a connection abnormality has occurred in the control line 119 and an abnormality detection signal is output.
  • a failure detection device and a method thereof that can detect disconnection of the gate wiring of a voltage-driven power semiconductor element used in a power conversion device with high reliability by a simple configuration. can. According to this, the disconnection of the gate wiring can be reliably detected by a simple method of monitoring the output voltage of the gate driver without using an IGBT or the like having a special structure for current detection.
  • the present devices 1 to 3 electrically connect between the auxiliary terminals 105 and 106 for controlling the path related to the main terminals 103 and 104 of the semiconductor switching element 101 and the control unit 110 for driving and controlling the semiconductor switching element 101.
  • This device 1 detects whether the connection status of the control line 119 to be connected is normal or abnormal.
  • the present devices 1 to 3 determine that a connection abnormality has occurred in the control line 119 and output an abnormality detection signal.
  • the semiconductor switching element 101 provided in the devices 1 to 3 is a voltage-driven element.
  • the present devices 1 to 3 can easily improve the reliability of the inverter, etc., which is the applicable equipment, by detecting the connection abnormality of the control line 119 that controls the voltage-driven element and outputting the abnormality detection signal. ..
  • the present devices 1 to 3 are suitable for a power conversion circuit (inverter).
  • This power conversion circuit is configured by connecting main terminals 103 and 104 opened and closed by a plurality of arms 100a and 100b formed for each semiconductor switching element 101 in series between a pair of power supply lines.
  • the control unit 110 is a gate driver 110 that applies a control signal to the auxiliary terminals 105 and 106.
  • the control line 119 is a gate wiring 119 connecting between the auxiliary terminals 105 and 106 and the output terminal of the gate driver 110.
  • At least one of the pair of arms 100a and 100b connected in series constituting the power conversion circuit is controlled off by the gate driver 110.
  • the abnormality detection signal is the gate driver connected to the other arm 100b (a). Input to 110 and stop the input gate driver 110.
  • the power conversion circuit will be substantially stopped and safety can be ensured. At this time, even if the arm 100 on the side where the connection abnormality has occurred cannot be turned off, the arm on the normal side can be turned off.
  • the abnormality detection signal may be transmitted to a higher-level controller that gives a command to the gate driver 110 to stop the power conversion circuit.
  • the entire power conversion circuit is stopped where safety can be ensured by simply turning off the arm 100 on the side of the pair of arms 100a and 100b where no connection abnormality has occurred, that is, the main system. It is safer and more reliable because the power is turned off.
  • the arm 100 has a semiconductor switching element 101, a pair of main terminal pairs composed of the main terminals 103 and 104 of the semiconductor switching element 101, and a pair of auxiliary terminal pairs for controlling the current flowing through the main terminal pair.
  • the gate driver 110 includes a drive circuit 112, a gate voltage determination circuit 114, a delay circuit 113, and an XOR circuit 116.
  • the drive circuit 112 receives a command from a higher-level controller that gives a command to the gate driver 110 and generates a control signal.
  • the gate voltage determination circuit 114 outputs a comparison determination signal 114 Out when the output voltage of the drive circuit 112 exceeds a predetermined voltage.
  • the delay circuit 113 receives a command from the controller, delays for a certain period of time, and then outputs a delay signal 113 Out.
  • the XOR circuit 116 outputs an exclusive OR for each output of the delay circuit 113 and the gate voltage determination circuit 114.
  • the acquired abnormality detection signal is the gate driver 110 connected to the other arm 100. Is input to, and the input gate driver 110 is stopped. At this time, even if the arm 100 on the side where the connection abnormality has occurred cannot be turned off, the arm on the normal side can be turned off.
  • the abnormality detection signal is transmitted to a higher-level controller that gives a command to the gate driver 110, and stops the power conversion circuit. As a result, the entire power conversion circuit is stopped, which is more secure and reliable.
  • 100,100a, 100b IGMP module (upper arm, lower arm), 100,101a, 101b: IGBT (semiconductor switching element), 102,102a, 102b: free wheel diode, 103,103a, 103b: collector terminal, 104,104a, 104b: emitter Terminal, 105,105a, 105b: Gate terminal, 106,106a, 106b: Auxiliary emitter terminal, 110,110a, 110b: Gate driver, 111,111b: Signal input circuit, 112,112b: Drive circuit, 113,113b: Delay circuit, 114,114b, 401,402 : Gate voltage judgment circuit, 115,115b: Reference voltage, 116,116b: XOR circuit, 117,117b: Filter circuit, 118,118b: Feedback output circuit, 119,119a, 119b: Gate wiring, 120,120b, 403, 404: Gate resistance, 201 : Timing judgment circuit, 202: Timer circuit,

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)
PCT/JP2021/017160 2020-05-27 2021-04-30 故障検知装置及びその方法 Ceased WO2021241137A1 (ja)

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US20230268822A1 (en) * 2020-06-15 2023-08-24 Hitachi Astemo, Ltd. Inverter device
JP2024175405A (ja) * 2023-06-06 2024-12-18 株式会社デンソー 駆動回路

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JP2007295687A (ja) * 2006-04-24 2007-11-08 Toyota Motor Corp Ｄｃ−ｄｃコンバータの故障検出回路
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US20230268822A1 (en) * 2020-06-15 2023-08-24 Hitachi Astemo, Ltd. Inverter device
US12316209B2 (en) * 2020-06-15 2025-05-27 Hitachi Astemo, Ltd. Method and system for diagnosing abnormality of power device drive in inverter device
JPWO2023135901A1 (https=) * 2022-01-17 2023-07-20
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JP2024175405A (ja) * 2023-06-06 2024-12-18 株式会社デンソー 駆動回路

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EP4160899B1 (en) 2026-01-28
JPWO2021241137A1 (https=) 2021-12-02

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