WO2021229886A1 - Dispositif de réception et procédé de commande de dispositif de réception - Google Patents

Dispositif de réception et procédé de commande de dispositif de réception Download PDF

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Publication number
WO2021229886A1
WO2021229886A1 PCT/JP2021/006572 JP2021006572W WO2021229886A1 WO 2021229886 A1 WO2021229886 A1 WO 2021229886A1 JP 2021006572 W JP2021006572 W JP 2021006572W WO 2021229886 A1 WO2021229886 A1 WO 2021229886A1
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WIPO (PCT)
Prior art keywords
signal
master
slave
processing unit
satellite
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PCT/JP2021/006572
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English (en)
Japanese (ja)
Inventor
哲宏 二見
信雄 柴田
勝之 田中
和邦 鷹觜
勝美 高岡
健史 長野
明弘 大杉
Original Assignee
ソニーセミコンダクタソリューションズ株式会社
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Priority to JP2022522525A priority Critical patent/JP7565348B2/ja
Publication of WO2021229886A1 publication Critical patent/WO2021229886A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13—Receivers
    • G01S19/34—Power consumption
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13—Receivers
    • G01S19/35—Constructional details or hardware or software details of the signal processing chain
    • G01S19/37—Hardware or software details of the signal processing chain

Definitions

  • This technology is related to the receiving device. More specifically, the present invention relates to a receiving device for measuring the current position and a control method for the receiving device.
  • GNSS Global Navigation Satellite System
  • GPS Global Positioning System
  • the QZSS Quadrati-Zenith Satellite System
  • L2C L5, L6 bands
  • L5C L5, L6 bands
  • the positioning accuracy is improved and the positioning time is shortened by using the L1 band positioning signal and the L2 and L5 band positioning signals in combination for the positioning calculation.
  • the centimeter-class positioning reinforcement information in the L6 band it is possible to realize highly accurate centimeter-class positioning.
  • RF Radio Frequency
  • digital signal processing circuits since there is only one receiving circuit, reception cannot be continued when the receiving circuit fails. Therefore, when operating the system in a harsh environment, performance such as failure tolerance may be insufficient.
  • the receiving circuit is made redundant in order to improve the failure tolerance and the like, the power consumption may increase. As described above, in the above-mentioned system, it is difficult to improve the performance while suppressing the increase in power consumption.
  • This technology was created in view of such a situation, and aims to improve the performance of the receiving device that receives the signal from the satellite while suppressing the increase in power consumption.
  • the present technology has been made to solve the above-mentioned problems, and the first aspect thereof is a master that converts a high frequency signal having a higher frequency than a predetermined intermediate frequency signal into the intermediate frequency signal and outputs the signal.
  • the side receiving circuit, the master side satellite processing unit that decodes the signal from the predetermined satellite based on the intermediate frequency signal and outputs it as the master side observation value, and the signal from the predetermined satellite based on the intermediate frequency signal.
  • Master-side power supply control that shuts off the power supply of either the slave-side satellite processing unit that decodes and outputs it as the slave-side observation value, and the master-side reception circuit or the master-side satellite processing unit when certain conditions are met.
  • It is a receiving device including a unit and a positioning unit that generates position information based on at least one of the master-side observation value and the slave-side observation value. This has the effect of optimizing the balance between power consumption and performance.
  • the slave side receiving circuit that converts the high frequency signal into the intermediate frequency signal and outputs the signal to the slave side satellite processing unit, and the slave side if the predetermined condition is satisfied.
  • the slave-side power supply control unit that turns on the power to the receiving circuit is further provided, and the master-side power supply control unit controls the power supply of the master-side receiving circuit when the predetermined conditions are satisfied, and the intermediate frequency.
  • the output of the signal may be stopped, and the master-side receiving circuit may output the intermediate frequency signal to the slave-side satellite processing unit via the slave-side receiving circuit.
  • the power supply of the slave-side receiving circuit is cut off, which has the effect of reducing power consumption.
  • the master-side receiving circuit may output the digital intermediate frequency signal to the master-side satellite processing unit and the slave-side satellite processing unit. This has the effect of eliminating the need for AD (Analog to Digital) conversion on the slave side.
  • AD Analog to Digital
  • the master side receiving circuit may output the analog intermediate frequency signal to the slave side receiving circuit. This has the effect of reducing the number of wirings and terminals of the interface.
  • the master-side receiving circuit further transmits a predetermined clock signal to the slave-side receiving circuit, and the master-side receiving circuit and the slave-side receiving circuit synchronize with the clock signal.
  • the AD conversion process for the intermediate frequency signal may be further performed. This has the effect of eliminating the need for clock generation on the slave side.
  • the slave side receiving circuit may further output the intermediate frequency signal to the master side receiving circuit. This has the effect that the intermediate frequency signal on the slave side is also used on the slave side.
  • the master side satellite processing unit and the slave side satellite processing unit may decode at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave. This has the effect that two wavelengths are used for positioning.
  • the master side satellite processing unit decodes at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave, and the slave side satellite processing unit has the high frequency. At least one of the L1 signal, the L5 signal, and the L2 signal transmitted using the signal as a carrier wave may be decoded. This has the effect that three wavelengths are used for positioning.
  • the master-side satellite processing unit decodes the master-side baseband signal corresponding to a predetermined frequency band, and the slave-side satellite processing unit corresponds to a frequency band different from the above-mentioned frequency band.
  • the slave side baseband signal may be decoded. This has the effect of making it possible to deal with L2 signals and L6 signals.
  • the master side digital front end that converts the intermediate frequency signal into the master side baseband signal and generates the master side control signal based on the intermediate frequency signal, and the intermediate frequency signal. Select either the slave side digital front end that converts to the slave side baseband signal and generates the slave side control signal based on the intermediate frequency signal, or the master side control signal or the slave side control signal.
  • the master-side receiving circuit includes a mixer that converts the high-frequency signal into the intermediate-frequency signal, and an automatic gain that controls the gain with respect to the intermediate-frequency signal according to the control signal. It may be provided with a controller. This has the effect that the automatic gain control circuit is controlled by the master or slave.
  • the master side satellite processing unit decodes at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave, and the slave side satellite processing unit has the high frequency. Either the L2 signal or the L6 signal transmitted using the signal as a carrier wave may be decoded. This has the effect of making it possible to deal with L2 signals and L6 signals.
  • the master-side satellite processing unit decodes at least one of the L1 signal, the L2 signal, and the L5 signal transmitted using the high-frequency signal as a carrier wave, and the slave-side satellite processing unit obtains the slave-side satellite processing unit.
  • the L6 signal transmitted using the high frequency signal as a carrier wave may be decoded. This has the effect that three wavelengths are used for positioning.
  • the master side receiving circuit, the master side satellite processing unit, and the master side power supply control unit are provided on a predetermined master side chip, and the slave side satellite processing unit unit is a predetermined unit. It may be provided on the slave side chip. This has the effect of exchanging intermediate frequency signals between the chips.
  • the positioning unit may be provided on the master side chip. This has the effect of performing positioning within the chip.
  • the positioning unit may be provided outside the master side chip and the slave side chip. This has the effect of positioning outside the chip.
  • FIG. 1 is an overall view showing a configuration example of a positioning system according to the first embodiment of the present technology.
  • This positioning system is a system for acquiring a current position using a signal from a satellite, and includes a satellite 100 and a receiving device 200.
  • the receiving device 200 receives a signal from the satellite 100 and acquires the current position of the receiving device 200.
  • the receiving device 200 includes an antenna 201, a surface acoustic wave filter 210, a crystal oscillator 220, and GNSS chips 230 and 240.
  • the antenna 201 receives a high frequency (RF: Radio Frequency) signal transmitted from the satellite 100 as an RFIN.
  • RF Radio Frequency
  • This RF signal RFIN is supplied to both the GNSS chips 230 and 240 via the elastic surface wave filter 210.
  • the elastic surface wave filter 210 transmits a predetermined frequency band among the RF signals RFIN from the antenna.
  • a predetermined frequency band for example, L1 band and L5 band
  • the L1 band is a frequency band having a predetermined bandwidth ( ⁇ 12.0 MHz, etc.) having a center frequency of 1575.42 MHz (MHz).
  • the L5 band is a frequency band having a predetermined bandwidth ( ⁇ 12.45 MHz, etc.) having a center frequency of 1176.45 MHz (MHz).
  • the signal transmitted by the satellite 100 after modulating the carrier wave in the L1 band is called an L1 signal
  • the signal transmitted by the satellite 100 after modulating the carrier wave in the L5 band is called an L5 signal.
  • the crystal oscillator 220 uses the piezoelectric phenomenon of quartz to generate a clock signal CLK TCXO having a constant frequency.
  • the crystal oscillator 220 supplies the generated clock signal CLK TCXO to the GNSS chips 230 and 240.
  • the GNSS chip 230 generates at least one of position information, time information, and velocity information based on the RF signal RFIN from the surface acoustic wave filter 210 and the satellite observation value from the GNSS chip 240.
  • the position information is information indicating the current position of the receiving device 200
  • the time information is information indicating the current time. Signals from four or more satellites 100 are required to generate position information.
  • the speed information is information indicating the moving speed of the receiving device 200.
  • the GNSS chip 230 may generate all of the position information, the time information and the speed information, or may generate a part of them (such as only the position information). Further, the GNSS chip 230 converts an RF signal into an intermediate frequency (IF: Intermediate Frequency) signal, and outputs the IF signal to the GNSS chip 240.
  • IF Intermediate Frequency
  • the GNSS chip 240 obtains satellite observation values based on the IF signal from the GNSS chip 230.
  • the satellite observation value is information obtained by decoding a signal from a satellite such as the satellite 100, and includes navigation data, correction data, and the like.
  • the GNSS chip 240 supplies satellite observations to the GNSS chip 230.
  • the GNSS chip 230 supplies a synchronization control signal to the GNSS chip 240, and operates the GNSS chip 240 in synchronization with the GNSS chip 230. Therefore, in the receiving device 200, the GNSS chip 230 functions as a master for controlling the slave, and the GNSS chip 240 functions as a slave.
  • the receiving device 200 is provided with only one GNSS chip 240 on the slave side, the number of chips on the slave side is not limited to one, and two or more chips can be provided as needed.
  • FIG. 2 is a block diagram showing a configuration example of GNSS chips 230 and 240 according to the first embodiment of the present technology.
  • the GNSS chip 230 includes a master side interface control unit 231, a master side power supply control unit 232, a master side RF circuit 300, a master side digital signal processing unit 400, and serial interfaces 233 and 234.
  • the GNSS chip 230 is an example of the master-side chip described in the claims.
  • the GNSS chip 240 includes a slave side interface control unit 241, a slave side power supply control unit 242, a slave side RF circuit 500, a slave side digital signal processing unit 600, and a serial interface 243.
  • the GNSS chip 240 is an example of the slave-side chip described in the claims.
  • the master side interface control unit 231 controls the selector in the master side RF circuit 300.
  • the switching destination of the selector will be described later.
  • the master side power supply control unit 232 controls the power supply of the master side RF circuit 300 and the master side digital signal processing unit 400.
  • the master-side RF circuit 300 operates in synchronization with the clock signal CLK TCXO from the crystal oscillator 220, and converts the RF signal from the surface acoustic wave filter 210 into an analog IF signal AIF.
  • the master side RF circuit 300 outputs the IF signal AIF to the slave side RF circuit 500.
  • the GNSS chip 230 is provided with a terminal for outputting this IF signal AIF.
  • the master side RF circuit 300 performs AD conversion processing on the IF signal AIF, generates a digital IF signal DIF, and outputs the digital IF signal DIF to the master side digital signal processing unit 400.
  • the master-side RF circuit 300 generates a clock signal CLK DSP for operating the master-side digital signal processing unit 400 from the clock signal CLK TCXO, and outputs the clock signal CLK DSP to the master-side digital signal processing unit 400.
  • the master-side digital signal processing unit 400 operates in synchronization with the clock signal CLK DSP , processes the digital IF signal DIF, and generates position information and the like.
  • the master-side digital signal processing unit 400 converts the IF signal DIF into a baseband signal, and acquires satellite observation values (navigation data, etc.) based on the baseband signal. Further, the master side digital signal processing unit 400 acquires satellite observation values on the slave side via the serial interface 234, and generates position information and the like using the satellite observation values on the master side and the slave side. Then, the master side digital signal processing unit 400 outputs position information and the like to the outside of the GNSS chip 230 via the serial interface 233.
  • the slave side interface control unit 241 controls the selector in the slave side RF circuit 500.
  • the switching destination of the selector will be described later.
  • the slave side power supply control unit 242 controls the power supply of the slave side RF circuit 500 and the slave side digital signal processing unit 600.
  • the slave-side RF circuit 500 operates in synchronization with the clock signal CLK TCXO from the crystal oscillator 220, and converts the RF signal from the surface acoustic wave filter 210 into an analog IF signal AIF.
  • the slave side RF circuit 500 performs AD conversion processing on the master side or slave side IF signal AIF, generates a digital IF signal DIF, and outputs the digital IF signal DIF to the slave side digital signal processing unit 600.
  • the slave-side RF circuit 500 generates a clock signal CLK DSP for the slave-side digital signal processing unit 600 to operate from the clock signal CLK TCXO, and outputs the clock signal CLK DSP to the slave-side digital signal processing unit 600.
  • the slave-side digital signal processing unit 600 operates in synchronization with the clock signal CLK DSP , processes the digital IF signal DIF, and generates satellite observation values.
  • the slave side digital signal processing unit 600 outputs the satellite observation value on the slave side to the GNSS chip 230 via the serial interface 243.
  • the functions of the digital signal processing unit on the master side and slave side can also be realized by FPGA (Field-Programmable Gate Array) or DSP (Digital Signal Processor). Further, a common circuit such as a processor and a memory on the master side and the slave side may be provided outside the master and the slave and shared between the master and the slave. The same applies to other embodiments described later.
  • FIG. 3 is a block diagram showing a configuration example of the master-side RF circuit 300 according to the first embodiment of the present technology.
  • the master-side RF circuit 300 includes low-noise amplifiers 311 and 321, local phase-locked loops 312 and 322, mixers 313 and 323, low-pass filters 314 and 324, and automatic gain control circuits 315 and 325. Further, the master side RF circuit 300 further includes a phase synchronization circuit 330, a switching unit 340, and ADCs (Analog to Digital Converter) 351 and 352. Selectors 341 and 342 are arranged in the switching unit 340.
  • the low noise amplifier 311 amplifies the RF signal RFIN from the elastic surface wave filter 210.
  • the low noise amplifier 311 supplies the amplified RF signal RFIN to the mixer 313.
  • Local phase synchronization circuit 312 a local signal LO L1 of the local frequency corresponding to the L1 band, and generates a clock signal CLK TCXO.
  • the local phase-locked loop 312 supplies the local signal LO L1 to the mixer 313.
  • Mixer 313 mixes the RF signal RFIN and the local signal LO L1 from the low noise amplifier 311, and generates an IF signal AIF L1 of low analog frequency than the RF signal.
  • the mixer 313 supplies the IF signal AIF L1 to the low-pass filter 314.
  • the low-pass filter 314 passes a frequency component having a predetermined cutoff frequency or less in the IF signal AIF L1 and supplies it to the automatic gain control circuit 315.
  • the automatic gain control circuit 315 controls the gain for the input IF signal AIF L1 according to the level of the signal.
  • the automatic gain control circuit 315 outputs a constant level IF signal AIF L1 to the GNSS chip 240 and the selector 341.
  • the selector 341 has two input terminals and one output terminal. One of the two input terminals is connected to the automatic gain control circuit 315, and the output terminal is connected to the ADC 351. Further, the selector 341 switches the input destination according to the control of the interface control unit 231 on the master side.
  • the phase-locked loop 330 generates a clock signal CLK DSP and a clock signal CLK ADC for operating the ADCs 351 and 352 from the clock signal CLK TCXO.
  • the phase-locked loop 330 supplies the clock signal CLK DSP to the master side digital signal processing unit 400, and supplies the clock signal CLK ADC to the ADCs 351 and 352.
  • the ADC 351 performs AD conversion processing for the IF signal AIF L1 from the selector 341 in synchronization with the clock signal CLK ADC.
  • the ADC 351 outputs the processed digital IF signal as DIF L1 to the master side digital signal processing unit 400.
  • the low noise amplifier 321 amplifies the RF signal RFIN.
  • the low noise amplifier 321 supplies the amplified RF signal RFIN to the mixer 323.
  • the local phase-locked loop 322 generates a local signal LO L5 having a local frequency corresponding to the L5 band from the clock signal CLK TCXO.
  • the local phase-locked loop 312 supplies the local signal LO L5 to the mixer 323.
  • Mixer 323 mixes the RF signal RFIN and the local signal LO L5 from the low noise amplifier 321, and generates an analog IF signal AIF L5 lower frequency than the RF signal.
  • the mixer 323 supplies the IF signal AIF L5 to the low-pass filter 324.
  • the low-pass filter 324 passes a frequency component of a predetermined cutoff frequency or less in the IF signal AIF L5 and supplies it to the automatic gain control circuit 325.
  • the automatic gain control circuit 325 controls the gain for the input IF signal AIF L5 according to the level of the signal.
  • the automatic gain control circuit 325 outputs a constant level IF signal AIF L5 to the GNSS chip 240 and the selector 342.
  • the selector 342 has two input terminals and one output terminal. One of the two input terminals is connected to the automatic gain control circuit 325, and the output terminal is connected to the ADC 352. Further, the selector 342 switches the input destination according to the control of the master side interface control unit 231.
  • the ADC 352 performs AD conversion processing for the IF signal AIF L5 from the selector 342 in synchronization with the clock signal CLK ADC.
  • the ADC 352 outputs the processed digital IF signal as DIF L5 to the master side digital signal processing unit 400.
  • the master side interface control unit 231 sets both input destinations of the selectors 341 and 342 to the automatic gain control circuits 315 and 325 in the initial state. Further, the master side power supply control unit 232 turns on all the power of the master side RF circuit 300 in the initial state.
  • the interface control unit 231 on the master side switches the input destinations of both the selectors 341 and 342. As a result, the path between the automatic gain control circuits 315 and 325 and the ADCs 351 and 352 is opened. Further, the master side power supply control unit 232 cuts off the power supply of the master side RF circuit 300 when a predetermined condition is satisfied. As a predetermined condition, for example, a failure of the master side RF circuit 300 can be considered.
  • FIG. 4 is a block diagram showing a configuration example of the slave-side RF circuit 500 according to the first embodiment of the present technology.
  • the slave-side RF circuit 500 includes low noise amplifiers 511 and 521, local phase-locked loops 512 and 522, mixers 513 and 523, low-pass filters 514 and 524, and automatic gain control circuits 515 and 525. Further, the slave-side RF circuit 500 further includes a phase-locked loop 530, a switching unit 540, and ADCs 551 and 552. Selectors 541 and 542 are arranged in the switching unit 540.
  • each circuit in the slave side RF circuit 500 is the same as the circuit of the same name in the master side RF circuit 300.
  • the IF signal AIF L1 from the GNSS chip 230 (master) is input to one of the two input terminals of the selector 541, and the other is connected to the automatic gain control circuit 515.
  • the IF signal AIF L5 from the master is input to one of the two input terminals of the selector 542, and the other is connected to the automatic gain control circuit 525.
  • the slave side interface control unit 241 sets the input destinations of both the selectors 541 and 542 to the master side in the initial state. Further, in the initial state, the slave-side power supply control unit 242 cuts off the power supply of circuits other than the phase-locked loop 530, the switching unit 540, the ADC 551, and the ADC 552 in the slave-side RF circuit 500.
  • the gray circuit is a circuit in which the power supply is cut off. The same applies to the subsequent drawings.
  • the slave side interface control unit 241 switches the input destinations of both the selectors 541 and 542. Further, when the predetermined condition is satisfied, the slave side power supply control unit 242 turns on the power of all the circuits in the slave side RF circuit 500.
  • a predetermined condition for example, a failure of the master side RF circuit 300 can be considered.
  • FIG. 5 is a block diagram showing a configuration example of the master-side digital signal processing unit 400 according to the first embodiment of the present technology.
  • the master-side digital signal processing unit 400 includes an L1 digital front end 410 and a predetermined number of L1 satellite processing units 420. Further, the master side digital signal processing unit 400 includes an L5 digital front end 430, a predetermined number of L5 satellite processing units 440, and a positioning engine 450.
  • a predetermined satellite is assigned to each of the L1 satellite processing units 420 as a capture target. Similarly, a predetermined satellite is assigned to each of the L5 satellite processing units 440 as a capture target.
  • the L1 satellite processing unit 420 and the L5 satellite processing unit 440 are each provided with N (N is an integer).
  • the L1 digital front end 410 converts the IF signal DIF L1 into a baseband signal corresponding to the L1 band by using a down converter or a digital filter.
  • the L1 digital front end 410 supplies a baseband signal to each of the L1 satellite processing units 420.
  • the L1 satellite processing unit 420 captures and tracks the assigned satellite based on the baseband signal corresponding to the L1 band, and decodes the L1 signal from that satellite.
  • the L1 satellite processing unit 420 outputs satellite observation values (navigation data, etc.) obtained for decoding to the positioning engine 450.
  • Each of the L1 satellite processing units 420 includes a satellite acquisition unit 421 and a satellite tracking unit 422.
  • the satellite acquisition unit 421 captures the assigned satellite.
  • the satellite acquisition unit 421 inputs, for example, the exclusive OR of the assigned satellite identification information (C / A code) and the input baseband signal to the correlator, and acquires the correlation value.
  • the satellite acquisition unit 421 outputs the carrier frequency offset and the code phase having the maximum correlation value to the satellite tracking unit 422.
  • the satellite acquisition unit 421 can integrate the correlation value for a certain period of time and output the carrier frequency offset or the like that maximizes the integrated value.
  • the satellite tracking unit 422 tracks the captured satellite.
  • the satellite tracking unit 422 synchronizes the carrier wave and the code timing with the carrier wave frequency offset and the code phase as initial values, and further synchronizes the navigation data and the correction data with respect to the physical frame to reproduce the satellite time. Further, the satellite tracking unit 422 estimates the propagation time of the satellite signal from the difference between the satellite time and the time of the receiving device, and by multiplying this by the speed of light, the propagation distance between the satellite 100 and the receiving device 200 is a pseudo distance. Estimate as. Further, the satellite tracking unit 422 demodulates the signal from the captured satellite and acquires navigation data and correction data. The satellite tracking unit 422 supplies these pseudo-distance, navigation data, and correction data to the positioning engine 450 as satellite observation values.
  • the L5 digital front end 430 converts the IF signal DIF L5 into a baseband signal corresponding to the L5 band.
  • the L5 digital front end 430 supplies a baseband signal to each of the L5 satellite processing units 440.
  • the L5 satellite processing unit 440 captures and tracks the assigned satellite based on the baseband signal corresponding to the L5 band, and decodes the L5 signal from that satellite.
  • the L5 satellite processing unit 440 outputs satellite observation values (navigation data, etc.) obtained for decoding to the positioning engine 450.
  • Each of the L5 satellite processing units 440 includes a satellite acquisition unit 441 and a satellite tracking unit 442. These functions are the same as those of the satellite acquisition unit 421 and the satellite tracking unit 422.
  • the positioning engine 450 generates position information and the like based on the satellite observation values on the master side from the L1 satellite processing unit 420 and the L5 satellite processing unit 440 and the satellite observation values on the slave side obtained via the serial interface 234. It is something to do. In positioning, the positioning engine 450 may use only the satellite observation values on the master side or may use the satellite observation values on both the master side and the slave side. Further, in positioning, both L1 band and L5 band satellite observation values are used.
  • the master side power supply control unit 232 turns on the power of all the circuits in the master side digital signal processing unit 400 in the initial state. Then, when the predetermined conditions are satisfied (in the case of failure of the master side RF circuit 300, etc.), the master side power supply control unit 232 uses the L1 digital front end 410, the L1 satellite processing unit 420, the L5 digital front end 430, and the L5 satellite. The power supply of each of the processing units 440 is cut off.
  • the master side digital signal processing unit 400 decodes both the L1 signal and the L5 signal, it is also possible to decode only one (L1 signal or the like). In this case, the power supply of the digital front end and the satellite processing unit corresponding to the one not decoded is cut off by the master side power supply control unit 232.
  • the master side digital signal processing unit 400 performs positioning using signals in GPS or QZSS (L1 signal or L5 signal), but performs positioning using signals in GNSS (Galileo, Glonass, etc.) other than GPS. You can also.
  • FIG. 6 is a block diagram showing a configuration example of the slave-side digital signal processing unit 600 according to the first embodiment of the present technology.
  • the slave-side digital signal processing unit 600 includes an L1 digital front end 610, a predetermined number of L1 satellite processing units 620, an L5 digital front end 630, and a predetermined number of L5 satellite processing units 640.
  • Each of the L1 satellite processing units 620 is provided with a satellite acquisition unit 621 and a satellite tracking unit 622
  • each of the L5 satellite processing units 640 is provided with a satellite acquisition unit 641 and a satellite tracking unit 642.
  • the circuit configuration of the slave-side digital signal processing unit 600 is the same as that of the master-side digital signal processing unit 400, except that the positioning engine 450 is not provided.
  • the L1 satellite processing unit 620 and the L5 satellite processing unit 640 on the slave side acquire satellite observation values and transmit them to the master via the serial interface 243.
  • FIG. 7 is a diagram showing an example of the state of the receiving device when switching from the master to the slave in the first embodiment of the present technology.
  • the master side RF circuit 300 down-converts the RF signal RFIN to an IF signal having a lower frequency. Then, the master-side RF circuit 300 outputs the analog IF signal AIF to the slave-side RF circuit 500, and outputs the IF signal DIF obtained by AD-converting the IF signal AIF to the master-side digital signal processing unit 400.
  • the master-side RF circuit 300 is an example of the master-side receiving circuit described in the claims.
  • the slave side RF circuit 500 AD-converts the IF signal AIF from the master and outputs it to the slave side digital signal processing unit 600.
  • the IF signal from the master is input to the slave side digital signal processing unit 600 via the slave side RF circuit 500.
  • the slave-side RF circuit 500 is an example of the slave-side receiving circuit described in the claims.
  • the L1 digital front end 410 and the L5 digital front end 430 in the master side digital signal processing unit 400 convert the IF signals DIF L1 and DIF L5 into baseband signals.
  • the L1 satellite processing unit 420 and the L5 satellite processing unit 440 decode the signal from the assigned satellite based on their baseband signals and acquire satellite observation values.
  • the positioning engine 450 generates position information and the like based on satellite observation values on at least one of the master side and the slave side.
  • the positioning engine 450 is an example of the positioning unit described in the claims.
  • the slave-side satellite processing unit (not shown) in the slave-side digital signal processing unit 600 converts the IF signal into a baseband signal. Then, the slave side satellite processing unit decodes a signal from a satellite different from the master side based on the baseband signal, acquires a satellite observation value, and outputs the satellite observation value to the master.
  • both the master and the slave observe the satellites, so if the number of observable satellites is the same, the number of receivers 200 is double that of the master alone. You can observe the satellites of.
  • the slave GNSS chip 240 can be added as needed. Therefore, assuming that the total number of master and slave chips is M (M is an integer of 2 or more), the receiving device 200 can observe M times as many satellites as in the case of only the master. can.
  • M is an integer of 2 or more
  • the receiving device 200 can observe M times as many satellites as in the case of only the master. can.
  • PPP-RTK PrecisePointPositioning-RTK
  • the slave-side power supply control unit 242 can cut off the power supply of the low-noise amplifier or mixer in the slave-side RF circuit 500. This makes it possible to suppress an increase in power consumption.
  • the master side interface control unit 231 switches the selector in the master side RF circuit 300. Further, the master side power supply control unit 232 cuts off the power supply of the master side RF circuit 300, and cuts off the power supply other than the positioning engine in the master side digital signal processing unit 400. As a result, the output of the IF signal from the power supply control unit 232 on the master side is stopped.
  • the slave side interface control unit 241 switches the selector in the slave side RF circuit 500, and the slave side power supply control unit 242 turns on the power of all the circuits of the slave side RF circuit 500. .. Therefore, even if the master side RF circuit 300 fails, the receiving device 200 can switch to the slave side RF circuit 500 and continue the positioning. As a result, the fault tolerance of the receiving device 200 is improved, and it becomes possible to operate in a harsher environment such as outer space. In other words, the performance of the receiving device 200 is improved. As described above, since the power supply of the slave side RF circuit 500 is cut off before switching to the slave side RF circuit 500, it is possible to suppress an increase in power consumption due to the redundancy of the RF circuit.
  • one antenna 201 is shared by the master and the slave, but the configuration is not limited to this.
  • the receiving device 200 may be provided with a plurality of antennas.
  • FIG. 8 is a diagram showing a configuration example of the receiving device 200 when a plurality of antennas are provided according to the first embodiment of the present technology.
  • an antenna 202 and a surface acoustic wave filter 211 are further added.
  • the RF signal from the antenna 201 is input only to the GNSS chip 230 on the master side via the elastic surface wave filter 210.
  • the RF signal from the antenna 202 is input only to the GNSS chip 240 on the slave side via the elastic surface wave filter 211.
  • an independent antenna may be provided for each frequency band.
  • Each frequency band can be cut out with a SAW filter to improve interference resistance.
  • the demultiplexing loss of the antenna signal can be eliminated.
  • FIG. 9 is a flowchart showing an example of the operation of the receiving device 200 according to the first embodiment of the present technology. This operation is started, for example, when a predetermined application using the position information is executed in the receiving device 200.
  • the receiving device 200 determines whether or not the current time is the positioning time to be positioned (step S901). If the current time is not the positioning time (step S9011: No), the receiving device 200 repeats step S901.
  • the receiving device 200 captures the GPS satellites (step S902) and tracks them (step S903). Further, the receiving device 200 performs a positioning calculation using satellite observation values and acquires position information and speed information (step S904).
  • the receiving device 200 determines whether or not the master-side RF circuit 300 has failed (step S905).
  • the master side RF circuit 300 fails (step S905: Yes)
  • the receiving device 200 switches the operating RF circuit from the master side RF circuit 300 to the slave side RF circuit 500 (step S906). If the master-side RF circuit 300 has not failed (step S905: No), or after step S906, the receiving device 200 repeatedly executes step S901 and subsequent steps.
  • the master side RF circuit 300 outputs the IF signal to the master side and the slave side, and after switching to the slave, the master side power supply control unit 232 uses the master side RF circuit. Block 300. Further, before switching to the slave, the slave side power supply management unit 242 cuts off the power supply of the slave side RF circuit 500. By shutting off the power supply of these RF circuits, it is possible to suppress an increase in power consumption when the RF circuits are made redundant to improve performance (fault tolerance, etc.).
  • the receiving device 200 performs positioning using signals in the L1 band and the L5 band, but the number of satellites and the positioning accuracy may be insufficient only in these two frequency bands. be.
  • the receiving device 200 of the modification of the first embodiment is different from the first embodiment in that positioning is further performed by using the L2 signal.
  • the L2 signal is a signal transmitted by the satellite after modulating the carrier wave in the L2 band.
  • This L2 band is a frequency band having a predetermined bandwidth ( ⁇ 12.0 MHz, etc.) having a center frequency of 1227.60 MHz (MHz).
  • FIG. 10 is a block diagram showing a configuration example of the slave side RF circuit 500 in the modified example of the first embodiment of the present technology.
  • the slave-side RF circuit 500 of the modification of the first embodiment is different from the first embodiment in that the local phase-locked loop 526 is provided instead of the local phase-locked loop 522.
  • Local phase synchronization circuit 526 is for generating a local signal LO L2 of the local frequency corresponding to the L2 band in GPS, one of the local signal LO L5 of the local frequency corresponding to the L5 band from the clock signal CLK TCXO.
  • the local phase-locked loop 526 supplies one of the local signals LO L2 and LO L5 to the mixer 523.
  • the ADC 552 of the modified example of the first embodiment outputs one of the digital IF signals DIF L2 and DIF L5 to the slave side digital signal processing unit 600.
  • the slave side power supply control unit 242 of the modified example of the first embodiment shuts off the power supply of the circuits other than the phase-locked loop 530, the switching unit 540, the ADC 551 and the ADC 552 in the initial state. do.
  • FIG. 11 is a block diagram showing a configuration example of the slave-side digital signal processing unit 600 in the modified example of the first embodiment of the present technology.
  • the slave-side digital signal processing unit 600 of the modification of the first embodiment is different from the first embodiment in that it further includes an L2 digital front end 660 and a predetermined number of L2 satellite processing units 670.
  • the L2 digital front end 660 converts the IF signal DIF L2 into a baseband signal corresponding to the L2 band.
  • the L2 digital front end 660 supplies the baseband signal to each of the L2 satellite processing units 670.
  • the L2 satellite processing unit 670 captures and tracks the assigned satellite based on the baseband signal corresponding to the L2 band, and decodes the L2 signal from that satellite.
  • the L2 satellite processing unit 670 outputs satellite observation values (navigation data, etc.) obtained for decoding to the master via the serial interface 243.
  • the three satellite processing units on the slave side can decode at least one or more of the L1 signal, the L2 signal, and the L5 signal.
  • the slave side power supply control unit 242 of the modified example of the first embodiment cuts off the power supply between the L2 digital front end 660 and the L2 satellite processing unit 670. It is also possible to provide a clock control unit instead of the slave side power supply control unit 242 to stop the clocks of the L2 digital front end 660 and the L2 satellite processing unit 670 instead of shutting off the power supply.
  • the positioning engine 450 on the master side of the modified example of the first embodiment performs positioning in the initial state based on, for example, satellite observation values of the L1 band and the L5 band.
  • FIG. 12 is a diagram showing an example of the state of the slave-side RF circuit 500 when receiving the L2 band in the modified example of the first embodiment of the present technology.
  • the receiving device 200 receives two wavelengths in GPS or QZSS, the number of observable satellites may be larger in the combination of the L1 signal and the L2 signal than in the L1 signal and the L5 signal. Therefore, when the number of observable satellites is less than a predetermined value, the receiving device 200 switches the combination of the received signals from the L1 signal and the L5 signal to the L1 signal and the L2 signal. Further, the performance can be further improved by using the three frequency bands of the L1 signal, the L2 signal, and the L5 signal.
  • the receiving device 200 switches from the two wavelengths of the L1 signal, the L5 signal, the L1 signal, and the L2 signal to the three wavelengths of the L1 signal, the L2 signal, and the L5 signal. Can be done.
  • the slave side power supply control unit 242 When switching the received signal to the L1 signal and the L2 signal, as illustrated in the figure, the slave side power supply control unit 242 includes a low noise amplifier 521, a local phase-locked loop 526, a mixer 523, a low-pass filter 524, and automatic gain control. Turn on the power of the circuit 525.
  • the local phase synchronization circuit 526 under control of slave digital signal processor 600, and supplies to the mixer 523 the local signal LO L2.
  • the slave side power supply control unit 242 turns on the power of the L2 digital front end 660 and the L2 satellite processing unit 670, and shuts off the power of the L5 digital front end 630 and the L5 satellite processing unit 640. do. It is also possible to provide a clock control unit instead of the slave side power supply control unit 242 to stop the clocks of the L5 digital front end 630 and the L5 satellite processing unit 640 instead of shutting off the power supply.
  • the positioning engine 450 on the master side performs positioning based on the satellite observation values of the L1 band and the L2 band.
  • the master side power supply control unit 232 When switching the received signal to the L1 signal, the L2 signal, and the L5 signal, the master side power supply control unit 232 turns on the power of all the circuits in the GNSS chip 230, and the slave side power supply control unit 242 turns on the GNSS chip 240. Turn on the power of all the circuits in. Then, the positioning engine 450 on the master side performs positioning based on the satellite observation values of the L1 band, the L2 band, and the L5 band.
  • the positioning engine can be realized by software processing by the CPU (Central Processing Unit).
  • positioning processing such as the L1 band, the L2 band, and the L5 band may be implemented as a function, and necessary functions may be used in combination according to the satellite observation conditions.
  • the implementation of the frequency band switching function can also be supported by function expansion by updating the firmware.
  • the receiving device 200 can also receive the L1 signal and the L2 signal in the initial state, and then switch to the combination of the L1 signal and the L5 signal, the L1 signal, the L2 signal, and the L5 signal.
  • the slave can decode the L1 signal, the L2 signal, and the L5 signal to correspond to the three wavelengths of the L1 band, the L2 band, and the L5 band. As a result, it is possible to improve the performance such as the number of observable satellites as compared with the case where only two wavelengths of the L1 band and the L5 band are supported.
  • the receiving device 200 switches to the slave side RF circuit 500 when the master side RF circuit 300 fails, as in the first embodiment. ..
  • the receiving device 200 of the modified example of the first embodiment receives two wavelengths or three wavelengths, it is also possible to receive only one wavelength (L1 band or the like) among them. In this case, the power of the digital front end and the satellite processing unit corresponding to the signal not received is cut off.
  • the slave since the slave decodes at least one of the L1 signal, the L2 signal, and the L5 signal, only the L1 band and the L5 band are supported. Performance can be improved in comparison with.
  • Second Embodiment> In the first embodiment described above, the master transmits an analog IF signal to the slave and AD conversion of the IF signal is performed on the slave side, but in this configuration, the power supply of the ADC on the slave side is cut off. Can't.
  • the receiving device 200 of the second embodiment is different from the first embodiment in that the master outputs a digital IF signal to the slave.
  • FIG. 14 is a block diagram showing a configuration example of GNSS chips 230 and 240 according to the second embodiment of the present technology.
  • the GNSS chip 230 on the master side of the second embodiment is different from the first embodiment in that it further includes a switching unit 250.
  • the master side RF circuit 300 outputs a digital IF signal DIF to the switching unit 250 and the GNSS chip 240 (slave).
  • the slave-side GNSS chip 240 of the second embodiment is different from the first embodiment in that it further includes a switching unit 260.
  • the master side RF circuit 300 outputs a digital IF signal DIF to the switching unit 260.
  • FIG. 15 is a block diagram showing a configuration example of the master side RF circuit 300 and the switching unit 250 in the second embodiment of the present technology.
  • the master side RF circuit 300 of the second embodiment is not provided with the switching unit 340.
  • the automatic gain control circuit 315 supplies an analog IF signal to the ADC 351 and the automatic gain control circuit 325 supplies an analog IF signal to the ADC 352.
  • selectors 251 and 252 are arranged in the switching unit 250.
  • the ADC 351 outputs a digital IF signal DIF L1 to the selector 251 and the GNSS chip 240.
  • the ADC 352 outputs a digital IF signal DIF L5 to the selector 252 and the GNSS chip 240.
  • the selector 251 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 351 and the output terminal is connected to the master side digital signal processing unit 400. Further, the selector 251 switches the input destination according to the control of the master side interface control unit 231.
  • the selector 252 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 352, and the output terminal is connected to the master side digital signal processing unit 400. Further, the selector 252 switches the input destination according to the control of the interface control unit 231 on the master side.
  • K selectors 251 are arranged in the switching unit 250. Similarly, the same number of selectors 252 as the number of bits of the IF signal DIF L5 are provided. In the figure, only the selectors 251 and 252 for one bit are described, and the rest are omitted.
  • a parallel serial converter that performs parallel serial conversion can also be inserted between the ADCs 351 and 352 and the switching unit 250. As a result, only one selector 251 and one selector 252 are required, and the number of terminals for outputting an IF signal can be reduced. However, it is necessary to raise the operating clock compared to the case where parallel serial conversion is not performed.
  • a parallel serial converter can be inserted on the slave side as well.
  • the master can also output the digital signal after downsampling or interference removal at the digital front end in the master side digital signal processing unit 400 to the slave.
  • the number of bits of the digital signals (DIF L1 and DIF L5 ) output by the ADCs 351 and 352 is increased in order to have a dynamic range margin (so-called backoff) for interference.
  • the number of bits can be reduced.
  • the band can be suppressed, so that parallel serial conversion becomes easy.
  • the degree of freedom for wiring is improved.
  • FIG. 16 is a block diagram showing a configuration example of the slave-side RF circuit 500 and the switching unit 260 according to the second embodiment of the present technology.
  • the slave side RF circuit 500 of the second embodiment is not provided with the switching unit 540.
  • the automatic gain control circuit 515 supplies an analog IF signal to the ADC 551, and the automatic gain control circuit 525 supplies an analog IF signal to the ADC 552.
  • selectors 261 and 262 are arranged in the switching unit 260.
  • the ADC 551 outputs a digital IF signal DIF L1 to the selector 261.
  • the ADC 552 outputs a digital IF signal DIF L5 to the selector 262.
  • the selector 261 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 551, and the other is input with the IF signal DIF L1 from the master. The output terminal is connected to the slave side digital signal processing unit 600. Further, the selector 261 switches the input destination according to the control of the slave side interface control unit 241.
  • the selector 262 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 552, and the other receives the IF signal DIF L5 from the master. The output terminal is connected to the slave side digital signal processing unit 600. Further, the selector 262 switches the input destination according to the control of the slave side interface control unit 241.
  • the slave side power supply control unit 242 cuts off the power supply of circuits other than the phase-locked loop 530, including ADC 551 and 552, in the initial state. Further, when a predetermined condition is satisfied (such as when the master side RF circuit 300 fails), the slave side power supply control unit 242 turns on the power of all the circuits in the slave side RF circuit 500.
  • the master outputs a digital IF signal to the slave, so that the slave does not need to perform AD conversion of the IF signal.
  • the slave-side power supply control unit 242 can further cut off the power supplies of the ADCs 551 and 552, and further reduce the power consumption.
  • the GNSS chip 230 on the master side outputs a digital IF signal to the slave, the power supplies of the ADCs 551 and 552 on the slave side can be cut off. .. As a result, the power consumption of the receiving device 200 can be reduced.
  • the master and the slave each generate the clock signals CLK ADC and CLK DSP , but in this configuration, the power supply of the phase-locked loop on the slave side cannot be cut off.
  • the receiving device 200 of the third embodiment is different from the first embodiment in that the master further outputs the clock signals CLK ADC and CLK DSP to the slave.
  • FIG. 17 is a block diagram showing a configuration example of GNSS chips 230 and 240 according to the third embodiment of the present technology.
  • the GNSS chip 230 on the master side of the third embodiment is different from the first embodiment in that it further includes a selector 235.
  • the master-side RF circuit 300 of the third embodiment further outputs the clock signals CLK ADC and CLK DSP to the slave-side GNSS chip 240. Of these, the clock signal CLK DSP is also output to the selector 245.
  • the selector 235 has two input terminals and one output terminal. One of the two input terminals is connected to the master side RF circuit 300, and the output terminal is connected to the master side digital signal processing unit 400. Further, the selector 235 switches the input destination according to the control of the master side interface control unit 231.
  • the GNSS chip 240 on the third slave side is different from the first embodiment in that it further includes a selector 245.
  • the selector 245 has two input terminals and one output terminal. One of the two input terminals is connected to the slave side RF circuit 500, and the clock signal CLK DSP from the master is input to the other. The output terminal is connected to the slave side digital signal processing unit 600. Further, the selector 245 switches the input destination according to the control of the slave side interface control unit 241.
  • FIG. 18 is a block diagram showing a configuration example of the master-side RF circuit 300 according to the third embodiment of the present technology.
  • the master-side RF circuit 300 of the third embodiment is different from the first embodiment in that it further includes a selector 360.
  • the phase-locked loop 330 of the third embodiment outputs the clock signal CLK DSP to the selector 235, and outputs the clock signal CLK ADC to the selector 360 and the GNSS chip 240 on the slave side.
  • the selector 360 has two input terminals and one output terminal.
  • the clock signal CLK ADC from the phase-locked loop 330 is input to one of the two input terminals.
  • the output terminals are connected to ADCs 351 and 352. Further, the selector 360 switches the input destination according to the control of the master side interface control unit 231.
  • FIG. 19 is a block diagram showing a configuration example of the slave-side RF circuit 500 according to the third embodiment of the present technology.
  • the slave-side RF circuit 500 of the third embodiment is different from the first embodiment in that it further includes a selector 560.
  • the phase-locked loop 530 of the third embodiment outputs the clock signal CLK DSP to the selector 245 and outputs the clock signal CLK ADC to the selector 560.
  • the selector 560 has two input terminals and one output terminal.
  • the one of the two input terminals is a clock signal CLK ADC is input from the phase synchronization circuit 530, the other clock signal CLK ADC from GNSS chip 230 on the master side is input.
  • the output terminals are connected to ADCs 551 and 552. Further, the selector 560 switches the input destination according to the control of the slave side interface control unit 241.
  • the slave side power supply control unit 242 cuts off the power supply of circuits other than the switching unit 540, ADC 551 and 552, including the phase-locked loop 530, in the initial state. Further, when a predetermined condition is satisfied (such as when the master side RF circuit 300 fails), the slave side power supply control unit 242 turns on the power of all the circuits in the slave side RF circuit 500.
  • the phase-locked loop 530 on the slave side does not need to generate those clocks.
  • the slave-side power supply control unit 242 can further cut off the power supply of the phase-locked loop 530 and further reduce the power consumption.
  • the GNSS chip 230 on the master side further outputs the clock signals CLK ADC and CLK DSP to the slave, so that the power supply of the phase synchronization circuit 530 on the slave side is supplied. It can be blocked. As a result, the power consumption of the receiving device 200 can be reduced.
  • the master-side RF circuit 300 AD-converts only the master-side IF signal, but in this configuration, the slave-side IF signal is mastered when switching from the master to the slave. Cannot be used on the side.
  • the slave also outputs an IF signal to the master, and the master-side RF circuit 300 AD-converts the slave-side or master-side IF signal. Is different.
  • FIG. 20 is a block diagram showing a configuration example of GNSS chips 230 and 240 according to the fourth embodiment of the present technology.
  • the GNSS chip 240 of the fourth embodiment is different from the first embodiment in that it further includes a serial interface 244. Further, the GNSS chip 230 on the master side of the fourth embodiment outputs satellite observation values to the slave when a predetermined condition (master failure or the like) is satisfied.
  • FIG. 21 is a block diagram showing a configuration example of the master-side RF circuit 300 according to the fourth embodiment of the present technology.
  • the analog IF signals AIF L1 and AIF L5 from the GNSS chip 240 on the slave side are further input to the fourth master side RF circuit 300.
  • IF signal AIF L1 on the slave side is input to one of the two input terminals of the selector 341 of the fourth embodiment, and the other is the automatic gain control circuit 315 as in the first embodiment.
  • IF signal AIF L1 from is input.
  • the IF signal AIF L5 on the slave side is input to one of the two input terminals of the selector 342 of the fourth embodiment, and the other is from the automatic gain control circuit 325 as in the first embodiment.
  • the IF signal AIF L5 is input.
  • FIG. 22 is a block diagram showing a configuration example of the slave-side RF circuit 500 according to the fourth embodiment of the present technology.
  • the automatic gain control circuits 515 and 525 output the IF signals AIF L1 and AIF L5 to both the switching unit 540 and the GNSS chip 230 on the master side. It differs from the first embodiment in that it is different from the first embodiment.
  • FIG. 23 is a block diagram showing a configuration example of the slave-side digital signal processing unit 600 according to the fourth embodiment of the present technology.
  • the slave-side digital signal processing unit 600 of the fourth embodiment is different from the first embodiment in that it further includes a positioning engine 650.
  • the function of the positioning engine 650 is the same as that of the positioning engine 450 on the master side. However, the slave-side power supply control unit 242 cuts off the power supply of the positioning engine 650 in the initial state, for example. Then, when a predetermined condition such as a failure of the master is satisfied, the slave side power supply control unit 242 turns on the power of the positioning engine 650. At this time, the power supply of the positioning engine 450 on the master side is cut off, and the satellite observation value is transmitted from the satellite processing unit on the master side to the slave side. The positioning engine 650 on the slave side performs positioning using satellite observation values of the master and the slave, and outputs position information and the like to the outside via the serial interface 244.
  • the slave side IF signal can also be used on the master side when switching from the master to the slave.
  • the number of observable satellites can be maintained at the same level as before the switching, and performance deterioration can be suppressed.
  • positioning can be continued using the positioning engine on the slave side. This makes it possible to realize flexible and robust failure avoidance.
  • the slave when the slave outputs the IF signal to the master side RF circuit 300 and switches from the master to the slave, the IF signal on the slave side is output to the master side. But it can also be used. As a result, the number of observable satellites can be maintained, and deterioration of performance when switching can be suppressed.
  • the receiving device 200 has received the L1 signal and the L5 signal, but in this configuration, the L2 signal and the L6 signal cannot be used.
  • the receiving device 200 in the fifth embodiment is different from the first embodiment in that it also corresponds to the L2 signal and the L6 signal.
  • the L6 signal is a signal transmitted by the satellite after modulating the carrier wave in the L6 band.
  • This L6 band is a frequency band having a predetermined bandwidth with a center frequency of 1278.75 MHz (MHz).
  • FIG. 24 is a block diagram showing a configuration example of GNSS chips 230 and 240 according to the fifth embodiment of the present technology.
  • the GNSS chip 240 of the fifth embodiment is different from the first embodiment in that the slave side RF circuit 500 is not provided and the ADC 552 is arranged instead.
  • the master-side RF circuit 300 of the fifth embodiment receives the L1 signal and any one of the L2 signal, the L5 signal, and the L6 signal. Further, the master side RF circuit 300 converts the RF signal into an analog IF signal AIF using a local signal corresponding to either the L2 signal or the L6 signal, and outputs the RF signal to the slave side ADC 552. Further, the master side RF circuit 300 converts the RF signal into a digital IF signal using the local signal corresponding to the L1 signal and the L5 signal, and outputs the RF signal to the master side digital signal processing unit 400. Further, the master side RF circuit 300 outputs the clock signal CLK ADC to the ADC 552.
  • the ADC 552 AD-converts the IF signal from the master side and outputs it to the slave side digital signal processing unit 600.
  • the slave side when the slave side does not have an RF circuit, the slave itself can be realized by FPGA or DSP. As a result, it is possible to reduce the development cost when adding slaves to expand the functions.
  • FIG. 25 is a block diagram showing a configuration example of the master-side RF circuit 300 according to the fifth embodiment of the present technology.
  • the master-side RF circuit 300 of the fifth embodiment is different from the first embodiment in that the local phase-locked loop 326 is provided instead of the local phase-locked loop 322.
  • the local phase-locked loop 326 generates one of the local signals LO L2 , LO L5, and LO L6 from the clock signal CLK TCXO under the control of the master side digital signal processing unit 400.
  • LO L6 is a local signal having a local frequency corresponding to the L6 band.
  • the local phase-locked loop 326 supplies the generated local signal to the mixer 323.
  • phase-locked loop 330 of the fifth embodiment outputs the clock signal CLK ADC to the ADCs 351 and 352 and the GNSS chip 240.
  • the automatic gain control circuit 325 of the fifth embodiment outputs an analog IF signal to the ADC 352 and the GNSS chip 240.
  • the IF signals AIF L2 and AIF L6 corresponding to the local signals LO L2 and L OL6 are used in the GNSS chip 240 on the slave side.
  • the IF signal AIF L5 corresponding to the local signal LO L5 is AD-converted by the ADC 352 on the master side.
  • the automatic gain control circuit 325 controls the gain for the IF signal according to the control signal CTRL AGC from the master side digital signal processing unit 400.
  • FIG. 26 is a block diagram showing a configuration example of the master-side digital signal processing unit 400 according to the fifth embodiment of the present technology.
  • the master-side digital signal processing unit 400 of the fifth embodiment is different from the first embodiment in that it further includes a selector 451.
  • the L5 digital front end 430 of the fifth embodiment generates a master side control signal CTRL AGCm for controlling the automatic gain control circuit 325 based on the baseband signal. Specifically, the L5 digital front end 430 calculates the average amplitude or average power of the IF signal AIF L5. Then, when the calculated value exceeds a certain value, the L5 digital front end 430 generates a master side control signal CTRL AGCm for lowering the gain by a predetermined value. On the other hand, when the calculated value falls below a certain value, the L5 digital front end 430 generates a master side control signal CTRL AGCm for increasing the gain by a predetermined value and outputs it to the selector 451.
  • the selector 451 includes two input terminals and one output terminal.
  • the master side control signal CTRL AGCm is input to one of the two input terminals, and the slave side control signal CTRL AGCs from the serial interface 234 is input to the other. Further, the control signal CTRL AGC is output from the output terminal to the master side RF circuit 300.
  • the selector 451 switches the input destination according to the control of the master side interface control unit 231.
  • FIG. 27 is a block diagram showing a configuration example of the slave-side digital signal processing unit 600 according to the fifth embodiment of the present technology.
  • the slave-side digital signal processing unit 600 of the fifth embodiment includes an L2 / L6 digital front end 680 and a predetermined number of L2 / L6 satellite processing units 690.
  • the L2 / L6 digital front end 680 converts the IF signal DIF L2 or DIF L6 from the ADC 552 into a baseband signal and supplies it to each of the L2 / L6 satellite processing units. Further, the L2 / L6 digital front end 680 generates slave side control signals CTRL AGCs by the same method as the master side, and outputs them to the master via the serial interface 243.
  • the L2 / L6 satellite processing unit 690 includes a satellite acquisition unit 691 and a satellite tracking unit 692.
  • the L2 / L6 satellite processing unit 690 decodes one of the L2 signal and the L6 signal, and supplies satellite observation values to the GNSS chip 230 on the master side via the serial interface 243.
  • the receiving device 200 receives any combination of the L1 signal and the L2 signal, the L1 signal and the L5 signal, and the L1 signal and the L6 signal, and uses them for positioning. can do. As a result, it is possible to flexibly correspond to the standard using the added L2 band and L6 band while corresponding to the L1 band and the L5 band. Further, the receiving device 200 can optimize the dynamic range of the IF signal in a new frequency band (L2 band, L6 band, etc.).
  • the frequency band that can be generated by the local phase-locked loop 326 of the master side RF circuit 300 is an arbitrary frequency including the L5 band, and the slave side digital signal processing unit 600 will be introduced in the future as a new GNSS. If it corresponds to the standard, it can flexibly correspond to the new standard in any frequency band.
  • the selector 451 selects the slave side control signals CTRL AGCs and supplies them to the automatic gain control circuit 325.
  • the master-side RF circuit 300 generates local signals LO L1 and LO L2, and generates a digital IF signal DIF L1 and an analog IF signal AIF L2 .
  • the master side power supply control unit 232 shuts off the power supply of the L5 digital front end 430 and the L5 satellite processing unit 440 in the master side digital signal processing unit 400, and turns on the power other than those.
  • the slave-side power supply control unit 242 turns on the power of the slave-side digital signal processing unit 600.
  • the selector 451 selects the master side control signal CTRL AGCm and supplies it to the automatic gain control circuit 325.
  • the master-side RF circuit 300 generates the local signals LO L1 and LO L5, and generates the digital IF signals DIF L1 and DIF L5 .
  • the master side power supply control unit 232 turns on the power of the master side digital signal processing unit 400.
  • the slave-side power supply control unit 242 cuts off the power supply of the slave-side digital signal processing unit 600.
  • the selector 451 selects the slave side control signal CTRL AGCs and supplies the L1 signal to the automatic gain control circuit 325.
  • the master-side RF circuit 300 generates local signals LO L1 and LO L6, and generates a digital IF signal DIF L1 and an analog IF signal AIF L6 .
  • the master side power supply control unit 232 shuts off the power supply of the L5 digital front end 430 and the L5 satellite processing unit 440 in the master side digital signal processing unit 400, and turns on the power other than those.
  • the slave-side power supply control unit 242 turns on the power of the slave-side digital signal processing unit 600.
  • the receiving device 200 receives the L1 signal and the L5 signal, and when a predetermined condition is satisfied, switches to a combination of the L1 signal and the L2 signal, or the L1 signal and the L6 signal.
  • a predetermined condition for example, the case where the number of observable satellites is less than or equal to the predetermined value, or the case where the positioning accuracy is less than the target value is assumed.
  • the receiving device 200 decodes signals in two frequency bands such as an L1 signal and an L2 signal, it is also possible to decode only one of them (L1 signal or the like). In this case, the power of the digital front end and the satellite processing unit corresponding to the one that does not decode is cut off.
  • L2 corresponds to the L1 band and the L5 band. It can flexibly handle bands and L6 bands.
  • the receiving device 200 has been positioned using two frequency bands such as the L1 band and the L2 band, but the performance may be insufficient in this configuration.
  • the receiving device 200 of the sixth embodiment differs from the fifth embodiment in that it uses three frequency bands.
  • FIG. 28 is a block diagram showing a configuration example of the master-side RF circuit 300 according to the sixth embodiment of the present technology.
  • the master-side RF circuit 300 of the sixth embodiment further includes a low noise amplifier 371, a local phase-locked loop 372, a mixer 373, a low-pass filter 374, an automatic gain control circuit 375, and an ADC 353.
  • the master-side RF circuit 300 of the sixth embodiment instead of the local phase synchronizing circuit 326 includes a local phase synchronizing circuit 322 for generating a local signal LO L5.
  • the low noise amplifier 371 amplifies the RF signal RFIN.
  • the low noise amplifier 371 supplies the amplified RF signal RFIN to the mixer 373.
  • the local phase-locked loop 372 generates one of the local signals LO L2 and LO L6 from the clock signal CLK TCXO under the control of the master side digital signal processing unit 400.
  • the local phase-locked loop 372 supplies the generated local signal to the mixer 373.
  • the mixer 373 mixes the RF signal RFIN from the low noise amplifier 371 with a local signal (LO L2 or LO L6 ) to generate an analog IF signal AIF L2 or AIF L6 having a frequency lower than that of the RF signal.
  • the mixer 373 supplies the IF signal to the low-pass filter 374.
  • the low-pass filter 374 passes a frequency component below a predetermined cutoff frequency in the IF signal and supplies it to the automatic gain control circuit 375.
  • the automatic gain control circuit 375 controls the gain for the input IF signal (AIF L2 or AIF L6 ) according to the level of the signal.
  • the automatic gain control circuit 315 outputs a constant level IF signal to the GNSS chip 240 and the ADC 353.
  • the IF signal AIF L2 is used on the master side, and the IF signal AIF L6 is used on the slave side.
  • the automatic gain control circuit 375 controls the gain for the IF signal according to the control signal CTRL AGCs from the master side digital signal processing unit 400.
  • the ADC 353 AD-converts the IF signal and outputs it to the master side digital signal processing unit 400.
  • FIG. 29 is a block diagram showing a configuration example of the master-side digital signal processing unit 400 according to the sixth embodiment of the present technology.
  • the master-side digital signal processing unit 400 of the sixth embodiment is different from the fifth embodiment in that it further includes an L2 digital front end 460 and a predetermined number of L2 satellite processing units 470.
  • the L2 digital front end 460 converts the IF signal DIF L2 into a baseband signal corresponding to the L2 band.
  • the L2 digital front end 460 supplies a baseband signal to each of the L2 satellite processing units 470. Further, the L2 digital front end 460 generates a master side control signal CTRL AGCm based on the baseband signal and supplies it to the selector 451.
  • the L2 satellite processing unit 470 captures and tracks the assigned satellite based on the baseband signal corresponding to the L2 band, and decodes the L2 signal from that satellite.
  • the L2 satellite processing unit 470 outputs satellite observation values (navigation data, etc.) obtained for decoding to the positioning engine 450.
  • the positioning engine 450 of the sixth embodiment is positioned based on the satellite observation values from the L1 satellite processing unit 420, the L5 satellite processing unit 440 and the L2 satellite processing unit 470, and the satellite observation values of the L6 signal from the slave. Generate information etc.
  • FIG. 30 is a block diagram showing a configuration example of the slave-side digital signal processing unit 600 according to the sixth embodiment of the present technology.
  • the slave-side digital signal processing unit 600 of the sixth embodiment includes an L6 digital front end 681 and a predetermined number of L6 satellite processing units 695.
  • the L6 digital front end 681 converts the IF signal DIF L6 from the ADC 552 into a baseband signal and supplies it to each of the L6 satellite processing units 695. Further, the L6 digital front end 681 generates slave side control signals CTRL AGCs by the same method as the master side, and outputs them to the master via the serial interface 243.
  • the L6 satellite processing unit 695 includes a satellite acquisition unit 691 and a satellite tracking unit 692.
  • the L6 satellite processing unit 695 decodes the L2 signal and supplies satellite observation values to the GNSS chip 230 on the master side via the serial interface 243.
  • the slave-side digital signal processing unit 600 decodes the L6 signal
  • the present invention is not limited to this configuration, and signals other than the L1, L2, L5, and L6 signals can be decoded.
  • the receiving device 200 receives any combination of the L1 signal, the L5 signal, and the L2 signal and the L1 signal, the L5 signal, and the L6 signal, and performs positioning using them. be able to.
  • the selector 451 selects the master side control signal CTRL AGCm and supplies it to the automatic gain control circuit 375.
  • the master side power supply control unit 232 turns on the power of all the circuits in the master side digital signal processing unit 400.
  • the slave-side power supply control unit 242 cuts off the power supply of the slave-side digital signal processing unit 600.
  • the selector 451 selects the slave side control signal CTRL AGCs and supplies the L1 signal to the automatic gain control circuit 375.
  • the master side power supply control unit 232 shuts off the power supply of the L2 digital front end 460 and the L2 satellite processing unit 470 in the master side digital signal processing unit 400, and turns on the power other than those.
  • the slave-side power supply control unit 242 turns on the power of the slave-side digital signal processing unit 600.
  • Switching from the combination of the L1 signal, the L5 signal and the L2 signal to the combination of the L1 signal, the L5 signal and the L6 signal is executed when predetermined conditions regarding the number of satellites, positioning accuracy and the like are satisfied.
  • the receiving device 200 decodes signals in three frequency bands such as an L1 signal, an L5 signal, and an L2 signal, but two of them (L1 signal, L5 signal, etc.) and one of them. It is also possible to decode only (L1 signal, etc.). In this case, the power of the digital front end and the satellite processing unit corresponding to the undecoded signal is cut off.
  • the receiving device 200 uses signals in three frequency bands, signals in four or more frequency bands can also be used.
  • a circuit digital front end or satellite processing unit
  • corresponding to the master or slave may be added.
  • the receiving device 200 since the receiving device 200 performs positioning using signals in three frequency bands (L1 signal, L5 signal, L2 signal, etc.), only two frequency bands are used. Performance can be improved as compared with the case of using.
  • the positioning engine is arranged in the GNSS chip 230 in the receiving device 200, but it is difficult to reduce the circuit scale of the GNSS chip 230 in this configuration.
  • the receiving device 200 of the seventh embodiment is different from the first embodiment in that the positioning engine is arranged outside the GNSS chip 230.
  • FIG. 31 is a block diagram showing a configuration example of the receiving device 200 according to the seventh embodiment of the present technology.
  • the receiving device 200 of the seventh embodiment is different from the first embodiment in that the host CPU 270 is further provided.
  • the host CPU 270 has the same function as the positioning engine.
  • the host CPU 270 receives the clock signal CLK DSP and the satellite observation value on the master side from the GNSS chip 230, and receives the satellite observation value on the slave side from the GNSS chip 240.
  • the host CPU 270 generates a satellite control signal and a synchronization control signal for controlling the satellite processing unit and supplies them to the GNSS chips 230 and 240.
  • the host CPU 270 is an example of the positioning unit described in the claims.
  • FIG. 32 is a block diagram showing a configuration example of the master-side digital signal processing unit 400 according to the seventh embodiment of the present technology.
  • the master-side digital signal processing unit 400 of the seventh embodiment is different from the first embodiment in that the positioning engine 450 is not arranged.
  • the L1 satellite processing unit 420 and the L5 satellite processing unit 440 according to the seventh embodiment output satellite observation values to the host CPU 270.
  • the positioning engine outside the GNSS chip 230, the balance of cost, performance and electric power can be optimized for each application by the user or the customer.
  • circuit scale of the GNSS chip 230 can be reduced. Further, the circuits of the GNSS chips 230 and 240 can be made the same to facilitate the manufacture of those chips.
  • the host CPU 270 that performs positioning is arranged outside the GNSS chip 230, it is not necessary to arrange the positioning engine inside the GNSS chip 230. As a result, the circuit scale of the GNSS chip 230 can be reduced.
  • IoT Internet of things
  • IoT Internet of things
  • IoT devices 9100 which are “things”
  • IoT devices 9003 the Internet, cloud 9005, etc.
  • IoT can be used in various industries such as agriculture, home, automobile, manufacturing, distribution, and energy.
  • FIG. 33 is a diagram showing an example of a schematic configuration of an IoT system 9000 to which the technique according to the present disclosure can be applied.
  • the IoT device 9001 includes various sensors such as a temperature sensor, a humidity sensor, an illuminance sensor, an acceleration sensor, a distance sensor, an image sensor, a gas sensor, and a human sensor. Further, the IoT device 9001 may include terminals such as smartphones, mobile phones, wearable terminals, and game devices.
  • the IoT device 9001 is powered by an AC power supply, a DC power supply, a battery, a non-contact power supply, a so-called energy harvest, or the like.
  • the IoT device 9001 can communicate by wire, wireless, proximity wireless communication, or the like.
  • the IoT device 9001 may switch and communicate with a plurality of these communication means.
  • the IoT device 9001 may form a one-to-one, star-shaped, tree-shaped, or mesh-shaped network.
  • the IoT device 9001 may connect to the external cloud 9005 either directly or through the gateway 9002.
  • An address is assigned to the IoT device 9001 by IPv4, IPv6, 6LoWPAN, or the like.
  • the data collected from the IoT device 9001 is transmitted to other IoT devices 9003, the server 9004, the cloud 9005, and the like.
  • the timing and frequency of transmitting data from the IoT device 9001 are appropriately adjusted, and the data may be compressed and transmitted.
  • Such data may be used as it is, or the data may be analyzed by a computer 9008 by various means such as statistical analysis, machine learning, data mining, cluster analysis, discriminant analysis, combination analysis, and time series analysis.
  • various services such as control, warning, monitoring, visualization, automation, and optimization can be provided.
  • IoT devices 9001 at home include washing machines, dryers, dryers, microwave ovens, dishwashers, refrigerators, ovens, rice cookers, cookware, gas appliances, fire alarms, thermostats, air conditioners, televisions, recorders, audio, etc. Includes lighting equipment, water heaters, water heaters, vacuum cleaners, fans, air purifiers, security cameras, locks, door / shutter opening / closing devices, sprinklers, toilets, thermostats, weight scales, blood pressure monitors, etc. Further, the IoT device 9001 may include a solar cell, a fuel cell, a storage battery, a gas meter, a power meter, and a distribution board.
  • the communication method of the IoT device 9001 at home is preferably a low power consumption type communication method. Further, the IoT device 9001 may communicate by WiFi indoors and 3G / LTE outdoors.
  • An external server 9006 for controlling the IoT device may be installed on the cloud 9005 to control the IoT device 9001.
  • the IoT device 9001 transmits data such as the status of household equipment, temperature, humidity, power consumption, and the presence / absence of people / animals inside and outside the house.
  • the data transmitted from the home device is stored in the external server 9006 through the cloud 9005. Based on such data, new services will be provided.
  • Such an IoT device 9001 can be controlled by voice by using voice recognition technology.
  • various household devices can be visualized.
  • various sensors determine the presence or absence of a resident and send the data to an air conditioner, lighting, etc., so that the power can be turned on and off.
  • advertisements can be displayed on displays provided in various household devices via the Internet.
  • the above is an example of the IoT system 9000 to which the technology according to the present disclosure can be applied.
  • the technique according to the present disclosure can be suitably applied to the IoT device 9001 among the configurations described above.
  • the receiving device 200 of FIG. 3 can be applied to the IoT device 9001.
  • the technique according to the present disclosure it is possible to improve the performance of the IoT device while suppressing the power consumption, and improve the usefulness and convenience of the system.
  • the processing procedure described in the above-described embodiment may be regarded as a method having these series of procedures, or as a program for causing a computer to execute these series of procedures or as a recording medium for storing the program. You may catch it.
  • this recording medium for example, a CD (Compact Disc), MD (MiniDisc), DVD (Digital Versatile Disc), memory card, Blu-ray Disc (Blu-ray (registered trademark) Disc) and the like can be used.
  • the present technology can have the following configurations.
  • a master-side receiving circuit that converts a high frequency signal having a higher frequency than a predetermined intermediate frequency signal into the intermediate frequency signal and outputs the signal.
  • a master-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs it as a master-side observation value.
  • a slave-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs it as a slave-side observation value.
  • a master-side power supply control unit that shuts off the power supply of the master-side satellite processing unit when certain conditions are met.
  • a receiving device including a positioning unit that generates position information based on at least one of the master-side observation value and the slave-side observation value.
  • a slave-side receiving circuit that converts the high-frequency signal into the intermediate-frequency signal and outputs it to the slave-side satellite processing unit. Further, a slave-side power supply control unit that turns on the power to the slave-side receiving circuit when the predetermined condition is satisfied is provided. When the predetermined condition is satisfied, the master side power supply control unit controls the power supply of the master side receiving circuit to stop the output of the intermediate frequency signal.
  • the master-side receiving circuit outputs the intermediate frequency signal to the slave-side satellite processing unit via the slave-side receiving circuit.
  • the master-side receiving circuit outputs the digital intermediate frequency signal to the master-side satellite processing unit and the slave-side satellite processing unit.
  • the receiving device (4) The receiving device according to (2) above, wherein the master-side receiving circuit outputs an analog intermediate frequency signal to the slave-side receiving circuit. (5) The master-side receiving circuit further transmits a predetermined clock signal to the slave-side receiving circuit. 2. Receiver. (6) The receiving device according to any one of (2) to (5), wherein the slave-side receiving circuit further outputs the intermediate frequency signal to the master-side receiving circuit. (7) The master-side satellite processing unit and the slave-side satellite processing unit decode at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave, whichever is one of (2) to (6). The receiver described in.
  • the master-side satellite processing unit decodes at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave.
  • the receiving device according to any one of (2) to (6) above, wherein the slave-side satellite processing unit decodes at least one of an L1 signal, an L5 signal, and an L2 signal transmitted using the high frequency signal as a carrier wave. .. (9)
  • the master-side satellite processing unit decodes the master-side baseband signal corresponding to a predetermined frequency band, and decodes the master-side baseband signal.
  • a master-side digital front end that converts the intermediate frequency signal into the master-side baseband signal and generates a master-side control signal based on the intermediate-frequency signal.
  • a slave-side digital front end that converts the intermediate frequency signal into the slave-side baseband signal and generates a slave-side control signal based on the intermediate-frequency signal.
  • a selector for selecting either the master side control signal or the slave side control signal and outputting it as a control signal is provided.
  • the master side receiving circuit is A mixer that converts the high frequency signal into the intermediate frequency signal, and
  • the master-side satellite processing unit decodes at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave.
  • the master-side satellite processing unit decodes at least one of the L1 signal, the L2 signal, and the L5 signal transmitted using the high frequency signal as a carrier wave.
  • the receiving device according to (9) or (10) wherein the slave-side satellite processing unit decodes an L6 signal transmitted using the high frequency signal as a carrier wave.
  • the master-side receiving circuit, the master-side satellite processing unit, and the master-side power supply control unit are provided on a predetermined master-side chip.
  • the receiving device according to any one of (1) to (12), wherein the slave-side satellite processing unit unit is provided on a predetermined slave-side chip.
  • the receiving device according to (13), wherein the positioning unit is provided on the master-side chip.
  • the receiving device according to (13), wherein the positioning unit is provided outside the master-side chip and the slave-side chip.
  • a master-side satellite processing procedure in which the master-side satellite processing unit decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs it as a master-side observation value.
  • a slave-side digital signal processing procedure in which the slave-side satellite processing unit decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs it as a slave-side observation value.
  • the master side power supply control procedure for shutting off the power supply of the master side satellite processing unit when a predetermined condition is satisfied, and the master side power supply control procedure.
  • a method for controlling a receiving device comprising a positioning procedure for generating position information based on at least one of the master-side observation value and the slave-side observation value.

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)

Abstract

La présente invention supprime une augmentation de consommation d'énergie et améliore les performances d'un dispositif de réception permettant de recevoir des signaux en provenance de satellites.　Dans la présente invention, un circuit de réception côté maître convertit un signal haute fréquence présentant une fréquence supérieure à un signal de fréquence intermédiaire prescrit en un signal de fréquence intermédiaire et émet en sortie ce dernier. Une unité de traitement satellite côté maître décode un signal provenant d'un satellite prescrit en fonction du signal de fréquence intermédiaire et émet en sortie ce dernier en tant que valeurs d'observation côté maître. Une unité de traitement satellite côté esclave décode le signal provenant du satellite prescrit en fonction du signal de fréquence intermédiaire et émet en sortie ce dernier en tant que valeurs d'observation côté esclave. Une unité de commande d'alimentation électrique côté maître coupe la puissance soit au circuit de réception côté maître, soit à l'unité de traitement satellite côté maître si une condition prescrite est satisfaite. Une unité de positionnement génère des informations de position en fonction des valeurs d'observation côté maître et/ou des valeurs d'observation côté esclave.
PCT/JP2021/006572 2020-05-11 2021-02-22 Dispositif de réception et procédé de commande de dispositif de réception WO2021229886A1 (fr)

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WO2023145239A1 (fr) * 2022-01-25 2023-08-03 ソニーセミコンダクタソリューションズ株式会社 Récepteur de signal satellite et dispositif d'estimation de quantité de consommation associé
US12105210B2 (en) 2022-07-11 2024-10-01 Qualcomm Incorporated Accuracy-based GNSS band selection

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WO2023145239A1 (fr) * 2022-01-25 2023-08-03 ソニーセミコンダクタソリューションズ株式会社 Récepteur de signal satellite et dispositif d'estimation de quantité de consommation associé
US12105210B2 (en) 2022-07-11 2024-10-01 Qualcomm Incorporated Accuracy-based GNSS band selection

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