WO2021227220A1 - 通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法与氧化锌电阻片及其制备方法 - Google Patents

通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法与氧化锌电阻片及其制备方法 Download PDF

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WO2021227220A1
WO2021227220A1 PCT/CN2020/100067 CN2020100067W WO2021227220A1 WO 2021227220 A1 WO2021227220 A1 WO 2021227220A1 CN 2020100067 W CN2020100067 W CN 2020100067W WO 2021227220 A1 WO2021227220 A1 WO 2021227220A1
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temperature
zinc oxide
sintering
cooling rate
rate
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PCT/CN2020/100067
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English (en)
French (fr)
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陆佳政
谢鹏康
胡建平
方针
吴伟
蒋正龙
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湖南省湘电试研技术有限公司
国网湖南省电力有限公司防灾减灾中心
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Publication of WO2021227220A1 publication Critical patent/WO2021227220A1/zh

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Definitions

  • the invention relates to the technical field of disaster prevention and mitigation of electric power systems, in particular to a method for preparing a zinc oxide resistor sheet.
  • the zinc oxide arrester is installed in the transmission line to discharge the lightning current and limit the lightning overvoltage of the power system.
  • the zinc oxide varistor is the core unit of the zinc oxide arrester, and its flow capacity determines the lightning protection performance of the zinc oxide arrester.
  • an object of the present invention is to provide a method to enhance the zinc oxide varistor flow capacity through the crystal morphology about bismuth oxide, from the viewpoint of the crystal structure, the crystal morphology of Bi 2 O 3 Comprehensive control has effectively improved the ability of the zinc oxide resistors to withstand the impact of lightning.
  • the present invention provides a zinc oxide resistor chip.
  • the raw material includes or consists of the following mole percentage components: ZnO 91.4%-96.3%, Bi 2 O 3 0.7%-1.5%, Sb 2 O 3 0.8% to 1.5%, Co 2 O 3 0.5% to 1%, Cr 2 O 3 0% to 0.5%, MnO 2 0.5% to 0.7%, SiO 2 0.5% to 1.5%, Ni 2 O 3 0.4% to 0.6%, Al(NO 3 ) 3 0.05% to 0.08%, B 2 O 3 0.2% to 0.4%, Ga 2 O 3 0 to 0.825%.
  • the raw material includes or consists of the following mole percentage components:
  • the zinc oxide resistor chip includes a sintering step and a post-sintering heat treatment step during preparation;
  • the sintering step is performed by using a temperature drop curve such as:
  • the temperature is raised to 650°C at a temperature increase rate of 1°C/min, and after holding for 2 hours, the temperature is lowered to room temperature at a temperature drop rate of 1°C/min.
  • the ⁇ -Bi 2 O 3 form of crystal structure accounts for 80-90%, and the ⁇ -Bi 2 O 3 form of crystal structure accounts for 80 to 90% 7-15%.
  • the present invention provides a method for preparing a zinc oxide resistor chip, the preparation method including a sintering step and a heat treatment step after sintering;
  • the sintering step is performed by using a temperature drop curve such as:
  • the temperature is raised to 650°C at a temperature increase rate of 1°C/min, and after holding for 2 hours, the temperature is lowered to room temperature at a temperature drop rate of 1°C/min.
  • the raw material for preparing the zinc oxide resistor includes the following components in mole percentage, or consists of the following components in mole percentage: ZnO 91.4%-96.3%, Bi 2 O 3 0.7%-1.5%, Sb 2 O 3 0.8% ⁇ 1.5%, Co 2 O 3 0.5% ⁇ 1%, Cr 2 O 3 0% ⁇ 0.5%, MnO 2 0.5% ⁇ 0.7%, SiO 2 0.5% ⁇ 1.5%, Ni 2 O 3 0.4% ⁇ 0.6%, Al(NO 3 ) 3 0.05% to 0.08%, B 2 O 3 0.2% to 0.4%, Ga 2 O 3 0 to 0.825%.
  • the maximum sintering temperature is 1000-1250°C.
  • the preparation method includes the following steps:
  • step (1) the raw materials described in step (1) are mixed with water and ball milled to a slurry with a particle size of 2 ⁇ m or less, and then the slurry is dried and granulated to obtain granulated materials;
  • step (3) Tableting: compressing the granulated material obtained in step (2) into tablets to obtain a zinc oxide resistor chip prefabricated body;
  • Pre-sintering the prepared preform is further dried and pre-sintered, the pre-sintering temperature is 400-900°C, the holding time is 1-4h, and the heating rate is 2-5°C/min;
  • Heat treatment heat the sintered product, heat up from room temperature to 650°C at a temperature increase rate of 1°C/min, keep it for 2h, and then drop to room temperature at a temperature drop rate of 1°C/min to obtain a finished zinc oxide resistor piece.
  • the present invention requires step (4) to raise and lower the temperature at 1°C/min, and keep the temperature at the highest temperature of 650°C for 2 hours, which can reduce the proportion of ⁇ -Bi 2 O 3 in the Bi 2 O 3 crystal form and increase ⁇ - The ratio of Bi 2 O 3 and ⁇ -Bi 2 O 3.
  • the present invention provides a method for improving the current flow capacity of a zinc oxide varistor by adjusting the bismuth oxide crystal shape, by the following means:
  • the crystal morphology of bismuth oxide is controlled by the following methods:
  • the raw materials for preparing zinc oxide resistors include the following components in mole percentages: Cr 2 O 3 0.3% to 0.5%, Ni 2 O 3 0.4% to 0.6%;
  • the microstructure of zinc oxide mainly includes the crystal grains, the grain boundary layer and the spinel at the triangle position between the grains.
  • the nonlinear volt-ampere characteristics of zinc oxide resistors are mainly determined by the crystal structure of the grain boundary layer. It is known that the crystal structure of zinc oxide resistors is mainly composed of Bi 2 O 3 crystals.
  • the grain boundary layer includes three main parts ( Figure 1) : Among them, part A represents the region of the thick boundary layer, which contains insulators such as spinel, which has a high resistivity and does not have the Schottky barrier effect; part B represents the region of the effective grain boundary layer, and the nonlinearity of zinc oxide is mainly caused by Part B is composed; C represents the area where the crystal grains are directly connected, which does not have the Schottky barrier effect, and its resistivity is equal to the resistivity of the crystal grains.
  • Figure 1 three main parts
  • the grain boundary layer of zinc oxide resistors is mainly composed of Bi 2 O 3 crystals, mainly including ⁇ -Bi 2 O 3 , ⁇ -Bi 2 O 3 , ⁇ -Bi 2 O 3 , ⁇ -Bi 2 O 3 , and four phase structures .
  • ⁇ -Bi 2 O 3 is difficult to infiltrate the crystal grains, while ⁇ -Bi 2 O 3 can better infiltrate the crystal grains, increasing the proportion of the grain boundary of part B, increasing the uniformity of the crystal structure distribution, and improving the flow capacity; Under impact, ⁇ -Bi 2 O 3 has better stability.
  • FIG. 2 shows the schematic diagram of the conversion of different crystal structures in the zinc oxide resistor.
  • Zinc oxide resistors are divided into pre-sintering, sintering, and heat treatment processes.
  • Bi 2 O 3 first becomes a solution at the highest sintering temperature.
  • ⁇ -Bi 2 O 3 is generated at 900 ⁇ 1100°C.
  • 700 ⁇ 900°C will also produce ⁇ -Bi 2 O 3 .
  • ⁇ -Bi 2 O 3 and ⁇ -Bi 2 O 3 are produced at 600 ⁇ 700°C
  • ⁇ -Bi 2 O 3 is produced at 400 ⁇ 600°C.
  • the sintered resistive chip body requires heat treatment, and ⁇ -Bi 2 O 3 can be produced at 600-700°C during the heat treatment process.
  • the sintering cooling curve of zinc oxide resistors is the melting temperature of Bi 2 O 3 , and 0.5°C/min is used for cooling between the maximum sintering temperature and 850°C to ensure Bi 2 O 3 It exists in a molten liquid form to prevent the formation of ⁇ -Bi 2 O 3 solid crystals due to excessive cooling. It is known that pyrochlore is an insulator, which is not conducive to the improvement of the electrical performance of zinc oxide resistors. Therefore, the temperature is lowered at 2°C/min between 850 and 700°C. After 700°C, the temperature is lowered at 1°C/min.
  • the heat treatment curve of zinc oxide resistors, ⁇ -Bi 2 O 3 and ⁇ -Bi 2 O 3 will be transformed into ⁇ -Bi 2 O 3 during the heating process of 600 ⁇ 700°C. Therefore, according to the heat treatment process Heating and cooling is performed at 1°C/min, and the temperature is kept at the highest temperature of 650°C for 2 hours to reduce the ratio of ⁇ -Bi 2 O 3 and increase the ratio of ⁇ -Bi 2 O 3 and ⁇ -Bi 2 O 3 .
  • the raw materials or reagents involved in the present invention are all common commercially available products, and the operations involved are routine operations in the field unless otherwise specified.
  • the invention realizes the regulation and control of the bismuth oxide crystal form in the zinc oxide resistor by optimizing the zinc oxide resistor sheet material formula, the sintering cooling rate, the temperature of the heat treatment after sintering, and the temperature rise and fall rate, and reduces the ⁇ -in the bismuth oxide crystal.
  • the ratio of the two structures of Bi 2 O 3 and ⁇ -Bi 2 O 3 is increased, and the proportion of the two crystal structures of ⁇ -Bi 2 O 3 and ⁇ -Bi 2 O 3 in the bismuth oxide crystal is increased, thereby effectively improving the oxidation
  • the uniformity of the micro grain boundary structure of the zinc resistor reduces the gap of the grain boundary layer, makes the crystal structure distribution more uniform, and improves the current flow capacity of the resistor.
  • the zinc oxide resistor chip prepared by the method of the present invention is more stable under the impact of current than the traditional zinc oxide resistor chip.
  • Figure 1 is a schematic diagram of the microscopic crystal structure of zinc oxide; among them, A: thick grain boundary layer area, B: effective grain boundary layer area, and C: crystal grain directly connected area;
  • Figure 2 is a schematic diagram of the mutual transformation of Bi 2 O 3 crystal structures
  • Fig. 3 is a sintering temperature drop curve of the zinc oxide resistor prepared by the present invention.
  • Figure 4 is the heat treatment curve of the zinc oxide resistor prepared by the present invention.
  • Figure 5 is a comparison of the microstructure of the zinc oxide resistor chip prepared in Example 1 of the present invention and the zinc oxide resistor chip prepared in Comparative Example 1; among them, (a): the microscopic crystal structure of Comparative Example 1, (b): Example 1 Microscopic crystal structure.
  • Fig. 6 is an X-ray diffraction comparison diagram of the zinc oxide resistor chip prepared in Example 1 of the present invention and the zinc oxide resistor chip prepared in Comparative Example 1; wherein, (a): the microscopic crystal structure of Comparative Example 1, (b): implementation The microscopic crystal structure of Example 1.
  • This embodiment is used to illustrate the method for preparing the zinc oxide resistor chip of the present invention, which includes the following steps:
  • step (1) the raw materials described in step (1) are mixed with water and ball milled to a slurry with a particle size of 2 ⁇ m or less, and then the slurry is dried and granulated to obtain granulated materials;
  • step (3) Tableting: compressing the granulated material obtained in step (2) into tablets to obtain a zinc oxide resistor chip prefabricated body;
  • Pre-sintering the prepared preform is further dried and pre-sintered, the pre-sintering temperature is 400-900°C, the holding time is 1-4h, and the heating rate is 2-5°C/min;
  • Heat treatment heat the sintered product, heat up from room temperature to 650°C at a temperature increase rate of 1°C/min, keep it for 2h, and then drop to room temperature at a temperature drop rate of 1°C/min to obtain a finished zinc oxide resistor piece.
  • a method for preparing a zinc oxide resistor chip is specifically as follows:
  • step (1) the raw materials described in step (1) are mixed with water and ball milled to a slurry with a particle size of 2 ⁇ m or less, and then the slurry is dried and granulated to obtain granulated materials;
  • step (3) Tableting: compressing the granulated material obtained in step (2) into tablets to obtain a zinc oxide resistor chip prefabricated body;
  • Pre-sintering the prepared preform is further dried and pre-sintered, the pre-sintering temperature is 400-900°C, the holding time is 1-4h, and the heating rate is 2-5°C/min;
  • Heat treatment heat the sintered product, heat up from room temperature to 650°C at a temperature increase rate of 1°C/min, keep it for 2h, and then drop to room temperature at a temperature drop rate of 1°C/min to obtain a finished zinc oxide resistor piece.
  • Example 1 For the zinc oxide resistors prepared in Example 1 and Comparative Example 1, the observation and comparison of the microscopic crystal structure and the comparison of the overall performance were carried out.
  • Example 1 According to the electrical performance test, compared with the zinc oxide resistor of Comparative Example 1, the zinc oxide resistor prepared in Example 1 is more stable under the action of impulse current. The comparison of specific parameters is shown in Table 1.
  • Example 1 The difference between this comparative example and Example 1 is only: the raw material formula is different, specifically ZnO 93.8%, Bi 2 O 3 0.8%, Sb 2 O 3 1.0%, Co 2 O 3 0.8%, Cr 2 O 3 0.8%, MnO 2 0.6%, SiO 2 0.5%, Ni 2 O 3 0.6%, Al(NO 3 ) 3 0.08%, B 2 O 3 0.4%, Ga 2 O 3 0.62%.
  • Example 2 According to the electrical performance test, compared with the zinc oxide resistor of Comparative Example 2, the zinc oxide resistor prepared in Example 1 is more stable under the action of impulse current. The comparison of specific parameters is shown in Table 2.
  • Example 1 The difference between this comparative example and Example 1 is only: the sintering temperature drop curve is different, specifically: the temperature is increased to the maximum sintering temperature at a heating rate of 1.5°C/min, and the holding time is 360 minutes; The highest temperature drops to room temperature.
  • Example 3 According to the electrical performance test, compared with the zinc oxide resistor of Comparative Example 3, the zinc oxide resistor prepared in Example 1 is more stable under the action of impulse current. The comparison of specific parameters is shown in Table 3.
  • the sintered product is heat-treated, heated from room temperature to 400°C at a temperature increase rate of 1°C/min, kept for 2 hours, and then reduced to room temperature at a temperature drop rate of 1°C/min to obtain a finished zinc oxide resistor piece.
  • Example 4 According to the electrical performance test, compared with the zinc oxide resistor of Comparative Example 3, the zinc oxide resistor prepared in Example 1 is more stable under the action of impulse current. The comparison of specific parameters is shown in Table 4.
  • the difference between this embodiment and embodiment 1 is that the raw material formula is different, specifically: ZnO 94.44%, Bi 2 O 3 1.5%, Sb 2 O 3 0.8%, Co 2 O 3 0.8%, Cr 2 O 3 0.2%, MnO 2 0.7%, SiO 2 0.5%, Ni 2 O 3 0.6%, Al(NO 3 ) 3 0.06%, and B 2 O 3 0.4%.
  • the difference between this embodiment and embodiment 1 is that the raw material formula is different, specifically: ZnO 93.295%, Bi 2 O 3 0.7%, Sb 2 O 3 1.5%, Co 2 O 3 0.5%, Cr 2 O 3 0.5%, MnO 2 0.5%, SiO 2 1.5%, Ni 2 O 3 0.4%, Al(NO 3 ) 3 0.08%, B 2 O 3 0.2%, Ga 2 O 3 0.825%.
  • the invention discloses a method for improving the current flow capacity of a zinc oxide varistor by adjusting the bismuth oxide crystal form, a zinc oxide resistor chip and a preparation method thereof, and the zinc oxide resistor chip raw material formula, sintering cooling rate, and post-sintering heat treatment temperature and
  • the temperature rise and fall rate is optimized to realize the regulation of the bismuth oxide crystal morphology in the zinc oxide resistors, reduce the ratio of the two structures of ⁇ -Bi 2 O 3 and ⁇ -Bi 2 O 3 in the bismuth oxide crystal, and increase the oxidation
  • the proportion of the two crystal structures of ⁇ -Bi 2 O 3 and ⁇ -Bi 2 O 3 in the bismuth crystal effectively improves the uniformity of the micro grain boundary structure of the zinc oxide resistor, reduces the gap in the grain boundary layer, and makes the crystal structure distributed It is more uniform, thereby improving the current flow capacity of the resistor.
  • the zinc oxide resistor chip prepared by the method of the present invention is more stable under the impact of current than

Abstract

一种通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法与氧化锌电阻片及其制备方法,通过对氧化锌电阻片原料配方、烧结降温速率和烧结后热处理的温度及升降温速率进行优化,实现了对氧化锌电阻片中氧化铋晶体形态的调控,减少了氧化铋晶体中β-Bi 2O 3与δ-Bi 2O 3两种结构的比例,并增加了氧化铋晶体中α-Bi 2O 3以及γ-Bi 2O 3两种晶体结构的占比,从而有效提升了氧化锌电阻片微观晶界结构的均匀性,减少了晶界层空白,使晶体结构分布更加均匀,进而提升了电阻片通流能力。经电气性能测试,利用所述方法制备氧化锌电阻片,相对于传统氧化锌电阻片,在冲击电流作用下更加稳定。

Description

通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法与氧化锌电阻片及其制备方法
本公开要求于2020年05月09日提交中国专利局、申请号为2020103866069、发明名称为“通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法与氧化锌电阻片及其制备方法”的中国专利申请的优先权,其全部内容通过引用结合在本公开中。
技术领域
本发明涉及电力系统防灾减灾技术领域,具体涉及一种氧化锌电阻片的制备方法。
背景技术
经统计,电力系统中50%以上的跳闸事故是有雷击引发。随着国民经济的不断发展,人民对用电可靠性提出了更高的要求。氧化锌避雷器安装于输电线路中,主要起到泄放雷电流,限制电力系统雷电过电压的作用。氧化锌压敏电阻是氧化锌避雷器的核心单元,其通流能力决定了氧化锌避雷器防雷性能的好坏。
现有的氧化锌电阻片通流能力有限,在现场实际应用中,雷击导致电阻片损坏的事故经常发生。从微观角度上,氧化锌电阻片结构分为ZnO晶粒,晶界层以及尖晶石等物质组成,其中晶界层主要由Bi 2O 3组成,其晶体结构对电阻片电气性能有着决定性影响,为提升氧化锌避雷器以及电阻片的整体通流能力,有必要对氧化锌电阻片晶界层晶体结构进行综合调控。
发明内容
为了解决现有技术中存在的问题,本发明的目的是提供一种通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法,从晶体结构的角度,通过对Bi 2O 3晶体形态进行综合控制,有效提升了氧化锌电阻片耐受雷电冲击的能力。
为了实现本发明目的,本发明的技术方案如下:
第一方面,本发明提供一种氧化锌电阻片,原料包括如下摩尔百分比的组分、或由如下摩尔百分比的组分组成:ZnO 91.4%~96.3%、Bi 2O 3 0.7%~1.5%、Sb 2O 3 0.8%~1.5%、Co 2O 3 0.5%~1%、Cr 2O 3 0%~0.5%、MnO 2 0.5%~0.7%、SiO 2 0.5%~1.5%、Ni 2O 3 0.4%~0.6%、Al(NO 3) 3 0.05%~0.08%、B 2O 3 0.2%~0.4%、Ga 2O 3 0~0.825%。
作为优选,原料包括如下摩尔百分比的组分、或由如下摩尔百分比的组分组成:
ZnO 93.5%~95.4%、Bi 2O 3 1.2%~1.5%、Sb 2O 3 0.8%~1.0%、Co 2O 3 0.5%~0.8%、Cr 2O 3 0~0.2%、MnO 2 0.6%~0.7%、SiO 2 0.5~0.7%、Ni 2O 3 0.5%~0.6%、Al(NO 3) 3 0.06%~0.08%、B 2O 3 0.3%~0.4%、Ga 2O 3 0~0.62%。
进一步地,所述氧化锌电阻片在制备时包括烧结步骤和烧结后的热处理步骤;
其中,所述烧结步骤在达到最大烧结温度后的降温阶段采用如下降温曲线进行:
以0.5℃/min的降温速率将温度从最大烧结温度降至850℃,
以2℃/min的降温速率将温度从850℃降至700℃,
以1℃/min的降温速率将温度从700℃降至室温;
和/或,所述烧结后的热处理步骤以1℃/min的升温速率升温至650℃,保温2h后,再以1℃/min的降温速率降至室温。
更进一步地,本发明所述氧化锌电阻片中的Bi 2O 3晶体形态中α-Bi 2O 3形态的晶体结构占比80~90%,γ-Bi 2O 3形态的晶体结构占比7~15%。
第二方面,本发明提供一种氧化锌电阻片的制备方法,所述制备方法包括烧结步骤和烧结后的热处理步骤;
其中,所述烧结步骤在达到最大烧结温度后的降温阶段采用如下降温曲线进行:
以0.5℃/min的降温速率将温度从最大烧结温度降至850℃,
以2℃/min的降温速率将温度从850℃降至700℃,
以1℃/min的降温速率将温度从700℃降至室温;
和/或,所述烧结后的热处理步骤以1℃/min的升温速率升温至650℃,保温2h后,再以1℃/min的降温速率降至室温。
作为优选,制备所述氧化锌电阻片的原料包括如下摩尔百分比的组分、或由如下摩尔百分比的组分组成:ZnO 91.4%~96.3%、Bi 2O 3 0.7%~1.5%、Sb 2O 3 0.8%~1.5%、Co 2O 3 0.5%~1%、Cr 2O 3 0%~0.5%、MnO 2 0.5%~0.7%、SiO 2 0.5%~1.5%、Ni 2O 3 0.4%~0.6%、Al(NO 3) 3 0.05%~0.08%、B 2O 3 0.2%~0.4%、Ga 2O 3 0~0.825%。
作为优选,所述最大烧结温度为1000~1250℃。
更为具体地,所述制备方法包括如下步骤:
(1)配料:按摩尔百分比称取原料;
(2)湿磨造粒:将步骤(1)所述原料加水混料后球磨至粒径为2μm以下的浆料,然后将浆料进行干燥造粒,获得造粒料;
(3)压片:将步骤(2)所得造粒料压制成片,制得氧化锌电阻片预制胚体;
(4)预烧结:将制得的预制胚体进一步干燥并预烧结,预烧结温度为400~900℃,保温时间为1~4h,升温速度为2~5℃/min;
(5)烧结:对步骤(4)所得产物进行烧结,烧结曲线为:
以1-2℃/min的升温速率将温度升至最大烧结温度,保温360min;
以0.5℃/min的降温速率将温度从最大烧结温度降至850℃;
以2℃/min的降温速率将温度从850℃降至700℃;
以1℃/min的降温速率将温度从700℃降至室温;
(6)热处理:对烧结所得产物进行热处理,由室温以1℃/min的升温速率升温至650℃,保温2h,再以1℃/min的降温速率降至室温,得到氧化锌电阻片成品。
其中,本发明通过要求步骤(4)按1℃/min进行升温和降温,在最高温650℃上保温2h,可减少Bi 2O 3晶体形态中β-Bi 2O 3的比例,增加α-Bi 2O 3和γ-Bi 2O 3的比例。
第三方面,本发明提供一种通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法,通过以下手段进行:
(1)减少原料中Cr元素的用量,采用Ni元素代替;
(2)调整氧化锌电阻片的烧结降温速率;
(3)调整氧化锌电阻片的热处理烧结温度及升降温速率。
具体地说,通过以下手段调控氧化铋晶体形态:
(1)制备氧化锌电阻片的原料包括如下摩尔百分比的组分:Cr 2O 3 0.3%~0.5%、Ni 2O 3 0.4%~0.6%;
(2)在达到最大烧结温度后的降温阶段采用如下降温曲线进行:
以0.5℃/min的降温速率将温度从最大烧结温度降至850℃,
以2℃/min的降温速率将温度从850℃降至700℃,
以1℃/min的降温速率将温度从700℃降至室温;
(3)在烧结后进行热处理:以1℃/min的升温速率升温至650℃,保温2h后,再以1℃/min的降温速率降至室温。
更为具体地,本发明对上述方法的调控原理说明如下:
氧化锌微观结构主要包含晶粒,晶界层以及晶粒间三角位置处的尖晶石。氧化锌电阻片非线性伏安特性特性主要由晶界层的晶体结构决定,已知氧化锌电阻片晶体结构中主要由Bi 2O 3晶体组成,晶界层包括三个主要部分(图1):其中,A部分表示厚境界层区域,其中包含有尖晶石等绝缘物,电阻率很高,不具备肖特基势垒效应;B部分表示有效晶界层区域,氧化锌非线性主要由B部分构成;C表示晶粒直接相连区域,不具备肖特基势垒效应,其电阻率等于晶粒电阻率。晶体微观结构中,A部分所占比例越大,则电位梯度E 1mA越大,非线性系数α减小;B部分所占比例增加,则电位梯度E 1mA减小、非线性系数α增加;C部分比例增加,则电位梯度E 1mA、非线性系数α减小,泄露电流增加。为提升电位梯度与非线性系数,维持较小的泄露电流,同时增强冲击电流路径的均匀性,有必要减小A、C部分所占的比例,同时增加B部分所占的比例。
氧化锌电阻片晶界层主要由Bi 2O 3晶体组成,主要包含α-Bi 2O 3、β-Bi 2O 3、γ-Bi 2O 3、δ-Bi 2O 3、四种相位结构。δ-Bi 2O 3难以浸润晶粒,而α-Bi 2O 3可以更好的浸润晶粒,增加B部分晶界的比例,增加晶体结构分布的均匀性,提升通流能力;在大电流冲击作用下,γ-Bi 2O 3拥有更好的稳定性。为了提高氧化锌电阻片通流能力,需要尽可能减少β-Bi 2O 3与δ-Bi 2O 3两种结构的比例、增加α-Bi 2O 3以及γ-Bi 2O 3两种晶体结构的占比。
如图2所示的氧化锌电阻片中不同晶体结构转换示意图。氧化锌电阻片分为预烧、烧结、以及热处理过程。
氧化锌电阻片烧结过程中,Bi 2O 3首先在最高烧结温度下成为溶体,在烧结降温过程中,900~1100℃生成δ-Bi 2O 3,在有Cr 2O 3掺杂的条件下,700~900℃也会产生δ-Bi 2O 3。600~700℃生成γ-Bi 2O 3与β-Bi 2O 3,400~600℃生成α-Bi 2O 3。烧结完成的电阻片坯体,需要进行热处理,热处理过程中600~700℃可以产生γ-Bi 2O 3
为减少氧化锌电阻片中δ-Bi 2O 3晶体的生成,在氧化锌电阻片配方中,适当减少或取消Cr 2O 3,增加作用类似的Ni 2O 3元素作为弥补,可防止700~900℃降温过程中生成δ-Bi 2O 3
如图3所示的氧化锌电阻片烧结降温冷却曲线,850℃左右为Bi 2O 3的融解温度点,在最大烧结温度至850℃之间采用0.5℃/min进行降温,保证Bi 2O 3以融化的液态形式存在,防止降温过快导致δ-Bi 2O 3固体晶体生成。已知焦绿石属于绝缘体,不利于氧化锌电阻片电气性能提升,因此,在850~700℃之间按2℃/min进行降温。在700℃以后,按1℃/min降温。
如图4所示的氧化锌电阻片热处理曲线,在600~700℃升温过程中α-Bi 2O 3与β-Bi 2O 3会向γ-Bi 2O 3转化,因此,热处理过程中按1℃/min进行升温和降温,在最高温650℃上保温2h,减少β-Bi 2O 3比例,增加α-Bi 2O 3和γ-Bi 2O 3比例。
本发明涉及到的原料或试剂均为普通市售产品,涉及到的操作如无特殊说明均为本领域常规操作。
在符合本领域常识的基础上,上述各优选条件,可以相互组合,得到具体实施方式。
本发明的有益效果在于:
本发明通过对氧化锌电阻片原料配方、烧结降温速率和烧结后热处理的温度及升降温速率进行优化,实现了对氧化锌电阻片中氧化铋晶体形态的调控,减少了氧化铋晶体中β-Bi 2O 3与δ-Bi 2O 3两种结构的比例,并增加了氧化铋晶体中α-Bi 2O 3以及γ-Bi 2O 3两种晶体结构的占比,从而有效提升了氧化锌电阻片微观晶界结构的均匀性,减少了晶界层空白,使晶体结构分布更加均匀,进而提升了电阻片通流能力。经电 气性能测试,利用本发明所述方法制备氧化锌电阻片,相对于传统氧化锌电阻片,在冲击电流作用下更加稳定。
附图说明
图1为氧化锌微观晶体结构示意图;其中,A:厚晶界层区域,B:有效晶界层区域,C:晶粒直接相连区域;
图2为Bi 2O 3晶体结构相互转化示意图;
图3为本发明制备氧化锌电阻片的烧结降温曲线;
图4为本发明制备氧化锌电阻片的热处理曲线;
图5为本发明实施例1制备的氧化锌电阻片与对比例1制备的氧化锌电阻片的微观结构对比;其中,(a):对比例1的微观晶体结构,(b):实施例1的微观晶体结构。
图6为本发明实施例1制备的氧化锌电阻片与对比例1制备的氧化锌电阻片的X射线衍射对比图;其中,(a):对比例1的微观晶体结构,(b):实施例1的微观晶体结构。
具体实施方式
下面将结合实施例对本发明的优选实施方式进行详细说明。需要理解的是以下实施例的给出仅是为了起到说明的目的,并不是用于对本发明的范围进行限制。本领域的技术人员在不背离本发明的宗旨和精神的情况下,可以对本发明进行各种修改和替换。
下述实施例中所使用的实验方法如无特殊说明,均为常规方法。
下述实施例中所用的材料、试剂等,如无特殊说明,均可从商业途径得到。
实施例1
本实施例用于说明本发明所述氧化锌电阻片的制备方法,包括如下步骤:
(1)配料:按摩尔百分比称取原料:ZnO 94.2%、Bi 2O 3 1.2%、Sb 2O 3 1.0%、Co 2O 3 0.8%、MnO 2 0.6%、SiO 2 0.5%、Ni 2O 3 0.6%、Al(NO 3) 3 0.08%、B 2O 3 0.4%、Ga 2O 3 0.62%。
(2)湿磨造粒:将步骤(1)所述原料加水混料后球磨至粒径为2μm以下的浆料,然后将浆料进行干燥造粒,获得造粒料;
(3)压片:将步骤(2)所得造粒料压制成片,制得氧化锌电阻片预制胚体;
(4)预烧结:将制得的预制胚体进一步干燥并预烧结,预烧结温度为400~900℃,保温时间为1~4h,升温速度为2~5℃/min;
(5)烧结:对步骤(4)所得产物进行烧结,烧结曲线为:
以1.5℃/min的升温速率将温度升至最大烧结温度,保温360min;
以0.5℃/min的降温速率将温度从最大烧结温度降至850℃;
以2℃/min的降温速率将温度从850℃降至700℃;
以1℃/min的降温速率将温度从700℃降至室温;
(6)热处理:对烧结所得产物进行热处理,由室温以1℃/min的升温速率升温至650℃,保温2h,再以1℃/min的降温速率降至室温,得到氧化锌电阻片成品。
对比例1
一种氧化锌电阻片的制备方法,具体为:
(1)配料:按摩尔百分比称取原料:ZnO 93.8%、Bi 2O 3 0.8%、Sb 2O 3 1.0%、Co 2O 3 0.8%、Cr 2O 3 0.8%、MnO 2 0.6%、SiO 2 0.5%、Ni 2O 3 0.6%、Al(NO 3) 3 0.08%、B 2O 3 0.4%、Ga 2O 3 0.62%;
(2)湿磨造粒:将步骤(1)所述原料加水混料后球磨至粒径为2μm以下的浆料,然后将浆料进行干燥造粒,获得造粒料;
(3)压片:将步骤(2)所得造粒料压制成片,制得氧化锌电阻片预制胚体;
(4)预烧结:将制得的预制胚体进一步干燥并预烧结,预烧结温度为400~900℃,保温时间为1~4h,升温速度为2~5℃/min;
(5)烧结:对步骤(4)所得产物进行烧结,烧结曲线为:
以1.5℃/min的升温速率将温度升至最大烧结温度,保温360min;
以3℃/min的降温速率将温度从最高温降至室温;
(6)热处理:对烧结所得产物进行热处理,由室温以1℃/min的升温速率升温至650℃,保温2h,再以1℃/min的降温速率降至室温,得到氧化锌电阻片成品。
对比实验例1
针对实施例1和对比例1所制备的氧化锌电阻片进行微观晶体结构 的观察对比与综合性能的对比。
1、微观晶体结构
由扫描电镜结果可知(图5),相对于对比例1,实施例1制备的氧化锌电阻片的微观结构中,B部分晶界层所占比例大大增加,晶体大小分布更均匀。X射线衍射结果可知(图6),相对于对比例1,实施例1制备的氧化锌电阻片中,α-Bi 2O 3和γ-Bi 2O 3的比例增加,β-Bi 2O 3与δ-Bi 2O 3的比例减少。实施例1中的Bi 2O 3晶体形态中α-Bi 2O 3形态的晶体结构占比90%,γ-Bi 2O 3形态的晶体结构占比10%。
2、综合性能
经电气性能测试,相对于对比例1的氧化锌电阻片,实施例1所制备的氧化锌电阻片在冲击电流作用下更加稳定,具体参数对比详见表1。
表1电阻片的综合性能对比
Figure PCTCN2020100067-appb-000001
对比例2
本对比例与实施例1的区别仅在于:原料配方不同,具体为ZnO 93.8%、Bi 2O 3 0.8%、Sb 2O 3 1.0%、Co 2O 3 0.8%、Cr 2O 3 0.8%、MnO 2 0.6%、SiO 2 0.5%、Ni 2O 3 0.6%、Al(NO 3) 3 0.08%、B 2O 3 0.4%、Ga 2O 3 0.62%。
经电气性能测试,相对于对比例2的氧化锌电阻片,实施例1所制备的氧化锌电阻片在冲击电流作用下更加稳定,具体参数对比详见表2。
表2电阻片的综合性能对比
Figure PCTCN2020100067-appb-000002
Figure PCTCN2020100067-appb-000003
对比例3
本对比例与实施例1的区别仅在于:烧结降温曲线不同,具体为:以1.5℃/min的升温速率将温度升至最大烧结温度,保温360min;以3℃/min的降温速率将温度从最高温降至室温。
经电气性能测试,相对于对比例3的氧化锌电阻片,实施例1所制备的氧化锌电阻片在冲击电流作用下更加稳定,具体参数对比详见表3。
表3电阻片的综合性能对比
Figure PCTCN2020100067-appb-000004
对比例4
本对比例与实施例1的区别仅在于:热处理条件不同,具体为:
对烧结所得产物进行热处理,由室温以1℃/min的升温速率升温至400℃,保温2h,再以1℃/min的降温速率降至室温,得到氧化锌电阻片成品。
经电气性能测试,相对于对比例3的氧化锌电阻片,实施例1所制备的氧化锌电阻片在冲击电流作用下更加稳定,具体参数对比详见表4。
表4电阻片的综合性能对比
Figure PCTCN2020100067-appb-000005
实施例2
本实施例与实施例1的区别在于:原料配方不同,具体为:ZnO 94.44%、Bi 2O 3 1.5%、Sb 2O 3 0.8%、Co 2O 3 0.8%、Cr 2O 3 0.2%、MnO 2 0.7%、SiO 2 0.5%、Ni 2O 3 0.6%、Al(NO 3) 3 0.06%、B 2O 3 0.4%。
实施例3
本实施例与实施例1的区别在于:原料配方不同,具体为:ZnO 93.295%、Bi 2O 3 0.7%、Sb 2O 3 1.5%、Co 2O 3 0.5%、Cr 2O 3 0.5%、MnO 2 0.5%、SiO 2 1.5%、Ni 2O 3 0.4%、Al(NO 3) 3 0.08%、B 2O 3 0.2%、Ga 2O 3 0.825%。
经试验验证,实施例2与实施例3制备的氧化锌电阻片,微观晶体结构中的α-Bi 2O 3和γ-Bi 2O 3比例相对于对比例1同样有所提高,且综合性能与实施例相当。
虽然,上文中已经用一般性说明及具体实施方案对本发明作了详尽的描述,但在本发明基础上,可以对之作一些修改或改进,这对本领域技术人员而言是显而易见的。因此,在不偏离本发明精神的基础上所做的这些修改或改进,均属于本发明要求保护的范围。
工业实用性
本发明公开的通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法与氧化锌电阻片及其制备方法,通过对氧化锌电阻片原料配方、烧结降温速率和烧结后热处理的温度及升降温速率进行优化,实现了对氧化锌电阻片中氧化铋晶体形态的调控,减少了氧化铋晶体中β-Bi 2O 3与δ-Bi 2O 3两种结构的比例,并增加了氧化铋晶体中α-Bi 2O 3以及γ-Bi 2O 3两种晶体结构的占比,有效提升了氧化锌电阻片微观晶界结构的均匀性,减少了晶界层空白,使晶体结构分布更加均匀,进而提升了电阻片通流能力。经电气性能测试,利用本发明所述方法制备氧化锌电阻片,相对于传统氧化锌电阻片,在冲击电流作用下更加稳。

Claims (10)

  1. 一种氧化锌电阻片,其特征在于,原料包括如下摩尔百分比的组分、或由如下摩尔百分比的组分组成:ZnO 91.4%~96.3%、Bi 2O 3 0.7%~1.5%、Sb 2O 3 0.8%~1.5%、Co 2O 3 0.5%~1%、Cr 2O 3 0%~0.5%、MnO 2 0.5%~0.7%、SiO 2 0.5%~1.5%、Ni 2O 3 0.4%~0.6%、Al(NO 3) 30.05%~0.08%、B 2O 3 0.2%~0.4%、Ga 2O 3 0~0.825%。
  2. 根据权利要求1所述的氧化锌电阻片,其特征在于,原料包括如下摩尔百分比的组分、或由如下摩尔百分比的组分组成:
    ZnO 93.5%~95.4%、Bi 2O 3 1.2%~1.5%、Sb 2O 3 0.8%~1.0%、Co 2O 3 0.5%~0.8%、Cr 2O 3 0~0.2%、MnO 2 0.6%~0.7%、SiO 2 0.5~0.7%、Ni 2O 30.5%~0.6%、Al(NO 3) 3 0.06%~0.08%、B 2O 3 0.3%~0.4%、Ga 2O 3 0~0.62%。
  3. 根据权利要求1或2所述的氧化锌电阻片,其特征在于,所述氧化锌电阻片在制备时包括烧结步骤和烧结后的热处理步骤;
    其中,所述烧结步骤在达到最大烧结温度后的降温阶段采用如下降温曲线进行:
    以0.5℃/min的降温速率将温度从最大烧结温度降至850℃,
    以2℃/min的降温速率将温度从850℃降至700℃,
    以1℃/min的降温速率将温度从700℃降至室温;
    和/或,所述烧结后的热处理步骤以1℃/min的升温速率升温至650℃,保温2h后,再以1℃/min的降温速率降至室温。
  4. 根据权利要求1~3任一项所述的氧化锌电阻片,其特征在于,其中的Bi 2O 3晶体形态中α-Bi 2O 3形态的晶体结构占比80~90%,γ-Bi 2O 3形态的晶体结构占比7~15%。
  5. 一种氧化锌电阻片的制备方法,其特征在于,所述制备方法包括烧结步骤和烧结后的热处理步骤;
    其中,所述烧结步骤在达到最大烧结温度后的降温阶段采用如下 降温曲线进行:
    以0.5℃/min的降温速率将温度从最大烧结温度降至850℃,
    以2℃/min的降温速率将温度从850℃降至700℃,
    以1℃/min的降温速率将温度从700℃降至室温;
    和/或,所述烧结后的热处理步骤以1℃/min的升温速率升温至650℃,保温2h后,再以1℃/min的降温速率降至室温。
  6. 根据权利要求5所述的制备方法,其特征在于,制备所述氧化锌电阻片的原料包括如下摩尔百分比的组分、或由如下摩尔百分比的组分组成:ZnO 91.4%~96.3%、Bi 2O 3 0.7%~1.5%、Sb 2O 3 0.8%~1.5%、Co 2O 3 0.5%~1%、Cr 2O 3 0%~0.5%、MnO 2 0.5%~0.7%、SiO 2 0.5%~1.5%、Ni 2O 3 0.4%~0.6%、Al(NO 3) 3 0.05%~0.08%、B 2O 3 0.2%~0.4%、Ga 2O 3 0~0.825%。
  7. 根据权利要求5或6所述的制备方法,其特征在于,所述最大烧结温度为1000~1250℃。
  8. 根据权利要求7所述的制备方法,其特征在于,所述制备方法包括如下步骤:
    (1)配料:按摩尔百分比称取原料;
    (2)湿磨造粒:将步骤(1)所述原料加水混料后球磨至粒径为2μm以下的浆料,然后将浆料进行干燥造粒,获得造粒料;
    (3)压片:将步骤(2)所得造粒料压制成片,制得氧化锌电阻片预制胚体;
    (4)预烧结:将制得的预制胚体进一步干燥并预烧结,预烧结温度为400~900℃,保温时间为1~4h,升温速度为2~5℃/min;
    (5)烧结:对步骤(4)所得产物进行烧结,烧结曲线为:
    将温度升至最大烧结温度,保温360min;
    以0.5℃/min的降温速率将温度从最大烧结温度降至850℃;
    以2℃/min的降温速率将温度从850℃降至700℃;
    以1℃/min的降温速率将温度从700℃降至室温;
    (6)热处理:对烧结所得产物进行热处理,由室温以1℃/min的升温速率升温至650℃,保温2h,再以1℃/min的降温速率降至室温,得到氧化锌电阻片成品。
  9. 一种通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法,其特征在于,通过以下手段进行:
    (1)减少原料中Cr元素的用量,采用Ni元素代替;
    (2)调整氧化锌电阻片的烧结降温速率;
    (3)调整氧化锌电阻片的热处理烧结温度及升降温速率。
  10. 根据权利要求9所述的方法,其特征在于,制备氧化锌电阻片的原料包括如下摩尔百分比的组分:Cr 2O 3 0.3%~0.5%、Ni 2O 3 0.4%~0.6%;
    在达到最大烧结温度后的降温阶段采用如下降温曲线进行:
    以0.5℃/min的降温速率将温度从最大烧结温度降至850℃,
    以2℃/min的降温速率将温度从850℃降至700℃,
    以1℃/min的降温速率将温度从700℃降至室温;
    在烧结后进行热处理:以1℃/min的升温速率升温至650℃,保温2h后,再以1℃/min的降温速率降至室温。
PCT/CN2020/100067 2020-05-09 2020-07-03 通过调控氧化铋晶体形态提升氧化锌压敏电阻通流能力的方法与氧化锌电阻片及其制备方法 WO2021227220A1 (zh)

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