WO2021208766A1

WO2021208766A1 - Algainp-based light emitting diode chip and manufacturing method therefor

Info

Publication number: WO2021208766A1
Application number: PCT/CN2021/085340
Authority: WO
Inventors: 肖和平; 朱迪; 郭磊; 葛丁壹; 常远
Original assignee: 华灿光电(苏州）有限公司
Priority date: 2020-04-17
Filing date: 2021-04-02
Publication date: 2021-10-21
Also published as: CN111628058A

Abstract

An AlGaInP-based light emitting diode chip and a manufacturing method therefor, relating to the technical field of semiconductors. The AlGaInP-based light emitting diode chip comprises: a transition bonding layer (110) arranged between a sapphire substrate (301) and an epitaxial layer, and a composite bonding layer (201) arranged between the sapphire substrate (301) and the transition bonding layer (110). The composite bonding layer (201) is an Al2O3/Si3N4/SiO2 composite layer, wherein Al2O3 in the composite bonding layer (201) is in contact with the transition bonding layer (110). The transition bonding layer (110) and the layer of the epitaxial layer contacting the transition bonding layer (110) are both P-type Gap layers. The AlGaInP-based light emitting diode chip can improve the bonding yield between the sapphire substrate (301) and the epitaxial layer.

Description

AlGaInP-based light-emitting diode chip and manufacturing method thereof

This application claims the priority of the Chinese patent application whose application number is 202010303398.1, and the invention title is "AlGaInP-based light-emitting diode chip and its manufacturing method" filed on April 17, 2020, the entire content of which is incorporated into this application by reference.

Technical field

The present disclosure relates to the field of semiconductor technology, in particular to an AlGaInP-based light-emitting diode chip and a manufacturing method thereof.

Background technique

The quaternary light-emitting diode (English: Light Emiting Diode, abbreviated as: LED) chip has the advantages of high luminous efficiency, wide color range, low power consumption, long life, monochromatic light emission, fast response speed, impact resistance, small size, etc. It is widely used in various indication and display devices.

The epitaxy and chip technology of the AlGaInP red LED chip in the quaternary LED chip is very mature. The AlGaInP red LED chip includes a GaAs substrate and an epitaxial layer. The epitaxial layer includes a P-type layer, an AlGaInP light-emitting layer, an N-type layer, a reflective layer, etc., which are sequentially grown on a GaAs substrate. The epitaxial layer can be precisely matched with the GaAs substrate, with fewer dislocations, and an internal quantum efficiency of more than 95%. However, GaAs has a relatively small energy gap and has an absorption effect on the light emitted by the AlGaInP light-emitting layer, thus limiting the light extraction performance of the LED.

In related technologies, chip bonding technology is usually used to directly bond the epitaxial layer with the sapphire substrate, and wet etching technology is used to remove the original GaAs substrate to improve the light-emitting efficiency of the LED and manufacture a high-brightness LED. However, when the epitaxial layer is directly bonded to the sapphire substrate, the bonding yield is very low, and the sapphire substrate and the epitaxial wafer are easily separated.

Summary of the invention

The embodiments of the present disclosure provide an AlGaInP-based light-emitting diode chip and a manufacturing method thereof, which can improve the bonding effect between the sapphire substrate and the epitaxial layer. The technical solution is as follows:

In one aspect, an AlGaInP-based light-emitting diode chip is provided. The AlGaInP-based light-emitting diode chip includes a sapphire substrate, and a composite bonding layer, a transition bonding layer, and an epitaxial layer sequentially stacked on the sapphire substrate. The epitaxial layer includes a P-type ohmic contact layer, a window layer, a P-type current spreading layer, a P-type confinement layer, a light-emitting layer, an N-type confinement layer, a first reflective layer, and N An N-type extension layer and an N-type ohmic contact layer, the N-type ohmic contact layer is provided with an N-type electrode, and the P-type ohmic contact layer is provided with a P-type electrode. The composite bonding layer is an Al ₂ O ₃ /Si ₃ N ₄ /SiO ₂ composite layer, and the Al ₂ O ₃ layer in the composite bonding layer is in contact with the transition bonding layer, and the transition bonding layer Both the P-type ohmic contact layer and the P-type ohmic contact layer are P-type GaP layers.

Optionally, the transition bonding layer has a roughened structure on the side in contact with the composite bonding layer.

Optionally, the thickness of the transition bonding layer ranges from 0.1 μm to 0.3 μm.

Optionally, the thickness of the Al ₂ O ₃ layer and the Si ₃ N ₄ layer in the composite bonding layer are equal, and the thickness of the SiO ₂ layer in the composite bonding layer is greater than the thickness of the Al ₂ O ₃ layer.

Optionally, the thickness of the Al ₂ O ₃ layer in the composite bonding layer ranges from 50 nm to 500 nm, and the thickness of the Si ₃ N ₄ layer in the composite bonding layer ranges from 50 nm to 500 nm. The thickness of the SiO ₂ layer in the composite layer ranges from 500 nm to 5000 nm.

Optionally, the AlGaInP-based light-emitting diode chip further includes a passivation layer coated on the epitaxial layer. Exemplarily, the passivation layer is an Al ₂ O ₃ layer.

Optionally, the AlGaInP-based light-emitting diode chip further includes a second reflective layer covering the passivation layer. Exemplarily, the second reflective layer has a TiO _x /SiO _x superlattice structure.

Optionally, the AlGaInP-based light-emitting diode chip further includes pads arranged on the P-type electrode and the N-type electrode, and the pads are Ti/Al/Ti/Ni/Pt/Ni/Au composites. Floor.

Optionally, the first reflective layer has an AlInP/AlGaInP superlattice structure.

Optionally, the N-type electrode is an AuGeNi/Au/Ni/Pt/Au composite layer, and the P-type electrode is an AuBe/Au/Pt/Ti/Au composite layer.

In another aspect, there is provided a manufacturing method of an AlGaInP-based light-emitting diode chip, the manufacturing method including:

On the N-type GaAs substrate, the corrosion stop layer, the N-type ohmic contact layer, the N-type extension layer, the first reflective layer, the N-type confinement layer, the light-emitting layer, the P-type confinement layer, the P-type current spreading layer, and the window layer are sequentially grown on the N-type GaAs substrate. , P-type ohmic contact layer and transition bonding layer, the P-type ohmic contact layer and the transition bonding layer are both P-type GaP layers;

A composite bonding layer is formed on the transition bonding layer, the composite bonding layer is an Al ₂ O ₃ /Si ₃ N ₄ /SiO ₂ composite layer, and the Al ₂ O ₃ in the composite bonding layer is The transition bonding layer is in contact;

Bonding the composite bonding layer to the sapphire substrate;

Removing the N-type GaAs substrate and the etch stop layer;

Forming an N-type electrode on the side of the N-type ohmic contact layer away from the sapphire substrate;

A P-type electrode is formed on the side of the P-type ohmic contact layer away from the sapphire substrate.

Optionally, the manufacturing method further includes: before forming the composite bonding layer on the transition bonding layer, roughening the side of the transition bonding layer away from the P-type ohmic contact layer.

Optionally, the roughening the side of the transition bonding layer away from the P-type ohmic contact layer includes:

Use an acid system roughening solution to roughen the side of the transition bonding layer away from the P-type ohmic contact layer. The acid system roughening solution includes HIO ₄ , HF, H ₂ SO ₄ , and CH ₃ COOH. At least one solution.

Optionally, the forming a composite bonding layer on the transition bonding layer includes:

_{Depositing an Al 2} O ₃ layer, an Si ₃ N ₄ layer, and an SiO ₂ layer on the transition bonding layer sequentially by using an electron beam evaporation method;

Polishing is performed on the side of the SiO ₂ layer away from the transition bonding layer to obtain the composite bonding layer.

Optionally, the manufacturing method further includes: _{polishing the side of the SiO 2} layer away from the transition bonding layer to obtain the composite bonding layer, and then using an acid series solution to treat the composite bond The laminated layer is cleaned, and the acid series solution includes at least one of _{H 2} SO ₄ , H ₂ O ₂ , and H ₃ PO _4.

Optionally, the manufacturing method further includes: forming a passivation layer on the N-type ohmic contact layer after removing the N-type GaAs substrate and the etching stop layer by using an atomic layer deposition technique, and the passivation The layer is an Al ₂ O ₃ layer, and the deposition temperature of the passivation layer is 200°C to 250°C.

Optionally, the manufacturing method further includes: forming a second reflective layer on the passivation layer, the second reflective layer having a TiO _x /SiO _x superlattice structure.

Optionally, the manufacturing method further includes: forming pads on the N-type electrode and the P-type electrode, and the pads are Ti/Al/Ti/Ni/Pt/Ni/Au composite layers.

Optionally, the forming an N-type electrode on the side of the N-type ohmic contact layer away from the sapphire substrate includes: sequentially An AuGeNi layer, an Au layer, a Ni layer, a Pt layer and an Au layer are formed to obtain the N-type electrode.

Optionally, the forming a P-type electrode on the side of the P-type ohmic contact layer away from the sapphire substrate includes: sequentially An AuBe layer, an Au layer, a Pt layer, a Ti layer, and an Au layer are formed to obtain the P-type electrode.

The beneficial effects brought about by the technical solutions provided by the embodiments of the present disclosure are:

By forming a transition bonding layer and a composite bonding layer between the epitaxial layer and the sapphire substrate, the transition bonding layer is a P-type Gap layer, and the composite bonding layer is Al ₂ O ₃ /Si ₃ N ₄ /SiO ₂ Composite layer.

_{On the one hand, the Al 2} O ₃ layer in the composite bonding layer is in contact with the P-type GaP layer. _{A large number of -O dangling bonds are formed during the formation of the Al 2} O ₃ layer, which forms a bond with the surface of the P-type GaP layer. It makes the Al ₂ O ₃ layer and the P-type GaP layer have strong adhesion, and ensures the bonding yield between the composite bonding layer and the transition bonding layer.

On the other hand, between the SiO ₂ layer in the composite bonding layer and the sapphire substrate whose main component is Al ₂ O ₃ _{, between the Si 3} N ₄ layer and the Al ₂ O ₃ layer in the composite bonding layer, and the composite _{The Si 3} N ₄ layer in the bonding layer and the SiO ₂ layer will form a combination of ionic bonds and covalent bonds, which have good bonding force and strong adhesion, which can ensure the inside of the composite bonding layer, and Bond yield between sapphire substrates.

In addition, the surface material of the P-type Gap layer and the epitaxial layer are the same, so that the bonding yield between the transition bonding layer and the epitaxial layer is high. In summary, the provision of a transition bonding layer and a composite bonding layer between the sapphire substrate and the epitaxial layer is beneficial to improve the bonding yield between the epitaxial layer and the sapphire substrate.

Description of the drawings

In order to more clearly describe the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.

FIG. 1 is a schematic diagram of a hierarchical structure of an AlGaInP-based light-emitting diode chip provided by an embodiment of the present disclosure;

2 is a front view of an AlGaInP-based light-emitting diode chip provided by an embodiment of the present disclosure;

FIG. 3 is a flowchart of a method for manufacturing an AlGaInP-based light-emitting diode chip provided by an embodiment of the present disclosure.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the present disclosure clearer, the following further describes the embodiments of the present disclosure in detail with reference to the accompanying drawings.

FIG. 1 is a schematic diagram of the hierarchical structure of an AlGaInP-based light-emitting diode chip provided by an embodiment of the present disclosure. As shown in FIG. 1, the AlGaInP-based light-emitting diode chip includes a sapphire substrate 301 and an epitaxial layer. The epitaxial layer includes a P-type ohmic contact layer 109, a window layer 108, and a P-type current spreading layer that are sequentially stacked on the sapphire substrate 301. 107, P-type confinement layer 106, light-emitting layer 105, N-type confinement layer 104, first reflective layer 103, N-type extension layer 102, and N-type ohmic contact layer 101. The N-type ohmic contact layer 101 is provided with an N-type electrode 401, and the P-type ohmic contact layer 109 is provided with a P-type electrode 402.

The AlGaInP-based light-emitting diode chip also includes a transition bonding layer 110 disposed between the sapphire substrate 301 and the epitaxial layer, and a composite bonding layer 201 disposed between the sapphire substrate 301 and the transition bonding layer 110. The composite bonding layer 201 is an Al ₂ O ₃ /Si ₃ N ₄ /SiO ₂ composite layer, and the transition bonding layer 110 and the P-type ohmic contact layer 109 are both P-type gap layers.

In this embodiment, the Al ₂ O ₃ layer in the composite bonding layer 201 is in contact with the transition bonding layer 110, and the SiO ₂ layer in the composite bonding layer 201 is in contact with the sapphire substrate 301.

The embodiments of the present disclosure form a transition bonding layer and a composite bonding layer between the epitaxial layer and the sapphire substrate, wherein the transition bonding layer is a P-type Gap layer, and the composite bonding layer is Al ₂ O ₃ /Si ₃ N ₄ /SiO ₂ composite layer.

In some examples, a roughened structure is formed on the surface of the transition bonding layer 110 that is in contact with the composite bonding layer 201. A roughened structure is formed on the side of the transition bonding layer that is in contact with the composite bonding layer, which can enhance the adhesion between the transition bonding layer and the composite bonding layer, and further improve the composite bonding layer and the transition bonding layer The bond yield between.

Here, the roughened structure refers to a concavo-convex structure formed on the surface of the transition bonding layer by surface treatment. Surface treatment includes dry etching, wet etching and so on.

Optionally, the thickness of the transition bonding layer 110 ranges from 0.1 μm to 0.3 μm to ensure the roughened morphology of its roughened structure.

Optionally, the thickness of the Al ₂ O ₃ layer in the composite bonding layer 201 _{ranges from 50 nm to 500 nm, and the thickness of the Si 3} N ₄ layer in the composite bonding layer 201 ranges from 50 nm to 500 nm. The thickness of the SiO ₂ layer ranges from 500nm to 5000nm.

Exemplarily, the thickness of the Al ₂ O ₃ layer and the Si ₃ N ₄ layer in the composite bonding layer 201 may be equal, and the thickness of the SiO ₂ layer in the composite bonding layer 201 is greater than that of the Al ₂ O ₃ layer and the Si ₃ N _{4 layer.} The thickness of the layer.

In the embodiments of the present disclosure, the thickness range refers to the value range of the thickness.

Optionally, the thickness of the P-type ohmic contact layer ranges from 50 nm to 200 nm, and the concentration of the P-type doping may be greater than 3*10 ¹⁹ cm ^-3 .

Optionally, the window layer 108 is a P-type GaP current spreading layer, the thickness of the window layer 108 ranges from 3 μm to 8 μm, and the concentration of the P-type doping may be greater than 1*10 ¹⁹ cm ^-3 .

Optionally, the P-type current spreading layer 107 is an AlGaInP spreading layer. The thickness of the P-type current spreading layer 107 ranges from 0.5 μm to 1.5 μm.

Optionally, the P-type confinement layer 106 is an AlInP confinement layer. The thickness of the P-type confinement layer 106 ranges from 0.1 μm to 0.5 μm.

Optionally, the light-emitting layer 105 includes a GaInP/AlGaInP superlattice structure of multiple periods. The thickness of the light-emitting layer 105 ranges from 150 nm to 200 nm.

Optionally, the N-type confinement layer 104 is an AlInP confinement layer with a thickness of 0.1 μm to 0.5 μm.

Optionally, the first reflective layer 103 has an AlInP/AlGaInP superlattice structure, which can be matched with the overall epitaxial layer lattice, and the reflectivity is as high as 95% or more.

Exemplarily, the number of periods of the first reflective layer 103 may be 5 to 35 layers.

Exemplarily, the thickness of the AlInP layer in the first reflective layer 103 ranges from 5 nm to 50 nm, and the thickness of the AlGaInP layer ranges from 5 nm to 50 nm.

Optionally, the N-type extension layer 102 is an AlGaInP extension layer, the thickness of the N-type extension layer 102 ranges from 1.5 μm to 3.5 μm, and the concentration of the N-type doping may be greater than 6*10 ¹⁸ cm ^-3 .

Optionally, the N-type ohmic contact layer 101 is an N-GaAs layer, and the thickness of the N-type ohmic contact layer 101 ranges from 50 nm to 150 nm.

Optionally, the AlGaInP-based light-emitting diode chip further includes a passivation layer 501 coated on the epitaxial layer. The passivation layer has good moisture and water resistance, and can also reduce leakage current.

Illustratively, the passivation layer 501 is an Al ₂ O ₃ layer.

Any defects or impurities will promote recombination on or near the surface of the chip. The surface recombination rate (SRV) is limited by the rate at which minority carriers move to the surface. For most semiconductors, the moving speed of carriers is about 10 ⁷ cm/s. The loss of carriers can be expressed by the multiplication of the surface recombination rate and the rate of movement of carriers to the surface. The loss of carriers will affect the luminous efficiency of the light-emitting diode device, so the luminous efficiency of the AlGaInP light-emitting diode device is related to the surface recombination rate.

In this embodiment, Atomic Layer Deposition (ALD) technology can be used to prepare the Al ₂ O ₃ layer. The growth temperature of the Al ₂ O ₃ layer is 200°C to 250°C. The prepared Al ₂ O ₃ layer film has the characteristics of high fixed negative charge density (Qf) and low interface defect state density (Dit), excellent passivation effect, stable chemical dose composition, etc., which can eliminate parasitic leakage effects to a large extent , Excellent surface passivation can reduce the surface recombination rate of minority carriers (minor carriers) and improve the photoelectric conversion efficiency of AlGaInP light-emitting diode devices.

Exemplarily, the thickness of the passivation layer 501 ranges from 100 nm to 200 nm.

Optionally, the AlGaInP-based light-emitting diode chip further includes a second reflective layer 502 covering the passivation layer 501. By providing the second reflective layer, the photons passing through the epitaxially grown first reflective layer 103 can be reflected back, and the photoelectric conversion efficiency can be improved.

Exemplarily, the second reflective layer 502 has a TiO _x /SiO _x superlattice structure. Wherein, the value of x ranges from 1 to 2.0, _{and the value of x} _{in TiO x} and SiO x may be the same or different. The TiO _x /SiO _x material has excellent flexural strength and fracture toughness, which is beneficial to reduce the damage caused by the thimble during the solid crystal grasping process.

Exemplarily, in the second reflective layer 502, the thickness of the TiOx layer ranges from 80 nm to 120 nm, and the thickness of the SiOx layer ranges from 80 nm to 120 nm. The total thickness of the second reflective layer 502 may range from 3 μm to 4 μm.

Optionally, the second reflective layer 502 is composed of 20-40 pairs of TiO _x /SiO _x superlattice structure.

Optionally, the AlGaInP-based light-emitting diode chip further includes a bonding pad 600 disposed on the P-type electrode 402 and the N-type electrode 401, and the bonding pad 600 is a Ti/Al/Ti/Ni/Pt/Ni/Au composite layer.

Among them, the thickness of each layer of metal in the pad 600 ranges from 100 nm to 1000 nm. Ni can increase the fusion with Sn in the solder paste soldering in the packaging process, and Pt can block the continuous fusion of Sn to the Pad electrode, thereby improving the reliability of device packaging.

Optionally, the P-type electrode 402 is an AuBe/Au/Pt/Ti/Au composite layer.

Exemplarily, the thickness of the Pt layer and the Ti layer in the P-type electrode 402 are both 100 nm. The Be element is easily extended to the surface of the AuBe layer, that is, the surface of the P-type electrode 402 away from the sapphire substrate. During the process of removing the glue by evaporation, the 1s orbital electrons and the polar functional groups of the lipophilic molecules in the glue removing solution form a similar pattern. The chemical covalent bond causes the photoresist to stick back. The Pt/Ti layer can block the expansion of the Be epitaxial layer, and this structure is more conducive to chip electrode peeling and glue removal.

Optionally, the N-type electrode 401 is an AuGeNi/Au/Ni/Pt/Au composite layer. Exemplarily, the thickness of each layer in the N-type electrode 401 is 0.1 μm to 1 μm.

Figure 2 is a front view of an AlGaInP-based light-emitting diode chip provided by an embodiment of the present disclosure. mesa. Wherein, the P-type electrode 402 and the pad 600 are communicated with each other through a P-connected hole 402a, and the P-connected hole 402a is located in the middle of the P-type electrode 402. The P-type electrode 402 is a multi-layer ladder structure. Each layer in the P-type electrode 402 is a columnar structure. The columnar structure includes four sides. . This arrangement can reduce the area of the P-type electrode 402 and increase the area ratio of the mesa region, which is beneficial to the recognition ability during the die bonding process and improves the recognition yield. The N-type electrode 401 and the pad 600 are communicated with each other through an N communication hole 401a, and the N-type electrode 401 includes a first section and a second section. Wherein, the N communicating hole 401a is located at one end of the first section, the other end of the first section extends to the P communicating hole 402a, and the other end of the first section is vertically connected to the center of the second section. This structure is conducive to expanding current. A mark 401b is provided on the first section of the N-type electrode 401.

FIG. 3 is a flowchart of a method for manufacturing an AlGaInP-based light-emitting diode chip provided by an embodiment of the present disclosure. The manufacturing method is used to manufacture the AlGaInP-based light-emitting diode chip described in the above embodiment, as shown in FIG. 3, the manufacturing method includes:

In step 301, an etching stop layer, an N-type ohmic contact layer, an N-type extension layer, a first reflective layer, an N-type confinement layer, a light-emitting layer, a P-type confinement layer, and a P-type current are sequentially grown on an N-type GaAs substrate. Expansion layer, window layer, P-type ohmic contact layer.

Exemplarily, step 301 may include:

The metal organic chemical vapor deposition method (English: Metal-organic Chemical Vapor Deposition, abbreviated as: MOCVD) was used to sequentially grow the corrosion stop layer, the N-type ohmic contact layer, the N-type extension layer, the first reflective layer, and the first reflective layer on the N-type GaAs substrate. N-type confinement layer, light-emitting layer, P-type confinement layer, P-type current spreading layer, window layer, P-type ohmic contact layer.

Optionally, the corrosion stop layer, the N-type ohmic contact layer, the N-type extension layer, the first reflective layer, the N-type confinement layer, the light-emitting layer, the P-type confinement layer, the P-type current spreading layer, the window layer, the P-type For the ohmic contact layer, the growth temperature is 600-700°C, and the growth pressure is 50-1000 mbar.

Optionally, the P-type ohmic contact layer is a p-GaP ohmic contact layer, and the thickness of the P-type ohmic contact layer is 50-200 nm.

Optionally, the window layer is a GaP layer, and the thickness of the window layer is 3-8 μm.

Optionally, the P-type current spreading layer is an AlGaInP spreading layer, and the thickness of the P-type current spreading layer is 0.5-1.5 μm.

Optionally, the P-type confinement layer is an AlInP confinement layer, and the thickness of the P-type confinement layer is 0.1-0.5 μm.

Optionally, the light-emitting layer includes multiple periods of GaInP/AlGaInP superlattice structure with a thickness of 150 nm to 200 nm.

Optionally, the N-type confinement layer is an AlInP confinement layer, and the thickness of the N-type confinement layer is 0.1 μm to 0.5 μm.

Optionally, the first reflective layer has an AlInP/AlGaInP superlattice structure, which can be matched with the overall epitaxial layer crystal lattice, and the reflectivity is as high as 95% or more.

Exemplarily, the number of periods of the first reflective layer may be 5 to 35 layers.

Exemplarily, the thickness of the AlInP layer in the first reflective layer is 5-50 nm, and the thickness of the AlGaInP layer is 5-50 nm.

Optionally, the N-type extension layer is an AlGaInP extension layer, and the thickness of the N-type extension layer is 1.5-3.5 μm.

Optionally, the N-type ohmic contact layer is an n-GaAs ohmic contact layer, and the thickness of the N-type ohmic contact layer is 50-150 nm.

In this embodiment, high-purity H ₂ (hydrogen) or high-purity N ₂ (nitrogen) or _{a mixed gas of high-purity H 2} and high-purity N ₂ is used as the carrier gas, high-purity NH _{3 is} used as the N source, and trimethyl Gallium (TMGa) and triethylgallium (TEGa) are used as the gallium source, trimethylindium (TMIn) is used as the source of indium, silane (SiH ₄ ) is used as the N-type dopant, and trimethyl aluminum (TMAl) is used as the source of aluminum. Magnesocene (CP ₂ Mg) is used as a P-type dopant.

In step 302, a transition bonding layer is formed on the P-type ohmic contact layer.

Among them, the transition bonding layer is a P-type Gap layer.

In the embodiment of the present disclosure, the transition bonding layer is formed by MOCVD. Exemplarily, the growth temperature of the transition bonding layer is 600-700° C., and the growth pressure is 50-1000 mbar.

In step 303, the side of the transition bonding layer away from the P-type ohmic contact layer is roughened.

Exemplarily, an acid system roughening solution may be used to roughen the side of the transition bonding layer away from the P-type ohmic contact layer.

Optionally, the acid system roughening solution includes at least one solution of _{HIO 4} , HF, H ₂ SO ₄ , and CH _{3 COOH.} I.e. roughening solution comprising an acid system _{_{HIO 4, HF, H 2 SO}} 4, CH ₃ COOH solution of any one of, or comprising at least two solutions _{_{HIO 4, HF, H 2 SO}} 4, CH 3 COOH in composition The mixture.

Exemplarily, the acid system roughening liquid is a mixed _{liquid containing HIO 4} , HF, H ₂ SO ₄ , and CH _{3 COOH.} Using an acid system roughening solution to roughen the transition bonding layer of the P-GaP layer can make the GaP layer uniform in roughening effect, which is conducive to the _{formation of good adhesion between the GaP rough layer and the Al 2} O ₃ layer, and increases the reliability of the device.

In step 304, a composite bonding layer is formed on the transition bonding layer.

Among them, the composite bonding layer is an Al ₂ O ₃ /Si ₃ N ₄ /SiO ₂ composite layer.

Exemplarily, step 304 may include:

_{The first step is to deposit Al 2} O ₃ layer, Si ₃ N ₄ layer and SiO ₂ layer on the transition bonding layer by electron beam evaporation method;

The second step _{is to polish the side of the SiO 2} layer away from the transition bonding layer to obtain a composite bonding layer to reduce deformation defects caused by wafer warping.

Illustratively, in the first step, the growth temperature of the composite bonding layer is 110-180° C., and the growth pressure is less than 0.03 Pa.

Optionally, this step 304 further includes: _{polishing the side of the SiO 2} layer away from the transition bonding layer to obtain the composite bonding layer, and then cleaning the composite bonding layer with an acid series solution.

Optionally, the acid series solution includes at least one solution of _{H 2} SO ₄ , H ₂ O ₂ , and H ₃ PO _4. I.e., the acid solution comprises a series of _{_{_{H 2 SO 4, H 2 O}}} 2, H any solution ₄ ₃ PO, or comprising ₂ SO _4, at least two solutions _{_{_{H 2 O 2, H 3 PO}}} 4 in H Composition The mixture.

Illustratively, the acid series solution is a mixed _{solution containing H 2} SO ₄ , H ₂ O ₂ , and H ₃ PO _4. Using acid series solutions to clean the bonding layer can reduce the surface defect density of the bonding layer, and at the same time introduce -OH bonds to increase the bonding effect.

In step 305, the composite bonding layer is bonded to the sapphire substrate.

In this embodiment, the sapphire substrate and the bonding layer can be bonded together at a high temperature, and the bonding temperature is 300-430°C.

In step 306, the N-type GaAs substrate and the etch stop layer are removed.

Optionally, the GaAs substrate and etch stop layer can be removed by a chemical humidification solution.

In step 307, an N-type electrode is formed on the side of the N-type ohmic contact layer away from the sapphire substrate.

Among them, the N-type electrode is a composite layer of AuGeNi/Au/Ni/Pt/Au.

Exemplarily, the thickness of each layer in the N-type electrode ranges from 0.1 μm to 1 μm.

Exemplarily, step 306 may include:

An inductively coupled plasma etching method is used to etch the N-type ohmic contact layer and expose the light-emitting mesa, and an AuGeNi layer, an Au layer, a Ni layer, a Pt layer and an Au layer are sequentially formed on the N-type ohmic contact layer to obtain the N-type ohmic contact layer. electrode. For example, an AuGeNi layer, an Au layer, a Ni layer, a Pt layer and an Au layer are sequentially deposited by an electron beam evaporation method.

Exemplarily, using an inductively coupled plasma (Inductive Coupled Plasma, ICP) etching method to etch to the N-type ohmic contact layer and exposing the light-emitting mesa refers to using photoresist as a mask and using an inductively coupled plasma etching method Etch to the P-type ohmic contact layer and form a dry-etched side profile with a certain angle.

Optionally, the manufacturing method further includes:

After forming the N-type electrode, the chip is annealed at 450°C to 480°C to form a good N-surface ohmic contact.

In step 308, a P-type electrode is formed on the side of the P-type ohmic contact layer away from the sapphire substrate.

Optionally, the P-type electrode is an AuBe/Au/Pt/Ti/Au composite layer.

Exemplarily, the thickness of the Pt layer and the Ti layer in the P-type electrode are both 100 nm. The Be element is easy to extend to the surface of the AuBe layer, that is, the surface of the P-type electrode away from the sapphire substrate. The 1s orbital electrons and the polar functional groups of the lipophilic molecules in the degluing solution form a chemically similar co- The valence bond causes the photoresist to stick back, and the addition of the Pt/Ti layer will block the expansion of Be. This structure is more conducive to the stripping of the chip electrode to remove the glue.

Exemplarily, step 308 may include: sequentially forming an AuBe layer, an Au layer, a Pt layer, a Ti layer, and an Au layer on the side of the P-type ohmic contact layer away from the sapphire substrate to obtain the P-type electrode . For example, the AuBe layer, the Au layer, the Pt layer, the Ti layer, and the Au layer are sequentially deposited on the P-GaP ohmic contact layer by electron beam evaporation.

Optionally, the manufacturing method further includes:

After forming the P-type electrode, the chip is annealed at 300°C to form a good P-surface ohmic contact.

In step 309, a passivation layer and a second reflective layer are sequentially formed outside the epitaxial layer.

Wherein, the passivation layer is coated on the epitaxial layer, and the second reflective layer is coated on the passivation layer.

Illustratively, the passivation layer is an Al ₂ O ₃ layer. The passivation layer can be deposited by an ALD (Atomic layer deposition) method with a deposition rate of about 0.6 nm/min-1 nm/min, a deposition temperature of 200° C. to 250° C., and a thickness range of 100 nm to 200 nm.

Exemplarily, after the Al ₂ O ₃ surface passivation layer is deposited, the cutting line pattern is defined by photolithography, the cutting line is dry-etched by ICP, and then the second reflective layer is deposited, and the material is TiO _x /SiO _x to obtain TiOx/ SiOx superlattice structure. Then, the connection electrical via hole pattern is defined by photolithography, the hole shape is dry-etched by ICP, protected by positive photolithography, and the ICP is dry-etched to the sapphire layer to form a continuous dry-etched side profile with a certain angle.

In this embodiment, the second reflective layer can be formed by electron beam evaporation at a temperature of 100°C to 120°C, _{the thickness of the TiO x} layer and the SiO _x layer can both be 80 nm to 120 nm, and the total thickness of the second reflective layer is 3μm～4μm.

In step 310, pads are formed on the N-type electrode and the P-type electrode, respectively.

Wherein, the pad 600 is a Ti/Al/Ti/Ni/Pt/Ni/Au composite layer.

Optionally, the thickness of each layer of metal in the bonding pad 600 is 100-1000 nm, and the bonding pad 600 may be formed by electron beam evaporation. The Ni in the pad 600 can increase the fusion with the Sn in the solder paste soldering in the packaging process, and the Pt can block the continuous fusion of the Sn to the Pad electrode, thereby improving the reliability of the device packaging.

Optionally, the manufacturing method further includes:

The sapphire substrate is thinned to 60-100μm.

After the chip is polished, laser cut and separated, photoelectric parameter test, appearance inspection, a new structure AlGaInP red light mini-LED device with design size is obtained. The light-emitting area size of the AlGaInP red mini-LED device is 3mil-7mil, and the chip thickness is 60μm-100μm.

The embodiments of the present disclosure form a transition bonding layer and a composite bonding layer between the epitaxial layer and the sapphire substrate, wherein the transition bonding layer is a P-type GaP layer, and the composite bonding layer is Al ₂ O ₃ /Si ₃ N ₄ /SiO ₂ composite layer. _{On the one hand, the Al 2} O ₃ layer in the composite bonding layer is in contact with the P-type GaP layer. _{A large number of -O dangling bonds are formed during the formation of the Al 2} O ₃ layer, which forms a bond with the surface of the P-type GaP layer. It makes the Al ₂ O ₃ layer and the P-type GaP layer have strong adhesion, and ensures the bonding yield between the composite bonding layer and the transition bonding layer.

On the other hand, between the SiO ₂ layer in the composite bonding layer and the sapphire substrate whose main component is Al ₂ O ₃ _{, between the Si 3} N ₄ layer and the Al ₂ O ₃ layer in the composite bonding layer, and _{The Si 3} N ₄ layer in the composite bonding layer and the SiO ₂ layer will form a combination of ionic bonds and covalent bonds, which has good bonding force and strong adhesion, which can ensure that the inside of the composite bonding layer, And the bond yield between sapphire substrates.

It should be noted that in the embodiments of the present disclosure, the composite layer refers to a structure formed by stacking multiple layers.

The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure. Inside.

Claims

An AlGaInP-based light-emitting diode chip includes a sapphire substrate (301), and a composite bonding layer (201), a transition bonding layer (110) and an epitaxial layer laminated on the sapphire substrate (301) in sequence, so The epitaxial layer includes a P-type ohmic contact layer (109), a window layer (108), a P-type current spreading layer (107), and a P-type confinement layer (106) which are sequentially stacked on the transition bonding layer (110). , The light-emitting layer (105), the N-type confinement layer (104), the first reflective layer (103), the N-type extension layer (102) and the N-type ohmic contact layer (101), the N-type ohmic contact layer (101) An N-type electrode (401) is provided thereon, and a P-type electrode (402) is provided on the P-type ohmic contact layer (109),

The composite bonding layer (201) is an Al 2 O 3 /Si 3 N 4 /SiO 2 composite layer, and the Al 2 O 3 layer in the composite bonding layer (201) and the transition bonding layer (110 ) Contact, the transition bonding layer (110) and the P-type ohmic contact layer (109) are both P-type GaP layers.
The AlGaInP-based light-emitting diode chip according to claim 1, wherein a surface of the transition bonding layer (110) that is in contact with the composite bonding layer (201) has a roughened structure.
The AlGaInP-based light-emitting diode chip according to claim 2, wherein the thickness of the transition bonding layer (110) ranges from 0.1 μm to 0.3 μm.
The AlGaInP-based light-emitting diode chip according to any one of claims 1 to 3, wherein the thickness of the Al 2 O 3 layer and the Si 3 N 4 layer in the composite bonding layer (201) are equal, and the composite bond The thickness of the SiO 2 layer in the composite layer (201) is greater than the thickness of the Al 2 O 3 layer.
The AlGaInP-based light-emitting diode chip according to claim 4, wherein the thickness of the Al 2 O 3 layer in the composite bonding layer (201) ranges from 50 nm to 500 nm, and the thickness of the composite bonding layer (201) The thickness of the Si 3 N 4 layer ranges from 50 nm to 500 nm, and the thickness of the SiO 2 layer in the composite bonding layer (201) ranges from 500 nm to 5000 nm.
The AlGaInP-based light-emitting diode chip according to any one of claims 1 to 5, further comprising a passivation layer (501) and a second reflective layer (502), the passivation layer (501) covering the epitaxial layer Above, the second reflective layer is coated on the passivation layer (501).
The AlGaInP-based light-emitting diode chip according to claim 6, wherein the second reflective layer (502) has a TiO x /SiO x superlattice structure.
The AlGaInP-based light-emitting diode chip according to claim 6 or 7, wherein the passivation layer (501) is an Al 2 O 3 layer.
The AlGaInP-based light-emitting diode chip according to any one of claims 1 to 8, further comprising a pad (600) disposed on the P-type electrode (402) and the N-type electrode (401), and the welding The disc (600) is a Ti/Al/Ti/Ni/Pt/Ni/Au composite layer.
The AlGaInP-based light-emitting diode chip according to any one of claims 1 to 9, wherein the first reflective layer (103) is an AlInP/AlGaInP superlattice structure.
The AlGaInP-based light-emitting diode chip according to any one of claims 1 to 10, wherein the N-type electrode (401) is an AuGeNi/Au/Ni/Pt/Au composite layer, and the P-type electrode (402) is AuBe/Au/Pt/Ti/Au composite layer.
A method for manufacturing an AlGaInP-based light-emitting diode chip, including:

On the N-type GaAs substrate, the corrosion stop layer, the N-type ohmic contact layer, the N-type extension layer, the first reflective layer, the N-type confinement layer, the light-emitting layer, the P-type confinement layer, the P-type current spreading layer, and the window layer are sequentially grown on the N-type GaAs substrate. , P-type ohmic contact layer and transition bonding layer, the P-type ohmic contact layer and the transition bonding layer are both P-type GaP layers;

A composite bonding layer is formed on the transition bonding layer, the composite bonding layer is an Al 2 O 3 /Si 3 N 4 /SiO 2 composite layer, and the Al 2 O 3 in the composite bonding layer is The transition bonding layer is in contact;

Bonding the composite bonding layer to the sapphire substrate;

Removing the N-type GaAs substrate and the etch stop layer;

Forming an N-type electrode on the side of the N-type ohmic contact layer away from the sapphire substrate;

A P-type electrode is formed on the side of the P-type ohmic contact layer away from the sapphire substrate.
The manufacturing method according to claim 12, further comprising:

Before forming the composite bonding layer on the transition bonding layer, the side of the transition bonding layer away from the P-type ohmic contact layer is roughened.
The manufacturing method according to claim 13, wherein the roughening of the side of the transition bonding layer away from the P-type ohmic contact layer comprises:

Use an acid system roughening solution to roughen the side of the transition bonding layer away from the P-type ohmic contact layer. The acid system roughening solution includes HIO 4 , HF, H 2 SO 4 , and CH 3 COOH. At least one solution.
The manufacturing method according to any one of claims 12 to 14, wherein the forming a composite bonding layer on the transition bonding layer comprises:

Depositing an Al 2 O 3 layer, an Si 3 N 4 layer, and an SiO 2 layer on the transition bonding layer sequentially by using an electron beam evaporation method;

Polishing is performed on the side of the SiO 2 layer away from the transition bonding layer to obtain the composite bonding layer.
The manufacturing method according to claim 15, further comprising:

After polishing the side of the SiO 2 layer away from the transition bonding layer to obtain the composite bonding layer, the composite bonding layer is cleaned with an acid series solution, and the acid series solution includes At least one solution of H 2 SO 4 , H 2 O 2 , and H 3 PO 4.
The method according to any one of claims 12 to 16, further comprising:

Using atomic layer deposition technology to form a passivation layer on the N-type ohmic contact layer after removing the N-type GaAs substrate and the etch stop layer, the passivation layer is an Al 2 O 3 layer, and the passivation layer is an Al 2 O 3 layer. The deposition temperature of the chemical layer is 200°C to 250°C.
The method according to claim 17, further comprising:

A second reflective layer is formed on the passivation layer, and the second reflective layer has a titanium oxide TiOx/silicon oxide SiO x superlattice structure.
The method of claim 18, further comprising:

A pad is formed on the N-type electrode and the P-type electrode, and the pad is a Ti/Al/Ti/Ni/Pt/Ni/Au composite layer.
The method according to any one of claims 12 to 19, wherein the forming an N-type electrode on the side of the N-type ohmic contact layer away from the sapphire substrate comprises:

An AuGeNi layer, an Au layer, a Ni layer, a Pt layer and an Au layer are sequentially formed on the side of the N-type ohmic contact layer away from the sapphire substrate to obtain the N-type electrode;

The forming a P-type electrode on the side of the P-type ohmic contact layer away from the sapphire substrate includes:

An AuBe layer, an Au layer, a Pt layer, a Ti layer, and an Au layer are sequentially formed on the side of the P-type ohmic contact layer away from the sapphire substrate to obtain the P-type electrode.