WO2021145226A1 - Manufacturing device, manufacturing method, and semiconductor element - Google Patents

Manufacturing device, manufacturing method, and semiconductor element Download PDF

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Publication number
WO2021145226A1
WO2021145226A1 PCT/JP2021/000015 JP2021000015W WO2021145226A1 WO 2021145226 A1 WO2021145226 A1 WO 2021145226A1 JP 2021000015 W JP2021000015 W JP 2021000015W WO 2021145226 A1 WO2021145226 A1 WO 2021145226A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor substrate
pressing
manufacturing
bent
probe
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PCT/JP2021/000015
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French (fr)
Japanese (ja)
Inventor
龍将 平塚
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ソニーセミコンダクタソリューションズ株式会社
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Priority to JP2021571142A priority Critical patent/JPWO2021145226A1/ja
Publication of WO2021145226A1 publication Critical patent/WO2021145226A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N

Definitions

  • the present technology relates to a manufacturing apparatus, a manufacturing method, and a semiconductor element, and particularly to a manufacturing apparatus, a manufacturing method, and a semiconductor element suitable for use when joining semiconductor substrates.
  • a semiconductor chip (hereinafter, also simply referred to as a chip) is directly referred to as a semiconductor wafer (hereinafter, also simply referred to as a wafer).
  • a semiconductor wafer (hereinafter, also simply referred to as a wafer).
  • CoW (Chip on Wafer) and CoC (Chip on Chip) to be joined to the chip are being developed.
  • the bonding method for example, a full-face pressing method in which the entire chip is pressed by a flat bonding head to bond the entire chip, and a center push method in which the center of the chip is pressed with a dot-shaped probe is known as an application of WoW (Wafer on Wafer) technology. (See, for example, Patent Document 1).
  • the generation of voids due to the fine irregularities of the chip or wafer is unavoidable.
  • the shape of the joint portion (bonding wave) at the initial stage of joining is circular, and unbonded portions remain at the four corners in the end, so that voids are likely to occur.
  • This technology was made in view of such a situation, and makes it possible to suppress the generation of voids when joining semiconductor substrates such as chips.
  • a part of the joint surface of the first semiconductor substrate is linearly bent in the direction of the second semiconductor substrate, and then the first semiconductor substrate and the second semiconductor substrate are manufactured. Join the semiconductor substrates of.
  • the manufacturing apparatus of the second aspect of the present technology has a first holding portion for holding the first semiconductor substrate and a second holding for holding the second semiconductor substrate so as to face the first semiconductor substrate.
  • a portion and a pressing portion that linearly bends a part of the joint surface of the first semiconductor substrate in the direction of the second semiconductor substrate are provided, and after bending the first semiconductor substrate, the first The semiconductor substrate 1 and the second semiconductor substrate are joined.
  • the semiconductor element on the third side surface of the present technology includes a first semiconductor substrate and a second semiconductor substrate to be bonded to the first semiconductor substrate in which a part of the bonding surface is linearly bent. ..
  • the first semiconductor substrate and the second semiconductor substrate are used.
  • the semiconductor substrates are joined.
  • the first semiconductor substrate is held, the second semiconductor substrate is held so as to face the first semiconductor substrate, and one of the bonding surfaces of the first semiconductor substrate.
  • the portion is linearly bent in the direction of the second semiconductor substrate, and after the first semiconductor substrate is bent, the first semiconductor substrate and the second semiconductor substrate are joined.
  • the first semiconductor substrate in which a part of the bonding surface is bent linearly and the second semiconductor substrate are bonded.
  • the central circular region 11A of the rectangular semiconductor substrate 11 made of a semiconductor chip or the like is pressed by the point-shaped probe. Then, as shown by A to C in FIG. 1, the joint portion 11B extends radially from the center of the semiconductor substrate 11.
  • FIG. 2 shows a configuration example of the manufacturing apparatus 101 to which the present technology is applied.
  • FIG. 2A is a schematic view of the manufacturing apparatus 101 viewed from the side
  • FIG. 2B is a schematic view of the lower surface of the holding portion 111 of the manufacturing apparatus 101.
  • the side surface of the holding portion 111 seen in A in FIG. 2 is the side surface on the short side side of the holding portion 111 in B in FIG.
  • the manufacturing apparatus 101 is an apparatus for producing a semiconductor element by joining a semiconductor substrate 102 made of, for example, a chip and a semiconductor substrate 103 made of, for example, a wafer or a chip with CoW or CoC.
  • the material of the joint surface of the semiconductor substrate 102 and the joint surface of the semiconductor substrate 103 may be an insulator such as SiO2, SiCN, SiN, Si, InGaAs, or GaAs, or a metal such as Cu, Au, W, or Al. Further, the combination of the materials of the joint surface of the semiconductor substrate 102 and the joint surface of the semiconductor substrate 103 may be any of metal and metal, insulator and insulator, or insulator and metal. Further, the semiconductor substrate 102 and the semiconductor substrate 103 are rectangular, the aspect ratio exceeds 1, and the area of the semiconductor substrate 103 is equal to or larger than the semiconductor substrate 102.
  • the manufacturing apparatus 101 includes a holding unit 111, a probe 112, a holding unit 113, and a control unit 114.
  • the holding portion 111 is a jig that holds the semiconductor substrate 102 by adsorbing the upper surface (hereinafter, referred to as a pressing surface) of the semiconductor substrate 102 above the holding portion 113.
  • the probe 112 is a pressing body that is movable in the vertical direction with respect to the holding portion 111, projects downward from the holding portion 111 at the center in the short side direction of the holding portion 111, and presses the pressing surface of the semiconductor substrate 102. It constitutes a pressing part.
  • the contact surface of the probe 112 that comes into contact with the pressing surface of the semiconductor substrate 102 is an elongated rectangle (straight line) extending in the long side direction of the holding portion 111.
  • the holding portion 113 is a jig that holds the semiconductor substrate 103 by adsorbing the lower surface of the semiconductor substrate 103 below the holding portion 111.
  • the control unit 114 controls the operations of the holding unit 111, the probe 112, and the holding unit 113.
  • FIG. 3 schematically shows an example of the shape of the tip of the probe 112 when viewed from the direction of arrow A1, that is, when viewed from the short side of the probe 112.
  • the probe 112 presses the semiconductor substrate 102 in the direction of arrow A2, that is, in the downward direction perpendicular to the pressing surface of the semiconductor substrate 102.
  • the tip of the probe 112 has a sharp shape. Therefore, the contact surface of the probe 112 becomes a linear elongated rectangle.
  • the tip of the probe 112 has a curvature and is rounded. Therefore, the contact surface of the probe 112 becomes a linear elongated rectangle. Further, the pressing force is maximized at the center of the contact surface in the short side direction, and the pressing force becomes weaker as it approaches both ends in the short side direction.
  • the tip of the probe 112 is sharp, while the contact surface is flat, as in the example of A in FIG. Therefore, the contact surface of the probe 112 becomes a linear elongated rectangle, and the short side direction is longer than that of the example of A in FIG.
  • the tip of the probe 112 extends straight and vertically. Therefore, the contact surface of the probe 112 becomes a straight elongated rectangle, and the short side direction is longer than in other examples.
  • a to D of FIG. 4 are schematic views of the lower surface of the holding portion 111, and show an example of a suction mechanism for sucking the semiconductor substrate 102.
  • circular vacuum suction grooves 151 are arranged in two rows along the long side near both ends of the holding portion 111 in the short side direction. Then, the semiconductor substrate 102 is vacuum-sucked to the holding portion 111 by the vacuum suction groove 151.
  • the number of rows of the vacuum suction groove 151 in FIG. 4A is an example, and can be any number of rows. Further, for example, as shown in B of FIG. 4, the vacuum suction groove 151 may be arranged up to the vicinity of the probe 112.
  • elongated rectangular vacuum suction grooves 161-1 to vacuum suction grooves 161-4 are arranged along the long sides near both ends in the short side direction of the holding portion 111.
  • the vacuum suction groove 161-1 and the vacuum suction groove 161-2 are arranged in two rows along the long side near one end in the short side direction of the holding portion 111.
  • the vacuum suction grooves 161-3 and the vacuum suction grooves 161-4 are arranged in two rows along the long side near the other end in the short side direction of the holding portion 111. Then, the semiconductor substrate 102 is vacuum-sucked to the holding portion 111 by the vacuum suction grooves 161-1 to the vacuum suction grooves 161-4.
  • the number of rows of the vacuum suction groove 161 of C in FIG. 4 is an example, and can be any number of rows. Further, for example, the vacuum suction groove 161 may be arranged up to the vicinity of the probe 112 as in the example of B in FIG.
  • the electrostatic adsorption mechanism 171-1 and the electrostatic adsorption mechanism 171-2 are provided along the long side near both ends in the short side direction of the holding portion 111, respectively. Then, the semiconductor substrate 102 is electrostatically adsorbed on the holding portion 111 by the electrostatic adsorption mechanism 171-1 and the electrostatic adsorption mechanism 171-2.
  • the holding portion 113 can also be provided with the same suction mechanism of the holding portion 111.
  • the vertical direction will be the Z-axis direction.
  • the semiconductor substrate 102 is adsorbed by the holding unit 111, and the semiconductor substrate 103 is adsorbed by the holding unit 113.
  • the joint surface of the semiconductor substrate 102 and the joint surface of the semiconductor substrate 103 face each other in parallel.
  • the long side of the semiconductor substrate 102 is parallel to the long side of the contact surface of the probe 112, and the short side of the contact surface of the probe 112 comes into contact with the center of the pressing surface of the semiconductor substrate 102 in the short side direction.
  • the semiconductor substrate 102 is arranged there.
  • the probe 112 moves vertically downward, and the holding portion 113 is lifted vertically upward.
  • the tip of the probe 112 projects vertically downward from the lower surface of the holding portion 111, and presses the pressing surface of the semiconductor substrate 102.
  • the vicinity of the center of the joint surface of the semiconductor substrate 102 in the short side direction bends in the direction of the semiconductor substrate 103 in a straight line parallel to the long side.
  • the semiconductor substrate 103 is pressed against the bent portion of the joint surface of the semiconductor substrate 102.
  • the holding portion 113 is lifted vertically upward, and the probe 112 moves vertically upward.
  • the bending of the semiconductor substrate 102 is eliminated, and the bonding between the bonding surface of the semiconductor substrate 102 and the bonding surface of the semiconductor substrate 103 proceeds.
  • the bonding surface of the semiconductor substrate 102 and the bonding surface of the semiconductor substrate 103 are bonded.
  • the holding portion 111 may be moved vertically downward. Further, for example, the holding portion 111 may be moved vertically downward and the holding portion 113 may be moved vertically upward.
  • the vertical relationship between the semiconductor substrate 102 (holding unit 111) and the semiconductor substrate 103 (holding unit 113) may be reversed.
  • the semiconductor substrate 102 may be arranged below the semiconductor substrate 103, the pressing surface of the semiconductor substrate 102 may be pressed vertically upward by the probe 112, and the semiconductor substrate 102 may be bent in the direction of the semiconductor substrate 103.
  • the semiconductor substrate 102 is adsorbed by the holding portion 111, and the semiconductor substrate 103 is adsorbed by the holding portion 113, as in A of FIG.
  • the probe 112 moves vertically downward.
  • the tip of the probe 112 projects vertically downward from the lower surface of the holding portion 111, and presses the pressing surface of the semiconductor substrate 102.
  • the vicinity of the center of the joint surface of the semiconductor substrate 102 in the short side direction bends in the direction of the semiconductor substrate 103 in a straight line parallel to the long side.
  • the probe 112 moves vertically downward until the bent portion of the joint surface of the semiconductor substrate 102 comes into contact with and is pressed against the joint surface of the semiconductor substrate 103.
  • FIG. 7 schematically shows the bonding state of the semiconductor substrate 102 with the semiconductor substrate 103 when the manufacturing apparatus 101 is used.
  • the white part in the figure shows the joined part, and the shaded part shows the unjoined part.
  • the portion shown by the dotted line indicates a portion where the contact surface of the probe 112 is in contact with the pressing surface of the semiconductor substrate 102 and the semiconductor substrate 102 is pressed by the probe 112 (hereinafter, referred to as a pressing portion).
  • a in FIG. 7 shows a bonding state immediately after the bonding surface of the semiconductor substrate 102 pressed by the probe 112 comes into contact with the bonding surface of the semiconductor substrate 103.
  • the pressed portion of the bonding surface of the semiconductor substrate 102 is bonded to the semiconductor substrate 103, and the bonding portion is slightly widened in the short side direction in the vicinity of the short side of the bonding surface of the semiconductor substrate 102.
  • the bonding wave proceeds substantially parallel to the short side of the bonding surface of the semiconductor substrate 102, centering on the pressed portion. Further, the progress of the bonding wave is slightly faster at the end portion on the short side side than near the center of the bonding surface of the semiconductor substrate 102. Therefore, unlike the center push method described above with reference to FIG. 1, the semiconductor substrate 102 is joined as shown in B and C of FIG. 7 without leaving unbonded portions at the four corners of the joining surface of the semiconductor substrate 102. An unjoined part remains near the center of the long side of the surface. Therefore, finally, as shown in D of FIG. 7, the unbonded portion of the bonding surface of the semiconductor substrate 102 disappears, and the entire bonding surface of the semiconductor substrate 102 is bonded to the bonding surface of the semiconductor substrate 103.
  • FIG. 8 shows an example of the traveling direction of the bonding wave.
  • a of FIG. 8 shows the traveling direction of the bonding wave when the point probe is used
  • B of FIG. 8 shows the traveling direction of the bonding wave when the probe 112 is used.
  • the arrow in the figure indicates the traveling direction of the bonding wave
  • the portion indicated by the dotted line indicates the portion pressed by the probe.
  • FIG. 8B an example is shown in which the long side of the contact surface of the probe 112 is shorter than the long side of the semiconductor substrate 102.
  • the bonding wave extends radially from the center of the bonding surface of the semiconductor substrate 102.
  • the bonding wave spreads in a direction substantially parallel to the short side, centering on the pressed portion of the bonding surface of the semiconductor substrate 102.
  • the moving distance of the bonding wave is shorter than when the point probe is used, and as a result, the bonding distortion of the semiconductor substrate 102 is reduced.
  • the direction of the junction distortion is the direction in which the junction distortion spreads radially from the center of the semiconductor substrate 102.
  • the direction of the bonding strain is substantially parallel to the short side with the pressed portion of the bonding surface of the semiconductor substrate 102 as the center. Therefore, for example, by confirming the misalignment direction of the alignment mark of the semiconductor substrate 102 after bonding, it is possible to identify which of the point probe and the probe 112 is used for bonding.
  • the long side of the contact surface of the probe 112 may be, for example, the same length as the long side of the semiconductor substrate 102 as shown in A of FIG. 9, or the long side of the semiconductor substrate 102 as shown in B of FIG. It may be longer than the long side.
  • the length of the long side of the semiconductor substrate 102 is Lx
  • the length of the short side is Ly
  • the distance between the pressed portion by the probe 112 and the short side of the semiconductor substrate 102 is lp
  • the pressed portion by the probe 112 and the semiconductor substrate Let ly be the distance between the long side of 102 and lp be the length of the long side of the contact surface of the probe 112.
  • the generation of voids can be suppressed by setting the length lp of the long side of the contact surface of the probe 112 so as to satisfy the equation (4).
  • the size and thickness of the semiconductor substrate 102 are not particularly limited.
  • the long side of the semiconductor substrate 102 is 300 mm or less, the short side is 3 mm or more, and the thickness is 775 ⁇ m or less.
  • the semiconductor substrate 103 may have a shape other than a rectangle, for example, a circle or the like.
  • a pressing portion in which a plurality of point-shaped probes whose contact surfaces are point-shaped pressing bodies are arranged in a straight line is used to move the vicinity of the center of the pressing surface of the semiconductor substrate 102 in the short side direction. , You may press it parallel to the long side.
  • the point-shaped probes 201-1 to the point-shaped probes 201-5 are arranged parallel to the long side in the vicinity of the center in the short side direction of the pressing surface of the semiconductor substrate 102. ing.
  • the punctate probe 201 when it is not necessary to individually distinguish the punctate probe 201-1 to the punctate probe 201-5, it is simply referred to as the punctate probe 201.
  • the long side is located near the center of the joint surface of the semiconductor substrate 102 in the short side direction, as in the case of using the probe 112. It bends in the direction of the semiconductor substrate 103 in a straight line parallel to the semiconductor substrate 103. As a result, the bonding wave proceeds in the direction of the short side of the bonding surface of the semiconductor substrate 102, and the generation of voids is suppressed.
  • a to D in FIG. 11 schematically show the shape of the tip of the point probe 201.
  • the tip of the point probe 201 has a sharp shape. Therefore, the contact surface of the point probe 201 becomes substantially a point.
  • the tip of the point probe 201 has a curvature and is rounded. Therefore, the contact surface of the point probe 201 has a circular point shape larger than the example of A in FIG. Further, the pressing force becomes stronger as it approaches the center of the contact surface, and becomes weaker as it moves away from the center of the contact surface.
  • the tip of the point probe 201 is sharp, but the contact surface is flat, as in the example of A in FIG. Therefore, the contact surface of the point probe 201 has a circular point shape larger than the example of A in FIG. 11, and the force is applied to the contact surface substantially evenly.
  • the tip of the point probe 201 extends straight and vertically. Therefore, the contact surface of the point probe 201 has a circular point shape, and the contact surface is larger than in other examples. In addition, the force is applied to the contact surface almost evenly.
  • the pressure sensor 202-1 to the pressure sensor 202-5 may be provided at the tips of the point probe 201-1 to the point probe 201-5, respectively. Then, for example, the control unit 114 detects the pressing force of each point probe 201 based on the sensor data from the pressure sensor 202-1 to the pressure sensor 202-5, and based on the detection result, each point probe.
  • the pressing force of 201 may be controlled to be substantially uniform.
  • the number of punctate probes 201 is not particularly limited as long as it is 2 or more. However, the larger the number of punctate probes 201 and the shorter the interval between the punctate probes 201, the closer the effect of suppressing voids is to the probe 112. On the other hand, even if the number of punctate probes 201 is two, the effect of suppressing voids is greater than in the case of one.
  • the present technology can also have the following configurations.
  • the first semiconductor substrate is rectangular and has a rectangular shape.
  • the manufacturing method according to (1) wherein the vicinity of the center of the joint surface of the first semiconductor substrate is bent in a straight line substantially parallel to the side of the first semiconductor substrate.
  • the aspect ratio of the first semiconductor substrate exceeds 1, The manufacturing method according to (2) above, wherein the vicinity of the center of the joint surface of the first semiconductor substrate is bent in a straight line substantially parallel to the long side of the first semiconductor substrate.
  • the first semiconductor substrate is bent by pressing the vicinity of the center of the pressing surface on the opposite side of the bonding surface of the first semiconductor substrate with a pressing body having a linear contact surface. Manufacturing method. (5) By pressing the pressing body near the center of the pressing surface of the first semiconductor substrate so that the long side of the contact surface is substantially parallel to the long side of the first semiconductor substrate, the first The manufacturing method according to (4) above, which bends the semiconductor substrate. (6) The manufacturing method according to (4) or (5) above, wherein the length of the long side of the contact surface is (the long side of the first semiconductor substrate-the short side of the first semiconductor substrate) or more.
  • the first semiconductor substrate is placed above the second semiconductor substrate in a state of being adsorbed by the adsorption mechanism. By bending the joint surface of the first semiconductor substrate with the pressing body, the contact surface with the second semiconductor substrate is brought into contact with the second semiconductor substrate.
  • the manufacturing method according to any one of. (13) The manufacturing method according to any one of (1) to (12), wherein the area of the second semiconductor substrate is larger than that of the first semiconductor substrate.
  • a first holding portion for holding the first semiconductor substrate and A second holding portion that holds the second semiconductor substrate so as to face the first semiconductor substrate, A pressing portion that linearly bends a part of the joint surface of the first semiconductor substrate in the direction of the second semiconductor substrate is provided.
  • the pressing part is It has a pressing body with a straight contact surface, The manufacturing apparatus according to (14), wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface by the pressing body.
  • the first holding portion attracts the first semiconductor substrate above the second semiconductor substrate, and the pressing portion bends the joint surface of the first semiconductor substrate, whereby the second The manufacturing apparatus according to (14) or (15), wherein the adsorption of the first semiconductor substrate is stopped after the semiconductor substrate is brought into contact with the joint surface of the semiconductor substrate.
  • the pressing part is It has a plurality of pressing bodies arranged in a straight line and having a point-shaped contact surface. The manufacturing apparatus according to (14), wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface by the plurality of pressing bodies.
  • the above (18) further includes a control unit that controls the pressing force of each pressing body so as to be substantially uniform based on the result of detecting the pressing force by a sensor provided at the tip of each pressing body.
  • Manufacturing equipment (20) The first semiconductor substrate and A semiconductor device including a second semiconductor substrate to be bonded to the first semiconductor substrate in which a part of the bonding surface is bent linearly.

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

This technology relates to a manufacturing device, a manufacturing method and a semiconductor element that make it possible to suppress the occurrence of voids when semiconductor substrates for chips, etc. are joined. This manufacturing device comprises: a first holding unit for holding a first semiconductor substrate; a second holding unit for holding a second semiconductor substrate so as to oppose the first semiconductor substrate; and a pressing unit for bending a portion of a joining surface of the first semiconductor substrate linearly in the direction toward the second semiconductor substrate. After bending the first semiconductor substrate, the manufacturing device joins the first semiconductor substrate and the second semiconductor substrate together. This technology can be applied to, for example, a manufacturing device for joining semiconductor substrates.

Description

製造装置、製造方法、及び、半導体素子Manufacturing equipment, manufacturing methods, and semiconductor devices
　本技術は、製造装置、製造方法、及び、半導体素子に関し、特に、半導体基板を接合する場合に用いて好適な製造装置、製造方法、及び、半導体素子に関する。 The present technology relates to a manufacturing apparatus, a manufacturing method, and a semiconductor element, and particularly to a manufacturing apparatus, a manufacturing method, and a semiconductor element suitable for use when joining semiconductor substrates.
　従来、大判カメラ向けセンサのコスト削減や、複数のロジック回路やメモリチップの混載を可能にする接合技術として、半導体チップ（以下、単にチップとも称する）を直接半導体ウエハ（以下、単にウエハとも称する）又はチップに接合するＣｏＷ（Chip on Wafer）及びＣｏＣ（Chip on Chip）の開発が行われている。その接合方法として、例えば、平らなボンディングヘッドによりチップ全体を押し付けて接合する全面押し付け方式や、ＷｏＷ（Wafer on Wafer）技術の応用として、チップ中央を点状のプローブで押しつけるセンタープッシュ方式が知られている（例えば、特許文献１参照）。 Conventionally, as a bonding technology that enables cost reduction of sensors for large format cameras and mixed mounting of multiple logic circuits and memory chips, a semiconductor chip (hereinafter, also simply referred to as a chip) is directly referred to as a semiconductor wafer (hereinafter, also simply referred to as a wafer). Alternatively, CoW (Chip on Wafer) and CoC (Chip on Chip) to be joined to the chip are being developed. As the bonding method, for example, a full-face pressing method in which the entire chip is pressed by a flat bonding head to bond the entire chip, and a center push method in which the center of the chip is pressed with a dot-shaped probe is known as an application of WoW (Wafer on Wafer) technology. (See, for example, Patent Document 1).
特開２０１２－１７５０４３号公報Japanese Unexamined Patent Publication No. 2012-175043
　しかしながら、チップ全面押し付け方式では、チップ又はウエハが有する微細な凹凸起因のボイドの発生が避けられない。センタープッシュ方式では、接合初期における接合部（ボンディングウエーブ）の形状が円形となり、最終的に四隅に未接合部分が残るため、ボイドが発生しやすい。 However, in the chip full-face pressing method, the generation of voids due to the fine irregularities of the chip or wafer is unavoidable. In the center push method, the shape of the joint portion (bonding wave) at the initial stage of joining is circular, and unbonded portions remain at the four corners in the end, so that voids are likely to occur.
　本技術は、このような状況に鑑みてなされたものであり、チップ等の半導体基板の接合時のボイドの発生を抑制できるようにするものである。 This technology was made in view of such a situation, and makes it possible to suppress the generation of voids when joining semiconductor substrates such as chips.
　本技術の第１の側面の製造方法は、第１の半導体基板の接合面の一部を直線状に第２の半導体基板の方向に撓ませた後、前記第１の半導体基板と前記第２の半導体基板を接合する。 In the method for manufacturing the first aspect of the present technology, a part of the joint surface of the first semiconductor substrate is linearly bent in the direction of the second semiconductor substrate, and then the first semiconductor substrate and the second semiconductor substrate are manufactured. Join the semiconductor substrates of.
　本技術の第２の側面の製造装置は、第１の半導体基板を保持する第１の保持部と、前記第１の半導体基板と対向するように第２の半導体基板を保持する第２の保持部と、前記第１の半導体基板の接合面の一部を直線状に前記第２の半導体基板の方向に撓ませる押圧部とを備え、前記第１の半導体基板を撓ませた後、前記第１の半導体基板と前記第２の半導体基板を接合する。 The manufacturing apparatus of the second aspect of the present technology has a first holding portion for holding the first semiconductor substrate and a second holding for holding the second semiconductor substrate so as to face the first semiconductor substrate. A portion and a pressing portion that linearly bends a part of the joint surface of the first semiconductor substrate in the direction of the second semiconductor substrate are provided, and after bending the first semiconductor substrate, the first The semiconductor substrate 1 and the second semiconductor substrate are joined.
　本技術の第３の側面の半導体素子は、第１の半導体基板と、接合面の一部が直線状に撓まされた前記第１の半導体基板と接合される第２の半導体基板とを備える。 The semiconductor element on the third side surface of the present technology includes a first semiconductor substrate and a second semiconductor substrate to be bonded to the first semiconductor substrate in which a part of the bonding surface is linearly bent. ..
　本技術の第１の側面においては、第１の半導体基板の接合面の一部が直線状に第２の半導体基板の方向に撓まされた後、前記第１の半導体基板と前記第２の半導体基板が接合される。 In the first aspect of the present technology, after a part of the bonding surface of the first semiconductor substrate is linearly bent in the direction of the second semiconductor substrate, the first semiconductor substrate and the second semiconductor substrate are used. The semiconductor substrates are joined.
　本技術の第２の側面においては、第１の半導体基板が保持され、前記第１の半導体基板と対向するように第２の半導体基板が保持され、前記第１の半導体基板の接合面の一部を直線状に前記第２の半導体基板の方向に撓ませされ、前記第１の半導体基板が撓まされた後、前記第１の半導体基板と前記第２の半導体基板が接合される。 In the second aspect of the present technology, the first semiconductor substrate is held, the second semiconductor substrate is held so as to face the first semiconductor substrate, and one of the bonding surfaces of the first semiconductor substrate. The portion is linearly bent in the direction of the second semiconductor substrate, and after the first semiconductor substrate is bent, the first semiconductor substrate and the second semiconductor substrate are joined.
　本技術の第３の側面においては、接合面の一部が直線状に撓まされた第１の半導体基板と第２の半導体基板とが接合される。 In the third aspect of the present technology, the first semiconductor substrate in which a part of the bonding surface is bent linearly and the second semiconductor substrate are bonded.
センタープッシュ方式の問題点を説明するための図である。It is a figure for demonstrating the problem of the center push system. 本技術を適用した製造装置の構成例を示す模式図である。It is a schematic diagram which shows the structural example of the manufacturing apparatus to which this technique is applied. 製造装置のプローブの先端の形状の例を示す模式図である。It is a schematic diagram which shows the example of the shape of the tip of the probe of a manufacturing apparatus. 製造装置の保持部の吸着機構の構成例を示す模式図である。It is a schematic diagram which shows the structural example of the suction mechanism of the holding part of a manufacturing apparatus. 半導体基板の第１の接合方法を説明するための図である。It is a figure for demonstrating the 1st bonding method of a semiconductor substrate. 半導体基板の第２の接合方法を説明するための図である。It is a figure for demonstrating the 2nd bonding method of a semiconductor substrate. 本技術の効果を説明するための図である。It is a figure for demonstrating the effect of this technique. 本技術の効果を説明するための図である。It is a figure for demonstrating the effect of this technique. プローブの接触面の長辺の長さの例を示す図である。It is a figure which shows the example of the length of the long side of the contact surface of a probe. プローブの接触面の長辺の長さの条件を説明するための図である。It is a figure for demonstrating the condition of the length of the long side of the contact surface of a probe. プローブの変形例を示す模式図である。It is a schematic diagram which shows the modification of a probe.
　以下、本技術を実施するための形態（以下、実施の形態とする）について説明する。なお、説明は以下の順序で行う。
　１．センタープッシュ方式の問題点
　２．実施の形態
　３．変形例
　４．その他 Hereinafter, embodiments for carrying out the present technology (hereinafter referred to as embodiments) will be described. The explanation will be given in the following order.
1. 1. Problems with the center push method 2. Embodiment 3. Modification example 4. others
　＜＜１．センタープッシュ方式の問題点＞＞
　まず、図１を参照して、センタープッシュ方式の問題点について説明する。 << 1. Problems with the center push method >>
First, the problem of the center push method will be described with reference to FIG.
　センタープッシュ方式では、半導体チップ等からなる矩形の半導体基板１１の中央の円形の領域１１Ａが、点状のプローブにより押下される。そして、図１のＡ乃至Ｃにより示されるように、接合部１１Ｂが、半導体基板１１の中央から放射状に広がっていく。 In the center push method, the central circular region 11A of the rectangular semiconductor substrate 11 made of a semiconductor chip or the like is pressed by the point-shaped probe. Then, as shown by A to C in FIG. 1, the joint portion 11B extends radially from the center of the semiconductor substrate 11.
　そのため、図１のＣに示されるように、半導体基板１１の四隅に未接合部分が残り、ボイド発生のリスクがある。また、半導体基板１１の中央から放射状にボンディングウエーブが進行することにより、半導体基板１１の歪みが大きくなるおそれがある。 Therefore, as shown in C of FIG. 1, unbonded portions remain at the four corners of the semiconductor substrate 11, and there is a risk of void generation. Further, as the bonding wave progresses radially from the center of the semiconductor substrate 11, the distortion of the semiconductor substrate 11 may increase.
　＜＜２．実施の形態＞＞
　次に、図２乃至図１０を参照して、本技術の実施の形態について説明する。 << 2. Embodiment >>
Next, an embodiment of the present technology will be described with reference to FIGS. 2 to 10.
　　＜製造装置の構成例＞
　図２は、本技術を適用した製造装置１０１の構成例を示している。図２のＡは、製造装置１０１を横から見た模式図であり、図２のＢは、製造装置１０１の保持部１１１の下面の模式図である。なお、図２のＡで見えている保持部１１１の側面は、図２のＢにおける保持部１１１の短辺側の側面である。 <Configuration example of manufacturing equipment>
FIG. 2 shows a configuration example of the manufacturing apparatus 101 to which the present technology is applied. FIG. 2A is a schematic view of the manufacturing apparatus 101 viewed from the side, and FIG. 2B is a schematic view of the lower surface of the holding portion 111 of the manufacturing apparatus 101. The side surface of the holding portion 111 seen in A in FIG. 2 is the side surface on the short side side of the holding portion 111 in B in FIG.
　製造装置１０１は、ＣｏＷ又はＣｏＣにより、例えばチップからなる半導体基板１０２と、例えばウエハ又はチップからなる半導体基板１０３とを接合し、半導体素子を生成する装置である。 The manufacturing apparatus 101 is an apparatus for producing a semiconductor element by joining a semiconductor substrate 102 made of, for example, a chip and a semiconductor substrate 103 made of, for example, a wafer or a chip with CoW or CoC.
　なお、半導体基板１０２の接合面及び半導体基板１０３の接合面の材質は、ＳｉＯ２、ＳｉＣＮ、ＳｉＮ、Ｓｉ、ＩｎＧａＡｓ、ＧａＡｓ等の絶縁体でもよく、Ｃｕ、Ａｕ、Ｗ、Ａｌ等の金属でもよい。また、半導体基板１０２の接合面と半導体基板１０３の接合面の材質の組み合わせは、金属と金属、絶縁体と絶縁体、又は、絶縁体と金属のいずれでもよい。さらに、半導体基板１０２及び半導体基板１０３は矩形であり、アスペクト比は１を超え、半導体基板１０３の面積は半導体基板１０２以上とされる。 The material of the joint surface of the semiconductor substrate 102 and the joint surface of the semiconductor substrate 103 may be an insulator such as SiO2, SiCN, SiN, Si, InGaAs, or GaAs, or a metal such as Cu, Au, W, or Al. Further, the combination of the materials of the joint surface of the semiconductor substrate 102 and the joint surface of the semiconductor substrate 103 may be any of metal and metal, insulator and insulator, or insulator and metal. Further, the semiconductor substrate 102 and the semiconductor substrate 103 are rectangular, the aspect ratio exceeds 1, and the area of the semiconductor substrate 103 is equal to or larger than the semiconductor substrate 102.
　製造装置１０１は、保持部１１１、プローブ１１２、保持部１１３、及び、制御部１１４を備える。 The manufacturing apparatus 101 includes a holding unit 111, a probe 112, a holding unit 113, and a control unit 114.
　保持部１１１は、保持部１１３の上方において、半導体基板１０２の上面（以下、押下面と称する）を吸着することにより、半導体基板１０２を保持する治具である。 The holding portion 111 is a jig that holds the semiconductor substrate 102 by adsorbing the upper surface (hereinafter, referred to as a pressing surface) of the semiconductor substrate 102 above the holding portion 113.
　プローブ１１２は、保持部１１１に対して上下方向に移動可能であり、保持部１１１の短辺方向の中央において保持部１１１の下方に突出し、半導体基板１０２の押下面を押下する押圧体であり、押圧部を構成する。プローブ１１２の半導体基板１０２の押下面と接触する接触面は、保持部１１１の長辺方向に延びる細長い矩形（直線状）である。 The probe 112 is a pressing body that is movable in the vertical direction with respect to the holding portion 111, projects downward from the holding portion 111 at the center in the short side direction of the holding portion 111, and presses the pressing surface of the semiconductor substrate 102. It constitutes a pressing part. The contact surface of the probe 112 that comes into contact with the pressing surface of the semiconductor substrate 102 is an elongated rectangle (straight line) extending in the long side direction of the holding portion 111.
　保持部１１３は、保持部１１１の下方において、半導体基板１０３の下面を吸着することにより、半導体基板１０３を保持する治具である。 The holding portion 113 is a jig that holds the semiconductor substrate 103 by adsorbing the lower surface of the semiconductor substrate 103 below the holding portion 111.
　制御部１１４は、保持部１１１、プローブ１１２、及び、保持部１１３の動作の制御を行う。 The control unit 114 controls the operations of the holding unit 111, the probe 112, and the holding unit 113.
　　＜プローブ１１２の先端の形状＞
　図３は、プローブ１１２を矢印Ａ１の方向から見た、すなわち、プローブ１１２の短辺側から見た先端の形状の例を模式的に示している。なお、プローブ１１２は、矢印Ａ２の方向、すなわち、半導体基板１０２の押下面に対して垂直下方向に半導体基板１０２を押下する。 <Shape of tip of probe 112>
FIG. 3 schematically shows an example of the shape of the tip of the probe 112 when viewed from the direction of arrow A1, that is, when viewed from the short side of the probe 112. The probe 112 presses the semiconductor substrate 102 in the direction of arrow A2, that is, in the downward direction perpendicular to the pressing surface of the semiconductor substrate 102.
　図３のＡの例では、プローブ１１２の先端が尖った形状になっている。従って、プローブ１１２の接触面は、直線状の細長い矩形となる。 In the example of A in FIG. 3, the tip of the probe 112 has a sharp shape. Therefore, the contact surface of the probe 112 becomes a linear elongated rectangle.
　図３のＢの例では、プローブ１１２の先端が曲率を有し、丸みを帯びている。従って、プローブ１１２の接触面は、直線状の細長い矩形となる。また、接触面の短辺方向の中央において押圧力が最大になり、短辺方向の両端に近づくほど押圧力が弱くなる。 In the example of B in FIG. 3, the tip of the probe 112 has a curvature and is rounded. Therefore, the contact surface of the probe 112 becomes a linear elongated rectangle. Further, the pressing force is maximized at the center of the contact surface in the short side direction, and the pressing force becomes weaker as it approaches both ends in the short side direction.
　図３のＣの例では、図３のＡの例と同様に、プローブ１１２の先端が尖っている一方、接触面が平坦になっている。従って、プローブ１１２の接触面は、直線状の細長い矩形となり、図３のＡの例より短辺方向が長くなる。 In the example of C in FIG. 3, the tip of the probe 112 is sharp, while the contact surface is flat, as in the example of A in FIG. Therefore, the contact surface of the probe 112 becomes a linear elongated rectangle, and the short side direction is longer than that of the example of A in FIG.
　図３のＤの例では、プローブ１１２の先端がまっすぐ垂直に延びている。従って、プローブ１１２の接触面は、直線状の細長い矩形となり、他の例より短辺方向が長くなる。 In the example of D in FIG. 3, the tip of the probe 112 extends straight and vertically. Therefore, the contact surface of the probe 112 becomes a straight elongated rectangle, and the short side direction is longer than in other examples.
　　＜保持部１１１の吸着機構＞
　図４のＡ乃至Ｄは、保持部１１１の下面の模式図であり、半導体基板１０２を吸着する吸着機構の例を示している。 <Suction mechanism of holding unit 111>
A to D of FIG. 4 are schematic views of the lower surface of the holding portion 111, and show an example of a suction mechanism for sucking the semiconductor substrate 102.
　図４のＡの例では、円形の真空吸着溝１５１が、保持部１１１の短辺方向の両端付近に長辺に沿ってそれぞれ２列に並べられている。そして、半導体基板１０２が、真空吸着溝１５１により保持部１１１に真空吸着される。 In the example of A in FIG. 4, circular vacuum suction grooves 151 are arranged in two rows along the long side near both ends of the holding portion 111 in the short side direction. Then, the semiconductor substrate 102 is vacuum-sucked to the holding portion 111 by the vacuum suction groove 151.
　なお、図４のＡの真空吸着溝１５１の列数は一例であり、任意の列数とすることができる。また、例えば、図４のＢに示されるように、真空吸着溝１５１をプローブ１１２周辺まで配置するようにしてもよい。 The number of rows of the vacuum suction groove 151 in FIG. 4A is an example, and can be any number of rows. Further, for example, as shown in B of FIG. 4, the vacuum suction groove 151 may be arranged up to the vicinity of the probe 112.
　図４のＣの例では、細長い矩形の真空吸着溝１６１－１乃至真空吸着溝１６１－４が、保持部１１１の短辺方向の両端付近に長辺に沿って並べられている。具体的には、真空吸着溝１６１－１及び真空吸着溝１６１－２は、保持部１１１の短辺方向の一方の端付近に、長辺にそって２列に並べられている。真空吸着溝１６１－３及び真空吸着溝１６１－４は、保持部１１１の短辺方向の他方の端付近に、長辺にそって２列に並べられている。そして、真空吸着溝１６１－１乃至真空吸着溝１６１－４により、半導体基板１０２が保持部１１１に真空吸着される。 In the example of C in FIG. 4, elongated rectangular vacuum suction grooves 161-1 to vacuum suction grooves 161-4 are arranged along the long sides near both ends in the short side direction of the holding portion 111. Specifically, the vacuum suction groove 161-1 and the vacuum suction groove 161-2 are arranged in two rows along the long side near one end in the short side direction of the holding portion 111. The vacuum suction grooves 161-3 and the vacuum suction grooves 161-4 are arranged in two rows along the long side near the other end in the short side direction of the holding portion 111. Then, the semiconductor substrate 102 is vacuum-sucked to the holding portion 111 by the vacuum suction grooves 161-1 to the vacuum suction grooves 161-4.
　なお、図４のＣの真空吸着溝１６１の列数は一例であり、任意の列数とすることができる。また、例えば、図４のＢの例と同様に、真空吸着溝１６１をプローブ１１２周辺まで配置するようにしてもよい。 The number of rows of the vacuum suction groove 161 of C in FIG. 4 is an example, and can be any number of rows. Further, for example, the vacuum suction groove 161 may be arranged up to the vicinity of the probe 112 as in the example of B in FIG.
　図４のＤの例では、静電吸着機構１７１－１及び静電吸着機構１７１－２が、それぞれ保持部１１１の短辺方向の両端付近に、長辺に沿って設けられている。そして、静電吸着機構１７１－１及び静電吸着機構１７１－２により、半導体基板１０２が保持部１１１に静電吸着される。 In the example of D in FIG. 4, the electrostatic adsorption mechanism 171-1 and the electrostatic adsorption mechanism 171-2 are provided along the long side near both ends in the short side direction of the holding portion 111, respectively. Then, the semiconductor substrate 102 is electrostatically adsorbed on the holding portion 111 by the electrostatic adsorption mechanism 171-1 and the electrostatic adsorption mechanism 171-2.
　なお、保持部１１３においても、保持部１１１の同様の吸着機構を設けることが可能である。 The holding portion 113 can also be provided with the same suction mechanism of the holding portion 111.
　　＜半導体基板の第１の接合方法＞
　次に、図５を参照して、Ｚ軸制御方式により半導体基板１０２と半導体基板１０３を接合する方法について説明する。 <First bonding method for semiconductor substrates>
Next, with reference to FIG. 5, a method of joining the semiconductor substrate 102 and the semiconductor substrate 103 by the Z-axis control method will be described.
　なお、以下、垂直方向をＺ軸方向とする。 In the following, the vertical direction will be the Z-axis direction.
　まず、図５のＡに示されるように、半導体基板１０２が保持部１１１により吸着され、半導体基板１０３が保持部１１３により吸着される。これにより、半導体基板１０２の接合面と半導体基板１０３の接合面が、平行に対向する。 First, as shown in A of FIG. 5, the semiconductor substrate 102 is adsorbed by the holding unit 111, and the semiconductor substrate 103 is adsorbed by the holding unit 113. As a result, the joint surface of the semiconductor substrate 102 and the joint surface of the semiconductor substrate 103 face each other in parallel.
　また、半導体基板１０２の長辺が、プローブ１１２の接触面の長辺と平行になり、半導体基板１０２の押下面の短辺方向の中央付近に、プローブ１１２の接触面の短辺が接触するように、半導体基板１０２が配置される。 Further, the long side of the semiconductor substrate 102 is parallel to the long side of the contact surface of the probe 112, and the short side of the contact surface of the probe 112 comes into contact with the center of the pressing surface of the semiconductor substrate 102 in the short side direction. The semiconductor substrate 102 is arranged there.
　次に、図５のＢに示されるように、プローブ１１２が垂直下方向に移動するとともに、保持部１１３が垂直上方向に持ち上げられる。これにより、プローブ１１２の先端が、保持部１１１の下面から垂直下方向に突出し、半導体基板１０２の押下面を押下する。その結果、半導体基板１０２の接合面の短辺方向の中央付近が、長辺に対して平行な直線状に半導体基板１０３の方向に撓む。また、図５のＣに示されるように、半導体基板１０２の接合面の撓んでいる部分に、半導体基板１０３が押し付けられる。 Next, as shown in B of FIG. 5, the probe 112 moves vertically downward, and the holding portion 113 is lifted vertically upward. As a result, the tip of the probe 112 projects vertically downward from the lower surface of the holding portion 111, and presses the pressing surface of the semiconductor substrate 102. As a result, the vicinity of the center of the joint surface of the semiconductor substrate 102 in the short side direction bends in the direction of the semiconductor substrate 103 in a straight line parallel to the long side. Further, as shown in FIG. 5C, the semiconductor substrate 103 is pressed against the bent portion of the joint surface of the semiconductor substrate 102.
　そして、さらに、保持部１１３が垂直上方向に持ち上げられるとともに、プローブ１１２が垂直上方向に移動する。これにより、半導体基板１０２の撓みが解消されるとともに、半導体基板１０２の接合面と半導体基板１０３の接合面との接合が進行する。その結果、最終的に、図５のＤに示されるように、半導体基板１０２の接合面と半導体基板１０３の接合面が接合される。 Further, the holding portion 113 is lifted vertically upward, and the probe 112 moves vertically upward. As a result, the bending of the semiconductor substrate 102 is eliminated, and the bonding between the bonding surface of the semiconductor substrate 102 and the bonding surface of the semiconductor substrate 103 proceeds. As a result, finally, as shown in D of FIG. 5, the bonding surface of the semiconductor substrate 102 and the bonding surface of the semiconductor substrate 103 are bonded.
　なお、例えば、保持部１１３の代わりに、保持部１１１を垂直下方向に移動させるようにしてもよい。また、例えば、保持部１１１を垂直下方向に移動させるとともに、保持部１１３を垂直上方向に移動させるようにしてもよい。 Note that, for example, instead of the holding portion 113, the holding portion 111 may be moved vertically downward. Further, for example, the holding portion 111 may be moved vertically downward and the holding portion 113 may be moved vertically upward.
　また、例えば、半導体基板１０２（保持部１１１）と半導体基板１０３（保持部１１３）の上下関係が逆になってもよい。例えば、半導体基板１０２を半導体基板１０３の下方に配置し、プローブ１１２により半導体基板１０２の押下面を垂直上方向に押下し、半導体基板１０２を半導体基板１０３の方向に撓ませるようにしてもよい。 Further, for example, the vertical relationship between the semiconductor substrate 102 (holding unit 111) and the semiconductor substrate 103 (holding unit 113) may be reversed. For example, the semiconductor substrate 102 may be arranged below the semiconductor substrate 103, the pressing surface of the semiconductor substrate 102 may be pressed vertically upward by the probe 112, and the semiconductor substrate 102 may be bent in the direction of the semiconductor substrate 103.
　　＜半導体基板の第２の接合方法＞
　次に、図６を参照して、吸着停止方式により半導体基板１０２と半導体基板１０３を接合する方法について説明する。 <Second method of joining semiconductor substrates>
Next, with reference to FIG. 6, a method of joining the semiconductor substrate 102 and the semiconductor substrate 103 by the adsorption stop method will be described.
　まず、図６のＡに示されるように、図５のＡと同様に、半導体基板１０２が保持部１１１により吸着され、半導体基板１０３が保持部１１３により吸着される。 First, as shown in A of FIG. 6, the semiconductor substrate 102 is adsorbed by the holding portion 111, and the semiconductor substrate 103 is adsorbed by the holding portion 113, as in A of FIG.
　次に、図６のＢに示されるように、プローブ１１２が垂直下方向に移動する。これにより、プローブ１１２の先端が、保持部１１１の下面から垂直下方向に突出し、半導体基板１０２の押下面を押下する。その結果、半導体基板１０２の接合面の短辺方向の中央付近が、長辺に対して平行な直線状に半導体基板１０３の方向に撓む。また、半導体基板１０２の接合面の撓んだ部分が、半導体基板１０３の接合面に接触し、押し付けられるまで、プローブ１１２が垂直下方向に移動する。 Next, as shown in B of FIG. 6, the probe 112 moves vertically downward. As a result, the tip of the probe 112 projects vertically downward from the lower surface of the holding portion 111, and presses the pressing surface of the semiconductor substrate 102. As a result, the vicinity of the center of the joint surface of the semiconductor substrate 102 in the short side direction bends in the direction of the semiconductor substrate 103 in a straight line parallel to the long side. Further, the probe 112 moves vertically downward until the bent portion of the joint surface of the semiconductor substrate 102 comes into contact with and is pressed against the joint surface of the semiconductor substrate 103.
　そして、図６のＣに示されるように、半導体基板１０２の接合面と半導体基板１０３の接合面との接合面積がある程度になった段階で、保持部１１１による半導体基板１０２の吸着が停止される。これにより、図６のＤに示されるように、半導体基板１０２の短辺方向の端部が、重力により半導体基板１０３に接近し、プローブ１１２により押し付けられた部分を中心に、半導体基板１０２の接合面と半導体基板１０３の接合面との接合が進行する。そして、最終的に、図６のＥに示されるように、半導体基板１０２の接合面と半導体基板１０３の接合面が接合される。 Then, as shown in C of FIG. 6, when the bonding area between the bonding surface of the semiconductor substrate 102 and the bonding surface of the semiconductor substrate 103 reaches a certain level, the suction of the semiconductor substrate 102 by the holding portion 111 is stopped. .. As a result, as shown in D of FIG. 6, the end portion in the short side direction of the semiconductor substrate 102 approaches the semiconductor substrate 103 by gravity, and the semiconductor substrate 102 is joined around the portion pressed by the probe 112. The bonding between the surface and the bonding surface of the semiconductor substrate 103 proceeds. Finally, as shown in E of FIG. 6, the bonding surface of the semiconductor substrate 102 and the bonding surface of the semiconductor substrate 103 are bonded.
　　＜本技術の効果＞
　次に、図７及び図８を参照して、本技術の効果について説明する。 <Effect of this technology>
Next, the effect of the present technology will be described with reference to FIGS. 7 and 8.
　図７は、製造装置１０１を用いた場合において、半導体基板１０２の半導体基板１０３との接合状態を模式的に示している。図内の白い部分は、接合部分を示し、斜線の部分は、未接合部分を示している。点線で示される部分は、半導体基板１０２の押下面にプローブ１１２の接触面が接触し、プローブ１１２により半導体基板１０２が押下されている部分（以下、押下部分と称する）を示している。 FIG. 7 schematically shows the bonding state of the semiconductor substrate 102 with the semiconductor substrate 103 when the manufacturing apparatus 101 is used. The white part in the figure shows the joined part, and the shaded part shows the unjoined part. The portion shown by the dotted line indicates a portion where the contact surface of the probe 112 is in contact with the pressing surface of the semiconductor substrate 102 and the semiconductor substrate 102 is pressed by the probe 112 (hereinafter, referred to as a pressing portion).
　図７のＡは、プローブ１１２により押下された半導体基板１０２の接合面が半導体基板１０３の接合面と接触した直後の接合状態を示している。半導体基板１０２の接合面の押下部分が、半導体基板１０３と接合されるとともに、半導体基板１０２の接合面の短辺付近において、接合部分が短辺方向に少し広がっている。 A in FIG. 7 shows a bonding state immediately after the bonding surface of the semiconductor substrate 102 pressed by the probe 112 comes into contact with the bonding surface of the semiconductor substrate 103. The pressed portion of the bonding surface of the semiconductor substrate 102 is bonded to the semiconductor substrate 103, and the bonding portion is slightly widened in the short side direction in the vicinity of the short side of the bonding surface of the semiconductor substrate 102.
　その後、ボンディングウエーブが、押下部分を中心にして、半導体基板１０２の接合面の短辺に対してほぼ平行に進行する。また、半導体基板１０２の接合面の中央付近より短辺側の端部の方が、ボンディングウエーブの進行が少し速くなる。従って、図１を参照して上述したセンタープッシュ方式と異なり、半導体基板１０２の接合面の四隅に未接合部分が残らずに、図７のＢ及びＣに示されるように、半導体基板１０２の接合面の長辺の中央付近に未接合部分が残る。そのため、最終的に、図７のＤに示されるように、半導体基板１０２の接合面の未接合部分が消え、半導体基板１０２の接合面全体が半導体基板１０３の接合面と接合される。 After that, the bonding wave proceeds substantially parallel to the short side of the bonding surface of the semiconductor substrate 102, centering on the pressed portion. Further, the progress of the bonding wave is slightly faster at the end portion on the short side side than near the center of the bonding surface of the semiconductor substrate 102. Therefore, unlike the center push method described above with reference to FIG. 1, the semiconductor substrate 102 is joined as shown in B and C of FIG. 7 without leaving unbonded portions at the four corners of the joining surface of the semiconductor substrate 102. An unjoined part remains near the center of the long side of the surface. Therefore, finally, as shown in D of FIG. 7, the unbonded portion of the bonding surface of the semiconductor substrate 102 disappears, and the entire bonding surface of the semiconductor substrate 102 is bonded to the bonding surface of the semiconductor substrate 103.
　また、図８は、ボンディングウエーブの進行方向の例を示している。図８のＡは、点状プローブを用いた場合のボンディングウエーブの進行方向を示し、図８のＢは、プローブ１１２を用いた場合のボンディングウエーブの進行方向を示している。なお、図内の矢印が、ボンディングウエーブの進行方向を示し、点線で示される部分が、プローブによる押下部分を示している。また、図８のＢでは、プローブ１１２の接触面の長辺が、半導体基板１０２の長辺より短い場合の例を示している。 Further, FIG. 8 shows an example of the traveling direction of the bonding wave. A of FIG. 8 shows the traveling direction of the bonding wave when the point probe is used, and B of FIG. 8 shows the traveling direction of the bonding wave when the probe 112 is used. The arrow in the figure indicates the traveling direction of the bonding wave, and the portion indicated by the dotted line indicates the portion pressed by the probe. Further, in FIG. 8B, an example is shown in which the long side of the contact surface of the probe 112 is shorter than the long side of the semiconductor substrate 102.
　点状プローブを用いた場合、ボンディングウエーブは、半導体基板１０２の接合面の中央から放射状に広がる。一方、プローブ１１２を用いた場合、ボンディングウエーブは、半導体基板１０２の接合面の押下部分を中心にして、短辺と略平行な方向に広がる。 When a point probe is used, the bonding wave extends radially from the center of the bonding surface of the semiconductor substrate 102. On the other hand, when the probe 112 is used, the bonding wave spreads in a direction substantially parallel to the short side, centering on the pressed portion of the bonding surface of the semiconductor substrate 102.
　従って、プローブ１１２を用いた方が、点状プローブを用いた場合より、ボンディングウエーブの移動距離が短くなり、その結果、半導体基板１０２の接合歪みが小さくなる。 Therefore, when the probe 112 is used, the moving distance of the bonding wave is shorter than when the point probe is used, and as a result, the bonding distortion of the semiconductor substrate 102 is reduced.
　また、点状プローブを用いた場合、接合歪みの向きは、半導体基板１０２の中央から放射状に広がる方向となる。一方、プローブ１１２を用いた場合、接合歪みの向きは、半導体基板１０２の接合面の押下部分を中心にして、短辺と略平行な方向となる。従って、例えば、接合後の半導体基板１０２のアライメントマークのズレ方向を確認することにより、点状プローブ及びプローブ１１２のどちらを用いて接合されたかを識別することが可能である。 Further, when the point probe is used, the direction of the junction distortion is the direction in which the junction distortion spreads radially from the center of the semiconductor substrate 102. On the other hand, when the probe 112 is used, the direction of the bonding strain is substantially parallel to the short side with the pressed portion of the bonding surface of the semiconductor substrate 102 as the center. Therefore, for example, by confirming the misalignment direction of the alignment mark of the semiconductor substrate 102 after bonding, it is possible to identify which of the point probe and the probe 112 is used for bonding.
　　＜プローブ１１２の接触面の長辺の長さについて＞
　プローブ１１２の接触面の長辺は、例えば、図９のＡに示されるように、半導体基板１０２の長辺と同じ長さでもよいし、図９のＢに示されるように、半導体基板１０２の長辺より長くてもよい。 <About the length of the long side of the contact surface of the probe 112>
The long side of the contact surface of the probe 112 may be, for example, the same length as the long side of the semiconductor substrate 102 as shown in A of FIG. 9, or the long side of the semiconductor substrate 102 as shown in B of FIG. It may be longer than the long side.
　一方、図９のＣに示されるように、プローブ１１２の接触面の長辺が半導体基板１０２の長辺より短い場合、プローブ１１２の接触面の長辺が短くなりすぎると、未接合部分が残るおそれがある。具体的には、図１０のＡ及びＢに示されるように、ボンディングウエーブが半導体基板１０２の短辺より先に長辺に達すると、点状プローブを用いた場合と同様に、半導体基板１０２の接合面の四隅に未接合部分が残るおそれがある。 On the other hand, as shown in C of FIG. 9, when the long side of the contact surface of the probe 112 is shorter than the long side of the semiconductor substrate 102, if the long side of the contact surface of the probe 112 becomes too short, an unbonded portion remains. There is a risk. Specifically, as shown in A and B of FIG. 10, when the bonding wave reaches the long side before the short side of the semiconductor substrate 102, the semiconductor substrate 102 Unjoined parts may remain at the four corners of the joint surface.
　ここで、図１０のＣを参照して、プローブ１１２の長辺が半導体基板１０２の長辺より短い場合のプローブ１１２の長辺の長さの条件について説明する。 Here, with reference to C in FIG. 10, the condition of the length of the long side of the probe 112 when the long side of the probe 112 is shorter than the long side of the semiconductor substrate 102 will be described.
　以下、半導体基板１０２の長辺の長さをＬｘ、短辺の長さをＬｙ、プローブ１１２による押下部分と半導体基板１０２の短辺との間の距離をｌｘ、プローブ１１２による押下部分と半導体基板１０２の長辺との間の距離をｌｙ、プローブ１１２の接触面の長辺の長さをｌｐとする。 Hereinafter, the length of the long side of the semiconductor substrate 102 is Lx, the length of the short side is Ly, the distance between the pressed portion by the probe 112 and the short side of the semiconductor substrate 102 is lp, and the pressed portion by the probe 112 and the semiconductor substrate. Let ly be the distance between the long side of 102 and lp be the length of the long side of the contact surface of the probe 112.
　この場合、次式（１）の条件を満たすように長さｌｐを設定することにより、ボンディングウエーブが半導体基板１０２の短辺より先に長辺に達することが防止される。 In this case, by setting the length lp so as to satisfy the condition of the following equation (1), it is possible to prevent the bonding wave from reaching the long side before the short side of the semiconductor substrate 102.
　ｌｘ≧ｌｙ　・・・（１） Lx ≧ ly ・ ・ ・ (1)
　ここで、プローブ１１２の接触面の短辺は非常に短いため、無視できるとすると、次の式（２）及び式（３）が成り立つ。 Here, since the short side of the contact surface of the probe 112 is very short, if it can be ignored, the following equations (2) and (3) hold.
　ｌｘ＝（Ｌｘ－ｌｐ）／２　・・・（２）
　ｌｙ＝Ｌｙ／２　・・・（３） lx = (Lx-lp) / 2 ... (2)
ly = Ly / 2 ... (3)
　式（２）及び式（３）を式（１）に代入し、整理すると、次式（４）となる。 Substituting equations (2) and (3) into equation (1) and rearranging them gives the following equation (4).
　ｌｐ≧Ｌｘ－Ｌｙ　・・・（４） Lp ≧ Lx-Ly ・ ・ ・ (4)
　従って、式（４）を満たすように、プローブ１１２の接触面の長辺の長さｌｐを設定することにより、ボイドの発生を抑制することができる。 Therefore, the generation of voids can be suppressed by setting the length lp of the long side of the contact surface of the probe 112 so as to satisfy the equation (4).
　＜＜３．変形例＞＞
　本技術は、半導体基板１０２が正方形である場合、換言すれば、半導体基板１０２のアスペクト比が１の矩形である場合にも適用することが可能である。 << 3. Modification example >>
This technique can be applied when the semiconductor substrate 102 is square, in other words, when the semiconductor substrate 102 is rectangular with an aspect ratio of 1.
　また、本技術は、半導体基板１０２が矩形であれば、半導体基板１０２の大きさや厚さは、特に制限されない。例えば、半導体基板１０２の長辺は３００ｍｍ以下、短辺は３ｍｍ以上、厚さは７７５μｍ以下とされる。 Further, in the present technology, if the semiconductor substrate 102 is rectangular, the size and thickness of the semiconductor substrate 102 are not particularly limited. For example, the long side of the semiconductor substrate 102 is 300 mm or less, the short side is 3 mm or more, and the thickness is 775 μm or less.
　さらに、例えば、半導体基板１０３は矩形以外の形状、例えば、円形等でもよい。 Further, for example, the semiconductor substrate 103 may have a shape other than a rectangle, for example, a circle or the like.
　また、例えば、図１１に示されるように、接触面が点状の押圧体である点状プローブを直線状に複数並べた押圧部により、半導体基板１０２の押下面の短辺方向の中央付近を、長辺に対して平行に押下するようにしてもよい。 Further, for example, as shown in FIG. 11, a pressing portion in which a plurality of point-shaped probes whose contact surfaces are point-shaped pressing bodies are arranged in a straight line is used to move the vicinity of the center of the pressing surface of the semiconductor substrate 102 in the short side direction. , You may press it parallel to the long side.
　具体的には、図１１の例では、点状プローブ２０１－１乃至点状プローブ２０１－５が、半導体基板１０２の押下面の短辺方向の中央付近において、長辺に対して平行に並べられている。 Specifically, in the example of FIG. 11, the point-shaped probes 201-1 to the point-shaped probes 201-5 are arranged parallel to the long side in the vicinity of the center in the short side direction of the pressing surface of the semiconductor substrate 102. ing.
　なお、以下、点状プローブ２０１－１乃至点状プローブ２０１－５を個々に区別する必要がない場合、単に点状プローブ２０１と称する。 Hereinafter, when it is not necessary to individually distinguish the punctate probe 201-1 to the punctate probe 201-5, it is simply referred to as the punctate probe 201.
　各点状プローブ２０１により半導体基板１０２の押下面を略均等な力で押下することにより、プローブ１１２を用いた場合と同様に、半導体基板１０２の接合面の短辺方向の中央付近が、長辺に対して平行な直線状に半導体基板１０３の方向に撓む。その結果、ボンディングウエーブが、半導体基板１０２の接合面の短辺方向に進行し、ボイドの発生が抑制される。 By pressing the pressed surface of the semiconductor substrate 102 with substantially equal force by each point probe 201, the long side is located near the center of the joint surface of the semiconductor substrate 102 in the short side direction, as in the case of using the probe 112. It bends in the direction of the semiconductor substrate 103 in a straight line parallel to the semiconductor substrate 103. As a result, the bonding wave proceeds in the direction of the short side of the bonding surface of the semiconductor substrate 102, and the generation of voids is suppressed.
　図１１のＡ乃至Ｄは、点状プローブ２０１の先端の形状を模式的に示している。 A to D in FIG. 11 schematically show the shape of the tip of the point probe 201.
　図１１のＡの例では、点状プローブ２０１の先端が尖った形状になっている。従って、点状プローブ２０１の接触面は、ほぼ点になる。 In the example of A in FIG. 11, the tip of the point probe 201 has a sharp shape. Therefore, the contact surface of the point probe 201 becomes substantially a point.
　図１１のＢの例では、点状プローブ２０１の先端が曲率を有し、丸みを帯びている。従って、点状プローブ２０１の接触面は、図１１のＡの例より大きい円形の点状となる。また、接触面の中心に近づくほど押圧力が強くなり、接触面の中心から遠ざかるほど押圧力は弱くなる。 In the example of B in FIG. 11, the tip of the point probe 201 has a curvature and is rounded. Therefore, the contact surface of the point probe 201 has a circular point shape larger than the example of A in FIG. Further, the pressing force becomes stronger as it approaches the center of the contact surface, and becomes weaker as it moves away from the center of the contact surface.
　図１１のＣの例では、図１１のＡの例と同様に、点状プローブ２０１の先端が尖っているが、接触面が平坦になっている。従って、点状プローブ２０１の接触面は、図１１のＡの例より大きい円形の点状となり、接触面にほぼ均等に力がかかる。 In the example of C in FIG. 11, the tip of the point probe 201 is sharp, but the contact surface is flat, as in the example of A in FIG. Therefore, the contact surface of the point probe 201 has a circular point shape larger than the example of A in FIG. 11, and the force is applied to the contact surface substantially evenly.
　図１１のＤの例では、点状プローブ２０１の先端がまっすぐ垂直に延びている。従って、点状プローブ２０１の接触面は円形の点状となり、他の例より接触面が大きくなる。また、接触面にほぼ均等に力がかかる。 In the example of D in FIG. 11, the tip of the point probe 201 extends straight and vertically. Therefore, the contact surface of the point probe 201 has a circular point shape, and the contact surface is larger than in other examples. In addition, the force is applied to the contact surface almost evenly.
　なお、例えば、点状プローブ２０１－１乃至点状プローブ２０１－５の先端にそれぞれ圧力センサ２０２－１乃至圧力センサ２０２－５を設けるようにしてもよい。そして、例えば、制御部１１４が、圧力センサ２０２－１乃至圧力センサ２０２－５からのセンサデータに基づいて、各点状プローブ２０１の押圧力を検出し、検出結果に基づいて、各点状プローブ２０１の押圧力が略均一になるように制御するようにしてもよい。 Note that, for example, the pressure sensor 202-1 to the pressure sensor 202-5 may be provided at the tips of the point probe 201-1 to the point probe 201-5, respectively. Then, for example, the control unit 114 detects the pressing force of each point probe 201 based on the sensor data from the pressure sensor 202-1 to the pressure sensor 202-5, and based on the detection result, each point probe. The pressing force of 201 may be controlled to be substantially uniform.
　なお、点状プローブ２０１の数は、２以上であれば特に限定されない。ただし、点状プローブ２０１の数が多く、点状プローブ２０１間の間隔が短くなるほど、ボイドの抑制効果がプローブ１１２に近づく。一方、点状プローブ２０１の数が２つでも、１つの場合と比較して、ボイドの抑制効果は大きくなる。 The number of punctate probes 201 is not particularly limited as long as it is 2 or more. However, the larger the number of punctate probes 201 and the shorter the interval between the punctate probes 201, the closer the effect of suppressing voids is to the probe 112. On the other hand, even if the number of punctate probes 201 is two, the effect of suppressing voids is greater than in the case of one.
　＜＜４．その他＞＞
　本技術の実施の形態は、上述した実施の形態に限定されるものではなく、本技術の要旨を逸脱しない範囲において種々の変更が可能である。 << 4. Others >>
The embodiment of the present technology is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present technology.
　　＜構成の組み合わせ例＞
　例えば、本技術は、以下のような構成も取ることができる。 <Example of configuration combination>
For example, the present technology can also have the following configurations.
（１）
　第１の半導体基板の接合面の一部を直線状に第２の半導体基板の方向に撓ませた後、前記第１の半導体基板と前記第２の半導体基板を接合する
　製造方法。
（２）
　前記第１の半導体基板は矩形であり、
　前記第１の半導体基板の前記接合面の中央付近を前記第１の半導体基板の辺と略平行に直線状に撓ませる
　前記（１）に記載の製造方法。
（３）
　前記第１の半導体基板のアスペクト比が１を超え、
　前記第１の半導体基板の前記接合面の中央付近を前記第１の半導体基板の長辺と略平行に直線状に撓ませる
　前記（２）に記載の製造方法。
（４）
　接触面が直線状の押圧体により、前記第１の半導体基板の前記接合面と反対側の押下面の中央付近を押下することにより、前記第１の半導体基板を撓ませる
　前記（３）に記載の製造方法。
（５）
　前記接触面の長辺が前記第１の半導体基板の長辺と略平行になるように、前記押圧体を前記第１の半導体基板の前記押下面の中央付近に押し付けることにより、前記第１の半導体基板を撓ませる
　前記（４）に記載の製造方法。
（６）
　前記接触面の長辺の長さが、（前記第１の半導体基板の長辺－前記第１の半導体基板の短辺）以上である
　前記（４）又は（５）に記載の製造方法。
（７）
　押圧体により、前記第１の半導体基板の前記接合面と反対側の押下面を押下することにより、前記第１の半導体基板を撓ませる
　前記（１）乃至（３）のいずれかに記載の製造方法。
（８）
　前記押圧体の接触面が直線状である
　前記（７）に記載の製造方法。
（９）
　直線状に並べられた、接触面が点状の複数の前記押圧体により前記第１の半導体基板の前記押下面を押下することにより、前記第１の半導体基板を撓ませる
　前記（７）に記載の製造方法。
（１０）
　各前記押圧体の先端に設けられているセンサにより押圧力を検出した結果に基づいて、各前記押圧体の押圧力が略均一になるように制御する
　前記（９）に記載の製造方法。
（１１）
　前記第１の半導体基板を吸着機構により吸着した状態で前記第２の半導体基板の上方に配置し、
　前記押圧体により前記第１の半導体基板の前記接合面を撓ませることにより前記第２の半導体基板に接触させ、
　前記第１の半導体基板の前記接合面が前記第２の半導体基板の接合面に接触した後、前記吸着機構が前記第１の半導体基板の吸着を停止する
　前記（７）に記載の製造方法。
（１２）
　前記第１の半導体基板及び前記第２の半導体基板のうち少なくとも一方を他方の方向に移動させることにより、前記第１の半導体基板と前記第２の半導体基板を接合する
　前記（１）乃至（１１）のいずれかに記載の製造方法。
（１３）
　前記第２の半導体基板の面積が、前記第１の半導体基板以上である
　前記（１）乃至（１２）のいずれかに記載の製造方法。
（１４）
　第１の半導体基板を保持する第１の保持部と、
　前記第１の半導体基板と対向するように第２の半導体基板を保持する第２の保持部と、
　前記第１の半導体基板の接合面の一部を直線状に前記第２の半導体基板の方向に撓ませる押圧部と
　を備え、
　前記第１の半導体基板を撓ませた後、前記第１の半導体基板と前記第２の半導体基板を接合する
　製造装置。
（１５）
　前記押圧部は、
　　接触面が直線状の押圧体を
　備え、
　前記押圧体により前記第１の半導体基板の前記接合面と反対側の押下面を押下することにより、前記第１の半導体基板を撓ませる
　前記（１４）に記載の製造装置。
（１６）
　前記第１の半導体基板及び前記第２の半導体基板のうち少なくとも一方を他方の方向に移動させることにより、前記第１の半導体基板と前記第２の半導体基板を接合する
　前記（１４）又は（１５）に記載の製造装置。
（１７）
　前記第１の保持部は、前記第２の半導体基板の上方において、前記第１の半導体基板を吸着し、前記押圧部が前記第１の半導体基板の前記接合面を撓ませることにより前記第２の半導体基板の接合面に接触させた後、前記第１の半導体基板の吸着を停止する
　前記（１４）又は（１５）に記載の製造装置。
（１８）
　前記押圧部は、
　　直線状に並べられた、接触面が点状の複数の押圧体を
　備え、
　前記複数の押圧体により前記第１の半導体基板の前記接合面と反対側の押下面を押下することにより、前記第１の半導体基板を撓ませる
　前記（１４）に記載の製造装置。
（１９）
　各前記押圧体の先端に設けられているセンサにより押圧力を検出した結果に基づいて、各前記押圧体の押圧力が略均一になるように制御する制御部を
　さらに備える前記（１８）に記載の製造装置。
（２０）
　第１の半導体基板と、
　接合面の一部が直線状に撓まされた前記第１の半導体基板と接合される第２の半導体基板と
　を備える半導体素子。 (1)
A manufacturing method in which a part of the bonding surface of the first semiconductor substrate is linearly bent in the direction of the second semiconductor substrate, and then the first semiconductor substrate and the second semiconductor substrate are bonded.
(2)
The first semiconductor substrate is rectangular and has a rectangular shape.
The manufacturing method according to (1), wherein the vicinity of the center of the joint surface of the first semiconductor substrate is bent in a straight line substantially parallel to the side of the first semiconductor substrate.
(3)
The aspect ratio of the first semiconductor substrate exceeds 1,
The manufacturing method according to (2) above, wherein the vicinity of the center of the joint surface of the first semiconductor substrate is bent in a straight line substantially parallel to the long side of the first semiconductor substrate.
(4)
The first semiconductor substrate is bent by pressing the vicinity of the center of the pressing surface on the opposite side of the bonding surface of the first semiconductor substrate with a pressing body having a linear contact surface. Manufacturing method.
(5)
By pressing the pressing body near the center of the pressing surface of the first semiconductor substrate so that the long side of the contact surface is substantially parallel to the long side of the first semiconductor substrate, the first The manufacturing method according to (4) above, which bends the semiconductor substrate.
(6)
The manufacturing method according to (4) or (5) above, wherein the length of the long side of the contact surface is (the long side of the first semiconductor substrate-the short side of the first semiconductor substrate) or more.
(7)
The production according to any one of (1) to (3) above, wherein the pressing body bends the first semiconductor substrate by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface. Method.
(8)
The manufacturing method according to (7) above, wherein the contact surface of the pressing body is linear.
(9)
The first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate with a plurality of pressing bodies arranged in a straight line and having point-shaped contact surfaces. Manufacturing method.
(10)
The manufacturing method according to (9) above, wherein the pressing force of each pressing body is controlled to be substantially uniform based on the result of detecting the pressing force by a sensor provided at the tip of each pressing body.
(11)
The first semiconductor substrate is placed above the second semiconductor substrate in a state of being adsorbed by the adsorption mechanism.
By bending the joint surface of the first semiconductor substrate with the pressing body, the contact surface with the second semiconductor substrate is brought into contact with the second semiconductor substrate.
The manufacturing method according to (7), wherein the suction mechanism stops suction of the first semiconductor substrate after the bonding surface of the first semiconductor substrate comes into contact with the bonding surface of the second semiconductor substrate.
(12)
(1) to (11) for joining the first semiconductor substrate and the second semiconductor substrate by moving at least one of the first semiconductor substrate and the second semiconductor substrate in the other direction. ). The manufacturing method according to any one of.
(13)
The manufacturing method according to any one of (1) to (12), wherein the area of the second semiconductor substrate is larger than that of the first semiconductor substrate.
(14)
A first holding portion for holding the first semiconductor substrate and
A second holding portion that holds the second semiconductor substrate so as to face the first semiconductor substrate,
A pressing portion that linearly bends a part of the joint surface of the first semiconductor substrate in the direction of the second semiconductor substrate is provided.
A manufacturing apparatus for joining the first semiconductor substrate and the second semiconductor substrate after bending the first semiconductor substrate.
(15)
The pressing part is
It has a pressing body with a straight contact surface,
The manufacturing apparatus according to (14), wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface by the pressing body.
(16)
(14) or (15) for joining the first semiconductor substrate and the second semiconductor substrate by moving at least one of the first semiconductor substrate and the second semiconductor substrate in the other direction. ).
(17)
The first holding portion attracts the first semiconductor substrate above the second semiconductor substrate, and the pressing portion bends the joint surface of the first semiconductor substrate, whereby the second The manufacturing apparatus according to (14) or (15), wherein the adsorption of the first semiconductor substrate is stopped after the semiconductor substrate is brought into contact with the joint surface of the semiconductor substrate.
(18)
The pressing part is
It has a plurality of pressing bodies arranged in a straight line and having a point-shaped contact surface.
The manufacturing apparatus according to (14), wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface by the plurality of pressing bodies.
(19)
The above (18) further includes a control unit that controls the pressing force of each pressing body so as to be substantially uniform based on the result of detecting the pressing force by a sensor provided at the tip of each pressing body. Manufacturing equipment.
(20)
The first semiconductor substrate and
A semiconductor device including a second semiconductor substrate to be bonded to the first semiconductor substrate in which a part of the bonding surface is bent linearly.
　なお、本明細書に記載された効果はあくまで例示であって限定されるものではなく、他の効果があってもよい。 Note that the effects described in this specification are merely examples and are not limited, and other effects may be obtained.
　１０１　製造装置，　１０２，１０３　半導体基板，　１１１　保持部，　１１２　プローブ，　１１３　保持部，　１１４　制御部，　２０１－１乃至２０１－５　プローブ，　２０２－１乃至２０２－５　圧力センサ 101 manufacturing equipment, 102, 103 semiconductor substrate, 111 holding part, 112 probe, 113 holding part, 114 control part, 201-1 to 201-5 probe, 202-1 to 202-5 pressure sensor

Claims (20)

  1. 　第１の半導体基板の接合面の一部を直線状に第２の半導体基板の方向に撓ませた後、前記第１の半導体基板と前記第２の半導体基板を接合する
    　製造方法。     A manufacturing method in which a part of the bonding surface of the first semiconductor substrate is linearly bent in the direction of the second semiconductor substrate, and then the first semiconductor substrate and the second semiconductor substrate are bonded.
  2. 　前記第１の半導体基板は矩形であり、
    　前記第１の半導体基板の前記接合面の中央付近を前記第１の半導体基板の辺と略平行に直線状に撓ませる
    　請求項１に記載の製造方法。     The first semiconductor substrate is rectangular and has a rectangular shape.
    The manufacturing method according to claim 1, wherein the vicinity of the center of the joint surface of the first semiconductor substrate is bent in a straight line substantially parallel to the side of the first semiconductor substrate.
  3. 　前記第１の半導体基板のアスペクト比が１を超え、
    　前記第１の半導体基板の前記接合面の中央付近を前記第１の半導体基板の長辺と略平行に直線状に撓ませる
    　請求項２に記載の製造方法。     The aspect ratio of the first semiconductor substrate exceeds 1,
    The manufacturing method according to claim 2, wherein the vicinity of the center of the joint surface of the first semiconductor substrate is bent in a straight line substantially parallel to the long side of the first semiconductor substrate.
  4. 　接触面が直線状の押圧体により、前記第１の半導体基板の前記接合面と反対側の押下面の中央付近を押下することにより、前記第１の半導体基板を撓ませる
    　請求項３に記載の製造方法。     The third aspect of claim 3, wherein the first semiconductor substrate is bent by pressing the vicinity of the center of the pressing surface on the opposite side of the bonding surface of the first semiconductor substrate with a pressing body having a linear contact surface. Production method.
  5. 　前記接触面の長辺が前記第１の半導体基板の長辺と略平行になるように、前記押圧体を前記第１の半導体基板の前記押下面の中央付近に押し付けることにより、前記第１の半導体基板を撓ませる
    　請求項４に記載の製造方法。     By pressing the pressing body near the center of the pressing surface of the first semiconductor substrate so that the long side of the contact surface is substantially parallel to the long side of the first semiconductor substrate, the first The manufacturing method according to claim 4, wherein the semiconductor substrate is bent.
  6. 　前記接触面の長辺の長さが、（前記第１の半導体基板の長辺－前記第１の半導体基板の短辺）以上である
    　請求項４に記載の製造方法。     The manufacturing method according to claim 4, wherein the length of the long side of the contact surface is (the long side of the first semiconductor substrate-the short side of the first semiconductor substrate) or more.
  7. 　押圧体により、前記第１の半導体基板の前記接合面と反対側の押下面を押下することにより、前記第１の半導体基板を撓ませる
    　請求項１に記載の製造方法。     The manufacturing method according to claim 1, wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface by the pressing body.
  8. 　前記押圧体の接触面が直線状である
    　請求項７に記載の製造方法。     The manufacturing method according to claim 7, wherein the contact surface of the pressing body is linear.
  9. 　直線状に並べられた、接触面が点状の複数の前記押圧体により前記第１の半導体基板の前記押下面を押下することにより、前記第１の半導体基板を撓ませる
    　請求項７に記載の製造方法。     The seventh aspect of claim 7, wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate with a plurality of pressing bodies having point-shaped contact surfaces arranged in a straight line. Production method.
  10. 　各前記押圧体の先端に設けられているセンサにより押圧力を検出した結果に基づいて、各前記押圧体の押圧力が略均一になるように制御する
    　請求項９に記載の製造方法。     The manufacturing method according to claim 9, wherein the pressing force of each pressing body is controlled to be substantially uniform based on the result of detecting the pressing force by a sensor provided at the tip of each pressing body.
  11. 　前記第１の半導体基板を吸着機構により吸着した状態で前記第２の半導体基板の上方に配置し、
    　前記押圧体により前記第１の半導体基板の前記接合面を撓ませることにより前記第２の半導体基板に接触させ、
    　前記第１の半導体基板の前記接合面が前記第２の半導体基板の接合面に接触した後、前記吸着機構が前記第１の半導体基板の吸着を停止する
    　請求項７に記載の製造方法。     The first semiconductor substrate is placed above the second semiconductor substrate in a state of being adsorbed by the adsorption mechanism.
    By bending the joint surface of the first semiconductor substrate with the pressing body, the contact surface with the second semiconductor substrate is brought into contact with the second semiconductor substrate.
    The manufacturing method according to claim 7, wherein the suction mechanism stops suction of the first semiconductor substrate after the bonding surface of the first semiconductor substrate comes into contact with the bonding surface of the second semiconductor substrate.
  12. 　前記第１の半導体基板及び前記第２の半導体基板のうち少なくとも一方を他方の方向に移動させることにより、前記第１の半導体基板と前記第２の半導体基板を接合する
    　請求項１に記載の製造方法。     The production according to claim 1, wherein the first semiconductor substrate and the second semiconductor substrate are joined by moving at least one of the first semiconductor substrate and the second semiconductor substrate in the other direction. Method.
  13. 　前記第２の半導体基板の面積が、前記第１の半導体基板以上である
    　請求項１に記載の製造方法。     The manufacturing method according to claim 1, wherein the area of the second semiconductor substrate is larger than that of the first semiconductor substrate.
  14. 　第１の半導体基板を保持する第１の保持部と、
    　前記第１の半導体基板と対向するように第２の半導体基板を保持する第２の保持部と、
    　前記第１の半導体基板の接合面の一部を直線状に前記第２の半導体基板の方向に撓ませる押圧部と
    　を備え、
    　前記第１の半導体基板を撓ませた後、前記第１の半導体基板と前記第２の半導体基板を接合する
    　製造装置。     A first holding portion for holding the first semiconductor substrate and
    A second holding portion that holds the second semiconductor substrate so as to face the first semiconductor substrate,
    A pressing portion that linearly bends a part of the joint surface of the first semiconductor substrate in the direction of the second semiconductor substrate is provided.
    A manufacturing apparatus for joining the first semiconductor substrate and the second semiconductor substrate after bending the first semiconductor substrate.
  15. 　前記押圧部は、
    　　接触面が直線状の押圧体を
    　備え、
    　前記押圧体により前記第１の半導体基板の前記接合面と反対側の押下面を押下することにより、前記第１の半導体基板を撓ませる
    　請求項１４に記載の製造装置。     The pressing part is
    It has a pressing body with a straight contact surface,
    The manufacturing apparatus according to claim 14, wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface by the pressing body.
  16. 　前記第１の半導体基板及び前記第２の半導体基板のうち少なくとも一方を他方の方向に移動させることにより、前記第１の半導体基板と前記第２の半導体基板を接合する
    　請求項１４に記載の製造装置。     The production according to claim 14, wherein the first semiconductor substrate and the second semiconductor substrate are joined by moving at least one of the first semiconductor substrate and the second semiconductor substrate in the other direction. Device.
  17. 　前記第１の保持部は、前記第２の半導体基板の上方において、前記第１の半導体基板を吸着し、前記押圧部が前記第１の半導体基板の前記接合面を撓ませることにより前記第２の半導体基板の接合面に接触させた後、前記第１の半導体基板の吸着を停止する
    　請求項１４に記載の製造装置。     The first holding portion attracts the first semiconductor substrate above the second semiconductor substrate, and the pressing portion bends the joint surface of the first semiconductor substrate, whereby the second The manufacturing apparatus according to claim 14, wherein the adsorption of the first semiconductor substrate is stopped after the semiconductor substrate is brought into contact with the joint surface of the semiconductor substrate.
  18. 　前記押圧部は、
    　　直線状に並べられた、接触面が点状の複数の押圧体を
    　備え、
    　前記複数の押圧体により前記第１の半導体基板の前記接合面と反対側の押下面を押下することにより、前記第１の半導体基板を撓ませる
    　請求項１４に記載の製造装置。     The pressing part is
    It has a plurality of pressing bodies arranged in a straight line and having a point-shaped contact surface.
    The manufacturing apparatus according to claim 14, wherein the first semiconductor substrate is bent by pressing the pressing surface of the first semiconductor substrate on the side opposite to the bonding surface by the plurality of pressing bodies.
  19. 　各前記押圧体の先端に設けられているセンサにより押圧力を検出した結果に基づいて、各前記押圧体の押圧力が略均一になるように制御する制御部を
    　さらに備える請求項１８に記載の製造装置。     The 18th aspect of claim 18, further comprising a control unit that controls the pressing force of each pressing body to be substantially uniform based on the result of detecting the pressing force by a sensor provided at the tip of each pressing body. Manufacturing equipment.
  20. 　第１の半導体基板と、
    　接合面の一部が直線状に撓まされた前記第１の半導体基板と接合される第２の半導体基板と
    　を備える半導体素子。     The first semiconductor substrate and
    A semiconductor device including a second semiconductor substrate to be bonded to the first semiconductor substrate in which a part of the bonding surface is bent linearly.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009152410A (en) * 2007-12-20 2009-07-09 Fujitsu Ltd Device for manufacturing semiconductor device, and its manufacturing method
JP2009289959A (en) * 2008-05-29 2009-12-10 Elpida Memory Inc Bonder and bonding method
JP2013155053A (en) * 2012-01-26 2013-08-15 Asahi Glass Co Ltd Lamination apparatus and lamination method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009152410A (en) * 2007-12-20 2009-07-09 Fujitsu Ltd Device for manufacturing semiconductor device, and its manufacturing method
JP2009289959A (en) * 2008-05-29 2009-12-10 Elpida Memory Inc Bonder and bonding method
JP2013155053A (en) * 2012-01-26 2013-08-15 Asahi Glass Co Ltd Lamination apparatus and lamination method

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