WO2021144853A1 - Power conversion board - Google Patents

Power conversion board Download PDF

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Publication number
WO2021144853A1
WO2021144853A1 PCT/JP2020/000903 JP2020000903W WO2021144853A1 WO 2021144853 A1 WO2021144853 A1 WO 2021144853A1 JP 2020000903 W JP2020000903 W JP 2020000903W WO 2021144853 A1 WO2021144853 A1 WO 2021144853A1
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WO
WIPO (PCT)
Prior art keywords
switching element
power
substrate
drive circuit
wiring
Prior art date
Application number
PCT/JP2020/000903
Other languages
French (fr)
Japanese (ja)
Inventor
基 高原
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2020531549A priority Critical patent/JP6752400B1/en
Priority to PCT/JP2020/000903 priority patent/WO2021144853A1/en
Publication of WO2021144853A1 publication Critical patent/WO2021144853A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present disclosure relates to a power conversion board having one or both of a function of converting DC power into AC power and a function of converting AC power into DC power.
  • the inverter device has a short-circuiting means located between the full-bridge inverter and the reactor to short-circuit the output of the full-bridge inverter.
  • the short circuit means has two switching elements.
  • the inverter device reduces the ripple generated in the alternating current output by the full-bridge inverter near the point where the average value of the alternating current becomes zero. As a result, the conversion efficiency from direct current to alternating current is improved, and noise is reduced.
  • the inverter device suppresses the fluctuation range of the potential at the negative output end of the DC voltage. This reduces the leakage current.
  • a conventional inverter device when a surge voltage is generated when AC power supplied from a power system is converted into DC power and DC power is output to a power storage device, the surge voltage constitutes a full bridge inverter. It is applied to the element. Therefore, in the conventional inverter device, when a surge voltage is generated, a part or all of the plurality of switching elements may fail. It is required to provide a power conversion substrate that suppresses ripples generated in alternating current, reduces leakage current, and suppresses failure of each of a plurality of switching elements included in an inverter when a surge voltage occurs. Has been done.
  • the present disclosure has been made in view of the above, in which ripples generated in alternating current are suppressed, leakage current is reduced, and when a surge voltage is generated, each of a plurality of switching elements included in the inverter fails.
  • the purpose is to obtain a power conversion substrate that suppresses this.
  • the power conversion substrate includes a smoothing capacitor for smoothing a DC voltage, a function for converting DC power to AC power, and a function for converting AC power to DC power. It has a full bridge portion having one or both functions, a short circuit portion for short-circuiting AC power, and a substrate on which a smoothing capacitor, a full bridge portion, and a short-circuit portion are arranged.
  • the full bridge section includes a first switching element, a second switching element, a third switching element, and a fourth switching element that form a full bridge circuit.
  • the short-circuit portion has a fifth switching element and a sixth switching element.
  • Each of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element has a body portion and a terminal portion.
  • Each of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element is placed on the substrate with the terminal portion located closer to the smoothing capacitor than the body portion. Have been placed.
  • FIG. 1 The figure which shows the outline of the structure of the power conditioner which concerns on Embodiment 1.
  • An example of the direction in which current flows in the circuit of the power conversion board when the power conditioner according to the first embodiment converts the AC power supplied from the power system into DC power and outputs the DC power to the power storage device is shown.
  • Figure 1 An example of the direction in which current flows in the circuit of the power conversion board when the power conditioner according to the first embodiment converts the AC power supplied from the power system into DC power and outputs the DC power to the power storage device is shown.
  • Figure 2 The figure which shows the example of the wiring which influences the magnitude of a surge voltage in the circuit of the power conversion board which concerns on Embodiment 1.
  • FIG. 1 An example of the direction in which current flows in the circuit of the power conversion board when the power conditioner according to the first embodiment converts the AC power supplied from the power system into DC power and outputs the DC power to the power storage device is shown
  • FIG. 1 schematically shows a state in which a plurality of elements included in the power conversion board according to the first embodiment are arranged on the board.
  • FIG. 2 schematically shows a state in which a plurality of elements included in the power conversion board according to the first embodiment are arranged on the board.
  • FIG. 1 for explaining the effect of the first drive circuit included in the power conversion board according to the first embodiment.
  • FIG. 2 for explaining the effect of the first drive circuit included in the power conversion board according to the first embodiment.
  • FIG. 1 is a diagram showing an outline of the configuration of the power conditioner 1 according to the first embodiment.
  • the power conditioner 1 has a function of converting AC power supplied from the power system 71 into DC power and outputting the DC power to the power storage device 72, and converting the DC power supplied from the power storage device 72 into AC power. It has a function of outputting AC power to one or both of the power system 71 and the load 73.
  • FIG. 1 also shows a power system 71, a power storage device 72, and a load 73.
  • the load 73 is a device that operates based on AC power.
  • the load 73 can also operate based on the AC power supplied from the power system 71.
  • the power conditioner 1 has a power conversion board 2 having a function of converting DC power into AC power and a function of converting AC power into DC power, and a control device 3 for controlling the power conversion board 2.
  • the power conversion board 2 includes a converter 4 having a function of boosting and lowering a DC voltage, a smoothing capacitor 5 for smoothing the DC voltage, a function of converting DC power into AC power, and a function of converting AC power into DC power. It has an inverter 6 having a function to perform the function.
  • An example of a smoothing capacitor 5 is an electrolytic capacitor.
  • FIG. 2 is a diagram showing a configuration of a circuit of the power conversion board 2 according to the first embodiment.
  • the power conversion board 2 includes a converter 4, a smoothing capacitor 5, and an inverter 6.
  • the converter 4 is not shown in FIG.
  • the power conversion board 2 further includes a first reactor 7 and a second reactor 8 for removing high frequency components in AC power.
  • the power conversion board 2 further includes a snubber capacitor 9 located between the smoothing capacitor 5 and the inverter 6. Details of the snubber capacitor 9 will be described later.
  • the inverter 6 has a full bridge portion 10 having a function of converting DC power into AC power and a function of converting AC power into DC power, and a short-circuit portion 11 that short-circuits AC power.
  • the power conversion board 2 further includes a board 12 on which a converter 4, a smoothing capacitor 5, an inverter 6, a first reactor 7, a second reactor 8, and a snubber capacitor 9 are arranged.
  • the board 12 is formed with the first wiring 13 and the second wiring 14 for connecting the converter 4 and the inverter 6, and the third wiring 15 and the fourth wiring 16 for connecting the inverter 6 and the power system 71. ing.
  • the smoothing capacitor 5 and the snubber capacitor 9 are connected in parallel to the first wiring 13 and the second wiring 14.
  • One end of the first reactor 7 is connected to the third wire 15, and one end of the second reactor 8 is connected to the fourth wire 16.
  • the other end of each of the first reactor 7 and the second reactor 8 is connected to the power system 71.
  • the power system 71 is not shown in FIG.
  • the full bridge unit 10 includes a first switching element 21, a second switching element 22, a third switching element 23, and a fourth switching element 24 that form a full bridge circuit.
  • each of the first switching element 21, the second switching element 22, the third switching element 23, and the fourth switching element 24 is a metal oxide silicon field effect transmitter.
  • the first switching element 21 and the second switching element 22 operate based on the first drive signal
  • the third switching element 23 and the fourth switching element 24 operate based on the second drive signal.
  • the first drive signal and the second drive signal are generated by the control device 3.
  • the collector terminal 211 of the first switching element 21 is connected to the first wiring 13, and the emitter terminal 212 of the first switching element 21 is connected to the third wiring 15.
  • each of the collector terminal 211 and the emitter terminal 212 is indicated by a broken line ellipse.
  • the collector terminal 221 of the second switching element 22 is connected to the fourth wiring 16, and the emitter terminal 222 of the second switching element 22 is connected to the second wiring 14.
  • each of the collector terminal 221 and the emitter terminal 222 is indicated by a broken line ellipse.
  • the collector terminal 231 of the third switching element 23 is connected to the third wiring 15, and the emitter terminal 232 of the third switching element 23 is connected to the second wiring 14.
  • each of the collector terminal 231 and the emitter terminal 232 is indicated by a broken line ellipse.
  • the collector terminal 241 of the fourth switching element 24 is connected to the first wiring 13, and the emitter terminal 242 of the fourth switching element 24 is connected to the fourth wiring 16.
  • each of the collector terminal 241 and the emitter terminal 242 is indicated by a broken line ellipse.
  • a voltage corresponding to the first drive signal is supplied to the gate terminal 213 of the first switching element 21 and the gate terminal 223 of the second switching element 22.
  • each of the gate terminal 213 and the gate terminal 223 is indicated by a broken line ellipse.
  • the first switching element 21 and the second switching element 22 are turned on or off based on the voltage.
  • the first drive signal is generated by the control device 3.
  • a voltage corresponding to the second drive signal is supplied to the gate terminal 233 of the third switching element 23 and the gate terminal 243 of the fourth switching element 24.
  • each of the gate terminal 233 and the gate terminal 243 is indicated by a broken line ellipse.
  • the third switching element 23 and the fourth switching element 24 are turned on or off based on the voltage.
  • the second drive signal is generated by the control device 3.
  • the first switching element 21 has a diode 214 that connects the emitter terminal 212 of the first switching element 21 and the collector terminal 211 of the first switching element 21.
  • the second switching element 22 has a diode 224 that connects the emitter terminal 222 of the second switching element 22 and the collector terminal 221 of the second switching element 22.
  • the third switching element 23 has a diode 234 that connects the emitter terminal 232 of the third switching element 23 and the collector terminal 231 of the third switching element 23.
  • the fourth switching element 24 has a diode 244 that connects the emitter terminal 242 of the fourth switching element 24 and the collector terminal 241 of the fourth switching element 24.
  • the short-circuit portion 11 has a fifth switching element 25 and a sixth switching element 26.
  • each of the fifth switching element 25 and the sixth switching element 26 is a metal oxide silicon field effect transmitter.
  • the fifth switching element 25 and the sixth switching element 26 are connected in series.
  • the collector terminal 251 of the fifth switching element 25 and the collector terminal 261 of the sixth switching element 26 are connected.
  • each of the collector terminal 251 and the collector terminal 261 is indicated by a broken line ellipse.
  • the emitter terminal 252 of the fifth switching element 25 is connected to the third wiring 15, and the emitter terminal 262 of the sixth switching element 26 is connected to the fourth wiring 16.
  • each of the emitter terminal 252 and the emitter terminal 262 is indicated by a broken line ellipse. Since the power conversion board 2 has a short-circuit portion 11 having a fifth switching element 25 and a sixth switching element 26, it is possible to suppress ripples generated in alternating current and reduce leakage current.
  • the fifth switching element 25 has a gate terminal 253 to which a voltage corresponding to the third drive signal is supplied.
  • the sixth switching element 26 has a gate terminal 263 to which a voltage corresponding to the fourth drive signal is supplied.
  • each of the gate terminal 253 and the gate terminal 263 is indicated by a broken line ellipse.
  • the third drive signal and the fourth drive signal are generated by the control device 3.
  • the fifth switching element 25 has a diode 254 that connects the emitter terminal 252 of the fifth switching element 25 and the collector terminal 251 of the fifth switching element 25.
  • the sixth switching element 26 has a diode 264 that connects the emitter terminal 262 of the sixth switching element 26 and the collector terminal 261 of the sixth switching element 26.
  • FIG. 3 shows a current in the circuit of the power conversion board 2 when the power conditioner 1 according to the first embodiment converts the AC power supplied from the power system 71 into DC power and outputs the DC power to the power storage device 72.
  • FIG. 1 is a diagram showing an example of a direction in which power flows.
  • FIG. 3 shows the direction of the current when the system voltage is positive. In FIG. 3, the arrows drawn by relatively thick lines indicate the direction in which the current flows.
  • the first switching element 21, the second switching element 22, and the fifth switching element 25 are in the on state, and the third switching element 23, the fourth switching element 24, and the sixth switching element 26 are in the off state.
  • the current flows in the order of the first reactor 7 and the diode 214 of the first switching element 21, and also flows in the order of the diode 224 of the second switching element 22 and the second reactor 8.
  • FIG. 4 shows a current in the circuit of the power conversion board 2 when the power conditioner 1 according to the first embodiment converts the AC power supplied from the power system 71 into DC power and outputs the DC power to the power storage device 72.
  • FIG. 2 is a diagram showing an example of the direction in which power flows. Next to the state shown in FIG. 3, the state shown in FIG. 4 is obtained. In FIG. 4, the arrows drawn by relatively thick lines indicate the direction in which the current flows.
  • the first switching element 21 and the second switching element 22 change from the on state to the off state, and the sixth switching element 26 is in the off state. Changes from to the on state.
  • the third switching element 23 and the fourth switching element 24 are maintained in the off state, and the fifth switching element 25 is maintained in the on state.
  • the current flows in the order of the first reactor 7, the diode 254 of the fifth switching element 25, the collector terminal 261 of the sixth switching element 26, the emitter terminal 262 of the sixth switching element 26, and the second reactor 8. Since the sixth switching element 26 is in the ON state, the current energy is stored in the first reactor 7 and the second reactor 8.
  • the state shown in FIG. 3 is obtained. In this way, the state shown in FIG. 3 and the state shown in FIG. 4 alternately occur.
  • the first reactor 7, the diode 254 of the fifth switching element 25, the collector terminal 261 of the sixth switching element 26, and the emitter of the sixth switching element 26 are obtained. The current flowing in the order of the terminal 262 and the second reactor 8 is maintained.
  • V SURGE L ⁇ dI / dt ⁇ ⁇ ⁇ (1)
  • V SURGE indicates the magnitude of the surge voltage in the switching element.
  • L indicates the magnitude of the wiring inductance component for the wiring connecting the capacitor connected to the switching element and the switching element.
  • I indicates the current flowing between the collector and the emitter of the switching element.
  • T indicates time.
  • D is a symbol indicating differentiation.
  • FIG. 5 is a diagram showing an example of wiring 30 that affects the magnitude of surge voltage in the circuit of the power conversion board 2 according to the first embodiment.
  • FIG. 5 shows the wiring 30 that affects the magnitude of the surge voltage when the system voltage is positive.
  • the wiring 30 is shown by a relatively thick line.
  • the length of the wiring 30 depends on the distance between the first switching element 21, the second switching element 22, the fifth switching element 25 and the sixth switching element 26, and the snubber capacitor 9.
  • the length of the wiring that affects the magnitude of the surge voltage is the third switching element 23, the fourth switching element 24, the fifth switching element 25, the sixth switching element 26, and the snubber capacitor 9.
  • the snubber capacitor 9 is located between the smoothing capacitor 5 and the inverter 6.
  • the magnitude of the surge voltage in the circuit of the power conversion board 2 is the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element. It depends on the length of the wiring connecting 26 and the smoothing capacitor 5.
  • FIG. 6 is a diagram schematically showing a state in which a plurality of elements included in the power conversion board 2 according to the first embodiment are arranged on the board 12.
  • FIG. 6 shows a state of the front surface of the substrate 12 and a state of the back surface of the substrate 12.
  • the substrate 12 is not shown in FIG. All the elements included in the power conversion substrate 2 are arranged on the front surface of the substrate 12, not on the back surface of the substrate 12. Wiring is formed on the back surface of the substrate 12.
  • On the back surface of the substrate 12 of FIG. 6, a figure showing the position of each of the plurality of elements shown on the front surface of the substrate 12 of FIG. 6 is shown.
  • FIG. 6 shows the first smoothing capacitor 5A, the second smoothing capacitor 5B, and the third smoothing capacitor 5C.
  • the first smoothing capacitor 5A, the second smoothing capacitor 5B, and the third smoothing capacitor 5C are examples of the smoothing capacitor 5.
  • FIG. 6 shows a first snubber capacitor 9A and a second snubber capacitor 9B.
  • the first snubber capacitor 9A and the second snubber capacitor 9B are examples of the snubber capacitor 9.
  • Wiring 31 is provided on the front surface of the substrate 12, and wiring 32 is provided on the back surface of the substrate 12.
  • the second switching element 22 has a body portion 41 and a terminal portion 42.
  • the body portion 41 of the second switching element 22 is a portion having a switching function of the second switching element 22.
  • the terminal portion 42 of the second switching element 22 is a collector terminal 221 and an emitter terminal 222 and a gate terminal 223.
  • the symbol “C” is described on the right side of the collector terminal
  • the symbol “E” is described on the right side of the emitter terminal
  • the symbol “G” is described on the right side of the gate terminal.
  • each of the first switching element 21, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 also has a body portion 41 and a terminal portion 42. And have.
  • each terminal portion 42 of the first switching element 21, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 is indicated by a broken ellipse.
  • the terminal portion 42 is a smoothing capacitor 5 from the body portion 41. It is arranged on the substrate 12 in a state of being located on the side of.
  • the terminal portion 42 is smoother than the body portion 41. Close to capacitor 5.
  • the lengths of the wiring 31 and the wiring 32 are shorter than those when the body portion 41 is closer to the smoothing capacitor 5 than the terminal portion 42.
  • the surge voltage in the switching element becomes smaller as the wiring length becomes shorter.
  • the surge voltage in each switching element of the first embodiment is smaller than that in the case where the body portion 41 is closer to the smoothing capacitor 5 than the terminal portion 42.
  • the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
  • the pair of the first switching element 21 and the second switching element 22 that operates based on the first drive signal is defined as the first set 51, and operates based on the second drive signal.
  • the pair of the third switching element 23 and the fourth switching element 24 is defined as the second set 52, and the pair of the fifth switching element 25 and the sixth switching element 26 of the short-circuit portion 11 is defined as the third set 53.
  • NS the pair of the first group 51, the second group 52, and the third group 53 is shown by a broken line frame.
  • the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 included in the inverter 6 are the third.
  • the first set 51, the third set 53, and the second set 52 are arranged on the substrate 12 in this order.
  • the wiring becomes shorter than when the six switching elements are arranged in an order other than the above order. Therefore, the surge voltage in each switching element of the first embodiment becomes small. Therefore, the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
  • the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 are the first group 51 and the third group 53.
  • the second set 52 is arranged on the substrate 12 in this order. That is, the third set 53, which is a set of the fifth switching element 25 and the sixth switching element 26 included in the short-circuit portion 11, is located between the first set 51 and the second set 52.
  • the length of the wiring connecting the first switching element 21 and the third switching element 23 is longer than the case where the first switching element 21 and the third switching element 23 are arranged next to each other.
  • the short-circuit current generated by the malfunction of the switching element becomes large when the wiring inductance component is short, that is, in a short path, and may cause the switching element to be destroyed. Therefore, the power conversion board 2 can reduce the short-circuit current flowing from the first switching element 21 to the third switching element 23. Similarly, the power conversion board 2 can reduce the short-circuit current flowing from the second switching element 22 to the fourth switching element 24.
  • the power conversion board 2 has a snubber capacitor 9 located between the smoothing capacitor 5 and the inverter 6.
  • the power conversion board 2 has a first snubber capacitor 9A and a second snubber capacitor 9B.
  • the first snubber capacitor 9A protects the first switching element 21 and the second switching element 22 when an overvoltage is applied to the first switching element 21 and the second switching element 22 that operate based on the first drive signal. It is a capacitor.
  • the second snubber capacitor 9B protects the third switching element 23 and the fourth switching element 24 when an overvoltage is applied to the third switching element 23 and the fourth switching element 24 that operate based on the second drive signal. It is a capacitor.
  • the first snubber capacitor 9A is connected to the wiring 31 connecting the smoothing capacitor 5 and the full bridge portion 10, and includes the first set 51 and the smoothing capacitor 5, which are a set of the first switching element 21 and the second switching element 22. Located between. Furthermore, the first snubber capacitor 9A is located between the collector terminal 211 of the first switching element 21 and the emitter terminal 222 of the second switching element 22. The portion between the collector terminal 211 of the first switching element 21 and the emitter terminal 222 of the second switching element 22 is a portion affected by the surge voltage.
  • the second snubber capacitor 9B is connected to the wiring 31 connecting the smoothing capacitor 5 and the full bridge portion 10, and includes the second set 52 and the smoothing capacitor 5, which are a set of the third switching element 23 and the fourth switching element 24. Located between. Furthermore, the second snubber capacitor 9B is located between the emitter terminal 232 of the third switching element 23 and the collector terminal 241 of the fourth switching element 24. The portion between the emitter terminal 232 of the third switching element 23 and the collector terminal 241 of the fourth switching element 24 is a portion affected by the surge voltage.
  • the power conversion board 2 Since the power conversion board 2 has the first snubber capacitor 9A and the second snubber capacitor 9B, it is possible to protect the first switching element 21, the second switching element 22, the third switching element 23, and the fourth switching element 24. At the same time, the surge voltage applied to each of the fifth switching element 25 and the sixth switching element 26 included in the short-circuit portion 11 can be suppressed. Therefore, the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
  • FIG. 7 is a second diagram schematically showing a state in which a plurality of elements included in the power conversion board 2 according to the first embodiment are arranged on the board 12.
  • FIG. 7 shows the state of the surface of the substrate 12.
  • the substrate 12 is not shown in FIG. As described above, all the elements of the power conversion board 2 are arranged on the surface of the board 12.
  • the power conversion board 2 includes a first drive circuit 61 for driving the first switching element 21, a second drive circuit 62 for driving the second switching element 22, and the like.
  • a third drive circuit 63 that drives the third switching element 23, a fourth drive circuit 64 that drives the fourth switching element 24, a fifth drive circuit 65 that drives the fifth switching element 25, and a sixth switching element 26. It further has a sixth drive circuit 66 for driving the above.
  • the first drive circuit 61 charges and discharges the gate of the first switching element 21 according to the first drive signal generated by the control device 3, and controls the on and off of the first switching element 21.
  • the first drive circuit 61 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side.
  • the terminal portion 42 of the first switching element 21 is indicated by a broken line ellipse.
  • the side of the terminal portion 42 is described as “main circuit portion side”
  • the side of the body portion 41 is described as “control unit side”.
  • the second drive circuit 62 charges and discharges the gate of the second switching element 22 according to the first drive signal generated by the control device 3, and controls the on and off of the second switching element 22.
  • the second drive circuit 62 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the second switching element 22 but on the body portion 41 side.
  • the third drive circuit 63 charges and discharges the gate of the third switching element 23 according to the second drive signal generated by the control device 3, and controls the on and off of the third switching element 23.
  • the third drive circuit 63 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the third switching element 23 but on the body portion 41 side.
  • the fourth drive circuit 64 charges and discharges the gate of the fourth switching element 24 according to the second drive signal generated by the control device 3, and controls the on and off of the fourth switching element 24.
  • the fourth drive circuit 64 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the fourth switching element 24 but on the body portion 41 side.
  • the fifth drive circuit 65 charges and discharges the gate of the fifth switching element 25 according to the third drive signal generated by the control device 3, and controls the on and off of the fifth switching element 25.
  • the fifth drive circuit 65 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the fifth switching element 25 but on the body portion 41 side.
  • the sixth drive circuit 66 charges and discharges the gate of the sixth switching element 26 according to the fourth drive signal generated by the control device 3, and controls the on and off of the sixth switching element 26.
  • the sixth drive circuit 66 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the sixth switching element 26 but on the body portion 41 side.
  • the configuration of the first drive circuit 61 is the same as that of each of the second drive circuit 62, the third drive circuit 63, the fourth drive circuit 64, the fifth drive circuit 65, and the sixth drive circuit 66.
  • the first drive circuit 61 will be further referred to on behalf of the first drive circuit 61, the second drive circuit 62, the third drive circuit 63, the fourth drive circuit 64, the fifth drive circuit 65, and the sixth drive circuit 66. explain.
  • FIG. 8 is a diagram for explaining the effect of the first drive circuit 61 included in the power conversion board 2 according to the first embodiment.
  • FIG. 8 corresponds to FIG. 7, and is a case where the first drive circuit 61 is arranged on the substrate 12 in a state where the first drive circuit 61 is located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side. It is a figure.
  • FIG. 8 shows a main circuit unit 67 through which the main current flows when power conversion is performed, and a gate drive circuit unit 68 connecting the first drive circuit 61 and the emitter terminal 212 of the first switching element 21.
  • FIG. 8 further shows a common circuit unit 69, which is a common portion between the main circuit unit 67 and the gate drive circuit unit 68. In FIG. 8, the common circuit unit 69 is shown by a relatively thick line.
  • FIG. 9 is a second diagram for explaining the effect of the first drive circuit 61 included in the power conversion board 2 according to the first embodiment.
  • FIG. 9 is a diagram showing a comparative example, which does not correspond to FIG. 7.
  • FIG. 9 is a diagram in the case where the first drive circuit 61 is arranged on the substrate 12 in a state where it is located not on the side of the body portion 41 of the first switching element 21 but on the side of the terminal portion 42.
  • FIG. 9 shows the main circuit unit 67, the gate drive circuit unit 68, and the common circuit unit 69, as in FIG. In FIG. 9, the common circuit unit 69 is shown by a relatively thick line.
  • the common circuit unit 69 of the first embodiment is shorter than the common circuit unit 69 of the comparative example. That is, the inductance of the common circuit unit 69 of the first embodiment is smaller than the inductance of the common circuit unit 69 of the comparative example.
  • the first drive circuit 61 is arranged on the substrate 12 in a state where it is located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side. Therefore, the power conversion board 2 can prevent the first drive circuit 61 from malfunctioning due to the voltage generated by the fluctuation of the current flowing through the main circuit unit 67. Furthermore, the power conversion board 2 can prevent the first drive circuit 61 from malfunctioning due to voltage noise generated by fluctuations in the current flowing through the main circuit unit 67.
  • the power conversion substrate 2 since the power conversion substrate 2 according to the first embodiment has the short-circuit portion 11 having the fifth switching element 25 and the sixth switching element 26, the ripple generated in the alternating current is suppressed and the leakage current is reduced. be able to.
  • the power conversion board 2 has a full bridge portion 10 having a first switching element 21, a second switching element 22, a third switching element 23, and a fourth switching element 24 that form a full bridge circuit.
  • the terminal portion 42 is a smoothing capacitor 5 from the body portion 41. It is arranged on the substrate 12 in a state of being located on the side of. Therefore, the surge voltage in each switching element of the first embodiment is smaller than that in the case where the body portion 41 is located closer to the smoothing capacitor 5 than the terminal portion 42. As a result, the power conversion board 2 can prevent each of the six switching elements included in the inverter 6 from failing when a surge voltage is generated.
  • ripples generated in the alternating current are suppressed, leakage current is reduced, and when a surge voltage is generated, each of the plurality of switching elements included in the inverter 6 fails. Can be suppressed. Furthermore, when a surge voltage is generated while some or all of the plurality of switching elements included in the inverter 6 are off, each of the plurality of switching elements included in the inverter 6 fails in the power conversion board 2. Can be suppressed.
  • a surge voltage is generated when the power conditioner 1 converts the DC power supplied from the power storage device 72 into AC power and outputs the AC power to one or both of the power system 71 and the load 73. Even in such a case, it is possible to prevent each of the plurality of switching elements included in the inverter 6 from failing.
  • the six switching elements included in the inverter 6 include a first set 51 of a first switching element 21 and a second switching element 22 that operate based on a first drive signal, and a short-circuit portion 11.
  • the substrate is in the order of the third set 53 of the fifth switching element 25 and the sixth switching element 26, and the second set 52 of the third switching element 23 and the fourth switching element 24 that operate based on the second drive signal. It is arranged at 12.
  • the six switching elements are arranged in the above order, the wiring becomes shorter than when the six switching elements are arranged in an order other than the above order. Therefore, the surge voltage in each of the six switching elements becomes small.
  • the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
  • the wiring connecting the first switching element 21 and the third switching element 23 is the first switching element. It is longer than the case where the 21 and the third switching element 23 are arranged next to each other.
  • the short-circuit current generated by the malfunction of the switching element becomes large when the wiring inductance component is short, that is, in a short path, and may cause the switching element to be destroyed. Therefore, the power conversion board 2 can suppress the short-circuit current flowing from the first switching element 21 to the third switching element 23.
  • the power conversion board 2 can suppress the short-circuit current flowing from the third switching element 23 to the first switching element 21.
  • the power conversion board 2 can suppress the short-circuit current flowing from the second switching element 22 to the fourth switching element 24 and the short-circuit current flowing from the fourth switching element 24 to the second switching element 22.
  • the first drive circuit 61 for driving the first switching element 21 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side. There is. Similarly, each of the second drive circuit 62, the third drive circuit 63, the fourth drive circuit 64, the fifth drive circuit 65, and the sixth drive circuit 66 is not on the side of the terminal portion 42 of the switching element to be driven, but on the body portion. It is arranged on the substrate 12 in a state of being located on the side of 41. As a result, the common circuit section 69, which is a common portion between the main circuit section 67 through which the main current flows when the power is converted and the gate drive circuit section 68, becomes relatively short.
  • the power conversion board 2 has a first drive circuit 61, a second drive circuit 62, a third drive circuit 63, a fourth drive circuit 64, and a fifth drive circuit depending on the voltage generated when the current flows through the main circuit unit 67. It is possible to prevent each of the 65 and the sixth drive circuit 66 from malfunctioning.
  • the gate drive circuit unit 68 is a wiring connecting the drive circuit and the emitter terminal of the switching element driven by the drive circuit.
  • the full bridge unit 10 may have only one of a function of converting DC power into AC power and a function of converting AC power into DC power.
  • FIG. 10 is a diagram schematically showing a substrate 12A included in the power conditioner according to the second embodiment.
  • the substrate 12 of the first embodiment is replaced with the substrate 12A.
  • the difference between the second embodiment and the first embodiment is that the substrate 12 of the first embodiment is replaced with the substrate 12A.
  • the differences from the first embodiment will be mainly described.
  • FIG. 10 is an exploded perspective view of the substrate 12A.
  • the substrate 12A is a four-layer substrate having a first wiring layer 121, a second wiring layer 122, a third wiring layer 123, and a fourth wiring layer 124.
  • the first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124 are in the order of the first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124. It is piled up with.
  • the substrate 12A has a first insulating layer 125 located between the first wiring layer 121 and the second wiring layer 122, and a second insulating layer 126 located between the second wiring layer 122 and the third wiring layer 123. And a third insulating layer 127 located between the third wiring layer 123 and the fourth wiring layer 124.
  • the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 are the first wirings. It is arranged on the layer 121.
  • the first wiring layer 121 is one layer outside the substrate 12A, which is a four-layer substrate.
  • the converter 4, the smoothing capacitor 5, the first reactor 7, the second reactor 8, the first snubber capacitor 9A and the second snubber capacitor 9B are also arranged in the first wiring layer 121. ..
  • the second wiring layer 122 of the substrate 12A is a layer having a copper foil pattern other than the through hole where the wiring is located. That is, the second wiring layer 122 is a layer in which one surface of the substrate is covered with a copper film and through holes for wiring are formed. Wiring is located in the through hole. The second wiring layer 122 is one layer in the middle of the four-layer substrate. Wiring is provided in each of the third wiring layer 123 and the fourth wiring layer 124.
  • FIG. 11 is a diagram for explaining the effect obtained by the substrate 12A of the power conditioner according to the second embodiment.
  • FIG. 11 shows the first wiring layer 121, the first insulating layer 125, and the second wiring layer 122 of the substrate 12A.
  • the first wiring layer 121 is one layer outside the substrate 12A, which is a four-layer substrate
  • the second wiring layer 122 is a layer having a copper foil pattern except for the through holes.
  • the straight arrow 131 in the first wiring layer 121 of FIG. 11 schematically indicates the direction of the current flowing in a part of the wiring of the first wiring layer 121.
  • a concentric magnetic field centered on the part of the wiring is generated.
  • the circular arrow 132 in FIG. 11 indicates one magnetic field line in the magnetic field. The magnetic field becomes an inductance component of the wiring.
  • the second wiring layer 122 is a layer of a copper foil pattern
  • an eddy current 133 that generates a magnetic field that cancels the above magnetic field flows through the second wiring layer 122. That is, the eddy current 133 reduces the inductance component of the wiring provided in each of the third wiring layer 123 and the fourth wiring layer 124. That is, in the power conditioner according to the second embodiment, since the second wiring layer 122 of the substrate 12A, which is a four-layer substrate, is a layer of the copper foil pattern, each of the third wiring layer 123 and the fourth wiring layer 124 can be used. It is possible to reduce the inductance component of the provided wiring.
  • FIG. 12 is a diagram showing a processor 91 when a part or all of the control device 3 included in the power conditioner 1 according to the first embodiment is realized by the processor 91. That is, some or all of the functions of the control device 3 may be realized by the processor 91 that executes the program stored in the memory 92.
  • the processor 91 is a CPU (Central Processing Unit), a processing device, an arithmetic unit, a microprocessor, or a DSP (Digital Signal Processor).
  • the memory 92 is also shown in FIG.
  • the processor 91 When a part or all the functions of the control device 3 are realized by the processor 91, the part or all the functions are realized by the processor 91 and the software, the firmware, or the combination of the software and the firmware.
  • the software or firmware is written as a program and stored in the memory 92.
  • the processor 91 realizes a part or all the functions of the control device 3 by reading and executing the program stored in the memory 92.
  • the power conditioner 1 is a program in which some or all of the steps executed by the control device 3 are eventually executed. It has a memory 92 for storing. It can be said that the program stored in the memory 92 causes the computer to execute a part or all of the procedure or method executed by the control device 3.
  • the memory 92 is, for example, non-volatile such as RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable Read Only Memory), EEPROM (registered trademark) (Electrically Erasable Programmable Read-Only Memory).
  • RAM Random Access Memory
  • ROM Read Only Memory
  • flash memory EPROM (Erasable Programmable Read Only Memory)
  • EEPROM registered trademark
  • it may be a volatile semiconductor memory, a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, a DVD (Digital Versatile Disk), or the like.
  • FIG. 13 is a diagram showing a processing circuit 93 when a part or all of the control device 3 included in the power conditioner 1 according to the first embodiment is realized by the processing circuit 93. That is, a part or all of the control device 3 may be realized by the processing circuit 93.
  • the processing circuit 93 is dedicated hardware.
  • the processing circuit 93 is, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a combination thereof. Is.
  • a part of the control device 3 may be dedicated hardware separate from the rest.
  • some of the plurality of functions may be realized by software or firmware, and the rest of the plurality of functions may be realized by dedicated hardware.
  • the plurality of functions of the control device 3 can be realized by hardware, software, firmware, or a combination thereof.
  • the configuration shown in the above embodiments is an example, and can be combined with another known technique, can be combined with each other, and does not deviate from the gist. It is also possible to omit or change a part of the configuration.

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Abstract

This power conversion board (2) comprises a smoothing capacitor (5), a full bridge section (10) that has a function to convert direct-current power into alternating-current power and/or a function to convert alternating-current power into direct-current power, a short-circuit section (11) that short-circuits alternating-current power, and a board (12). The full bridge section (10) comprises a first switching element (21), a second switching element (22), a third switching element (23), and a fourth switching element (24) that form a full bridge circuit. The short-circuit section (11) comprises a fifth switching element (25) and a sixth switching element (26). The first switching element (21), the second switching element (22), the third switching element (23), the fourth switching element (24), the fifth switching element (25), and the sixth switching element (26) are each disposed on a board so that a terminal section (42) is disposed on the smoothing capacitor (5) side of a body section (41).

Description

電力変換基板Power conversion board
　本開示は、直流電力を交流電力に変換する機能と交流電力を直流電力に変換する機能との一方又は双方を有する電力変換基板に関する。 The present disclosure relates to a power conversion board having one or both of a function of converting DC power into AC power and a function of converting AC power into DC power.
　従来、フルブリッジインバータによって得られた交流電力をリアクトルを介して電力系統に出力するインバータ装置が提案されている（例えば、特許文献１参照）。当該インバータ装置は、フルブリッジインバータとリアクトルとの間に位置していてフルブリッジインバータの出力を短絡する短絡手段を有する。短絡手段は、二つのスイッチング素子を有する。当該インバータ装置は、フルブリッジインバータが出力する交流電流に生じるリプルを当該交流電流の平均値が零となる辺りで小さくする。これにより、直流から交流への変換効率が向上すると共に、ノイズが低減する。また、当該インバータ装置は、直流電圧の負側出力端の電位の変動幅を抑える。これにより、漏洩電流が低減される。 Conventionally, an inverter device that outputs AC power obtained by a full-bridge inverter to an electric power system via a reactor has been proposed (see, for example, Patent Document 1). The inverter device has a short-circuiting means located between the full-bridge inverter and the reactor to short-circuit the output of the full-bridge inverter. The short circuit means has two switching elements. The inverter device reduces the ripple generated in the alternating current output by the full-bridge inverter near the point where the average value of the alternating current becomes zero. As a result, the conversion efficiency from direct current to alternating current is improved, and noise is reduced. In addition, the inverter device suppresses the fluctuation range of the potential at the negative output end of the DC voltage. This reduces the leakage current.
特開２００９－８９５４１号公報JP-A-2009-89541
　従来のインバータ装置は、電力系統から供給される交流電力を直流電力に変換して直流電力を蓄電機器に出力する際にサージ電圧が発生した場合、サージ電圧がフルブリッジインバータを構成する複数のスイッチング素子に印加される。そのため、従来のインバータ装置では、サージ電圧が発生した場合に当該複数のスイッチング素子の一部又は全部が故障する可能性がある。交流電流に生じるリプルを抑制すると共に漏洩電流を低減させ、かつサージ電圧が発生した場合にインバータに含まれる複数のスイッチング素子の各々が故障することを抑制する電力変換基板が提供されることが要求されている。 In a conventional inverter device, when a surge voltage is generated when AC power supplied from a power system is converted into DC power and DC power is output to a power storage device, the surge voltage constitutes a full bridge inverter. It is applied to the element. Therefore, in the conventional inverter device, when a surge voltage is generated, a part or all of the plurality of switching elements may fail. It is required to provide a power conversion substrate that suppresses ripples generated in alternating current, reduces leakage current, and suppresses failure of each of a plurality of switching elements included in an inverter when a surge voltage occurs. Has been done.
　本開示は、上記に鑑みてなされたものであって、交流電流に生じるリプルを抑制すると共に漏洩電流を低減させ、かつサージ電圧が発生した場合にインバータに含まれる複数のスイッチング素子の各々が故障することを抑制する電力変換基板を得ることを目的とする。 The present disclosure has been made in view of the above, in which ripples generated in alternating current are suppressed, leakage current is reduced, and when a surge voltage is generated, each of a plurality of switching elements included in the inverter fails. The purpose is to obtain a power conversion substrate that suppresses this.
　上述した課題を解決し、目的を達成するために、本開示にかかる電力変換基板は、直流電圧を平滑する平滑コンデンサと、直流電力を交流電力に変換する機能と交流電力を直流電力に変換する機能との一方又は双方を有するフルブリッジ部と、交流電力を短絡する短絡部と、平滑コンデンサ、フルブリッジ部及び短絡部が配置されている基板とを有する。フルブリッジ部は、フルブリッジ回路を構成する第１スイッチング素子、第２スイッチング素子、第３スイッチング素子及び第４スイッチング素子を有する。短絡部は、第５スイッチング素子及び第６スイッチング素子を有する。第１スイッチング素子、第２スイッチング素子、第３スイッチング素子、第４スイッチング素子、第５スイッチング素子及び第６スイッチング素子の各々は、ボディ部と、端子部とを有する。第１スイッチング素子、第２スイッチング素子、第３スイッチング素子、第４スイッチング素子、第５スイッチング素子及び第６スイッチング素子の各々は、端子部がボディ部より平滑コンデンサの側に位置する状態で基板に配置されている。 In order to solve the above-mentioned problems and achieve the object, the power conversion substrate according to the present disclosure includes a smoothing capacitor for smoothing a DC voltage, a function for converting DC power to AC power, and a function for converting AC power to DC power. It has a full bridge portion having one or both functions, a short circuit portion for short-circuiting AC power, and a substrate on which a smoothing capacitor, a full bridge portion, and a short-circuit portion are arranged. The full bridge section includes a first switching element, a second switching element, a third switching element, and a fourth switching element that form a full bridge circuit. The short-circuit portion has a fifth switching element and a sixth switching element. Each of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element has a body portion and a terminal portion. Each of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element is placed on the substrate with the terminal portion located closer to the smoothing capacitor than the body portion. Have been placed.
　本開示によれば、交流電流に生じるリプルを抑制すると共に漏洩電流を低減させ、かつサージ電圧が発生した場合にインバータに含まれる複数のスイッチング素子の各々が故障することを抑制することができるという効果を奏する。 According to the present disclosure, it is possible to suppress ripples generated in alternating current, reduce leakage current, and prevent failure of each of a plurality of switching elements included in an inverter when a surge voltage is generated. It works.
実施の形態１にかかるパワーコンディショナの構成の概略を示す図The figure which shows the outline of the structure of the power conditioner which concerns on Embodiment 1. 実施の形態１にかかる電力変換基板の回路の構成を示す図The figure which shows the structure of the circuit of the power conversion board which concerns on Embodiment 1. 実施の形態１にかかるパワーコンディショナが電力系統から供給される交流電力を直流電力に変換して直流電力を蓄電機器に出力する場合の電力変換基板の回路において電流が流れる向きの例を示す第１図An example of the direction in which current flows in the circuit of the power conversion board when the power conditioner according to the first embodiment converts the AC power supplied from the power system into DC power and outputs the DC power to the power storage device is shown. Figure 1 実施の形態１にかかるパワーコンディショナが電力系統から供給される交流電力を直流電力に変換して直流電力を蓄電機器に出力する場合の電力変換基板の回路において電流が流れる向きの例を示す第２図An example of the direction in which current flows in the circuit of the power conversion board when the power conditioner according to the first embodiment converts the AC power supplied from the power system into DC power and outputs the DC power to the power storage device is shown. Figure 2 実施の形態１にかかる電力変換基板の回路におけるサージ電圧の大きさに影響を与える配線の例を示す図The figure which shows the example of the wiring which influences the magnitude of a surge voltage in the circuit of the power conversion board which concerns on Embodiment 1. 実施の形態１にかかる電力変換基板が有する複数の素子が基板に配置されている状態を模式的に示す第１図FIG. 1 schematically shows a state in which a plurality of elements included in the power conversion board according to the first embodiment are arranged on the board. 実施の形態１にかかる電力変換基板が有する複数の素子が基板に配置されている状態を模式的に示す第２図FIG. 2 schematically shows a state in which a plurality of elements included in the power conversion board according to the first embodiment are arranged on the board. 実施の形態１にかかる電力変換基板が有する第１駆動回路の効果を説明するための第１図FIG. 1 for explaining the effect of the first drive circuit included in the power conversion board according to the first embodiment. 実施の形態１にかかる電力変換基板が有する第１駆動回路の効果を説明するための第２図FIG. 2 for explaining the effect of the first drive circuit included in the power conversion board according to the first embodiment. 実施の形態２にかかるパワーコンディショナが有する基板を模式的に示す図The figure which shows typically the substrate which the power conditioner which concerns on Embodiment 2 have. 実施の形態２にかかるパワーコンディショナが有する基板によって得られる効果を説明するための図The figure for demonstrating the effect obtained by the substrate which the power conditioner which concerns on Embodiment 2 have. 実施の形態１にかかるパワーコンディショナが有する制御装置の一部又は全部がプロセッサによって実現される場合のプロセッサを示す図The figure which shows the processor when a part or all of the control apparatus which the power conditioner which concerns on Embodiment 1 have are realized by a processor. 実施の形態１にかかるパワーコンディショナが有する制御装置の一部又は全部が処理回路によって実現される場合の処理回路を示す図The figure which shows the processing circuit when a part or all of the control device which the power conditioner which concerns on Embodiment 1 has is realized by a processing circuit.
　以下に、実施の形態にかかる電力変換基板を図面に基づいて詳細に説明する。なお、この実施の形態によりこの開示が限定されるものではない。 The power conversion board according to the embodiment will be described in detail below based on the drawings. It should be noted that this embodiment does not limit this disclosure.
実施の形態１．
　図１は、実施の形態１にかかるパワーコンディショナ１の構成の概略を示す図である。パワーコンディショナ１は、電力系統７１から供給される交流電力を直流電力に変換して直流電力を蓄電機器７２に出力する機能と、蓄電機器７２から供給される直流電力を交流電力に変換して交流電力を電力系統７１と負荷７３との一方又は双方に出力する機能とを有する。図１には、電力系統７１、蓄電機器７２及び負荷７３も示されている。負荷７３は、交流電力をもとに動作する装置である。負荷７３は、電力系統７１から供給される交流電力をもとに動作することもできる。 Embodiment 1.
FIG. 1 is a diagram showing an outline of the configuration of the power conditioner 1 according to the first embodiment. The power conditioner 1 has a function of converting AC power supplied from the power system 71 into DC power and outputting the DC power to the power storage device 72, and converting the DC power supplied from the power storage device 72 into AC power. It has a function of outputting AC power to one or both of the power system 71 and the load 73. FIG. 1 also shows a power system 71, a power storage device 72, and a load 73. The load 73 is a device that operates based on AC power. The load 73 can also operate based on the AC power supplied from the power system 71.
　パワーコンディショナ１は、直流電力を交流電力に変換する機能と交流電力を直流電力に変換する機能とを有する電力変換基板２と、電力変換基板２を制御する制御装置３とを有する。電力変換基板２は、直流電圧を昇圧する機能と降圧する機能とを有するコンバータ４と、直流電圧を平滑する平滑コンデンサ５と、直流電力を交流電力に変換する機能と交流電力を直流電力に変換する機能とを有するインバータ６とを有する。平滑コンデンサ５の例は、電解コンデンサである。 The power conditioner 1 has a power conversion board 2 having a function of converting DC power into AC power and a function of converting AC power into DC power, and a control device 3 for controlling the power conversion board 2. The power conversion board 2 includes a converter 4 having a function of boosting and lowering a DC voltage, a smoothing capacitor 5 for smoothing the DC voltage, a function of converting DC power into AC power, and a function of converting AC power into DC power. It has an inverter 6 having a function to perform the function. An example of a smoothing capacitor 5 is an electrolytic capacitor.
　図２は、実施の形態１にかかる電力変換基板２の回路の構成を示す図である。電力変換基板２は、上述の通り、コンバータ４、平滑コンデンサ５及びインバータ６を有する。図２には、コンバータ４は示されていない。電力変換基板２は、交流電力における高周波成分を除去するための第１リアクトル７及び第２リアクトル８を更に有する。電力変換基板２は、平滑コンデンサ５とインバータ６との間に位置しているスナバコンデンサ９を更に有する。スナバコンデンサ９の詳細については、後述する。 FIG. 2 is a diagram showing a configuration of a circuit of the power conversion board 2 according to the first embodiment. As described above, the power conversion board 2 includes a converter 4, a smoothing capacitor 5, and an inverter 6. The converter 4 is not shown in FIG. The power conversion board 2 further includes a first reactor 7 and a second reactor 8 for removing high frequency components in AC power. The power conversion board 2 further includes a snubber capacitor 9 located between the smoothing capacitor 5 and the inverter 6. Details of the snubber capacitor 9 will be described later.
　インバータ６は、直流電力を交流電力に変換する機能と交流電力を直流電力に変換する機能とを有するフルブリッジ部１０と、交流電力を短絡する短絡部１１とを有する。電力変換基板２は、コンバータ４、平滑コンデンサ５、インバータ６、第１リアクトル７、第２リアクトル８及びスナバコンデンサ９が配置されている基板１２を更に有する。基板１２には、コンバータ４とインバータ６とを接続する第１配線１３及び第２配線１４と、インバータ６と電力系統７１とを接続するための第３配線１５及び第４配線１６とが形成されている。 The inverter 6 has a full bridge portion 10 having a function of converting DC power into AC power and a function of converting AC power into DC power, and a short-circuit portion 11 that short-circuits AC power. The power conversion board 2 further includes a board 12 on which a converter 4, a smoothing capacitor 5, an inverter 6, a first reactor 7, a second reactor 8, and a snubber capacitor 9 are arranged. The board 12 is formed with the first wiring 13 and the second wiring 14 for connecting the converter 4 and the inverter 6, and the third wiring 15 and the fourth wiring 16 for connecting the inverter 6 and the power system 71. ing.
　平滑コンデンサ５及びスナバコンデンサ９は、第１配線１３及び第２配線１４に並列に接続されている。第１リアクトル７の一方の端部は第３配線１５に接続されており、第２リアクトル８の一方の端部は第４配線１６に接続されている。第１リアクトル７及び第２リアクトル８の各々の他方の端部は、電力系統７１に接続されている。図２には、電力系統７１は示されていない。 The smoothing capacitor 5 and the snubber capacitor 9 are connected in parallel to the first wiring 13 and the second wiring 14. One end of the first reactor 7 is connected to the third wire 15, and one end of the second reactor 8 is connected to the fourth wire 16. The other end of each of the first reactor 7 and the second reactor 8 is connected to the power system 71. The power system 71 is not shown in FIG.
　フルブリッジ部１０は、フルブリッジ回路を構成する第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３及び第４スイッチング素子２４を有する。例えば、第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３及び第４スイッチング素子２４の各々は、金属酸化物シリコン電界効果トランスミッタである。第１スイッチング素子２１及び第２スイッチング素子２２は第１駆動信号をもとに動作し、第３スイッチング素子２３及び第４スイッチング素子２４は第２駆動信号をもとに動作する。第１駆動信号及び第２駆動信号は、制御装置３によって生成される。 The full bridge unit 10 includes a first switching element 21, a second switching element 22, a third switching element 23, and a fourth switching element 24 that form a full bridge circuit. For example, each of the first switching element 21, the second switching element 22, the third switching element 23, and the fourth switching element 24 is a metal oxide silicon field effect transmitter. The first switching element 21 and the second switching element 22 operate based on the first drive signal, and the third switching element 23 and the fourth switching element 24 operate based on the second drive signal. The first drive signal and the second drive signal are generated by the control device 3.
　第１スイッチング素子２１のコレクタ端子２１１は第１配線１３に接続されており、第１スイッチング素子２１のエミッタ端子２１２は第３配線１５に接続されている。図２では、コレクタ端子２１１及びエミッタ端子２１２の各々は、破線の楕円で示されている。第２スイッチング素子２２のコレクタ端子２２１は第４配線１６に接続されており、第２スイッチング素子２２のエミッタ端子２２２は第２配線１４に接続されている。図２では、コレクタ端子２２１及びエミッタ端子２２２の各々は、破線の楕円で示されている。 The collector terminal 211 of the first switching element 21 is connected to the first wiring 13, and the emitter terminal 212 of the first switching element 21 is connected to the third wiring 15. In FIG. 2, each of the collector terminal 211 and the emitter terminal 212 is indicated by a broken line ellipse. The collector terminal 221 of the second switching element 22 is connected to the fourth wiring 16, and the emitter terminal 222 of the second switching element 22 is connected to the second wiring 14. In FIG. 2, each of the collector terminal 221 and the emitter terminal 222 is indicated by a broken line ellipse.
　第３スイッチング素子２３のコレクタ端子２３１は第３配線１５に接続されており、第３スイッチング素子２３のエミッタ端子２３２は第２配線１４に接続されている。図２では、コレクタ端子２３１及びエミッタ端子２３２の各々は、破線の楕円で示されている。第４スイッチング素子２４のコレクタ端子２４１は第１配線１３に接続されており、第４スイッチング素子２４のエミッタ端子２４２は第４配線１６に接続されている。図２では、コレクタ端子２４１及びエミッタ端子２４２の各々は、破線の楕円で示されている。 The collector terminal 231 of the third switching element 23 is connected to the third wiring 15, and the emitter terminal 232 of the third switching element 23 is connected to the second wiring 14. In FIG. 2, each of the collector terminal 231 and the emitter terminal 232 is indicated by a broken line ellipse. The collector terminal 241 of the fourth switching element 24 is connected to the first wiring 13, and the emitter terminal 242 of the fourth switching element 24 is connected to the fourth wiring 16. In FIG. 2, each of the collector terminal 241 and the emitter terminal 242 is indicated by a broken line ellipse.
　第１スイッチング素子２１のゲート端子２１３及び第２スイッチング素子２２のゲート端子２２３には、第１駆動信号に対応する電圧が供給される。図２では、ゲート端子２１３及びゲート端子２２３の各々は、破線の楕円で示されている。第１スイッチング素子２１及び第２スイッチング素子２２は、当該電圧をもとにオン又はオフの状態になる。上述の通り、第１駆動信号は制御装置３によって生成される。 A voltage corresponding to the first drive signal is supplied to the gate terminal 213 of the first switching element 21 and the gate terminal 223 of the second switching element 22. In FIG. 2, each of the gate terminal 213 and the gate terminal 223 is indicated by a broken line ellipse. The first switching element 21 and the second switching element 22 are turned on or off based on the voltage. As described above, the first drive signal is generated by the control device 3.
　第３スイッチング素子２３のゲート端子２３３及び第４スイッチング素子２４のゲート端子２４３には、第２駆動信号に対応する電圧が供給される。図２では、ゲート端子２３３及びゲート端子２４３の各々は、破線の楕円で示されている。第３スイッチング素子２３及び第４スイッチング素子２４は、当該電圧をもとにオン又はオフの状態になる。上述の通り、第２駆動信号は制御装置３によって生成される。 A voltage corresponding to the second drive signal is supplied to the gate terminal 233 of the third switching element 23 and the gate terminal 243 of the fourth switching element 24. In FIG. 2, each of the gate terminal 233 and the gate terminal 243 is indicated by a broken line ellipse. The third switching element 23 and the fourth switching element 24 are turned on or off based on the voltage. As described above, the second drive signal is generated by the control device 3.
　第１スイッチング素子２１は、第１スイッチング素子２１のエミッタ端子２１２と第１スイッチング素子２１のコレクタ端子２１１とを接続するダイオード２１４を有する。第２スイッチング素子２２は、第２スイッチング素子２２のエミッタ端子２２２と第２スイッチング素子２２のコレクタ端子２２１とを接続するダイオード２２４を有する。 The first switching element 21 has a diode 214 that connects the emitter terminal 212 of the first switching element 21 and the collector terminal 211 of the first switching element 21. The second switching element 22 has a diode 224 that connects the emitter terminal 222 of the second switching element 22 and the collector terminal 221 of the second switching element 22.
　第３スイッチング素子２３は、第３スイッチング素子２３のエミッタ端子２３２と第３スイッチング素子２３のコレクタ端子２３１とを接続するダイオード２３４を有する。第４スイッチング素子２４は、第４スイッチング素子２４のエミッタ端子２４２と第４スイッチング素子２４のコレクタ端子２４１とを接続するダイオード２４４を有する。 The third switching element 23 has a diode 234 that connects the emitter terminal 232 of the third switching element 23 and the collector terminal 231 of the third switching element 23. The fourth switching element 24 has a diode 244 that connects the emitter terminal 242 of the fourth switching element 24 and the collector terminal 241 of the fourth switching element 24.
　短絡部１１は、第５スイッチング素子２５及び第６スイッチング素子２６を有する。例えば、第５スイッチング素子２５及び第６スイッチング素子２６の各々は、金属酸化物シリコン電界効果トランスミッタである。第５スイッチング素子２５と第６スイッチング素子２６とは、直列に接続されている。具体的には、第５スイッチング素子２５のコレクタ端子２５１と第６スイッチング素子２６のコレクタ端子２６１とが接続されている。図２では、コレクタ端子２５１及びコレクタ端子２６１の各々は、破線の楕円で示されている。 The short-circuit portion 11 has a fifth switching element 25 and a sixth switching element 26. For example, each of the fifth switching element 25 and the sixth switching element 26 is a metal oxide silicon field effect transmitter. The fifth switching element 25 and the sixth switching element 26 are connected in series. Specifically, the collector terminal 251 of the fifth switching element 25 and the collector terminal 261 of the sixth switching element 26 are connected. In FIG. 2, each of the collector terminal 251 and the collector terminal 261 is indicated by a broken line ellipse.
　第５スイッチング素子２５のエミッタ端子２５２は第３配線１５に接続されており、第６スイッチング素子２６のエミッタ端子２６２は第４配線１６に接続されている。図２では、エミッタ端子２５２及びエミッタ端子２６２の各々は、破線の楕円で示されている。電力変換基板２は、第５スイッチング素子２５及び第６スイッチング素子２６を有する短絡部１１を有するので、交流電流に生じるリプルを抑制すると共に漏洩電流を低減させることができる。 The emitter terminal 252 of the fifth switching element 25 is connected to the third wiring 15, and the emitter terminal 262 of the sixth switching element 26 is connected to the fourth wiring 16. In FIG. 2, each of the emitter terminal 252 and the emitter terminal 262 is indicated by a broken line ellipse. Since the power conversion board 2 has a short-circuit portion 11 having a fifth switching element 25 and a sixth switching element 26, it is possible to suppress ripples generated in alternating current and reduce leakage current.
　第５スイッチング素子２５は、第３駆動信号に対応する電圧が供給されるゲート端子２５３を有する。第６スイッチング素子２６は、第４駆動信号に対応する電圧が供給されるゲート端子２６３を有する。図２では、ゲート端子２５３及びゲート端子２６３の各々は、破線の楕円で示されている。第３駆動信号及び第４駆動信号は、制御装置３によって生成される。 The fifth switching element 25 has a gate terminal 253 to which a voltage corresponding to the third drive signal is supplied. The sixth switching element 26 has a gate terminal 263 to which a voltage corresponding to the fourth drive signal is supplied. In FIG. 2, each of the gate terminal 253 and the gate terminal 263 is indicated by a broken line ellipse. The third drive signal and the fourth drive signal are generated by the control device 3.
　第５スイッチング素子２５は、第５スイッチング素子２５のエミッタ端子２５２と第５スイッチング素子２５のコレクタ端子２５１とを接続するダイオード２５４を有する。第６スイッチング素子２６は、第６スイッチング素子２６のエミッタ端子２６２と第６スイッチング素子２６のコレクタ端子２６１とを接続するダイオード２６４を有する。 The fifth switching element 25 has a diode 254 that connects the emitter terminal 252 of the fifth switching element 25 and the collector terminal 251 of the fifth switching element 25. The sixth switching element 26 has a diode 264 that connects the emitter terminal 262 of the sixth switching element 26 and the collector terminal 261 of the sixth switching element 26.
　図３は、実施の形態１にかかるパワーコンディショナ１が電力系統７１から供給される交流電力を直流電力に変換して直流電力を蓄電機器７２に出力する場合の電力変換基板２の回路において電流が流れる向きの例を示す第１図である。図３は、系統電圧が正である場合の電流の向きを示している。図３において、相対的に太い線で記載されている矢印は、電流が流れる向きを示している。 FIG. 3 shows a current in the circuit of the power conversion board 2 when the power conditioner 1 according to the first embodiment converts the AC power supplied from the power system 71 into DC power and outputs the DC power to the power storage device 72. FIG. 1 is a diagram showing an example of a direction in which power flows. FIG. 3 shows the direction of the current when the system voltage is positive. In FIG. 3, the arrows drawn by relatively thick lines indicate the direction in which the current flows.
　第１スイッチング素子２１、第２スイッチング素子２２及び第５スイッチング素子２５はオンの状態であって、第３スイッチング素子２３、第４スイッチング素子２４及び第６スイッチング素子２６はオフの状態である。電流は、第１リアクトル７、第１スイッチング素子２１のダイオード２１４の順番に流れると共に、第２スイッチング素子２２のダイオード２２４、第２リアクトル８の順番に流れる。 The first switching element 21, the second switching element 22, and the fifth switching element 25 are in the on state, and the third switching element 23, the fourth switching element 24, and the sixth switching element 26 are in the off state. The current flows in the order of the first reactor 7 and the diode 214 of the first switching element 21, and also flows in the order of the diode 224 of the second switching element 22 and the second reactor 8.
　図４は、実施の形態１にかかるパワーコンディショナ１が電力系統７１から供給される交流電力を直流電力に変換して直流電力を蓄電機器７２に出力する場合の電力変換基板２の回路において電流が流れる向きの例を示す第２図である。図３が示す状態の次に、図４が示す状態が得られる。図４において、相対的に太い線で記載されている矢印は、電流が流れる向きを示している。 FIG. 4 shows a current in the circuit of the power conversion board 2 when the power conditioner 1 according to the first embodiment converts the AC power supplied from the power system 71 into DC power and outputs the DC power to the power storage device 72. FIG. 2 is a diagram showing an example of the direction in which power flows. Next to the state shown in FIG. 3, the state shown in FIG. 4 is obtained. In FIG. 4, the arrows drawn by relatively thick lines indicate the direction in which the current flows.
　図３が示す状態の次に図４が示す状態が得られる場合、第１スイッチング素子２１及び第２スイッチング素子２２はオンの状態からオフの状態に変化し、第６スイッチング素子２６はオフの状態からオンの状態に変化する。第３スイッチング素子２３及び第４スイッチング素子２４についてはオフの状態が維持され、第５スイッチング素子２５についてはオンの状態が維持される。電流は、第１リアクトル７、第５スイッチング素子２５のダイオード２５４、第６スイッチング素子２６のコレクタ端子２６１、第６スイッチング素子２６のエミッタ端子２６２、第２リアクトル８の順番に流れる。第６スイッチング素子２６がオンの状態であるので、電流エネルギが第１リアクトル７及び第２リアクトル８に蓄えられる。 When the state shown in FIG. 4 is obtained after the state shown in FIG. 3, the first switching element 21 and the second switching element 22 change from the on state to the off state, and the sixth switching element 26 is in the off state. Changes from to the on state. The third switching element 23 and the fourth switching element 24 are maintained in the off state, and the fifth switching element 25 is maintained in the on state. The current flows in the order of the first reactor 7, the diode 254 of the fifth switching element 25, the collector terminal 261 of the sixth switching element 26, the emitter terminal 262 of the sixth switching element 26, and the second reactor 8. Since the sixth switching element 26 is in the ON state, the current energy is stored in the first reactor 7 and the second reactor 8.
　図４が示す状態の次に、図３が示す状態が得られる。このように、図３が示す状態と、図４が示す状態とが交互に生じる。図４が示す状態の次に図３が示す状態が得られた直後、第１リアクトル７、第５スイッチング素子２５のダイオード２５４、第６スイッチング素子２６のコレクタ端子２６１、第６スイッチング素子２６のエミッタ端子２６２、第２リアクトル８の順番に流れる電流は、維持される。 Next to the state shown in FIG. 4, the state shown in FIG. 3 is obtained. In this way, the state shown in FIG. 3 and the state shown in FIG. 4 alternately occur. Immediately after the state shown in FIG. 3 is obtained next to the state shown in FIG. 4, the first reactor 7, the diode 254 of the fifth switching element 25, the collector terminal 261 of the sixth switching element 26, and the emitter of the sixth switching element 26 are obtained. The current flowing in the order of the terminal 262 and the second reactor 8 is maintained.
　ところで、スイッチング素子におけるサージ電圧の大きさは、下記の式（１）により表される。
　　　ＶSURGE＝Ｌ×ｄＩ／ｄｔ　・・・（１）
　式（１）において、“ＶSURGE”は、スイッチング素子におけるサージ電圧の大きさを示している。“Ｌ”は、スイッチング素子に接続されているコンデンサとスイッチング素子とを接続する配線についての配線インダクタンス成分の大きさを示している。“Ｉ”は、スイッチング素子のコレクタとエミッタとを流れる電流を示している。“ｔ”は、時間を示している。“ｄ”は、微分を示す記号である。 By the way, the magnitude of the surge voltage in the switching element is expressed by the following equation (1).
V SURGE = L × dI / dt ・ ・ ・ (1)
In the formula (1), "V SURGE " indicates the magnitude of the surge voltage in the switching element. “L” indicates the magnitude of the wiring inductance component for the wiring connecting the capacitor connected to the switching element and the switching element. “I” indicates the current flowing between the collector and the emitter of the switching element. “T” indicates time. “D” is a symbol indicating differentiation.
　配線インダクタンス成分Ｌは配線の長さに比例するため、式（１）に示される通り、スイッチング素子におけるサージ電圧の大きさは、配線の長さに比例する。図５は、実施の形態１にかかる電力変換基板２の回路におけるサージ電圧の大きさに影響を与える配線３０の例を示す図である。図５は、系統電圧が正である場合のサージ電圧の大きさに影響を与える配線３０を示している。図５において、配線３０は、相対的に太い線で示されている。 Since the wiring inductance component L is proportional to the length of the wiring, the magnitude of the surge voltage in the switching element is proportional to the length of the wiring as shown in the equation (1). FIG. 5 is a diagram showing an example of wiring 30 that affects the magnitude of surge voltage in the circuit of the power conversion board 2 according to the first embodiment. FIG. 5 shows the wiring 30 that affects the magnitude of the surge voltage when the system voltage is positive. In FIG. 5, the wiring 30 is shown by a relatively thick line.
　図５に示される通り、配線３０の長さは、第１スイッチング素子２１、第２スイッチング素子２２、第５スイッチング素子２５及び第６スイッチング素子２６とスナバコンデンサ９との距離に依存する。系統電圧が負である場合、サージ電圧の大きさに影響を与える配線の長さは、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６とスナバコンデンサ９との距離に依存する。上述の通り、スナバコンデンサ９は平滑コンデンサ５とインバータ６との間に位置している。 As shown in FIG. 5, the length of the wiring 30 depends on the distance between the first switching element 21, the second switching element 22, the fifth switching element 25 and the sixth switching element 26, and the snubber capacitor 9. When the system voltage is negative, the length of the wiring that affects the magnitude of the surge voltage is the third switching element 23, the fourth switching element 24, the fifth switching element 25, the sixth switching element 26, and the snubber capacitor 9. Depends on the distance to. As described above, the snubber capacitor 9 is located between the smoothing capacitor 5 and the inverter 6.
　すなわち、電力変換基板２の回路におけるサージ電圧の大きさは、第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６と、平滑コンデンサ５とを接続する配線の長さに依存する。 That is, the magnitude of the surge voltage in the circuit of the power conversion board 2 is the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element. It depends on the length of the wiring connecting 26 and the smoothing capacitor 5.
　図６は、実施の形態１にかかる電力変換基板２が有する複数の素子が基板１２に配置されている状態を模式的に示す第１図である。図６は、基板１２の表面の状態と基板１２の裏面の状態とを示している。説明の便宜上、図６には、基板１２は示されていない。電力変換基板２が有するすべての素子は、基板１２の表面に配置されていて、基板１２の裏面には配置されていない。基板１２の裏面には、配線が形成されている。図６の基板１２の裏面には、図６の基板１２の表面に示されている複数の素子の各々の位置を示す図形が示されている。 FIG. 6 is a diagram schematically showing a state in which a plurality of elements included in the power conversion board 2 according to the first embodiment are arranged on the board 12. FIG. 6 shows a state of the front surface of the substrate 12 and a state of the back surface of the substrate 12. For convenience of explanation, the substrate 12 is not shown in FIG. All the elements included in the power conversion substrate 2 are arranged on the front surface of the substrate 12, not on the back surface of the substrate 12. Wiring is formed on the back surface of the substrate 12. On the back surface of the substrate 12 of FIG. 6, a figure showing the position of each of the plurality of elements shown on the front surface of the substrate 12 of FIG. 6 is shown.
　図６には、第１平滑コンデンサ５Ａ、第２平滑コンデンサ５Ｂ及び第３平滑コンデンサ５Ｃが示されている。第１平滑コンデンサ５Ａ、第２平滑コンデンサ５Ｂ及び第３平滑コンデンサ５Ｃは、平滑コンデンサ５の例である。図６には、第１スナバコンデンサ９Ａ及び第２スナバコンデンサ９Ｂが示されている。第１スナバコンデンサ９Ａ及び第２スナバコンデンサ９Ｂは、スナバコンデンサ９の例である。基板１２の表面には配線３１が設けられており、基板１２の裏面には配線３２が設けられている。 FIG. 6 shows the first smoothing capacitor 5A, the second smoothing capacitor 5B, and the third smoothing capacitor 5C. The first smoothing capacitor 5A, the second smoothing capacitor 5B, and the third smoothing capacitor 5C are examples of the smoothing capacitor 5. FIG. 6 shows a first snubber capacitor 9A and a second snubber capacitor 9B. The first snubber capacitor 9A and the second snubber capacitor 9B are examples of the snubber capacitor 9. Wiring 31 is provided on the front surface of the substrate 12, and wiring 32 is provided on the back surface of the substrate 12.
　第２スイッチング素子２２は、ボディ部４１と、端子部４２とを有する。第２スイッチング素子２２のボディ部４１は、第２スイッチング素子２２のスイッチング機能を有する部位である。第２スイッチング素子２２の端子部４２は、コレクタ端子２２１、エミッタ端子２２２及びゲート端子２２３である。図６では、コレクタ端子の右側に記号「Ｃ」が記載されており、エミッタ端子の右側に記号「Ｅ」が記載されており、ゲート端子の右側に記号「Ｇ」が記載されている。 The second switching element 22 has a body portion 41 and a terminal portion 42. The body portion 41 of the second switching element 22 is a portion having a switching function of the second switching element 22. The terminal portion 42 of the second switching element 22 is a collector terminal 221 and an emitter terminal 222 and a gate terminal 223. In FIG. 6, the symbol “C” is described on the right side of the collector terminal, the symbol “E” is described on the right side of the emitter terminal, and the symbol “G” is described on the right side of the gate terminal.
　第１スイッチング素子２１、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６の各々も、第２スイッチング素子２２と同様に、ボディ部４１と、端子部４２とを有する。図６では、第１スイッチング素子２１、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６の各々の端子部４２は、破線の楕円で示されている。 Like the second switching element 22, each of the first switching element 21, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 also has a body portion 41 and a terminal portion 42. And have. In FIG. 6, each terminal portion 42 of the first switching element 21, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 is indicated by a broken ellipse.
　第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６の各々は、端子部４２がボディ部４１より平滑コンデンサ５の側に位置する状態で基板１２に配置されている。 In each of the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26, the terminal portion 42 is a smoothing capacitor 5 from the body portion 41. It is arranged on the substrate 12 in a state of being located on the side of.
　つまり、第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６の各々において、端子部４２はボディ部４１より平滑コンデンサ５に近い。端子部４２がボディ部４１より平滑コンデンサ５に近い場合、配線３１及び配線３２の長さは、ボディ部４１が端子部４２より平滑コンデンサ５に近い場合に比べて短い。式（１）を用いた説明から理解することができるように、スイッチング素子におけるサージ電圧は配線の長さが短いほど小さい。 That is, in each of the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26, the terminal portion 42 is smoother than the body portion 41. Close to capacitor 5. When the terminal portion 42 is closer to the smoothing capacitor 5 than the body portion 41, the lengths of the wiring 31 and the wiring 32 are shorter than those when the body portion 41 is closer to the smoothing capacitor 5 than the terminal portion 42. As can be understood from the explanation using the equation (1), the surge voltage in the switching element becomes smaller as the wiring length becomes shorter.
　したがって、実施の形態１の各スイッチング素子におけるサージ電圧は、ボディ部４１が端子部４２より平滑コンデンサ５に近い場合に比べて小さくなる。その結果、電力変換基板２は、サージ電圧が発生した場合にインバータ６に含まれる複数のスイッチング素子の各々が故障することを抑制することができる。 Therefore, the surge voltage in each switching element of the first embodiment is smaller than that in the case where the body portion 41 is closer to the smoothing capacitor 5 than the terminal portion 42. As a result, the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
　図６に示される通り、第１駆動信号をもとに動作する第１スイッチング素子２１と第２スイッチング素子２２との組は第１組５１と定義され、第２駆動信号をもとに動作する第３スイッチング素子２３と第４スイッチング素子２４との組は第２組５２と定義され、短絡部１１が有する第５スイッチング素子２５と第６スイッチング素子２６との組は第３組５３と定義される。図６では、第１組５１、第２組５２及び第３組５３の各々は、破線の枠で示されている。 As shown in FIG. 6, the pair of the first switching element 21 and the second switching element 22 that operates based on the first drive signal is defined as the first set 51, and operates based on the second drive signal. The pair of the third switching element 23 and the fourth switching element 24 is defined as the second set 52, and the pair of the fifth switching element 25 and the sixth switching element 26 of the short-circuit portion 11 is defined as the third set 53. NS. In FIG. 6, each of the first group 51, the second group 52, and the third group 53 is shown by a broken line frame.
　図６に示される通り、インバータ６に含まれる第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６は、第１組５１、第３組５３、第２組５２の順番で基板１２に配置されている。配線は、インバータ６に含まれる６個のスイッチング素子が上記の順番で配置されると、当該６個のスイッチング素子が上記の順番以外の順番で配置された場合に比べて短くなる。そのため、実施の形態１の各スイッチング素子におけるサージ電圧は小さくなる。したがって、電力変換基板２は、サージ電圧が発生した場合にインバータ６に含まれる複数のスイッチング素子の各々が故障することを抑制することができる。 As shown in FIG. 6, the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 included in the inverter 6 are the third. The first set 51, the third set 53, and the second set 52 are arranged on the substrate 12 in this order. When the six switching elements included in the inverter 6 are arranged in the above order, the wiring becomes shorter than when the six switching elements are arranged in an order other than the above order. Therefore, the surge voltage in each switching element of the first embodiment becomes small. Therefore, the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
　上述の通り、第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６は、第１組５１、第３組５３、第２組５２の順番で基板１２に配置されている。つまり、短絡部１１が有する第５スイッチング素子２５と第６スイッチング素子２６との組である第３組５３は、第１組５１と第２組５２との間に位置する。 As described above, the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 are the first group 51 and the third group 53. , The second set 52 is arranged on the substrate 12 in this order. That is, the third set 53, which is a set of the fifth switching element 25 and the sixth switching element 26 included in the short-circuit portion 11, is located between the first set 51 and the second set 52.
　すなわち、第１スイッチング素子２１と第３スイッチング素子２３とを結ぶ配線の長さは、第１スイッチング素子２１と第３スイッチング素子２３とが隣り合って配置される場合に比べて長い。スイッチング素子の誤動作によって発生する短絡電流は、配線インダクタンス成分が短い、つまり短い経路だと大きくなり、スイッチング素子の破壊を引き起こす場合がある。そのため、電力変換基板２は、第１スイッチング素子２１から第３スイッチング素子２３に流れる短絡電流を低減することができる。同様に、電力変換基板２は、第２スイッチング素子２２から第４スイッチング素子２４に流れる短絡電流を低減することができる。 That is, the length of the wiring connecting the first switching element 21 and the third switching element 23 is longer than the case where the first switching element 21 and the third switching element 23 are arranged next to each other. The short-circuit current generated by the malfunction of the switching element becomes large when the wiring inductance component is short, that is, in a short path, and may cause the switching element to be destroyed. Therefore, the power conversion board 2 can reduce the short-circuit current flowing from the first switching element 21 to the third switching element 23. Similarly, the power conversion board 2 can reduce the short-circuit current flowing from the second switching element 22 to the fourth switching element 24.
　上述の通り、電力変換基板２は、平滑コンデンサ５とインバータ６との間に位置しているスナバコンデンサ９を有する。具体的には、図６に示される通り、電力変換基板２は、第１スナバコンデンサ９Ａ及び第２スナバコンデンサ９Ｂを有する。第１スナバコンデンサ９Ａは、第１駆動信号をもとに動作する第１スイッチング素子２１及び第２スイッチング素子２２に過電圧が印加される場合に第１スイッチング素子２１及び第２スイッチング素子２２を保護するコンデンサである。第２スナバコンデンサ９Ｂは、第２駆動信号をもとに動作する第３スイッチング素子２３及び第４スイッチング素子２４に過電圧が印加される場合に第３スイッチング素子２３及び第４スイッチング素子２４を保護するコンデンサである。 As described above, the power conversion board 2 has a snubber capacitor 9 located between the smoothing capacitor 5 and the inverter 6. Specifically, as shown in FIG. 6, the power conversion board 2 has a first snubber capacitor 9A and a second snubber capacitor 9B. The first snubber capacitor 9A protects the first switching element 21 and the second switching element 22 when an overvoltage is applied to the first switching element 21 and the second switching element 22 that operate based on the first drive signal. It is a capacitor. The second snubber capacitor 9B protects the third switching element 23 and the fourth switching element 24 when an overvoltage is applied to the third switching element 23 and the fourth switching element 24 that operate based on the second drive signal. It is a capacitor.
　第１スナバコンデンサ９Ａは、平滑コンデンサ５とフルブリッジ部１０とを接続する配線３１に接続され、第１スイッチング素子２１と第２スイッチング素子２２との組である第１組５１と平滑コンデンサ５との間に位置する。更に言うと、第１スナバコンデンサ９Ａは、第１スイッチング素子２１のコレクタ端子２１１と第２スイッチング素子２２のエミッタ端子２２２との間に位置する。第１スイッチング素子２１のコレクタ端子２１１と第２スイッチング素子２２のエミッタ端子２２２との間は、サージ電圧の影響を受ける部位である。 The first snubber capacitor 9A is connected to the wiring 31 connecting the smoothing capacitor 5 and the full bridge portion 10, and includes the first set 51 and the smoothing capacitor 5, which are a set of the first switching element 21 and the second switching element 22. Located between. Furthermore, the first snubber capacitor 9A is located between the collector terminal 211 of the first switching element 21 and the emitter terminal 222 of the second switching element 22. The portion between the collector terminal 211 of the first switching element 21 and the emitter terminal 222 of the second switching element 22 is a portion affected by the surge voltage.
　第２スナバコンデンサ９Ｂは、平滑コンデンサ５とフルブリッジ部１０とを接続する配線３１に接続され、第３スイッチング素子２３と第４スイッチング素子２４との組である第２組５２と平滑コンデンサ５との間に位置する。更に言うと、第２スナバコンデンサ９Ｂは、第３スイッチング素子２３のエミッタ端子２３２と第４スイッチング素子２４のコレクタ端子２４１との間に位置する。第３スイッチング素子２３のエミッタ端子２３２と第４スイッチング素子２４のコレクタ端子２４１との間は、サージ電圧の影響を受ける部位である。 The second snubber capacitor 9B is connected to the wiring 31 connecting the smoothing capacitor 5 and the full bridge portion 10, and includes the second set 52 and the smoothing capacitor 5, which are a set of the third switching element 23 and the fourth switching element 24. Located between. Furthermore, the second snubber capacitor 9B is located between the emitter terminal 232 of the third switching element 23 and the collector terminal 241 of the fourth switching element 24. The portion between the emitter terminal 232 of the third switching element 23 and the collector terminal 241 of the fourth switching element 24 is a portion affected by the surge voltage.
　電力変換基板２は、第１スナバコンデンサ９Ａ及び第２スナバコンデンサ９Ｂを有するので、第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３及び第４スイッチング素子２４を保護することができると共に、短絡部１１が有する第５スイッチング素子２５及び第６スイッチング素子２６の各々に印加されるサージ電圧を抑制することができる。したがって、電力変換基板２は、サージ電圧が発生した場合にインバータ６に含まれる複数のスイッチング素子の各々が故障することを抑制することができる。 Since the power conversion board 2 has the first snubber capacitor 9A and the second snubber capacitor 9B, it is possible to protect the first switching element 21, the second switching element 22, the third switching element 23, and the fourth switching element 24. At the same time, the surge voltage applied to each of the fifth switching element 25 and the sixth switching element 26 included in the short-circuit portion 11 can be suppressed. Therefore, the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
　図７は、実施の形態１にかかる電力変換基板２が有する複数の素子が基板１２に配置されている状態を模式的に示す第２図である。図７は、基板１２の表面の状態を示している。説明の便宜上、図７には、基板１２は示されていない。上述の通り、電力変換基板２が有するすべての素子は、基板１２の表面に配置されている。 FIG. 7 is a second diagram schematically showing a state in which a plurality of elements included in the power conversion board 2 according to the first embodiment are arranged on the board 12. FIG. 7 shows the state of the surface of the substrate 12. For convenience of explanation, the substrate 12 is not shown in FIG. As described above, all the elements of the power conversion board 2 are arranged on the surface of the board 12.
　説明の都合により図６には示されていないが、電力変換基板２は、第１スイッチング素子２１を駆動する第１駆動回路６１と、第２スイッチング素子２２を駆動する第２駆動回路６２と、第３スイッチング素子２３を駆動する第３駆動回路６３と、第４スイッチング素子２４を駆動する第４駆動回路６４と、第５スイッチング素子２５を駆動する第５駆動回路６５と、第６スイッチング素子２６を駆動する第６駆動回路６６とを更に有する。 Although not shown in FIG. 6 for convenience of explanation, the power conversion board 2 includes a first drive circuit 61 for driving the first switching element 21, a second drive circuit 62 for driving the second switching element 22, and the like. A third drive circuit 63 that drives the third switching element 23, a fourth drive circuit 64 that drives the fourth switching element 24, a fifth drive circuit 65 that drives the fifth switching element 25, and a sixth switching element 26. It further has a sixth drive circuit 66 for driving the above.
　第１駆動回路６１は、制御装置３によって生成される第１駆動信号にしたがって第１スイッチング素子２１のゲートについて充放電を行い、第１スイッチング素子２１のオンとオフとを制御する。第１駆動回路６１は、第１スイッチング素子２１の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。図７では、第１スイッチング素子２１の端子部４２は、破線の楕円で示されている。図７では、端子部４２の側は「主回路部側」と記載されており、ボディ部４１の側は「制御部側」と記載されている。 The first drive circuit 61 charges and discharges the gate of the first switching element 21 according to the first drive signal generated by the control device 3, and controls the on and off of the first switching element 21. The first drive circuit 61 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side. In FIG. 7, the terminal portion 42 of the first switching element 21 is indicated by a broken line ellipse. In FIG. 7, the side of the terminal portion 42 is described as “main circuit portion side”, and the side of the body portion 41 is described as “control unit side”.
　第２駆動回路６２は、制御装置３によって生成される第１駆動信号にしたがって第２スイッチング素子２２のゲートについて充放電を行い、第２スイッチング素子２２のオンとオフとを制御する。第２駆動回路６２は、第２スイッチング素子２２の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。 The second drive circuit 62 charges and discharges the gate of the second switching element 22 according to the first drive signal generated by the control device 3, and controls the on and off of the second switching element 22. The second drive circuit 62 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the second switching element 22 but on the body portion 41 side.
　第３駆動回路６３は、制御装置３によって生成される第２駆動信号にしたがって第３スイッチング素子２３のゲートについて充放電を行い、第３スイッチング素子２３のオンとオフとを制御する。第３駆動回路６３は、第３スイッチング素子２３の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。 The third drive circuit 63 charges and discharges the gate of the third switching element 23 according to the second drive signal generated by the control device 3, and controls the on and off of the third switching element 23. The third drive circuit 63 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the third switching element 23 but on the body portion 41 side.
　第４駆動回路６４は、制御装置３によって生成される第２駆動信号にしたがって第４スイッチング素子２４のゲートについて充放電を行い、第４スイッチング素子２４のオンとオフとを制御する。第４駆動回路６４は、第４スイッチング素子２４の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。 The fourth drive circuit 64 charges and discharges the gate of the fourth switching element 24 according to the second drive signal generated by the control device 3, and controls the on and off of the fourth switching element 24. The fourth drive circuit 64 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the fourth switching element 24 but on the body portion 41 side.
　第５駆動回路６５は、制御装置３によって生成される第３駆動信号にしたがって第５スイッチング素子２５のゲートについて充放電を行い、第５スイッチング素子２５のオンとオフとを制御する。第５駆動回路６５は、第５スイッチング素子２５の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。 The fifth drive circuit 65 charges and discharges the gate of the fifth switching element 25 according to the third drive signal generated by the control device 3, and controls the on and off of the fifth switching element 25. The fifth drive circuit 65 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the fifth switching element 25 but on the body portion 41 side.
　第６駆動回路６６は、制御装置３によって生成される第４駆動信号にしたがって第６スイッチング素子２６のゲートについて充放電を行い、第６スイッチング素子２６のオンとオフとを制御する。第６駆動回路６６は、第６スイッチング素子２６の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。 The sixth drive circuit 66 charges and discharges the gate of the sixth switching element 26 according to the fourth drive signal generated by the control device 3, and controls the on and off of the sixth switching element 26. The sixth drive circuit 66 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the sixth switching element 26 but on the body portion 41 side.
　第１駆動回路６１の構成は、第２駆動回路６２、第３駆動回路６３、第４駆動回路６４、第５駆動回路６５及び第６駆動回路６６の各々と同じである。以下では、第１駆動回路６１、第２駆動回路６２、第３駆動回路６３、第４駆動回路６４、第５駆動回路６５及び第６駆動回路６６を代表して、第１駆動回路６１を更に説明する。 The configuration of the first drive circuit 61 is the same as that of each of the second drive circuit 62, the third drive circuit 63, the fourth drive circuit 64, the fifth drive circuit 65, and the sixth drive circuit 66. In the following, the first drive circuit 61 will be further referred to on behalf of the first drive circuit 61, the second drive circuit 62, the third drive circuit 63, the fourth drive circuit 64, the fifth drive circuit 65, and the sixth drive circuit 66. explain.
　図８は、実施の形態１にかかる電力変換基板２が有する第１駆動回路６１の効果を説明するための第１図である。図８は、図７に対応していて、第１駆動回路６１が第１スイッチング素子２１の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている場合の図である。図８は、電力の変換が行われる場合の主の電流が流れる主回路部６７と、第１駆動回路６１と第１スイッチング素子２１のエミッタ端子２１２とを結ぶゲート駆動回路部６８とを示している。図８は、主回路部６７とゲート駆動回路部６８との共通の部位である共通回路部６９を更に示している。図８において、共通回路部６９は、相対的に太い線で示されている。 FIG. 8 is a diagram for explaining the effect of the first drive circuit 61 included in the power conversion board 2 according to the first embodiment. FIG. 8 corresponds to FIG. 7, and is a case where the first drive circuit 61 is arranged on the substrate 12 in a state where the first drive circuit 61 is located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side. It is a figure. FIG. 8 shows a main circuit unit 67 through which the main current flows when power conversion is performed, and a gate drive circuit unit 68 connecting the first drive circuit 61 and the emitter terminal 212 of the first switching element 21. There is. FIG. 8 further shows a common circuit unit 69, which is a common portion between the main circuit unit 67 and the gate drive circuit unit 68. In FIG. 8, the common circuit unit 69 is shown by a relatively thick line.
　図９は、実施の形態１にかかる電力変換基板２が有する第１駆動回路６１の効果を説明するための第２図である。図９は、図７に対応しておらず、比較例を示す図である。具体的には、図９は、第１駆動回路６１が第１スイッチング素子２１のボディ部４１の側でなく端子部４２の側に位置する状態で基板１２に配置される場合の図である。図９は、図８と同様に、主回路部６７、ゲート駆動回路部６８及び共通回路部６９を示している。図９において、共通回路部６９は、相対的に太い線で示されている。 FIG. 9 is a second diagram for explaining the effect of the first drive circuit 61 included in the power conversion board 2 according to the first embodiment. FIG. 9 is a diagram showing a comparative example, which does not correspond to FIG. 7. Specifically, FIG. 9 is a diagram in the case where the first drive circuit 61 is arranged on the substrate 12 in a state where it is located not on the side of the body portion 41 of the first switching element 21 but on the side of the terminal portion 42. FIG. 9 shows the main circuit unit 67, the gate drive circuit unit 68, and the common circuit unit 69, as in FIG. In FIG. 9, the common circuit unit 69 is shown by a relatively thick line.
　図８と図９とを比較すると明らかな通り、第１駆動回路６１が第１スイッチング素子２１の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されると、実施の形態１の共通回路部６９は、比較例の共通回路部６９より短くなる。つまり、実施の形態１の共通回路部６９のインダクタンスは、比較例の共通回路部６９のインダクタンスより小さい。 As is clear from a comparison between FIGS. 8 and 9, when the first drive circuit 61 is arranged on the substrate 12 in a state where it is located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side, The common circuit unit 69 of the first embodiment is shorter than the common circuit unit 69 of the comparative example. That is, the inductance of the common circuit unit 69 of the first embodiment is smaller than the inductance of the common circuit unit 69 of the comparative example.
　上述の通り、実施の形態１では、第１駆動回路６１が第１スイッチング素子２１の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。そのため、電力変換基板２は、主回路部６７を流れる電流の変動によって発生する電圧により第１駆動回路６１が誤動作することを抑制することができる。更に言うと、電力変換基板２は、主回路部６７を流れる電流の変動で発生する電圧のノイズによって第１駆動回路６１が誤動作することを抑制することができる。 As described above, in the first embodiment, the first drive circuit 61 is arranged on the substrate 12 in a state where it is located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side. Therefore, the power conversion board 2 can prevent the first drive circuit 61 from malfunctioning due to the voltage generated by the fluctuation of the current flowing through the main circuit unit 67. Furthermore, the power conversion board 2 can prevent the first drive circuit 61 from malfunctioning due to voltage noise generated by fluctuations in the current flowing through the main circuit unit 67.
　上述の通り、実施の形態１にかかる電力変換基板２は、第５スイッチング素子２５及び第６スイッチング素子２６を有する短絡部１１を有するので、交流電流に生じるリプルを抑制すると共に漏洩電流を低減させることができる。加えて、電力変換基板２は、フルブリッジ回路を構成する第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３及び第４スイッチング素子２４を有するフルブリッジ部１０を有する。 As described above, since the power conversion substrate 2 according to the first embodiment has the short-circuit portion 11 having the fifth switching element 25 and the sixth switching element 26, the ripple generated in the alternating current is suppressed and the leakage current is reduced. be able to. In addition, the power conversion board 2 has a full bridge portion 10 having a first switching element 21, a second switching element 22, a third switching element 23, and a fourth switching element 24 that form a full bridge circuit.
　第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６の各々は、端子部４２がボディ部４１より平滑コンデンサ５の側に位置する状態で基板１２に配置されている。そのため、実施の形態１の各スイッチング素子におけるサージ電圧は、ボディ部４１が端子部４２より平滑コンデンサ５の側に位置する場合に比べて小さくなる。その結果、電力変換基板２は、サージ電圧が発生した場合にインバータ６に含まれる６個のスイッチング素子の各々が故障することを抑制することができる。 In each of the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26, the terminal portion 42 is a smoothing capacitor 5 from the body portion 41. It is arranged on the substrate 12 in a state of being located on the side of. Therefore, the surge voltage in each switching element of the first embodiment is smaller than that in the case where the body portion 41 is located closer to the smoothing capacitor 5 than the terminal portion 42. As a result, the power conversion board 2 can prevent each of the six switching elements included in the inverter 6 from failing when a surge voltage is generated.
　したがって、実施の形態１にかかる電力変換基板２は、交流電流に生じるリプルを抑制すると共に漏洩電流を低減させ、かつサージ電圧が発生した場合にインバータ６に含まれる複数のスイッチング素子の各々が故障することを抑制することができる。更に言うと、インバータ６に含まれる複数のスイッチング素子の一部又は全部がオフの状態でサージ電圧が発生した場合、電力変換基板２は、インバータ６に含まれる複数のスイッチング素子の各々が故障することを抑制することができる。 Therefore, in the power conversion board 2 according to the first embodiment, ripples generated in the alternating current are suppressed, leakage current is reduced, and when a surge voltage is generated, each of the plurality of switching elements included in the inverter 6 fails. Can be suppressed. Furthermore, when a surge voltage is generated while some or all of the plurality of switching elements included in the inverter 6 are off, each of the plurality of switching elements included in the inverter 6 fails in the power conversion board 2. Can be suppressed.
　電力変換基板２は、パワーコンディショナ１が蓄電機器７２から供給される直流電力を交流電力に変換して交流電力を電力系統７１と負荷７３との一方又は双方に出力する際にサージ電圧が発生した場合においても、インバータ６に含まれる複数のスイッチング素子の各々が故障することを抑制することができる。 In the power conversion board 2, a surge voltage is generated when the power conditioner 1 converts the DC power supplied from the power storage device 72 into AC power and outputs the AC power to one or both of the power system 71 and the load 73. Even in such a case, it is possible to prevent each of the plurality of switching elements included in the inverter 6 from failing.
　実施の形態１では、インバータ６に含まれる６個のスイッチング素子は、第１駆動信号をもとに動作する第１スイッチング素子２１と第２スイッチング素子２２との第１組５１、短絡部１１が有する第５スイッチング素子２５と第６スイッチング素子２６との第３組５３、第２駆動信号をもとに動作する第３スイッチング素子２３と第４スイッチング素子２４との第２組５２の順番で基板１２に配置されている。配線は、６個のスイッチング素子が上記の順番で配置されると、上記の順番以外の順番で配置された場合に比べて短くなる。そのため、６個のスイッチング素子の各々におけるサージ電圧は小さくなる。その結果、電力変換基板２は、サージ電圧が発生した場合にインバータ６に含まれる複数のスイッチング素子の各々が故障することを抑制することができる。 In the first embodiment, the six switching elements included in the inverter 6 include a first set 51 of a first switching element 21 and a second switching element 22 that operate based on a first drive signal, and a short-circuit portion 11. The substrate is in the order of the third set 53 of the fifth switching element 25 and the sixth switching element 26, and the second set 52 of the third switching element 23 and the fourth switching element 24 that operate based on the second drive signal. It is arranged at 12. When the six switching elements are arranged in the above order, the wiring becomes shorter than when the six switching elements are arranged in an order other than the above order. Therefore, the surge voltage in each of the six switching elements becomes small. As a result, the power conversion board 2 can prevent each of the plurality of switching elements included in the inverter 6 from failing when a surge voltage is generated.
　６個のスイッチング素子が第１組５１、第３組５３、第２組５２の順番で配置されているので、第１スイッチング素子２１と第３スイッチング素子２３とを結ぶ配線は、第１スイッチング素子２１と第３スイッチング素子２３とが隣り合って配置されている場合に比べて長い。スイッチング素子の誤動作によって発生する短絡電流は、配線インダクタンス成分が短い、つまり短い経路だと大きくなり、スイッチング素子の破壊を引き起こす場合がある。そのため、電力変換基板２は、第１スイッチング素子２１から第３スイッチング素子２３に流れる短絡電流を抑制することができる。同様に、電力変換基板２は、第３スイッチング素子２３から第１スイッチング素子２１に流れる短絡電流を抑制することができる。同様に、電力変換基板２は、第２スイッチング素子２２から第４スイッチング素子２４に流れる短絡電流と、第４スイッチング素子２４から第２スイッチング素子２２に流れる短絡電流を抑制することができる。 Since the six switching elements are arranged in the order of the first group 51, the third group 53, and the second group 52, the wiring connecting the first switching element 21 and the third switching element 23 is the first switching element. It is longer than the case where the 21 and the third switching element 23 are arranged next to each other. The short-circuit current generated by the malfunction of the switching element becomes large when the wiring inductance component is short, that is, in a short path, and may cause the switching element to be destroyed. Therefore, the power conversion board 2 can suppress the short-circuit current flowing from the first switching element 21 to the third switching element 23. Similarly, the power conversion board 2 can suppress the short-circuit current flowing from the third switching element 23 to the first switching element 21. Similarly, the power conversion board 2 can suppress the short-circuit current flowing from the second switching element 22 to the fourth switching element 24 and the short-circuit current flowing from the fourth switching element 24 to the second switching element 22.
　実施の形態１では、第１スイッチング素子２１を駆動する第１駆動回路６１は、第１スイッチング素子２１の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。同様に、第２駆動回路６２、第３駆動回路６３、第４駆動回路６４、第５駆動回路６５及び第６駆動回路６６の各々は、駆動するスイッチング素子の端子部４２の側でなくボディ部４１の側に位置する状態で基板１２に配置されている。これにより、電力の変換が行われる場合の主の電流が流れる主回路部６７とゲート駆動回路部６８との共通の部位である共通回路部６９が比較的短くなる。そのため、共通回路部６９のインダクタンスが比較的小さくなる。したがって、電力変換基板２は、電流が主回路部６７を流れる場合に発生する電圧によって第１駆動回路６１、第２駆動回路６２、第３駆動回路６３、第４駆動回路６４、第５駆動回路６５及び第６駆動回路６６の各々が誤動作することを抑制することができる。なお、上述の通り、ゲート駆動回路部６８は、駆動回路と当該駆動回路が駆動するスイッチング素子のエミッタ端子とを結ぶ配線である。 In the first embodiment, the first drive circuit 61 for driving the first switching element 21 is arranged on the substrate 12 in a state of being located not on the terminal portion 42 side of the first switching element 21 but on the body portion 41 side. There is. Similarly, each of the second drive circuit 62, the third drive circuit 63, the fourth drive circuit 64, the fifth drive circuit 65, and the sixth drive circuit 66 is not on the side of the terminal portion 42 of the switching element to be driven, but on the body portion. It is arranged on the substrate 12 in a state of being located on the side of 41. As a result, the common circuit section 69, which is a common portion between the main circuit section 67 through which the main current flows when the power is converted and the gate drive circuit section 68, becomes relatively short. Therefore, the inductance of the common circuit unit 69 becomes relatively small. Therefore, the power conversion board 2 has a first drive circuit 61, a second drive circuit 62, a third drive circuit 63, a fourth drive circuit 64, and a fifth drive circuit depending on the voltage generated when the current flows through the main circuit unit 67. It is possible to prevent each of the 65 and the sixth drive circuit 66 from malfunctioning. As described above, the gate drive circuit unit 68 is a wiring connecting the drive circuit and the emitter terminal of the switching element driven by the drive circuit.
　フルブリッジ部１０は、直流電力を交流電力に変換する機能と交流電力を直流電力に変換する機能との一方のみを有していてもよい。 The full bridge unit 10 may have only one of a function of converting DC power into AC power and a function of converting AC power into DC power.
実施の形態２．
　図１０は、実施の形態２にかかるパワーコンディショナが有する基板１２Ａを模式的に示す図である。実施の形態２では、実施の形態１の基板１２が基板１２Ａに置き換えられている。実施の形態１の基板１２が基板１２Ａに置き換えられている点が、実施の形態２と実施の形態１との相違点である。実施の形態２では、実施の形態１との相違点を主に説明する。 Embodiment 2.
FIG. 10 is a diagram schematically showing a substrate 12A included in the power conditioner according to the second embodiment. In the second embodiment, the substrate 12 of the first embodiment is replaced with the substrate 12A. The difference between the second embodiment and the first embodiment is that the substrate 12 of the first embodiment is replaced with the substrate 12A. In the second embodiment, the differences from the first embodiment will be mainly described.
　図１０は、基板１２Ａの分解斜視図である。図１０に示される通り、基板１２Ａは、第１配線層１２１、第２配線層１２２、第３配線層１２３及び第４配線層１２４を有する４層基板である。第１配線層１２１、第２配線層１２２、第３配線層１２３及び第４配線層１２４は、第１配線層１２１、第２配線層１２２、第３配線層１２３、第４配線層１２４の順番で重ねられている。 FIG. 10 is an exploded perspective view of the substrate 12A. As shown in FIG. 10, the substrate 12A is a four-layer substrate having a first wiring layer 121, a second wiring layer 122, a third wiring layer 123, and a fourth wiring layer 124. The first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124 are in the order of the first wiring layer 121, the second wiring layer 122, the third wiring layer 123, and the fourth wiring layer 124. It is piled up with.
　基板１２Ａは、第１配線層１２１と第２配線層１２２との間に位置する第１絶縁層１２５と、第２配線層１２２と第３配線層１２３との間に位置する第２絶縁層１２６と、第３配線層１２３と第４配線層１２４との間に位置する第３絶縁層１２７とを更に有する。 The substrate 12A has a first insulating layer 125 located between the first wiring layer 121 and the second wiring layer 122, and a second insulating layer 126 located between the second wiring layer 122 and the third wiring layer 123. And a third insulating layer 127 located between the third wiring layer 123 and the fourth wiring layer 124.
　図１０には示されていないが、第１スイッチング素子２１、第２スイッチング素子２２、第３スイッチング素子２３、第４スイッチング素子２４、第５スイッチング素子２５及び第６スイッチング素子２６は、第１配線層１２１に配置されている。第１配線層１２１は、４層基板である基板１２Ａの外側のひとつの層である。図１０には示されていないが、コンバータ４、平滑コンデンサ５、第１リアクトル７、第２リアクトル８、第１スナバコンデンサ９Ａ及び第２スナバコンデンサ９Ｂも、第１配線層１２１に配置されている。 Although not shown in FIG. 10, the first switching element 21, the second switching element 22, the third switching element 23, the fourth switching element 24, the fifth switching element 25, and the sixth switching element 26 are the first wirings. It is arranged on the layer 121. The first wiring layer 121 is one layer outside the substrate 12A, which is a four-layer substrate. Although not shown in FIG. 10, the converter 4, the smoothing capacitor 5, the first reactor 7, the second reactor 8, the first snubber capacitor 9A and the second snubber capacitor 9B are also arranged in the first wiring layer 121. ..
　基板１２Ａの第２配線層１２２は、配線が位置する貫通孔以外が銅箔パターンである層である。つまり、第２配線層１２２は、基板の一方の面が銅のフィルムで覆われていて、配線のための貫通孔が形成されている層である。貫通孔には、配線が位置する。第２配線層１２２は、４層基板の中間のひとつの層である。第３配線層１２３及び第４配線層１２４の各々には、配線が設けられている。 The second wiring layer 122 of the substrate 12A is a layer having a copper foil pattern other than the through hole where the wiring is located. That is, the second wiring layer 122 is a layer in which one surface of the substrate is covered with a copper film and through holes for wiring are formed. Wiring is located in the through hole. The second wiring layer 122 is one layer in the middle of the four-layer substrate. Wiring is provided in each of the third wiring layer 123 and the fourth wiring layer 124.
　図１１は、実施の形態２にかかるパワーコンディショナが有する基板１２Ａによって得られる効果を説明するための図である。図１１は、基板１２Ａのうちの第１配線層１２１、第１絶縁層１２５及び第２配線層１２２を示している。上述の通り、第１配線層１２１は４層基板である基板１２Ａの外側のひとつの層であり、第２配線層１２２は、貫通孔以外が銅箔パターンの層である。 FIG. 11 is a diagram for explaining the effect obtained by the substrate 12A of the power conditioner according to the second embodiment. FIG. 11 shows the first wiring layer 121, the first insulating layer 125, and the second wiring layer 122 of the substrate 12A. As described above, the first wiring layer 121 is one layer outside the substrate 12A, which is a four-layer substrate, and the second wiring layer 122 is a layer having a copper foil pattern except for the through holes.
　図１１の第１配線層１２１における直線の矢印１３１は、第１配線層１２１の配線の一部において流れる電流の向きを模式的に示している。当該配線の一部において電流が矢印１３１の向きに流れると、当該配線の一部を中心とする同心円状の磁場が発生する。図１１の円状の矢印１３２は、当該磁場のなかのひとつの磁力線を示している。当該磁場は、配線のインダクタンス成分となる。 The straight arrow 131 in the first wiring layer 121 of FIG. 11 schematically indicates the direction of the current flowing in a part of the wiring of the first wiring layer 121. When a current flows in the direction of arrow 131 in a part of the wiring, a concentric magnetic field centered on the part of the wiring is generated. The circular arrow 132 in FIG. 11 indicates one magnetic field line in the magnetic field. The magnetic field becomes an inductance component of the wiring.
　第２配線層１２２が銅箔パターンの層であるので、第２配線層１２２には上記の磁場を打ち消す磁場を生成する渦電流１３３が流れる。つまり、渦電流１３３は、第３配線層１２３及び第４配線層１２４の各々に設けられている配線のインダクタンス成分を低減する。すなわち、実施の形態２にかかるパワーコンディショナは、４層基板である基板１２Ａの第２配線層１２２が銅箔パターンの層であるので、第３配線層１２３及び第４配線層１２４の各々に設けられている配線のインダクタンス成分を低減することができる。 Since the second wiring layer 122 is a layer of a copper foil pattern, an eddy current 133 that generates a magnetic field that cancels the above magnetic field flows through the second wiring layer 122. That is, the eddy current 133 reduces the inductance component of the wiring provided in each of the third wiring layer 123 and the fourth wiring layer 124. That is, in the power conditioner according to the second embodiment, since the second wiring layer 122 of the substrate 12A, which is a four-layer substrate, is a layer of the copper foil pattern, each of the third wiring layer 123 and the fourth wiring layer 124 can be used. It is possible to reduce the inductance component of the provided wiring.
　図１２は、実施の形態１にかかるパワーコンディショナ１が有する制御装置３の一部又は全部がプロセッサ９１によって実現される場合のプロセッサ９１を示す図である。つまり、制御装置３の一部又は全部の機能は、メモリ９２に格納されるプログラムを実行するプロセッサ９１によって実現されてもよい。プロセッサ９１は、ＣＰＵ（Central　Processing　Unit）、処理装置、演算装置、マイクロプロセッサ、又はＤＳＰ（Digital　Signal　Processor）である。図１２には、メモリ９２も示されている。 FIG. 12 is a diagram showing a processor 91 when a part or all of the control device 3 included in the power conditioner 1 according to the first embodiment is realized by the processor 91. That is, some or all of the functions of the control device 3 may be realized by the processor 91 that executes the program stored in the memory 92. The processor 91 is a CPU (Central Processing Unit), a processing device, an arithmetic unit, a microprocessor, or a DSP (Digital Signal Processor). The memory 92 is also shown in FIG.
　制御装置３の一部又は全部の機能がプロセッサ９１によって実現される場合、当該一部又は全部の機能は、プロセッサ９１と、ソフトウェア、ファームウェア、又は、ソフトウェア及びファームウェアとの組み合わせにより実現される。ソフトウェア又はファームウェアはプログラムとして記述され、メモリ９２に格納される。プロセッサ９１は、メモリ９２に記憶されたプログラムを読み出して実行することにより、制御装置３の一部又は全部の機能を実現する。 When a part or all the functions of the control device 3 are realized by the processor 91, the part or all the functions are realized by the processor 91 and the software, the firmware, or the combination of the software and the firmware. The software or firmware is written as a program and stored in the memory 92. The processor 91 realizes a part or all the functions of the control device 3 by reading and executing the program stored in the memory 92.
　制御装置３の一部又は全部の機能がプロセッサ９１によって実現される場合、パワーコンディショナ１は、制御装置３によって実行されるステップの一部又は全部が結果的に実行されることになるプログラムを格納するためのメモリ９２を有する。メモリ９２に格納されるプログラムは、制御装置３が実行する手順又は方法の一部又は全部をコンピュータに実行させるものであるともいえる。 When some or all of the functions of the control device 3 are realized by the processor 91, the power conditioner 1 is a program in which some or all of the steps executed by the control device 3 are eventually executed. It has a memory 92 for storing. It can be said that the program stored in the memory 92 causes the computer to execute a part or all of the procedure or method executed by the control device 3.
　メモリ９２は、例えば、ＲＡＭ（Random　Access　Memory）、ＲＯＭ（Read　Only　Memory）、フラッシュメモリ、ＥＰＲＯＭ（Erasable　Programmable　Read　Only　Memory）、ＥＥＰＲＯＭ（登録商標）（Electrically　Erasable　Programmable　Read-Only　Memory）等の不揮発性もしくは揮発性の半導体メモリ、磁気ディスク、フレキシブルディスク、光ディスク、コンパクトディスク、ミニディスク又はＤＶＤ（Digital　Versatile　Disk）等である。 The memory 92 is, for example, non-volatile such as RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable Read Only Memory), EEPROM (registered trademark) (Electrically Erasable Programmable Read-Only Memory). Alternatively, it may be a volatile semiconductor memory, a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, a DVD (Digital Versatile Disk), or the like.
　図１３は、実施の形態１にかかるパワーコンディショナ１が有する制御装置３の一部又は全部が処理回路９３によって実現される場合の処理回路９３を示す図である。つまり、制御装置３の一部又は全部は、処理回路９３によって実現されてもよい。 FIG. 13 is a diagram showing a processing circuit 93 when a part or all of the control device 3 included in the power conditioner 1 according to the first embodiment is realized by the processing circuit 93. That is, a part or all of the control device 3 may be realized by the processing circuit 93.
　処理回路９３は、専用のハードウェアである。処理回路９３は、例えば、単一回路、複合回路、プログラム化されたプロセッサ、並列プログラム化されたプロセッサ、ＡＳＩＣ(Application　Specific　Integrated　Circuit)、ＦＰＧＡ（Field-Programmable　Gate　Array）、又はこれらを組み合わせたものである。 The processing circuit 93 is dedicated hardware. The processing circuit 93 is, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a combination thereof. Is.
　制御装置３の一部は、残部とは別個の専用のハードウェアであってもよい。 A part of the control device 3 may be dedicated hardware separate from the rest.
　制御装置３の複数の機能について、当該複数の機能の一部がソフトウェア又はファームウェアで実現され、当該複数の機能の残部が専用のハードウェアで実現されてもよい。このように、制御装置３の複数の機能は、ハードウェア、ソフトウェア、ファームウェア、又はこれらの組み合わせによって実現することができる。 Regarding the plurality of functions of the control device 3, some of the plurality of functions may be realized by software or firmware, and the rest of the plurality of functions may be realized by dedicated hardware. As described above, the plurality of functions of the control device 3 can be realized by hardware, software, firmware, or a combination thereof.
　以上の実施の形態に示した構成は、一例を示すものであり、別の公知の技術と組み合わせることも可能であるし、実施の形態同士を組み合わせることも可能であるし、要旨を逸脱しない範囲で、構成の一部を省略又は変更することも可能である。 The configuration shown in the above embodiments is an example, and can be combined with another known technique, can be combined with each other, and does not deviate from the gist. It is also possible to omit or change a part of the configuration.
　１　パワーコンディショナ、２　電力変換基板、３　制御装置、４　コンバータ、５　平滑コンデンサ、５Ａ　第１平滑コンデンサ、５Ｂ　第２平滑コンデンサ、５Ｃ　第３平滑コンデンサ、６　インバータ、７　第１リアクトル、８　第２リアクトル、９　スナバコンデンサ、９Ａ　第１スナバコンデンサ、９Ｂ　第２スナバコンデンサ、１０　フルブリッジ部、１１　短絡部、１２，１２Ａ　基板、１３　第１配線、１４　第２配線、１５　第３配線、１６　第４配線、２１　第１スイッチング素子、２２　第２スイッチング素子、２３　第３スイッチング素子、２４　第４スイッチング素子、２５　第５スイッチング素子、２６　第６スイッチング素子、３０，３１，３２　配線、４１　ボディ部、４２　端子部、５１　第１組、５２　第２組、５３　第３組、６１　第１駆動回路、６２　第２駆動回路、６３　第３駆動回路、６４　第４駆動回路、６５　第５駆動回路、６６　第６駆動回路、６７　主回路部、６８　ゲート駆動回路部、６９　共通回路部、７１　電力系統、７２　蓄電機器、７３　負荷、９１　プロセッサ、９２　メモリ、９３　処理回路、１２１　第１配線層、１２２　第２配線層、１２３　第３配線層、１２４　第４配線層、１２５　第１絶縁層、１２６　第２絶縁層、１２７　第３絶縁層、１３１，１３２　矢印、１３３　渦電流、２１１，２２１，２３１，２４１，２５１，２６１　コレクタ端子、２１２，２２２，２３２，２４２，２５２，２６２　エミッタ端子、２１３，２２３，２３３，２４３，２５３，２６３　ゲート端子、２１４，２２４，２３４，２４４，２５４，２６４　ダイオード。 1 power conditioner, 2 power conversion board, 3 controller, 4 converter, 5 smoothing capacitor, 5A 1st smoothing capacitor, 5B 2nd smoothing capacitor, 5C 3rd smoothing capacitor, 6 inverter, 7 1st reactor, 8th 2nd Reactor, 9 snubber capacitor, 9A 1st snubber capacitor, 9B 2nd snubber capacitor, 10 full bridge, 11 short circuit, 12, 12A board, 13 1st wiring, 14 2nd wiring, 15 3rd wiring, 16 4th Wiring, 21 1st switching element, 22 2nd switching element, 23 3rd switching element, 24 4th switching element, 25 5th switching element, 26 6th switching element, 30, 31, 32 wiring, 41 body part, 42 Terminals, 51 1st set, 52 2nd set, 53 3rd set, 61 1st drive circuit, 62 2nd drive circuit, 63 3rd drive circuit, 64 4th drive circuit, 65 5th drive circuit, 66th 6 drive circuit, 67 main circuit, 68 gate drive circuit, 69 common circuit, 71 power system, 72 capacitor, 73 load, 91 processor, 92 memory, 93 processing circuit, 121 1st wiring layer, 122 2nd Wiring layer, 123 3rd wiring layer, 124 4th wiring layer, 125 1st insulating layer, 126 2nd insulating layer, 127 3rd insulating layer, 131, 132 arrow 133 vortex current, 211, 221, 231,241, 251,261 collector terminal, 212,222,2232,242,252,262 emitter terminal, 213,223,233,243,253,263 gate terminal, 214,224,234,244,254,264 capacitor.

Claims (5)

  1. 　直流電圧を平滑する平滑コンデンサと、
    　直流電力を交流電力に変換する機能と交流電力を直流電力に変換する機能との一方又は双方を有するフルブリッジ部と、
    　交流電力を短絡する短絡部と、
    　前記平滑コンデンサ、前記フルブリッジ部及び前記短絡部が配置されている基板とを備え、
    　前記フルブリッジ部は、フルブリッジ回路を構成する第１スイッチング素子、第２スイッチング素子、第３スイッチング素子及び第４スイッチング素子を有し、
    　前記短絡部は、第５スイッチング素子及び第６スイッチング素子を有し、
    　前記第１スイッチング素子、前記第２スイッチング素子、前記第３スイッチング素子、前記第４スイッチング素子、前記第５スイッチング素子及び前記第６スイッチング素子の各々は、ボディ部と、端子部とを有し、
    　前記第１スイッチング素子、前記第２スイッチング素子、前記第３スイッチング素子、前記第４スイッチング素子、前記第５スイッチング素子及び前記第６スイッチング素子の各々は、前記端子部が前記ボディ部より前記平滑コンデンサの側に位置する状態で前記基板に配置されている
    　ことを特徴とする電力変換基板。     A smoothing capacitor that smoothes DC voltage,
    A full bridge section that has one or both of a function to convert DC power to AC power and a function to convert AC power to DC power.
    A short-circuited part that short-circuits AC power,
    The smoothing capacitor, the full bridge portion, and the substrate on which the short-circuit portion is arranged are provided.
    The full bridge portion includes a first switching element, a second switching element, a third switching element, and a fourth switching element constituting the full bridge circuit.
    The short-circuited portion has a fifth switching element and a sixth switching element.
    Each of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element has a body portion and a terminal portion.
    In each of the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element, the terminal portion is a smoothing capacitor from the body portion. A power conversion board characterized in that it is arranged on the board in a state of being located on the side of the above.
  2. 　前記第１スイッチング素子及び前記第２スイッチング素子は、第１駆動信号をもとに動作し、
    　前記第３スイッチング素子及び前記第４スイッチング素子は、第２駆動信号をもとに動作し、
    　前記第１スイッチング素子、前記第２スイッチング素子、前記第３スイッチング素子、前記第４スイッチング素子、前記第５スイッチング素子及び前記第６スイッチング素子は、前記第１スイッチング素子と前記第２スイッチング素子との組、前記第５スイッチング素子と前記第６スイッチング素子との組、前記第３スイッチング素子と前記第４スイッチング素子との組の順番で前記基板に配置されている
    　ことを特徴とする請求項１に記載の電力変換基板。     The first switching element and the second switching element operate based on the first drive signal.
    The third switching element and the fourth switching element operate based on the second drive signal.
    The first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element and the sixth switching element are the first switching element and the second switching element. The first aspect of the present invention is characterized in that the sets, the set of the fifth switching element and the sixth switching element, and the set of the third switching element and the fourth switching element are arranged on the substrate in this order. The power conversion board described.
  3. 　前記平滑コンデンサと前記フルブリッジ部とを接続する配線に接続され、前記第１スイッチング素子と前記第２スイッチング素子との組と前記平滑コンデンサとの間に位置すると共に、前記第１スイッチング素子のコレクタ端子と前記第２スイッチング素子のエミッタ端子との間に位置する第１スナバコンデンサと、
    　前記配線に接続され、前記第３スイッチング素子と前記第４スイッチング素子との組と前記平滑コンデンサとの間に位置すると共に、前記第３スイッチング素子のエミッタ端子と前記第４スイッチング素子のコレクタ端子との間に位置する第２スナバコンデンサと
    　を更に備えることを特徴とする請求項２に記載の電力変換基板。     It is connected to the wiring connecting the smoothing capacitor and the full bridge portion, is located between the pair of the first switching element and the second switching element and the smoothing capacitor, and is a collector of the first switching element. A first snubber capacitor located between the terminal and the emitter terminal of the second switching element,
    It is connected to the wiring and is located between the pair of the third switching element and the fourth switching element and the smoothing capacitor, and the emitter terminal of the third switching element and the collector terminal of the fourth switching element. The power conversion board according to claim 2, further comprising a second snubber capacitor located between the two.
  4. 　前記第１スイッチング素子の前記端子部の側でなく前記ボディ部の側に位置する状態で前記基板に配置されていて前記第１スイッチング素子を駆動する第１駆動回路と、
    　前記第２スイッチング素子の前記端子部の側でなく前記ボディ部の側に位置する状態で前記基板に配置されていて前記第２スイッチング素子を駆動する第２駆動回路と、
    　前記第３スイッチング素子の前記端子部の側でなく前記ボディ部の側に位置する状態で前記基板に配置されていて前記第３スイッチング素子を駆動する第３駆動回路と、
    　前記第４スイッチング素子の前記端子部の側でなく前記ボディ部の側に位置する状態で前記基板に配置されていて前記第４スイッチング素子を駆動する第４駆動回路と、
    　前記第５スイッチング素子の前記端子部の側でなく前記ボディ部の側に位置する状態で前記基板に配置されていて前記第５スイッチング素子を駆動する第５駆動回路と、
    　前記第６スイッチング素子の前記端子部の側でなく前記ボディ部の側に位置する状態で前記基板に配置されていて前記第６スイッチング素子を駆動する第６駆動回路と
    　を更に備えることを特徴とする請求項１から３のいずれか１項に記載の電力変換基板。     A first drive circuit that is arranged on the substrate and drives the first switching element in a state of being located not on the terminal portion side of the first switching element but on the body portion side.
    A second drive circuit that is arranged on the substrate and drives the second switching element so as to be located not on the terminal portion side of the second switching element but on the body portion side.
    A third drive circuit that is arranged on the substrate and drives the third switching element so as to be located not on the terminal portion side of the third switching element but on the body portion side.
    A fourth drive circuit that is arranged on the substrate and drives the fourth switching element in a state of being located not on the terminal portion side of the fourth switching element but on the body portion side.
    A fifth drive circuit that is arranged on the substrate and drives the fifth switching element in a state of being located not on the terminal portion side of the fifth switching element but on the body portion side.
    It is characterized by further including a sixth drive circuit that is arranged on the substrate in a state of being located not on the terminal portion side of the sixth switching element but on the body portion side and drives the sixth switching element. The power conversion board according to any one of claims 1 to 3.
  5. 　前記基板は、４層基板であって、
    　前記第１スイッチング素子、前記第２スイッチング素子、前記第３スイッチング素子、前記第４スイッチング素子、前記第５スイッチング素子及び前記第６スイッチング素子は、前記４層基板の外側のひとつの層に配置されており、
    　前記４層基板の中間のひとつの層は、配線が位置する貫通孔以外が銅箔パターンである層である
    　ことを特徴とする請求項１から４のいずれか１項に記載の電力変換基板。     The substrate is a four-layer substrate.
    The first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element are arranged in one layer outside the four-layer substrate. And
    The power conversion substrate according to any one of claims 1 to 4, wherein one layer in the middle of the four-layer substrate is a layer having a copper foil pattern other than the through hole in which the wiring is located.
PCT/JP2020/000903 2020-01-14 2020-01-14 Power conversion board WO2021144853A1 (en)

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JPH1127959A (en) * 1997-07-08 1999-01-29 Toshiba Fa Syst Eng Kk Inverter
JP2002044964A (en) * 2000-07-21 2002-02-08 Hitachi Ltd Semiconductor device, power converter and vehicle
JP2002125381A (en) * 2000-10-13 2002-04-26 Mitsubishi Electric Corp Power converter
JP2009089541A (en) * 2007-10-01 2009-04-23 Toshiba Carrier Corp Grid-interconnection inverter device
JP2013172469A (en) * 2012-02-17 2013-09-02 Mitsubishi Electric Corp Power module and air conditioner
JP2016219715A (en) * 2015-05-26 2016-12-22 住友ベークライト株式会社 Insulation gate bipolar transistor element, resin composition, and surge countermeasure member
JP2017163777A (en) * 2016-03-11 2017-09-14 オムロン株式会社 Inverter device
JP2017168721A (en) * 2016-03-17 2017-09-21 アルプス電気株式会社 Semiconductor device and manufacturing method of semiconductor device
WO2018186353A1 (en) * 2017-04-05 2018-10-11 ローム株式会社 Power module

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1127959A (en) * 1997-07-08 1999-01-29 Toshiba Fa Syst Eng Kk Inverter
JP2002044964A (en) * 2000-07-21 2002-02-08 Hitachi Ltd Semiconductor device, power converter and vehicle
JP2002125381A (en) * 2000-10-13 2002-04-26 Mitsubishi Electric Corp Power converter
JP2009089541A (en) * 2007-10-01 2009-04-23 Toshiba Carrier Corp Grid-interconnection inverter device
JP2013172469A (en) * 2012-02-17 2013-09-02 Mitsubishi Electric Corp Power module and air conditioner
JP2016219715A (en) * 2015-05-26 2016-12-22 住友ベークライト株式会社 Insulation gate bipolar transistor element, resin composition, and surge countermeasure member
JP2017163777A (en) * 2016-03-11 2017-09-14 オムロン株式会社 Inverter device
JP2017168721A (en) * 2016-03-17 2017-09-21 アルプス電気株式会社 Semiconductor device and manufacturing method of semiconductor device
WO2018186353A1 (en) * 2017-04-05 2018-10-11 ローム株式会社 Power module

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