WO2021136196A1 - 一种具有金字塔叠加结构的单晶硅片 - Google Patents

一种具有金字塔叠加结构的单晶硅片 Download PDF

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WO2021136196A1
WO2021136196A1 PCT/CN2020/140279 CN2020140279W WO2021136196A1 WO 2021136196 A1 WO2021136196 A1 WO 2021136196A1 CN 2020140279 W CN2020140279 W CN 2020140279W WO 2021136196 A1 WO2021136196 A1 WO 2021136196A1
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pyramid
silicon wafer
solution
texturing
small
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PCT/CN2020/140279
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English (en)
French (fr)
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杜俊霖
韩安军
孙林
付昊鑫
程琼
孟凡英
刘正新
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中威新能源(成都)有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to the field of solar cells, in particular to a single crystal silicon wafer with a pyramidal superimposed structure.
  • a pyramid-shaped light-trapping structure can be formed on the surface of the silicon wafer through wet wet texturing. Sunlight is reflected on the surface of the pyramid twice, thereby increasing the light absorption rate of the silicon wafer. Improve the current density and photoelectric conversion efficiency of solar cells.
  • This kind of light-trapping texture is formed by anisotropic corrosion of silicon wafers in lye.
  • the crystal face index of the silicon wafer surface is (100). Anisotropy occurs in lye containing texturing additives. During the chemical reaction, the surface with a crystal face index of (100) gradually disappeared, and a pyramidal morphology composed of a surface with a crystal face index of (111) appeared.
  • the suede structure of conventional monocrystalline silicon wafers is that pyramids of different sizes are closely arranged, covering the entire silicon wafer surface, and the length of the bottom side of the pyramid is generally 0.2-20 ⁇ m.
  • the suede of different pyramid sizes has different optical and electrical properties.
  • silicon wafers with a large pyramid size have higher reflectivity to light, and the short-circuit current (Isc) of the made cells is smaller; on the contrary,
  • the silicon wafer with a small pyramid size has low reflectivity to light, and the short-circuit current of the made cell is relatively high.
  • silicon wafers with small pyramid sizes have other problems. For example, when the conductive grid lines are screen-printed, the small pyramid suede is not in sufficient contact with the conductive grid lines, which increases the contact resistance and reduces the welding tension of the grid lines.
  • the present invention provides a single crystal silicon wafer with a pyramid stack structure.
  • the monocrystalline silicon wafer suede of the present invention is a pyramid stack structure of different sizes, which not only has the advantages of good contact between the large pyramid and the conductive grid line and high welding tension, but also has the advantages of low reflectivity and high short-circuit current of the small pyramid.
  • a single crystal silicon wafer with a pyramid superimposed structure includes a silicon wafer whose surface is covered with a pyramid unit after being textured.
  • the pyramid unit includes the Shwedagon Pagoda, and small pyramids are sequentially superimposed on the surface of the large pyramid from top to bottom.
  • the length of the bottom side of the small pyramid is less than one-half of the length of the large pyramid.
  • the bottom area of the pyramid unit is 1-500 square microns.
  • the number of pyramids included in the pyramid unit is 5 to 500.
  • Pre-cleaning to remove contamination on the surface of the original silicon wafer Use one or more of ammonia, sodium hydroxide, and potassium hydroxide to mix with hydrogen peroxide to obtain solution a, and clean the original silicon wafer in solution a to remove surface particles and organic contamination.
  • the first step of texturing mix sodium hydroxide or potassium hydroxide with texturing additives to obtain solution b, and perform anisotropic corrosion on the silicon wafer in solution b to obtain a larger-sized pyramid suede structure and form Great pyramid suede.
  • the second step of texturing mix sodium hydroxide or potassium hydroxide with texturing additives to obtain solution c, and put the monocrystalline silicon wafers after texturing in step B into solution C for anisotropic corrosion, so that the original Some large pyramid suede is destroyed, and small pyramid suede of smaller size is formed on the suede surface of the big gold tower, resulting in a suede structure superimposed on the pyramid.
  • Alkaline washing Mix one or more of ammonia, sodium hydroxide, and potassium hydroxide with hydrogen peroxide to form solution d, clean the texturing monocrystalline silicon wafer in solution d, and remove the surface of the texturing monocrystalline silicon wafer Residue.
  • the original silicon wafer is cleaned by solution a, it is anisotropically etched by solution b to obtain the large pyramid suede, and then after the second texturing by solution c, the original large gold suede
  • a small pyramid suede with a smaller size is formed on the upper surface, and the surface of the large pyramid is superimposed with small pyramids from top to bottom to form a pyramid unit. Because the pyramid unit covers the surface of the silicon wafer and is superimposed, the single The crystalline silicon wafer not only has the advantages of good contact between the large pyramid and the conductive grid line and high welding tension, but also has the advantages of low reflectivity and high short-circuit current of the small pyramid. After being manufactured into a cell, the cell has a high conversion efficiency. , Welding reliability is better.
  • the suede surface of the monocrystalline silicon wafer prepared by the method provided by the present invention is a pyramid-stacked structure of different heights. At the same time, it has the advantages of good contact between the large pyramid and the conductive grid line, high welding tension, and low reflectivity and short circuit of the small pyramid. The advantage of high current. Compared with solar cells made of conventional large or small suede silicon wafers, solar cells made of monocrystalline silicon wafers with overlapping pyramid textures of different sizes have improved conversion efficiency and better welding reliability. .
  • one or more of ammonia, sodium hydroxide, and potassium hydroxide are mixed with hydrogen peroxide to form solution d, and the texturing silicon wafer is cleaned in solution d to remove the reaction products and the surface of the texturing silicon wafer. Organic residues.
  • Figure 1 is an SEM image of the present invention
  • Figure 2 is an enlarged SEM image of Figure 1;
  • Figure 3 is a schematic diagram of the structure of the pyramid unit
  • Figure 4 is a schematic cross-sectional view of AA in Figure 3;
  • Fig. 5 is a schematic diagram of the structure after disassembling Fig. 3;
  • Fig. 6 is a schematic diagram of the contact between the present invention and the conductive gate line
  • Fig. 7 is a graph of reflectance of the present invention.
  • a monocrystalline silicon wafer with a pyramidal superimposed structure includes a silicon wafer whose surface is covered with pyramid units after being textured.
  • the pyramid unit includes the Shwedagon Pagoda, and the surface of the large pyramid is successively superimposed with small pyramids from top to bottom.
  • the length of the bottom side of the small pyramid is less than one-half of the length of the large pyramid.
  • the bottom area of the pyramid unit is 1-500 square microns.
  • the number of pyramids included in the pyramid unit is 5 to 500.
  • Pre-cleaning to remove contamination on the surface of the original silicon wafer Use one or more of ammonia, sodium hydroxide, and potassium hydroxide to mix with hydrogen peroxide to obtain solution a, and clean the original silicon wafer in solution a to remove surface particles and organic contamination.
  • the first step of texturing mix sodium hydroxide or potassium hydroxide with texturing additives to obtain solution b, and perform anisotropic corrosion on the silicon wafer in solution b to obtain a larger-sized pyramid suede structure and form Great pyramid suede.
  • the second step of texturing mix sodium hydroxide or potassium hydroxide with texturing additives to obtain solution c, and put the silicon wafers after step B texturing into solution C for anisotropic corrosion, so that the original The suede of the Great Pyramid is destroyed, and a small pyramid suede of smaller size is formed on the suede of the Big Gold Pagoda, and the suede structure of the superimposed pyramid is obtained.
  • Alkaline washing Mix one or more of ammonia, sodium hydroxide, and potassium hydroxide with hydrogen peroxide to form solution d, and clean the texturing silicon wafer in solution d to remove the reaction products and reaction products on the surface of the texturing silicon wafer. Organic residues.
  • the original silicon wafer is cleaned by solution a, it is anisotropically etched by solution b to obtain the large pyramid suede, and then the second texturing is performed by solution c to make the original large gold velvet
  • a small pyramid suede with a smaller size is formed on the surface, and small pyramids are superimposed on the surface of the large pyramid from top to bottom to form a pyramid unit. Because the pyramid unit covers the surface of the silicon wafer and is superimposed, the The monocrystalline silicon wafer not only has the advantages of good contact between the large pyramid and the conductive grid line and high welding tension, but also has the advantages of low reflectivity and high short-circuit current of the small pyramid, and the conversion efficiency of the cell after being manufactured into a cell High, better welding reliability.
  • the large pyramid and the small pyramid have four faces respectively, and each face is composed of (111) crystal faces of single crystal silicon.
  • the conductive gate lines are composed of metal particles of different sizes. Due to the large ravines between the pyramid units, the metal particles have more contact with the pyramid, and the contact resistance is small. At the same time, the combination of the conductive grid line and the suede can make the welding tension higher.
  • the length of the base of the large pyramid is 10 microns, and the length of the base of the small pyramid is less than 5 microns.
  • the original silicon wafer is cleaned in a mixed solution of ammonia and hydrogen peroxide.
  • the mass concentration of ammonia in the solution is 3%
  • the mass concentration of hydrogen peroxide is 3%
  • the temperature is 65°C
  • the cleaning time is 5 minutes.
  • the first step is to make texturing
  • the mass concentration of each component in the solution potassium hydroxide is 7.5%, TK81 is 4%, TT72C13 is 0.6%, the temperature is 85°C, and the time is 15 minutes. After texturing, the silicon wafers were rinsed in pure water at room temperature for 3 minutes.
  • the mass concentration of each component in the solution potassium hydroxide is 3.5%, TK81 is 8.5%, TT72C13 is 0.9%, the temperature is 75°C, and the time is 15 minutes. After texturing, the silicon wafers were rinsed in pure water at room temperature for 3 minutes.
  • the texturing silicon wafer is cleaned in a mixed solution of ammonia and hydrogen peroxide.
  • the mass concentration of ammonia in the solution is 3%
  • the mass concentration of hydrogen peroxide is 3%
  • the temperature is 65°C
  • the cleaning time is 5 minutes.
  • edges and ravines of the pyramid are smoothed, using 49% hydrofluoric acid and 60% nitric acid, the volume ratio of hydrofluoric acid to nitric acid is 1:100, the temperature is 25°C, and the time is 2 minutes. After the CP, rinse the silicon wafer in pure water at room temperature for 3 minutes.
  • the texturing silicon wafer is cleaned in a mixed solution of hydrochloric acid and hydrogen peroxide.
  • the mass concentration of hydrochloric acid in the solution is 3%
  • the mass concentration of hydrogen peroxide is 3%
  • the temperature is 65°C
  • the cleaning time is 5 minutes. After cleaning, rinse the silicon wafers in pure water at room temperature for 3 minutes.
  • the texturing silicon wafer is cleaned in a hydrofluoric acid solution with a mass concentration of 5% to remove the oxide layer on the surface of the silicon wafer at a temperature of 25° C. and a time of 2 minutes. Rinse the silicon wafers in pure water at room temperature for 2 minutes after the CP ends.
  • the monocrystalline silicon wafer in this embodiment not only has the advantages of good contact between the large pyramid and the conductive grid lines and high welding tension, but also has the advantages of low reflectivity and high short-circuit current of the small pyramid.
  • the cell has high conversion efficiency and better welding reliability.
  • German ICB texturing additives to prepare the suede of the pyramid superimposed structure.
  • the specific steps are as follows:
  • the original silicon wafer is cleaned in a mixed solution of potassium hydroxide and hydrogen peroxide, the mass concentration of potassium hydroxide in the solution is 1.5%, the mass concentration of hydrogen peroxide is 3%, the temperature is 65°C, and the cleaning time is 5 minutes. After cleaning, rinse the silicon wafers in pure water at room temperature for 3 minutes.
  • the first step is to make texturing
  • German ICB texturing additives Using German ICB texturing additives, the mass concentration of each component in the solution: potassium hydroxide is 4.5%, ICB Ultra M is 0.8%, the temperature is 85°C, and the time is 10 minutes. After texturing, the silicon wafers were rinsed in pure water at room temperature for 3 minutes.
  • German ICB texturing additives Using German ICB texturing additives, the mass concentration of each component in the solution: potassium hydroxide is 2%, ICB V3 is 0.5%, the temperature is 80°C, and the time is 10 minutes. After texturing, the silicon wafers were rinsed in pure water at room temperature for 3 minutes.
  • the texturing silicon wafer is cleaned in a mixed solution of potassium hydroxide and hydrogen peroxide, the mass concentration of potassium hydroxide in the solution is 1.5%, the mass concentration of hydrogen peroxide is 3%, the temperature is 65°C, and the cleaning time is 5 minutes. After cleaning, rinse the silicon wafers in pure water at room temperature for 3 minutes.
  • edges and ravines of the pyramid are smoothed, using a mixed solution of ozone and hydrofluoric acid, the ozone concentration is 30ppm, the mass concentration of hydrofluoric acid is 1%, the temperature is 25°C, and the time is 3min. After the CP, rinse the silicon wafer in pure water at room temperature for 3 minutes.
  • the texturing silicon wafer is cleaned in a mixed solution of hydrochloric acid and hydrogen peroxide.
  • the mass concentration of hydrochloric acid in the solution is 3%
  • the mass concentration of hydrogen peroxide is 3%
  • the temperature is 65°C
  • the cleaning time is 5 minutes. After cleaning, rinse the silicon wafers in pure water at room temperature for 3 minutes.
  • the texturing silicon wafer is cleaned in a hydrofluoric acid solution with a mass concentration of 5% to remove the oxide layer on the surface of the silicon wafer at a temperature of 25° C. and a time of 2 minutes. Rinse the silicon wafers in pure water at room temperature for 2 minutes after the CP ends.
  • the monocrystalline silicon wafer in this embodiment not only has the advantages of good contact between the large pyramid and conductive grid lines and high welding tension, but also the advantages of low reflectivity and high short-circuit current of the small pyramid.
  • the cell has high conversion efficiency and better welding reliability.

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Abstract

一种具有金字塔叠加结构的单晶硅片，原硅片通过溶液a进行清洗后，在通过溶液b进行各向异性腐蚀，得到大金字塔绒面，再通过溶液c进行二次制绒后，使原有的大金字绒面上形成尺寸较小的小金字塔绒面，且大金字塔的表面从上到下依次叠加的有小金字塔，从而形成金字塔单元，因金字塔单元覆盖在硅片的表面，且是叠加的，所以该单晶硅片不仅具备了大金字塔与导电栅线接触好、焊接拉力高的优点，也具备了小金字塔反射率低、短路电流高的优点。单晶硅片绒面为不同大小的金字塔叠加结构，不仅具备了大金字塔与导电栅线接触好、焊接拉力高的优点，也具备了小金字塔反射率低、短路电流高的优点。

Description

一种具有金字塔叠加结构的单晶硅片 技术领域
本发明涉及太阳电池领域，具体是指一种具有金字塔叠加结构的单晶硅片。
背景技术
单晶硅太阳电池的制造过程中，通过槽式湿法制绒可以在硅片表面形成金字塔形貌的陷光结构，太阳光在金字塔表面发生二次反射，从而增加硅片对光的吸收率，提高太阳电池的电流密度和光电转换效率。这种有陷光作用的绒面是利用硅片在碱液中的各向异性腐蚀形成的，硅片表面的晶面指数为(100)，在含有制绒添加剂的碱液中发生各向异性化学反应时，晶面指数为(100)的表面逐渐消失，出现由晶面指数为(111)的表面组成的金字塔形貌。
常规的单晶硅片绒面结构为大小不一的金字塔紧密排列，布满整个硅片表面，金字塔底边长度一般为0.2－20μm。不同金字塔大小的绒面具有不同的光学特性和电学特性，一般而言，金字塔尺寸大的硅片对光线的反射率较高，做成的电池片的短路电流(Isc)较小；相反地，金字塔尺寸小的硅片对光线的反射率较低，做成的电池片的短路电流较高。但是金字塔尺寸小的硅片存在其它问题，例如丝网印刷导电栅线时，小金字塔绒面与导电栅线的接触不充分，增大了接触电阻，此外降低了栅线的焊接拉力。
发明内容
基于以上技术问题，本发明提供了一种具有金字塔叠加结构的单晶硅片。本发明的单晶硅片绒面为不同大小的金字塔叠加结构，不仅具备了大金字塔与导电栅线接触好、焊接拉力高的优点，也具备了小金字塔反射率低、短路电流高的优点。
本发明为了实现上述目的具体采用以下技术方案：
一种具有金字塔叠加结构的单晶硅片，包括硅片，硅片制绒后其表面覆盖有金字塔单元。
作为一种优选的方式，金字塔单元包括大金塔，大金字塔的表面从上到下依次叠加设有小金字塔。
作为一种优选的方式，小金字塔的底边长度小于大金字塔的二分之一。
作为一种优选的方式，金字塔单元的底面积为1－500平方微米。
作为一种优选的方式，金字塔单元内包含的金字塔数量为5－500个。
上述一种具有金字塔叠加结构的单晶硅片制备方法，其特征在于，包括以下步骤：
A、预清洗，去除原硅片表面沾污。使用氨水、氢氧化钠、氢氧化钾中的一种或几种，与双氧水混合得到溶液a，在溶液a中清洗原硅片，去除表面的颗粒物和有机沾污。
B、第一步制绒：将氢氧化钠或者氢氧化钾与制绒添加剂混合得到溶液b，在溶液b中对硅片进行各向异性腐蚀，得到尺寸较大的金字塔绒面结构，并形成大金字塔绒面。
C、第二步制绒：将氢氧化钠或者氢氧化钾与制绒添加剂混合得到溶液c，并将步骤B制绒后的单晶硅片放入溶液C中进行各向异性腐蚀，使原有的大金字塔绒面被破坏，并在大金子塔绒面上形成尺寸较小的小金字塔绒面，得到金字塔叠加的绒面结构。
D、碱洗：将氨水、氢氧化钠、氢氧化钾中的一种或几种，与双氧水混合成溶液d，在溶液d中清洗制绒单晶硅片，去除制绒单晶硅片表面的残留物。
在本发明中，原硅片通过溶液a进行清洗后，在通过溶液b进行各向异性腐蚀，得到大金字塔绒面，再通过溶液c进行二次制绒后，使原有的大金字绒面上形成尺寸较小的小金字塔绒面，且大金字塔的表面从上到下依次叠加的有小金字塔，从而形成金字塔单元，因金字塔单元覆盖在硅片的表面，且是叠加的，所以该单晶硅片不仅具备了大金字塔与导电栅线接触好、焊接拉力高的优 点，也具备了小金字塔反射率低、短路电流高的优点，且制造成电池片后，该电池片的转换效率高，焊接可靠性更好。
本发明的有益效果如下：
1.本发明提供的方法制备的单晶硅片绒面为不同高度的金字塔叠加的结构，同时具备了大金字塔与导电栅线接触好、焊接拉力高的优点，以及小金字塔反射率低、短路电流高的优点。使用具有不同尺寸叠加的金字塔绒面的单晶硅片制造的电池片，与使用常规大绒面或小绒面硅片制造的电池片相比，转换效率有所提升，而且焊接可靠性更好。
2.本发明将氨水、氢氧化钠、氢氧化钾中的一种或几种，与双氧水混合成溶液d，在溶液d中清洗制绒硅片，可去除制绒硅片表面的反应产物和有机物残留。
附图说明
图1是本发明的SEM图；
图2是将图1放大后的SEM图；
图3是金字塔单元的结构示意图；
图4是图3中A－A的剖面简图；
图5是将图3拆开后的结构示意图；
图6是本发明与导电栅线的接触示意图；
图7是本发明的反射率曲线图。
具体实施方式
为了本技术领域的人员更好的理解本发明，下面结合附图和以下实施例对本发明作进一步详细描述。
实施例1
参考图1－7，一种具有金字塔叠加结构的单晶硅片，包括硅片，硅片制绒后其表面覆盖有金字塔单元。
作为一种优选的方式，金字塔单元包括大金塔，大金字塔的表面从上到下 依次叠加设有小金字塔。
作为一种优选的方式，小金字塔的底边长度小于大金字塔的二分之一。
作为一种优选的方式，金字塔单元的底面积为1－500平方微米。
作为一种优选的方式，金字塔单元内包含的金字塔数量为5－500个。
上述一种具有金字塔叠加结构的单晶硅片制备方法，其特征在于，包括以下步骤：
A、预清洗，去除原硅片表面沾污。使用氨水、氢氧化钠、氢氧化钾中的一种或几种，与双氧水混合得到溶液a，在溶液a中清洗原硅片，去除表面的颗粒物和有机沾污。
B、第一步制绒：将氢氧化钠或者氢氧化钾与制绒添加剂混合得到溶液b，在溶液b中对硅片进行各向异性腐蚀，得到尺寸较大的金字塔绒面结构，并形成大金字塔绒面。
C、第二步制绒：将氢氧化钠或者氢氧化钾与制绒添加剂混合得到溶液c，并将步骤B制绒后的硅片放入溶液C中进行各向异性腐蚀，使原有的大金字塔绒面被破坏，并在大金子塔绒面上形成尺寸较小的小金字塔绒面，得到金字塔叠加的绒面结构。
D、碱洗：将氨水、氢氧化钠、氢氧化钾中的一种或几种，与双氧水混合成溶液d，在溶液d中清洗制绒硅片，去除制绒硅片表面的反应产物和有机物残留。
在本实施例中，原硅片通过溶液a进行清洗后，在通过溶液b进行各向异性腐蚀，得到大金字塔绒面，再通过溶液c进行二次制绒后，使原有的大金字绒面上形成尺寸较小的小金字塔绒面，且大金字塔的表面从上到下依次叠加的有小金字塔，从而形成金字塔单元，因金字塔单元覆盖在硅片的表面，且是叠 加的，所以该单晶硅片不仅具备了大金字塔与导电栅线接触好、焊接拉力高的优点，也具备了小金字塔反射率低、短路电流高的优点，且制造成电池片后，该电池片的转换效率高，焊接可靠性更好。
具体的，大金字塔、小金字塔分别有四个面，且每个面都由单晶硅的(111)晶面组成。
具体的，参考图6，其中导电栅线由大小不一的金属颗粒组成。因金字塔单元之间的沟壑较大，所以金属颗粒与金字塔的接触更充分，接触电阻小，同时导电栅线与绒面的结合可使焊接拉力更高。
具体的，大金字塔的底边长度为10微米，则小金字塔的底边长度小于5微米。
实施例2：
参考图1－7，在本实施例中，可选但不限制于使用日本林纯HPC的制绒添加剂制备金字塔叠加结构的绒面，具体步骤如下：
(1)预清洗
在氨水与双氧水的混合溶液中清洗原硅片，溶液中氨水的质量浓度为3％，双氧水的质量浓度为3％，温度为65℃，清洗时间为5min。清洗结束后在常温纯水中漂洗硅片3min。
(2)第一步制绒
使用日本林纯HPC的制绒添加剂，溶液中各组分的质量浓度：氢氧化钾为7.5％，TK81为4％，TT72C13为0.6％，温度为85℃，时间为15min。制绒结束后在常温纯水中漂洗硅片3min。
(3)第二步制绒
使用日本林纯HPC的制绒添加剂，溶液中各组分的质量浓度：氢氧化钾为 3.5％，TK81为8.5％，TT72C13为0.9％，温度为75℃，时间为15min。制绒结束后在常温纯水中漂洗硅片3min。
(4)碱洗
在氨水与双氧水的混合溶液中清洗制绒硅片，溶液中氨水的质量浓度为3％，双氧水的质量浓度为3％，温度为65℃，清洗时间为5min。清洗结束后在常温纯水中漂洗硅片3min。
(5)化学抛光CP(Chemical polishing)
对金字塔的棱角和沟壑进行圆滑处理，使用49％的氢氟酸和60％的硝酸，氢氟酸与硝酸的体积比为1：100，温度为25℃，时间为2min。CP结束后在常温纯水中漂洗硅片3min。
(6)酸洗
在盐酸与双氧水的混合溶液中清洗制绒硅片，溶液中盐酸的质量浓度为3％，双氧水的质量浓度为3％，温度为65℃，清洗时间为5min。清洗结束后在常温纯水中漂洗硅片3min。
(7)去氧化层
在质量浓度为5％的氢氟酸溶液中清洗制绒硅片，去除硅片表面的氧化层，温度为25℃，时间为2min。CP结束后在常温纯水中漂洗硅片2min。
(8)慢提拉
在60℃热水中清洗制绒硅片1min，然后将硅片缓慢提拉出水，提拉速度为5mm/s，硅片表面没有水滴残留。
(9)烘干
使用加热后的过滤空气吹干硅片，温度为50℃，时间为10min，烘干后得到表面洁净的制绒硅片，可以进行下一步CVD镀膜工艺。
本实施例中的单晶硅片不仅具备了大金字塔与导电栅线接触好、焊接拉力高的优点，也具备了小金字塔反射率低、短路电流高的优点，且制造成电池片后，该电池片的转换效率高，焊接可靠性更好。
本实施例的其他部分与实施例1相同，这里就不再赘述。
实施例3：
参考图1－7，在本实施例中，可选但不限制于使用德国ICB的制绒添加剂制备金字塔叠加结构的绒面，具体步骤如下：
(1)预清洗
在氢氧化钾与双氧水的混合溶液中清洗原硅片，溶液中氢氧化钾的质量浓度为1.5％，双氧水的质量浓度为3％，温度为65℃，清洗时间为5min。清洗结束后在常温纯水中漂洗硅片3min。
(2)第一步制绒
使用德国ICB的制绒添加剂，溶液中各组分的质量浓度：氢氧化钾为4.5％，ICB Ultra M为0.8％，温度为85℃，时间为10min。制绒结束后在常温纯水中漂洗硅片3min。
(3)第二步制绒
使用德国ICB的制绒添加剂，溶液中各组分的质量浓度：氢氧化钾为2％，ICB V3为0.5％，温度为80℃，时间为10min。制绒结束后在常温纯水中漂洗硅片3min。
(4)碱洗
在氢氧化钾与双氧水的混合溶液中清洗制绒硅片，溶液中氢氧化钾的质量浓度为1.5％，双氧水的质量浓度为3％，温度为65℃，清洗时间为5min。清洗结束后在常温纯水中漂洗硅片3min。
(5)化学抛光CP(Chemical polishing)
对金字塔的棱角和沟壑进行圆滑处理，使用臭氧和氢氟酸的混合溶液，臭氧浓度为30ppm，氢氟酸的质量浓度为1％，温度为25℃，时间为3min。CP结束后在常温纯水中漂洗硅片3min。
(6)酸洗
在盐酸与双氧水的混合溶液中清洗制绒硅片，溶液中盐酸的质量浓度为3％，双氧水的质量浓度为3％，温度为65℃，清洗时间为5min。清洗结束后在常温纯水中漂洗硅片3min。
(7)去氧化层
在质量浓度为5％的氢氟酸溶液中清洗制绒硅片，去除硅片表面的氧化层，温度为25℃，时间为2min。CP结束后在常温纯水中漂洗硅片2min。
(8)慢提拉
在60℃热水中清洗制绒硅片1min，然后将硅片缓慢提拉出水，提拉速度为5mm/s，硅片表面没有水滴残留。
(9)烘干
使用加热后的过滤空气吹干硅片，温度为50℃，时间为10min，烘干后得到表面洁净的制绒硅片，可以进行下一步CVD镀膜工序。
本实施例中的单晶硅片不仅具备了大金字塔与导电栅线接触好、焊接拉力高的优点，也具备了小金字塔反射率低、短路电流高的优点，且制造成电池片后，该电池片的转换效率高，焊接可靠性更好。
本实施例的其他部分与实施例1相同，这里就不再赘述。
如上即为本发明的实施例。上述实施例以及实施例中的具体参数仅是为了清楚表述本发明的验证过程，并非用以限制本发明的专利保护范围，本发明的 专利保护范围仍然以其权利要求书为准，凡是运用本发明的说明书及附图内容所作的等同结构变化，同理均应包含在本发明的保护范围内。

Claims (5)

  1. 一种具有金字塔叠加结构的单晶硅片，包括硅片，其特征在于：所述硅片制绒后其表面覆盖有金字塔单元。
  2. 根据权利要求1所述的一种具有金字塔叠加结构的单晶硅片，其特征在于：所述金字塔单元包括大金塔，所述大金字塔的表面从上到下依次叠加设有小金字塔。
  3. 根据权利要求2所述的一种具有金字塔叠加结构的单晶硅片，其特征在于：所述小金字塔的底边长度小于大金字塔的二分之一。
  4. 根据权利要求1所述的一种具有金字塔叠加结构的单晶硅片，其特征在于：所述金字塔单元的底面积为1－500平方微米。
  5. 根据权利要求4所述的一种具有金字塔叠加结构的单晶硅片，其特征在于：所述金字塔单元内包含的金字塔数量为5－500个。
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CN113529173B (zh) * 2021-07-14 2023-07-28 西安蓝桥新能源科技有限公司 制备多层金字塔单晶硅绒面的两步制绒添加剂及其应用
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