WO2021120216A1 - 显示面板及其制作方法和对位方法 - Google Patents

显示面板及其制作方法和对位方法 Download PDF

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Publication number
WO2021120216A1
WO2021120216A1 PCT/CN2019/127177 CN2019127177W WO2021120216A1 WO 2021120216 A1 WO2021120216 A1 WO 2021120216A1 CN 2019127177 W CN2019127177 W CN 2019127177W WO 2021120216 A1 WO2021120216 A1 WO 2021120216A1
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WO
WIPO (PCT)
Prior art keywords
cover plate
base substrate
layer
area
display
Prior art date
Application number
PCT/CN2019/127177
Other languages
English (en)
French (fr)
Inventor
程博
董向丹
颜俊
何帆
刘琦
马宏伟
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/041,080 priority Critical patent/US11737318B2/en
Priority to CN202310278782.4A priority patent/CN116322159A/zh
Priority to CN201980003144.3A priority patent/CN113287198B/zh
Priority to PCT/CN2019/127177 priority patent/WO2021120216A1/zh
Publication of WO2021120216A1 publication Critical patent/WO2021120216A1/zh
Priority to US18/338,517 priority patent/US20230337477A1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/124Insulating layers formed between TFT elements and OLED elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • H10K50/844Encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/87Passivation; Containers; Encapsulations
    • H10K59/871Self-supporting sealing arrangements
    • H10K59/8722Peripheral sealing arrangements, e.g. adhesives, sealants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/87Passivation; Containers; Encapsulations
    • H10K59/873Encapsulations
    • H10K59/8731Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10Substrates, e.g. flexible substrates
    • H10K77/111Flexible substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40OLEDs integrated with touch screens
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/851Division of substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/549Organic PV cells

Definitions

  • the embodiment of the present disclosure relates to a display panel and a manufacturing method and alignment method thereof.
  • OLED Organic Light-Emitting Diode
  • Touch screens are more and more widely used in various portable devices because of their ruggedness, fast response, space saving, and easy communication. It is foreseeable that the touch OLED display obtained by integrating the touch screen and the OLED display will become the mainstream of the market.
  • An embodiment of the present disclosure provides a display panel, which includes a display substrate, an optical adhesive layer, and a cover plate.
  • the display substrate includes a flexible base substrate and includes a plurality of light-emitting devices on the base substrate, a pixel defining layer, and an encapsulation layer, the pixel defining layer separates the plurality of light-emitting devices, and the encapsulation layer Located on the side of the plurality of light-emitting devices away from the base substrate;
  • the optical adhesive layer is located on the side of the packaging layer away from the base substrate;
  • the cover plate is located away from the optical adhesive layer
  • the display panel includes a display area and a frame area located at the periphery of the display area; the frame area includes a dam where the ring-shaped dam is located Glue area and a ring-shaped cutting area on the side of the dam glue away from the display area;
  • the encapsulation layer includes a first inorganic encapsulation layer and
  • At least one of the plurality of cover plate alignment marks overlaps the second inorganic encapsulation layer in a direction perpendicular to the base substrate, and the orthographic projection on the base substrate is located on the dam glue Between the orthographic projection on the base substrate and the display area; and/or, the orthographic projection of at least one of the plurality of cover plate alignment marks on the base substrate is located on the bottom of the dam glue Between the orthographic projection and the cutting area.
  • the at least one orthographic projection on the base substrate is located between the orthographic projection of the dam glue and the cover plate alignment mark and the second inorganic encapsulation layer perpendicular to the There is no overlap in the direction of the base substrate.
  • the at least one orthographic projection on the base substrate is located between the orthographic projection of the dam glue and the cover plate alignment mark and the second inorganic encapsulation layer perpendicular to the The direction of the base substrate at least partially overlaps.
  • the display substrate includes a touch structure
  • the touch structure is located between the encapsulation layer and the optical adhesive layer in a direction perpendicular to the base substrate, and the touch structure includes at least one metal layer,
  • the at least one metal layer includes the cover plate alignment mark.
  • the maximum size of the orthographic projection of the cover plate alignment mark on the base substrate is 150 micrometers to 600 micrometers.
  • the orthographic projection of the cover plate alignment mark on the base substrate includes at least one of a T-shape, a cross-shape and an L-shape.
  • the surface of the display substrate directly bearing the alignment mark of the cover plate is a flat surface.
  • the frame area includes a first frame area and a second frame area that are opposite to each other in a first direction;
  • the display panel further includes a flexible circuit board connected to the second frame area;
  • the first frame area is provided with the at least one cover plate positioned between the dam glue and the display area and overlapped with the second inorganic encapsulation layer in a direction perpendicular to the base substrate.
  • Mark, and/or, the second frame area is provided with the at least one cover plate alignment mark located between the dam glue and the cutting area.
  • the bezel area further includes a third bezel area and a fourth bezel area opposite to each other in a second direction different from the first direction, and the display panel is located between the third bezel area and the fourth bezel area. At least one of them includes a curved portion, and the portion of the cover plate corresponding to the curved portion is curved; the display panel further includes a gate driver located in the third frame area and the fourth frame In at least one of the areas; and the cover plate alignment mark is located outside the third frame area and the fourth frame area.
  • the plurality of cover plate alignment marks includes four cover plate alignment marks, and the four cover plate alignment marks are respectively numbered as a first cover plate alignment mark and a second cover plate alignment mark in a counterclockwise direction.
  • Mark, the third cover plate alignment mark and the fourth cover plate alignment mark, the first cover plate alignment mark and the fourth cover plate alignment mark are located in the first frame area, the second The cover plate alignment mark and the third cover plate alignment mark are located in the second frame area; relative to the axis parallel to the first direction, the first cover plate alignment mark and the second cover plate alignment mark
  • the combination of the cover plate alignment mark and the combination of the third cover plate alignment mark and the fourth cover plate alignment mark are symmetrical to each other.
  • the display substrate further includes an electrode layer extension portion electrically connected to the light emitting device, the electrode layer extension portion is located in the frame region; in a direction perpendicular to the base substrate, the electrode layer The extension part is located between the cover plate alignment mark and the base substrate; the orthographic projection of the electrode layer extension part on the base substrate and the cover plate alignment mark are on the base substrate The orthographic projections overlap.
  • the electrode layer extension includes a stacked first conductive layer and a second conductive layer, the second conductive layer is located on a side of the first conductive layer away from the base substrate, and the second conductive layer
  • the layer has a portion recessed toward the base substrate, the portion is electrically connected to the first conductive layer, and the cover plate alignment mark is located in a recessed area defined by the portion.
  • the second conductive layer includes a first sub-conductive layer, a second sub-conductive layer, and a third sub-conductive layer that are sequentially arranged on the base substrate and connected in parallel;
  • the base substrate is located between the second sub-conductive layer and the base substrate in the direction of the base substrate.
  • the display panel further includes at least one switching element, the switching element includes a gate, a source, and a drain; the light-emitting device includes a first electrode layer and a second electrode layer, and the first conductive layer is connected to the
  • the source and drain electrodes have the same layer and the same material, the second sub-conductive layer and the first electrode layer are the same layer and the same material, and the third sub-conductive layer is the same layer and the same layer as the second electrode layer of the light-emitting device. material.
  • a circuit board alignment mark configured for bending of the flexible circuit board is provided in the second frame area, and the orthographic projection of the circuit board alignment mark on the base substrate is consistent with the The orthographic projections of the cover plate alignment marks on the base substrate are spaced apart; and, the orthographic projection of the circuit board alignment marks on the base substrate has the largest size, and the cover plate alignment marks are located at all The orthographic projection on the base substrate has a maximum size, and the maximum size of the circuit board alignment mark is smaller than the maximum size of the cover plate alignment mark.
  • the cover plate includes a window area located in the display area and a light shielding portion located outside the display area; the orthographic projection of the cover plate alignment mark on the base substrate is located at the light shielding portion In the area where the orthographic projection on the base substrate is located.
  • each cover plate alignment mark is an integrated structure.
  • the cover plate alignment mark is opaque.
  • the material of the cover plate alignment mark is metal.
  • the embodiment of the present disclosure further provides a method for manufacturing a display panel, which includes: forming a pixel defining layer on a flexible base substrate; forming a plurality of light-emitting devices on the base substrate, wherein the pixel defining layer is separated Open the plurality of light-emitting devices; forming an encapsulation layer on the base substrate, wherein the encapsulation layer is located on the side of the plurality of light-emitting devices away from the base substrate, and the encapsulation layer includes The first inorganic encapsulation layer, the first organic encapsulation layer, and the second inorganic encapsulation layer are sequentially arranged in the direction of the base substrate; a plurality of cover plate alignment marks are formed on the base substrate, wherein the plurality The cover plate alignment mark is configured to be used for alignment between the display substrate and the cover plate including the pixel defining layer, the plurality of light emitting devices, the encapsulation layer, and the cover plate alignment mark.
  • the display panel includes a display area and a frame area located at the periphery of the display area.
  • the frame area includes a dam area where the ring-shaped dam is located and a ring-shaped cut area on the side of the dam away from the display area;
  • At least one of the plurality of cover plate alignment marks overlaps the second inorganic encapsulation layer in a direction perpendicular to the base substrate, and the orthographic projection on the base substrate is located on the dam glue
  • the orthographic projection of at least one of the plurality of cover plate alignment marks on the base substrate is located on the dam glue
  • the display substrate is connected to the cover plate, wherein the base substrate included in the display substrate is flat before the display substrate is connected to the cover plate and is connected to the cover plate after the display substrate
  • the back includes the bend.
  • the cover plate includes a window portion located in the display area and a light shielding portion located outside the display area, and the orthographic projection of the cover plate alignment mark on the base substrate is located at the light shielding portion. In the area where the orthographic projection on the base substrate is located.
  • the connecting the display substrate with the cover plate alignment mark formed with the cover plate alignment mark to the cover plate by using the optical adhesive layer includes: irradiating the cover plate and the display substrate with light to realize the display substrate Alignment with the cover.
  • the alignment device when light irradiates the display substrate and the cover plate, the alignment device is used to calculate the center of the display area of the display substrate according to the plurality of cover plate alignment marks, and the alignment device is used according to The edge of the cover window portion calculates the center of the cover window portion; and an alignment device is used to align the center of the display area of the display substrate with the center of the cover window portion to realize the display substrate and the center of the cover window portion. Alignment between covers.
  • the embodiment of the present disclosure also provides an alignment method, which includes: irradiating a display substrate and a cover plate for forming a display panel with light, wherein the display panel has a display area and a frame area located at the periphery of the display area,
  • the display panel includes the display substrate, the cover plate, and an optical adhesive layer connecting the display substrate and the cover plate, the display substrate includes a plurality of cover plate alignment marks, and the cover plate includes The window portion of the display area and the light-shielding portion located in the frame area;
  • the center of the display area of the display substrate is calculated according to the plurality of cover plate alignment marks;
  • the center of the display area of the display substrate is calculated according to the edge of the window portion of the cover plate The center of the window portion of the cover plate; align the center of the display area of the display substrate with the center of the window portion of the cover plate to realize the alignment between the display substrate and the cover plate.
  • the display substrate includes a flexible base substrate and includes a plurality of light-emitting devices on the base substrate, a pixel defining layer, and an encapsulation layer, the pixel defining layer separates the plurality of light-emitting devices, and the encapsulation layer Located on the side of the plurality of light-emitting devices away from the base substrate; the optical adhesive layer is located on the side of the packaging layer away from the base substrate; the cover plate is located away from the optical adhesive layer One side of the display substrate; the encapsulation layer includes a first inorganic encapsulation layer, a first organic encapsulation layer, and a second inorganic encapsulation layer sequentially arranged in a direction away from the base substrate; the frame area includes a ring-shaped The dam rubber area where the dam rubber is located and the annular cutting area on the side of the dam rubber away from the display area; at least one of the plurality of cover plate alignment marks is perpendicular to the second inorganic encapsulation layer Overlap in the
  • the embodiment of the present disclosure also provides a display panel, which includes a display substrate, an optical adhesive layer and a cover plate.
  • the display substrate includes a flexible base substrate and includes a plurality of light-emitting devices on the base substrate, a pixel defining layer, and an encapsulation layer, the pixel defining layer separates the plurality of light-emitting devices, and the encapsulation layer Located on the side of the plurality of light-emitting devices away from the base substrate;
  • the optical adhesive layer is located on the side of the packaging layer away from the base substrate;
  • the cover plate is located away from the optical adhesive layer One side of the display substrate, and is connected to the display substrate through the optical adhesive layer;
  • the packaging layer includes a first inorganic packaging layer and a first organic packaging layer sequentially arranged in a direction away from the base substrate And a second inorganic encapsulation layer;
  • the display substrate further includes a plurality of cover plate alignment marks configured for alignment between the display substrate and the cover plate, and also
  • the display panel includes a display area and a frame area located at the periphery of the display area, and the frame area includes a dam area where a ring-shaped dam is located and a ring-shaped area on the side of the dam away from the display area.
  • the embodiments of the present disclosure can make the cover plate alignment mark have a larger size without increasing the size of the frame area, which facilitates the alignment between the display substrate included in the display panel and the cover plate, thereby improving the alignment accuracy
  • the cover plate alignment mark In order to avoid the phenomenon of blurring the edges of the display area of the display panel, especially the curved display panel (for example, a display panel with a curved edge area), and improve the production efficiency.
  • FIG. 1A is a schematic top view of a display panel provided by an embodiment of the disclosure.
  • 1B is a schematic diagram of the positional relationship of some structures in the display area of the display panel provided by an embodiment of the present disclosure
  • 1C is a schematic diagram of the difference between the upper and lower film layers at the alignment mark of the cover plate in the first frame of the display panel provided by the embodiment of the present disclosure and the film layers at other positions;
  • 1D is a partial cross-sectional view of a part of the structure in the first frame area of the display panel provided by an embodiment of the present disclosure at the line I-I in FIG. 1A;
  • FIG. 1E is a partial cross-sectional schematic diagram 1 of a part of the structure in the second frame area of the display panel provided by an embodiment of the present disclosure at the line II-II in FIG. 1A;
  • 1F is a schematic partial cross-sectional view 2 of a part of the structure in the second frame area of the display panel provided by an embodiment of the present disclosure at the line II-II in FIG. 1A;
  • FIG. 1G is a schematic partial top view of a light emitting device and a pixel defining layer in a display panel provided by an embodiment of the present disclosure
  • 1H is a schematic diagram of the positional relationship among the second electrode layer 122, the cover plate alignment mark, the display area, the recessed area, and the dam rubber area in the display panel provided by an embodiment of the present disclosure;
  • 2A is a schematic top view of the dam glue in the display panel provided by an embodiment of the disclosure including a first dam glue and a second dam glue;
  • 2B is a schematic partial cross-sectional view of a part of the structure in the first frame region of the display panel provided by an embodiment of the disclosure along the line III-III in FIG. 2A;
  • FIG. 3A is a schematic partial cross-sectional view taken along the first direction x in FIG. 1A;
  • 3B is a schematic partial cross-sectional view taken along the second direction y in FIG. 1A;
  • FIG. 4 is a schematic top view of a cover plate in a display panel provided by an embodiment of the disclosure.
  • 5A and 5B are schematic top views of touch electrodes and touch signal lines in a display panel provided by an embodiment of the disclosure.
  • FIG. 6 is a schematic diagram of the alignment device, the display substrate and the cover plate in the embodiment of the disclosure.
  • the inventor of the present application proposes a display panel and a manufacturing method thereof.
  • the display panel includes a display substrate 10, an optical adhesive layer 20 and a cover plate 30.
  • the cover plate 30 is located on a side of the optical adhesive layer 20 away from the display substrate 10, and the cover plate 30 is connected to the display substrate 10 through the optical adhesive layer 20.
  • the display substrate 10 includes a flexible base substrate 11 (not shown in FIG. 1A), and includes a plurality of light-emitting devices 12 (as shown in FIG. 1G) disposed on the base substrate 11, a pixel defining layer PDL, and an encapsulation layer EPL .
  • the pixel defining layer PDL is used to separate the plurality of light-emitting devices 12 (as shown in FIG. 1G), that is, the pixel defining layer PDL is used to define a plurality of sub-pixel regions, and each sub-pixel region is provided with a light-emitting device 12.
  • the display substrate 10 further includes an encapsulation layer EPL, which is located on the side of the plurality of light-emitting devices 12 away from the base substrate 11, and is used to prevent water, oxygen, etc. in the air from corroding the light-emitting devices 12.
  • the encapsulation layer EPL includes a first inorganic encapsulation layer EPL1, a first organic encapsulation layer EPL3, and a second inorganic encapsulation layer EPL2 that are sequentially arranged in a direction away from the base substrate 11 (as shown in FIG. 1B ), that is, the distance from the first inorganic encapsulation layer EPL1, the first organic encapsulation layer EPL3, and the second inorganic encapsulation layer EPL2 to the base substrate 11 gradually increases.
  • the display panel includes a display area (that is, the area enclosed by the dashed line A in Figures 1A, 2A, and 1H) and a border area located around the display area.
  • the border area includes the dam rubber area where the ring-shaped dam rubber 50 is located (ie, the dam rubber area in Figure 1H).
  • the area between the dashed line D and the dashed line E) and the annular cutting area outside the dam glue 50 that is, the cutting area is located on the side of the dam glue 50 away from the display area, that is, the dam glue 50 is on the base substrate 11).
  • the projection is located between the display area and the cutting area).
  • the display substrate 10 further includes a plurality of cover plate alignment marks 14 configured to align between the display substrate 10 and the cover plate 30.
  • the multiple cover plate alignment marks 14 are located in the frame area. By positioning the cover plate alignment mark 14 in the frame area, the cover plate alignment mark 14 can be prevented from affecting the display effect.
  • the orthographic projection of at least one of the plurality of cover plate alignment marks 14 on the base substrate is located between the orthographic projection of the dam glue 50 on the base substrate and the display area, that is, in the dam glue area.
  • the display area (as shown in FIG. 1A) and overlap with the second inorganic encapsulation layer EPL2 in a direction perpendicular to the base substrate 11 (as shown in FIGS.
  • the second inorganic encapsulation layer EPL2 covers the cover plate alignment mark
  • the second inorganic encapsulation layer EPL2 is located at least between the base substrate 11 and the dam area and the display area in the direction perpendicular to the base substrate 11.
  • a cover plate is positioned between the marks 14. That is, in some embodiments, for at least one of the plurality of cover plate alignment marks 14, its orthographic projection on the base substrate is located on the orthographic projection and display of the dam glue 50 on the base substrate.
  • overlap includes full overlap and partial overlap, and also includes covering and being cover).
  • the cover plate alignment mark 14 and the second inorganic encapsulation layer EPL2 overlap in a direction perpendicular to the base substrate 11 (as shown in FIGS. 1F and 2B) or do not overlap (as shown in FIG. 1E).
  • the second inorganic encapsulation layer EPL2 covers all or only part of the cover plate alignment mark.
  • the orthographic projection of at least one of the plurality of cover plate alignment marks 14 on the base substrate is located between the orthographic projection of the dam glue 50 and the cutting area, that is, between the dam glue area and the cutting area. Between the cutting areas.
  • the dam glue 50 is used to prevent the organic material used to form the organic encapsulation layer in the encapsulation layer EPL from flowing to the outside of the dam glue 50 during the process of making the encapsulation layer EPL, and the outside of the dam glue 50 is the dam glue The area between 50 and the edge 11A of the base substrate 11 (as shown in FIG. 1A). Since the dam glue 50 is convex, in order to prevent the shape and size of the cover plate alignment mark 14 from being affected by the dam glue 50, the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 is located on the dam glue 50 on the substrate 11 The orthographic projection on the substrate 11 is outside the area, that is, the cover plate alignment mark 14 is outside the dam rubber area.
  • the cutting area is the area near the edge of the display panel. Since the display panel is obtained by cutting the display panel mother board, the surface of the base substrate 11 caused by cutting is relatively rough near the edge of the display panel. Area, this area is the cutting area. Due to the rough surface of the cutting area, in order to prevent the cutting area from affecting the shape and size of the cover plate alignment mark 14, the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 is located outside the cutting area.
  • the cutting area includes a crack blocking member for preventing cracks from spreading to the display area during the cutting process.
  • the orthographic projection of at least one of the plurality of cover plate alignment marks 14 included in the display substrate 10 is located between the orthographic projection of the dam glue 50 and the display area, and/or the plurality of cover plates are aligned.
  • the orthographic projection of at least one of the marks 14 is located between the orthographic projection of the dam glue 50 and the cutting area, so the cover plate registration mark 14 can be made larger without increasing the size of the frame area, which is convenient for display
  • the alignment between the display substrate 10 and the cover plate 30 included in the panel can improve the alignment accuracy to avoid the phenomenon of blurring the edges of the display area of the display panel, especially the curved display panel (for example, a display panel with a curved edge area). And improve production efficiency.
  • the component A is located on the side of the component B away from the base substrate, which means that the component B is located between the component A and the base substrate in a direction perpendicular to the base substrate.
  • the component C and the component D overlap or overlap in the direction perpendicular to the base substrate 11, which means that the orthographic projection of the component C on the base substrate 11 and the orthographic projection of the component D on the base substrate 11 at least partially overlap. Stacked.
  • the multiple cover alignment marks 14 included in the display substrate 10 include four cover alignment marks 141 to 144, of which two cover alignment marks 141 and 144 are on the base substrate.
  • the orthographic projection is located between the orthographic projection of the dam glue 50 on the base substrate and the display area, and the orthographic projections of the other two cover plate alignment marks 142 and 143 on the base substrate are located in the orthographic projection and cutting area of the dam glue 50 between.
  • the embodiment shown in FIG. 1A takes the display substrate 10 including four cover plate alignment marks 14 as an example for description; in other embodiments, the display substrate 10 may include other number of cover plate alignment marks 14 .
  • the encapsulation layer EPL includes at least two inorganic encapsulation layers and at least one organic encapsulation layer.
  • the inorganic encapsulation layers and the organic encapsulation layers are alternately arranged.
  • the first inorganic encapsulation layer EPL1 and the second inorganic encapsulation layer EPL2 are the outermost inorganic encapsulation layers of the encapsulation layer EPL. For example, as shown in FIG.
  • the encapsulation layer EPL only includes a first inorganic encapsulation layer EPL1 and a second inorganic encapsulation layer EPL2 that are stacked, and a first organic encapsulation layer EPL3 between them, and the first organic encapsulation layer EPL3 It directly contacts the first inorganic encapsulation layer EPL1 and the second inorganic encapsulation layer EPL2.
  • the encapsulation layer EPL includes a second organic encapsulation layer and a third inorganic encapsulation layer in addition to the first inorganic encapsulation layer EPL1, the first organic encapsulation layer EPL3, and the second inorganic encapsulation layer EPL2 that are sequentially arranged, so that the encapsulation layer
  • the EPL includes a first inorganic encapsulation layer EPL1, a second organic encapsulation layer, a third inorganic encapsulation layer, a first organic encapsulation layer EPL3, and a second inorganic encapsulation layer EPL2 that are sequentially stacked, or include a first inorganic encapsulation layer EPL1 that are sequentially stacked.
  • the encapsulation layer EPL may also include more inorganic encapsulation layers and more organic encapsulation layers.
  • the at least one inorganic encapsulation layer included in the encapsulation layer EPL may extend to the area where the dam glue 50 is located (that is, the at least one inorganic encapsulation layer may be perpendicular to the base substrate 11 with the dam glue 50). At least partially overlapped in the direction).
  • the first inorganic encapsulation layer EPL1 and the second inorganic encapsulation layer EPL2 included in the encapsulation layer EPL are both overlapped with the dam glue 50.
  • only the second inorganic encapsulation layer EPL2 and the dam glue 50 may at least partially overlap; or, it may be that the entire encapsulation layer EPL does not overlap the dam glue 50 (that is, the encapsulation layer EPL is on the base substrate 11 The entire orthographic projection of the above is outside the orthographic projection of the dam glue 50 on the base substrate 11).
  • the dam rubber area where the dam rubber 50 is located is provided with a first dam rubber 51 and a second dam rubber 52 (that is, the dam rubber 50) arranged in a direction parallel to the base substrate 11 in sequence.
  • the second dam rubber 52 is farther away from the display area than the first dam rubber 51, and the height of the second dam rubber 52 (that is, the top end of the second dam rubber 52 to the liner.
  • the maximum distance of the base substrate 11 is higher than the height of the first dam rubber 51 (that is, the maximum distance from the top of the first dam rubber 51 to the base substrate 11).
  • the first dam glue 51 includes the portions of the following layers that extend into the frame area: a second planarization insulating layer PLN2, a pixel defining layer PDL, a first inorganic encapsulation layer EPL1, a second inorganic encapsulation layer EPL2, a buffer layer BFL and the second intermediate insulating layer IIL2;
  • the second dam glue 52 includes the part of the following layer structure extending into the frame area: the first planarized insulating layer PLN1, the second planarized insulating layer PLN2, the pixel defining layer PDL, the first The inorganic encapsulation layer EPL1, the second inorganic encapsulation layer EPL2, the buffer layer BFL, and the second intermediate insulating layer IIL2.
  • the dam rubber 50 further includes a recessed structure between the first dam rubber 51 and the second dam rubber 52, and the gap between the first dam rubber 51 and the second dam rubber 52 belongs to, for example, the pixel defining layer PDL and the flattened layered insulating layer.
  • Parts of the organic film layers such as PLN1 and PLN2 are removed as much as possible to form an annular groove region 53, as shown in FIG. 2A.
  • the organic film layers such as the pixel defining layer PDL, the planarization insulating layers PLN1, PLN2, etc. are disconnected (i.e., discontinuous) at the trench region 53.
  • the formed encapsulation layer EPL can effectively block, for example, water vapor or oxygen from penetrating into the light emitting device of the display panel.
  • the dam rubber 50 include, but are not limited to, the embodiments shown in FIG. 2A and FIG. 2B.
  • the base substrate 11 includes a first polyimide layer PI1, a first inorganic layer BR1, a second polyimide layer PI2, and a second inorganic layer BR2 that are sequentially stacked.
  • the base substrate 11 in FIGS. 1B, 1D, and 2B also adopts the same structure as the base substrate 11 shown in FIGS. 1C, 1E, and 1F.
  • the base substrate 11 may also be formed of other materials.
  • the light-emitting device 12 included in the display substrate 10 is a self-luminous device such as an OLED or a quantum dot light-emitting device.
  • the light emitting device 12 is of a top emission type, that is, the light emitted by the light emitting device 12 is emitted in a direction away from the base substrate 11 (as shown by the arrow direction in FIG. 1B).
  • the light emitting device 12 includes a first electrode layer 121, a second electrode layer 122, and a light emitting layer 123 located between the first electrode layer 121 and the second electrode layer 122.
  • the first electrode layer 121 and the second electrode layer 122 One of the two electrode layers 122 is an anode and the other is a cathode.
  • the first electrode layer 121 is the anode and the second electrode layer 122 is the cathode as an example for illustration, that is: as shown in FIG.
  • the light-emitting device 12 includes an anode 121, a light-emitting layer 123, and a cathode 122; In the direction of the base substrate 11, the light-emitting layer 123 is located between the anode 121 and the cathode 122, the anode 121 is located between the light-emitting layer 123 and the base substrate 11, and the cathode 122 is located on the side of the light-emitting layer 123 away from the base substrate 11. In other embodiments, the positions of the anode 121 and the cathode 122 may be interchanged.
  • the cathode 122 of the light emitting device 12 directly contacts the encapsulation layer EPL.
  • both the first electrode layer 121 and the second electrode layer 122 are transparent.
  • the display substrate 10 further includes a switch element 19 which is electrically connected to the light emitting device 12 to control the working state of the light emitting device 12.
  • the switching element 19 is a transistor including an active layer 191, a gate 192, a source 193, and a drain 194.
  • the gate 192 is insulated from the active layer 191 by a gate insulating layer GIL, and the source 193 and the drain 194
  • the gate electrode 192 is insulated by the intermediate insulating layer IIL1, and the source electrode 193 and the drain electrode 194 extend into the through holes penetrating the first gate insulating layer GIL1, the second gate insulating layer GIL2, and the first intermediate insulating layer IIL1 to be electrically connected Active layer 191.
  • each of the plurality of sub-pixel regions included in the display substrate 10 includes a light-emitting device 12 and a switching element 19 electrically connected to the light-emitting device 12; as shown in FIG. 1B, the switching element 19 includes a drain electrode. 194 is electrically connected to the first electrode layer 121 of the light emitting device 12.
  • the first electrode layers 121 of the light-emitting devices 12 in the plurality of sub-pixel regions are disconnected from each other, that is, the first electrode layers 121 located in different sub-pixel regions are disconnected from each other;
  • the second electrode layers 122 of the device 12 are disconnected from each other or directly connected.
  • the light-emitting devices 12 in the plurality of sub-pixel regions share the same second electrode layer 122, as shown in FIG. 1H.
  • the orthographic projection of the edge F of the second electrode layer 122 on the base substrate is located between the display area and the dam area (that is, the edge F is located between the dashed line A and the dashed line D), and the second electrode layer 122 is continuous and covers The entire display area, which can simplify wiring.
  • the display substrate 10 further includes a first planarization insulating layer PLN1 and a second planarization insulating layer PLN2 covering the switching element 19, and the second planarization insulating layer PLN2 is located on the first planarization insulating layer PLN1.
  • the second planarization insulating layer PLN2 On the side away from the base substrate 11, the second planarization insulating layer PLN2 has a substantially flat surface, so that the light emitting layer 123 of the light emitting device 12 is formed on the substantially flat surface.
  • the first electrode layer 121 of the light emitting device 12 extends into the through hole penetrating the second planarization insulating layer PLN2 to electrically connect the connection portion 194A, and the connection portion 194A extends through the first planarization insulating layer PLN1 and the passivation insulating layer.
  • the switching element 19 is electrically connected to the through hole of the PVX, so that the first electrode layer 121 is electrically connected to the switching element 19 through the connection portion 194A.
  • substantially flat here does not require 100% flatness, but means that the surface of the direct bearing cover plate alignment mark 14 is roughly flat, that is, the surface roughness meets the allowable error in the film manufacturing process.
  • the bezel area includes a first bezel area and a second bezel area opposite to each other in a first direction x, and a second bezel area in a second direction y.
  • the third border area and the fourth border area are opposite to each other.
  • the display panel further includes a flexible circuit board 40 connected to the second frame area, and the flexible circuit board 40 is electrically connected to the signal line in the display area to realize signal transmission.
  • the flexible circuit board 40 is electrically connected to the signal line in the display area to realize signal transmission.
  • the lead 70 (the number of the lead 70 can be one or more; the lead 70 does not overlap the cover plate alignment marks 142, 143) drawn from the area where the flexible circuit board 40 is located and the light-emitting device
  • the second electrode layer 122 of 12 (not shown in FIG. 1H) is electrically connected to apply an electrical signal to the second electrode layer 122 through the lead 70.
  • FIG. 1A shows a schematic diagram of the flexible circuit board 40 in an unfolded state; after the product is assembled, the portion of the flexible circuit board 40 located in the circuit board bending area is bent to flex the flexible circuit board. 40 is bent to the back side of the display panel.
  • the embodiment shown in FIG. 1A only takes the planar shape of the display panel as an example for description; in other embodiments, the planar shape of the display panel can be any other desired shapes such as a diamond or a circle.
  • the two side edge regions of the display panel are curved.
  • the display panel in the first direction x, the display panel is flat in the first frame area and the second frame area; in the second direction y, the display panel is flat in the third frame area and The fourth frame area is curved.
  • the display panel in the first direction x, the display panel is flat in at least one of the first bezel area and the second bezel area; in the second direction y, the display panel is flat in the third bezel area and the second bezel area. At least one of the four border areas is curved.
  • the display panel includes the curved portion B in at least one of the third bezel area and the fourth bezel area, and the portion of the cover plate 30 corresponding to the curved portion B is curved, as shown in FIG. 3B.
  • the embodiment shown in FIGS. 3A and 3B only takes as an example that the display panel is curved in the third frame area and the fourth frame area and is flat (non-curved) in the entire display area.
  • the embodiments of the present disclosure include, but are not limited to, the embodiments shown in FIGS. 3A and 3B; for example, it may be that the display panel is curved only at one of the third bezel area and the fourth bezel area.
  • the second bezel area since the second bezel area is located on the side of the display panel where the flexible circuit board 40 is provided, the second bezel area has a larger width (that is, the size along the first direction x), so as to display The signal lines extending from the area directly enter the second frame area to be electrically connected to the flexible circuit board 40, and it is convenient for the signal lines drawn from the third frame area and the fourth frame area to be electrically connected to the flexible circuit board 40 at the second frame area; Moreover, the first frame area opposite to the second frame area also has a larger width (that is, the size along the first direction x), so that the signal line extending from the display area first enters the first frame area, and then After passing through the third frame area or the fourth frame area, it enters the second frame area to be electrically connected to the flexible circuit board 40.
  • the cover plate alignment mark 14 since the cover plate alignment mark 14 is provided in at least one of the first frame area and the second frame area having a larger width, the cover plate alignment mark 14 may have a larger size. In order to improve the recognition of the cover plate alignment mark 14, thereby improving the alignment accuracy.
  • the display panel further includes a gate driver 90 for providing a gate scan signal to the display area, which is located in at least one of the third bezel area and the fourth bezel area. Since the gate driver 90 is provided in the third frame area and/or the fourth frame area, the free space of the third frame area and/or the fourth frame area is small, so the cover plate alignment mark 14 is located in the third frame area and Outside the fourth border area.
  • the alignment device may be used to obtain the center of the display area of the display substrate and the center of the display area of the cover plate to perform alignment between the display substrate and the cover plate.
  • the cover plate 30 includes a transparent window portion 32 located in the display area and a light shielding portion 31 located outside the display area and used to shield the frame area to prevent the structure in the frame area from being seen by the user.
  • the inner edge 31A of the light-shielding portion 31 is located at the position of the edge of the display area; the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 is located on the front of the light-shielding portion 31 on the base substrate 11 In the area where the projection is located.
  • the alignment device can calculate the center of the display area of the display substrate 10 according to the multiple cover alignment marks 14 included in the display substrate 10, and the alignment device can calculate the center of the display area of the display substrate 10 according to the The edge 31A of the display area can calculate the center of the display area of the cover plate 30; the alignment device can realize the distance between the display substrate 10 and the cover plate 30 by aligning the center of the display area of the display substrate 10 with the center of the display area of the cover plate 30.
  • the counterpoint can be used to calculate the center of the display area of the display substrate 10 according to the multiple cover alignment marks 14 included in the display substrate 10
  • the alignment device can calculate the center of the display area of the display substrate 10 according to the
  • the edge 31A of the display area can calculate the center of the display area of the cover plate 30
  • the alignment device can realize the distance between the display substrate 10 and the cover plate 30 by aligning the center of the display area of the display substrate 10 with the center of the display area of the cover plate 30.
  • the counterpoint can be used to calculate the center
  • the shape and contour of the orthographic projection of the plurality of cover plate alignment marks 14 included in the display substrate 10 on the base substrate 11 are consistent.
  • the shape contours of the orthographic projections of the plurality of cover plate alignment marks may be consistent, and the shape and size of the orthographic projections of the plurality of cover plate alignment marks may be consistent.
  • the shape and contour of the orthographic projections of the plurality of cover plate alignment marks may be consistent, and the shape and size of at least part of the cover plate alignment marks may be inconsistent.
  • At least one of the plurality of cover plate alignment marks 14 included in the display substrate 10 is located in the first frame area and at least another is located in the second frame area, that is, the first frame area and the second frame area.
  • Cover plate alignment marks 14 are provided in the frame area.
  • at least one of the plurality of cover plate alignment marks 14 is located in the first frame area and the orthographic projection is located between the orthographic projection of the dam glue 50 and the display area, and the plurality of cover plate pairs
  • At least another of the bit marks 14 is located in the second frame area and the orthographic projection is located between the orthographic projection of the dam rubber 50 and the cutting area.
  • only the first frame area may be provided with at least one cover plate alignment mark 14 whose orthographic projection is located between the orthographic projection of the dam glue 50 and the display area; or, only the second frame may be provided.
  • the area is provided with at least one cover plate alignment mark 14 whose orthographic projection is located between the orthographic projection of the dam rubber 50 and the cutting area.
  • the plurality of cover alignment marks 14 includes four cover alignment marks 141 to 144, and the four cover alignment marks 14 are distributed on the frame near the four corners of the display area.
  • Area; the four cover plate alignment marks 14 in the counterclockwise direction are respectively numbered as the first cover plate alignment mark 141, the second cover plate alignment mark 142, the third cover plate alignment mark 143 and the fourth cover plate Alignment mark 144; the first cover alignment mark 141 and the fourth cover alignment mark 144 are located in the first frame area, and the second cover alignment mark 142 and the third cover alignment mark 143 are located on the second frame In the area; and, relative to an axis parallel to the first direction x (the axis passes through the center of the display area of the display substrate 10 and is parallel to the first direction x, the axis is not shown in the figure), the first cover pair
  • the combination of the position mark 141 and the second cover plate alignment mark 142 and the combination of the third cover plate alignment mark 143 and the fourth cover plate alignment mark 144 are
  • the alignment marks of different cover plates located in the same frame area can be set in the same manner.
  • the first cover plate alignment mark 141 and the fourth cover plate alignment mark 144 located in the first frame area can be arranged in the manner shown in the embodiment shown in FIGS. 1C, 1D, and 2B;
  • Both the second cover plate alignment mark 142 and the third cover plate alignment mark 143 in the zone can be arranged in the manner of the embodiment shown in FIG. 1E and FIG. 1F.
  • the first cover alignment mark 141 and the fourth cover alignment mark 144 are located in the same horizontal direction (see the second direction y in FIG. 1A), and the second cover alignment mark 142 and The third cover alignment mark 143 is located in the same horizontal direction, the first cover alignment mark 141 and the second cover alignment mark 142 are located in the same vertical direction (see the first direction x in FIG. 1A), and The third cover alignment mark 143 and the fourth cover alignment mark 144 are located in the same vertical direction.
  • the display substrate 10 includes At least one of the plurality of cover plate alignment marks 14 (Figure 1A takes cover plate alignment marks 141 and 144 as an example) is located in the first frame area and between the dam glue 50 and the display area.
  • Figure 1A takes cover plate alignment marks 141 and 144 as an example
  • the cover plate alignment mark 14 located in the first frame area and between the dam glue 50 and the display area (for example, the cover plate in FIG. 1A)
  • At least one of the alignment marks 141 and 144 is located on the side of the packaging layer EPL away from the base substrate 11.
  • the portion of the encapsulation layer EPL that overlaps the cover plate alignment mark 14 does not include the first organic encapsulation layer EPL3.
  • the multiple covers At least another of the plate alignment marks 14 (FIG. 1A takes the cover plate alignment marks 142 and 143 as an example) is located in the second frame area and between the dam glue 50 and the cutting area.
  • the entire encapsulation layer EPL does not exceed the dam glue 50, and, as shown in FIG. 1E, the cover plate located in the second frame area and between the dam glue 50 and the cutting area
  • the alignment mark 14 (for example, at least one of the cover alignment marks 142 and 143 in FIG.
  • At least one cover plate alignment mark 14 located between the dam glue 50 and the cutting area and the second inorganic encapsulation layer EPL2 at least partially overlap in a direction perpendicular to the base substrate 11.
  • the second inorganic encapsulation layer EPL2 included in the encapsulation layer EPL exceeds the dam glue 50, and, as shown in FIG. 1F, is located in the second frame area and between the dam glue 50 and the cutting area.
  • the cover plate alignment mark 14 overlaps the second inorganic encapsulation layer EPL2 and is located on a side of the second inorganic encapsulation layer EPL2 away from the base substrate 11.
  • the encapsulation layer EPL includes a second inorganic encapsulation layer EPL2 that exceeds the dam glue 50, and is located in the second frame area and is located between the dam glue 50 and the cutting area.
  • the position mark 14 overlaps the pixel defining layer PDL and the second inorganic encapsulation layer EPL2 and is located on the opposite side of the second inorganic encapsulation layer EPL2 from the base substrate 11 One side.
  • the entire cover plate alignment mark 14 located in the second frame area and between the dam rubber area and the cutting area where the dam rubber 50 is located overlaps with the second inorganic encapsulation layer EPL2 (that is, completely overlaps).
  • the description will be given as an example without overlapping with the pixel defining layer PDL.
  • a part of the cover plate alignment mark 14 overlaps the second inorganic encapsulation layer EPL2 and another part does not overlap the second inorganic encapsulation layer EPL2 (that is, the cover plate alignment mark 14 overlaps with the second inorganic encapsulation layer EPL2).
  • the second inorganic encapsulation layer EPL2 only partially overlaps) and overlaps or does not overlap with the pixel defining layer PDL.
  • At least one of the cover plate alignment marks 14 whose orthographic projection on the base substrate 11 is located between the dam rubber area and the cutting area, and the second inorganic encapsulation layer EPL2 and the pixel defining layer PDL are both It does not overlap and is located on the side of the buffer layer BFL included in the touch structure 15 (as shown in FIG. 1B) away from the base substrate 11.
  • At least one cover plate alignment mark 14 whose orthographic projection on the base substrate 11 is located between the dam glue area and the cutting area (as shown in FIG. 1A), it is connected to the second inorganic encapsulation layer EPL2 There is no overlap or at least partial overlap in the direction perpendicular to the base substrate 11 (it is located on the side of the second inorganic encapsulation layer EPL2 facing the base substrate 11 or located away from the base substrate 11 of the second inorganic encapsulation layer EPL2 And/or, for the at least one cover plate alignment mark 14 whose orthographic projection on the base substrate 11 is located between the dam rubber area and the cutting area (as shown in FIG. 1A), it is at The direction perpendicular to the base substrate 11 at least partially overlaps the pixel defining layer PDL and is located on a side of the pixel defining layer PDL away from the base substrate 11, or no overlap.
  • the cover plate alignment mark 14 is formed on a flat surface, that is, the surface of the display substrate 10 that directly carries the cover plate alignment mark 14 is a flat surface.
  • the surface directly bearing the cover plate alignment mark 14 is A part of the surface of the buffer layer BFL facing away from the base substrate 11 (ie, the upper surface), and the part of the surface of the buffer layer BFL is flat.
  • the second frame area for example, between the dam glue 50 and the cutting area as shown in FIG.
  • the surface directly bearing the cover plate alignment mark 14 is the buffer layer BFL A part of the surface facing away from the base substrate 11, and the part of the surface of the buffer layer BFL is flat.
  • the surface directly bearing the alignment mark 14 of the cover plate is a flat surface, it is beneficial to improve the alignment accuracy.
  • “the surface directly bearing the cover plate alignment mark 14” means that the surface is located between the base substrate 11 and the cover plate alignment mark 14 in a direction perpendicular to the base substrate 11, and the surface Directly touch the cover plate registration mark 14.
  • “flat” here does not require 100% flatness, but means that the surface of the direct bearing cover plate alignment mark 14 is roughly flat, that is, the surface roughness meets the allowable error in the film manufacturing process.
  • the display panel may also include alignment marks for other purposes.
  • the cover alignment mark 14 is the largest size alignment mark, and the maximum size of the cover alignment mark 14 is much larger than the maximum size of the alignment marks for other purposes. This is beneficial to improve the ability of the alignment device to recognize the alignment mark of the cover plate.
  • a circuit board alignment mark 41 is provided in the second frame area (in FIG. 1A, two circuit board alignment marks 41 are taken as an example. In other embodiments, the number of circuit board alignment marks It can also be one or more), the circuit board alignment mark 41 is used for alignment during the bending of the flexible circuit board 40, so that the flexible circuit board 40 is bent according to a set degree of bending.
  • the orthographic projection of the circuit board alignment mark 41 on the base substrate 11 and the orthographic projection of the cover alignment mark 14 on the base substrate 11 are spaced apart (for example, the circuit board alignment mark 41 is located on the cover alignment mark 14 The side close to the edge 11A of the base substrate 11), and the maximum size of the orthographic projection of the circuit board alignment mark 41 on the base substrate 11 is smaller than that of the orthographic projection of the cover alignment mark 14 on the base substrate 11 biggest size. Since the circuit board alignment mark 41 is spaced from the cover alignment mark 14 and the size of the circuit board alignment mark 41 is smaller than the size of the cover alignment mark 14, the circuit board alignment mark 41 can be prevented from affecting the display substrate 10 and the cover Alignment between the plates 30.
  • the maximum size of the orthographic projection refers to the largest size among the dimensions of the outline of the orthographic projection in all directions, that is, the maximum distance between two points on the orthographic projection.
  • the circuit board alignment mark 41 and the cover plate alignment mark 14 may adopt the same shape (that is, the shape of the outline is the same), or may adopt different shapes.
  • each cover plate alignment mark 14 is an integrated structure.
  • the circuit board alignment mark 41 is also an integrated structure. Taking the cover plate alignment mark 14 and the circuit board alignment mark 41 as an integrated structure as an example, as shown in FIG. 1A, the orthographic projection of each cover plate alignment mark 14 on the base substrate includes a first direction The first extension portion extending x and the second extension portion extending along the second direction y, the first extension portion and the second extension portion are directly connected, and the maximum dimension of the second extension portion in the second direction y is the pair of cover plates The maximum size of the orthographic projection of the position mark 14; similarly, the circuit board alignment mark 41 also includes a first extension portion extending along the first direction x and a second extension portion extending along the second direction y, the first extension portion and The second extension is directly connected, and the maximum size of the second extension in the second direction y is the maximum size of the orthographic projection of the circuit board alignment mark 41; and the maximum size of the second extension of the cover alignment mark 14 The size is larger than the maximum size of the
  • each extension of the cover plate alignment mark 14 is a continuous structure without a closed opening, so that the entire orthographic projection of the cover plate alignment mark 14 is also a continuous structure without a closed opening.
  • each extension of the circuit board alignment mark 41 is a continuous structure without a closed opening, so the orthographic projection of the entire circuit board alignment mark 41 is also a continuous structure without a closed opening.
  • the maximum size of the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 is about 150 micrometers to 600 micrometers, for example, 300 micrometers to 500 micrometers.
  • each cover plate alignment mark 14 in FIG. 1A has a maximum size in the second direction y, and the maximum size is about 150 to 600 microns, such as 300 to 500 microns, for example, the maximum size is about 150 Micrometers, 200 micrometers, 250 micrometers, 300 micrometers, 350 micrometers, 400 micrometers, 450 micrometers, 500 micrometers, 550 micrometers, or 600 micrometers.
  • the cover plate registration mark 14 By making the cover plate registration mark 14 have a larger size, it is advantageous for the registration device to recognize the cover plate registration mark 14 so as to improve the registration accuracy.
  • the "about” here refers to within the tolerance of the manufacturing process.
  • the maximum design size of the cover plate alignment mark 14 is d, and the range of d is 150 microns to 600 microns (for example, 300 microns to 500 microns).
  • the manufactured cover plate alignment mark 14 The actual maximum size may slightly deviate from the maximum design size, and the difference between the actual maximum size and the maximum design size of the cover plate alignment mark 14 in the embodiment of the present disclosure meets the requirements of the allowable error range.
  • the allowable error range can be set according to actual needs, and will not be repeated here.
  • the largest dimension of the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 in the first direction x is also on the order of hundreds of microns, such as about 150 to 600 microns, for example, about 300-500 microns, and the cover
  • the size of the orthographic projection of the alignment mark 14 in the first direction x is smaller than its size in the second direction y, so as to further improve the recognizability of the cover plate alignment mark 14, thereby further improving the alignment accuracy.
  • the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 includes at least one of a T shape (as shown in FIG. 1A), a cross shape and an L shape, or the orthographic projection of the cover plate alignment mark 14 is Any other easily recognizable shape.
  • the shape of the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 is an integrated structure, such as a T-shaped, cross-shaped, or L-shaped structure; in other embodiments, the cover plate alignment mark
  • the shape of the orthographic projection of 14 on the base substrate 11 may also include a plurality of discrete parts.
  • the orthographic projection of the alignment mark 14 includes a plurality of spaced apart concentric circles.
  • the embodiments of the present disclosure include, but are not limited to, the listed shapes.
  • the alignment device can be used to perform alignment under light conditions.
  • the cover plate alignment mark 14 is opaque.
  • the material of the cover plate alignment mark 14 is an opaque metal, so that the cover plate alignment mark 14 is opaque.
  • non-metallic opaque materials may also be used to make the cover plate alignment mark 14.
  • the cover plate alignment mark 14 when the cover plate alignment mark 14 is made of metal, the original metal layer of the display substrate can be used to make the cover plate alignment mark 14 to simplify the manufacturing process.
  • the display panel has a touch structure to realize the touch function, and the touch structure includes a metal layer. Therefore, the cover plate alignment mark 14 can be made of the material used to form the metal layer.
  • the touch structure included in the display substrate will be exemplified below with reference to FIGS. 1B, 5A, and 5B.
  • the display substrate 10 includes a touch structure 15, and the touch structure 15 is located between the packaging layer EPL and the optical adhesive layer 20 in a direction perpendicular to the base substrate 11.
  • the display panel can be fabricated in the following manner: the buffer layer BF, the switching element 19, the first planarization insulating layer PLN1, the second planarization insulating layer PLN2, and the light emitting are sequentially fabricated on the base substrate 11.
  • the touch structure 15 is fabricated on the base substrate 11 on which the encapsulation layer EPL is formed, and then the display substrate 10 with the touch structure 15 and the cover plate 30 are pasted together through the optical adhesive layer 20 .
  • the touch structure 15 is formed in the display substrate 10, which can greatly reduce The cost can make the display panel more integrated and make the display panel thinner and easier to fold.
  • the touch structure 15 includes at least one metal layer, and the at least one metal layer includes the cover plate alignment mark 14.
  • the cover plate alignment mark 14 By locating the cover plate alignment mark 14 in the metal layer included in the touch structure 15, the manufacturing process can be simplified; in addition, since the touch structure 15 is located between the encapsulation layer EPL and the optical adhesive layer 20, the touch structure 15 includes The metal layer includes the cover plate alignment mark 14, so there is no need to increase the size of the frame area, which is beneficial to realize a narrow frame design.
  • other alignment marks included in the display substrate 10 can also be made from the original metal layer of the display substrate; for example, due to other alignment marks included in the display substrate 10
  • the size of the mark is small, so the alignment mark can be made of the metal layer forming material included in the switch element 19 or the light emitting device 12 without increasing the space of the frame area.
  • the orthographic projection of the cover plate alignment mark 14 on the base substrate 11 is separated from the orthographic projection of other alignment marks on the base substrate 11 to prevent other alignment marks from affecting the display substrate 10 and the cover plate. Counterpoint between 30.
  • the touch structure 15 includes two conductive layers 15A and 15B separated by an intermediate insulating layer IIL2, and the conductive layer 15B is located between the conductive layer 15A and the base substrate in a direction perpendicular to the base substrate 11. Between 11; one of the two conductive layers 15A and 15B is an opaque metal layer and the other is a transparent conductive layer or both conductive layers are opaque metal layers.
  • the conductive layer 15A is a metal layer and includes the cover plate alignment mark 14. Since the conductive layer 15A is closer to the cover plate 30 than the conductive layer 15B, the cover plate alignment mark 14 is located in the conductive layer 15A to improve the alignment accuracy.
  • the conductive layer 15B can also include the cover plate alignment mark 14.
  • the combination of the two conductive layers 15A and 15B includes multiple columns of first touch electrodes 151A and multiple rows of second touch electrodes 151B, and multiple touch signal lines 152A, 152a, and 152B.
  • One touch electrode 151A intersects the extension direction of the second touch electrode 151B, and both the first touch electrode 151A and the second touch electrode 151B are electrically connected to their respective corresponding touch signal lines.
  • the end of each first touch electrode 151A adjacent to the second frame area is electrically connected to the touch signal line 152a directly extending to the second frame area, and the end of each first touch electrode 151A adjacent to the first frame area is electrically connected.
  • the end is electrically connected to the touch signal line 152A directly extending to the first frame area.
  • the touch signal line 152A enters the third frame area from the first frame area and then enters the second frame area; each second touch electrode 151B
  • the end adjacent to the fourth frame area is electrically connected to the touch signal line 152B directly extending to the fourth frame area. Since both ends of the first touch electrode 151A are electrically connected to the touch signal line, the impedance of the first touch electrode can be reduced.
  • the touch electrode and the touch signal line included in the touch structure 15 are located in the same conductive layer and have the same material (that is, the touch electrode and the touch signal line are formed by the same conductive film).
  • the same conductive layer is a metal layer.
  • the touch structure 15 includes a plurality of touch electrodes 151 arranged in a matrix and includes a plurality of touch signal lines 152, and each touch electrode 151 is electrically connected to a corresponding touch signal line 152.
  • the touch electrode 151 and the touch signal line 152 in FIG. 5B are located in the same conductive layer.
  • the touch electrodes are located in the display area, in order to avoid affecting the display, for example, the touch electrodes mainly use ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) and other transparent conductive materials, or the touch electrode is made of a metal material in a grid shape (as shown in FIG. 5B, the touch electrode 151 has a grid structure). Because the touch signal lines (see the touch signal lines 152A, 152a, and 152B in FIG. 5A) are located in the border area or because the touch signal lines (see the touch signal line 152 in FIG. 5B) are located in the display area and emit light adjacently In the area between the units 12, the display is not affected, so the touch signal line is made of, for example, a metal material to reduce resistance.
  • ITO Indium Tin Oxide
  • IZO Indium Zinc Oxide
  • FIGS. 5A and 5B are only for illustration, and the arrangement of touch electrodes and touch signal lines includes but is not limited to the embodiments shown in FIGS. 5A and 5B.
  • the touch structure 15 further includes a buffer layer BFL.
  • the buffer layer BFL is silicon oxynitride or other similar inorganic insulating layers.
  • the touch structure 15 further includes a protective layer PL, which is located between the conductive layer 15A and the optical adhesive layer 20 to protect the conductive layer 15A.
  • a protective layer PL which is located between the conductive layer 15A and the optical adhesive layer 20 to protect the conductive layer 15A.
  • the display substrate 10 further includes an electrode layer extension 17 electrically connected to the light emitting device 12, and the electrode layer extension 17 is located in the frame area.
  • the electrode layer extension 17 is electrically connected to the second electrode layer 122 (for example, the cathode) of the light emitting device 12, and the electrode layer extension 17 is also electrically connected to the lead 70 (as shown in FIG. 1H), so the second electrode layer 122 of the light emitting device 12
  • the electrode layer 122 is electrically connected to the lead 70 through the electrode layer extension 17.
  • the electrode layer extension 17 is located between the cover plate alignment mark 14 (see FIGS.
  • the cover plate alignment mark 14 in the first frame area is arranged on the side of the electrode layer extension 17 away from the base substrate 11, so that the first frame can be fully utilized. There is no need to increase the size of the frame area (that is, it is beneficial to realize a narrow frame design).
  • the electrode layer extension 17 includes a stacked first conductive layer 171 and a second conductive layer 172, and the second conductive layer 172 is located on a side of the first conductive layer 171 away from the base substrate 11.
  • the second conductive layer 172 has a recessed portion toward the base substrate 11 relative to at least part of the structure such as the pixel defining layer PDL, the first planarization insulating layer PLN1, and the second planarization insulating layer PLN2.
  • the structure such as the pixel defining layer PDL, the first planarization insulating layer PLN1, and the second planarization insulating layer PLN2.
  • the first sub-conductive layer 172A, the second sub-conductive layer 172B, and the third sub-conductive layer 172C included in the second conductive layer 172 all include a second planarization insulating layer PLN2 and a pixel defining layer.
  • the PDL is recessed toward the portion of the base substrate 11.
  • the second conductive layer 172 includes a first sub-conductive layer 172A, a second sub-conductive layer 172B, and a third sub-conductive layer 172C.
  • the insulating layer PLN2 and the pixel defining layer PDL are recessed toward the base substrate 11.
  • the second conductive layer 172 is electrically connected to the first conductive layer 171 at the recessed area 170, and the cover plate alignment mark 14 is located in the recessed area 170 defined by the second conductive layer 172 (between the dashed line B and the dashed line C in FIG. 1H).
  • the orthographic projection of the recessed area 170 on the base substrate is a closed ring structure located between the display area and the orthographic projection of the edge F of the second electrode layer 122.
  • the first conductive layer 171 extends to the side of the second dam glue 52 away from the first dam glue 51, and both the first sub-conductive layer 172A and the second sub-conductive layer 172B extend to the display substrate 10.
  • the third sub-conductive layer 172C extends to the side of the first dam rubber 51 away from the second dam rubber 52; in this case, for example, lead from the flexible circuit board 40
  • the lead 70 (as shown in FIG. 1H) directly contacts the first conductive layer 171, so that the lead 70 is electrically connected to the second electrode layer 122 of the light emitting device 12 through the electrode layer extension portion 17.
  • the lead 70 may also directly contact the first sub-conductive layer 172A and/or the second sub-conductive layer 172B, so that the lead 70 is electrically connected to the second electrode layer 122 of the light emitting device 12 through the electrode layer extension 17.
  • the first planarization insulating layer PLN1, the second planarization insulating layer PLN2, and the pixel defining layer PDL extend into the bezel area and are disconnected at the recessed area 170, so that the first conductive layer 171 and The second conductive layer 172 overlaps and is electrically connected (for example, in direct contact) at the recessed area 170.
  • the electrode layer extension 17 include the first conductive layer 171 and the second conductive layer 172 connected in parallel, the electrode layer extension can be reduced.
  • the resistance of the portion 17; by setting the cover plate alignment mark 14 in the recessed area 170 it is possible to avoid increasing the thickness of the display substrate at the recessed area 170, thereby facilitating the realization of the thinner and lighter display panel.
  • FIG. 2B only shows a partial cross-sectional view of the recessed area 170.
  • the second conductive layer 172 includes a plurality of sub-conductive layers connected in parallel (for example, portions of the plurality of sub-conductive layers located at the entire recessed area 170 are connected in parallel with each other).
  • the multiple parallel conductive sub-layers include a first conductive sub-layer 172A, a second conductive sub-layer 172B, and a third conductive sub-layer 172C that are sequentially stacked on the base substrate 11.
  • the first conductive sub-layer 172A is in the recessed area.
  • the area 170 directly contacts the second sub-conductive layer 172B and the second sub-conductive layer 172B directly contacts the third sub-conductive layer 172C at the recessed area 170, so as to realize the parallel connection between the three sub-conductive layers; and the first sub-conductive layer is conductive
  • the layer 172A is located between the second sub-conductive layer 172B and the base substrate 11 in a direction perpendicular to the base substrate 11.
  • the first source/drain electrode layer 1710 where the first conductive layer 171 (not shown in FIG. 1B) is located includes the source electrode 193 and the drain electrode 194 of the switching element 19, that is, the first source/drain electrode layer.
  • the electrode layer 1710 includes a first conductive layer 171, a source electrode 193 and a drain electrode 194.
  • the second source/drain electrode layer 1721 where the first sub-conductive layer 172A (not shown in FIG. 1B) is located includes the connecting portion 194A (that is, the second source/drain electrode layer 1721 includes the first sub-layer).
  • the conductive layer 172A and the connecting portion 194A), the connecting portion 194A is located between the first source/drain electrode layer 1710 and the first electrode layer 121 in a direction perpendicular to the base substrate 11, and the connecting portion 194A connects the drain 194 and the first electrode layer 121
  • One electrode layer 121 is electrically connected together, which is beneficial to make a good electrical connection between the drain electrode 194 and the first electrode layer 121 (for example, the anode) of the light emitting device 12.
  • the electrode layer 1722 where the second sub-conductive layer 172B (not shown in FIG.
  • the electrode layer 1723 where the third sub-conductive layer 172C (not shown in FIG. 1B) is located includes the second electrode layer 122 (for example, the cathode) of the light-emitting device 12, that is, the electrode layer 1723 includes the third sub-layer.
  • the conductive layer 172C and the second electrode layer 122, for example, the third sub-conductive layer 172C and the second electrode layer 122 are directly connected.
  • the first conductive layer 171 is the same layer and the same material as the source 193 and the drain 194, and the first conductive layer 171 is electrically insulated from the source 193/drain 194; the second sub-conductive layer 172B and the light emitting device 12
  • the first electrode layer 121 has the same layer and the same material, and the second sub-conductive layer 172B is electrically insulated from the first electrode layer 121; the third sub-conductive layer 172C is the same layer and the same material as the second electrode layer 122 of the light emitting device 12, and the third The sub-conductive layer 172C is electrically connected to the second electrode layer 122 of the light emitting device 12 (for example, the third sub-conductive layer 172C is directly connected to the second electrode layer 122).
  • the electrode layer extension 17 is formed by using the portion of the electrode layer in the display area that extends into the frame area, so that the manufacturing process of the display panel can be simplified.
  • multiple components with the same layer and the same material means that the multiple components are formed by the same film in the same patterning process; and, the multiple components may be located side by side on the same layer, or the multiple components There is a height difference (that is, the distances from the plurality of components to the base substrate 11 are different), or at least one of the plurality of components has a convex portion or a concave portion.
  • the width of the second frame area is greater than the width of the first frame area, that is, the size of the second frame area along the first direction x is greater than the size of the first frame area along the first direction x,
  • the following structures are sequentially provided on the base substrate 11: a buffer layer BF, an active layer 191, a first gate insulating layer GIL1, a gate electrode 192, The second gate insulating layer GIL2, the first intermediate insulating layer IIL1, the first source/drain electrode layer 1710 including the source electrode 193 and the drain electrode 194 (for example, the first source/drain electrode layer 1710 further includes the first conductive layer 171) , The passivation insulating layer PVX, the first planarization insulating layer PLN1, the second source/drain electrode layer 1721 including the connection portion 194A (for example, the second source/drain electrode layer 1721 also includes the first sub-conductive layer 172A), the second The second planarization insulating layer PLN2, the first electrode layer 121 (for example, the electrode layer 1722 where the first electrode layer 121 is located also includes the second sub-conductive layer 172B), the pixel
  • the organic encapsulation layer EPL3, for example, does not overlap the cover plate alignment mark 14) and the touch structure 15 (which, for example, includes the buffer layer BFL, the conductive layer 15B, the second intermediate insulating layer IIL2, the conductive layer 15A, and the protective layer PL, the conductive layer
  • the layer where 15B is located and/or the layer where the conductive layer 15A is located includes, for example, a plurality of discrete cover plate alignment marks 14).
  • the display panel may not include some of the above-mentioned structures, or may further include other structures on the basis of the above-mentioned structure, or the positional relationship of the above-mentioned structures in the display panel may be changed.
  • the display panel includes a display substrate 10, an optical adhesive layer 20 and a cover plate 30.
  • the cover plate is located on the side of the optical adhesive layer 20 away from the display substrate 10 and is connected to the display substrate 10 through the optical adhesive layer 20.
  • the display substrate 10 includes a flexible base substrate 11 and includes a plurality of light emitting devices 12 on the base substrate 11 (FIG. 1B only shows one light emitting device 12 for illustration), a pixel defining layer PDL, and The encapsulation layer EPL, the pixel defining layer PDL separate the plurality of light emitting devices 12, and the encapsulation layer EPL is located on the side of the plurality of light emitting devices 12 away from the base substrate 11.
  • An optical glue layer 20 is provided on the side of the encapsulation layer EPL facing away from the base substrate 11.
  • the encapsulation layer EPL includes a first inorganic encapsulation layer EPL1, a first organic encapsulation layer EPL3, and a second inorganic encapsulation layer EPL2 that are sequentially arranged in a direction away from the base substrate 11.
  • the display substrate 10 further includes a plurality of cover plate alignment marks 14 configured to align between the display substrate 10 and the cover plate 30.
  • the display substrate 10 further includes a touch structure 15, which is located between the encapsulation layer EPL and the optical adhesive layer 20 in a direction perpendicular to the base substrate 11.
  • the touch structure 15 includes at least one metal layer ( Figure 1B with two Take two metal layers 15A and 15B as an example for description), the at least one metal layer includes a cover plate alignment mark, and the cover plate alignment mark is, for example, the cover plate alignment in any one of the embodiments of FIGS. 1A, 1C to 2B Mark 14. That is, the at least one metal layer included in the touch structure 15 includes touch electrodes and touch signal lines, and at least one of the touch electrodes and the touch signal lines is the same layer and the same material as the cover plate alignment mark 14, namely It is formed by the same film.
  • the description of the touch electrodes and the touch signal lines please refer to the descriptions in the above embodiments, and the repetitive parts will not be repeated here.
  • the cover plate alignment marks 14 included in the display substrate 10 are located in at least one metal layer included in the touch structure, the cover plate can be aligned without increasing the size of the frame area.
  • the mark 14 has a relatively large size, which facilitates the alignment between the display substrate 10 and the cover plate 30 included in the display panel, thereby improving the alignment accuracy and avoiding the display panel, especially the curved display panel (for example, a display panel with a curved edge area). Panel) has the phenomenon of blurring the edges of the display area, and improves production efficiency.
  • the display panel includes a display area and a frame area located at the periphery of the display area.
  • the frame area includes an annular dam rubber 50 and a ring-shaped cutting area outside the dam rubber 50.
  • the orthographic projection of at least one of the plurality of cover plate alignment marks 14 included in the display substrate 10 on the base substrate 11 is located between the orthographic projection of the dam glue 50 on the base substrate 11 and the display area and is connected to the second inorganic package
  • the layer EPL2 overlaps in a direction perpendicular to the base substrate 11, and/or, at least one of the plurality of cover plate alignment marks 14 is located between the orthographic projection of the dam glue 50 and the cutting area.
  • the embodiments of the present disclosure also provide a method for manufacturing the display panel provided by any of the above embodiments. Taking the display panel shown in FIGS. 1A to 3B as an example, the manufacturing method includes the following steps.
  • Step S1 forming a pixel defining layer PDL on the flexible base substrate 11.
  • Step S2 forming a plurality of light-emitting devices 12 on the base substrate 11 (FIG. 1B only shows one light-emitting device 12 for illustration), so that the pixel defining layer PDL separates the plurality of light-emitting devices 12.
  • Step S3 An encapsulation layer EPL is formed on the base substrate 11, so that the encapsulation layer EPL is located on the side of the light emitting device 12 away from the base substrate 11, and the encapsulation layer EPL includes first layers arranged in a direction away from the base substrate 11.
  • Step S4 forming a plurality of cover plate alignment marks 14 on the base substrate 11, wherein the plurality of cover plate alignment marks 14 are configured to include a pixel defining layer PDL, a light emitting device 12, an encapsulation layer EPL, and a cover
  • the frame area includes a dam glue 50 and a side of the dam glue 50 away from the display area.
  • An annular cutting area; the orthographic projection of at least one of the plurality of cover plate alignment marks 14 on the base substrate 11 is located between the orthographic projection of the dam glue on the base substrate 11 and the display area and is connected to the second inorganic package
  • the layer EPL2 overlaps in a direction perpendicular to the base substrate 11, and/or, at least one of the plurality of cover plate alignment marks 14 is located between the orthographic projection of the dam glue 50 and the cutting area.
  • Step S5 forming the optical adhesive layer 20 on the side of the cover plate alignment mark 14 away from the base substrate 11.
  • Step S6 Use the optical adhesive layer 20 to connect the display substrate 10 formed with the cover plate alignment mark 14 and the cover plate 30, wherein the base substrate 11 included in the display substrate 10 is roughly the same before the display substrate 10 and the cover plate 30 are connected It is flat and includes a bent portion B after the display substrate 10 is connected to the cover plate 30 (as shown in FIG. 3B).
  • the cover plate 30 includes a light-shielding portion 31 (that is, the light-shielding portion 31 is located in the frame area) where the window portion 32 located in the display area is located outside the display area, and the cover plate alignment mark 14 is on the base substrate 11.
  • the orthographic projection of is located in the area where the orthographic projection of the shading portion 31 on the base substrate 11 is located.
  • using the optical adhesive layer 20 to connect the display substrate 10 with the cover plate alignment mark 14 and the cover plate 30 includes: as shown in FIG. 6, when the cover plate 30 and the display substrate 10 are irradiated with light , The display substrate 10 and the cover 30 are aligned with the cover plate alignment mark 14 and the light shielding portion 31.
  • the alignment device 80 can calculate the center of the display area of the display substrate 10 according to the plurality of cover plate alignment marks 14 included in the display substrate 10, and the alignment The device 80 can calculate the center of the window portion 32 of the cover 30 according to the inner edge 31A of the light shielding portion 31 in the cover 30 (that is, the edge of the display area); the alignment device 80 compares the center of the display area of the display substrate 10 with The center of the window portion 32 of the cover plate 30 can be aligned to realize the alignment between the display substrate 10 and the cover plate 30; and, during the alignment process, the display substrate 10 and the cover plate 30 are connected together by the optical adhesive layer 20 .
  • the manufacturing method of the display substrate 10 includes: sequentially forming a switching element 19, a first planarization insulating layer PLN1, and a second insulating layer on the base substrate 11.
  • the light emitting device 12 for example, the light emitting device 12 is formed by an evaporation process
  • the packaging layer EPL a touch structure 15 is formed on the side of the packaging layer EPL away from the base substrate 11.
  • the touch structure 15 is formed in the display substrate 10, which can greatly reduce The cost can make the display panel more integrated and make the display panel thinner and easier to fold.
  • forming the touch structure 15 includes forming a conductive layer 15B, an intermediate insulating layer IIL2, and a conductive layer 15A sequentially stacked on the encapsulation layer EPL.
  • the combination of the conductive layer 15B and the conductive layer 15A includes a pair of cover plates.
  • the conductive layer 15A is a metal layer and includes the cover plate alignment mark 14. Since the conductive layer 15A is closer to the cover plate 30 than the conductive layer 15B, the cover plate alignment mark 14 is located in the conductive layer 15A to improve the alignment accuracy.
  • forming the touch structure 15 further includes: directly forming the conductive layer 15B on the buffer layer BFL located on the encapsulation layer EPL, and forming the protective layer PL covering the conductive layer 15A after the conductive layer 15A is formed.
  • the touch structure 15 includes forming a conductive layer, the conductive layer is a metal layer, and the conductive layer includes a cover plate alignment mark 14, a touch electrode (see 151 in FIG. 5B) and a touch Control signal line (see 152 in Figure 5B).
  • the embodiments of the present disclosure include, but are not limited to, the listed embodiments.
  • the manufacturing method of the display panel shown in FIGS. 1A to 3B includes: sequentially forming the following structures on the base substrate 11: the switching element 19 (for example, the switching element 19 includes the source electrode 193 and the drain electrode 194).
  • a source/drain electrode layer 1710 further includes a first conductive layer 171), a passivation insulating layer PVX, a first planarization insulating layer PLN1, and a second source/drain electrode layer 1721 (for example, a second source/drain electrode layer 1721) including a connection portion 194A.
  • the drain electrode layer 1721 further includes a first sub-conductive layer 172A), a second planarization insulating layer PLN2, a first electrode layer 121 (for example, the electrode layer 1722 where the first electrode layer 121 is located also includes a second sub-conductive layer 172B), and a pixel
  • the defining layer PDL, the light-emitting layer 123, the second electrode layer 122 (for example, the electrode layer 1723 where the second electrode layer 122 is located further includes a third sub-conductive layer 172C), the encapsulation layer EPL (which includes, for example, the first inorganic encapsulation layer EPL1, the second An organic encapsulation layer EPL3 and a second inorganic encapsulation layer EPL2, the first organic encapsulation layer EPL3, for example, does not overlap the cover plate alignment mark 14) and the touch structure 15 (which, for example, includes a buffer layer BFL, a conductive layer 15B, and a second The intermediate insulating layer IIL2, the conductive
  • the manufacturing method of the display panel further includes: sequentially forming a buffer layer BF, an active layer 191, and a first gate insulating layer GIL1 covering the active layer 191 on the base substrate 11.
  • the first source/drain electrode layer 1710 on the side of the insulating layer IIL1 away from the base substrate 11, the first source/drain electrode layer 1710 includes a source electrode 193 and a drain electrode 194 electrically connected to the active layer 191, such as a source electrode 193 and
  • the drain 194 extends into the through hole penetrating the first intermediate insulating layer IIL1, the second gate insulating layer GIL2, and the first gate insulating layer GIL1 to electrically connect the active layer 191.
  • At least one embodiment of the present disclosure further provides an alignment method, which can be used for alignment in the manufacturing process of the display panel provided in any one of the embodiments of FIGS. 1A to 3B, for example.
  • the display panel that can adopt the alignment method includes a display substrate 10, an optical adhesive layer 20 and a cover plate 30.
  • the display panel includes a display area and a frame area located at the periphery of the display area.
  • the frame area includes a ring-shaped dam rubber 50 and a ring-shaped cut area on the side of the dam rubber 50 away from the display area.
  • the cover plate 30 is located on a side of the optical adhesive layer 20 away from the display substrate 10, and the cover plate 30 is connected to the display substrate 10 through the optical adhesive layer 20.
  • the cover plate 30 includes a window portion 32 located in the display area and a light shielding portion 31 located in the frame area.
  • the display substrate 10 includes a flexible base substrate 11 (not shown in FIG. 1A), and includes a plurality of light-emitting devices 12 (as shown in FIG. 1G) disposed on the base substrate 11, a pixel defining layer PDL, and an encapsulation layer EPL .
  • the pixel defining layer PDL is used to separate the plurality of light-emitting devices 12 (as shown in FIG. 1G), that is, the pixel defining layer PDL is used to define a plurality of sub-pixel regions, and each sub-pixel region is provided with a light-emitting device 12.
  • the encapsulation layer EPL is located on the side of the plurality of light-emitting devices 12 away from the base substrate 11 to prevent water, oxygen, etc.
  • the encapsulation layer EPL includes a first inorganic encapsulation layer EPL1, a first organic encapsulation layer EPL3, and a second inorganic encapsulation layer EPL2 (as shown in FIG. 1B) that are sequentially arranged in a direction away from the base substrate 11, that is, the first inorganic encapsulation layer
  • the distance from the EPL1, the first organic encapsulation layer EPL3, and the second inorganic encapsulation layer EPL2 to the base substrate 11 gradually increases.
  • the display substrate 10 further includes a plurality of cover plate alignment marks 14 configured to align between the display substrate 10 and the cover plate 30. The multiple cover plate alignment marks 14 are located in the frame area.
  • the orthographic projection of at least one of the plurality of cover plate alignment marks 14 on the base substrate is located between the orthographic projection of the dam glue 50 on the base substrate and the display area (as shown in FIG. 1A) and is connected to the second inorganic
  • the encapsulation layer EPL2 overlaps in a direction perpendicular to the base substrate 11 (as shown in FIGS. 1C, 1D, 1F, and 2B), and at least another of the plurality of cover plate alignment marks 14 is on the base substrate.
  • the orthographic projection is located between the orthographic projection of the dam glue 50 and the cutting area (as shown in FIG.
  • the orthographic projection of at least one of the plurality of cover plate alignment marks 14 on the base substrate is located on the dam glue 50 Between the orthographic projection on the base substrate and the display area and overlaps the second inorganic encapsulation layer EPL2 in a direction perpendicular to the base substrate 11; or, at least one of the plurality of cover plate alignment marks 14 is on the base substrate.
  • the orthographic projection on the bottom substrate is located between the orthographic projection of the dam glue 50 and the cutting area.
  • the alignment method includes: irradiating the display substrate 10 and the cover plate 30 for forming the display panel with light, and according to the plurality of cover plate alignment marks 14 included in the display substrate 10 Calculate the center of the display area of the display substrate 10; calculate the center of the window portion 32 of the cover plate 30 according to the edge 31A of the window portion 32 of the cover plate 30 (as shown in FIG. 4); The center of the window portion 32 of 30 is aligned to realize the alignment between the display substrate 10 and the cover plate 30.
  • the orthographic projection of at least one of the plurality of cover plate alignment marks 14 included in the display substrate 10 is located between the orthographic projection of the dam glue 50 and the display area, and/or the plurality of cover plates are aligned.
  • the orthographic projection of at least one of the marks 14 is located between the orthographic projection of the dam glue 50 and the cutting area, so the cover plate registration mark 14 can be made larger without increasing the size of the frame area, which is convenient for display
  • the alignment between the display substrate 10 and the cover plate 30 included in the panel can improve the alignment accuracy to avoid the phenomenon of blurring the edges of the display area of the display panel, especially the curved display panel (for example, a display panel with a curved edge area). And improve production efficiency.

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Abstract

一种显示面板及制作方法和对位方法,显示面板包括通过光学胶层(20)连接的显示基板(10)和盖板(30)。显示基板(10)包括设置于衬底基板(11)上的多个发光器件(12)、隔开多个发光器件(12)的像素界定层(PDL)、以及位于覆盖多个发光器件(12)的封装层(EPL);封装层(EPL)包括在远离衬底基板(11)的方向上依次设置的第一无机封装层(EPL1)、第一有机封装层(EPL3)和第二无机封装层(EPL2);显示面板包括显示区和具有切割区和坝胶(50)所在的坝胶区的边框区;显示基板(10)包括的多个盖板对位标记(14)中的至少一个位于坝胶(50)和显示区之间且与第二无机封装层(EPL2)交叠且多个盖板对位标记(14)中的至少一个位于坝胶(50)和切割区之间。可以避免显示面板存在的显示区边缘模糊的现象。

Description

显示面板及其制作方法和对位方法 技术领域
本公开实施例涉及一种显示面板及其制作方法和对位方法。
背景技术
有机发光二极管显示器(Organic Light-Emitting Diode,简称OLED)是一种新兴的显示器,其具有主动发光、对比度高、响应速度快、轻薄、可柔性显示等诸多优点。
触控屏因具有坚固耐用、反应速度快、节省空间、便于交流等优点而越来越广泛地被应用于各种便携式设备上。可预见的是,将触控屏与OLED显示器集成在一起得到的触控式OLED显示器将成为市场主流。
发明内容
本公开实施例提供一种显示面板,其包括显示基板、光学胶层和盖板。所述显示基板包括柔性的衬底基板并且包括在所述衬底基板上的多个发光器件、像素界定层以及封装层,所述像素界定层隔开所述多个发光器件,所述封装层位于所述多个发光器件背离所述衬底基板一侧;所述光学胶层位于所述封装层的背离所述衬底基板的一侧;所述盖板位于所述光学胶层的背离所述显示基板的一侧,并通过所述光学胶层连接所述显示基板;所述显示面板包括显示区和位于所述显示区周边的边框区;所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶的远离所述显示区一侧的环形的切割区;所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;所述显示基板还包括构造为用于所述显示基板与所述盖板之间对位的多个盖板对位标记。所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和显示区之间;和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于 所述坝胶的所述正投影和所述切割区之间。
例如,所述至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间的盖板对位标记与所述第二无机封装层在垂直于所述衬底基板的方向上无交叠。
例如,所述至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间的盖板对位标记与所述第二无机封装层在垂直于所述衬底基板的方向上至少部分交叠。
例如,所述显示基板包括触控结构,所述触控结构在垂直于所述衬底基板的方向上位于所述封装层与光学胶层之间,所述触控结构包括至少一个金属层,所述至少一个金属层包括所述盖板对位标记。
例如,所述盖板对位标记在所述衬底基板上的正投影的最大尺寸为150微米-600微米。
例如,所述盖板对位标记在所述衬底基板上的正投影包括T字形、十字形和L形中的至少一种。
例如,所述显示基板中直接承载所述盖板对位标记的表面为平坦表面。
例如,所述边框区包括在第一方向上彼此相对的第一边框区和第二边框区;所述显示面板还包括柔性电路板,所述柔性电路板与所述第二边框区连接;并且所述第一边框区中设置有所述至少一个位于所述坝胶和显示区之间且与所述第二无机封装层在垂直于所述衬底基板的方向上交叠的盖板对位标记,和/或,所述第二边框区中设置有所述至少一个位于所述坝胶和所述切割区之间的盖板对位标记。
例如,所述边框区还包括在不同于第一方向的第二方向上彼此相对的第三边框区和第四边框区,所述显示面板在所述第三边框区和所述第四边框区中的至少之一中包括弯曲部,且与所述弯曲部对应的盖板的部分是弯曲的;所述显示面板还包括栅极驱动器,其位于所述第三边框区和所述第四边框区中的至少一个中;和所述盖板对位标记位于所述第三边框区和所述第四边框区之外。
例如,所述多个盖板对位标记包括四个盖板对位标记,所述四个盖板对位标记沿逆时针方向分别编号为第一盖板对位标记、第二盖板对位标记、第三盖板对位标记和第四盖板对位标记,所述第一盖板对位标记和所述第四盖 板对位标记位于所述第一边框区中,所述第二盖板对位标记和所述第三盖板对位标记位于所述第二边框区中;相对于与所述第一方向平行的轴线,所述第一盖板对位标记和所述第二盖板对位标记的组合与所述第三盖板对位标记和所述第四盖板对位标记的组合彼此对称。
例如,所述显示基板还包括与所述发光器件电连接的电极层延伸部,所述电极层延伸部位于所述边框区中;在垂直于所述衬底基板的方向上,所述电极层延伸部位于所述盖板对位标记与所述衬底基板之间;所述电极层延伸部在所述衬底基板上的正投影与所述盖板对位标记在所述衬底基板上的正投影交叠。
例如,所述电极层延伸部包括层叠的第一导电层和第二导电层,所述第二导电层位于所述第一导电层的背离所述衬底基板的一侧,所述第二导电层具有凹向所述衬底基板的部分,所述部分电连接所述第一导电层,并且所述盖板对位标记位于所述部分限定的凹陷区中。
例如,所述第二导电层包括依次设置于所述衬底基板上且并联的第一子导电层、第二子导电层和第三子导电层;所述第一子导电层在垂直于所述衬底基板的方向上位于所述第二子导电层和所述衬底基板之间。
例如,所述显示面板还包括至少一个开关元件,所述开关元件包括栅极、源极和漏极;所述发光器件包括第一电极层和第二电极层,所述第一导电层与所述源极和漏极同层同材料,所述第二子导电层与所述第一电极层同层同材料,第三子导电层与所述发光器件的所述第二电极层同层同材料。
例如,所述第二边框区中设置有构造为用于所述柔性电路板的弯折的电路板对位标记,所述电路板对位标记在所述衬底基板上的正投影与所述盖板对位标记在所述衬底基板上的正投影间隔开;并且,所述电路板对位标记在所述衬底基板上的正投影具有最大尺寸,所述盖板对位标记在所述衬底基板上的正投影具有最大尺寸,所述电路板对位标记的所述最大尺寸小于所述盖板对位标记的所述最大尺寸。
例如,所述盖板包括位于所述显示区的窗口区和位于所述显示区之外的遮光部;所述盖板对位标记在所述衬底基板上的正投影位于所述遮光部在所述衬底基板上的正投影所在区域内。
例如,每个盖板对位标记都为一体化结构。
例如,所述盖板对位标记是不透光的。
例如,所述盖板对位标记的材料为金属。
本公开实施例还提供一种显示面板的制作方法,其包括:在柔性的衬底基板上形成像素界定层;在所述衬底基板上形成多个发光器件,其中,所述像素界定层隔开所述多个发光器件;在所述衬底基板上形成封装层,其中,所述封装层位于所述多个发光器件的背离所述衬底基板一侧,所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;在所述衬底基板上形成多个盖板对位标记,其中,所述多个盖板对位标记被配置为用于包括所述像素界定层、所述多个发光器件、所述封装层和所述盖板对位标记的显示基板与盖板之间的对位,所述显示面板包括显示区和位于所述显示区周边的边框区,所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶远离所述显示区一侧的环形的切割区;所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和显示区之间,和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间;形成位于所述盖板对位标记的背离所述衬底基板的一侧的光学胶层;利用所述光学胶层将形成有所述盖板对位标记的显示基板与所述盖板连接,其中,所述显示基板包括的所述衬底基板在所述显示基板与所述盖板连接前是平的且在所述显示基板与所述盖板连接后包括弯曲部。
例如,所述盖板包括位于所述显示区的窗口部和位于所述显示区之外的遮光部,所述盖板对位标记在所述衬底基板上的正投影位于所述遮光部在所述衬底基板上的正投影所在区域内。
例如,所述利用所述光学胶层将形成有所述盖板对位标记的所述显示基板与所述盖板连接包括:利用光照射所述盖板和所述显示基板实现所述显示基板与所述盖板的对位。
例如,在光照射所述显示基板和所述盖板的情况下,利用对位装置根据所述多个盖板对位标记计算出所述显示基板的显示区中心,利用所述对位装置根据所述盖板窗口部的边缘计算出所述盖板窗口部的中心;并利用对位装置将所述显示基板显示区中心与所述盖板窗口部中心对准,以实现显示基板 与所述盖板之间的对位。
本公开实施例还提供一种对位方法,其包括:利用光照射用于形成显示面板的显示基板和盖板,其中,所述显示面板具有显示区和位于所述显示区周边的边框区,所述显示面板包括所述显示基板、所述盖板和连接所述显示基板和所述盖板的光学胶层,所述显示基板包括多个盖板对位标记,所述盖板包括位于所述显示区的窗口部和位于所述边框区的遮光部;根据所述多个盖板对位标记计算出所述显示基板的显示区中心;根据所述盖板窗口部的边缘计算出所述盖板窗口部的中心;将所述显示基板显示区中心与所述盖板窗口部中心对准,以实现显示基板与所述盖板之间的对位。所述显示基板包括柔性的衬底基板并且包括在所述衬底基板上的多个发光器件、像素界定层以及封装层,所述像素界定层隔开所述多个发光器件,所述封装层位于所述多个发光器件背离所述衬底基板一侧;所述光学胶层位于所述封装层的背离所述衬底基板的一侧;所述盖板位于所述光学胶层的背离所述显示基板的一侧;所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶的远离所述显示区一侧的环形的切割区;所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和显示区之间,和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间。
本公开实施例还提供一种显示面板,其包括显示基板、光学胶层和盖板。所述显示基板包括柔性的衬底基板并且包括在所述衬底基板上的多个发光器件、像素界定层以及封装层,所述像素界定层隔开所述多个发光器件,所述封装层位于所述多个发光器件的背离所述衬底基板一侧;所述光学胶层位于所述封装层的背离所述衬底基板的一侧;所述盖板位于所述光学胶层的背离所述显示基板的一侧,并通过所述光学胶层连接所述显示基板;所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;所述显示基板还包括构造为用于所述显示基板与所述盖板之间对位的多个盖板对位标记并且还包括触控结构,所述触控结构在垂直于所述衬底基板的方向上位于所述封装层与光学胶层之间,所述触控结 构包括至少一个金属层,所述至少一个金属层包括所述盖板对位标记。
例如,所述显示面板包括显示区和位于所述显示区周边的边框区,所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶的远离所述显示区一侧环形的切割区;所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和显示区之间,和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间。
本公开实施例可以在不增大边框区尺寸的前提下使盖板对位标记具有较大的尺寸,这样便于显示面板包括的显示基板与盖板之间的对位,从而可以提高对位精度,以避免显示面板尤其是弯曲显示面板(例如边缘区域弯曲的显示面板)存在的显示区边缘模糊的现象,并且提高生产效率。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例,而非对本发明的限制。
图1A为本公开实施例提供的显示面板的俯视示意图;
图1B为本公开实施例提供的显示面板的显示区中部分结构的位置关系示意图;
图1C为本公开实施例提供的显示面板的第一边框中盖板对位标记处上下膜层与其他位置处膜层差异的示意图;
图1D为本公开实施例提供的显示面板的第一边框区中部分结构在图1A中I—I线处的局部剖视图;
图1E为本公开实施例提供的显示面板的第二边框区中部分结构在图1A中II—II线处的局部剖视示意图一;
图1F为本公开实施例提供的显示面板的第二边框区中部分结构在图1A中II—II线处的局部剖视示意图二;
图1G为本公开实施例提供的显示面板中的发光器件和像素界定层的局部俯视示意图;
图1H为本公开实施例提供的显示面板中的第二电极层122、盖板对位标记、显示区、凹陷区和坝胶区的位置关系示意图;
图2A为本公开实施例提供的显示面板中坝胶包括第一坝胶和第二坝胶的俯视示意图;
图2B为本公开实施例提供的显示面板的第一边框区中部分结构沿图2A中III—III线的局部剖视示意图;
图3A为沿图1A中第一方向x的局部剖视示意图;
图3B为沿图1A中第二方向y的局部剖视示意图;
图4为本公开实施例提供的显示面板中的盖板的俯视示意图;
图5A和图5B为本公开实施例提供的显示面板中触控电极和触控信号线的俯视示意图;
图6为本公开实施例中的对位装置、显示基板和盖板的示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例的附图,对本发明实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于所描述的本发明的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本发明保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
目前,基于OLED显示器的可柔性显示的优点,越来越多的OLED显示器采用两个侧边缘区域弯曲的设计,以提升用户的视觉体验,本申请的发明 人在研究中注意到,两个侧边缘区域弯曲的OLED显示器容易出现显示区边缘模糊的现象,并且本申请的发明人发现这种现象是由于OLED显示器包括的OLED显示基板与盖板之间的对位精度不高导致的。
基于上述发现,本申请的发明人提出一种显示面板及其制作方法。
如图1A至图2B所示,该显示面板包括显示基板10、光学胶层20和盖板30。盖板30位于光学胶层20的背离显示基板10的一侧,并且盖板30通过光学胶层20连接显示基板10。
显示基板10包括柔性的衬底基板11(图1A中未标出),并且包括设置于衬底基板11上的多个发光器件12(如图1G所示)、像素界定层PDL和封装层EPL。像素界定层PDL用于隔开该多个发光器件12(如图1G所示),即像素界定层PDL用于限定多个子像素区域,每个子像素区域设置有一个发光器件12。
显示基板10还包括封装层EPL,其位于该多个发光器件12的背离衬底基板11一侧,用于防止空气中的水、氧等腐蚀发光器件12。在一些实施例中,所述封装层EPL包括在远离衬底基板11的方向上依次设置的第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2(如图1B所示),即第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2到衬底基板11的距离逐渐增大。
显示面板包括显示区(即图1A、2A和1H中的虚线A围成的区域)和位于显示区周边的边框区,边框区包括环形的坝胶50所在的坝胶区(即图1H中的虚线D和虚线E之间的区域)和位于坝胶50外侧的环形的切割区(即切割区位于坝胶50的远离显示区的一侧,也即坝胶50在衬底基板11上的正投影位于显示区和切割区之间)。
显示基板10还包括构造为用于显示基板10与盖板30之间对位的多个盖板对位标记14。该多个盖板对位标记14位于边框区中。通过使盖板对位标记14位于边框区中,可以避免盖板对位标记14影响显示效果。在一些实施例中,该多个盖板对位标记14中的至少一个在衬底基板上的正投影位于坝胶50在衬底基板上的正投影和显示区之间,即位于坝胶区和显示区之间(如图1A所示)且与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠(如图1C、1D、1F、2B所示),并且该多个盖板对位标记14中的至少另一个 在衬底基板上的正投影位于坝胶50的正投影和切割区之间(如图1A所示),即位于坝胶区和切割区之间。
在一些实施例中,对于位于坝胶区和显示区之间的至少一个盖板对位标记14中的每个盖板对位标记来说,第二无机封装层EPL2覆盖该盖板对位标记的全部或者仅仅一部分;或者,如图1C和图1D所示,第二无机封装层EPL2在垂直于衬底基板11的方向上位于衬底基板11与位于坝胶区和显示区之间的至少一个盖板对位标记14之间。也就是说,在一些实施例中,对于该多个盖板对位标记14中的至少一个来说,其在衬底基板上的正投影位于坝胶50在衬底基板上的正投影和显示区之间(如图1A所示)且其与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠(“交叠”包括完全交叠和局部交叠,也包括覆盖和被覆盖)。
在一些实施例中,对于在衬底基板上的正投影位于坝胶50在衬底基板上的正投影和切割区之间的至少一个盖板对位标记14中的每个盖板对位标记来说,该盖板对位标记14与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠(如图1F、2B所示)或者不交叠(如图1E所示)。在一些实施例中,对于在衬底基板上的正投影位于坝胶区和切割区之间的至少一个盖板对位标记14中的每个盖板对位标记来说,第二无机封装层EPL2覆盖该盖板对位标记的全部或者仅仅一部分。也就是说,在一些实施例中,对于该多个盖板对位标记14中的至少一个来说,其在衬底基板上的正投影位于坝胶50在衬底基板上的正投影和切割区之间(如图1A所示)且其与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠(“交叠”包括完全交叠和局部交叠,也包括覆盖和被覆盖)或者不交叠。也就是说,在一些实施例中,该多个盖板对位标记14中的至少一个在衬底基板上的正投影位于坝胶50的正投影和切割区之间,即位于坝胶区和切割区之间。
在一些实施例中,坝胶50用于在制作封装层EPL的过程中防止用于形成封装层EPL中的有机封装层的有机材料流到坝胶50的外侧,坝胶50的外侧为坝胶50与衬底基板11的边缘11A(如图1A所示)之间的区域。由于坝胶50是凸起的,为避免盖板对位标记14的形状和尺寸受到坝胶50的影响,盖板对位标记14在衬底基板11上的正投影位于坝胶50在衬底基板11上的正投影所在区域之外,即盖板对位标记14位于坝胶区之外。
在一些实施例中,切割区是显示面板边缘附近的区域,由于在显示面板通过切割显示面板母板而得到,因此在显示面板边缘附近存在因切割而导致的衬底基板11的表面较粗糙的区域,该区域即为切割区。由于切割区的表面较粗糙,为避免切割区影响盖板对位标记14的形状和尺寸等,盖板对位标记14在衬底基板11上的正投影位于切割区之外。在一些实施例中,切割区包括裂纹阻挡部件,用于防止在切割过程中裂纹向显示区扩散。
在本公开实施例中,由于显示基板10包括的多个盖板对位标记14中的至少一个的正投影位于坝胶50的正投影与显示区之间和/或该多个盖板对位标记14中的至少一个的正投影位于坝胶50的正投影与切割区之间,因此可以在不增大边框区尺寸的前提下使盖板对位标记14具有较大的尺寸,这样便于显示面板包括的显示基板10与盖板30之间的对位,从而可以提高对位精度,以避免显示面板尤其是弯曲显示面板(例如边缘区域弯曲的显示面板)存在的显示区边缘模糊的现象,并且提高生产效率。
需要说明的是,在本公开实施例中,部件A位于部件B的背离衬底基板的一侧,指的是部件B在垂直于衬底基板的方向上位于部件A与衬底基板之间。部件C与部件D交叠或者在垂直于衬底基板11的方向上交叠,指的是部件C在衬底基板11上的正投影与部件D在衬底基板11上的正投影至少部分交叠。
例如,如图1A所示,显示基板10包括的多个盖板对位标记14包括四个盖板对位标记141至144,其中两个盖板对位标记141和144在衬底基板上的正投影位于坝胶50在衬底基板上的正投影与显示区之间,并且另两个盖板对位标记142和143在衬底基板上的正投影位于坝胶50的正投影与切割区之间。需要说明的是,如图1A所示实施例以显示基板10包括四个盖板对位标记14为例进行说明;在其它实施例中,显示基板10可以包括其它数量的盖板对位标记14。
封装层EPL包括至少两个无机封装层以及至少一个有机封装层。在封装层EPL包括至少两个无机封装层以及至少两个有机封装层的情况下,无机封装层与有机封装层交替设置。例如,第一无机封装层EPL1和第二无机封装层EPL2为封装层EPL的最外侧的无机封装层。例如,如图1B所示,封装层EPL只包括层叠设置的第一无机封装层EPL1和第二无机封装层EPL2以 及位于二者之间的第一有机封装层EPL3,且第一有机封装层EPL3直接接触第一无机封装层EPL1和第二无机封装层EPL2。例如,封装层EPL除了包括依次设置的第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2之外,还包括第二有机封装层和第三无机封装层,从而封装层EPL包括依次层叠的第一无机封装层EPL1、第二有机封装层、第三无机封装层、第一有机封装层EPL3和第二无机封装层EPL2,或者包括依次层叠的第一无机封装层EPL1、第一有机封装层EPL3、第三无机封装层、第二有机封装层和第二无机封装层EPL2。在其它实施例中,封装层EPL还可以包括更多的无机封装层和更多的有机封装层。
需要说明的是,在至少一个实施例中,封装层EPL包括的至少一个无机封装层可以延伸到坝胶50所在区域(即该至少一个无机封装层可以与坝胶50在垂直于衬底基板11的方向上至少部分交叠)。例如,如图2B所示,封装层EPL包括的第一无机封装层EPL1和第二无机封装层EPL2都与坝胶50交叠。在其它实施例中,可以是仅第二无机封装层EPL2与坝胶50至少部分交叠;或者,可以是整个封装层EPL都与坝胶50不交叠(即封装层EPL在衬底基板11上的整个正投影都位于坝胶50在衬底基板11上的正投影之外)。
例如,如图2A和图2B所示,坝胶50所在的坝胶区中设置有沿平行于衬底基板11的方向依次排列的第一坝胶51和第二坝胶52(即坝胶50包括第一坝胶51和第二坝胶52),第二坝胶52相对于第一坝胶51更远离显示区,并且第二坝胶52的高度(即第二坝胶52的顶端到衬底基板11的最大距离)高于第一坝胶51的高度(即第一坝胶51的顶端到衬底基板11的最大距离)。例如,第一坝胶51包括以下各层结构的延伸到边框区中的部分:第二平坦化绝缘层PLN2、像素界定层PDL、第一无机封装层EPL1、第二无机封装层EPL2、缓冲层BFL和第二中间绝缘层IIL2;第二坝胶52包括以下层结构的延伸到边框区中的部分:第一平坦化绝缘层PLN1、第二平坦化绝缘层PLN2、像素界定层PDL、第一无机封装层EPL1、第二无机封装层EPL2、缓冲层BFL和第二中间绝缘层IIL2。坝胶50还进一步包括第一坝胶51和第二坝胶52之间的凹陷结构,并且第一坝胶51和第二坝胶52之间的属于例如像素界定层PDL、平坦层化绝缘层PLN1、PLN2等有机膜层的部分被尽可能地去掉以形成环形的沟槽区域53,如图2A所示。也就是说,例如像素界定 层PDL、平坦层化绝缘层PLN1、PLN2等有机膜层在沟槽区域53处是断开的(即不连续的)。进而,在完成显示面板的封装后,形成的封装层EPL可以有效地阻挡例如水汽或氧气等渗入到显示面板的发光器件的内部。坝胶50的实施例包括但不限于图2A和图2B所示实施例。
例如,如图1C、1E和1F所示,衬底基板11包括依次层叠的第一聚酰亚胺层PI1、第一无机层BR1、第二聚酰亚胺层PI2和第二无机层BR2。图1B、1D和2B中的衬底基板11也采用与图1C、1E和1F所示的衬底基板11一样的结构。在其它实施例中,衬底基板11也可以采用其它材料形成。
例如,在本公开至少一个实施例中,显示基板10包括的发光器件12为OLED或者量子点发光器件等自发光器件。例如,发光器件12为顶发射型,即发光器件12发出的光向着背离衬底基板11的方向(如图1B中的箭头方向所示)发射。例如,如图1B所示,发光器件12包括第一电极层121、第二电极层122以及位于第一电极层121和第二电极层122之间的发光层123,第一电极层121和第二电极层122之一为阳极且另一为阴极。图1B中以第一电极层121为阳极且第二电极层122为阴极为例进行说明,即:如图1B所示,发光器件12包括阳极121、发光层123和阴极122;在垂直于衬底基板11的方向上,发光层123位于阳极121和阴极122之间,阳极121位于发光层123和衬底基板11之间,并且阴极122位于发光层123的背离衬底基板11的一侧。在其它实施例中,阳极121和阴极122的位置可以互换。为了更好地防止发光器件12被空气中的水、氧腐蚀,例如,发光器件12的阴极122直接接触封装层EPL。为避免影响显示效果,例如,第一电极层121和第二电极层122都是透明的。
例如,如图1B所示,显示基板10还包括开关元件19,其电连接发光器件12,以控制发光器件12的工作状态。例如,开关元件19为晶体管,该晶体管包括有源层191、栅极192、源极193和漏极194,栅极192通过栅绝缘层GIL与有源层191绝缘,源极193和漏极194通过中间绝缘层IIL1与栅极192绝缘,并且,源极193和漏极194伸入贯穿第一栅绝缘层GIL1、第二栅绝缘层GIL2和第一中间绝缘层IIL1的通孔中以电连接有源层191。
例如,显示基板10包括的多个子像素区域中的每个子像素区域都包括一个发光器件12以及电连接该发光器件12的开关元件19;如图1B所示,开 关元件19通过其包括的漏极194电连接发光器件12的第一电极层121。在这种情况下,该多个子像素区域的发光器件12的第一电极层121彼此断开,即位于不同子像素区域的第一电极层121彼此断开;并且,该多个子像素区域的发光器件12的第二电极层122彼此断开或者直接连接。在该多个子像素区域的发光器件12的第二电极层122直接连接的情况下,该多个子像素区域的发光器件12的共用同一第二电极层122,如图1H所示,该被共用的第二电极层122的边缘F在衬底基板上的正投影位于显示区和坝胶区之间(即边缘F位于虚线A与虚线D之间),该第二电极层122是连续的且覆盖整个显示区,这样可以简化布线。
例如,如图1B所示,显示基板10还包括覆盖开关元件19的第一平坦化绝缘层PLN1和第二平坦化绝缘层PLN2,第二平坦化绝缘层PLN2位于第一平坦化绝缘层PLN1的背离衬底基板11的一侧,第二平坦化绝缘层PLN2具有大致平坦的表面,从而使发光器件12的发光层123形成在该大致平坦的表面上。例如,发光器件12的第一电极层121伸入贯穿第二平坦化绝缘层PLN2的通孔中以电连接连接部194A,连接部194A伸入贯穿第一平坦化绝缘层PLN1和钝化绝缘层PVX的通孔中以电连接开关元件19,从而第一电极层121通过连接部194A电连接开关元件19。另外,这里的“大致平坦”并不要求100%平坦,而是指该直接承载盖板对位标记14的表面大致是平坦的,即该表面的粗糙度满足薄膜制作工艺中的允许误差。
例如,如图1A和图2A所示,在本公开至少一个实施例提供的显示面板中,边框区包括在第一方向x上相对的第一边框区和第二边框区以及在第二方向y上相对的第三边框区和第四边框区。该显示面板还包括与第二边框区连接的柔性电路板40,柔性电路板40与显示区中的信号线电连接,以实现信号传输。例如,如图1H所示,从柔性电路板40所在区域引出的引线70(引线70的数量可以为一个或多个;引线70例如与盖板对位标记142、143不交叠)与发光器件12(图1H中未示出)的第二电极层122电连接,以通过该引线70对第二电极层122施加电信号。
需要说明的是,图1A示出了该柔性电路板40处于展开状态的示意图;在产品组装后中,该柔性电路板40的位于电路板弯折区中的部分发生弯折以将柔性电路板40弯折到显示面板的背侧。另外,图1A所示的实施例仅以显 示面板的平面形状为矩形为例进行说明;在其它实施例中,显示面板的平面形状可以为菱形、圆形等其它任意需要的形状。
例如,在本公开至少一个实施例中,显示面板的两个侧边缘区域是弯曲的。例如,如图3A和图3B所示,在第一方向x上,显示面板在第一边框区和第二边框区内是平坦的;在第二方向y上,显示面板在第三边框区和第四边框区内是弯曲的。在一些实施例中,在第一方向x上,显示面板在第一边框区和第二边框区内的至少之一是平坦的;在第二方向y上,显示面板在第三边框区和第四边框区内的至少之一是弯曲的。也就是说,显示面板在第三边框区和第四边框区中的至少之一中包括弯曲部B,且与弯曲部B对应的盖板30的部分是弯曲的,如图3B所示。通过采用侧边缘区域弯曲这一设计,在用户观看显示面板时,可以提升用户的视觉体验。需要说明的是,图3A和图3B所示实施例仅以显示面板在第三边框区和第四边框区发生弯曲且在整个显示区内是平面的(非弯曲的)为例进行说明。本公开实施例包括但不限于图3A和图3B所示实施例;例如,可以是显示面板仅在第三边框区和第四边框区中的一个所在位置处是弯曲的。
例如,第一边框区和第二边框区中的至少一个中设置有盖板对位标记14。在本公开实施例中,由于第二边框区位于显示面板的设置有柔性电路板40的一侧,因此第二边框区具有较大的宽度(即沿第一方向x的尺寸),以便从显示区延伸出来的信号线直接进入第二边框区以电连接柔性电路板40,并且便于从第三边框区和第四边框区中引出的信号线在第二边框区处电连接柔性电路板40;而且,与第二边框区相对的第一边框区也具有较大的宽度(即沿第一方向x的尺寸),以便从显示区延伸出来的信号线先进入该第一边框区中,然后在经过第三边框区或第四边框区后进入第二边框区中以电连接柔性电路板40。在本公开实施例中,由于在具有较大宽度的第一边框区和第二边框区中的至少一个中设置盖板对位标记14,因此盖板对位标记14可以具有较大的尺寸,以提高盖板对位标记14的识别性,从而提高对位精度。
例如,如图1A所示,显示面板还包括用于向显示区提供栅极扫描信号的栅极驱动器90,其位于第三边框区和第四边框区中的至少一个中。由于第三边框区和/或第四边框区中设置有栅极驱动器90,第三边框区和/或第四边框区的空余空间较小,因此盖板对位标记14位于第三边框区和第四边框区之 外。
在本公开实施例中,例如,可以采用对位装置获取显示基板的显示区中心和盖板的显示区中心的方式来进行显示基板与盖板之间的对位。例如,如图4所示,盖板30包括位于显示区中的透明的窗口部32以及位于显示区之外且用于遮挡边框区以避免边框区中的结构被用户看到的遮光部31(例如油墨等遮光材料),遮光部31的内边缘31A位于显示区的边缘所在位置处;盖板对位标记14在衬底基板11上的正投影位于遮光部31在衬底基板11上的正投影所在区域内。例如,在光照射显示面板的情况下,对位装置根据显示基板10包括的多个盖板对位标记14可以计算出显示基板10的显示区中心,并且该对位装置根据盖板30中的显示区的边缘31A可以计算出盖板30的显示区中心;对位装置通过将显示基板10的显示区中心与盖板30的显示区中心对准,可以实现显示基板10与盖板30之间的对位。
例如,为简化计算,显示基板10包括的多个盖板对位标记14在衬底基板11上的正投影的形状轮廓一致。为进一步简化计算,可以使该多个盖板对位标记的正投影的形状轮廓一致,并且该多个盖板对位标记的正投影的形状大小一致。在其它实施例中,也可以是该多个盖板对位标记的正投影的形状轮廓一致且至少部分盖板对位标记的形状大小不一致。
例如,如图1A所示,显示基板10包括的多个盖板对位标记14中的至少一个位于第一边框区中且至少另一个位于第二边框区中,即第一边框区和第二边框区中都设置有盖板对位标记14。例如,如图1A所示,该多个盖板对位标记14中的至少一个位于第一边框区中且正投影位于坝胶50的正投影与显示区之间,且该多个盖板对位标记14中的至少另一个位于第二边框区中且正投影位于坝胶50的正投影与切割区之间。例如,在其它实施例中,可以是仅第一边框区中设置有正投影位于坝胶50的正投影与显示区之间的至少一个盖板对位标记14;或者,可以是仅第二边框区中设置有正投影位于坝胶50的正投影与切割区之间的至少一个盖板对位标记14。
例如,如图1A所示,该多个盖板对位标记14包括四个盖板对位标记141至144,该四个盖板对位标记14分布于靠近显示区的四个角部的边框区中;该四个盖板对位标记14沿逆时针方向分别编号为第一盖板对位标记141、第二盖板对位标记142、第三盖板对位标记143和第四盖板对位标记144;第一 盖板对位标记141和第四盖板对位标记144位于第一边框区中,第二盖板对位标记142和第三盖板对位标记143位于第二边框区中;并且,相对于与第一方向x平行的轴线(该轴线穿过显示基板10的显示区的中心且平行于第一方向x,图中未示出该轴线),第一盖板对位标记141和第二盖板对位标记142的组合与第三盖板对位标记143和第四盖板对位标记144的组合彼此对称。采用对称设计,有利于简化对位装置的计算。
需要说明的是,位于同一边框区中的不同盖板对位标记可以采用相同的设置方式。例如,位于第一边框区中的第一盖板对位标记141和第四盖板对位标记144都可以采用如图1C、1D和图2B所示实施例中的设置方式;位于第二边框区中的第二盖板对位标记142和第三盖板对位标记143都可以采用如图1E和图1F所示实施例中的设置方式。
例如,为进一步简化计算,第一盖板对位标记141和第四盖板对位标记144位于同一水平方向(参见图1A中的第二方向y)上,第二盖板对位标记142和第三盖板对位标记143位于同一水平方向上,第一盖板对位标记141和第二盖板对位标记142位于同一竖直方向(参见图1A中的第一方向x)上,并且第三盖板对位标记143和第四盖板对位标记144位于同一竖直方向上。
由于在第一边框区中,坝胶50与显示区之间的距离较大,例如,为了在不增大边框区尺寸的前提下使盖板对位标记14具有较大尺寸,显示基板10包括的多个盖板对位标记14中的至少一个(图1A以盖板对位标记141和144为例)位于第一边框区中且位于坝胶50与显示区之间。在这种情况下,例如,如图1C、图1D和图2B所示,位于第一边框区中且位于坝胶50与显示区之间的盖板对位标记14(例如图1A中的盖对位标记141和144中的至少一个)位于封装层EPL的背离衬底基板11的一侧。例如,如图1C、图1D和图2B所示,封装层EPL的与该盖板对位标记14交叠的部分不包括第一有机封装层EPL3。
由于在第二边框区中,坝胶50与切割区之间的距离较大,例如,为了在不增大边框区尺寸的前提下使盖板对位标记14具有较大尺寸,该多个盖板对位标记14中的至少另一个(图1A以盖板对位标记142和143为例)位于第二边框区中且位于坝胶50与切割区之间。在这种情况下,在至少一个实施例中,整个封装层EPL未超过坝胶50,并且,如图1E所示,位于第二边框区 中且位于坝胶50与切割区之间的盖板对位标记14(例如图1A中的盖对位标记142和143中的至少一个)与像素界定层PDL交叠且位于像素界定层PDL的背离衬底基板11的一侧,也就是说,位于坝胶50和切割区之间的至少一个盖板对位标记14与第二无机封装层EPL2在垂直于衬底基板11的方向上无交叠。
在其它实施例中,位于坝胶50和切割区之间的至少一个盖板对位标记14与第二无机封装层EPL2在垂直于衬底基板11的方向上至少部分交叠。例如,在至少另一个实施例中,封装层EPL包括的第二无机封装层EPL2超过坝胶50,并且,如图1F所示,位于第二边框区中且位于坝胶50与切割区之间的盖板对位标记14(例如图1A中的盖对位标记142和143中的至少一个)与第二无机封装层EPL2交叠且位于第二无机封装层EPL2的背离衬底基板11的一侧;或者,在至少另一个实施例中,封装层EPL包括的第二无机封装层EPL2超过坝胶50,并且,位于第二边框区中且位于坝胶50与切割区之间的盖板对位标记14(例如图1A中的盖对位标记142和143中的至少一个)与像素界定层PDL和第二无机封装层EPL2交叠且位于第二无机封装层EPL2的背离衬底基板11的一侧。
需要说明的是,图1F以位于第二边框区中且位于坝胶50所在的坝胶区与切割区之间的整个盖板对位标记14与第二无机封装层EPL2交叠(即完全交叠)且与像素界定层PDL不交叠为例进行说明。在一些实施例中,也可以是坝胶区与切割区之间的整个盖板对位标记14与第二无机封装层EPL2交叠且与像素界定层PDL交叠。在一些实施例中,也可以是该盖板对位标记14的一部分与第二无机封装层EPL2交叠且另一部分与第二无机封装层EPL2不交叠(即,盖板对位标记14与第二无机封装层EPL2仅部分交叠)且与像素界定层PDL交叠或不交叠。在另一些实施例中,也可以是至少一个在衬底基板11上的正投影位于坝胶区和切割区之间的盖板对位标记14与第二无机封装层EPL2在垂直于衬底基板11的方向上无交叠且位于像素界定层PDL的背离衬底基板11的一侧(如图1E所示)。在另一些实施例中,也可以是至少一个在衬底基板11上的正投影位于坝胶区和切割区之间的盖板对位标记14与第二无机封装层EPL2和像素界定层PDL都不交叠且位于触控结构15(如图1B所示)包括的缓冲层BFL的背离衬底基板11的一侧。
也就是说,对于至少一个在衬底基板11上的正投影位于坝胶区和切割区(如图1A所示)之间的盖板对位标记14来说,其与第二无机封装层EPL2在垂直于衬底基板11的方向上无交叠或者至少部分交叠(其位于第二无机封装层EPL2的面向衬底基板11的一侧或者位于第二无机封装层EPL2的背离衬底基板11的一侧);和/或,对于该至少一个在衬底基板11上的正投影位于坝胶区和切割区(如图1A所示)之间的盖板对位标记14来说,其在垂直于衬底基板11的方向上与像素界定层PDL至少部分交叠且位于像素界定层PDL的背离衬底基板11的一侧,或者无交叠。
例如,盖板对位标记14形成在平坦的表面上,也就是说,显示基板10中直接承载盖板对位标记14的表面为平坦表面。例如,如图1C、图1D和图2B所示,在第一边框区中(例如如图1A所示的在坝胶50与显示区之间),直接承载盖板对位标记14的表面为缓冲层BFL的背离衬底基板11的表面(即上表面)的一部分,缓冲层BFL的该一部分表面是平坦的。例如,如图1E和图1F所示,在第二边框区中(例如如图1A所示的坝胶50与切割区之间),直接承载盖板对位标记14的表面为缓冲层BFL的背离衬底基板11的表面的一部分,并且缓冲层BFL的该一部分表面是平坦的。在本公开实施例中,通过使直接承载盖板对位标记14的表面为平坦表面,有利于提高对位精度。需要说明的是,“直接承载盖板对位标记14的表面”指的是该表面在垂直于衬底基板11的方向上位于衬底基板11与盖板对位标记14之间,并且该表面直接接触该盖板对位标记14。另外,这里的“平坦”并不要求100%平坦,而是指该直接承载盖板对位标记14的表面大致是平坦的,即该表面的粗糙度满足薄膜制作工艺中的允许误差。
例如,显示面板除了包括盖板对位标记14外,还可能包括其它用途的对位标记。在显示面板包括的所有对位标记中,例如,盖板对位标记14是尺寸最大的对位标记,并且盖板对位标记14的最大尺寸远大于其它用途的对位标记的最大尺寸。这样有利于提高对位装置对盖板对位标记的识别能力。
例如,如图1A所示,第二边框区中设置有电路板对位标记41(图1A中以两个电路板对位标记41为例,在其它实施例中,电路板对位标记的数量也可以为一个或更多个),电路板对位标记41用于在弯折柔性电路板40的过程中的对位,以使柔性电路板40按照设定的弯曲程度被弯折。例如,电路 板对位标记41在衬底基板11上的正投影与盖板对位标记14在衬底基板11上的正投影间隔开(例如电路板对位标记41位于盖板对位标记14的靠近衬底基板11的边缘11A的一侧),并且电路板对位标记41在衬底基板11上的正投影的最大尺寸小于盖板对位标记14在衬底基板11上的正投影的最大尺寸。由于电路板对位标记41与盖板对位标记14间隔开并且由于电路板对位标记41的尺寸小于盖板对位标记14的尺寸,可以避免电路板对位标记41影响显示基板10与盖板30之间的对位。需要说明的是,正投影的最大尺寸指的是该正投影的轮廓的沿所有方向的尺寸中的最大尺寸,也即该正投影上的两点之间的最大距离。另外,电路板对位标记41和盖板对位标记14可以采用同一种形状(即轮廓的形状相同),或者可以采用不同的形状。
例如,每个盖板对位标记14都为一体化结构。例如,电路板对位标记41也为一体化结构。以盖板对位标记14和电路板对位标记41都为一体化结构为例,如图1A所示,每个盖板对位标记14在衬底基板上的正投影都包括沿第一方向x延伸的第一延伸部和沿第二方向y延伸的第二延伸部,第一延伸部和第二延伸部直接连接,第二延伸部在第二方向y上的最大尺寸为该盖板对位标记14的正投影的最大尺寸;类似地,电路板对位标记41也包括沿第一方向x延伸的第一延伸部和沿第二方向y延伸的第二延伸部,第一延伸部和第二延伸部直接连接,第二延伸部在第二方向y上的最大尺寸为该电路板对位标记41的正投影的最大尺寸;并且,盖板对位标记14的第二延伸部的最大尺寸大于电路板对位标记14的第二延伸部的最大尺寸。需要说明的是,盖板对位标记14的每个延伸部都是不具有封闭的开口的连续结构,从而整个盖板对位标记14的正投影也都是不具有封闭的开口的连续结构。类似地,电路板对位标记41的每个延伸部都是不具有封闭的开口的连续结构,从而整个电路板对位标记41的正投影也都是不具有封闭的开口的连续结构。
例如,盖板对位标记14在衬底基板11上的正投影的最大尺寸为约150微米至600微米,例如300微米-500微米。例如,图1A中的每个盖板对位标记14在第二方向y上具有最大尺寸,并且该最大尺寸约为150微米至600微米,例如300微米-500微米,例如该最大尺寸约为150微米、200微米、250微米、300微米、350微米、400微米、450微米、500微米、550微米或600微米。通过使盖板对位标记14具有较大的尺寸,有利于对位装置识别盖 板对位标记14,从而提高对位精度。需要说明的是,这里的“约”指的是在制作工艺的误差允许范围之内。例如,盖板对位标记14的最大设计尺寸为d,d的范围为150微米至600微米(例如300微米-500微米),但由于制作工艺的影响,制作出的盖板对位标记14的实际最大尺寸可能略微偏离最大设计尺寸,且本公开实施例中盖板对位标记14的实际最大尺寸与最大设计尺寸之差符合误差允许范围的要求。另外,误差允许范围可以根据实际需要进行设置,这里不再赘述。
例如,盖板对位标记14在衬底基板11上的正投影在第一方向x上的最大尺寸也是几百微米级,例如约150微米至600微米,例如约300-500微米,并且盖板对位标记14的正投影在第一方向x上的尺寸小于其在第二方向y上的尺寸,以进一步提高盖板对位标记14的可识别性,从而进一步提高对位精度。
例如,盖板对位标记14在衬底基板11上的正投影包括T字形(如图1A所示)、十字形和L形中的至少一种,或者盖板对位标记14的正投影为任意其它易于识别的形状。例如,盖板对位标记14在衬底基板11上的正投影的形状为一体化结构,例如T字形、十字形或L形都为一体化结构;在其它实施例中,盖板对位标记14在衬底基板11上的正投影的形状也可以包括多个离散的部分,例如对位标记14的正投影包括多个间隔开的同心圆。本公开实施例包括但不限于所列举的这些形状。
例如,在将显示基板10与盖板30对位的过程中,可以在光照条件下利用对位装置进行对位。在这种情况下,为了清楚地识别出盖板对位标记14,例如,盖板对位标记14是不透光的。例如,盖板对位标记14的材料为不透光的金属,以使盖板对位标记14不透光。在其它实施例中,也可以采用非金属类的不透光材料制作盖板对位标记14。
例如,在盖板对位标记14采用金属制作的情况下,可以利用显示基板原有的金属层制作盖板对位标记14,以简化制作工艺。例如,在一些实施例中,显示面板具有触控结构以实现触控功能,该触控结构包括金属层,因此可以利用用于形成该金属层的材料制作盖板对位标记14。
以下结合图1B、图5A和图5B对显示基板包括的触控结构进行举例说明。
例如,如图1B所示,显示基板10包括触控结构15,触控结构15在垂直于衬底基板11的方向上位于封装层EPL与光学胶层20之间。在这种情况下,例如,显示面板可以通过如下方式制作:在衬底基板11上依次制作完缓冲层BF、开关元件19、第一平坦化绝缘层PLN1、第二平坦化绝缘层PLN2、发光器件12以及封装层EPL之后,在形成有封装层EPL的衬底基板11上制作触控结构15,然后将形成有触控结构15的显示基板10与盖板30通过光学胶层20粘贴在一起。与在盖板上制作触控结构然后将形成有触控结构的盖板与显示基板粘贴的方式相比,本公开实施例通过将触控结构15形成在显示基板10中,可以很大程度降低成本,可以使显示面板的集成度更高并且使显示面板更轻薄且更容易折叠。
例如,触控结构15包括至少一个金属层,该至少一个金属层包括盖板对位标记14。通过使盖板对位标记14位于触控结构15包括的金属层中,可以简化制作工艺;另外,由于触控结构15位于封装层EPL与光学胶层20之间,通过使触控结构15包括的金属层包括盖板对位标记14,无需增大边框区的尺寸,有利于实现窄边框设计。类似地,为了进一步简化制作工艺,显示基板10包括的其它对位标记(例如电路板对位标记41)也可以采用显示基板原有的金属层制作;例如,由于显示基板10包括的其它对位标记(例如电路板对位标记41)的尺寸较小,因此该对位标记可以在不增大边框区的空间的前提下利用开关元件19或者发光器件12包括的金属层的形成材料制作。需要注意的是,盖板对位标记14在衬底基板11上的正投影与其它对位标记在衬底基板11上的正投影间隔开,以避免其它对位标记影响显示基板10与盖板30之间的对位。
例如,如图1B所示,触控结构15包括通过中间绝缘层IIL2隔开的两个导电层15A和15B,导电层15B在垂直于衬底基板11的方向上位于导电层15A与衬底基板11之间;这两个导电层15A和15B之一为不透光的金属层且另一个为透明导电层或者这两个导电层都为不透光的金属层。例如,导电层15A为金属层且包括盖板对位标记14。由于导电层15A相比导电层15B更靠近盖板30,因此使盖板对位标记14位于导电层15A中有利于提高对位精度。在其它实施例中,也可以利用使导电层15B包括盖板对位标记14。
例如,如图5A所示,这两个导电层15A和15B的组合包括多列第一触 控电极151A和多行第二触控电极151B以及多个触控信号线152A、152a和152B,第一触控电极151A与第二触控电极151B的延伸方向相交,并且第一触控电极151A与第二触控电极151B都电连接各自对应的触控信号线。例如,每个第一触控电极151A的临近第二边框区的端部电连接直接延伸到第二边框区的触控信号线152a,每个第一触控电极151A的临近第一边框区的端部电连接直接延伸到第一边框区的触控信号线152A,该触控信号线152A从第一边框区进入第三边框区之后进入第二边框区;每个第二触控电极151B的临近第四边框区的端部电连接直接延伸到第四边框区中的触控信号线152B。由于第一触控电极151A的两端都电连接触控信号线,因此可以减小第一触控电极的阻抗。
在其它实施例中,例如,触控结构15包括的触控电极和触控信号线位于同一导电层中且材料相同(即触控电极和触控信号线通过同一导电薄膜形成)。在这种情况下,例如,该同一导电层为金属层。
例如,如图5B所示,触控结构15包括呈矩阵排列的多个触控电极151并且包括多个触控信号线152,每个触控电极151与相应的触控信号线152电连接。例如,图5B中的触控电极151和触控信号线152位于同一导电层中。
由于触控电极(参见图5A中的第一触控电极151A和第二触控电极151B以及图5B中的触控电极151)位于显示区,为避免影响显示,例如,触控电极主要采用ITO(氧化铟锡)或IZO(氧化铟锌)等透明导电材料制作,或者触控电极采用金属材料制作成网格状(如图5B所示,触控电极151具有网格状结构)。由于触控信号线(参见图5A中的触控信号线152A、152a和152B)位于边框区中或者由于触控信号线(参见图5B中的触控信号线152)位于显示区中相邻发光单元12之间的区域中,不影响显示,因此触控信号线例如采用金属材料制作,以减小电阻。
需要说明的是,图5A和图5B所示实施例仅用于举例说明,触控电极及触控信号线的设置方式包括但不限于图5A和图5B所示实施例。
例如,如图1B所示,触控结构15还包括缓冲层BFL,通过使导电层15B直接覆盖在缓冲层BFL的背离封装层EPL的一侧,可以提高导电层15B的附着性,避免导电层15B脱落。例如,缓冲层BFL为氮氧化硅或其它类 似的无机绝缘层。
例如,如图1B所示,触控结构15还包括保护层PL,其位于导电层15A与光学胶层20之间,以保护导电层15A。
例如,如图1C、图1D和图2B所示,显示基板10还包括与发光器件12电连接的电极层延伸部17,电极层延伸部17位于边框区中。例如,电极层延伸部17与发光器件12的第二电极层122(例如阴极)电连接,电极层延伸部17还与引线70(如图1H所示)电连接,因此发光器件12的第二电极层122通过电极层延伸部17电连接引线70。在垂直于衬底基板11的方向上,电极层延伸部17位于盖板对位标记14(参见图1C、1D和2B)与衬底基板11之间;并且,电极层延伸部17在衬底基板11上的正投影与盖板对位标记14在衬底基板11上的正投影交叠。由于第一边框区中信号线分布较密集,因此通过将第一边框区中的盖板对位标记14设置在电极层延伸部17的背离衬底基板11的一侧,可以充分利用第一边框区的空间,无需增大边框区的尺寸(即有利于实现窄边框设计)。
例如,如图1C和图2B所示,电极层延伸部17包括层叠的第一导电层171和第二导电层172,第二导电层172位于第一导电层171的背离衬底基板11的一侧,第二导电层172相对于像素界定层PDL、第一平坦化绝缘层PLN1、第二平坦化绝缘层PLN2等结构中的至少部分具有凹向衬底基板11的部分。例如,如图1C所示,第二导电层172包括的第一子导电层172A、第二子导电层172B以及第三子导电层172C都包括相对于第二平坦化绝缘层PLN2以及像素界定层PDL凹向衬底基板11的部分。例如,如图2B所示,第二导电层172包括的第一子导电层172A、第二子导电层172B以及第三子导电层172C都包括相对于第一平坦化绝缘层PLN1、第二平坦化绝缘层PLN2以及像素界定层PDL凹向衬底基板11的部分。例如,第二导电层172在凹陷区170处电连接第一导电层171,并且盖板对位标记14位于第二导电层172限定的凹陷区170(图1H中虚线B和虚线C之间的区域)中,例如该凹陷区170在衬底基板上的正投影为位于显示区和第二电极层122边缘F的正投影之间的封闭的环形结构。
例如,如图2B所示,第一导电层171延伸到第二坝胶52的远离第一坝胶51的一侧,第一子导电层172A和第二子导电层172B都延伸到显示基板 10的设置有第二坝胶52的区域中,第三子导电层172C延伸到第一坝胶51的远离第二坝胶52的一侧;在这种情况下,例如,从柔性线路板40引出的引线70(如图1H所示)与第一导电层171直接接触,以使引线70通过电极层延伸部17电连接发光器件12的第二电极层122。在其它实施例中,引线70也可以直接接触第一子导电层172A和/或第二子导电层172B,以使引线70通过电极层延伸部17电连接发光器件12的第二电极层122。
在本公开实施例中,第一平坦化绝缘层PLN1、第二平坦化绝缘层PLN2和像素界定层PDL延伸到边框区中并且在该凹陷区170处断开,从而使第一导电层171和第二导电层172在该凹陷区170处交叠且电连接(例如直接接触),通过使电极层延伸部17包括并联的第一导电层171和第二导电层172,可以减小电极层延伸部17的电阻;通过将盖板对位标记14设置在该凹陷区170中,可以避免增大显示基板在该凹陷区170处的厚度,从而有利于实现显示面板的轻薄化。需要说明的是,图2B仅示出了凹陷区170的一部分截面图。
例如,如图1C和图2B所示,第二导电层172包括并联的多个子导电层(例如,该多个子导电层的位于整个凹陷区170处的部分彼此并联)。例如,该多个并联的子导电层包括依次层叠在衬底基板11上的第一子导电层172A、第二子导电层172B和第三子导电层172C,例如第一子导电层172A在凹陷区170处直接接触第二子导电层172B且第二子导电层172B在凹陷区170处直接接触第三子导电层172C,以实现这三个子导电层之间的并联;并且,第一子导电层172A在垂直于衬底基板11的方向上位于第二子导电层172B和衬底基板11之间。通过使第二导电层172包括并联的多个子导电层,可以进一步减小电极层延伸部17的电阻。
例如,如图1B所示,第一导电层171(图1B中未示出)所在的第一源/漏电极层1710包括开关元件19的源极193和漏极194,即第一源/漏电极层1710包括第一导电层171、源极193和漏极194。例如,如图1B所示,第一子导电层172A(图1B中未示出)所在的第二源/漏电极层1721包括连接部194A(即第二源/漏电极层1721包括第一子导电层172A和连接部194A),连接部194A在垂直于衬底基板11的方向上位于第一源/漏电极层1710与第一电极层121之间,并且连接部194A将漏极194与第一电极层121电连接 在一起,这样有利于使漏极194与发光器件12的第一电极层121(例如阳极)之间具有良好的电连接。例如,如图1B所示,第二子导电层172B(图1B中未示出)所在的电极层1722包括发光器件12的第一电极层121(例如阳极),即电极层1722包括第二子导电层172B和第一电极层121。例如,如图1B所示,第三子导电层172C(图1B中未示出)所在的电极层1723包括发光器件12的第二电极层122(例如阴极),即电极层1723包括第三子导电层172C和第二电极层122,例如第三子导电层172C与第二电极层122直接连接。也就是说,第一导电层171与源极193和漏极194同层同材料,并且第一导电层171与源极193/漏极194电绝缘;第二子导电层172B与发光器件12的第一电极层121同层同材料,并且第二子导电层172B与第一电极层121电绝缘;第三子导电层172C与发光器件12的第二电极层122同层同材料,并且第三子导电层172C与发光器件12的第二电极层122电连接(例如,第三子导电层172C与第二电极层122直接连接)。在本公开实施例中,通过利用显示区中的电极层的延伸到边框区中的部分形成电极层延伸部17,可以简化显示面板的制作工艺。
需要说明的是,多个部件同层同材料是指该多个部件在同一次图案化工艺中通过同一薄膜形成;并且,该多个部件可以是并排位于同一层上,或者该多个部件之间存在高度差(即该多个部件到衬底基板11的距离不同),或者该多个部件中的至少一个具有凸起部或凹陷部。
在本公开至少一个实施例中,例如,第二边框区的宽度大于第一边框区的宽度,即第二边框区沿第一方向x的尺寸大于第一边框区沿第一方向x的尺寸,这使得第二边框区中的电极层延伸部17的分布比第一边框区中的电极层延伸部17的分布稀疏,因此第二边框区中的盖板对位标记14可以位于电极层延伸部17所在区域之外的平坦区域内。例如,如图1E和图1F所示,第二边框区中的盖板对位标记未与电极层延伸部17交叠。
例如,在如图1B至1F和图2B所示的显示面板中,在衬底基板11上依次设置有如下结构:缓冲层BF、有源层191、第一栅绝缘层GIL1、栅极192、第二栅绝缘层GIL2、第一中间绝缘层IIL1、包括源极193和漏极194的第一源/漏电极层1710(例如,第一源/漏电极层1710还包括第一导电层171)、钝化绝缘层PVX、第一平坦化绝缘层PLN1、包括连接部194A的第二源/漏 电极层1721(例如,第二源/漏电极层1721还包括第一子导电层172A)、第二平坦化绝缘层PLN2、第一电极层121(例如第一电极层121所在的电极层1722还包括第二子导电层172B)、像素界定层PDL、发光层123、第二电极层122(例如,第二电极层122所在电极层1723还包括第三子导电层172C)、封装层EPL(其例如包括第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2,第一有机封装层EPL3例如未与盖板对位标记14交叠)以及触控结构15(其例如包括缓冲层BFL、导电层15B、第二中间绝缘层IIL2、导电层15A和保护层PL,导电层15B所在层和/或导电层15A所在层例如包括离散的多个盖板对位标记14)。在其它实施例中,显示面板还可以不包括上述结构中的部分结构,或者在上述结构的基础上还包括其它结构,或者显示面板中的上述结构的位置关系可以发生变化。
本公开至少一个实施例还提供一种显示面板,如图1A至图3B所示,该显示面板包括显示基板10、光学胶层20和盖板30。盖板位于光学胶层20的背离显示基板10的一侧,并通过光学胶层20连接显示基板10。
如图1B所示,显示基板10包括柔性的衬底基板11并且包括在衬底基板11上的多个发光器件12(图1B仅示出一个发光器件12进行举例说明)、像素界定层PDL以及封装层EPL,像素界定层PDL隔开该多个发光器件12,封装层EPL位于该多个发光器件12的背离衬底基板11的一侧。封装层EPL的背离衬底基板11的一侧设置有光学胶层20。封装层EPL包括在远离衬底基板11的方向上依次设置的第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2。显示基板10还包括构造为用于显示基板10与盖板30之间对位的多个盖板对位标记14。显示基板10还包括触控结构15,触控结构15在垂直于衬底基板11的方向上位于封装层EPL与光学胶层20之间,触控结构15包括至少一个金属层(图1B以两个金属层15A和15B为例进行说明),该至少一个金属层包括盖板对位标记,该盖板对位标记例如为如图1A、1C至2B中任一实施例中的盖板对位标记14。也就是说,触控结构15包括的该至少一个金属层包括触控电极和触控信号线,触控电极和触控信号线中的至少一个与盖板对位标记14同层同材料,即通过同一薄膜形成。关于触控电极和触控信号线的说明,请参照关于以上实施例中的描述,重复之处这里不再赘述。
在本公开实施例中,由于显示基板10包括的多个盖板对位标记14位于触控结构包括的至少一个金属层中,因此可以在不增大边框区尺寸的前提下使盖板对位标记14具有较大的尺寸,这样便于显示面板包括的显示基板10与盖板30之间的对位,从而可以提高对位精度,以避免显示面板尤其是弯曲显示面板(例如边缘区域弯曲的显示面板)存在的显示区边缘模糊的现象,并且提高生产效率。
例如,如图1A所示,显示面板包括显示区和位于显示区周边的边框区,边框区包括环形的坝胶50和位于坝胶50之外的环形的切割区。显示基板10包括的多个盖板对位标记14中的至少一个在衬底基板11上的正投影位于坝胶50在衬底基板11上的正投影和显示区之间且与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠,和/或,该多个盖板对位标记14中的至少一个位于坝胶50的正投影和切割区之间。
本公开实施例还提供一种上述任一实施例提供的显示面板的制作方法。以如图1A至图3B所示的显示面板为例,该制作方法包括如下步骤。
步骤S1:在柔性的衬底基板11上形成像素界定层PDL。
步骤S2:在衬底基板11上形成多个发光器件12(图1B仅示出1个发光器件12进行举例说明),使像素界定层PDL隔开该多个发光器件12。
步骤S3:在衬底基板11上形成封装层EPL,使封装层EPL位于发光器件12的背离衬底基板11的一侧,封装层EPL包括在远离衬底基板11的方向上依次设置的第一无机封装层EPL1,第一有机封装层EPL3和第二无机封装层EPL2。
步骤S4:在衬底基板11上形成多个盖板对位标记14,其中,该多个盖板对位标记14被配置为用于包括像素界定层PDL、发光器件12、封装层EPL和盖板对位标记14的显示基板与盖板30之间的对位;显示面板包括显示区和位于显示区周边的边框区,边框区包括坝胶50和位于坝胶50的远离显示区一侧的环形的切割区;该多个盖板对位标记14中的至少一个在衬底基板11上的正投影位于坝胶在衬底基板11上的正投影和显示区之间且与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠,和/或,该多个盖板对位标记14中的至少一个位于坝胶50的正投影和切割区之间。
步骤S5:形成位于盖板对位标记14的背离衬底基板11的一侧的光学胶 层20。
步骤S6:利用光学胶层20将形成有盖板对位标记14的显示基板10与盖板30连接,其中,显示基板10包括的衬底基板11在显示基板10与盖板30连接前大致是平的且在显示基板10与盖板30连接后包括弯曲部B(如图3B所示)。
需要说明的是,本公开实施例只是示意性地说明显示面板的制作方法包括上述步骤,并不限定上述步骤的制作顺序,且上述步骤的制作顺序可以根据实际需要进行调整。
例如,如图4所示,盖板30包括位于显示区的窗口部32位于显示区之外的遮光部31(即遮光部31位于边框区),盖板对位标记14在衬底基板11上的正投影位于遮光部31在衬底基板11上的正投影所在区域内。在这种情况下,利用光学胶层20将形成有盖板对位标记14的显示基板10与盖板30连接包括:如图6所示,在光照射盖板30和显示基板10的情况下,利用盖板对位标记14和遮光部31将显示基板10与盖板30进行对位。例如,在光照射盖板30和显示基板10的过程中,对位装置80根据显示基板10包括的多个盖板对位标记14可以计算出显示基板10的显示区的中心,并且该对位装置80根据盖板30中的遮光部31的内边缘31A(即显示区的边缘)可以计算出盖板30的窗口部32的中心;对位装置80通过将显示基板10的显示区的中心与盖板30的窗口部32的中心对准,可以实现显示基板10与盖板30之间的对位;并且,在对位过程中,显示基板10与盖板30通过光学胶层20连接在一起。
例如,如图1B所示,在显示基板10包括触控结构15的情况下,显示基板10的制作方法包括:在衬底基板11上依次形成开关元件19、第一平坦化绝缘层PLN1、第二平坦化绝缘层PLN2、发光器件12(例如发光器件12通过蒸镀工艺形成)和封装层EPL之后,在封装层EPL的远离衬底基板11的一侧形成触控结构15。与在盖板上制作触控结构然后将形成有触控结构的盖板与显示基板粘贴的方式相比,本公开实施例通过将触控结构15形成在显示基板10中,可以很大程度降低成本,可以使显示面板的集成度更高并且使显示面板更轻薄且更容易折叠。
例如,如图1B所示,形成触控结构15包括:在封装层EPL上形成依次 层叠的导电层15B、中间绝缘层IIL2和导电层15A,导电层15B和导电层15A的组合包括盖板对位标记14、触控电极(参见图5A中的151A和151B)和触控信号线(参见图5A中的152A、152a和152B)。通过使盖板对位标记14位于触控结构15包括的导电层中,可以简化制作工艺。
例如,导电层15A为金属层并且包括盖板对位标记14。由于导电层15A相比导电层15B更靠近盖板30,因此使盖板对位标记14位于导电层15A中有利于提高对位精度。
例如,形成触控结构15还包括:将导电层15B直接形成在位于封装层EPL上的缓冲层BFL上,以及在形成导电层15A之后形成覆盖导电层15A的保护层PL。
在另一些实施例中,触控结构15包括形成一个导电层,该导电层为金属层,并且该一个导电层包括盖板对位标记14、触控电极(参见图5B中的151)和触控信号线(参见图5B中的152)。本公开实施例包括但不限于所列举的这些实施例。
例如,如图1A至图3B所示的显示面板的制作方法包括:在衬底基板11上依次形成如下结构:开关元件19(例如,开关元件19包括的源极193和漏极194所在的第一源/漏电极层1710还包括第一导电层171)、钝化绝缘层PVX、第一平坦化绝缘层PLN1、包括连接部194A的第二源/漏电极层1721(例如,第二源/漏电极层1721还包括第一子导电层172A)、第二平坦化绝缘层PLN2、第一电极层121(例如第一电极层121所在的电极层1722还包括第二子导电层172B)、像素界定层PDL、发光层123、第二电极层122(例如,第二电极层122所在电极层1723还包括第三子导电层172C)、封装层EPL(其例如包括第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2,第一有机封装层EPL3例如未与盖板对位标记14交叠)以及触控结构15(其例如包括缓冲层BFL、导电层15B、第二中间绝缘层IIL2、导电层15A和保护层PL,导电层15B所在层和/或导电层15A所在层例如包括盖板对位标记14)。
例如,在形成钝化绝缘层PVX之前,显示面板的制作方法还包括:在衬底基板11上依次形成缓冲层BF、有源层191、覆盖有源层191的第一栅绝缘层GIL1、位于第一栅绝缘层GIL1的背离衬底基板11一侧的栅极192、 覆盖栅极192的第二栅绝缘层GIL2、覆盖第二栅绝缘层GIL2的第一中间绝缘层IIL1以及位于第一中间绝缘层IIL1的背离衬底基板11一侧的第一源/漏电极层1710,第一源/漏电极层1710包括电连接有源层191的源极193和漏极194,例如源极193和漏极194伸入贯穿第一中间绝缘层IIL1、第二栅绝缘层GIL2和第一栅绝缘层GIL1的通孔中以电连接有源层191。
本公开实施例中的显示面板的结构发生变化时,制作方法的上述步骤也相应调整。
本公开至少一个实施例还提供一种对位方法,其例如可以用于如图1A至图3B中任一实施例提供的显示面板的制作工艺中的对位。
如图1A至图3B所示,可以采用该对位方法的该显示面板包括显示基板10、光学胶层20和盖板30。显示面板包括显示区和位于显示区周边的边框区,边框区包括环形的坝胶50和位于坝胶50的远离显示区一侧的环形的切割区。盖板30位于光学胶层20的背离显示基板10的一侧,并且盖板30通过光学胶层20连接显示基板10。如图4所示,盖板30包括位于显示区的窗口部32和位于边框区的遮光部31。显示基板10包括柔性的衬底基板11(图1A中未标出),并且包括设置于衬底基板11上的多个发光器件12(如图1G所示)、像素界定层PDL和封装层EPL。像素界定层PDL用于隔开该多个发光器件12(如图1G所示),即像素界定层PDL用于限定多个子像素区域,每个子像素区域设置有一个发光器件12。封装层EPL位于该多个发光器件12的背离衬底基板11一侧,用于防止空气中的水、氧等腐蚀发光器件12。封装层EPL包括在远离衬底基板11的方向上依次设置的第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2(如图1B所示),即第一无机封装层EPL1、第一有机封装层EPL3和第二无机封装层EPL2到衬底基板11的距离逐渐增大。显示基板10还包括构造为用于显示基板10与盖板30之间对位的多个盖板对位标记14。该多个盖板对位标记14位于边框区中。该多个盖板对位标记14中的至少一个在衬底基板上的正投影位于坝胶50在衬底基板上的正投影和显示区之间(如图1A所示)且与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠(如图1C、1D、1F和2B所示),并且该多个盖板对位标记14中的至少另一个在衬底基板上的正投影位于坝胶50的正投影和切割区之间(如图1A所示);或者,该多个盖板对位标记 14中的至少一个在衬底基板上的正投影位于坝胶50在衬底基板上的正投影和显示区之间且与第二无机封装层EPL2在垂直于衬底基板11的方向上交叠;或者,该多个盖板对位标记14中的至少一个在衬底基板上的正投影位于坝胶50的正投影和切割区之间。
为了形成如图1A至图3B所示显示面板,该对位方法包括:利用光照射用于形成显示面板的显示基板10和盖板30,根据显示基板10包括的多个盖板对位标记14计算出显示基板10的显示区中心;根据盖板30窗口部32(如图4所示)的边缘31A计算出盖板30窗口部32的中心;将显示基板10的显示区的中心与盖板30的窗口部32的中心对准,以实现显示基板10与盖板30之间的对位。
在本公开实施例中,由于显示基板10包括的多个盖板对位标记14中的至少一个的正投影位于坝胶50的正投影与显示区之间和/或该多个盖板对位标记14中的至少一个的正投影位于坝胶50的正投影与切割区之间,因此可以在不增大边框区尺寸的前提下使盖板对位标记14具有较大的尺寸,这样便于显示面板包括的显示基板10与盖板30之间的对位,从而可以提高对位精度,以避免显示面板尤其是弯曲显示面板(例如边缘区域弯曲的显示面板)存在的显示区边缘模糊的现象,并且提高生产效率。
上述显示面板、对位方法与显示面板制作方法的实施例中的相同部件采用相同的设置方式,重复之处不再赘述。
在不冲突的情况下,本发明的实施例及实施例中的特征可以相互组合。
以上所述仅是本发明的示范性实施方式,而非用于限制本发明的保护范围,本发明的保护范围由所附的权利要求确定。

Claims (26)

  1. 一种显示面板,包括:
    显示基板,包括柔性的衬底基板并且包括在所述衬底基板上的多个发光器件、像素界定层以及封装层,所述像素界定层隔开所述多个发光器件,所述封装层位于所述多个发光器件背离所述衬底基板一侧;
    光学胶层,位于所述封装层的背离所述衬底基板的一侧;和
    盖板,位于所述光学胶层的背离所述显示基板的一侧,并通过所述光学胶层连接所述显示基板;其中,
    所述显示面板包括显示区和位于所述显示区周边的边框区;
    所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶的远离所述显示区一侧的环形的切割区;
    所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;
    所述显示基板还包括构造为用于所述显示基板与所述盖板之间对位的多个盖板对位标记;和
    所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和所述显示区之间,和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间。
  2. 根据权利要求1所述的显示面板,其中,所述至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间的盖板对位标记与所述第二无机封装层在垂直于所述衬底基板的方向上无交叠。
  3. 根据权利要求1所述的显示面板,其中,所述至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间的盖板对位标记与所述第二无机封装层在垂直于所述衬底基板的方向上至少部分交叠。
  4. 根据权利要求1-3中任一项所述的显示面板,其中,所述显示基板包括触控结构,所述触控结构在垂直于所述衬底基板的方向上位于所述封装层与光学胶层之间,所述触控结构包括至少一个金属层,所述至少一个金属层 包括所述盖板对位标记。
  5. 根据权利要求1-4中任一项所述的显示面板,其中,所述盖板对位标记在所述衬底基板上的正投影的最大尺寸为150微米-600微米。
  6. 根据权利要求1-5中任一项所述的显示面板,其中,所述盖板对位标记在所述衬底基板上的正投影包括T字形、十字形和L形中的至少一种。
  7. 根据权利要求1-6中任一项所述的显示面板,其中,所述显示基板中直接承载所述盖板对位标记的表面为平坦表面。
  8. 根据权利要求1-7中任一项所述的显示面板,其中,
    所述边框区包括在第一方向上彼此相对的第一边框区和第二边框区;
    所述显示面板还包括柔性电路板,所述柔性电路板与所述第二边框区连接;并且
    所述第一边框区中设置有所述至少一个位于所述坝胶和显示区之间且与所述第二无机封装层在垂直于所述衬底基板的方向上交叠的盖板对位标记,和/或,所述第二边框区中设置有所述至少一个位于所述坝胶和所述切割区之间的盖板对位标记。
  9. 根据权利要求8所述的显示面板,其中,
    所述边框区还包括在不同于第一方向的第二方向上彼此相对的第三边框区和第四边框区,所述显示面板在所述第三边框区和所述第四边框区中的至少之一中包括弯曲部,且与所述弯曲部对应的盖板的部分是弯曲的;
    所述显示面板还包括栅极驱动器,其位于所述第三边框区和所述第四边框区中的至少一个中;和
    所述盖板对位标记位于所述第三边框区和所述第四边框区之外。
  10. 根据权利要求8或9所述的显示面板,其中,
    所述多个盖板对位标记包括四个盖板对位标记,所述四个盖板对位标记沿逆时针方向分别编号为第一盖板对位标记、第二盖板对位标记、第三盖板对位标记和第四盖板对位标记,所述第一盖板对位标记和所述第四盖板对位标记位于所述第一边框区中,所述第二盖板对位标记和所述第三盖板对位标记位于所述第二边框区中;
    相对于与所述第一方向平行的轴线,所述第一盖板对位标记和所述第二盖板对位标记的组合与所述第三盖板对位标记和所述第四盖板对位标记的组 合彼此对称。
  11. 根据权利要求8-10中任一项所述的显示面板,其中,
    所述显示基板还包括与所述发光器件电连接的电极层延伸部,所述电极层延伸部位于所述边框区中;
    在垂直于所述衬底基板的方向上,所述电极层延伸部位于所述盖板对位标记与所述衬底基板之间;
    所述电极层延伸部在所述衬底基板上的正投影与所述盖板对位标记在所述衬底基板上的正投影交叠。
  12. 根据权利要求11所述的显示面板,其中,所述电极层延伸部包括层叠的第一导电层和第二导电层,所述第二导电层位于所述第一导电层的背离所述衬底基板的一侧,所述第二导电层具有凹向所述衬底基板的部分,所述部分电连接所述第一导电层,并且所述盖板对位标记位于所述部分限定的凹陷区中。
  13. 根据权利要求12所述的显示面板,其中,所述第二导电层包括依次设置于所述衬底基板上且并联的第一子导电层、第二子导电层和第三子导电层;
    所述第一子导电层在垂直于所述衬底基板的方向上位于所述第二子导电层和所述衬底基板之间。
  14. 根据权利要求13所述的显示面板,其中,所述显示面板还包括至少一个开关元件,所述开关元件包括栅极、源极和漏极;所述发光器件包括第一电极层和第二电极层,所述第一导电层与所述源极和漏极同层同材料,所述第二子导电层与所述第一电极层同层同材料,第三子导电层与所述发光器件的所述第二电极层同层同材料。
  15. 根据权利要求8-14中任一项所述的显示面板,其中,
    所述第二边框区中设置有构造为用于所述柔性电路板的弯折的电路板对位标记,所述电路板对位标记在所述衬底基板上的正投影与所述盖板对位标记在所述衬底基板上的正投影间隔开;并且
    所述电路板对位标记在所述衬底基板上的正投影具有最大尺寸,所述盖板对位标记在所述衬底基板上的正投影具有最大尺寸,所述电路板对位标记的所述最大尺寸小于所述盖板对位标记的所述最大尺寸。
  16. 根据权利要求1-15中任一项所述的显示面板,其中,
    所述盖板包括位于所述显示区的窗口区和位于显示区之外的遮光部;
    所述盖板对位标记在所述衬底基板上的正投影位于所述遮光部在所述衬底基板上的正投影所在区域内。
  17. 根据权利要求1-16中任一项所述的显示面板,其中,每个盖板对位标记都为一体化结构。
  18. 根据权利要求1-17中任一项所述的显示面板,其中,所述盖板对位标记的材料为金属。
  19. 根据权利要求1-18中任一项所述的显示面板,其中,所述盖板对位标记是不透光的。
  20. 一种显示面板的制作方法,包括:
    在柔性的衬底基板上形成像素界定层;
    在所述衬底基板上形成多个发光器件,其中,所述像素界定层隔开所述多个发光器件;
    在所述衬底基板上形成封装层,其中,所述封装层位于所述多个发光器件的背离所述衬底基板一侧,所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;
    在所述衬底基板上形成多个盖板对位标记,其中,所述多个盖板对位标记被配置为用于包括所述像素界定层、所述多个发光器件、所述封装层和所述盖板对位标记的显示基板与盖板之间的对位;所述显示面板包括显示区和位于所述显示区周边的边框区;所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶远离所述显示区一侧的环形的切割区;所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和显示区之间,和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间;
    形成位于所述盖板对位标记的背离所述衬底基板的一侧的光学胶层;
    利用所述光学胶层将形成有所述盖板对位标记的显示基板与所述盖板连接,其中,所述显示基板包括的所述衬底基板在所述显示基板与所述盖板连接前是平的且在所述显示基板与所述盖板连接后包括弯曲部。
  21. 根据权利要求20所述的制作方法,其中,
    所述盖板包括位于所述显示区的窗口部和位于所述显示区之外的遮光部,所述盖板对位标记在所述衬底基板上的正投影位于所述遮光部在所述衬底基板上的正投影所在区域内。
  22. 据权利要求20或21所述的制作方法,其中,所述利用所述光学胶层将形成有所述盖板对位标记的所述显示基板与所述盖板连接包括:利用光照射所述盖板和所述显示基板实现所述显示基板与所述盖板的对位。
  23. 据权利要求22所述的制作方法,其中,在光照射所述显示基板和所述盖板的情况下,利用对位装置根据所述多个盖板对位标记计算出所述显示基板的显示区中心,利用所述对位装置根据所述盖板窗口部的边缘计算出所述盖板窗口部的中心;并利用对位装置将所述显示基板显示区中心与所述盖板窗口部中心对准,以实现显示基板与所述盖板之间的对位。
  24. 一种对位方法,包括:
    利用光照射用于形成显示面板的显示基板和盖板,其中,所述显示面板具有显示区和位于所述显示区周边的边框区,所述显示面板包括所述显示基板、所述盖板和连接所述显示基板和所述盖板的光学胶层,所述显示基板包括多个盖板对位标记,所述盖板包括位于所述显示区的窗口部和位于所述边框区的遮光部;
    根据所述多个盖板对位标记计算出所述显示基板的显示区中心;
    根据所述盖板窗口部的边缘计算出所述盖板窗口部的中心;
    将所述显示基板显示区中心与所述盖板窗口部中心对准,以实现显示基板与所述盖板之间的对位,
    其中,
    所述显示基板包括柔性的衬底基板并且包括在所述衬底基板上的多个发光器件、像素界定层以及封装层,所述像素界定层隔开所述多个发光器件,所述封装层位于所述多个发光器件背离所述衬底基板一侧;
    所述光学胶层位于所述封装层的背离所述衬底基板的一侧;
    所述盖板位于所述光学胶层的背离所述显示基板的一侧;
    所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;
    所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶的远离所述显示区一侧的环形的切割区;
    所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和显示区之间,和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间。
  25. 一种显示面板,包括:
    显示基板,包括柔性的衬底基板并且包括在所述衬底基板上的多个发光器件、像素界定层以及封装层,其中,所述像素界定层隔开所述多个发光器件,所述封装层位于所述多个发光器件的背离所述衬底基板一侧;
    光学胶层,位于所述封装层的背离所述衬底基板的一侧;和
    盖板,位于所述光学胶层的背离所述显示基板的一侧,并通过所述光学胶层连接所述显示基板;其中,
    所述封装层包括在远离所述衬底基板的方向上依次设置的第一无机封装层、第一有机封装层和第二无机封装层;和
    所述显示基板还包括构造为用于所述显示基板与所述盖板之间对位的多个盖板对位标记并且还包括触控结构,所述触控结构在垂直于所述衬底基板的方向上位于所述封装层与光学胶层之间,所述触控结构包括至少一个金属层,所述至少一个金属层包括所述盖板对位标记。
  26. 根据权利要求25所述的显示面板,其中,
    所述显示面板包括显示区和位于所述显示区周边的边框区,所述边框区包括环形的坝胶所在的坝胶区和位于所述坝胶的远离所述显示区一侧环形的切割区;
    所述多个盖板对位标记中的至少一个与所述第二无机封装层在垂直于所述衬底基板的方向上交叠且在所述衬底基板上的正投影位于所述坝胶在所述衬底基板上的正投影和显示区之间,和/或,所述多个盖板对位标记中的至少一个在所述衬底基板上的正投影位于所述坝胶的所述正投影和所述切割区之间。
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CN105116580A (zh) * 2015-08-21 2015-12-02 昆山龙腾光电有限公司 触控显示面板及盖板玻璃与液晶面板的贴合方法
CN110085632A (zh) * 2015-12-31 2019-08-02 乐金显示有限公司 有机发光显示装置
KR20190057829A (ko) * 2017-11-21 2019-05-29 엘지디스플레이 주식회사 표시장치
CN110085629A (zh) * 2018-01-25 2019-08-02 三星显示有限公司 显示装置
CN109560113A (zh) * 2018-12-04 2019-04-02 武汉华星光电半导体显示技术有限公司 柔性oled显示装置
CN109830521A (zh) * 2019-03-29 2019-05-31 武汉天马微电子有限公司 有机发光显示面板和显示装置

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CN113437048A (zh) * 2021-06-28 2021-09-24 武汉华星光电半导体显示技术有限公司 显示装置
WO2023272868A1 (zh) * 2021-06-28 2023-01-05 武汉华星光电半导体显示技术有限公司 显示装置

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