WO2021100826A1 - 受光素子、測距モジュール - Google Patents

受光素子、測距モジュール Download PDF

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Publication number
WO2021100826A1
WO2021100826A1 PCT/JP2020/043269 JP2020043269W WO2021100826A1 WO 2021100826 A1 WO2021100826 A1 WO 2021100826A1 JP 2020043269 W JP2020043269 W JP 2020043269W WO 2021100826 A1 WO2021100826 A1 WO 2021100826A1
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Prior art keywords
light
receiving element
light receiving
semiconductor layer
optical center
Prior art date
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Ceased
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PCT/JP2020/043269
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English (en)
French (fr)
Japanese (ja)
Inventor
拓郎 村瀬
悠介 大竹
壽史 若野
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Sony Semiconductor Solutions Corp
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Sony Semiconductor Solutions Corp
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Application filed by Sony Semiconductor Solutions Corp filed Critical Sony Semiconductor Solutions Corp
Priority to JP2021558455A priority Critical patent/JP7656541B2/ja
Priority to KR1020227016313A priority patent/KR20220099974A/ko
Priority to US17/776,383 priority patent/US20220397651A1/en
Priority to EP20889716.5A priority patent/EP4063784A4/en
Priority to CN202080078468.6A priority patent/CN114667607A/zh
Publication of WO2021100826A1 publication Critical patent/WO2021100826A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H10F39/186—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors having arrangements for blooming suppression
    • H10F39/1865—Overflow drain structures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C3/00—Measuring distances in line of sight; Optical rangefinders
    • G01C3/02—Details
    • G01C3/06—Use of electric means to obtain final indication
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/483—Details of pulse systems
    • G01S7/486—Receivers
    • G01S7/4861—Circuits for detection, sampling, integration or read-out
    • G01S7/4863—Detector arrays, e.g. charge-transfer gates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C3/00—Measuring distances in line of sight; Optical rangefinders
    • G01C3/02—Details
    • G01C3/06—Use of electric means to obtain final indication
    • G01C3/08—Use of electric radiation detectors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
    • G01S17/06—Systems determining position data of a target
    • G01S17/08—Systems determining position data of a target for measuring distance only
    • G01S17/10—Systems determining position data of a target for measuring distance only using transmission of interrupted, pulse-modulated waves
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/88—Lidar systems specially adapted for specific applications
    • G01S17/89—Lidar systems specially adapted for specific applications for mapping or imaging
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    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/88—Lidar systems specially adapted for specific applications
    • G01S17/93—Lidar systems specially adapted for specific applications for anti-collision purposes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/88—Lidar systems specially adapted for specific applications
    • G01S17/93—Lidar systems specially adapted for specific applications for anti-collision purposes
    • G01S17/931—Lidar systems specially adapted for specific applications for anti-collision purposes of land vehicles
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/481—Constructional features, e.g. arrangements of optical elements
    • G01S7/4816—Constructional features, e.g. arrangements of optical elements of receivers alone
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/483—Details of pulse systems
    • G01S7/486—Receivers
    • G01S7/4861—Circuits for detection, sampling, integration or read-out
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/57—Control of the dynamic range
    • H04N25/59—Control of the dynamic range by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/778—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H10F39/184—Infrared image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/802—Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes
    • H10F39/8027—Geometry of the photosensitive area
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H10F39/8037—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/805—Coatings
    • H10F39/8057—Optical shielding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/806—Optical elements or arrangements associated with the image sensors
    • H10F39/8063—Microlenses
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J2001/4446—Type of detector
    • G01J2001/446—Photodiode
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J2001/4446—Type of detector
    • G01J2001/4473—Phototransistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/199—Back-illuminated image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/807—Pixel isolation structures

Definitions

  • the technique (the present technique) according to the present disclosure relates to, for example, a light receiving element forming a gate type indirect ToF (Time of Flight) and a ranging module including the light receiving element.
  • a light receiving element forming a gate type indirect ToF (Time of Flight) and a ranging module including the light receiving element.
  • a gate type indirect ToF sensor As a light receiving element forming a gate type indirect ToF method (in the following description, it may be referred to as a "gate type indirect ToF sensor"), for example, there is one having a configuration disclosed in Patent Document 1.
  • the gate type indirect ToF sensor disclosed in Patent Document 1 in a pixel having a plurality of floating diffusions in a unit pixel, each floating diffusion is sandwiched between transfer gates of different transfer transistors.
  • Patent Document 1 has a problem that the parasitic light sensitivity is not uniformly relaxed because a plurality of transfer gates sandwiching the floating diffusion are arranged line-symmetrically with respect to the optical center. ..
  • the purpose of this technique is to provide a light receiving element capable of uniformly alleviating parasitic light sensitivity and a distance measuring module.
  • the light receiving element includes a plurality of transfer gates that distribute and transfer the signal charge accumulated in the photodiode that photoelectrically converts the incident light to a plurality of floating diffusions. Further, at least two of the plurality of transfer gates are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of light.
  • the ranging module includes a light receiving element provided with a plurality of transfer gates, a light emitting unit that irradiates irradiation light whose brightness fluctuates periodically, and a light emission control unit that controls the irradiation timing of the irradiation light. And.
  • the plurality of transfer gates distribute and transfer the signal charge accumulated in the photodiode that photoelectrically converts the incident light to the plurality of floating diffusions. Further, at least two of the plurality of transfer gates are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of light.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment. It is a figure which shows the state which the transfer gate is closed in the modification of 1st Embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment. It is a top view which shows the structure of the light receiving element which concerns on the modification of 1st Embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment.
  • It is a top view which shows the structure of the light receiving element which concerns on the modification of 1st Embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment.
  • It is a top view which shows the structure of the light receiving element which concerns on the modification of 1st Embodiment.
  • It is a figure which shows the state which opened the transfer gate in the modification of 1st Embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment. It is a figure which shows the state which the transfer gate is closed in the modification of 1st Embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment. It is a top view which shows the structure of the light receiving element which concerns on the modification of 1st Embodiment. It is a top view which shows the structure of the light receiving element which concerns on the modification of 1st Embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment.
  • FIG. 5 is a cross-sectional view showing the movement of electric charges in a modified example of the first embodiment.
  • the distance measuring module 1 includes a light emitting unit 2, a light emitting control unit 4, and a light receiving element 10.
  • the distance measuring module 1 irradiates the object whose distance is to be measured with the light emitted from the light emitting unit 2, and measures the distance to the object using the light reflected by the object and incident on the light receiving element 10. It is a device for.
  • the light emitting unit 2 has a light source that emits light set to a predetermined wavelength, and emits irradiation light whose brightness fluctuates periodically to irradiate an object.
  • the light source includes, for example, a light emitting diode that emits infrared light having a wavelength set in the range of 780 [nm] or more and 1000 [nm] or less. Further, the light emitting unit 2 generates irradiation light in synchronization with the light emission control signal CKp of the rectangular wave supplied from the light emission control unit 4.
  • the light emission control unit 4 controls the irradiation timing of the irradiation light by supplying the light emission control signal CLKp to the light emitting unit 2 and the light receiving element 10.
  • the frequency of the light emission control signal CLKp is, for example, 20 [MHz].
  • the frequency of the light emission control signal CLKp is not limited to 20 [MHz], but may be 5 [MHz] or the like.
  • the light emission control signal CLKp is not limited to a rectangular wave as long as it is a periodic signal.
  • the light emission control signal CLKp may be a sine wave.
  • the light receiving element 10 receives the reflected light reflected from the object, calculates the distance information for each pixel according to the light receiving result, and generates a depth image in which the distance to the object is represented by a gradation value for each pixel. Output. Further, the light receiving element 10 is formed by using, for example, a back-illuminated gate type indirect ToF sensor. Further, the light receiving element 10 calculates distance information for each pixel from, for example, a signal intensity detected by one pixel formed by arranging a plurality of unit pixels based on the light emission control signal CLKp. Further, as shown in FIGS.
  • the light receiving element 10 includes a first semiconductor layer 10A, a second semiconductor layer 10B, and a light-shielding film 20. Note that FIGS. 2 to 4 show a configuration corresponding to one pixel formed by arranging a plurality of (four) unit pixels among the light receiving elements 10.
  • the first semiconductor layer 10A is a substrate on which a pixel circuit including a photodiode PD and a plurality of floating diffusion FDs is arranged. Further, the first semiconductor layer 10A has a plurality of transfer gates TG and a plurality of overflow gates OFG.
  • the second semiconductor layer 10B is a substrate laminated on a surface (lower surface in FIG. 2) opposite to the surface on which the photodiode PD of the first semiconductor layer 10A is arranged. Further, the second semiconductor layer 10B has a plurality of reset transistors RST, a plurality of amplification transistors AMP, and a plurality of selection transistors SEL. In FIG. 2, the direction in which the first semiconductor layer 10A and the second semiconductor layer 10B are laminated is referred to as a “lamination direction”.
  • the light-shielding film 20 is arranged at a position closer to the position where the light of the light receiving element 10 is incident than the photodiode PD. Further, the light-shielding film 20 is a film that blocks the range of light incident on the photodiode PD within a preset range. The light incident on the light receiving element 10 passes through the on-chip lens 30 and the antireflection layer 40 and is incident on the light shielding film 20.
  • the on-chip lens 30 is a lens having a function of condensing light toward the photodiode PD. Further, the on-chip lens 30 is arranged on the side of the light receiving element 10 on which the light of the photodiode PD is incident.
  • the material of the on-chip lens 30 for example, an organic material, a silicon oxide film (SiO 2 ), or the like can be used.
  • the photodiode PD photoelectrically converts the light incident on the light passing through the range set by the light-shielding film 20, and generates and stores an electric charge corresponding to the amount of light of the photoelectric conversion. Further, as shown in FIG. 5, the photodiode PD is connected to the transfer gate TG and the overflow gate OFG. Further, the photodiode PD is formed by using Si, Ge or the like in a separation region formed by using P-type ions or the like. Further, an active region (depletion layer) is formed on the photodiode PD by applying a gate potential.
  • the floating diffusion FD is formed at a point (connection point) connecting the transfer gate TG, the selection transistor SEL, and the amplification transistor AMP.
  • connection point connecting the transfer gate TG, the selection transistor SEL, and the amplification transistor AMP.
  • the floating diffusion FD accumulates the electric charge transferred from the photodiode PD via the transfer gate TG and converts it into a voltage. That is, the signal charge accumulated in the photodiode PD is transferred to the floating diffusion FD.
  • the plurality of transfer gates TGs are connected to the photodiode PD and the floating diffusion FD, respectively. Further, the transfer gate TG is formed by using polysilicon, for example. In the first embodiment, as an example, a case where the number of transfer gates TG is four will be described as shown in FIG.
  • each transfer gate TG distributes and transfers the signal charge accumulated in the photodiode PD to a plurality of floating diffusion FDs according to a drive signal supplied from a timing control unit (not shown).
  • a timing control unit not shown.
  • the transfer gate TG that transfers the signal charge to the first floating diffusion FDA is two transfer gate TGs (transfer gate TGA, transfer gate TGB) will be described.
  • the transfer gate TG that transfers the signal charge to the second floating diffusion FDB is two transfer gates TG (transfer gate TGC and transfer gate TGD) will be described.
  • the plurality of transfer gates TGs transfer the signal charges accumulated in the photodiode PD to one floating diffusion FD. Further, the plurality of transfer gates TGs are arranged point-symmetrically with respect to the optical center OPC as shown in FIG. 4 when viewed from the incident direction of the light incident on the light receiving element 10.
  • the optical center OPC is, for example, the center of the photodiode PD as viewed from the incident direction of light.
  • the present invention is not limited to this, and the optical center OPC may be, for example, the center of the on-chip lens 30 viewed from the incident direction of light.
  • the four transfer gates TG are arranged at positions that form quadrangular vertices with reference to the optical center OPC as shown in FIG. 4 when viewed from the incident direction of the light incident on the light receiving element 10. That is, the four transfer gates TG are arranged on two virtual straight lines orthogonal to each other with the optical center OPC as an intersection.
  • Each of the plurality of overflow gate OFGs discharges the overflowing charge from the floating diffusion FD according to a drive signal supplied from a timing control unit (not shown). Further, the overflow gate OFG is formed by using polysilicon, for example. In the first embodiment, as an example, a case where the number of overflow gate OFGs is four will be described as shown in FIG.
  • the total number of transfer gate TG and overflow gate OFG is an even number. Further, in the first embodiment, the total number of transfer gates TG and the total number of overflow gate OFGs are the same number. Further, the plurality of overflow gate OFGs are arranged point-symmetrically with respect to the optical center OPC at a position different from that of the transfer gate TG as shown in FIG. 4 when viewed from the incident direction of the light incident on the light receiving element 10. ing. In the first embodiment, as shown in FIG. 4, the transfer gate TG and the overflow gate OFG are alternately arranged along a circle centered on the optical center OPC when viewed from the incident direction of the light incident on the light receiving element 10. The case where it is arranged will be described.
  • the plurality of reset transistors RST are connected to the transfer gate TG and the power supply wiring VDD, respectively.
  • the number of reset transistors RST is four will be described as shown in FIG.
  • each reset transistor RST turns on or off the discharge of the electric charge accumulated in the floating diffusion FD according to the drive signal supplied from the timing control unit. Further, the plurality of reset transistors RST are arranged point-symmetrically with respect to the optical center OPC as shown in FIG. 4 when viewed from the incident direction of the light incident on the light receiving element 10.
  • the plurality of amplification transistors AMP are connected to the floating diffusion FD, the power supply wiring VDD, and the selection transistor SEL, respectively.
  • the number of amplification transistors AMP is four will be described as shown in FIG.
  • each amplification transistor AMP reads out the potential of the floating diffusion FD reset by the reset transistor RST as a reset level. Further, each amplification transistor AMP amplifies the voltage corresponding to the signal charge stored in the floating diffusion FD to which the signal charge is transferred by the transfer gate TG. That is, each amplification transistor AMP reads the signal charge transferred to the floating diffusion FD as an electric signal, and further amplifies the read electric signal.
  • the voltage (voltage signal) amplified by the amplification transistor AMP is output to the vertical signal line VSL via the selection transistor SEL.
  • the vertical signal line VSL is a wiring that outputs an electric signal amplified by the amplification transistor AMP.
  • a selection transistor SEL and an A / D converter are connected to the vertical signal line VSL.
  • the plurality of amplification transistors AMP are arranged point-symmetrically with respect to the optical center OPC as shown in FIG. 4 when viewed from the incident direction of the light incident on the light receiving element 10.
  • the plurality of selection transistors SEL are connected to the amplification transistor AMP and the vertical signal line VSL, respectively.
  • the number of selective transistors SEL is four will be described.
  • each selection transistor SEL turns on or off the output of the voltage signal from the amplification transistor AMP to the vertical signal line VSL according to the drive signal supplied from the timing control unit.
  • each selection transistor SEL becomes conductive when a selection control signal is given, and selects a unit pixel in synchronization with vertical scanning by a vertical scanning circuit (not shown).
  • the plurality of selection transistors SEL are arranged point-symmetrically with respect to the optical center OPC as shown in FIG. 4 when viewed from the incident direction of the light incident on the light receiving element 10.
  • the configuration included in one pixel is arranged at least one of left-right symmetry and vertical symmetry with respect to one pixel which is the smallest unit.
  • the configuration included in one pixel is a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL.
  • ⁇ Operation timing of transfer gate and overflow gate The timing at which each transfer gate TG and the overflow gate OFG operate according to the drive signal supplied from the timing control unit is controlled, for example, at the timing shown in FIG. Specifically, the transfer gate TGA and the transfer gate TGB that transfer the signal charge to the first floating diffusion FDA operate at the same timing. Similarly, the transfer gate TGC and the transfer gate TGD that transfer the signal charge to the second floating diffusion FDB operate at the same timing.
  • the operations performed by the transfer gate TGA and the transfer gate TGB and the operations performed by the transfer gate TGC and the transfer gate TGD are opposite operations. That is, at the timing when the transfer gate TGA and the transfer gate TGB transfer the signal charge to the first floating diffusion FDA, the transfer gate TGC and the transfer gate TGD do not transfer the signal charge to the second floating diffusion FDB. Further, the timing at which the overflow gate OFG discharges the overflowing charge from the floating diffusion FD is different from the timing at which each transfer gate TG transfers the signal charge to the floating diffusion FD.
  • the ToF method is one of the methods for measuring the distance to an object and the three-dimensional shape of the object.
  • the ToF method is a method of irradiating an object with light, analyzing the reflected light, and measuring the distance (depth) to the object and the shape of the object.
  • the outline of the distance (depth) measurement process by the ToF method will be described with reference to FIG. 7.
  • the three-dimensional shape measurement process is not particularly mentioned, but the three-dimensional shape of the object can be measured by measuring the distance of the object surface over the entire surface of the object.
  • FIG. 7 shows the light emitting unit 2, the light receiving element 10 (camera), and the object OBJ.
  • the light output from the light emitting unit 2 is reflected by the object OBJ and is incident on the light receiving element 10.
  • the distance (depth) d from the light receiving element 10 to the object OBJ is measured by measuring the time ⁇ t until the light output from the light emitting unit 2 is reflected by the object OBJ and is incident on the light receiving element 10. It is possible.
  • the light emitting unit 2 and the light receiving element 10 are shown at positions slightly separated from each other.
  • the light emitting timing of the light emitting unit 2 and the imaging timing by the light receiving element 10 are controlled by one clock, the light emitting unit 2 and the light receiving element 10 are located at substantially the same position such as in the same device. It is composed. Therefore, the time ⁇ t until the output light from the light emitting unit 2 is reflected by the object OBJ and is incident on the light receiving element 10 travels twice as long as the distance (depth) d from the light receiving element 10 to the object OBJ. It will be time. This is the reason why (1/2) is multiplied in the calculation formula of the distance d in (Equation 1).
  • the time ⁇ t is a very short time, and it is difficult to accurately measure this time ⁇ t. Therefore, in reality, the pulsed light is emitted from the light emitting unit 2, and the time difference of the pulsed light received by the light receiving element 10 is converted into a phase difference to obtain the distance. This process will be described with reference to FIG.
  • FIG. 8 as in FIG. 7, a light source (light emitting unit) 1, a camera (light receiving unit) 2, and an object OBJ are shown.
  • the pulsed light is emitted from the light emitting unit 2, and the pulsed light reflected by the object OBJ and returned is received by the light receiving element 10.
  • the time difference between the output pulsed light of the light emitting unit 2 and the input pulsed light of the light receiving element 10 is converted into a phase difference for observation.
  • the light emitting unit 2 blinks at a high speed at a known frequency fHz. That is, one cycle of the light emitting pattern of the light emitting unit 2 is 1 / f second.
  • the light receiving element 10 measures the phase of the blinking pattern of light for each pixel. A specific example of the configuration related to phase measurement in pixel units will be described later.
  • the light receiving element 10 described with reference to FIGS. 7 and 8 is a ToF camera different from a normal camera, and each pixel repeats ON / OFF at high speed and accumulates electrification only during the ON period.
  • the ON / OFF execution timing is sequentially switched to analyze the accumulated charge at each timing.
  • the ON / OFF execution timing switching patterns are, for example, the following four types shown in the left figure in FIG. 9. (C1) Phase 0 degrees (c2) Phase 90 degrees (c3) Phase 180 degrees (c4) Phase 270 degrees
  • the phase 0 degree is set so that the ON timing (light receiving timing) is the phase of the pulsed light output by the light emitting unit 2, that is, the same phase as the light emitting pattern (a) shown in the figure on the left of FIG.
  • the phase of (c2) 90 degrees is set so that the ON timing (light receiving timing) is 90 degrees behind the pulsed light ((a) light emitting pattern) output by the light emitting unit 2.
  • the phase of 180 degrees is set so that the ON timing (light receiving timing) is 180 degrees behind the pulsed light ((a) light emitting pattern) output by the light emitting unit 2.
  • the phase of 270 degrees is set so that the ON timing (light receiving timing) is 270 degrees behind the pulsed light ((a) light emitting pattern) output by the light emitting unit 2.
  • these four types of switching are sequentially executed to acquire the light receiving amount in which the light receiving timing is changed. That is, four types of light-receiving amounts with different accumulation phases and charges corresponding to the light-received amounts are obtained. For example, let the charges accumulated when the phase difference of the light receiving pixels with respect to the light emission pattern be 0 , 90 , 180 , and 270 degrees be Q 0, Q 90, Q 180, and Q 270, respectively.
  • phase difference ⁇ required to calculate the distance d to the object by applying is the difference between the phase of the output pulsed light of the light emitting unit 2 and the phase of the received pulsed light of the light receiving element 10. Is.
  • This phase difference ⁇ can be calculated based on the following (Equation 4).
  • ⁇ Arctan ((Q 90- Q 270 ) / (Q 180- Q 0 )) ... (Equation 4)
  • the light receiving element 10 It is possible to calculate the distance d from (or the light emitting unit 2) to the object OBJ.
  • each of the image frames taken by the ToF camera that is, the amount of phase shift (0 degree, 90 degree, 180 degree, 270 degree) from the light emission pattern (pulse).
  • the captured image of the phase setting and the accumulated charge of each captured image are called components.
  • FIG. 10 is a diagram showing image data taken by a camera (ToF camera) according to a time axis shown from left to right. Captured images with each phase setting of the amount of phase shift (0, 90 degrees, 180 degrees, 270 degrees) from the light emission pattern (pulse) are sequentially and repeatedly photographed.
  • a set of a combination of components with phase settings of 0 degree, 90 degree, 180 degree, and 270 degree is called a frame. That is, one frame has accumulated charge information of captured images set to each phase of 0 degree, 90 degree, 180 degree, and 270 degree, which are out of phase with the light emission pattern (pulse).
  • Q 0 , Q 90 , Q 180 , Q Has 270 is set to be shorter than the time between frames.
  • the ON / OFF timing of the light emission pulse of the light source and the ON / OFF timing of the pixel executed in the camera may be controlled based on one clock, that is, they may be executed in synchronization. ..
  • the light receiving element 10 of the first embodiment has a high photoelectric conversion rate particularly for light having a low wavelength even if the thickness of the silicon oxide film is increased.
  • the light receiving element 10 of the first embodiment can exhibit the following actions and effects.
  • a plurality of transfer gates TGs are provided, which distribute and transfer the signal charges accumulated in the photodiode PD that photoelectrically converts the incident light to a plurality of floating diffusion FDs.
  • at least two of the plurality of transfer gates TGs are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light. This makes it possible to provide a light receiving element 10 capable of uniformly reducing the parasitic light sensitivity.
  • the number of transfer gates TGs is four, and the four transfer gates TGs are arranged at positions that form quadrangular vertices with reference to the optical center OPC when viewed from the incident direction of light. This makes it easy to secure the distance from the optical center OPC to the floating diffusion FD, and it is possible to suppress an increase in parasitic light sensitivity.
  • a plurality of overflow gate OFGs for discharging the overflowing charges from the floating diffusion FD are further provided.
  • at least two of the plurality of overflow gate OFGs are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light.
  • the gate type indirect ToF sensor obtains a plurality of phase signals by distributing the electric charge generated by the photodiode PD to a plurality of floating diffusion FDs by the plurality of transfer gates TGs.
  • the distance measurement is performed using a plurality of phase signals, it is necessary to distribute the electric charge to each transfer gate TG at high speed, and high robustness against transfer failure is required. Therefore, there is a problem that the robustness against transfer failure is lowered when the masks are misaligned.
  • the light receiving element 10 of the first embodiment at least two of the plurality of overflow gate OFGs are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light. It becomes possible to solve the problem of.
  • the transfer path for transferring the signal charge to the floating diffusion FD can be configured to be able to avoid being divided. ..
  • the total number of transfer gate TG and overflow gate OFG is an even number. This makes it possible to suppress a decrease in charge separation efficiency (Cmod) due to process deviation. Further, it becomes easy to maintain point symmetry with respect to the optical center OPC with respect to the plurality of transfer gates TG and overflow gate OFG.
  • the optical center OPC is set to one pixel formed by arranging a plurality of unit pixels. This makes it possible to apply a structure in which the transfer gate TG or the like is arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light to one light receiving element 10, and the parasitic light sensitivity is uniform. It becomes possible to relax.
  • a plurality of amplification transistors AMP that read out and amplify the signal charge transferred to the floating diffusion FD as an electric signal are further provided.
  • at least two of the plurality of amplification transistors AMP are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light.
  • a plurality of selection transistors SEL for turning on or off the output of the voltage signal from the amplification transistor AMP are further provided.
  • at least two of the plurality of selection transistors SEL are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light.
  • a plurality of reset transistors RST for turning on or off the discharge of electric charges stored in the floating diffusion FD are further provided.
  • at least two of the plurality of reset transistors RST are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light.
  • a light-shielding film 20 that shields the range of light incident on the photodiode PD within a preset range is further provided. As a result, the light reflected by the object and incident on the light receiving element 10 can be efficiently incident on the photodiode PD.
  • the first semiconductor layer 10A has a plurality of transfer gates TG and a plurality of overflow gates OFG.
  • the second semiconductor layer 10B laminated on the first semiconductor layer 10A along the incident direction of light has a plurality of amplification transistors AMP, a plurality of reset transistors RST, and a plurality of selection transistors SEL.
  • the light receiving element 10 having a laminated structure can uniformly reduce the parasitic light sensitivity.
  • the configuration of the light receiving element 10 can be diversified.
  • At least two of the plurality of transfer gates TGs transfer the signal charges stored in the photodiode PD to one floating diffusion FD.
  • a transfer failure occurs due to one transfer gate TG
  • a transfer failure does not occur in the remaining transfer gate TGs, as a result, a transfer failure to one floating diffusion FD is prevented. It becomes possible to do. Therefore, even if there is a difference (transfer difference) in the transfer capacity (transfer capacity, transfer speed, etc.) to one floating diffusion FD by a plurality of transfer gates TG, the uttered transfer difference can be canceled. It will be possible.
  • the configuration of the light receiving element 10 can be configured by increasing the number of HADs (Hole-Accumulation Diode®) mounted, and the variation to which the HAD is applied can be expanded.
  • HADs Hole-Accumulation Diode®
  • An on-chip lens 30 arranged on the side where the light of the photodiode PD is incident is provided. This makes it possible to suppress variations in sensitivity and color mixing of each color that occur depending on the F value of the on-chip lens 30. This is because in the back-illuminated light-receiving element 10, the distance between the on-chip lens 30 and the light-receiving surface of the photodiode PD is short.
  • the ranging module 1 of the first embodiment can exhibit the following actions and effects.
  • the light receiving element 10 includes a light emitting unit 2 that irradiates irradiation light whose brightness changes periodically, and a light emitting control unit 4 that controls the irradiation timing of the irradiation light. This makes it possible to provide a ranging module 1 capable of uniformly alleviating the parasitic light sensitivity.
  • the light receiving element 10 is configured to include a plurality of overflow gate OFGs arranged point-symmetrically with respect to the optical center OPC.
  • the present invention is not limited to this, and for example, as shown in FIG. 11, the overflow gate OFG may be arranged at the optical center OPC when viewed from the incident direction of light. With this configuration, it is possible to improve the process variation resistance of the light receiving element 10.
  • the total number of transfer gate TGs and the total number of overflow gate OFGs are the same, but the number is not limited to this, and for example, as shown in FIG. 12, the transfer gate TGs
  • the total number and the total number of overflow gate OFGs may be different numbers.
  • the present invention is not limited to this, and for example, as shown in FIGS. 13 to 15, the signal charge accumulated in the photodiode PD by one transfer gate TG is transferred to one floating diffusion FD. May be good. That is, one of the plurality of transfer gates TGs may be configured to transfer the signal charge accumulated in the photodiode PD to one floating diffusion FD.
  • “transfer gate TGE, transfer gate TGF, transfer gate TGG, transfer gate TGH” are shown, respectively. With this configuration, it is possible to support a configuration in which the number of floating diffusion FDs is increased.
  • the first semiconductor layer 10A has a transfer gate TG and an overflow gate OFG
  • the second semiconductor layer 10B includes an amplification transistor AMP, a reset transistor RST, and a selection transistor SEL. It was configured to have.
  • the present invention is not limited to this. That is, for example, as shown in FIGS. 16 to 18, one semiconductor layer may have a transfer gate TG, an overflow gate OFG, an amplification transistor AMP, a reset transistor RST, and a selection transistor SEL. ..
  • the configuration of the light receiving element 10 is a configuration that does not have a memory for storing signal charges, but the configuration is not limited to this. That is, for example, as shown in FIG. 19, the configuration of the light receiving element 10 further includes a plurality of memory MCs for storing signal charges, and at least two of the plurality of memory MCs are optical when viewed from the incident direction of light.
  • the configuration may be arranged point-symmetrically with respect to the central OPC.
  • the configuration of the second semiconductor layer 10B is a configuration that does not have a memory for storing signal charges, but the configuration is not limited to this. That is, for example, as shown in FIG. 20, the second semiconductor layer 10B further has a plurality of memory MCs for storing signal charges, and at least two of the plurality of memory MCs are optical when viewed from the incident direction of light.
  • the configuration may be arranged point-symmetrically with respect to the central OPC.
  • the light receiving element 10 is configured to include the first semiconductor layer 10A and the second semiconductor layer 10B.
  • the present invention is not limited to this, and the light receiving element 10 may be an embedded gate type indirect ToF sensor having only one semiconductor layer.
  • the light receiving element 10 is configured to include the first semiconductor layer 10A and the second semiconductor layer 10B.
  • the present invention is not limited to this, and for example, as shown in FIG. 21, the configuration of the light receiving element 10 may be configured to further include the third semiconductor layer 10C.
  • the third semiconductor layer 10C is a layer in which the first semiconductor layer 10A and the second semiconductor layer 10B are laminated along the incident direction of light at a position farther from the first semiconductor layer 10A than the second semiconductor layer 10B.
  • the third semiconductor layer 10C has a configuration including a plurality of amplification transistors AMP and a plurality of reset transistors RST.
  • At least two of the plurality of amplification transistors AMPs of the third semiconductor layer 10C are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light.
  • at least two of the plurality of reset transistors RST included in the third semiconductor layer 10C are arranged point-symmetrically with respect to the optical center OPC when viewed from the incident direction of light.
  • the number of the amplification transistor AMP and the amplification transistor AMP is four, but the number is not limited to this, and for example, as shown in FIG. 22, the number of the amplification transistor AMP and the amplification transistor AMP. May be two.
  • the transfer gate TG and the overflow gate OFG are alternately arranged along a circle centered on the optical center OPC when viewed from the incident direction of the light incident on the light receiving element 10. It is not limited to this. That is, for example, as shown in FIGS. 23 and 24, the transfer gate TG and the overflow gate OFG are made continuous along a circle centered on the optical center OPC when viewed from the incident direction of the light incident on the light receiving element 10. It may be arranged in such a way.
  • the illustration of the transfer gate TG and the overflow gate OFG is simplified for the sake of explanation.
  • the transfer gate TG and the overflow gate OFG are arranged so as to be octagonal when viewed from the incident direction of the light incident on the light receiving element 10, the light receiving element 10
  • the configuration can be configured with high symmetry. Further, in the configuration shown in FIG. 24, the arrangement of the transfer gate TG is changed in correspondence with the floating diffusion FD that transfers the signal charge, thereby improving the stability in a specific direction regarding the transfer of the signal charge. It becomes possible to make it.
  • the optical center OPC is set to one pixel formed by arranging a plurality of unit pixels, but the present invention is not limited to this, and the optical center OPC arranges a plurality of pixels.
  • the configuration may be set to the pixel group formed in the above. That is, for example, as shown in FIGS. 25 to 27, consider a case where the transfer gate TG and the overflow gate OFG are not arranged point-symmetrically with respect to the center of the pixel PX in one pixel PX. Even in this case, by setting the optical center OPC at the center of the quadrilateral in the pixel group PXG, the transfer gate TG and the overflow gate OFG are point-symmetrical with respect to the optical center OPC in the pixel group PXG.
  • the configuration is arranged.
  • the illustration of the transfer gate TG and the overflow gate OFG is simplified for the sake of explanation.
  • the pixel group PXG is a group of pixels formed by arranging four pixel PXs in an array to form a quadrilateral. With this configuration, it is possible to increase variations in the configuration of the light receiving element 10.
  • the configuration of the light receiving element 10 is the configuration of the first semiconductor layer 10A, the photodiode PD, the floating diffusion FD, the transfer gate TG, and the overflow gate.
  • the configuration has an OFG.
  • the configuration of the second semiconductor layer 10B is configured to include a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL.
  • the configuration of the first semiconductor layer 10A and the second semiconductor layer 10B is not limited to this. That is, for example, as shown in FIGS. 28 to 31, the ground GND may be arranged on the first semiconductor layer 10A, and the ground GND and the power supply wiring VDD may be arranged on the second semiconductor layer 10B.
  • FIGS. 28 to 30 show a configuration corresponding to one pixel formed by arranging a plurality of (four) unit pixels among the light receiving elements 10.
  • ground GNDs are arranged in the first semiconductor layer 10A. Each of the four ground GNDs is arranged at four corners of the first semiconductor layer 10A. As shown in FIG. 30, four ground GNDs and four power supply wiring VDD are arranged on the second semiconductor layer 10B. Each of the four ground GNDs is centrally arranged at the four edges of the second semiconductor layer 10B. The four power supply wirings VDD are arranged at the four corners of the second semiconductor layer 10B, respectively, and are connected to the reset transistor RST.
  • the first semiconductor layer 10A is formed in two adjacent pixels.
  • the ground GND located in is shared (not shown).
  • the power supply wiring VDD is shared with the ground GND arranged in the second semiconductor layer 10B.
  • reference numerals are omitted for configurations other than the pixel PX, the pixel group PXG, the ground GND, and the power supply wiring VDD in consideration of legibility.
  • the ground GND and the power supply wiring VDD may be arranged on the first semiconductor layer 10A.
  • FIG. 32 shows a configuration corresponding to one pixel formed by arranging a plurality of (four) unit pixels among the light receiving elements 10.
  • four ground GNDs and four power supply wiring VDD are arranged on the first semiconductor layer 10A.
  • Each of the four ground GNDs is arranged closer to the photodiode PD than the four edges of the first semiconductor layer 10A.
  • Each of the four power supply wirings VDD is arranged at four corners of the first semiconductor layer 10A and is connected to the reset transistor RST.
  • the first semiconductor layer is formed in two adjacent pixel PXs.
  • the power supply wiring VDD arranged at 10A is shared.
  • reference numerals are omitted for configurations other than the pixel PX, the pixel group PXG, the ground GND, and the power supply wiring VDD in consideration of legibility.
  • AC contrast is an index which rationalizes the accuracy of distribution to a predetermined floating diffusion FD when the electric charge generated by photoelectric conversion is distributed to a plurality of floating diffusion FDs by a modulation drive such as a gate voltage. .. Further, the higher the "AC contrast", the better the index. The earlier the “Modulation Frequency” corresponding to the modulation frequency of the AC control, the more accurate the distance measurement becomes possible. Further, in this configuration, the power supply wiring VDD arranged in the first semiconductor layer 10A is shared by the two adjacent pixels PX, so that miniaturization can be easily realized.
  • the ground GND and the power supply wiring VDD may be arranged on the first semiconductor layer 10A.
  • FIG. 34 shows a configuration corresponding to one pixel formed by arranging a plurality of (four) unit pixels among the light receiving elements 10.
  • four ground GNDs and four power supply wiring VDD are arranged on the first semiconductor layer 10A.
  • Each of the four ground GNDs is centrally arranged at the four edges of the second semiconductor layer 10B.
  • Each of the four power supply wirings VDD is arranged at four corners of the first semiconductor layer 10A and is connected to the reset transistor RST. Then, as shown in FIG.
  • the first semiconductor layer is formed in two adjacent pixel PXs.
  • the power supply wiring VDD is shared with the ground GND arranged at 10A.
  • FIG. 35 in consideration of legibility, the addition of reference numerals to configurations other than the pixel PX, the pixel group PXG, the ground GND, and the power supply wiring VDD is omitted. With this configuration, the two adjacent pixels PX share the ground GND arranged in the first semiconductor layer 10A and the power supply wiring VDD, so that miniaturization can be easily realized.
  • the light collected by the on-chip lens 30 is transmitted through the antireflection layer 40 and incident on the light-shielding film 20, and is incident on the photodiode PD.
  • the light focused by the on-chip lens 30 may be scattered by the scattering structure SF and incident on the photodiode PD.
  • FIG. 36 shows a configuration corresponding to one pixel formed by arranging a plurality of (four) unit pixels among the light receiving elements 10.
  • FIG. 37 in consideration of legibility, the addition of reference numerals to configurations other than the pixel PX, the pixel group PXG, the ground GND, and the power supply wiring VDD is omitted.
  • the scattering structure SF is formed by using, for example, a metal material (Metal), a silicon oxide film (SiO 2 ), or the like, and is arranged inside the antireflection layer 40. Further, as shown in FIG. 36, for example, the scattered structure SF is formed in a plate shape having a uniform thickness when viewed from the direction in which a plurality of unit pixels are arranged. Further, as shown in FIG. 38, for example, the scattered structure SF is arranged in a grid shape when viewed from the incident direction of the light incident on the light receiving element 10.
  • a metal material Metal
  • SiO 2 silicon oxide film
  • the light scattered by the scattering structure SF is arranged point-symmetrically with respect to the optical center so as not to be biased to a specific transfer gate TG inside the pixel, so that the bias of sensitivity is suppressed. It is possible to improve the AC contrast. This makes it possible to improve the sensitivity to the infrared light source, which is the sensitivity that is emphasized in the indirect ToF.
  • the high image height side which is the side of the pixel on the surface of the on-chip lens 30 that is far from the optical axis, the light is obliquely incident because the distance from the optical axis is long. Therefore, it is not necessary to arrange the scattered structure SF point-symmetrically with respect to the optical center.
  • the “high image height side” indicates a side in which the image height increases as the on-chip lens 30 approaches the end of the on-chip lens 30 from the pixel center, which is a portion where the diagonal lines of the on-chip lens 30 intersect with each other. Further, the “high image height” refers to a side (including any of the upper side, the lower side, the left side, and the right side) near the end of the on-chip lens 30.
  • the structure of the scattered structure SF is not limited to the structure shown in FIG. 38, that is, the structure is arranged in a grid shape when viewed from the incident direction of the light incident on the light receiving element 10, and is not limited to the structure shown in FIG.
  • the configuration shown in 48 may be used.
  • the shape of the scattered structure SF is not limited to the configuration shown in FIG. 36, that is, a plate shape having a uniform thickness when viewed from the direction in which a plurality of unit pixels are arranged.
  • the shape of the scattered structure SF is, for example, the shape of a quadrangular pyramid with the apex facing downward (the side facing the photodiode PD) whose cross-sectional area decreases as it approaches the photodiode PD. May be.
  • the shape of the scattered structure SF may be, for example, as shown in FIG. 50, a shape of a quadrangular pyramid whose apex faces upward (the side on which light is incident) whose cross-sectional area decreases as the distance from the photodiode PD increases. Good.
  • the shape of the scattered structure SF is the shape shown in FIGS. 49 and 50
  • the configuration of the scattered structure SF seen from the incident direction of the light incident on the light receiving element 10 is, for example, FIGS. 49 and 41. , The configuration shown in FIG. 48.
  • the overflow gate OFG is connected to the transfer gate TG, but the present invention is not limited to this. That is, for example, as shown in FIGS. 51 and 52, the overflow gate OFG is arranged at the optical center OPC, and the overflow gate OFG is not connected to the transfer gate TG but is connected to the ground GND. May be good.
  • the addition of reference numerals to configurations other than the pixel PX, the pixel group PXG, the ground GND, and the overflow gate OFG is omitted.
  • the configuration of the light receiving element 10 is configured to include a conversion efficiency variable gate FDG.
  • the conversion efficiency variable gate FDG (polysilicon) is arranged at a position corresponding to optical symmetry and capacitive symmetry, and is connected to the reset transistor RST. Further, the conversion efficiency variable gate FDG functions as a switch for loading an additional capacitance. Although not shown, a dummy element may be arranged instead of the conversion efficiency variable gate FDG.
  • the overflow gate OFG receives the drive signal supplied from the timing control unit due to the potential barrier formed by the transfer gate TG without supplying the drive signal from the timing control unit (not shown). Achieve the same function as. Therefore, in the configurations shown in FIGS. 51 and 52, as shown in FIG. 53A, when the transfer gate TG is open (ON state), the electric charge EC is accumulated in the floating diffusion FD as shown in FIG. 53B. On the other hand, as shown in FIG. 54A, when the transfer gate TG is closed (OFF state), the electric charge EC is discharged to the overflow gate OFG as shown in FIG. 54B.
  • the overflow gate OFG which is a configuration required for indirect ToF, can be miniaturized by reducing the occupancy of the area inside the pixel while maintaining the symmetry with respect to the optical center OPC. It becomes easy to do.
  • the overflow gate OFG is arranged at the optical center OPC and connected to the ground GND, and the transfer electrode VG (Vertical Gate) is further arranged on the transfer gate TG.
  • the transfer electrode VG has a structure in which a gate electrode (polysilicon) is extended inside a silicon substrate, which is formed by using a vertical transistor, and connects the transfer gate TG and the photodiode PD.
  • the transfer electrode VG is an electrode created by embedding polysilicon in a portion where a silicon substrate is dug. For example, a portion formed in a portion where a silicon substrate is dug and a portion above the silicon substrate. And two places are integrally formed. That is, the transfer electrode VG forms an embedded gate.
  • the overflow gate OFG is connected to the transfer gate TG, but the present invention is not limited to this. That is, for example, as shown in FIGS. 59 and 60, the overflow gate OFG is arranged at the optical center OPC, and the overflow gate OFG is not connected to the transfer gate TG but is connected to the photo gate PG. May be.
  • FIG. 60 reference numerals are omitted for configurations other than the pixel PX, the pixel group PXG, the ground GND, the overflow gate OFG, and the photo gate PG in consideration of legibility.
  • the photogate PG is connected to the photodiode PD, and is turned on or off according to a control signal supplied from a drive circuit (not shown).
  • a control signal supplied from a drive circuit not shown.
  • FIGS. 59 and 60 As shown in FIG. 61A, when the transfer gate TG is open (ON state), the charge EC moves to the photo gate PG as shown in FIG. 61B.
  • FIG. 62A when the transfer gate TG is closed (OFF state), the electric charge EC is discharged to the overflow gate OFG as shown in FIG. 62B.
  • the overflow gate OFG which is a configuration required for indirect ToF, can be miniaturized by reducing the occupancy of the area inside the pixel while maintaining the symmetry with respect to the optical center OPC. It becomes easy to do.
  • the overflow gate OFG may be arranged at the optical center OPC and connected to the photo gate PG, and the transfer electrode VG may be arranged on the photo gate PG.
  • the transfer electrode VG connects the photogate PG and the photodiode PD.
  • the configuration is such that two transfer gates TGs are connected to one photodiode PD to form a two-phase circuit, but the present invention is limited to this. is not it. That is, for example, as shown in FIG. 67, a configuration may be configured in which four transfer gates TGs are connected to one photodiode PD and an overflow gate OFG to form a four-phase circuit.
  • the timing at which each transfer gate TG and the overflow gate OFG operate according to the drive signal supplied from the timing control unit is controlled to, for example, the timing shown in FIG. 68. Specifically, the same operation is performed in the order of transfer gate TGA, transfer gate TGC, transfer gate TGB, and transfer gate TGD at different timings. Further, the timing at which the overflow gate OFG discharges the overflowing charge from the floating diffusion FD is different from the timing at which each transfer gate TG transfers the signal charge to the floating diffusion FD.
  • the four-phase circuit has the configuration shown in FIG. 69, for example.
  • adjacent pixels share the photodiode PD and the overflow gate OFG.
  • the four-phase circuit has the configuration shown in FIG. 70, for example.
  • adjacent pixels share the photodiode PD and the overflow gate OFG.
  • the configuration of the first semiconductor layer 10A is configured to include a photodiode PD, a floating diffusion FD, a transfer gate TG, and an overflow gate OFG, but the configuration is not limited thereto. That is, for example, as shown in FIGS. 71 to 73, the configuration of the first semiconductor layer 10A may be configured to include a plurality of (four) photogate PGs and a plurality (four) transfer electrodes VG. In addition to this, a configuration may have a capacitor MIM in which a part is arranged in the first semiconductor layer 10A and the remaining part is arranged in the second semiconductor layer 10B.
  • the photo gate PG is connected to the transfer gate TG. Further, the four photo gates PG are arranged symmetrically and vertically symmetrically with respect to one transfer gate TG (for example, transfer gate TGA).
  • the transfer electrode VG connects the transfer gate TG and the photodiode PD.
  • the capacitor MIM includes an upper electrode UE, a lower electrode DE, and a high dielectric constant film PM.
  • the upper electrode UE is formed of a metal material, and has a shape in which a flat plate is bent a plurality of times at an angle of about 90 ° when viewed from the direction in which a plurality of unit pixels are arranged, and has a plurality of concave portions and convex portions. Is formed in. Further, an upper terminal UT formed linearly using copper is connected to the upper electrode UE.
  • the lower electrode DE is formed by using a metal material like the upper electrode UE, and is formed in the same shape as the upper electrode UE. Further, a lower terminal DT formed in a plate shape using copper is connected to the lower electrode DE.
  • the high dielectric constant film PM is formed by using an insulator, and is arranged between the upper electrode UE and the lower electrode DE.
  • the four photogate PGs are arranged symmetrically and vertically symmetrically with respect to one transfer gate TG. Therefore, the capacities of the four photogate PGs become uniform, and it is possible to suppress variations in AC contrast for each pixel.
  • the transfer electrode VG that connects the transfer gate TG and the photodiode PD makes it possible to improve the electron recovery efficiency in the deep part and improve the AC control. Further, in the configuration shown in FIGS.
  • MIM Metal-Insulator-Metal
  • the configuration may include eight transfer electrodes VG, and one transfer gate TG and one photodiode PD may be connected by two transfer electrodes VG.
  • the light receiving element 10 may be configured to include a plurality of memory MCs, a plurality of photogate PGs, a plurality of transfer electrodes VG, and a capacitor MIM.
  • the configuration has eight transfer electrodes VG, and the two transfer electrodes VG provide one transfer gate TG and one photodiode PD. May be configured to connect. Also in the configurations shown in FIGS. 76 to 78, it is possible to suppress variations in AC contrast for each pixel, improve AC contrast, and significantly increase the capacitance.
  • the configuration of the photogate PG is not limited to the configuration completely arranged inside the first semiconductor layer 10A as shown in FIGS. 71 and 76. That is, for example, as shown in FIGS. 79 and 80, the configuration of the light receiving element 10 may be configured to include a vertical photogate VPG.
  • the vertical photogate VPG is formed in a shape extending vertically from the first semiconductor layer 10A and embedded in the photodiode PD.
  • the intended transfer among the plurality of transfer gates TGs is performed at a position close to the first semiconductor layer 10A. It is possible to change the direction of movement of electrons to the gate TG. This makes it possible to improve the AC control.
  • the configuration of the light receiving element 10 is configured to include one on-chip lens 30 as shown in FIG. 2 and the like, but the configuration is not limited to this.
  • the incident light is focused toward the overflow gate OFG arranged at the center of the unit pixel.
  • the condensing region which is the condensing region of the incident light, is indicated by the reference numeral CR.
  • the addition of reference numerals to configurations other than the pixel PX, the pixel group PXG, the overflow gate OFG, the photo gate PG, and the condensing region CR is omitted.
  • the configuration may include the same number (four) of on-chip lenses 30 as the transfer gate TG. That is, the on-chip lens 30 is divided according to the number of transfer gates TG arranged in the pixel.
  • the addition of reference numerals to configurations other than the pixel PX, the pixel group PXG, the overflow gate OFG, the photo gate PG, and the condensing region CR is omitted.
  • the incident light is dispersed in the same number (four) regions as the on-chip lens 30. As a result, it is possible to reduce the component of light passing through the overflow gate OFG, and it is possible to improve the quantum efficiency.
  • the on-chip lens 30 by making the on-chip lens 30 smaller as compared with the configuration including one on-chip lens 30, it is possible to increase the curvature of the on-chip lens 30, and on the shallow side of the surface on which light is incident, It is possible to form an image of the focusing force. This makes it possible to reduce the components of light that pass through the overflow gate OFG.
  • the technology according to the present disclosure (the present technology) can be applied to various products.
  • the technology according to the present disclosure is a device mounted on a moving body of any one of automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility, airplanes, drones, ships, robots, and the like. It may be realized.
  • FIG. 87 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technique according to the present disclosure can be applied.
  • the vehicle control system 12000 includes a plurality of electronic control units connected via the communication network 12001.
  • the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050.
  • a microcomputer 12051, an audio image output unit 12052, and an in-vehicle network I / F (Interface) 12053 are shown as a functional configuration of the integrated control unit 12050.
  • the drive system control unit 12010 controls the operation of the device related to the drive system of the vehicle according to various programs.
  • the drive system control unit 12010 provides a driving force generator for generating the driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism for adjusting and a braking device for generating a braking force of a vehicle.
  • the body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs.
  • the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, blinkers or fog lamps.
  • the body system control unit 12020 may be input with radio waves transmitted from a portable device that substitutes for the key or signals of various switches.
  • the body system control unit 12020 receives inputs of these radio waves or signals and controls a vehicle door lock device, a power window device, a lamp, and the like.
  • the vehicle outside information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000.
  • the image pickup unit 12031 is connected to the vehicle exterior information detection unit 12030.
  • the vehicle outside information detection unit 12030 causes the image pickup unit 12031 to capture an image of the outside of the vehicle and receives the captured image.
  • the vehicle exterior information detection unit 12030 may perform object detection processing or distance detection processing such as a person, a vehicle, an obstacle, a sign, or characters on the road surface based on the received image.
  • the imaging unit 12031 is an optical sensor that receives light and outputs an electric signal according to the amount of the light received.
  • the image pickup unit 12031 can output an electric signal as an image, and can also output it as distance measurement information. Further, the light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.
  • the in-vehicle information detection unit 12040 detects the in-vehicle information.
  • a driver state detection unit 12041 that detects the driver's state is connected to the in-vehicle information detection unit 12040.
  • the driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 has a degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. May be calculated, and it may be determined whether or not the driver is dozing.
  • the microcomputer 12051 calculates the control target value of the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and the drive system control unit. It is possible to output a control command to 12010.
  • the microcomputer 12051 realizes ADAS (Advanced Driver Assistance System) functions including vehicle collision avoidance or impact mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like. It is possible to perform cooperative control for the purpose of.
  • ADAS Advanced Driver Assistance System
  • the microcomputer 12051 controls the driving force generator, the steering mechanism, the braking device, and the like based on the information around the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, thereby controlling the driver. It is possible to perform coordinated control for the purpose of automatic driving, etc., which runs autonomously without relying on the operation of.
  • the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the vehicle exterior information detection unit 12030.
  • the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the external information detection unit 12030, and switches the high beam to the low beam for the purpose of anti-glare control. It is possible to do.
  • the audio image output unit 12052 transmits at least one of the audio and image output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle.
  • an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices.
  • the display unit 12062 may include, for example, at least one of an onboard display and a heads-up display.
  • FIG. 88 is a diagram showing an example of the installation position of the imaging unit 12031.
  • the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.
  • the imaging units 12101, 12102, 12103, 12104, 12105 are provided at positions such as, for example, the front nose, side mirrors, rear bumpers, back doors, and the upper part of the windshield in the vehicle interior of the vehicle 12100.
  • the imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the upper part of the windshield in the vehicle interior mainly acquire an image in front of the vehicle 12100.
  • the imaging units 12102 and 12103 provided in the side mirrors mainly acquire images of the side of the vehicle 12100.
  • the imaging unit 12104 provided on the rear bumper or the back door mainly acquires an image of the rear of the vehicle 12100.
  • the imaging unit 12105 provided on the upper part of the windshield in the vehicle interior is mainly used for detecting a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.
  • FIG. 88 shows an example of the photographing range of the imaging units 12101 to 12104.
  • the imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose
  • the imaging ranges 12112 and 12113 indicate the imaging range of the imaging units 12102 and 12103 provided on the side mirrors, respectively
  • the imaging range 12114 The imaging range of the imaging unit 12104 provided on the rear bumper or the back door is shown.
  • a bird's-eye view image of the vehicle 12100 as viewed from above can be obtained.
  • At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information.
  • at least one of the image pickup units 12101 to 12104 may be a stereo camera composed of a plurality of image pickup elements, or may be an image pickup element having pixels for phase difference detection.
  • the microcomputer 12051 has a distance to each three-dimensional object within the imaging range 12111 to 12114 based on the distance information obtained from the imaging units 12101 to 12104, and a temporal change of this distance (relative velocity with respect to the vehicle 12100). Is extracted as the preceding vehicle, in particular, the closest three-dimensional object on the traveling path of the vehicle 12100, which travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, 0 [km / h] or more). It is possible to do.
  • a predetermined speed for example, 0 [km / h] or more
  • the microcomputer 12051 can set an inter-vehicle distance to be secured in front of the preceding vehicle in advance, and can perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. is there. In this way, it is possible to perform coordinated control for the purpose of automatic driving or the like in which the vehicle travels autonomously without depending on the operation of the driver.
  • the microcomputer 12051 converts three-dimensional object data related to a three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, electric poles, and other three-dimensional objects based on the distance information obtained from the imaging units 12101 to 12104. It is possible to classify and extract and use it for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that can be seen by the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, the microcomputer 12051 via the audio speaker 12061 or the display unit 12062. By outputting an alarm to the driver and performing forced deceleration and avoidance steering via the drive system control unit 12010, it is possible to provide driving support for collision avoidance.
  • At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays.
  • the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging units 12101 to 12104.
  • pedestrian recognition is, for example, a procedure for extracting feature points in an image captured by an imaging unit 12101 to 12104 as an infrared camera, and pattern matching processing for a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian. It is done by the procedure of determining whether or not.
  • the audio image output unit 12052 When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio image output unit 12052 outputs a square contour line for emphasizing the recognized pedestrian.
  • the display unit 12062 is controlled so as to superimpose and display. Further, the audio image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.
  • the semiconductor device of the present disclosure does not need to include all of the components described in the above-described embodiments and the like, and may conversely include other components. It should be noted that the effects described in the present specification are merely examples and are not limited, and other effects may be obtained.
  • the present technology can have the following configurations. (1) Equipped with multiple transfer gates that distribute and transfer the signal charge stored in the photodiode that photoelectrically converts the incident light to multiple floating diffusions. At least two of the plurality of transfer gates are light receiving elements arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light. (2) The number of transfer gates is four, The light receiving element according to (1), wherein the four transfer gates are arranged at positions that form quadrangular vertices with reference to the optical center when viewed from the incident direction of the light.
  • the light receiving element according to any one of (1) to (8), wherein at least two of the plurality of amplification transistors are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light. (10) A plurality of amplification transistors that read out and amplify the signal charge transferred to the floating diffusion as an electric signal, and A plurality of selection transistors for turning on or off the output of the voltage signal from the amplification transistor are further provided.
  • the light receiving element according to any one of (1) to (9), wherein at least two of the plurality of selective transistors are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light.
  • a second gate having a plurality of transfer gates for distributing and transferring signal charges accumulated in a photodiode that photoelectrically converts incident light to a plurality of floating diffusions, and a plurality of overflow gates for discharging the charges overflowing from the floating diffusions.
  • 1 semiconductor layer and A plurality of amplification transistors that read and amplify the signal charge transferred to the floating diffusion as an electric signal, a plurality of reset transistors that turn on or off the discharge of the charge accumulated in the floating diffusion, and the amplification transistor.
  • a second semiconductor layer comprising a plurality of selective transistors that turn on or off the output of a voltage signal. The first semiconductor layer and the second semiconductor layer are laminated along the incident direction of the light.
  • At least two of the plurality of transfer gates are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light.
  • At least two of the plurality of overflow gates are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light.
  • At least two of the plurality of amplification transistors are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light.
  • At least two of the plurality of reset transistors are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light.
  • At least two of the plurality of selective transistors are light receiving elements arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light.
  • the second semiconductor layer further includes a plurality of memories for storing the signal charge.
  • a third semiconductor layer laminated with the first semiconductor layer and the second semiconductor layer along the incident direction of the light is further provided at a position farther from the first semiconductor layer than the second semiconductor layer.
  • the third semiconductor layer includes a plurality of amplification transistors that read and amplify the signal charge transferred to the floating diffusion as an electric signal, and a plurality of reset transistors that turn on or off the discharge of the charge accumulated in the floating diffusion.
  • At least two of the plurality of amplification transistors included in the third semiconductor layer are arranged point-symmetrically with respect to the optical center when viewed from the incident direction of the light.
  • Light receiving element 17.
  • one of the plurality of transfer gates transfers the accumulated signal charge to one of the floating diffusions.
  • the light receiving element according to (20), wherein the scattering structure has a shape in which the cross-sectional area decreases as it approaches the photodiode.
  • An overflow gate for discharging the electric charge overflowing from the floating diffusion and a photogate connected to the photodiode are further provided.
  • a second gate having a plurality of transfer gates for distributing and transferring signal charges accumulated in a photodiode that photoelectrically converts incident light to a plurality of floating diffusions, and a plurality of overflow gates for discharging the charges overflowing from the floating diffusions.
  • a second semiconductor layer having a plurality of selective transistors that turn on or off the output of a voltage signal.
  • a part of the capacitor is arranged in the first semiconductor layer, and the remaining part is further provided with a capacitor arranged in the second semiconductor layer.
  • the first semiconductor layer and the second semiconductor layer are laminated along the incident direction of the light.
  • a plurality of on-chip lenses arranged on the side of the photodiode on which the light is incident are further provided.
  • Audio image output unit 12053 ... In-vehicle network I / F, 12061 ... Audio speaker, 12062 ... Display unit , 12063 ... Instrument panel, 12100 ... Vehicle, 12111-12114 ... Imaging range, PD ... Photodioden, FD ... Floating diffusion, TG ... Transfer gate, OFG ... Overflow Gate, RST ... reset transistor, AMP ... amplification transistor, SEL ... selection transistor, OPC ... optical center, VDD ... power supply wiring, VSL ... vertical signal line, OBJ ... object , MC ... memory, PX ... pixel, PXG ... pixel group, GND ... ground, SF ... scattered structure, EC ... charge, VG ...
  • transfer electrode PG .. Photogate, MIM ... capacitor, UE ... upper electrode, DE ... lower electrode, PM ... high dielectric constant film, UT ... upper terminal, DT ... lower terminal, CR .. .Condensing area

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EP4063784A1 (en) 2022-09-28
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