WO2021093408A1 - Duplexer - Google Patents

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Publication number
WO2021093408A1
WO2021093408A1 PCT/CN2020/111351 CN2020111351W WO2021093408A1 WO 2021093408 A1 WO2021093408 A1 WO 2021093408A1 CN 2020111351 W CN2020111351 W CN 2020111351W WO 2021093408 A1 WO2021093408 A1 WO 2021093408A1
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wafer
duplexer
filter
isolation
transmitting
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PCT/CN2020/111351
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French (fr)
Chinese (zh)
Inventor
庞慰
郑云卓
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天津大学
诺思(天津)微系统有限责任公司
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Publication of WO2021093408A1 publication Critical patent/WO2021093408A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/20Frequency-selective devices, e.g. filters
    • H01P1/213Frequency-selective devices, e.g. filters combining or separating two or more different frequencies

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  • the present invention relates to the field of filtering devices for communication, in particular to a duplexer with high power capacity.
  • the small-size filters that can meet the needs of communication terminals are mainly piezoelectric acoustic wave filters.
  • the resonators that constitute this type of acoustic wave filter mainly include: FBAR (Film Bulk Acoustic Resonator), SMR (Solidly Mounted) Resonator, solid-state assembly resonator) and SAW (Surface Acoustic Wave, surface acoustic wave resonator).
  • FBAR and SMR duplexers manufactured based on the principle of bulk acoustic wave have the characteristics of lower insertion loss and higher power capacity than the SAW duplexer manufactured based on the principle of surface acoustic wave.
  • the low insertion loss of the duplexer can ensure that under the premise of the same antenna transmission power (specified by the international unified communication protocol), the amplifier of the transmission channel can send a smaller power to save the power consumption of the terminal equipment, thereby extending the same power condition It can reduce the use time and reduce the heat generation in the transmission path, resulting in a better end user experience.
  • the higher power capacity of the duplexer means that the transmission power level of the terminal equipment can be appropriately increased to expand the coverage of the terminal signal, thereby reducing the network density of the operator’s base station and saving the operator’s network. cost. Supporting higher power levels has gradually become a basic requirement for 4G+ and 5G communication terminals.
  • duplexers are made by packaging two filter chips together.
  • the packaging efficiency is relatively low due to the requirement for the spacing between the chips due to the assembly process, which is generally only 50% to 60%.
  • the isolation performance of the duplexer will be very poor due to the capacitive coupling between the upper and lower wafers, and the isolation is only- 30dB ⁇ -40dB, too much performance degradation makes it unusable.
  • the present invention provides a duplexer with good isolation and excellent electrical performance.
  • the object of the present invention is to provide a duplexer, which includes, from bottom to top, a package carrier, a lower wafer, an isolation wafer, and an upper wafer; the lower wafer is provided with an emission filter, The upper wafer is provided with a receiving filter; the upper surface of the isolation wafer is bonded to the lower surface of the upper wafer, and the lower surface of the isolation wafer is bonded to the upper surface of the lower wafer Together.
  • the transmitting filter and the receiving filter are partially overlapped in the top view direction of the device.
  • the intersection ratio of the projection filter and the receiving filter in the top view direction of the device is 0.2 to 0.8.
  • the material of the isolation wafer is silicon.
  • the thickness of the isolation wafer is 30-150 microns.
  • the distance between the upper wafer and the lower wafer is 50-200 microns.
  • the receiving resonator that needs to be connected to the outside is connected to a pad located on the lower surface of the lower wafer through a through hole made on the lower wafer, and then through welding
  • the ball is connected to the package carrier board below;
  • the transmitting resonator that needs to be connected to the outside is connected to the through hole made on the upper wafer to the upper surface of the upper wafer.
  • the bonding pad is connected to the bonding fingers on the package carrier through bonding wires.
  • the receiving resonator that needs to be connected to the outside is connected to the pads on the upper surface of the upper wafer through the through holes made on the upper wafer, and then through the key
  • the bonding wire is connected to the bonding finger on the package carrier; in the emission filter, the emission resonator that needs to be connected to the outside is connected to the bottom crystal through the via hole made on the bottom wafer.
  • the pads on the lower surface of the circle are connected to the package carrier board below through solder balls.
  • the material of the bonding wire is gold, copper or aluminum.
  • the duplexer of the embodiment of the present invention extends the distance between the upper and lower wafers by inserting an isolation wafer between the upper wafer and the lower wafer, thereby opening the distance between the transmitting filter and the receiving filter, thereby reducing the distance between the transmitting filter and the receiving filter. Capacitive coupling improves device performance.
  • Figure 1 is a schematic cross-sectional view of an existing duplexer
  • Fig. 2 is a schematic diagram of the circuit principle of the existing duplexer
  • FIG. 3 is a schematic cross-sectional view of a duplexer according to an embodiment of the present invention.
  • FIG. 4 is a schematic cross-sectional view of the duplexer according to the second embodiment of the present invention.
  • Figure 5 is a schematic cross-sectional view of a triple duplexer according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of the circuit principle of the duplexer in the second embodiment and the third embodiment of the present invention.
  • FIG. 1 is a schematic cross-sectional view of a conventional duplexer, which includes, from bottom to top, a package carrier SU, a lower wafer W2, and an upper wafer W1.
  • the lower surface of the upper wafer W1 is bonded to the upper surface of the lower wafer W2.
  • the lower wafer W2 is provided with a transmitting filter Tx
  • the upper wafer W1 is provided with a receiving filter Rx.
  • the transmitting filter Tx and the receiving filter Rx are staggered in the device top view direction.
  • Figure 2 is a schematic circuit diagram of a conventional duplexer.
  • the transmitting filter and the receiving filter in the duplexer respectively include four series units and four parallel units.
  • a coupling capacitor C is formed between the transmitting filter Tx in the lower wafer W2 and the receiving filter Rx in the upper wafer W1 in the existing duplexer.
  • the isolation performance of the device will deteriorate due to the capacitive coupling C.
  • the purpose of the present invention is to provide a duplexer, which includes, from bottom to top, a package carrier, a lower wafer, an isolation wafer, and an upper wafer; the lower wafer is provided with an emission filter, The upper wafer is provided with a receiving filter; the upper surface of the isolation wafer is bonded to the lower surface of the upper wafer, and the lower surface of the isolation wafer is bonded to the upper surface of the lower wafer Together.
  • the transceiver filters are staggered in the top view direction of the device.
  • the distance between the upper and lower wafers is increased due to the insertion of the isolation wafer, which leads to a significant reduction in the parasitic capacitance between the transceiver filters.
  • Completely staggered, that is, a larger area of overlap can be achieved, thereby further reducing the size of the chip. Therefore, in the duplexer of the embodiment of the present invention, it is preferable that the transmitting filter and the receiving filter are partially overlapped in the top view direction of the device.
  • the intersection ratio of the projection filter and the receiving filter in the top view direction of the device is 0.2 to 0.8.
  • FIG. 3 is a schematic cross-sectional view of a duplexer 100 according to an embodiment of the present invention.
  • the duplexer 100 includes, from bottom to top, a package carrier SU, a lower wafer W2, an isolation wafer W3, and an upper wafer W1.
  • the lower wafer W2 is provided with a transmitting filter Tx
  • the upper wafer W1 is provided with a receiving filter Rx.
  • the transmitting filter Tx and the receiving filter Rx are partially overlapped in the top view direction of the device.
  • the upper surface of the isolation wafer W3 is bonded to the lower surface of the upper wafer W1, and the lower surface of the isolation wafer W3 is bonded to the upper surface of the lower wafer W2.
  • the distance between the upper and lower wafers is opened by inserting the isolation wafer W3 between the upper wafer W1 and the lower wafer W2, thereby opening the transmitting filter Tx and the receiving filter Rx.
  • the material of the isolation wafer W3 may be silicon. Silicon wafers have the advantages of low cost and easy processing.
  • the thickness of the isolation wafer W3 may be 30-150 microns.
  • the distance between the upper wafer W1 and the lower wafer W2 may be 50-200 microns.
  • the resonator In the above-mentioned duplexer, no matter the transmitting filter or the receiving filter, the resonator is electrically connected to the package carrier through the through hole. Inside the duplexer, a coupling inductance is usually formed between the transmitting filter and the receiving filter, which impairs the performance of the device. For this reason, considering the improvement of the electrical connection mode, the duplexer 200 according to the second embodiment of the present invention and the three duplexer 300 according to the embodiment of the present invention are proposed.
  • FIG. 4 is a schematic cross-sectional view of the duplexer 200 according to the second embodiment of the present invention.
  • the receiving resonator in the receiving filter Rx that needs to be connected to the outside is connected to the pad located on the lower surface of the lower wafer W2 through the via VRx made on the lower wafer W2 Connect to the package carrier SU underneath through solder balls;
  • the transmitting resonator in the transmitting filter Tx that needs to be connected to the outside is connected to the upper surface of the upper wafer W1 through the via VTx made on the upper wafer W1
  • the bonding wires LTx are connected to the bonding fingers on the package carrier SU.
  • FIG. 5 is a schematic cross-sectional view of a triple duplexer 300 according to an embodiment of the present invention.
  • the receiving resonator in the receiving filter Rx that needs to be connected to the outside is connected to the solder on the upper surface of the upper wafer W1 through the via hole V made on the upper wafer W1.
  • the transmitting resonator in the transmitting filter Tx that needs to be connected to the outside is connected to the lower wafer through the through hole VTx made on the lower wafer W2
  • the pads on the lower surface of the wafer W2 are connected to the package carrier SU underneath through solder balls.
  • FIG. 6 is a schematic diagram of the circuit principle of the duplexer in the second embodiment and the third embodiment of the present invention.
  • the transmitting filter and the receiving filter in the duplexer shown in FIG. 6 respectively include four series units and four parallel units. Because part of the resonators in the transmitting filter or receiving filter no longer pass through the via holes but are electrically connected to the package carrier through the bonding wire, the mutual inductance distance between the resonators is extended, and the coupling inductance is reduced. Improved the electrical performance of the duplexer.

Abstract

Provided is a duplexer, sequentially comprising, from bottom to top: a packaging carrier plate, a lower wafer, an isolation wafer and an upper wafer, wherein a transmitting filter is arranged in the lower wafer, and a receiving filter is arranged in the upper wafer; and an upper surface of the isolation wafer is bonded with a lower surface of the upper wafer, and a lower surface of the isolation wafer is bonded with an upper surface of the lower wafer. In the duplexer of the present invention, the isolation wafer is inserted between the upper wafer and the lower wafer, such that the spacing between the upper wafer and the lower wafer is increased, increasing the spacing between the transmitting filter and the receiving filter, and thus reducing capacitive coupling, and improving the device performance.

Description

一种双工器A duplexer 技术领域Technical field
本发明涉及通信用滤波类器件领域,特别涉及一种高功率容量的双工器。The present invention relates to the field of filtering devices for communication, in particular to a duplexer with high power capacity.
背景技术Background technique
近年来,随着市场的迅猛发展,无线通讯终端和设备不断朝着小型化、多模-多频段的方向发展,无线通讯终端和设备不断朝着小型化,多模-多频段的方向发展,无线通信终端中的用于FDD(Frequency Division Duplexing,频分复用双工)的双工器的数量也随之增加。特别是随着5G商用的临近,高性能的双工器的需求量也越来越大。In recent years, with the rapid development of the market, wireless communication terminals and equipment have continued to develop in the direction of miniaturization, multimode-multiband, and wireless communication terminals and equipment have continued to develop in the direction of miniaturization, multimode-multiband. The number of duplexers used in FDD (Frequency Division Duplexing, Frequency Division Duplexing) in wireless communication terminals has also increased. Especially with the approach of 5G commercial use, the demand for high-performance duplexers is also increasing.
目前,能够满足通讯终端使用的小尺寸滤波器主要是压电声波滤波器,构成此类声波滤波器的谐振器主要包括:FBAR(Film Bulk Acoustic Resonator,薄膜体声波谐振器),SMR(Solidly Mounted Resonator,固态装配谐振器)和SAW(Surface Acoustic Wave,表面声波谐振器)。其中基于体声波原理制造的FBAR和SMR双工器,相比基于表面声波原理制造的SAW双工器,具有更低的插入损耗,更高的功率容量的特点。At present, the small-size filters that can meet the needs of communication terminals are mainly piezoelectric acoustic wave filters. The resonators that constitute this type of acoustic wave filter mainly include: FBAR (Film Bulk Acoustic Resonator), SMR (Solidly Mounted) Resonator, solid-state assembly resonator) and SAW (Surface Acoustic Wave, surface acoustic wave resonator). Among them, the FBAR and SMR duplexers manufactured based on the principle of bulk acoustic wave have the characteristics of lower insertion loss and higher power capacity than the SAW duplexer manufactured based on the principle of surface acoustic wave.
双工器的低插入损耗可以确保在相同的天线发射功率(由国际统一的通信协议规定)前提下,发射信道的放大器可以发送更小的功率以节省终端设备的电源消耗,从而延长同样电量条件下的使用时间,并减小发送通路中的热量产生,带来更好的终端用户使用体验。The low insertion loss of the duplexer can ensure that under the premise of the same antenna transmission power (specified by the international unified communication protocol), the amplifier of the transmission channel can send a smaller power to save the power consumption of the terminal equipment, thereby extending the same power condition It can reduce the use time and reduce the heat generation in the transmission path, resulting in a better end user experience.
而双工器具有更高的功率容量,则意味着可以通过适当地提升终端设备的发射功率等级,扩大终端发送信号的覆盖范围,从而降低运 营商基站的组网密度,节约运营商的组网成本。目前支持更高的功率等级已经逐渐成为4G+以及5G通信终端的基本要求。The higher power capacity of the duplexer means that the transmission power level of the terminal equipment can be appropriately increased to expand the coverage of the terminal signal, thereby reducing the network density of the operator’s base station and saving the operator’s network. cost. Supporting higher power levels has gradually become a basic requirement for 4G+ and 5G communication terminals.
一般的双工器均采用两颗滤波器芯片封装在一起的方式来制作。由两颗芯片与封装基板形成的双工器,由于装配工艺对芯片之间的间距要求,导致封装效率偏低,一般只有50%~60%。但如果直接将两片分别制作有滤波器的晶圆利用晶圆级封键合在一起,双工器的隔离度性能会因为上下晶圆之间的电容耦合变得非常差,隔离度只有-30dB~-40dB,性能下降太多导致无法使用。Generally, duplexers are made by packaging two filter chips together. For a duplexer formed by two chips and a packaging substrate, the packaging efficiency is relatively low due to the requirement for the spacing between the chips due to the assembly process, which is generally only 50% to 60%. However, if two wafers with filters are directly bonded together using wafer-level sealing and bonding, the isolation performance of the duplexer will be very poor due to the capacitive coupling between the upper and lower wafers, and the isolation is only- 30dB~-40dB, too much performance degradation makes it unusable.
因此,如何实现隔离度好、电性能优秀的小尺寸双工器,成为设计工程师亟待解决的问题。Therefore, how to realize a small-size duplexer with good isolation and excellent electrical performance has become an urgent problem for design engineers.
发明内容Summary of the invention
有鉴于此,本发明提供一种隔离度好、电学性能优秀的双工器。In view of this, the present invention provides a duplexer with good isolation and excellent electrical performance.
本发明的目的是提供一种双工器,该双工器从下至上依次包括:封装载板、下晶圆、隔离晶圆和上晶圆;所述下晶圆中设置有发射滤波器,所述上晶圆中设置有接收滤波器;所述隔离晶圆的上表面与所述上晶圆的下表面键合,所述隔离晶圆的下表面与所述下晶圆的上表面键合。The object of the present invention is to provide a duplexer, which includes, from bottom to top, a package carrier, a lower wafer, an isolation wafer, and an upper wafer; the lower wafer is provided with an emission filter, The upper wafer is provided with a receiving filter; the upper surface of the isolation wafer is bonded to the lower surface of the upper wafer, and the lower surface of the isolation wafer is bonded to the upper surface of the lower wafer Together.
可选地,所述发射滤波器和所述接收滤波器在器件俯视方向上二者呈部分交叠设置。Optionally, the transmitting filter and the receiving filter are partially overlapped in the top view direction of the device.
可选地,所述发射滤波器和所述接收滤波器在器件俯视方向上投影的交并比为0.2至0.8。Optionally, the intersection ratio of the projection filter and the receiving filter in the top view direction of the device is 0.2 to 0.8.
可选地,所述隔离晶圆的材料为硅。Optionally, the material of the isolation wafer is silicon.
可选地,所述隔离晶圆的厚度为30-150微米。Optionally, the thickness of the isolation wafer is 30-150 microns.
可选地,所述上晶圆与所述下晶圆的距离为50-200微米。Optionally, the distance between the upper wafer and the lower wafer is 50-200 microns.
可选地,所述接收滤波器中,需要与外部相连的接收谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上, 再通过焊球与下方的所述封装载板连接;所述发射滤波器中,需要与外部相连的发射谐振器通过制作在所述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上,再通过键合线与所述封装载板上的键合手指相连。Optionally, in the receiving filter, the receiving resonator that needs to be connected to the outside is connected to a pad located on the lower surface of the lower wafer through a through hole made on the lower wafer, and then through welding The ball is connected to the package carrier board below; in the transmitting filter, the transmitting resonator that needs to be connected to the outside is connected to the through hole made on the upper wafer to the upper surface of the upper wafer. The bonding pad is connected to the bonding fingers on the package carrier through bonding wires.
可选地,所述接收滤波器中,需要与外部相连的接收谐振器通过制作在所述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上,再通过键合线与所述封装载板上的键合手指相连;所述发射滤波器中,需要与外部相连的发射谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上,再通过焊球与下方的所述封装载板连接。Optionally, in the receiving filter, the receiving resonator that needs to be connected to the outside is connected to the pads on the upper surface of the upper wafer through the through holes made on the upper wafer, and then through the key The bonding wire is connected to the bonding finger on the package carrier; in the emission filter, the emission resonator that needs to be connected to the outside is connected to the bottom crystal through the via hole made on the bottom wafer. The pads on the lower surface of the circle are connected to the package carrier board below through solder balls.
可选地,所述键合线的材料为金、铜或者铝。Optionally, the material of the bonding wire is gold, copper or aluminum.
本发明实施例的双工器通过在上晶圆与下晶圆之间插入隔离晶圆拉开了上下晶圆的间距,从而拉开了发射滤波器和接收滤波器的间距,进而减小了电容耦合,提高了器件性能。The duplexer of the embodiment of the present invention extends the distance between the upper and lower wafers by inserting an isolation wafer between the upper wafer and the lower wafer, thereby opening the distance between the transmitting filter and the receiving filter, thereby reducing the distance between the transmitting filter and the receiving filter. Capacitive coupling improves device performance.
附图说明Description of the drawings
附图用于更好地理解本发明,不构成对本发明的不当限定。其中:The drawings are used to better understand the present invention, and do not constitute an improper limitation of the present invention. among them:
图1是现有双工器的剖面示意图;Figure 1 is a schematic cross-sectional view of an existing duplexer;
图2是现有双工器的电路原理示意图;Fig. 2 is a schematic diagram of the circuit principle of the existing duplexer;
图3是本发明实施例一双工器的剖面示意图;3 is a schematic cross-sectional view of a duplexer according to an embodiment of the present invention;
图4是本发明实施例二双工器的剖面示意图;4 is a schematic cross-sectional view of the duplexer according to the second embodiment of the present invention;
图5是本发明实施例三双工器的剖面示意图;Figure 5 is a schematic cross-sectional view of a triple duplexer according to an embodiment of the present invention;
图6是本发明实施例二以及实施例三的双工器的电路原理示意图。FIG. 6 is a schematic diagram of the circuit principle of the duplexer in the second embodiment and the third embodiment of the present invention.
具体实施方式Detailed ways
下面结合附图与实施例对本发明作进一步说明。The present invention will be further described below in conjunction with the drawings and embodiments.
图1是现有双工器的剖面示意图,从下至上依次包括:封装载板SU、下晶圆W2和上晶圆W1。上晶圆W1的下表面与下晶圆W2的上 表面键合。下晶圆W2中设置有发射滤波器Tx,上晶圆W1中设置有接收滤波器Rx,发射滤波器Tx和接收滤波器Rx在器件俯视方向上二者呈错开设置。图2为现有双工器的电路示意图。为了示例的方便,该双工器中的发送滤波器和接收滤波器中分别包括四个串联单元和四个并联单元。如图1和图2所示,现有双工器中的下晶圆W2中的发送滤波器Tx和上晶圆中的W1中的接收滤波器Rx之间,形成了耦合电容C,双工器的隔离度性能会因为该电容耦合C而变差。FIG. 1 is a schematic cross-sectional view of a conventional duplexer, which includes, from bottom to top, a package carrier SU, a lower wafer W2, and an upper wafer W1. The lower surface of the upper wafer W1 is bonded to the upper surface of the lower wafer W2. The lower wafer W2 is provided with a transmitting filter Tx, and the upper wafer W1 is provided with a receiving filter Rx. The transmitting filter Tx and the receiving filter Rx are staggered in the device top view direction. Figure 2 is a schematic circuit diagram of a conventional duplexer. For the convenience of example, the transmitting filter and the receiving filter in the duplexer respectively include four series units and four parallel units. As shown in Figure 1 and Figure 2, a coupling capacitor C is formed between the transmitting filter Tx in the lower wafer W2 and the receiving filter Rx in the upper wafer W1 in the existing duplexer. The isolation performance of the device will deteriorate due to the capacitive coupling C.
本发明旨在是提供一种双工器,该双工器从下至上依次包括:封装载板、下晶圆、隔离晶圆和上晶圆;所述下晶圆中设置有发射滤波器,所述上晶圆中设置有接收滤波器;所述隔离晶圆的上表面与所述上晶圆的下表面键合,所述隔离晶圆的下表面与所述下晶圆的上表面键合。通过在上晶圆与下晶圆之间插入隔离晶圆拉开了上下晶圆的间距,从而拉开了收发射滤波器的间距,进而减小了电容耦合,提高了器件性能。The purpose of the present invention is to provide a duplexer, which includes, from bottom to top, a package carrier, a lower wafer, an isolation wafer, and an upper wafer; the lower wafer is provided with an emission filter, The upper wafer is provided with a receiving filter; the upper surface of the isolation wafer is bonded to the lower surface of the upper wafer, and the lower surface of the isolation wafer is bonded to the upper surface of the lower wafer Together. By inserting an isolation wafer between the upper wafer and the lower wafer, the distance between the upper and lower wafers is opened, thereby opening the distance between the transmitting and receiving filters, thereby reducing the capacitive coupling and improving the performance of the device.
传统双工器中,收发滤波器在器件俯视方向上二者呈错开设置。本发明实施例的双工器中,由于插入隔离晶圆导致上下晶圆距离拉大,从而导致收发滤波器之间的寄生电容已经有了明显的降低,其实可以使得收发滤波器之间没有必要完全错开,即可以实现更大面积的交叠,从而进一步缩小芯片的尺寸。因此,本发明实施例的双工器中,优选所述发射滤波器和所述接收滤波器在器件俯视方向上二者呈部分交叠设置。所述发射滤波器和所述接收滤波器在器件俯视方向上投影的交并比为0.2至0.8。In a traditional duplexer, the transceiver filters are staggered in the top view direction of the device. In the duplexer of the embodiment of the present invention, the distance between the upper and lower wafers is increased due to the insertion of the isolation wafer, which leads to a significant reduction in the parasitic capacitance between the transceiver filters. In fact, there is no need between the transceiver filters. Completely staggered, that is, a larger area of overlap can be achieved, thereby further reducing the size of the chip. Therefore, in the duplexer of the embodiment of the present invention, it is preferable that the transmitting filter and the receiving filter are partially overlapped in the top view direction of the device. The intersection ratio of the projection filter and the receiving filter in the top view direction of the device is 0.2 to 0.8.
图3是本发明实施例一双工器100的剖面示意图。该双工器100从下至上依次包括:封装载板SU、下晶圆W2、隔离晶圆W3和上晶圆W1。下晶圆W2中设置有发射滤波器Tx,上晶圆W1中设置有接收滤波器Rx。发射滤波器Tx和接收滤波器Rx在器件俯视方向上二者呈局部交叠设置。隔离晶圆W3的上表面与上晶圆W1的下表面键合,隔 离晶圆W3的下表面与下晶圆W2的上表面键合。该实施例的双工器100中,通过在上晶圆W1与下晶圆W2之间插入隔离晶圆W3拉开了上下晶圆的间距,从而拉开了发射滤波器Tx和接收滤波器Rx的间距,进而减小了Tx滤波器与Rx滤波器之间因为图形交叠产生的耦合电容C,提高了器件性能,另外允许发射滤波器Tx和接收滤波器Rx有部分交叠,有效地缩小器件尺寸。FIG. 3 is a schematic cross-sectional view of a duplexer 100 according to an embodiment of the present invention. The duplexer 100 includes, from bottom to top, a package carrier SU, a lower wafer W2, an isolation wafer W3, and an upper wafer W1. The lower wafer W2 is provided with a transmitting filter Tx, and the upper wafer W1 is provided with a receiving filter Rx. The transmitting filter Tx and the receiving filter Rx are partially overlapped in the top view direction of the device. The upper surface of the isolation wafer W3 is bonded to the lower surface of the upper wafer W1, and the lower surface of the isolation wafer W3 is bonded to the upper surface of the lower wafer W2. In the duplexer 100 of this embodiment, the distance between the upper and lower wafers is opened by inserting the isolation wafer W3 between the upper wafer W1 and the lower wafer W2, thereby opening the transmitting filter Tx and the receiving filter Rx. This reduces the coupling capacitance C between the Tx filter and the Rx filter due to the overlap of the graphics, improves the performance of the device, and allows the transmit filter Tx and the receive filter Rx to partially overlap, effectively reducing Device size.
隔离晶圆W3的材料可以是硅。硅晶圆具有成本较低,易于加工等优点。隔离晶圆W3的厚度可以为30-150微米。上晶圆W1与下晶圆W2的距离可以为50-200微米。The material of the isolation wafer W3 may be silicon. Silicon wafers have the advantages of low cost and easy processing. The thickness of the isolation wafer W3 may be 30-150 microns. The distance between the upper wafer W1 and the lower wafer W2 may be 50-200 microns.
上述的双工器中,无论发射滤波器还是接收滤波器,都是通过导通孔实现谐振器与封装载板电连接。该双工器内部,发射滤波器和接收滤波器之间通常形成了耦合电感,损害了器件性能。为此,考虑对电连接方式进行改进,提出本发明实施例二双工器200以及本发明实施例三双工器300。In the above-mentioned duplexer, no matter the transmitting filter or the receiving filter, the resonator is electrically connected to the package carrier through the through hole. Inside the duplexer, a coupling inductance is usually formed between the transmitting filter and the receiving filter, which impairs the performance of the device. For this reason, considering the improvement of the electrical connection mode, the duplexer 200 according to the second embodiment of the present invention and the three duplexer 300 according to the embodiment of the present invention are proposed.
图4是本发明实施例二双工器200的剖面示意图。如图4所示,该双工器200中,接收滤波器Rx中需要与外部相连的接收谐振器通过制作在下晶圆W2上的导通孔VRx连接到位于下晶圆W2下表面的焊盘上,再通过焊球与下方的封装载板SU连接;发射滤波器Tx中需要与外部相连的发射谐振器通过制作在上晶圆W1上的导通孔VTx连接到位于上晶圆W1上表面的焊盘上,再通过键合线LTx与封装载板SU上的键合手指相连。4 is a schematic cross-sectional view of the duplexer 200 according to the second embodiment of the present invention. As shown in FIG. 4, in the duplexer 200, the receiving resonator in the receiving filter Rx that needs to be connected to the outside is connected to the pad located on the lower surface of the lower wafer W2 through the via VRx made on the lower wafer W2 Connect to the package carrier SU underneath through solder balls; the transmitting resonator in the transmitting filter Tx that needs to be connected to the outside is connected to the upper surface of the upper wafer W1 through the via VTx made on the upper wafer W1 On the bonding pads, the bonding wires LTx are connected to the bonding fingers on the package carrier SU.
图5是本发明实施例三双工器300的剖面示意图。如图5所示,该双工器300中,接收滤波器Rx中需要与外部相连的接收谐振器通过制作在上晶圆W1上的导通孔V连接到位于上晶圆W1上表面的焊盘上,再通过键合线LRx与封装载板SU上的键合手指相连;发射滤波器Tx中需要与外部相连的发射谐振器通过制作在下晶圆W2上的导通 孔VTx连接到位于下晶圆W2下表面的焊盘上,再通过焊球与下方的封装载板SU连接。FIG. 5 is a schematic cross-sectional view of a triple duplexer 300 according to an embodiment of the present invention. As shown in FIG. 5, in the duplexer 300, the receiving resonator in the receiving filter Rx that needs to be connected to the outside is connected to the solder on the upper surface of the upper wafer W1 through the via hole V made on the upper wafer W1. On the disk, it is connected to the bonding finger on the package carrier SU through the bonding wire LRx; the transmitting resonator in the transmitting filter Tx that needs to be connected to the outside is connected to the lower wafer through the through hole VTx made on the lower wafer W2 The pads on the lower surface of the wafer W2 are connected to the package carrier SU underneath through solder balls.
图6是本发明实施例二以及实施例三的双工器的电路原理示意图。为了示例的方便,图6所示的双工器中的发送滤波器和接收滤波器中分别包括四个串联单元和四个并联单元。由于发送滤波器或接收滤波器中的部分谐振器不再通过导通孔而是通过键合线与封装载板进行电学连接,所以拉远了谐振器之间的互感距离,降低了耦合电感,提升了双工器的电学性能。FIG. 6 is a schematic diagram of the circuit principle of the duplexer in the second embodiment and the third embodiment of the present invention. For the convenience of example, the transmitting filter and the receiving filter in the duplexer shown in FIG. 6 respectively include four series units and four parallel units. Because part of the resonators in the transmitting filter or receiving filter no longer pass through the via holes but are electrically connected to the package carrier through the bonding wire, the mutual inductance distance between the resonators is extended, and the coupling inductance is reduced. Improved the electrical performance of the duplexer.
上述虽然结合附图对本发明的具体实施方式进行了描述,但并非对本发明保护范围的限制,所属领域技术人员应该明白,在本发明的技术方案的基础上,本领域技术人员不需要付出创造性劳动即可做出的各种修改或变形仍在本发明的保护范围以内。Although the specific embodiments of the present invention are described above in conjunction with the accompanying drawings, they do not limit the scope of protection of the present invention. Those skilled in the art should understand that on the basis of the technical solutions of the present invention, those skilled in the art do not need to make creative efforts. Various modifications or variations that can be made are still within the protection scope of the present invention.

Claims (9)

  1. 一种双工器,其特征在于:A duplexer characterized by:
    所述双工器从下至上依次包括:封装载板、下晶圆、隔离晶圆和上晶圆;The duplexer includes, from bottom to top, a package carrier, a lower wafer, an isolation wafer, and an upper wafer;
    所述下晶圆中设置有发射滤波器,所述上晶圆中设置有接收滤波器;A transmitting filter is provided in the lower wafer, and a receiving filter is provided in the upper wafer;
    所述隔离晶圆的上表面与所述上晶圆的下表面键合,所述隔离晶圆的下表面与所述下晶圆的上表面键合。The upper surface of the isolation wafer is bonded with the lower surface of the upper wafer, and the lower surface of the isolation wafer is bonded with the upper surface of the lower wafer.
  2. 根据权利要求1所述的双工器,其特征在于,在器件俯视方向上,所述发射滤波器和所述接收滤波器呈部分交叠设置。4. The duplexer according to claim 1, wherein in the top view direction of the device, the transmitting filter and the receiving filter are partially overlapped.
  3. 根据权利要求2所述的双工器,其特征在于,所述发射滤波器和所述接收滤波器在器件俯视方向上投影的交并比为0.2至0.8。The duplexer according to claim 2, wherein the intersection ratio of the projection filter and the receiving filter in the top view direction of the device is 0.2 to 0.8.
  4. 根据权利要求1所述的双工器,其特征在于,所述隔离晶圆的材料为硅。The duplexer of claim 1, wherein the material of the isolation wafer is silicon.
  5. 根据权利要求1所述的双工器,其特征在于,所述隔离晶圆的厚度为30-150微米。The duplexer of claim 1, wherein the thickness of the isolation wafer is 30-150 microns.
  6. 根据权利要求1所述的双工器,其特征在于,所述上晶圆与所述下晶圆的距离为50-200微米。The duplexer of claim 1, wherein the distance between the upper wafer and the lower wafer is 50-200 microns.
  7. 根据权利要求1所述的双工器,其特征在于,The duplexer of claim 1, wherein:
    所述接收滤波器中,需要与外部相连的接收谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上,再通过焊球与下方的所述封装载板连接;In the receiving filter, the receiving resonator that needs to be connected to the outside is connected to the pads on the lower surface of the lower wafer through the through holes made on the lower wafer, and then connected to the lower surface of the lower wafer through solder balls. The package carrier board connection;
    所述发射滤波器中,需要与外部相连的发射谐振器通过制作在所 述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上,再通过键合线与所述封装载板上的键合手指相连。In the transmitting filter, the transmitting resonator that needs to be connected to the outside is connected to the pad located on the upper surface of the upper wafer through the through hole made on the upper wafer, and then connected to the ground through a bonding wire. The bonding fingers on the package carrier board are connected.
  8. 根据权利要求1所述的双工器,其特征在于,The duplexer of claim 1, wherein:
    所述接收滤波器中,需要与外部相连的接收谐振器通过制作在所述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上,再通过键合线与所述封装载板上的键合手指相连;In the receiving filter, the receiving resonator that needs to be connected to the outside is connected to the pads on the upper surface of the upper wafer through the through holes made on the upper wafer, and then connected to the soldering pads on the upper surface of the upper wafer through bonding wires. The bonding fingers on the package carrier are connected;
    所述发射滤波器中,需要与外部相连的发射谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上,再通过焊球与下方的所述封装载板连接。In the transmitting filter, the transmitting resonator that needs to be connected to the outside is connected to the pad located on the lower surface of the lower wafer through the through hole made on the lower wafer, and then connected to the lower surface through the solder ball. The package carrier board is connected.
  9. 根据权利要求7或8所述的双工器,其特征在于,所述键合线的材料为金、铜或者铝。The duplexer according to claim 7 or 8, wherein the material of the bonding wire is gold, copper or aluminum.
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Publication number Priority date Publication date Assignee Title
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007060465A (en) * 2005-08-26 2007-03-08 Seiko Epson Corp Thin film surface acoustic wave device
US20100213585A1 (en) * 2009-02-25 2010-08-26 Elpida Memory, Inc. Semiconductor device
CN102111116A (en) * 2010-11-24 2011-06-29 张�浩 Integrated wafer level package
CN105990294A (en) * 2015-02-11 2016-10-05 特科芯有限公司 Application method of spacing layer in stacked crystal grain packaging
CN109831174A (en) * 2018-11-28 2019-05-31 天津大学 A kind of duplexer
WO2019123777A1 (en) * 2017-12-20 2019-06-27 ソニーセミコンダクタソリューションズ株式会社 Semiconductor device
CN111064447A (en) * 2019-11-15 2020-04-24 天津大学 Duplexer
CN111082190A (en) * 2019-11-15 2020-04-28 天津大学 Duplexer

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI250596B (en) * 2004-07-23 2006-03-01 Ind Tech Res Inst Wafer-level chip scale packaging method
KR100631212B1 (en) * 2005-08-01 2006-10-04 삼성전자주식회사 The monolithic duplexer and method thereof
US8836449B2 (en) * 2010-08-27 2014-09-16 Wei Pang Vertically integrated module in a wafer level package
US8421193B2 (en) * 2010-11-18 2013-04-16 Nanya Technology Corporation Integrated circuit device having through via and method for preparing the same
CN103887291B (en) * 2014-04-02 2017-01-04 华进半导体封装先导技术研发中心有限公司 Three-dimensional fan-out-type PoP encapsulating structure and manufacturing process
CN203968114U (en) * 2014-07-21 2014-11-26 无锡中星微电子有限公司 Wireless duplex transceiver
US9738516B2 (en) * 2015-04-29 2017-08-22 Taiwan Semiconductor Manufacturing Co., Ltd. Structure to reduce backside silicon damage
TW201735286A (en) * 2016-02-11 2017-10-01 天工方案公司 Device packaging using a recyclable carrier substrate
CN106921357A (en) * 2017-02-28 2017-07-04 宜确半导体(苏州)有限公司 Acoustic wave device and its wafer-level packaging method
CN108400123B (en) * 2018-03-07 2020-01-14 西安电子科技大学 Wafer-level heterogeneous integrated high-frequency system and manufacturing method thereof
DE102019204755A1 (en) * 2018-04-18 2019-10-24 Skyworks Solutions, Inc. ACOUSTIC WAVING DEVICE WITH MULTILAYER PIEZOELECTRIC SUBSTRATE
CN109861665B (en) * 2018-12-14 2021-06-11 天津大学 Piezoelectric acoustic wave filter

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007060465A (en) * 2005-08-26 2007-03-08 Seiko Epson Corp Thin film surface acoustic wave device
US20100213585A1 (en) * 2009-02-25 2010-08-26 Elpida Memory, Inc. Semiconductor device
CN102111116A (en) * 2010-11-24 2011-06-29 张�浩 Integrated wafer level package
CN105990294A (en) * 2015-02-11 2016-10-05 特科芯有限公司 Application method of spacing layer in stacked crystal grain packaging
WO2019123777A1 (en) * 2017-12-20 2019-06-27 ソニーセミコンダクタソリューションズ株式会社 Semiconductor device
CN109831174A (en) * 2018-11-28 2019-05-31 天津大学 A kind of duplexer
CN111064447A (en) * 2019-11-15 2020-04-24 天津大学 Duplexer
CN111082190A (en) * 2019-11-15 2020-04-28 天津大学 Duplexer

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