JP2006203652A - High frequency module and communication equipment using the same - Google Patents

High frequency module and communication equipment using the same Download PDF

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JP2006203652A
JP2006203652A JP2005014143A JP2005014143A JP2006203652A JP 2006203652 A JP2006203652 A JP 2006203652A JP 2005014143 A JP2005014143 A JP 2005014143A JP 2005014143 A JP2005014143 A JP 2005014143A JP 2006203652 A JP2006203652 A JP 2006203652A
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filter
duplexer
frequency module
transmission
power amplifier
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JP4423210B2 (en
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Hiroshi Kuroki
博 黒木
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Kyocera Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency module which can be made small and attain a high function and prevents a low frequency side attenuation characteristic of a SAW (surface acoustic waveguide) filter from deteriorating by reducing parasitic impedance in the SAW filter. <P>SOLUTION: The high frequency module comprises a power amplifier composed of a semiconductor element for power amplification and a matching circuit constituting at least a high frequency part, a filter for eliminating noise of a signal to be inputted to the power amplifier, a directional coupler and a detection circuit for detecting an output of the power amplifier and a duplexer for dividing transmission and reception signals on the surface of or inside a dielectric board obtained by laminating dielectric layers, and a terminal for external connection on the bottom of the dielectric board, wherein a semiconductor element for power amplification of the power amplifier and a filter for transmission of the duplexer are mounted on the surface side of a module board, a cavity is provided on the bottom side of the module board, and the filter for transmission of the duplexer is housed and mounted in the cavity. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、携帯電話などの移動体通信機器に用いられる高周波電力増幅装置、高周波フィルタ装置および高周波分波器装置を一体構成した小型・高性能かつ低価格な高周波モジュールおよびそれを用いた通信機器に関するものである。   The present invention relates to a small-sized, high-performance, low-cost high-frequency module integrally configured with a high-frequency power amplifying device, a high-frequency filter device, and a high-frequency demultiplexer device used in mobile communication devices such as mobile phones, and communication equipment using the same. It is about.

近年、携帯電話機の普及が進みつつあり、携帯電話機の機能、サービスの向上が図られている。このような携帯電話機では各送受信系の構成に必要な高周波信号処理回路を基板に搭載している。   In recent years, cellular phones have been widely used, and functions and services of cellular phones have been improved. In such a cellular phone, a high-frequency signal processing circuit necessary for the configuration of each transmission / reception system is mounted on a substrate.

従来の、高周波信号処理回路の一般的構成では、アンテナから入力された受信信号とアンテナに給電する送信信号とを切り替えるための送信用及び受信用デュプレクサが設けられている。   In a general configuration of a conventional high-frequency signal processing circuit, a transmission duplexer and a reception duplexer are provided for switching between a reception signal input from an antenna and a transmission signal fed to the antenna.

アンテナから入ってきた無線信号は、受信用デュプレクサの前段に設けられた整合回路を通って受信用デュプレクサに入力され、ここで受信信号が選択的に通過される。受信信号は、低雑音増幅器で増幅され、信号処理回路に供給される。   The radio signal that has entered from the antenna is input to the reception duplexer through a matching circuit provided in the preceding stage of the reception duplexer, where the reception signal is selectively passed. The received signal is amplified by a low noise amplifier and supplied to a signal processing circuit.

一方、送信信号は、所定の送信通過帯域内の送信信号を通過させる高周波フィルタを通ってノイズを落とされ、高周波電力増幅回路に伝えられる。高周波電力増幅回路は、この送信信号を電力増幅し、前記送信用デュプレクサに供給する。   On the other hand, the transmission signal is passed through a high frequency filter that allows transmission signals in a predetermined transmission pass band to pass through, and is transmitted to the high frequency power amplifier circuit. The high frequency power amplifier circuit amplifies the power of the transmission signal and supplies it to the transmission duplexer.

従来、前記送信用及び受信用デュプレクサ、整合回路、高周波電力増幅回路、高周波フィルタなどがそれぞれ個別部品として製造され、基板の上面にディスクリートに搭載されている。また、最近では、前記送信用及び受信用デュプレクサとして、所定の基板の表面に半田を用いて直接、フリップチップ実装するベアSAWチップを用いたものが提案されている。   Conventionally, the transmitting and receiving duplexers, the matching circuit, the high frequency power amplifier circuit, the high frequency filter, and the like are each manufactured as individual components and discretely mounted on the upper surface of the substrate. Recently, as the transmission and reception duplexers, those using bare SAW chips that are directly flip-chip mounted using solder on the surface of a predetermined substrate have been proposed.

図7は、高周波モジュールの一例を示すもので、(a)は概略断面図、(b)は、誘電体基板の裏面のパターン図である。図7に示す高周波モジュールは、セラミックスからなる誘電体基板51の表面に、電力増幅用半導体素子52が実装されており、ワイヤーボンディングで誘電体基板51表面の電極と接続されている。また、送信用及び受信用のデュプレクサとして、ベアSAWチップ53a、53bが誘電体基板51の表面に直接、フリップチップ実装される。また、誘電体基板51の表面には、フィルタ54が実装されたり、誘電体基板51の内部には、配線パターンによって、カプラ55や分波回路56、整合回路57などが形成される。   7A and 7B show an example of a high-frequency module. FIG. 7A is a schematic cross-sectional view, and FIG. 7B is a pattern diagram on the back surface of a dielectric substrate. In the high-frequency module shown in FIG. 7, a power amplification semiconductor element 52 is mounted on the surface of a dielectric substrate 51 made of ceramics, and is connected to an electrode on the surface of the dielectric substrate 51 by wire bonding. Further, bare SAW chips 53 a and 53 b are flip-chip mounted directly on the surface of the dielectric substrate 51 as a duplexer for transmission and reception. Further, a filter 54 is mounted on the surface of the dielectric substrate 51, and a coupler 55, a branching circuit 56, a matching circuit 57, and the like are formed in the dielectric substrate 51 by a wiring pattern.

また、誘電体基板51の裏面には、図7(b)に示すように、入出力および電源ラインの端子58と、その他グランド端子59が形成されている。   Further, as shown in FIG. 7B, input / output and power line terminals 58 and other ground terminals 59 are formed on the back surface of the dielectric substrate 51.

また、この高周波モジュールは、強度などの信頼性の点から、誘電体基板としてセラミックスが用いられ、セラミックスのグリーンシートに導体ペーストを用いて所定の導体パターンに印刷塗布した後に積層し、焼成して誘電体基板を作成した後、その誘電体基板51の表面に電力増幅用半導体素子52、ベアSAWチップ53a、53bやその他の電子部品を半田などによって実装して組み立てられている。(例えば、特許文献1、2参照)。
特開2002−43977号 特許第3108107号
In addition, this high-frequency module is made of ceramics as a dielectric substrate from the viewpoint of reliability such as strength, and is printed and applied to a predetermined conductive pattern using a conductive paste on a ceramic green sheet, and then laminated and fired. After the dielectric substrate is created, the power amplifying semiconductor element 52, bare SAW chips 53a and 53b, and other electronic components are mounted on the surface of the dielectric substrate 51 by soldering and assembled. (For example, refer to Patent Documents 1 and 2).
JP 2002-43977 A Japanese Patent No. 3108107

しかしながら、上記デュプレクサのSAWチップ53aまたは53bからなるSAWフィルタ101を含む回路は、図8に示すように、SAWフィルタエレメント101のグランドとSAWフィルタを搭載したパッケージや基板のグランドとの間に発生する寄生インダクタンス102の影響により、通過帯域に対して低周波側の減衰極が低くなり、減衰特性が劣化するという問題があった。   However, the circuit including the SAW filter 101 composed of the SAW chip 53a or 53b of the duplexer is generated between the ground of the SAW filter element 101 and the ground of the package or substrate on which the SAW filter is mounted, as shown in FIG. Due to the influence of the parasitic inductance 102, there is a problem that the attenuation pole on the low frequency side becomes lower than the pass band, and the attenuation characteristic deteriorates.

小型化、低背化を図るために、モジュールを構成する誘電体基板23の厚みを薄くすることが望まれるが、高周波モジュールの高機能化を図るためには、誘電体基板23の内部に様々な機能を内蔵する必要があるために、その厚みを薄くするも限界があった。その結果、デュプレクサの受信側のSAWフィルタの低域側減衰量が劣化し、さらに送信から受信へ漏れる送信電力つまりアイソレーションが劣化することになるという問題があった。   In order to reduce the size and height, it is desirable to reduce the thickness of the dielectric substrate 23 constituting the module. However, in order to increase the functionality of the high-frequency module, there are various types of components inside the dielectric substrate 23. However, there is a limit to reducing the thickness because it is necessary to incorporate such functions. As a result, there has been a problem that the attenuation amount on the low band side of the SAW filter on the reception side of the duplexer is deteriorated, and further, transmission power leaking from transmission to reception, that is, isolation is deteriorated.

従って、本発明は上記従来技術における問題点を除去し、さらに小型化及び高機能が可能で、かつ前記寄生インダクタンスを低減し、SAWフィルタの低周波側減衰特性が劣化するのを防止した高周波モジュールを提供することを目的とする。   Therefore, the present invention eliminates the problems in the prior art described above, further reduces the size and functions, and reduces the parasitic inductance and prevents the low frequency side attenuation characteristics of the SAW filter from deteriorating. The purpose is to provide.

本発明の高周波モジュールは、誘電体層を積層してなる誘電体基板の表面あるいは内部に、少なくとも高周波部を構成する電力増幅用半導体素子と整合回路で構成された電力増幅器と、該電力増幅器に入る信号のノイズを除去するフィルタと、該電力増幅器の出力を検出するための方向性結合器及び検波回路と、送受信の信号を分けるデュプレクサと、前記誘電体基板の底面に外部接続用端子を具備してなる高周波モジュールであって、前記モジュール基板の表面側に、前記電力増幅器の電力増幅用半導体素子および前記デュプレクサの送信用フィルタを実装し、前記モジュール基板の底面側にキャビティを設け、該キャビティ内に前記デュプレクサの送信用フィルタを収納、実装してなることを特徴とする。   A high-frequency module according to the present invention includes a power amplifier composed of a power amplifying semiconductor element and a matching circuit at least on a surface of a dielectric substrate formed by laminating dielectric layers, and a matching circuit. A filter that removes noise from the input signal, a directional coupler and detector circuit for detecting the output of the power amplifier, a duplexer that separates signals to be transmitted and received, and a terminal for external connection on the bottom surface of the dielectric substrate. A power amplification semiconductor element of the power amplifier and a transmission filter of the duplexer are mounted on the surface side of the module substrate, and a cavity is provided on the bottom surface side of the module substrate. The transmission filter of the duplexer is housed and mounted therein.

また、前記デュプレクサを構成する送信用フィルタおよび受信用フィルタは、いずれもSAWフィルタからなることが望ましく、その場合、前記SAWフィルタは、バンプを介してフリップチップ実装されてなり、さらに前記バンプによる実装部をリング状に配置された半田によって封止してなることを特徴とする。   Further, it is desirable that both the transmission filter and the reception filter constituting the duplexer are SAW filters. In this case, the SAW filter is flip-chip mounted via bumps, and further mounted by the bumps. The portion is sealed with solder arranged in a ring shape.

さらに、前記底面側のキャビティ内の底部にグランド電極が設けられており、前記グランド電極を前記誘電体基板の底面側に形成されたグランド端子と接続してなることを特徴とする。   Furthermore, a ground electrode is provided at the bottom in the cavity on the bottom surface side, and the ground electrode is connected to a ground terminal formed on the bottom surface side of the dielectric substrate.

本発明によれば、前記モジュール基板の底面側にキャビティを設け、該キャビティ内に前記デュプレクサの送信用フィルタを収納、実装してなることによって、モジュール基板の底面側に形成されグランド端子との接続長さを短くすることができる結果、受信用フィルタ中のエレメントのグランドとモジュール基板のグランド端子間に発生する寄生インダクタンスを小さくすることが可能になり、フィルタの低域側減衰特性の劣化を低減することが出来る。また、送信フィルタと受信フィルタを分割するために、送信から受信に電力が漏れるアイソレーション特性を向上させることができる。さらに、SAWフィルタを誘電体基板の表面と底面に配置するため、デュプレクサの占める面積比率を小さくすることができる結果、高周波モジュールの小型化も可能となる。   According to the present invention, a cavity is provided on the bottom surface side of the module substrate, and the transmission filter of the duplexer is accommodated and mounted in the cavity, thereby connecting to the ground terminal formed on the bottom surface side of the module substrate. As a result of shortening the length, it is possible to reduce the parasitic inductance generated between the ground of the element in the filter for reception and the ground terminal of the module board, thereby reducing the deterioration of the low-frequency attenuation characteristics of the filter. I can do it. Further, since the transmission filter and the reception filter are divided, it is possible to improve the isolation characteristic in which power leaks from transmission to reception. Furthermore, since the SAW filter is disposed on the top and bottom surfaces of the dielectric substrate, the area ratio occupied by the duplexer can be reduced, and as a result, the high-frequency module can be downsized.

以下に、本発明の実施の形態を、添付図面を参照しながら詳細に説明する。   Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

図1は、携帯電話装置等の移動体通信機器に用いられる、CDMAデュアルバンド方式の高周波信号処理回路のブロック構成図を示す。   FIG. 1 is a block diagram of a CDMA dual-band high-frequency signal processing circuit used for mobile communication devices such as mobile phone devices.

このCDMAデュアルバンド方式では、セルラー方式800MHz帯及びPCS方式1.9GHz帯の周波数バンドを持った2つの送受信系と、GPS(Global Positioning System)による測位機能を利用するためGPSの受信バンド1.5GHz帯を持った1つの受信系とから構成される。   In this CDMA dual band system, a GPS reception band of 1.5 GHz is used in order to use two transmission / reception systems having a frequency band of the cellular system 800 MHz band and the PCS system 1.9 GHz band and a positioning function by GPS (Global Positioning System). It consists of one receiving system with a band.

図1において、1はアンテナ、2は周波数帯を分けるためのLPF,HPFを含む分波器、3aは1.9GHz帯の送信系を分離するSAWデュプレクサ、3bは同受信系を分離するSAWデュプレクサ、4aは800MHz帯の送信系を分離するSAWデュプレクサ、4bは同受信系を分離するSAWデュプレクサである。また、12は前記分波器2から取り込まれるGPS信号を通過させるためのSAWフィルタである。3c,4cは、受信信号の位相を回転させる整合回路である。   In FIG. 1, 1 is an antenna, 2 is a duplexer including LPF and HPF for dividing a frequency band, 3a is a SAW duplexer that separates a transmission system in the 1.9 GHz band, and 3b is a SAW duplexer that separates the reception system. 4a is a SAW duplexer that separates the transmission system of the 800 MHz band, and 4b is a SAW duplexer that separates the reception system. Reference numeral 12 denotes a SAW filter for passing a GPS signal taken from the duplexer 2. Reference numerals 3c and 4c denote matching circuits that rotate the phase of the received signal.

送信系では、送信信号処理回路RFIC17から出力されるセルラー送信信号は、SAWフィルタを有するBPF9でノイズが落とされ、高周波電力増幅回路7に伝えられる。送信信号処理回路RFIC17から出力されるPCS送信信号は、SAWフィルタを有するBPF10でノイズが落とされ、高周波電力増幅回路8に伝えられる。   In the transmission system, the cellular transmission signal output from the transmission signal processing circuit RFIC 17 is subjected to noise reduction by the BPF 9 having a SAW filter and transmitted to the high frequency power amplifier circuit 7. The PCS transmission signal output from the transmission signal processing circuit RFIC 17 is subjected to noise reduction by the BPF 10 having a SAW filter and transmitted to the high-frequency power amplifier circuit 8.

高周波電力増幅回路7,8は、それぞれ800MHz帯,1.9GHz帯の周波数で駆動され、送信電力を増幅する。増幅された送信信号は、方向性結合器5,6を通り、前記SAWデュプレクサ4a,3aに入力される。   The high frequency power amplifier circuits 7 and 8 are driven at frequencies of 800 MHz band and 1.9 GHz band, respectively, and amplify transmission power. The amplified transmission signal passes through the directional couplers 5 and 6 and is input to the SAW duplexers 4a and 3a.

方向性結合器5,6は、高周波電力増幅回路7,8からの出力信号のレベルをモニタして、そのモニタ信号に基づいて高周波電力増幅回路のオートパワーコントロールする機能があり、そのモニタ出力は、検波用回路11に入力される。   The directional couplers 5 and 6 have a function of monitoring the level of the output signal from the high frequency power amplifier circuits 7 and 8 and performing auto power control of the high frequency power amplifier circuit based on the monitor signal. , And input to the detection circuit 11.

一方、受信系は、SAWデュプレクサ4b,3bで分離された受信信号を増幅する低雑音増幅器LNA14,13と、受信信号からノイズを除去する高周波フィルタ16,15とを備えている。高周波フィルタ16,15を通った受信信号は、受信信号処理回路RFIC18に伝えられ信号処理される。また、前記GPS用SAWフィルタ12で分離されたGPS信号は、受信信号処理回路RFIC18で信号処理される。   On the other hand, the reception system includes low noise amplifiers LNAs 14 and 13 for amplifying the reception signals separated by the SAW duplexers 4b and 3b, and high frequency filters 16 and 15 for removing noise from the reception signals. The received signals that have passed through the high frequency filters 16 and 15 are transmitted to the received signal processing circuit RFIC 18 and processed. The GPS signal separated by the GPS SAW filter 12 is subjected to signal processing by the reception signal processing circuit RFIC18.

前記デュプレクサの構成は限定されないが、好ましくは、36°Yカット−X伝搬のLiTaO結晶、64°Yカット−X伝搬のLiNbO結晶、45°Xカット−Z伝搬のLiB結晶などからなる基板上に、櫛歯状のIDT(Inter Digital Transducer)電極が形成されたものである。 The structure of the duplexer is not limited, but preferably 36 ° Y cut-X propagation LiTaO 3 crystal, 64 ° Y cut-X propagation LiNbO 3 crystal, 45 ° X cut-Z propagation LiB 4 O 7 crystal, etc. A comb-shaped IDT (Inter Digital Transducer) electrode is formed on a substrate made of

前記高周波電力増幅回路の構成も限定されないが、好ましくは、高周波信号を増幅する機能を持ち、小型化、高効率化を図るためにGaAsHBT(ガリウム砒素ヘテロジャンクションバイポーラトランジスタ)構造、又はP−HEMT構造のGaAsトランジスタやシリコン若しくはゲルマニウムトランジスタを含む半導体素子で形成されている。   The configuration of the high-frequency power amplifier circuit is not limited, but preferably has a function of amplifying a high-frequency signal, and a GaAsHBT (gallium arsenide heterojunction bipolar transistor) structure or a P-HEMT structure in order to reduce the size and increase the efficiency. The semiconductor device includes a GaAs transistor, a silicon or germanium transistor.

以上のような構成の高周波信号処理回路を含む移動体通信機器においては、各部に対する小型化、軽量化の要求が大きく、これらの要求を考慮して、高周波信号処理回路は、所望の特性が達成できる単位でモジュール化されている。   In a mobile communication device including a high-frequency signal processing circuit having the above-described configuration, there is a great demand for miniaturization and weight reduction of each part. In consideration of these requirements, the high-frequency signal processing circuit achieves desired characteristics. It is modularized in units that can be done.

すなわち、図1で太い点線22で示したように、分波器2、SAWデュプレクサ3a,3b,4a,4b、高周波電力増幅回路7,8、方向性結合器5,6などを含む分波系回路及び送信系回路が、1つの基板に形成された1つの高周波モジュール22を形成している。   That is, as indicated by a thick dotted line 22 in FIG. 1, a demultiplexing system including the demultiplexer 2, SAW duplexers 3a, 3b, 4a, 4b, high-frequency power amplifier circuits 7, 8, directional couplers 5, 6 and the like. The circuit and the transmission system circuit form one high-frequency module 22 formed on one substrate.

なお、高周波モジュール22を、800MHz帯の高周波モジュールと、1.9GHz帯の2つの高周波モジュールに分けるという実装方法も可能である。さらに低雑音増幅器LNA13,14と受信用高周波フィルタ15,16を含んだモジュールを追加して形成してもよい。   A mounting method is also possible in which the high-frequency module 22 is divided into a high-frequency module in the 800 MHz band and two high-frequency modules in the 1.9 GHz band. Further, a module including the low noise amplifiers LNA 13 and 14 and the reception high frequency filters 15 and 16 may be additionally formed.

以下、800MHz帯と、1.9GHz帯の2つの周波数帯を含む1つの高周波モジュール22に基づいて説明する。   Hereinafter, description will be given based on one high-frequency module 22 including two frequency bands of 800 MHz band and 1.9 GHz band.

図2に、高周波モジュール22の概略平面図を示し、図3にその概略断面図を示す。高周波モジュール22は、同一寸法形状の9層の誘電体層が積層された多層基板23を有している。   FIG. 2 shows a schematic plan view of the high-frequency module 22, and FIG. 3 shows a schematic cross-sectional view thereof. The high-frequency module 22 has a multilayer substrate 23 on which nine dielectric layers having the same size and shape are stacked.

多層基板23の表層には、各種のパターン、各種チップ部品のほか、BPF9,10、GPS用のSAWフィルタ12、検波用回路11、SAWデュプレクサとしてベアSAWチップ3a,4a,3b,4b、及び高周波電力増幅回路7,8の一部を構成する電力増幅用半導体素子24,25などが搭載され、これらは半田などで誘電体層上の導体パターンに実装、搭載されている。   On the surface layer of the multilayer substrate 23, in addition to various patterns and various chip components, BPF 9, 10, GPS SAW filter 12, detection circuit 11, bare SAW chips 3a, 4a, 3b, 4b as SAW duplexers, and high frequency Power amplifying semiconductor elements 24 and 25 constituting part of the power amplifying circuits 7 and 8 are mounted, and these are mounted and mounted on a conductor pattern on a dielectric layer with solder or the like.

電力増幅用半導体素子24,25は、多層基板23上の導体パターンとワイヤーボンディングで接続されている。電力増幅用半導体素子24、25の周囲には、同じく高周波電力増幅回路7、8の一部を構成する電力増幅用整合回路26、27がチップ部品や導体パターンで形成されている。   The power amplification semiconductor elements 24 and 25 are connected to the conductor pattern on the multilayer substrate 23 by wire bonding. Around the power amplifying semiconductor elements 24 and 25, power amplifying matching circuits 26 and 27 that are also part of the high-frequency power amplifying circuits 7 and 8 are formed by chip parts or conductor patterns.

なお、電力増幅用半導体素子24、25、電力増幅用整合回路26、27などは、多層基板の裏面に搭載するようにしてもよい。   The power amplification semiconductor elements 24 and 25, the power amplification matching circuits 26 and 27, and the like may be mounted on the back surface of the multilayer substrate.

多層基板23の内部には、整合回路3c,4cと、方向性結合器5,6とが内装され、さらに電力増幅用半導体素子24,25とBPF9,10との間にDCカット用結合コンデンサ28、BPF9,10と接地との間にコンデンサ29が内装されている。   Matching circuits 3c and 4c and directional couplers 5 and 6 are housed inside the multilayer substrate 23, and a DC-cut coupling capacitor 28 is provided between the power amplification semiconductor elements 24 and 25 and the BPFs 9 and 10. , BPFs 9 and 10 and a capacitor 29 are provided between the ground.

構造的にいえば、これらの内部素子を構成する、分布定数線路、結合線路、分布型コンデンサ、抵抗などの導体パターンが誘電体層中にそれぞれ形成されている。例えば、方向性結合器5、6を構成する結合線路は2枚の相重なる誘電体層上にそれぞれ形成されている。そして、各誘電体層には複数の層にわたって、回路を縦に接続するため必要なビアホール導体が縦方向に形成されている。特に、電力増幅用半導体素子24、25で発生する熱を逃がすため誘電体層を上下に貫通するサーマルビア50が設けられている。   In terms of structure, conductor patterns such as distributed constant lines, coupled lines, distributed capacitors, resistors, and the like that constitute these internal elements are respectively formed in the dielectric layers. For example, the coupling lines constituting the directional couplers 5 and 6 are respectively formed on two overlapping dielectric layers. In each dielectric layer, via hole conductors necessary for vertically connecting circuits are formed in a vertical direction across a plurality of layers. In particular, a thermal via 50 that vertically penetrates the dielectric layer is provided to release heat generated in the power amplification semiconductor elements 24 and 25.

一方、誘電体基板23の表面に実装されるベアSAWチップの実装構造について説明する。図4(a)は、ベアSAWチップの実装面側の表面パターンおよび高周波モジュール側の実装部のパターン図、(b)はベアSAWチップをフリップチップ実装したときの概略断面図である。   On the other hand, a mounting structure of a bare SAW chip mounted on the surface of the dielectric substrate 23 will be described. FIG. 4A is a pattern diagram of the surface pattern on the mounting surface side of the bare SAW chip and the mounting portion on the high frequency module side, and FIG. 4B is a schematic cross-sectional view when the bare SAW chip is flip-chip mounted.

図4(a)に示すように、ベアSAWチップは、タンタル酸リチウム単結晶等の圧電基板30の表面に、一対の入出力端子31a、31bと、櫛歯状共振子電極32、およびこれらを封止するために、接地用端子33がリング状に被着形成されている。一方、誘電体基板23側には、上記端子と対向する位置に一対の入出力用電極34a、34b、接地用電極35がリング状に形成されており、各端子、電極とを半田36によって接着してフリップチップ実装される。かかる構成によって、接地用端子33および接地用電極35によって囲まれた領域は、気密な空間37を形成し、励振電極である櫛歯状の共振子電極32は、この気密空間37内に封止される。   As shown in FIG. 4A, the bare SAW chip has a pair of input / output terminals 31a and 31b, a comb-like resonator electrode 32, and these on the surface of a piezoelectric substrate 30 such as a lithium tantalate single crystal. In order to seal, the grounding terminal 33 is formed in a ring shape. On the other hand, on the dielectric substrate 23 side, a pair of input / output electrodes 34a and 34b and a grounding electrode 35 are formed in a ring shape at positions facing the above terminals, and the terminals and electrodes are bonded by solder 36. And flip chip mounting. With this configuration, the region surrounded by the grounding terminal 33 and the grounding electrode 35 forms an airtight space 37, and the comb-like resonator electrode 32 as an excitation electrode is sealed in the airtight space 37. Is done.

次に、図5に、高周波モジュールの裏面の導体パターン図を示す。誘電体基板23の裏面には、外部回路に接続するためのモジュールの入出力端子や電源端子38と、グランド端子39が設けられている。   Next, FIG. 5 shows a conductor pattern diagram on the back surface of the high-frequency module. On the back surface of the dielectric substrate 23, an input / output terminal of a module for connecting to an external circuit, a power supply terminal 38, and a ground terminal 39 are provided.

本発明によれば、デュプレクサの送信側のSAWフィルタ4a,4bを表面側に実装搭載し、受信側のSAWフィルタ4b、5bを、誘電体基板23の底面に実装搭載することが重要である。   According to the present invention, it is important that the SAW filters 4 a and 4 b on the transmission side of the duplexer are mounted and mounted on the front surface side, and the SAW filters 4 b and 5 b on the receiving side are mounted and mounted on the bottom surface of the dielectric substrate 23.

即ち、デュプレクサの送信側のSAWフィルタ4a、5aは、誘電体基板23の表面に形成された導体パターンにフリップチップ実装されており、SAWフィルタ4a、5aのグランドは、ビアホール導体41を介して誘電体基板23の裏面のグランド端子39と接続されている。   That is, the SAW filters 4 a and 5 a on the transmission side of the duplexer are flip-chip mounted on a conductor pattern formed on the surface of the dielectric substrate 23, and the ground of the SAW filters 4 a and 5 a is dielectrically passed through the via-hole conductor 41. The back surface of the body substrate 23 is connected to the ground terminal 39.

一方、デュプレクサの送信側のSAWフィルタ4b、5bは形成されたキャビティ43内に収納し、キャビティ43内の底面に形成された実装パターンに直接フリップチップ実装することが重要である。   On the other hand, it is important that the SAW filters 4b and 5b on the transmission side of the duplexer are housed in the formed cavity 43 and directly mounted on the mounting pattern formed on the bottom surface of the cavity 43 by flip chip mounting.

そして、キャビティ43の底面には、図4(a)と同様に、一対の入出力用電極34a、34b、接地用電極35がリング状に形成されており、受信側のSAWフィルタ4b、5bが半田によってフリップチップ実装されている。また、接地用電極35は、キャビティ60の周囲に形成されたビアホール導体42によって、誘電体基板20の裏面に形成されたグランド端子39と接続されている。   Similarly to FIG. 4A, a pair of input / output electrodes 34a and 34b and a grounding electrode 35 are formed in a ring shape on the bottom surface of the cavity 43, and the SAW filters 4b and 5b on the receiving side are formed. It is flip-chip mounted with solder. The grounding electrode 35 is connected to a ground terminal 39 formed on the back surface of the dielectric substrate 20 by a via-hole conductor 42 formed around the cavity 60.

本発明によれば、受信用SAWフィルタを高周波モジュールにおける誘電体基板23の裏面にキャビティを設け、その中にて収納搭載させることによってが、最短でモジュール基板のグランド端子と接続される結果、受信用フィルタのエレメントのグランドとグランド端子間に発生する寄生インダクタンスを小さくすることができる。   According to the present invention, the reception SAW filter is provided with a cavity on the back surface of the dielectric substrate 23 in the high-frequency module, and is housed and mounted therein. As a result, the reception SAW filter is connected to the ground terminal of the module substrate in the shortest time. The parasitic inductance generated between the ground of the filter element and the ground terminal can be reduced.

特に本発明によれば、キャビティ43の深さが、誘電体基板23全体厚みの50%以下であることによって、寄生インダクタンスをより効果的に小さくすることができる。   In particular, according to the present invention, when the depth of the cavity 43 is 50% or less of the entire thickness of the dielectric substrate 23, the parasitic inductance can be reduced more effectively.

また、受信用のSAWフィルタのグランドと、グランド端子とを接続するビアホール導体の直径が大きいほど、インダクタンスを小さくすることができることから、特にこのビアホール導体42の直径は50μm以上、特に100μm以上であることが好適である。   In addition, since the inductance can be reduced as the diameter of the via-hole conductor connecting the ground of the SAW filter for reception and the ground terminal increases, the diameter of the via-hole conductor 42 is particularly 50 μm or more, particularly 100 μm or more. Is preferred.

また、誘電体基板の底面におけるキャビティ43内に樹脂などを充填してSAWフィルタを樹脂封止することが信頼性を高めるうえで望ましい。   In addition, it is desirable to improve the reliability by filling the SAW filter with a resin or the like in the cavity 43 on the bottom surface of the dielectric substrate.

なお、本発明における高周波モジュールは、セラミック誘電体基板23と、その表面や内部に配設された導体パターンや、ビア導体によって構成されるものであって、セラミックスからなるシート成形体の表面に、導体ペーストを印刷塗布するとともに、垂直導体として、シート状成形体に貫通穴を形成して導体ペーストを充填してビア導体を形成した後、それらシート状成形体を積層し、シート状成形体と導体ペーストとを焼成することによって作製され、各セラミック誘電体層と導体パターンとが交互に配置した多層の配線構造を有するものである。   The high-frequency module in the present invention is composed of a ceramic dielectric substrate 23, a conductor pattern disposed on the surface and inside thereof, and a via conductor, and is formed on the surface of a sheet molded body made of ceramics. After printing and applying a conductive paste, as a vertical conductor, after forming a through hole in the sheet-like molded body and filling the conductor paste to form a via conductor, the sheet-like molded body is laminated, It is produced by firing a conductor paste, and has a multilayer wiring structure in which ceramic dielectric layers and conductor patterns are alternately arranged.

本発明の高周波モジュールにおける誘電体基板は、例えばアルミナセラミックス、ムライトセラミックス、ガラスセラミックスなどの低温焼成セラミックスの群から選ばれる少なくとも1種で構成することが好適である。とりわけ、導体パターンやビア導体を形成する導体としてCu、Agなどの低抵抗導体を使用することができ、しかもこれら低抵抗導体と同時焼成して形成することができる利便性から、1000℃以下で焼成可能なガラスセラミックスなどの低温焼成セラミックスが最も望ましい。   The dielectric substrate in the high frequency module of the present invention is preferably composed of at least one selected from the group of low-temperature fired ceramics such as alumina ceramics, mullite ceramics, and glass ceramics. In particular, a low-resistance conductor such as Cu or Ag can be used as a conductor for forming a conductor pattern or a via conductor, and from the convenience that it can be formed by co-firing with these low-resistance conductors, at 1000 ° C. or less. Low temperature fired ceramics such as fireable glass ceramics are most desirable.

図6(a)(b)にてグランドインダクタにおける特性を示す。まず、(a)の実線1)は、送信フィルタに対してグランドインダクタンスが無いときの減衰量特性を示したものである。これに対して、受信フィルタを誘電体基板23表面側に実装し、誘電体基板23表面から底面へビアホール導体41を介して誘電体基板23の底面のグランド端子に接続した場合、誘電体基板23の基板厚みがあることから、グランドインダクタンスが生じ、例えば、厚み0.6mmのセラミック誘電体基板において、直径0.1mmのビアホール導体のインダクタンスは、0.6nHに値する。このようなインダクタンスが発生すると、点線2)に示すように、高周波側で5dB程度減衰特性を良好にすることができる。   The characteristics of the ground inductor are shown in FIGS. First, the solid line 1) of (a) shows the attenuation characteristic when there is no ground inductance with respect to the transmission filter. On the other hand, when the reception filter is mounted on the surface of the dielectric substrate 23 and connected to the ground terminal on the bottom surface of the dielectric substrate 23 via the via-hole conductor 41 from the surface of the dielectric substrate 23 to the bottom surface, the dielectric substrate 23 Therefore, for example, in a ceramic dielectric substrate having a thickness of 0.6 mm, the inductance of a via-hole conductor having a diameter of 0.1 mm is equivalent to 0.6 nH. When such an inductance is generated, the attenuation characteristic can be improved by about 5 dB on the high frequency side as shown by the dotted line 2).

一方、(b)で示す受信フィルタにおいて、グランドインダクタンスが無いときの特性を実線1)で示す。また、上記と同様に、受信フィルタを誘電体基板の表面側に実装した時の減衰量特性を点線2)で示す。実線1)と点線2)とを比較して明らかなように、低周波数側で、送信バンドの減衰量は5〜10dB劣化する。   On the other hand, in the receiving filter shown in (b), the characteristic when there is no ground inductance is shown by a solid line 1). Similarly to the above, the attenuation characteristic when the reception filter is mounted on the surface side of the dielectric substrate is indicated by a dotted line 2). As is clear from comparison between the solid line 1) and the dotted line 2), the attenuation of the transmission band deteriorates by 5 to 10 dB on the low frequency side.

そこで、図3、5のように本発明に基づき、受信フィルタを送信フィルタと分割し、モジュールのセラミック誘電体基板裏面に深さ0.3mmのキャビティを形成し、その中に厚み250μmのSAWチップからなる受信フィルタをフリップチップ実装し、キャビティ内に樹脂を充填し封止した。その結果、受信フィルタのグランドインダクタンスは、SAWチップのグランドからビアホール導体42を介して、誘電体基板23裏面のグランド端子39に接続した。かかる構造によれば、グランドインダクタンスが0.6nHから0.3nHに減少し、図6(b)の一点鎖線3)に示すとおり、低周波側が5dB程度改善され、良好な減衰特性が得られる。   Therefore, based on the present invention as shown in FIGS. 3 and 5, the reception filter is divided from the transmission filter, and a cavity having a depth of 0.3 mm is formed on the back surface of the ceramic dielectric substrate of the module, and a SAW chip having a thickness of 250 μm is formed therein. The reception filter made of was flip-chip mounted, filled with resin in the cavity, and sealed. As a result, the ground inductance of the reception filter was connected from the ground of the SAW chip to the ground terminal 39 on the back surface of the dielectric substrate 23 via the via-hole conductor 42. According to such a structure, the ground inductance is reduced from 0.6 nH to 0.3 nH, and as shown by the one-dot chain line 3) in FIG. 6B, the low frequency side is improved by about 5 dB, and a good attenuation characteristic is obtained.

CDMAデュアルバンド方式の高周波信号処理回路の代表的なブロック構成図を示す。A typical block diagram of a CDMA dual-band high-frequency signal processing circuit is shown. 図1の回路を具備する高周波モジュールの概略平面図を示す。The schematic plan view of the high frequency module which comprises the circuit of FIG. 1 is shown. 図2の高周波モジュールの概略断面図を示す。The schematic sectional drawing of the high frequency module of FIG. 2 is shown. (a)は、ベアSAWチップの実装面側の表面パターンおよび高周波モジュール側の実装部のパターン図、(b)はベアSAWチップをフリップチップ実装したときの概略断面図を示す。(A) is a pattern diagram of the surface pattern on the mounting surface side of the bare SAW chip and the mounting portion on the high frequency module side, and (b) is a schematic cross-sectional view when the bare SAW chip is flip-chip mounted. 本発明の高周波モジュールの裏面の導体パターン図を示す。The conductor pattern figure of the back surface of the high frequency module of this invention is shown. SAWフィルタのグランドインダクタンスによる特性を示した図である。It is the figure which showed the characteristic by the ground inductance of a SAW filter. 従来の高周波モジュールの一例を示す概略断面図である。It is a schematic sectional drawing which shows an example of the conventional high frequency module. グランドインダクタを持ったSAWフィルタの等価回路図である。It is an equivalent circuit diagram of a SAW filter having a ground inductor.

符号の説明Explanation of symbols

1・・・・・・・アンテナ
2・・・・・・・分波器
3、4・・・・・デュプレクサ
5、6・・・・・方向性結合器(カプラ)
7、8・・・・・電力増幅器
9、10・・・・送信用SAWフィルタ
11・・・・・・検波回路
12・・・・・・受信用 GPS SAWフィルタ
13、14・・・LNA
15、16・・・受信用SAW フィルタ
17・・・・・・送信用RFIC
18・・・・・・受信用RFIC
19・・・・・・べースバンドIC
20・・・・・・TCXO
21・・・・・・VCO
22・・・・・・高周波モジュール
23・・・・・・誘電体基板
24、25・・・電力増幅用半導体素子
26、27・・・電力増幅整合回路
30・・・・・・SAWエレメント
31・・・・・・SAW入出力電極
32・・・・・・SAWフィルタ電極
33・・・・・・SAW気密封止電極
34・・・・・・入出力電極バンプ
35・・・・・・気密封止電極バンプ
40・・・・・・エポキシ樹脂
41・・・・・・表層・底面間のビア
42・・・・・・ビアホール導体
43・・・・・・キャビティ
55・・・・・・カプラ(内蔵部品)
56・・・・・・分波回路(内蔵部品)
57・・・・・・整合回路(内蔵部品)
58・・・・・・入出力端子
59・・・・・・グランド端子
1 .... Antenna 2 ... Demultiplexer 3, 4 ... Duplexer 5, 6 ... Directional coupler (coupler)
7, 8... Power amplifier 9, 10... Transmission SAW filter 11... Detection circuit 12... Reception GPS SAW filter 13, 14.
15, 16 ... SAW filter for reception 17 ... RFIC for transmission
18 ... RFIC for reception
19 ... Baseband IC
20 ... TCXO
21 ... VCO
22... High frequency module 23... Dielectric substrate 24 and 25... Power amplification semiconductor element 26 and 27. SAW input / output electrode 32 SAW filter electrode 33 SAW hermetic sealing electrode 34 Input / output electrode bump 35 Hermetic sealing electrode bump 40... Epoxy resin 41... Via 42 between surface layer and bottom surface... Via hole conductor 43.・ Coupler (built-in parts)
56 ······ Demultiplexer circuit (built-in parts)
57 .... Matching circuit (built-in parts)
58 ... I / O terminal 59 ... Ground terminal

Claims (5)

誘電体層を積層してなる誘電体基板の表面あるいは内部に、少なくとも高周波部を構成する電力増幅用半導体素子と整合回路で構成された電力増幅器と、該電力増幅器に入る信号のノイズを除去するフィルタと、該電力増幅器の出力を検出するための方向性結合器及び検波回路と、送受信の信号を分けるデュプレクサと、前記誘電体基板の底面に外部接続用端子を具備してなる高周波モジュールであって、
前記モジュール基板の表面側に、前記電力増幅器の電力増幅用半導体素子および前記デュプレクサの送信用フィルタを実装し、前記モジュール基板の底面側にキャビティを設け、該キャビティ内に前記デュプレクサの送信用フィルタを収納、実装してなることを特徴とする高周波モジュール。
A power amplifier composed of a power amplifying semiconductor element constituting at least a high frequency portion and a matching circuit on the surface or inside of a dielectric substrate formed by laminating dielectric layers, and noise of signals entering the power amplifier are removed. A high-frequency module comprising a filter, a directional coupler and detector circuit for detecting the output of the power amplifier, a duplexer for separating transmission and reception signals, and an external connection terminal on the bottom surface of the dielectric substrate. And
The power amplification semiconductor element of the power amplifier and the transmission filter of the duplexer are mounted on the surface side of the module substrate, a cavity is provided on the bottom surface side of the module substrate, and the transmission filter of the duplexer is provided in the cavity. A high-frequency module characterized by being housed and mounted.
前記デュプレクサを構成する送信用フィルタおよび受信用フィルタが、いずれもSAWフィルタからなることを特徴とする請求項1記載の高周波モジュール。 The high-frequency module according to claim 1, wherein each of the transmission filter and the reception filter constituting the duplexer is a SAW filter. 前記SAWフィルタは、バンプを介してフリップチップ実装されてなることを特徴とする請求項2項記載の高周波モジュール。 The high-frequency module according to claim 2, wherein the SAW filter is flip-chip mounted via a bump. 前記底面側のキャビティ内の底部にグランド電極が設けられており、前記グランド電極を前記誘電体基板内に設けられたビアホール導体を介して前記誘電体基板の底面側に形成されたグランド端子と接続してなることを特徴とする請求項1記載の高周波モジュール。 A ground electrode is provided at the bottom of the bottom cavity, and the ground electrode is connected to a ground terminal formed on the bottom surface of the dielectric substrate through a via-hole conductor provided in the dielectric substrate. The high-frequency module according to claim 1, wherein 請求項1乃至請求項4のいずれか記載の高周波モジュールを具備することを特徴とする通信機器。 A communication device comprising the high-frequency module according to claim 1.
JP2005014143A 2005-01-21 2005-01-21 High frequency module and communication device using the same Expired - Fee Related JP4423210B2 (en)

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