WO2021082064A1 - 显示面板的制备方法及显示面板 - Google Patents

显示面板的制备方法及显示面板 Download PDF

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Publication number
WO2021082064A1
WO2021082064A1 PCT/CN2019/116759 CN2019116759W WO2021082064A1 WO 2021082064 A1 WO2021082064 A1 WO 2021082064A1 CN 2019116759 W CN2019116759 W CN 2019116759W WO 2021082064 A1 WO2021082064 A1 WO 2021082064A1
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Prior art keywords
layer
display panel
array substrate
manufacturing
electrode
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PCT/CN2019/116759
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English (en)
French (fr)
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谢华飞
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/622,479 priority Critical patent/US11158653B1/en
Publication of WO2021082064A1 publication Critical patent/WO2021082064A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/221—Changing the shape of the active layer in the devices, e.g. patterning by lift-off techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • the invention relates to the field of display technology, in particular to a method for preparing a display panel and a display panel.
  • LCD Liquid Crystal Display
  • OLED and micro led display adopt panel self-luminous technology, do not need backlight and upper and lower substrate packaging, theoretically, it can achieve borderless display and seamless splicing display.
  • OLED Organic Light-Emitting Diode
  • Micro Led do not need a frame to be packaged, based on the driving requirements, wiring and binding positions need to be arranged at the periphery of the display area, which will also appear outside the display area on the panel. Therefore, borderless display and seamless splicing cannot be realized.
  • the glass double-sided manufacturing process is a technology that integrates the wiring outside the display area of the panel, the location of the binding area, etc., into the back of the display panel, which can effectively realize technologies such as full-screen display, borderless display, and seamless splicing.
  • the double-sided glass process technology requires film forming, exposure, development, etching and other processes on both sides of the glass, which increases the difficulty on the basis of the existing single-sided process.
  • the existing method is usually to attach a layer of protective glue or protective film after the front process is completed, but the protective glue/protective film often has glue residue after subsequent deprotection and peeling, and the glass transition of the organic film such as the protective glue/protective film
  • the low temperature is not conducive to the subsequent physical vapor deposition or chemical vapor deposition of the reverse glass.
  • the purpose of the present invention is to provide a method for preparing a display panel and a display panel prepared by the method.
  • a protective layer, a sacrificial layer, and a passivation layer are introduced as the protective film.
  • the protective film layer structure design will not cause pollution to CVD, PVD and other vacuum equipment, and has hard and wear-resistant characteristics.
  • the film layer will not remain on the transmission machine, so it will not interfere with the backside manufacturing process.
  • the present invention provides a method for manufacturing a display panel, including: providing an array substrate; depositing a protective layer on the array substrate; depositing a sacrificial layer on the protective layer; depositing a planarization layer On the sacrificial layer; depositing a passivation layer on the planarization layer; flipping the array substrate; depositing and patterning a metal wire on the side of the array substrate away from the electrode protection layer; depositing a The dielectric layer is on the side of the array substrate away from the electrode protection layer and covers the metal wires; a transparent electrode is formed on the side of the dielectric layer away from the array substrate, and the transparent electrode is connected to the metal Line; apply a photoresist on the side of the dielectric layer away from the array substrate and cover the transparent electrode; flip the array substrate again; remove the passivation layer, the planarization layer, the A protective layer, the electrode protective layer, and the photoresist.
  • the material of the electrode protection layer includes silicon nitride, silicon oxide, aluminum oxide or hafnium dioxide.
  • the material of the protective layer is hydrogenated amorphous silicon.
  • the material of the planarization layer includes high temperature resistant polyimide, silica gel or acrylic.
  • the material of the passivation layer includes silicon nitride, silicon oxide, aluminum oxide or hafnium dioxide.
  • the material of the dielectric layer includes silicon nitride, silicon oxide, aluminum oxide or hafnium dioxide.
  • the method further includes: forming a through hole in the dielectric layer, the through hole Through the dielectric layer to the surface of the metal wire, the transparent electrode is connected to the metal wire through the through hole.
  • the passivation layer and the planarization layer are removed by laser lift-off; the protective layer and the planarization layer are removed by dry etching.
  • the electrode protection layer; the photoresist is removed by soaking in a stripping solution.
  • the present invention also provides a display panel, which is prepared by the method for manufacturing the display panel described above.
  • the substrate includes: a substrate; a thin film transistor layer arranged on one side of the substrate; a pixel electrode arranged on the thin film transistor layer, and the pixel electrode is connected to the thin film transistor layer; and a metal wire is arranged on the thin film transistor layer.
  • the present invention provides a method for preparing a display panel and a display panel.
  • a protective layer, a sacrificial layer, a planarization layer, and a passivation layer are introduced as a protective film.
  • the structure of the protective film is designed It will not cause pollution to CVD, PVD and other vacuum equipment, and has hard and wear-resistant properties.
  • the film will not remain on the conveyor platform, so it will not interfere with the backside manufacturing process.
  • the film is formed by conventional CVD and coating machines, the flatness of the film surface is conducive to transport and adsorption, and the protective film can be completely removed by laser and dry engraving.
  • the process method can effectively realize the double-sided process of single glass.
  • FIG. 1 is a schematic diagram of the structure of an array substrate provided by the present invention.
  • FIG. 2 is a schematic diagram of the structure of the contact protection layer, the protection layer, the planarization layer, and the passivation layer of the display panel provided by the present invention
  • FIG. 3 is a schematic diagram of the structure of the metal wire, the dielectric layer and the transparent electrode of the display panel provided by the present invention
  • FIG. 4 is a schematic diagram of the structure of the display panel prepared by the method of manufacturing the display panel provided by the present invention.
  • Pixel electrode 104 active layer 1031; light shielding layer 1021;
  • Planarization layer 107 metal line 109; dielectric layer 110;
  • Transparent electrode 111 photoresist 112; through hole 1101.
  • the present invention provides a method for manufacturing a display panel.
  • the method specifically includes the following steps:
  • an array substrate 100 As shown in FIG. 1, an array substrate 100 is provided; the array substrate 100 includes a substrate 101, a thin film transistor layer 103 and a pixel electrode 104.
  • a buffer layer 102 is provided between the substrate 101 and the thin film transistor layer 103, and a light shielding layer 1021 is provided in the buffer layer 102 and corresponds to the thin film transistor layer 103.
  • the thin film transistor layer 103 is disposed on the array substrate 100, and the thin film transistor has a top gate structure.
  • the thin film transistor layer 103 has an active layer 1031, and the material of the active layer 1031 includes IGZO, ZnO, ZTO, IGZTO, a-Si, LTPS, and carbon nanotubes.
  • the pixel electrode 104 is disposed on a side of the thin film transistor layer 103 away from the substrate 101, and the pixel electrode 104 is connected to the thin film transistor layer 103.
  • a protective layer 105 is deposited on the array substrate 100; specifically, the protective layer 105 is disposed on the thin film transistor layer 103 and covers the pixel electrode 104, and the protective layer 105 is The layer 105 is used as a protective layer for the pixel electrode 104.
  • the material of the protective layer 105 includes silicon nitride, silicon oxide, aluminum oxide or hafnium dioxide.
  • the material of the sacrificial layer 106 is hydrogenated amorphous silicon.
  • planarization layer 107 on the sacrificial layer 106; the material of the planarization layer 107 includes high-temperature resistant polyimide, silica gel or acrylic.
  • the planarization layer 107 is used to planarize the sacrificial layer 106, which facilitates the transfer and adsorption during the manufacturing process of the display panel.
  • the material of the passivation layer 108 includes silicon nitride, silicon oxide, aluminum oxide or hafnium dioxide.
  • the passivation layer 108 may be a single-layer or multi-layer structure to isolate and protect the planarization layer 107.
  • the protective film structure of the protective layer 105, the sacrificial layer 106, the planarization layer 107, and the passivation layer 108 is introduced into the front surface of the display panel of the present invention.
  • the protective film layer structure design will not cause CVD, PVD and other vacuum equipment. Pollution, and hard and wear-resistant properties, will not cause peeling residue to the transmission machine and the film will not interfere with the process of the back of the panel.
  • the material of the dielectric layer 110 includes silicon nitride, silicon oxide, aluminum oxide or hafnium dioxide.
  • the method further includes:
  • a through hole 1101 is formed in the dielectric layer 110, and the through hole 1101 penetrates the dielectric layer 110 to the surface of the metal wire 109.
  • a transparent electrode 111 is formed on the side of the dielectric layer 110 away from the array substrate 100, and the transparent electrode 111 is connected to the metal wire 109 through the through hole 1101.
  • the passivation layer 108 and the planarization layer 107 are removed by laser lift-off.
  • the sacrificial layer 106 and the protective layer 105 are removed by dry etching.
  • the photoresist 112 is removed by soaking in a stripping solution.
  • the present invention provides a method for manufacturing a display panel.
  • a protective layer 105, a sacrificial layer 106, a planarization layer 107, and a passivation layer 108 are introduced as a protective film.
  • the structural design will not cause pollution to CVD, PVD and other vacuum equipment, and has hard and wear-resistant characteristics.
  • the film will not remain on the transmission machine, so it will not interfere with the backside manufacturing process.
  • the film is formed by conventional CVD and coating machines, the flatness of the film surface is conducive to transport and adsorption, and the protective film can be completely removed by laser and dry engraving.
  • the process method can effectively realize the double-sided process of single glass.
  • the present invention also provides a display panel, which is prepared by the above-mentioned manufacturing method of the display panel.
  • the display panel includes: a substrate 101, a thin film transistor layer 103, a pixel electrode 104, a metal line 109, a dielectric layer 110 and a transparent electrode 111.
  • the thin film transistor layer 103 is provided on one side of the substrate 101; the pixel electrode 111 is provided on the side of the thin film transistor layer 103 away from the substrate 101, and the pixel electrode 104 is connected to The thin film transistor layer 103.
  • the metal wire 109 is provided on the side of the substrate 101 away from the thin film transistor layer 103; the dielectric layer 110 is provided on the substrate 101 and the metal wire 109; the transparent The electrode 111 is disposed on the dielectric layer 110 and connected to the metal wire 109.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

本发明提供了一种显示面板的制备方法及显示面板，在显示面板正面制程完成时，引入了保护层、牺牲层、平坦化层以及钝化层的结构作为保护膜，该保护膜膜层结构设计不会对CVD、PVD等真空设备造成污染，以及具有硬性耐磨特性，该膜层不会残留在传输机台上，因此不会干扰到背面制程。同时常规CVD和涂布机台成膜时，膜层表面平坦度有利于传送吸附，可通过激光及干刻完整的去除保护膜，该工艺方法可有效实现单玻璃的双面制程。

Description

显示面板的制备方法及显示面板 技术领域
本发明涉及显示技术领域，特别是一种显示面板的制备方法及显示面板。
 背景技术
液晶显示器（Liquid Crystal Display，LCD）是把液晶封装在阵列基板和彩膜基板间，控制每个像素的通电，来使液晶发生偏转控制背光通过实现画面显示。由于液晶的封装需要边框框胶，所以LCD在无边框及拼接显示上具有一定的局限性。相比LCD，OLED和micro led显示通过面板自发光技术，不需要背光及上下基板封装，理论上可做到无边框显示及无缝拼接显示。
有机发光二极管（Organic Light-Emitting Diode, OLED）和Micro Led虽然无需边框进行封装，但基于驱动需求，在显示区域外围需布置走线及绑定的位置，这样同样会在面板上出现显示区域外的面积，从而不能实现无边框显示及无缝拼接。玻璃双面制程是将面板显示区域外的走线、绑定区的位置等集成到显示面板背部的技术，可有效实现全面屏显示、无边框显示、无缝拼接等技术。
 技术问题
双面玻璃制程技术要求在玻璃的两面进行成膜、曝光、显影、刻蚀等工艺，在现有单面工艺的基础增加了难度，其中一面玻璃（正面）制程完成后在进行另一面玻璃（反面）制程时对正面膜层的保护就是个难点。现有方法通常为在正面制程完成后贴附一层保护胶或保护膜，但保护胶/保护膜在后续的去保护剥离后常会有胶残留，且保护胶/保护膜等有机膜的玻璃转化温度低，不利于后续反面玻璃的物理气相沉积或化学气相沉积等制程。
因此，急需提供一种新的显示面板的制备方法及显示面板，可以在进行双面制备的时候提供一保护膜，并且保护膜去除后并不影响后续的物理气相沉积或化学气相沉积等制程。
 技术解决方案
本发明的目的是，提供了一种显示面板的制备方法及由所述制备方法制备的显示面板，在显示面板正面制备完成时，引入了保护层、牺牲层以及钝化层的结构作为保护膜，该保护膜膜层结构设计不会对CVD、PVD等真空设备造成污染，以及具有硬性耐磨特性，该膜层不会残留在传输机台上，因此不会干扰到背面制程。
为达到上述目的，本发明提供一种显示面板的制备方法，包括：提供一阵列基板；沉积一保护层于所述阵列基板上；沉积一牺牲层于所述保护层上；沉积一平坦化层于所述牺牲层上；沉积一钝化层于所述平坦化层上；翻转所述阵列基板；沉积并图案化一金属线于所述阵列基板远离所述电极保护层的一侧；沉积一介质层于所述阵列基板远离所述电极保护层的一侧且包覆所述金属线；形成一透明电极于所述介质层远离所述阵列基板的一侧，所述透明电极连接所述金属线；涂布一光刻胶于所述介质层远离所述阵列基板的一侧且覆盖所述透明电极；再次翻转所述阵列基板；去除所述钝化层、所述平坦化层、所述保护层、所述电极保护层以及所述光刻胶。
进一步地，所述电极保护层的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
进一步地，所述保护层的材料为氢化非晶硅。
进一步地，所述平坦化层的材料包括耐高温的聚酰亚胺、硅胶或压克力。
进一步地，所述钝化层的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
进一步地，所述介质层的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
进一步地，在所述沉积一介质层于所述阵列基板远离所述保护层的一侧且包覆所述金属线步骤后：还包括：形成一通孔于所述介质层中，所述通孔贯穿所述介质层直至所述金属线表面，所述透明电极通过所述通孔连接所述金属线。
进一步地，在去除所述钝化层、所述平坦化层的步骤中，通过激光剥离方式去除所述钝化层以及所述平坦化层；通过干法蚀刻的方式去除所述保护层以及所述电极保护层；通过浸泡剥离液的方式去除所述光刻胶。
本发明还提供一种显示面板，由前文所述的显示面板的制备方法制备。
进一步地，包括：基板；薄膜晶体管层，设于所述基板的一侧；像素电极，设于所述薄膜晶体管层上，所述像素电极连接所述薄膜晶体管层；金属线，设于所述阵列基板的背面；介质层，设于所述金属线上且贴附所述阵列基板的背面；透明电极，设于所述介质层上且连接所述金属线。
 有益效果
本发明提供了一种显示面板的制备方法及显示面板，在显示面板正面完成时，引入了保护层、牺牲层、平坦化层以及钝化层的结构作为保护膜，该保护膜膜层结构设计不会对CVD、PVD等真空设备造成污染，以及具有硬性耐磨特性，该膜层不会残留在传输机台上，因此不会干扰到背面制程。同时常规CVD和涂布机台成膜时，膜层表面平坦度有利于传送吸附，可通过激光及干刻完整的去除保护膜。该工艺方法可有效实现单玻璃的双面制程。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明提供的阵列基板的结构示意图；
图2为本发明提供的显示面板的接触保护层、保护层、平坦化层以及钝化层结构示意图；
图3为本发明提供的显示面板的金属线、介质层以及透明电极的结构示意图；
图4为本发明提供的通过显示面板的制备方法制备得到的显示面板的结构示意图。
阵列基板100；
基板101；缓冲层102；薄膜晶体管层103
像素电极104；有源层1031；遮光层1021；
保护层105；牺牲层106；钝化层108；
平坦化层107；金属线109；介质层110；
透明电极111；光刻胶112；通孔1101。
 本发明的实施方式
以下是各实施例的说明是参考附加的图式，用以例示本发明可以用实施的特定实施例。本发明所提到的方向用语，例如上、下、前、后、左、右、内、外、侧等，仅是参考附图式的方向。本发明提到的元件名称，例如第一、第二等，仅是区分不同的元部件，可以更好的表达。在图中，结构相似的单元以相同标号表示。
本发明提供一种显示面板的制备方法，在一实施例中，具体包括如下步骤：
S1）如图1所示，提供一阵列基板100；所述阵列基板100包括基板101，薄膜晶体管层103以及像素电极104。
所述基板101与所述薄膜晶体管层103之间设有一缓冲层102，所述缓冲层102中设有一遮光层1021且对应所述薄膜晶体管层103。
所述薄膜晶体管层103设于所述阵列基板100上，所述薄膜晶体管为顶栅结构。所述薄膜晶体管层103具有一有源层1031，所述有源层1031的材料包括IGZO、ZnO、ZTO、IGZTO、a-Si、LTPS以及碳纳米管。
所述像素电极104设于所述薄膜晶体管层103远离所述基板101的一侧，所述像素电极104连接所述薄膜晶体管层103。
S2）如图2所示，沉积保护层105于所述阵列基板100上；具体的说，所述保护层105设于所述薄膜晶体管层103上且包覆所述像素电极104，所述保护层105用以作为所述像素电极104的保护层。
所述保护层105的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
S3）沉积一牺牲层106于所述保护层105上；具体地说，所述牺牲层106设于所述保护层105远离所述薄膜晶体管层103的一侧。
所述牺牲层106的材料为氢化非晶硅。
S4）沉积一平坦化层107于所述牺牲层106上；所述平坦化层107的材料包括耐高温的聚酰亚胺、硅胶或压克力。
所述平坦化层107用以使所述牺牲层106平坦化，有利于在显示面板的制备过程中的传送吸附。
S5）涂布一钝化层108于所述平坦化层107上；所述钝化层108的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
所述钝化层108可以为单层或多层结构，用以对所述平坦化层107进行隔绝保护。
本发明显示面板的正面制作中引入了保护层105,、牺牲层106、平坦化层107以及钝化层108的保护膜结构，该保护膜膜层结构设计不会对CVD、PVD等真空设备造成污染，以及具有硬性耐磨特性，不会对传输机台造成剥离残留且膜层不会干扰到面板背面制程。
S6）如图3所示，翻转所述阵列基板100；对显示面板的背面进行制备。
S7）沉积并图案化一金属线109于所述阵列基板100远离所述保护层105的一侧，具体的讲，所述金属线109设于所述基板101远离所述薄膜晶体管层103的一侧。
S8）沉积一介质层110于所述阵列基板100远离所述保护层105的一侧且包覆所述金属线109。
所述介质层110的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
在所述沉积一介质层110于所述阵列基板100远离所述牺牲层106的一侧且包覆所述金属线109步骤后：还包括：
形成一通孔1101于所述介质层110中，所述通孔1101贯穿所述介质层110直至所述金属线109表面。
S9）形成一透明电极111于所述介质层110远离所述阵列基板100的一侧，所述透明电极111通过所述通孔1101连接所述金属线109。
S10）涂布一光刻胶112于所述介质层110远离所述阵列基板100的一侧且覆盖所述透明电极111。所述光刻胶112用以保护所述金属线109，免受后续工艺制程影响。
S11）再次翻转所述阵列基板100。
S12）去除所述钝化层108、所述平坦化层107、所述牺牲层106、所述保护层105以及所述光刻胶112后，形成如图4所示的显示面板。
在去除所述钝化层108、所述平坦化层107的步骤中，通过激光剥离方式去除所述钝化层108以及所述平坦化层107。
在去除所述牺牲层106、所述保护层105的步骤中，通过干法蚀刻的方式去除所述牺牲层106以及所述保护层105。
在去除所述光刻胶112的步骤中，通过浸泡剥离液的方式去除所述光刻胶112。
本发明提供了一种显示面板的制备方法，在显示面板正面制备的时候，引入了保护层105，牺牲层106、平坦化层107以及钝化层108的结构作为保护膜，该保护膜膜层结构设计不会对CVD、PVD等真空设备造成污染，以及具有硬性耐磨特性，该膜层不会残留在传输机台上，因此不会干扰到背面制程。同时常规CVD和涂布机台成膜时，膜层表面平坦度有利于传送吸附，可通过激光及干刻完整的去除保护膜。该工艺方法可有效实现单玻璃的双面制程。
如图4所示，本发明还提供一种显示面板，由上述显示面板的制备方法制备得到。
所述显示面板包括：基板101，薄膜晶体管层103，像素电极104，金属线109，介质层110以及透明电极111。
在基板101的正面，所述薄膜晶体管层103设于所述基板101的一侧；所述像素电极111设于所述薄膜晶体管层103远离所述基板101的一侧，所述像素电极104连接所述薄膜晶体管层103。
在基板101的背面，所述金属线109设于所述基板101远离所述薄膜晶体管层103的一侧；所述介质层110设于所述基板101以及所述金属线109上；所述透明电极111设于所述介质层110上且连接所述金属线109。
本发明的技术范围不仅仅局限于所述说明中的内容，本领域技术人员可以在不脱离本发明技术思想的前提下，对所述实施例进行多种变形和修改，而这些变形和修改均应当属于本发明的范围内。

Claims (10)

  1.   一种显示面板的制备方法，其中，包括：
    提供一阵列基板；
    在阵列基板正面沉积一保护层于所述阵列基板上；
    沉积一牺牲层于所述保护层上；
    涂布一平坦化层于所述牺牲层上；
    沉积一钝化层于所述平坦化层上；
    翻转所述阵列基板；
    沉积并图案化一金属线于所述阵列基板远离所述电极保护层的一侧；
    沉积一介质层于所述阵列基板远离所述电极保护层的一侧且包覆所述金属线；
    形成一透明电极于所述介质层远离所述阵列基板的一侧，所述透明电极连接所述金属线；
    涂布一光刻胶于所述介质层远离所述阵列基板的一侧且覆盖所述透明电极；
    再次翻转所述阵列基板；
    去除所述钝化层、所述平坦化层、所述牺牲层、所述电极保护层以及所述光刻胶。
  2.   根据权利要求1所述的显示面板的制备方法，其中，
    所述电极保护层的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
  3.   根据权利要求1所述的显示面板的制备方法，其中，
    所述牺牲层的材料为氢化非晶硅。
  4.   根据权利要求1所述的显示面板的制备方法，其中，
    所述平坦化层的材料包括耐高温的聚酰亚胺、硅胶或压克力。
  5.   根据权利要求1所述的显示面板的制备方法，其中，
    所述钝化层的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
  6.   根据权利要求1所述的显示面板的制备方法，其中，
    所述介质层的材料包括氮化硅、氧化硅、氧化铝或二氧化铪。
  7.   根据权利要求1所述的显示面板的制备方法，其中，
    在所述的沉积一介质层于所述阵列基板远离所述电极保护层的一侧且包覆所述金属线的步骤之后：还包括：
    形成一通孔于所述介质层中，所述通孔贯穿所述介质层直至所述金属线表面，所述透明电极通过所述通孔连接所述金属线。
  8.   根据权利要求1所述的显示面板的制备方法，其中，
    在所述的去除所述钝化层、所述平坦化层、所述保护层、所述电极保护层以及所述光刻胶的步骤中，
    通过激光剥离方式去除所述钝化层以及所述平坦化层；
    通过干法蚀刻的方式去除所述牺牲层以及所述电极保护层；
    通过浸泡剥离液的方式去除所述光刻胶。
  9. 一种采用如权利要求1所述的显示面板的制备方法制备的显示面板。
  10. 根据权利要求9所述的显示面板，其中，包括：
    基板；
    薄膜晶体管，设于所述基板的一侧；
    像素电极，设于所述薄膜晶体管上，所述像素电极连接所述薄膜晶体管漏极；
    金属线，设于所述阵列基板的背面；
    介质层，设于所述金属线上且贴附所述阵列基板的背面；
    透明电极，设于所述介质层上且连接所述金属线。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1961413A (zh) * 2004-06-28 2007-05-09 英特尔公司 形成半导体布线和最终器件的方法
CN101230226A (zh) * 2007-01-25 2008-07-30 新应材股份有限公司 一种双面微影蚀刻新制程及其保护层的组成
US20160178822A1 (en) * 2014-12-18 2016-06-23 Samsung Display Co. Ltd. Wire grid polarizer and method of fabricating the same
CN109148368A (zh) * 2018-07-11 2019-01-04 西安电子科技大学 AlGaN/GaN HEMT器件的外延层转移方法
CN110010627A (zh) * 2019-04-12 2019-07-12 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5408848B2 (ja) * 2007-07-11 2014-02-05 株式会社ジャパンディスプレイ 半導体装置の製造方法
US10600671B2 (en) * 2016-11-15 2020-03-24 X-Celeprint Limited Micro-transfer-printable flip-chip structures and methods
CN109326624B (zh) * 2017-08-01 2021-12-24 京东方科技集团股份有限公司 像素电路、其制造方法及显示装置
CN109216427B (zh) * 2018-10-25 2021-03-30 上海天马微电子有限公司 一种显示面板、显示面板的制作方法及显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1961413A (zh) * 2004-06-28 2007-05-09 英特尔公司 形成半导体布线和最终器件的方法
CN101230226A (zh) * 2007-01-25 2008-07-30 新应材股份有限公司 一种双面微影蚀刻新制程及其保护层的组成
US20160178822A1 (en) * 2014-12-18 2016-06-23 Samsung Display Co. Ltd. Wire grid polarizer and method of fabricating the same
CN109148368A (zh) * 2018-07-11 2019-01-04 西安电子科技大学 AlGaN/GaN HEMT器件的外延层转移方法
CN110010627A (zh) * 2019-04-12 2019-07-12 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示装置

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