WO2020259305A1 - 极化码的译码方法、装置、存储介质和终端 - Google Patents

极化码的译码方法、装置、存储介质和终端 Download PDF

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WO2020259305A1
WO2020259305A1 PCT/CN2020/095631 CN2020095631W WO2020259305A1 WO 2020259305 A1 WO2020259305 A1 WO 2020259305A1 CN 2020095631 W CN2020095631 W CN 2020095631W WO 2020259305 A1 WO2020259305 A1 WO 2020259305A1
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polar codes
group
polar
length
codes
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PCT/CN2020/095631
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English (en)
French (fr)
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史光明
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深圳市中兴微电子技术有限公司
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Priority to JP2021569504A priority Critical patent/JP7417635B2/ja
Priority to EP20832402.0A priority patent/EP3958487A4/en
Priority to US17/617,305 priority patent/US11936401B2/en
Publication of WO2020259305A1 publication Critical patent/WO2020259305A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H03M13/3927—Log-Likelihood Ratio [LLR] computation by combination of forward and backward metrics into LLRs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1125—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2948—Iterative decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6561—Parallelized implementations

Definitions

  • the embodiments of the present application relate to but are not limited to the field of 5th Generation Mobile Communication (5G) coding and coding, for example, relate to a polarization code decoding method, device, storage medium, and terminal.
  • 5G 5th Generation Mobile Communication
  • the fifth-generation mobile communication 5G technical standard is characterized by low latency and high reliability.
  • the 5G New Radio (NR) ultra-reliable low-latency communications (Ultra Reliable Low Latency Communications, URLLC) application scenario requires the user plane delay to be 0.5 ms, which is the fourth generation of mobile communications (4th Generation Mobile Communication, 4G)
  • the required user plane delay is one-twentieth of 10ms
  • the 5G NR enhanced mobile broadband (Enhanced Mobile Broadband, eMBB) application scenario requires the user plane delay to be 4ms, which is one-fifth of the user plane delay required by 4G two.
  • Polar code encoding and decoding can theoretically prove that the Shannon limit can be reached when the code length is long enough to meet the high reliability requirements of 5G, and low latency is a challenge for Polar code decoding design.
  • a serial cancellation (Success Cancellation, SC) decoding algorithm is used for Polar code decoding, and the decoding process is bit serial decoding, which results in a large decoding delay.
  • Enhanced SC decoding algorithms based on the improvement of the SC algorithm include: Serial Cancellation List Decoding (SCL), Serial Cancellation Stack Decoding (Successive Cancellation Stack Decoding, SCS) and Serial Cancellation Hybrid Decoding (Successive) Cancellation Hybrid decoding, SCH) etc.
  • SCL Serial Cancellation List Decoding
  • SCS Serial Cancellation Stack Decoding
  • SCS Serial Cancellation Hybrid Decoding
  • SCH Serial Cancellation Hybrid Decoding
  • the embodiments of the present application provide a polarization code decoding method, device, storage medium, and terminal, which can overcome the problem of high delay in Polar code decoding in related technologies.
  • the embodiment of the present application provides a polarization Polar code decoding method, including:
  • the Polar codes of length N are divided into S groups of Polar codes, each group of Polar codes is data extracted from the Polar codes of length N according to a preset rule; S is an integer power of 2;
  • the embodiment of the present application also provides a polarization Polar code decoding system, including:
  • the control module is configured to divide the Polar codes of length N into S groups of Polar codes, and each group of Polar codes is data extracted from the polar codes of length N according to a preset rule, and grouped each group of Polar codes.
  • the code is distributed to S calculation modules in sequence; S is an integer power of 2;
  • Each calculation module is set to calculate the LLR of each group of Polar codes received
  • the decoding module is set to jointly decode the LLR calculation results obtained by each calculation module.
  • the embodiment of the present application also provides a computer readable and writable storage medium.
  • the medium stores computer-executable instructions.
  • the computer-executable instructions are executed by a processor, the polarized Polar code as described in the previous embodiment is implemented. Decoding method.
  • the embodiment of the present application also provides a polarization Polar code decoding terminal, including:
  • the memory is set to store computer executable instructions
  • the processor is configured to execute the computer executable instructions to implement the polarization Polar code decoding method as described in the previous embodiment.
  • Fig. 1 is a flowchart of a polarization code decoding method provided by an embodiment of the application
  • Figure 2 is a schematic diagram of parallel calculation of a single code block in an application example of this application
  • Figure 3 is a schematic diagram of parallel calculation of four code blocks in an application example of this application.
  • Figure 4 is a schematic diagram of parallel calculation of long code blocks in an application example of this application.
  • Figure 5 is a block diagram of the polarization code decoding system provided by an embodiment of the application.
  • the code length N of the Polar code refers to the number of bits of the Polar code to be decoded.
  • the Log-Likelihood Ratio (LLR) calculation of the left child node on the decoding tree, namely the f node is required.
  • the LLR calculation of the right child node on the decoding tree namely the g node.
  • a 0 [i] is the original input LLR data, that is, the node at the 0th level of the decoding tree
  • the LLR calculation is performed on node f, that is, the LLR (A lm ) of the left child node of node i at the mth level of the decoding tree is updated, Calculated as follows:
  • sign() is the function of taking the sign; m is the height of the decoding tree. In the above formula, the value of m ranges from 1 to log 2 (N).
  • LLR calculation formula of node f From the above LLR calculation formula of node f, it can be seen that the LLR calculation of node i of the m-th layer is only related to the fixed LLR data of layer m-1. From the LLR calculation formula of node g, it can be seen that the LLR calculation of the m-th node i is only related to m
  • the fixed LLR data of the -1 layer is related to the hard judgment value B lm fed back by the left child node.
  • the data required for LLR calculation of each node is independent, so s-way f-node and g-node calculations can be performed in parallel.
  • s is an integer power of 2, and the value is not limited to 1, 2, 4, 8, 16, or 32. The larger the value of s, the shorter the decoding delay. Those skilled in the art can make adjustments based on actual decoding delay requirements. s takes the value.
  • the s-way parallel calculation formula is as follows:
  • the embodiments of the present application provide a method, system, storage medium, and terminal for decoding polarized Polar codes.
  • an embodiment of the present application provides a method for decoding Polar codes, and the method includes:
  • S is an integer power of 2.
  • This application groups the long code blocks of the Polar code, and uses the feature that there is no coupling relationship between multiple groups to decode each grouped data separately, and then jointly decode the decoding results of each group. Compared with related technologies Decoding the entire long code block Polar, the decoding delay is reduced, thereby overcoming the problem of high delay in Polar code decoding in related technologies.
  • the polar codes of length N are divided into S groups of Polar codes, and each group of Polar codes is data extracted from the polar codes of length N according to a preset extraction rule, including: changing the length to The Polar codes of N are divided into S groups of Polar codes.
  • the starting point of each group of Polar codes is one of the S consecutive Polar codes selected from the Polar codes of length N.
  • the data of each group of Polar codes except the starting point is Starting from the starting point, taking S as the unit step size to extract the data obtained from the Polar code of length N, the length of each group of Polar codes is N/S.
  • each group of Polar codes is data extracted from the Polar codes of length N according to a preset extraction rule, and further includes : Divide each group of Polar codes into M groups of Polar codes, where M is an integer power of 2. Perform the LLR calculation of each group of Polar codes in the S group of Polar codes, including: for each group of Polar codes in the M group of Polar codes After performing the LLR calculation on the code, perform LLR calculation on the calculated M LLR calculation results, and use the calculated LLR calculation result for the M group of Polar codes as the LLR calculation result for a group of Polar codes in the S group.
  • the dividing each group of Polar codes into M groups of Polar codes includes: for each group of Polar codes with a length of N/S, the group of Polar codes is further divided into M groups of Polar codes, and each group of Polar codes in the M group of Polar codes
  • the starting point of the code is one Polar code among the M consecutive Polar codes selected from the Polar codes of length N/S.
  • the data of each group of Polar codes in the M group of Polar codes except the starting point is from the starting point to M It is the data obtained by extracting the Polar code with the length of N/S as the unit step, and the length of each Polar code in the divided M groups of Polar codes is N/(S*M).
  • the fourth group of Polar codes is divided into 2 groups of Polar codes, which are ⁇ A 0 [8i- 3] ⁇ and ⁇ A 0 [8i-7] ⁇ .
  • output the 1-channel calculation result as the final result of the LLR calculation of the first set of Polar codes.
  • the LLR calculation process of the other three groups of Polar codes is the same as the LLR calculation process of the first group of Polar codes, which will not be repeated here.
  • the foregoing LLR calculation for each set of Polar codes includes: performing LLR calculation for each set of Polar codes in parallel.
  • the embodiment of the present application adopts a parallel decoding method, which can reduce the decoding delay.
  • the decoding process is as follows:
  • the first step is to configure the LLR calculation unit to perform LLR calculation on Polar codes; this application example configures 4 LLR units, each LLR unit can calculate 256-length code blocks; the Polar code block to be decoded
  • the LLR data of each code block is written into the memory, and the write address is recorded;
  • the configuration decoding parameters include the write address of the LLR data of each code block, the code length of each code block and the decoding accompanying parameters.
  • the accompanying parameters include: frozen bit, information bit, check bit indication, and the number of information bits, cyclic redundancy check (Cyclic Redundancy Check, CRC) pattern, etc.
  • the second step is to start decoding and read the decoding parameters configured above.
  • the third step is to decode a Polar code with a code length of 1024, and query whether all 4 LLR calculation units are available in real time; when the 4 LLR calculation units are available, divide the Polar code into 4 groups respectively Send to 4 LLR calculation units for LLR calculation.
  • the fgu unit in Figure 2 is the LLR calculation unit.
  • the calculation result of one way is composed of 4 LLR data sequences, and the path expansion function is completed according to the accompanying information such as frozen bits, information bits, and parity bits; the decoding decision is completed according to the output path metric value, and the current 4bit decoding data is output and updated Decoding tree until the decoding of all data is completed.
  • the fourth step is to decode 4 Polar codes with a code length of 256.
  • 4 256 code blocks are sent to 4 LLR calculation units, 4 LLR calculation units work in parallel, 4 LLRs
  • the calculation unit outputs 4 calculation results.
  • the decoding delay will be different due to the difference in the number of frozen bits of each Polar code block.
  • the parallel decoding time for 4 Polar code blocks with a code length of 256 may also be completed. different.
  • it is found that the code length of the next code block is 1024, it is necessary to wait for the completion of the LLR calculation for all code blocks with a code length of 256, and then start decoding the code block with a code length of 1024.
  • the fifth step is to decode a Polar code with a code length of 1024.
  • the Polar code is divided into 4 groups and sent to 4 LLR calculation units for LLR calculation; each time it is calculated from each LLR The unit takes one calculation result to form 4 LLR data sequences, and completes the path extension function according to accompanying information such as frozen bits, information bits, and parity bits; completes the decoding decision according to the output path metric value, and outputs the current 4bit decoded data, And update the decoding tree until the decoding of all data is completed.
  • the sixth step is to decode 5 Polar codes with a code length of 256, and check whether one LLR calculation unit is idle; when there is an LLR calculation unit idle, send the Polar code to the idle LLR calculation unit for processing Calculation, when there is no LLR calculation unit idle, wait until one LLR calculation unit is idle; as long as one LLR calculation unit completes the calculation, all calculation results of the LLR calculation unit are taken out, and according to the frozen bit, the information bit , Check bits and other accompanying information complete the path expansion function, output the path metric value; complete the decoding decision according to the output path metric value, output the current decoded data, and update the decoding tree.
  • the decoding process is as follows:
  • the first step is to configure the LLR calculation unit to perform LLR calculation on the Polar code; this application example configures 8 LLR calculation units, 4 LLR calculation units can calculate code blocks with a length of 256, and 4 LLR calculation units can Calculate the code block of length 2; write the LLR data of the Polar code block to be decoded into the memory and record the write address; configure the decoding parameters, including the writing of the LLR data of each code block Address, code length of each code block and decoding accompanying parameters.
  • the second step is to start decoding and read the decoding parameters configured above.
  • the third step is to query in real time whether the 4 LLR calculation units with a length of 256 are all idle.
  • it waits until all LLR calculation units with a length of 256 are idle.
  • the fourth step is to take one calculation result from each LLR calculation unit with a length of 2 each time to form 4 LLR data sequences and complete the path expansion function according to the accompanying information such as frozen bits, information bits, and parity bits, and output the path metric value ; Complete the decoding decision according to the path metric value, output the currently decoded 4bit data, and update the decoding tree until all data is decoded.
  • the LLR calculation unit with a length of 2 can also directly multiplex the logic in the LLR calculation unit with a length of 256, and no new LLR calculation unit is provided.
  • the present application also provides a Polar code decoding system.
  • the system includes: a control module 501 configured to divide Polar codes of length N into S groups of Polar codes, and each group of Polar codes is Data extracted from the Polar codes of length N according to preset rules, and distribute each group of Polar codes grouped to S calculation modules in turn; S is an integer power of 2; each calculation module 502, set In order to calculate the log likelihood ratio LLR for each group of Polar codes received; the decoding module 503 is configured to jointly decode the LLR calculation results obtained by each calculation module.
  • This application groups the long code blocks of the Polar code, and uses the feature that there is no coupling relationship between multiple groups to decode each grouped data separately, and then jointly decode the decoding results of each group. Compared with related technologies Decoding the Polar of the entire long code block reduces the decoding delay.
  • the control module 501 is configured to divide the Polar codes of length N into S groups of Polar codes in the following manner, and the Polar codes in each group of Polar codes are obtained from the Polar codes of length N according to Data extracted by a preset rule: divide the Polar code of length N into S groups of Polar codes, and the starting point of each group of Polar codes is one of the S consecutive Polar codes selected from the polar codes of length N.
  • the data of each group of Polar codes except the starting point is the data obtained by extracting the Polar code of length N from the starting point with S as a unit step, wherein the length of each group of Polar codes is N/S.
  • control module 503 is further configured to divide each group of Polar codes in the S group of Polar codes into M groups of Polar codes, where M is an integer power of 2, and divide the M groups of Polar codes into Each set of Polar codes in the M groups is sent to the calculation module in turn; the calculation module 502 is configured to perform LLR calculations on each set of Polar codes in the M sets of Polar codes, and then perform LLR calculations on the calculated M LLR calculation results, and calculate The obtained LLR calculation result of the M groups of Polar codes is used as the LLR calculation result of one group of Polar codes in the received S group of Polar codes.
  • control module 503 is configured to divide each group of Polar codes in the S group of Polar codes into M groups of Polar codes in the following manner: For each group of Polar codes with a length of N/S, the The group of Polar codes is divided into M groups of Polar codes.
  • the starting point of each group of Polar codes in the M group of Polar codes is one of the M consecutive Polar codes selected from the length of N/S Polar codes.
  • the M group The data of each Polar code in the Polar code except the starting point is the data obtained by extracting the Polar code of length N/S with M as the unit step from the starting point, divided into M groups of Polar codes for each group of Polar codes
  • the length of is N/(S*M).
  • the calculation module 502 is configured to perform LLR calculation on each set of Polar codes in the following manner: perform LLR calculation on each set of Polar codes in parallel.
  • the embodiment of the present application performs bit-serial decoding on Polar, and adopts a parallel decoding mode, which can reduce the decoding delay.
  • the embodiment of the present application also provides a computer readable and writable storage medium.
  • the medium stores computer-executable instructions.
  • the computer-executable instructions are executed by a processor, the polarized Polar code as described in the previous embodiment is implemented. Decoding method.
  • the embodiment of the present application also provides a polarization Polar code decoding terminal, including:
  • the memory is set to store computer executable instructions
  • the processor is configured to execute the computer-executable instructions to implement the steps of the polarized Polar code decoding method described in the previous embodiment.
  • Such software may be distributed on a computer-readable medium, and the computer-readable medium may include a computer storage medium (or a non-transitory medium) and a communication medium (or a transitory medium).
  • the term computer storage medium includes volatile and non-volatile memory implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Sexual, removable and non-removable media.
  • Computer storage media include but are not limited to Random Access Memory (RAM), Read-Only Memory (ROM), and Electrically Erasable Programmable Read-Only Memory (EEPROM) , Flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (Digital Versatile Disc, DVD) or other optical disk storage, magnetic cassettes, tapes, disk storage or other A magnetic storage device, or any other medium that can be used to store desired information and can be accessed by a computer.
  • communication media usually contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as carrier waves or other transmission mechanisms, and may include any information delivery media .

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Abstract

一种极化码的译码方法、装置、存储介质和终端，所述方法包括：将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设规则抽取的数据（S110）；S为2的整数次幂；对S组Polar码中每组Polar码进行对数似然比LLR计算后，对每组Polar码的计算结果进行联合译码（S120）。

Description

极化码的译码方法、装置、存储介质和终端
本申请要求在2019年06月27日提交中国专利局、申请号为201910568753.5的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及但不限于第五代移动通信(5th Generation Mobile Communication，5G)编译码领域，例如涉及一种极化码的译码方法、装置、存储介质和终端。
背景技术
第五代移动通信5G技术标准的特点是低时延，高可靠性。5G新空口(New Radio，NR)的极可靠低延迟通信(Ultra Reliable Low Latency Communications，URLLC)应用场景要求用户面时延为0.5ms，这是第四代移动通信(4th Generation Mobile Communication，4G)要求的用户面时延10ms的二十分之一；5G NR的增强型移动宽带(Enhance Mobile Broadband，eMBB)应用场景要求用户面时延为4ms，是4G要求的用户面时延的五分之二。极化(Polar)码编译码理论上可以证明在码长足够长时能够达到香农(Shannon)极限，满足5G高可靠性要求，而低延时是Polar码译码设计的一个挑战。
相关技术中，对Polar码译码采用串行抵消(Success Cancellation，SC)译码算法，译码过程是比特串行译码，导致译码延时很大。基于SC算法改进的增强SC译码算法包括：串行抵消列表译码(Successive Cancellation List decoding，SCL)、串行抵消堆栈译码(Successive Cancellation Stack decoding，SCS)和串行抵消混合译码(Successive Cancellation Hybrid decoding，SCH)等。这些增强的SC译码算法虽然能一定程度上降低译码时延，但本质上还是串行译码算法，无法满足5G的低时延要求。
发明内容
本申请实施例提供了一种极化码的译码方法、装置、存储介质和终端，能够克服相关技术中存在的Polar码译码高时延的问题。
本申请实施例提供了一种极化Polar码的译码方法，包括：
将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设规则抽取的数据；S为2的整数次幂；
对S组Polar码中的每组Polar码进行对数似然比LLR计算后，对所述S组Polar码的计算结果进行联合译码。
本申请实施例还提供了一种极化Polar码的译码系统，包括：
控制模块，设置为将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设规则抽取的数据，并将分组后的每组Polar码依次分发给S个计算模块；S为2的整数次幂；
每个计算模块，设置为对接收到的每组Polar码进行对数似然比LLR计算；
译码模块，设置为对每个计算模块得到的LLR计算结果进行联合译码。
本申请实施例还提供了一种计算机可读写存储介质，所述介质存储有计算机可执行指令，所述计算机可执行指令被处理器执行时实现如前实施例所述的极化Polar码的译码方法。
本申请实施例还提供了一种极化Polar码的译码终端，包括：
存储器，设置为存储计算机可执行指令；
处理器，设置为执行所述计算机可执行指令，以实现如前实施例所述的极化Polar码的译码方法。
附图说明
附图用来提供对本申请技术方案的理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本申请的技术方案，并不构成对本申请技术方案的限制。
图1为本申请实施例提供的极化码的译码方法的流程图；
图2为本申请应用示例中对单个码块并行计算示意图；
图3为本申请应用示例中对四个码块并行计算示意图；
图4为本申请应用示例中对长码块并行计算示意图；
图5为本申请实施例提供的极化码的译码系统的组成模块图。
具体实施方式
下文中将结合附图对本申请的实施例进行说明。
在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行。
Polar码码长N是指待译码的Polar码的比特数，Polar码译码过程中需要进行译码树上左孩子节点即f节点的对数似然比(Log-Likelihood Ratio，LLR)计算和译码树上右孩子节点即g节点的LLR计算。假定A 0[i]为原始输入的LLR数据即译码树第0层节点，则对f节点进行LLR计算，即更新译码树第m层节点i的左子节点的LLR(A lm)，计算公式如下：
Figure PCTCN2020095631-appb-000001
sign()为取正负号函数；m为译码树的高度，在上述公式中m的取值范围为1～log 2(N)。
对g节点进行LLR计算，即更新译码树上第m层节点i的右子节点的LLR(A rm)，该值需要利用左子节点反馈的硬判值B lm进行更新，所述硬判值B lm为根据译码路径确定的译码信息，计算公式如下：
Figure PCTCN2020095631-appb-000002
Figure PCTCN2020095631-appb-000003
由上述f节点的LLR计算公式可知，第m层节点i的LLR计算只与m-1层固定的LLR数据相关，由g节点的LLR计算公式可知，第m层节点i的LLR计算只与m-1层固定的LLR数据和左子节点反馈的硬判值B lm相关。每个节点的LLR计算所需数据是独立的，因此可以并行进行s路f节点和g节点计算。这里s为2的整数次幂，取值不限于1、2、4、8、16、32，s取值越大译码时延越短，本领域技术人员可以根据实际译码时延需求对s进行取值。s路并行计算公式如下：
根据上述推导过程，本申请实施例提供了一种对极化Polar码的译码方法、系统、存储介质和终端。
如图1所示，本申请实施例提供了一种对Polar码译码的方法，所述方法包括:
S110、将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设规则抽取的数据。
Figure PCTCN2020095631-appb-000004
S为2的整数次幂。
S120、对S组Polar码中每组Polar码进行对数似然比LLR计算后，对每组Polar码的计算结果进行联合译码。
本申请将Polar码的长码块进行分组，利用多个分组之间不存在耦合关系的特点对每个分组数据单独译码后再对每组的译码结果进行联合译码，相对于相关技术中对整个长码块的Polar进行译码，译码延时减小，从而克服了相关技术中存在的Polar码译码高时延的问题。
本实施例中，所述将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设抽取规则抽取的数据，包括：将长度为N的Polar码分为S组Polar码，每组Polar码的起点为从长度为N的Polar码中选取的S个连续的Polar码中的一个Polar码，每组Polar码除起点外的数据为从起点开始以S为单位步长对所述长度为N的Polar码进行抽取得到的数据，每组Polar码的长度为N/S。如，当S为2时，两组Polar码分别为A 0[2i]和A 0[2i-1]，i＝1,2...N/2，每组Polar码的长度为N/2；当S为4时，四组Polar码分别为A 0[4i]，A 0[4i-1]，A 0[4i-2]，A 0[4i-3]，i＝1,2...N/4，每组Polar码的长度为N/4。
本实施例中，所述方法在将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设抽取规则抽取的数据之后，还包括：将每组Polar码分为M组Polar码，M为2的整数次幂；对S组Polar码中每组 Polar码进行对数似然比LLR计算包括：对M组Polar码中每组Polar码进行LLR计算后，对计算得到的M个LLR计算结果进行LLR计算，将计算得到的对所述M组Polar码的LLR计算结果作为所述S组中一组Polar码的LLR计算结果。
所述将每组Polar码分为M组Polar码，包括：对于每一组长度为N/S的Polar码，将该组Polar码再分为M组Polar码，M组Polar码中每组Polar码的起点为从所述长度为N/S的Polar码中选取的M个连续的Polar码中的一个Polar码，M组Polar码中每组Polar码除起点外的数据为从起点开始以M为单位步长对所述长度为N/S的Polar码进行抽取得到的数据，分成的M组Polar码中每组Polar码的长度为N/(S*M)。如将码长为2048的Polar码分为4组Polar码，第一组Polar码为{A 0[8i],A 0[8i-4]}，第二组Polar码为{A 0[8i-1]，A 0[8i-5]}，第三组Polar码为{A 0[8i-2]，A 0[8i-6]}，第四组Polar码为{A 0[8i-3]，A 0[8i-7]}，i＝1,2,...,256，再将每组Polar分为2组Polar码，第一组Polar码分为2组Polar码后为{A 0[8i]}和{A 0[8i-4]}，第二组Polar码分为2组Polar码后为{A 0[8i-1]}和{A 0[8i-5]}，第三组Polar码分为2组Polar码后为{A 0[8i-2]}和{A 0[8i-6]}，第四组Polar码分为2组Polar码后为{A 0[8i-3]}和{A 0[8i-7]}。以第一组Polar码为例，完成A 0[8i]的LLR计算，并缓存输出1路计算结果；完成A 0[8i-4]的LLR计算，并缓存输出1路计算结果；将缓存的2路计算结果进行LLR计算后输出1路计算结果作为第一组Polar码的LLR计算的最终结果。其他三组Polar码的LLR计算过程与第一组Polar码的LLR计算过程一致，这里不再累述。
本申请实施例中，上述对每组Polar码进行LLR计算，包括：并行地对每组Polar码进行LLR计算。
本申请实施例相对于相关技术中对Polar进行比特串行译码，采用并行译码方式，可以减小译码时延。
下面以应用示例对本申请实施例进行举例说明。
应用示例1
假设当前待译码的Polar码码块长度分别为1024,256,256,256,256，1024,256,256,256,256,256，译码过程如下：
第一步，配置LLR计算单元，用于对Polar码进行LLR计算；本应用示例配置4个LLR单元，每个LLR单元可对256长度的码块进行计算；将待译码的Polar码码块的LLR数据分别写入内存中，并记录写入地址；配置译码参数，包括每个码块的LLR数据的写入地址，每个码块的码长以及译码伴随参数，所述译码伴随参数包括：冻结位，信息位，校验位指示，以及信息比特个数，循环 冗余校验(Cyclic Redundancy Check，CRC)图样等。
第二步，启动译码，读取上述配置的译码参数。
第三步，对1个码长为1024的Polar码进行译码，实时查询4个LLR计算单元是否均可用；当所述4个LLR计算单元均可用时，将该Polar码分为4组分别发送至4个LLR计算单元进行LLR计算，如图2所示，图2中的fgu单元即为LLR计算单元，4组Polar码分别为A 0[4i]，A 0[4i-1]，A 0[4i-2]，A 0[4i-3]，i＝1,2,...,256；每组Polar码经过LLR计算后输出1路计算结果；每次从每个LLR计算单元取一路计算结果，组成4个LLR数据序列，并根据冻结位，信息位，校验位等伴随信息完成路径扩展功能；根据输出的路径度量值完成译码判决，输出当前4bit译码数据，并更新译码树，直至完成对所有数据的译码。
第四步，对4个码长为256的Polar码进行译码，如图3所示，将4个256码块分别送往4个LLR计算单元，4个LLR计算单元并行工作，4个LLR计算单元输出4路计算结果。对于码长为256的Polar码，由于每个Polar码码块的冻结位个数不同导致译码时延会有差异，4个码长为256的Polar码码块并行译码结束的时间也可能不同。当查询到下个码块码长为1024时，需要等待对所有码长为256的码块LLR计算完成后，再启动码长为1024的码块译码。
第五步，对1个码长为1024的Polar码进行译码，同第三步，将该Polar码分为4组分别发送至4个LLR计算单元进行LLR计算；每次从每个LLR计算单元取一路计算结果，组成4个LLR数据序列，并根据冻结位，信息位，校验位等伴随信息完成路径扩展功能；根据输出的路径度量值完成译码判决，输出当前4bit译码数据，并更新译码树，直至完成对所有数据的译码。
第六步，对5个码长为256的Polar码进行译码，查询是否有一个LLR计算单元空闲；在有一个LLR计算单元空闲的情况下，将该Polar码送往空闲的LLR计算单元进行计算，在没有一个LLR计算单元空闲的情况下，一直等待直到有一个LLR计算单元空闲；只要有一个LLR计算单元完成计算，便取出该LLR计算单元的所有计算结果，并根据冻结位，信息位，校验位等伴随信息完成路径扩展功能，输出路径度量值；根据输出的路径度量值完成译码判决，输出当前译码数据，并更新译码树。
应用示例2
假设当前待译码的Polar码码块长度为2048，译码过程如下：
第一步，配置LLR计算单元，用于对Polar码进行LLR计算；本应用示例配置8个LLR计算单元，4个LLR计算单元可对长度为256的码块进行计算， 4个LLR计算单元可对长度为2的码块进行计算；将待译码的Polar码码块的LLR数据分别写入内存中，并记录写入地址；配置译码参数，包括每个码块的LLR数据的写入地址，每个码块的码长以及译码伴随参数。
第二步，启动译码，读取上述配置的译码参数。
第三步，实时查询4个长度为256的LLR计算单元是否均空闲，在4个长度为256的LLR计算单元均空闲的情况下，送往每个长度为256的LLR计算单元的数据分别为{A 0[8i],A 0[8i-4]}，{A 0[8i-1]，A 0[8i-5]}，{A 0[8i-2]，A 0[8i-6]}，{A 0[8i-3]，A 0[8i-7]}，i＝1,2,...,256。在不是4个长度为256的LLR计算单元均空闲的情况下，一直等待直到所有长度为256的LLR计算单元都空闲。
以4个长度为256的LLR计算单元中的一个LLR计算单元为例，假定该LLR计算单元接收的数据为{A 0[8i],A 0[8i-4]}：首先，完成A 0[8i]，i＝1,2,...,256的LLR数据计算，并缓存输出的1路计算结果；其次，完成A 0[8i-4]，i＝1,2,...,256的LLR数据计算，并缓存输出的1路计算结果；将缓存的2路计算结果输入长度为2的LLR计算单元，输出最终1路计算结果。其他三个长度为256的LLR计算单元计算过程与此一致，不再累述，如图4所示。
第四步，每次从每个长度为2的LLR计算单元取一路计算结果，组成4个LLR数据序列并根据冻结位，信息位，校验位等伴随信息完成路径扩展功能，输出路径度量值；根据路径度量值完成译码判决，输出当前译码出的4bit数据，并更新译码树，直至对所有数据都完成译码。
对于长度为2048的polar码译码，长度为2的LLR计算单元也可以直接复用长度为256的LLR计算单元中的逻辑，不再新设LLR计算单元。
本申请还提供了一种Polar码译码的系统，如图5所示，所述系统包括：控制模块501，设置为将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设规则抽取的数据，并将分组后的每组Polar码依次分发给S个计算模块；S为2的整数次幂；每个计算模块502，设置为对接收到的每组Polar码进行对数似然比LLR计算；译码模块503，设置为对每个计算模块得到的LLR计算结果进行联合译码。
本申请将Polar码的长码块进行分组，利用多个分组之间不存在耦合关系的特点对每个分组数据单独译码后再对每组的译码结果进行联合译码，相对于相关技术对整个长码块的Polar进行译码，译码延时减小。
作为一种实现方式，控制模块501，是设置为通过如下方式将长度为N的Polar码分为S组Polar码，每组Polar码中的Polar码为从所述长度为N的Polar 码中按照预设规则抽取的数据：将长度为N的Polar码分为S组Polar码，每组Polar码的起点为从长度为N的Polar码中选取的S个连续的Polar码中的一个Polar码，每组Polar码除起点外的数据为从起点开始以S为单位步长对所述长度为N的Polar码进行抽取得到的数据，其中，每组Polar码的长度为N/S。如，当S为2时，两组Polar码分别为A 0[2i]和A 0[2i-1]，i＝1,2...N/2，每组Polar码的长度为N/2；当S为4时，四组Polar码分别为A 0[4i]，A 0[4i-1]，A 0[4i-2]，A 0[4i-3]，i＝1,2,...,N/4，每组Polar码的长度为N/4。
作为一种实现方式，控制模块503，还设置为将所述S组Polar码中的每组Polar码分为M组Polar码，M为2的整数次幂，并将所述M组Polar码中的每组Polar码依次发送给所述计算模块；计算模块502，是设置为对M组Polar码中每组Polar码进行LLR计算后，对计算得到的M个LLR计算结果进行LLR计算，将计算得到的对所述M组Polar码的LLR计算结果作为接收的S组Polar码中一组Polar码的LLR计算结果。
作为一种实现方式，控制模块503，是设置为通过如下方式将所述S组Polar码中的每组Polar码分为M组Polar码：对于每组长度为N/S的Polar码，将该组Polar码分为M组Polar码，M组Polar码中每组Polar码的起点为从所述长度为N/S的Polar码中选取的M个连续的Polar码中的一个Polar码，M组Polar码中每组Polar码除起点外的数据为从起点开始以M为单位步长对所述长度为N/S的Polar码进行抽取得到的数据，分成的M组Polar码中每组Polar码的长度为N/(S*M)。如将码长为2048的Polar码分为4组Polar码，第一组Polar码为{A 0[8i],A 0[8i-4]}，第二组Polar码为{A 0[8i-1]，A 0[8i-5]}，第三组Polar码为{A 0[8i-2]，A 0[8i-6]}，第四组Polar码为{A 0[8i-3]，A 0[8i-7]}，i＝1,2,...,256，再将每组Polar分为2组，第一组Polar码分为2组后为{A 0[8i]}和{A 0[8i-4]}，第二组Polar码分为2组后为{A 0[8i-1]}和{A 0[8i-5]}，第三组Polar码分为2组后为{A 0[8i-2]}和{A 0[8i-6]}，第四组Polar码分为2组后为{A 0[8i-3]}和{A 0[8i-7]}。以第一组Polar码为例，完成A 0[8i]的LLR计算，并缓存输出1路计算结果；完成A 0[8i-4]的LLR计算，并缓存输出1路计算结果；将缓存的2路计算结果进行LLR计算后输出1路计算结果作为第一组Polar码的LLR计算的最终结果。其他三组Polar码的LLR计算过程与第一组Polar码的LLR计算过程一致，这里不再累述。
作为一种实现方式，所述计算模块502，是设置为通过如下方式对每组Polar码进行LLR计算：并行地对每组Polar码进行LLR计算。
本申请实施例相对于相关技术对Polar进行比特串行译码，采用并行译码方式，可以减小译码时延。
本申请实施例还提供了一种计算机可读写存储介质，所述介质存储有计算机可执行指令，所述计算机可执行指令被处理器执行时实现如前实施例所述的极化Polar码的译码方法。
本申请实施例还提供了一种极化Polar码的译码终端，包括：
存储器，设置为存储计算机可执行指令；
处理器，设置为执行所述计算机可执行指令，以实现如前实施例所述的极化Polar码的译码方法的步骤。
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及其适当的组合。在硬件实施方式中，在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分；例如，一个物理组件可以具有多个功能，或者一个功能或步骤可以由多个物理组件合作执行。某些组件或所有组件可以被实施为由处理器，如数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于随机存取存储器(Random Access Memory，RAM)、只读存储器(Read-Only Memory，ROM)、电可擦可编程只读存储器(Electrically Erasable Programmable Read-Only Memory，EEPROM)、闪存或其他存储器技术、紧凑型光盘只读存储(Compact Disk Read Only Memory，CD-ROM)、数字多功能盘(Digital Versatile Disc，DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。

Claims (11)

  1. 一种极化Polar码的译码方法，包括：
    将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设规则抽取的数据；S为2的整数次幂；
    对S组Polar码中每组Polar码进行对数似然比LLR计算后，对每组Polar码的计算结果进行联合译码。
  2. 根据权利要求1所述的极化Polar码的译码方法，其中，所述将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设抽取规则抽取的数据，包括：
    将长度为N的Polar码分为S组Polar码，每组Polar码的起点为从所述长度为N的Polar码中选取的S个连续的Polar码中的一个Polar码，每组Polar码除起点外的数据为从起点开始以S为单位步长对所述长度为N的Polar码进行抽取得到的数据，其中，每组Polar码的长度为N/S。
  3. 根据权利要求2所述的极化Polar码的译码方法，在所述将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设抽取规则抽取的数据之后，还包括：
    将每组Polar码分为M组Polar码，M为2的整数次幂；
    对S组Polar码中的每组Polar码进行对数似然比LLR计算包括：对所述M组Polar码中每组Polar码进行LLR计算后，对计算得到的M个LLR计算结果进行LLR计算，将计算得到的对所述M组Polar码的LLR计算结果作为所述S组Polar码中一组Polar码的LLR计算结果。
  4. 根据权利要求3所述的极化Polar码的译码方法，其中，所述将每组Polar码分为M组Polar码，包括：
    将每组长度为N/S的Polar码分为M组Polar码，所述M组Polar码中每组Polar码的起点为从所述每组长度为N/S的Polar码中选取的M个连续的Polar码中的一个Polar码，所述M组Polar码中每组Polar码除起点外的数据为从起点开始以M为单位步长对所述每组长度为N/S的Polar码进行抽取得到的数据，分成的M组Polar码中每组Polar码的长度为N/(S*M)。
  5. 根据权利要求2或3所述的极化Polar码的译码方法，其中，对每组Polar码进行LLR计算，包括：
    并行地对每组Polar码进行LLR计算。
  6. 一种极化Polar码的译码系统，包括：
    控制模块，设置为将长度为N的Polar码分为S组Polar码，每组Polar码 为从所述长度为N的Polar码中按照预设规则抽取的数据，并将分组后的每组Polar码依次分发给S个计算模块；S为2的整数次幂；
    每个计算模块，设置为对接收到的每组Polar码进行对数似然比LLR计算；
    译码模块，设置为对每个计算模块得到的LLR计算结果进行联合译码。
  7. 根据权利要求6所述的极化Polar码的译码系统，其中，所述控制模块，是设置为通过如下方式将长度为N的Polar码分为S组Polar码，每组Polar码为从所述长度为N的Polar码中按照预设规则抽取的数据：
    将长度为N的Polar码分为S组Polar码，每组Polar码的起点为从所述长度为N的Polar码中选取的S个连续的Polar码中的一个Polar码，每组Polar码除起点外的数据为从起点开始以S为单位步长对所述长度为N的Polar码进行抽取得到的数据，其中，每组Polar码的长度为N/S。
  8. 根据权利要求7所述的极化Polar码的译码系统，其中，所述控制模块，还设置为将所述S组Polar码中每组Polar码分为M组，M为2的整数次幂，并将所述M组Polar码中的每组Polar码依次发送给所述计算模块；
    所述计算模块，是设置为对所述M组Polar码中的每组Polar码进行LLR计算后，对计算得到的M个LLR计算结果进行LLR计算，将计算得到的对所述M组Polar码的LLR计算结果作为接收的S组Polar码中一组Polar码的LLR计算结果。
  9. 根据权利要求8所述的极化Polar码的译码系统，其中，所述控制模块，是设置为通过如下方式将所述S组Polar码中每组Polar码分为M组Polar码：
    将每组长度为N/S的Polar码分为M组Polar码，所述M组Polar码中每组Polar码的起点为从所述每组长度为N/S的Polar码中选取的M个连续的Polar码中的一个Polar码，所述M组Polar码中每组Polar码除起点外的数据为从起点开始以M为单位步长对所述长度为N/S的Polar码进行抽取得到的数据，分成的M组Polar码中每组Polar码的长度为N/(S*M)。
  10. 一种计算机可读写存储介质，存储有计算机可执行指令，所述计算机可执行指令被处理器执行时实现如权利要求1至5中任一项所述的极化Polar码的译码方法。
  11. 一种极化Polar码的译码终端，包括：
    存储器，设置为存储计算机可执行指令；
    处理器，设置为执行所述计算机可执行指令，以实现如权利要求1至5中任一项所述的极化Polar码的译码方法。
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