WO2019029205A1 - 编码方法及装置 - Google Patents

编码方法及装置 Download PDF

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Publication number
WO2019029205A1
WO2019029205A1 PCT/CN2018/086329 CN2018086329W WO2019029205A1 WO 2019029205 A1 WO2019029205 A1 WO 2019029205A1 CN 2018086329 W CN2018086329 W CN 2018086329W WO 2019029205 A1 WO2019029205 A1 WO 2019029205A1
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WIPO (PCT)
Prior art keywords
sequence
interleaving
max
longest
bit sequence
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PCT/CN2018/086329
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English (en)
French (fr)
Inventor
黄凌晨
戴胜辰
徐晨
乔云飞
李榕
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to JP2020504222A priority Critical patent/JP7009717B2/ja
Priority to AU2018312696A priority patent/AU2018312696B2/en
Priority to BR112020002538-0A priority patent/BR112020002538A2/pt
Priority to RU2020109774A priority patent/RU2739582C1/ru
Priority to EP21183833.9A priority patent/EP3961945B1/en
Priority to KR1020207005038A priority patent/KR102271646B1/ko
Priority to EP18758532.8A priority patent/EP3471303B1/en
Priority to US16/146,429 priority patent/US10536240B2/en
Publication of WO2019029205A1 publication Critical patent/WO2019029205A1/zh
Priority to US16/693,906 priority patent/US11121809B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Definitions

  • the present application relates to the field of communications technologies, and in particular, to an encoding method and apparatus.
  • Polar (polarization) code is the first channel coding method that can be strictly proved to "reach" the channel capacity.
  • the Polar code is a linear block code whose generating matrix is G N and its encoding process is Is a binary line vector of length N (ie code length);
  • B N is an N ⁇ N transposed matrix, such as a bit reverse transposed matrix;
  • the multiplied by the generator matrix G N gives the encoded bits, and the process of multiplication is the process of encoding.
  • the encoding process of the Polar code A part of the bits are used to carry information, called information bits, and the set of index bits of information bits is recorded as The other part of the bit is set to a fixed value pre-agreed by the transceiver, which is called a frozen bit, and the index is used as a set.
  • the freeze bit is usually set to 0, and only needs to be pre-agreed by the transceiver.
  • the freeze bit sequence can be arbitrarily set.
  • an outer code having a check capability can be cascaded outside the Polar, and the CA-Polar code is a Polar code of a Cyclic Redundancy Check (CRC) code.
  • CRC Cyclic Redundancy Check
  • the coding process of the CA-Polar code is: CRC coding the information bits of the coded information to obtain a CRC-encoded bit sequence, the CRC-coded bit sequence includes information bits and CRC bits, and then performs Polar coding on the CRC-coded bit sequence.
  • the CA-Polar code is decoded by the CA-SCL (CRC-Aided Successive Cancellation List) decoding algorithm. After the SCL decoding is completed, the L candidate paths output by the SCL decoding are subjected to CRC check, which will pass the CRC check. The candidate path is used as a decoding output result, and if no candidate path passes the CRC check, it is determined that the decoding fails.
  • CA-SCL CRC-Aided Successive Cancellation List
  • the CA-Polar code can perform the CRC check after the channel decoding ends, and the decoding process of the decoding failure takes the same time as the decoding process.
  • the decoding attempt for decoding failure can be stopped early (early stop), then It can effectively reduce the decoding delay of the entire blind detection and the average energy consumption.
  • Distributed CRC coding is proposed as a CRC coding mode with early stop capability.
  • the distributed CRC coding introduces an interleaving operation after the end of the traditional CRC coding, that is, the CRC bits obtained by the CRC coding are distributed between the information bits.
  • the decoding can be terminated early.
  • the interleaving operation is performed by a pre-stored interleaving sequence. Since the encoding process of the CRC encoding is related to the number of information bits, the length of the interleaving sequence is the same as the number of information bits. If the number of information bits that the system needs to support is too large, a large number of interleaving sequences need to be stored, and the system has a large storage overhead. In the related art, system storage overhead is saved by storing the longest interleaving sequence supporting the maximum number of information bits, and the case where the number of information bits is smaller than the maximum number of information bits is supported by adopting the longest interleaving sequence and introducing a small amount of extra operations. Interweaving process. However, according to the longest interleaved sequence stored, the manner in which the interleaving process is performed is influential on the coding delay of the distributed CRC coding.
  • the present application provides an encoding method and apparatus for implementing, in distributed CRC encoding, when the number of information bits is less than the maximum number of information bits, the interleaving sequence required to complete the interleaving process is obtained according to the longest interleaving sequence supported by the system.
  • the present application provides an encoding method, including: performing cyclic redundancy check CRC coding on A information bits to be encoded, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits.
  • L A is a positive integer
  • the first bit sequence is interleaved to obtain a second bit sequence, wherein the first interleaving sequence used by the interleaving operation is obtained according to the longest interleaving sequence supported by the system and a preset rule, first The length of the interleaving sequence is equal to A+L, or the second interleaving sequence used in the interleaving operation is the longest interleaving sequence, the length of the second interleaving sequence is equal to K max +L, and K max is the maximum number of information bits corresponding to the longest interleaving sequence.
  • Translating the second bit sequence including: performing cyclic redundancy check CRC coding on A information bits to be encoded, to obtain a first bit sequence, where the first bit sequence includes L CRC bits
  • the first bit sequence is obtained by performing CRC encoding on the information bits to be encoded by the transmitting end, and then performing the interleaving operation on the first bit sequence to obtain a second bit sequence, where the interleaving operation is adopted.
  • the first interleaving sequence is obtained according to the longest interleaving sequence and the preset rule, the length of the first interleaving sequence is corresponding to the number of information bits to be encoded, or the second interleaving sequence used by the interleaving operation is directly the longest interleaving sequence, and finally the first The two-bit sequence is polar coded. Therefore, in the distributed CRC encoding, when the number of information bits is less than the maximum number of information bits, the interleaving sequence required to complete the interleaving process is obtained according to the longest interleaving sequence supported by the system.
  • the preset rule is: taking all the indexes whose index is greater than or equal to K max -A from the longest interleaving sequence in the order of the indexes, and subtracting K max -A from all the indexes taken out,
  • the first interleaving sequence is configured to perform an interleaving operation on the first bit sequence, including: performing an interleaving operation on the first bit sequence by using the first interleaving sequence to obtain a second bit sequence.
  • the operations of obtaining the first interleaving sequence according to the longest interleaving sequence and the preset rule may be processed in parallel, and after the first interleaving sequence is obtained, the first The interleaving sequence performs the interleaving operation to directly obtain the second bit sequence, thereby reducing the delay and thereby reducing the coding delay.
  • the predetermined rule is: the sequence is removed from the longest interleaving index in the order of less than all of the indexes and index A is greater than or equal to K max index, the index is greater than or equal to the fetched K max of The index is subtracted from K max -A to form a first interleaving sequence, and the interleaving operation is performed on the first bit sequence, including: arranging A information bits in the first bit sequence in reverse order according to the index of the information bits to obtain a third bit sequence. The third bit sequence is interleaved using the first interleaving sequence to obtain a second bit sequence.
  • the operations of obtaining the first interleaving sequence according to the longest interleaving sequence and the preset rule may be processed in parallel, and after the first interleaving sequence is obtained, the first The interleaving sequence performs the interleaving operation to directly obtain the second bit sequence, thereby reducing the delay and thereby reducing the coding delay.
  • performing the interleaving operation on the first bit sequence includes: expanding the first bit sequence to include the K max + L bits a four-bit sequence in which the value of the first K max -A bits in the fourth bit sequence is set to null, and the remaining bits correspond to the bits in the first bit sequence in order from the K max -A+1 bits, using the longest
  • the interleaving sequence interleaves the fourth bit sequence to obtain a fifth bit sequence, and removes the null bit from the fifth bit sequence to obtain a second bit sequence.
  • the longest interleaved sequence is any of the sequences in Table 1 of the specification.
  • the longest interleaved sequence is any of the sequences in Table 2 of the specification.
  • the present application provides an encoding apparatus, including: a first encoding module, configured to perform cyclic redundancy check CRC coding on A information bits to be encoded, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits, L and A are positive integers; an interleaving module is configured to perform an interleaving operation on the first bit sequence to obtain a second bit sequence; wherein the first interleaving sequence used in the interleaving operation is supported by the system The longest interleaving sequence and the preset rule are obtained.
  • the length of the first interleaving sequence is equal to A+L, or the second interleaving sequence used by the interleaving operation is the longest interleaving sequence, and the length of the second interleaving sequence is equal to K max +L, K. Max is the maximum number of information bits corresponding to the longest interleaving sequence; the second encoding module is configured to perform polarization encoding on the second bit sequence.
  • the preset rule is: taking all the indexes whose index is greater than or equal to K max -A from the longest interleaving sequence in the order of the indexes, and subtracting K max -A from all the indexes taken out, Forming a first interleaving sequence, the interleaving module is configured to: perform an interleaving operation on the first bit sequence by using the first interleaving sequence to obtain a second bit sequence.
  • the predetermined rule is: the sequence is removed from the longest interleaving index in the order of less than all of the indexes and index A is greater than or equal to K max index, the index is greater than or equal to the fetched K max of The index is subtracted from K max -A to form a first interleaving sequence, and the interleaving module is configured to: arrange A information bits in the first bit sequence in reverse order according to the index of the information bits to obtain a third bit sequence, using the first interleaving sequence pair The third bit sequence is subjected to an interleaving operation to obtain a second bit sequence.
  • the interleaving module when the second interleaving sequence used by the interleaving operation is the longest interleaving sequence, is configured to: expand the first bit sequence into a fourth bit sequence including K max + L bits, and fourth The value of the first K max -A bits in the bit sequence is set to null, and the remaining bits correspond to the bits in the first bit sequence in order from the K max -A+1 bits, and the longest interleaving sequence is used to the fourth bit.
  • the sequence is interleaved to obtain a fifth bit sequence, and the bit having a null value is removed from the fifth bit sequence to obtain a second bit sequence.
  • the longest interleaved sequence is any of the sequences in Table 1 of the specification.
  • the longest interleaved sequence is any of the sequences in Table 2 of the specification.
  • the application provides an encoding apparatus, including: a memory and a processor;
  • the memory is used to store program instructions
  • the processor is operative to invoke program instructions in the memory to perform the first aspect and the encoding method in any of the possible designs of the first aspect.
  • the present application provides a readable storage medium comprising: a readable storage medium and a computer program for implementing the method of any of the first aspect and the first aspect of the first aspect.
  • the present application provides a program product comprising a computer program stored in a readable storage medium.
  • At least one processor of the encoding device can read the computer program from a readable storage medium, and the at least one processor executes the computer program such that the encoding device implements the method of any of the first aspect and the first aspect.
  • FIG. 1 is a schematic structural diagram of a system of a transmitting end and a receiving end provided by the present application;
  • FIG. 2 is a schematic flow chart of a communication system
  • FIG. 3 is a flowchart of an embodiment of an encoding method provided by the present application.
  • FIG. 4 is a schematic flow chart of an encoding method provided by the present application.
  • FIG. 5 is a schematic flowchart of an encoding method provided by the present application.
  • FIG. 6 is a schematic flowchart of an encoding method provided by the present application.
  • FIG. 7 is a schematic structural diagram of an embodiment of an encoding apparatus provided by the present application.
  • FIG. 8 is a schematic diagram of a coding entity device provided by the present application.
  • FIG. 9 is a schematic diagram of a coding entity device provided by the present application.
  • the embodiments of the present application can be applied to a wireless communication system.
  • the wireless communication system mentioned in the embodiments of the present application includes but is not limited to: Narrow Band-Internet of Things (NB-IoT), global mobile Global System for Mobile Communications (GSM), Enhanced Data Rate for GSM Evolution (EDGE), Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access (CDMA) 2000 System (Code Division Multiple Access, CDMA2000), Time Division-Synchronization Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), and Next Generation 5G Mobile Communication System
  • eMBB Enhanced Mobile Broad Band
  • URLLC Massive Machine-Type Communications
  • mMTC Massive Machine-Type Communications
  • the communication device involved in the present application mainly includes a network device or a terminal device.
  • the transmitting end is a network device
  • the receiving end is a terminal device; in this application, the transmitting end is a terminal device, and the receiving end is a network device.
  • the terminal device includes, but is not limited to, a mobile station (MS, Mobile Station), a mobile terminal (Mobile Terminal), a mobile telephone (Mobile Telephone), a mobile phone (handset), and a portable device (portable equipment). And so on, the terminal device can communicate with one or more core networks via a Radio Access Network (RAN), for example, the terminal device can be a mobile phone (or "cellular" phone), with wireless communication Functional computers, etc., terminal devices can also be portable, pocket-sized, handheld, computer-integrated or in-vehicle mobile devices or devices.
  • RAN Radio Access Network
  • terminal devices can also be portable, pocket-sized, handheld, computer-integrated or in-vehicle mobile devices or devices.
  • the present application describes various embodiments in connection with a network device.
  • the network device may be a device for communicating with the terminal device, for example, may be a base station (Base Transceiver Station, BTS) in the GSM system or CDMA, or may be a base station (NodeB, NB) in the WCDMA system, or may be An evolved base station (Evolutional Node B, eNB or eNodeB) in an LTE system, or the network device may be a relay station, an access point, an in-vehicle device, a wearable device, and a network side device in a future 5G network or a public land that is to be evolved in the future Network devices in the Public Network Mobile Network (PLMN), etc.
  • the network device may also be a terminal device that assumes the function of the network device in D2D communication.
  • FIG. 1 is a schematic diagram of a system architecture of a transmitting end and a receiving end provided by the present application, as shown in FIG. 1 , where the sending end is an encoding side, which may be used for coding and coding. Output coding information, the coding information is transmitted to the decoding side on the channel; the receiving end is the decoding side, and can be used to receive the encoded information sent by the transmitting end, and decode the encoded information.
  • FIG. 2 is a schematic flow chart of a communication system.
  • the source is sequentially sent after source coding, channel coding, interleaving, rate matching, and digital modulation.
  • the information is outputted by digital demodulation, deinterleaving and de-rate matching, channel decoding and source decoding.
  • the channel coding code may use a Polar code or a CA-Polar code, and the channel coding may use the coding method provided by the present application.
  • the present application provides an encoding method and apparatus for implementing distributed CRC coding.
  • the number of information bits is less than the maximum number of information bits, how to obtain the interleaving sequence required for completing the interleaving process according to the longest interleaving sequence supported by the system, and Ensure good performance, such as reducing coding delay, reducing false alarm probability, etc., wherein the number of information bits corresponding to the longest interleaving sequence supported by the system is the maximum number of information bits.
  • the interleaving sequence has two numbering modes, that is, a method of taking a positive sequence number and a reverse sequence number (hereinafter referred to as a positive sequence number and a reverse sequence number) for information bits.
  • the positive sequence number that is, the index of the corresponding information bits in the interleaving sequence
  • index 0 corresponds to the 0th information bit
  • index 1 corresponds to the 1st information bit.
  • the reverse sequence number that is, the index of the corresponding information bits in the interleaving sequence, is in the reverse order of the information bits, that is, the index 0 corresponds to the last information bit
  • the index 1 corresponds to the second-order information bit.
  • the interleaving sequence involved in the embodiment of the present application has a minimum index of 0 based on the interleaving sequence. If the minimum index of the actually used interleaving sequence is 1, the method of the present application can be simply adjusted. All the examples in this application start from index 0. In actual application, if index 1 is started, the corresponding index is incremented by 1. Just fine.
  • FIG. 3 is a flowchart of an embodiment of an encoding method provided by the present application.
  • the executor of the embodiment is a sending end (encoding end), and the method in this embodiment may include:
  • the transmitting end performs CRC encoding on the A information bits to be encoded to obtain a first bit sequence.
  • the first bit sequence includes L CRC bits and A information bits, and L and A are positive integers.
  • the transmitting end After receiving the A information bits to be encoded, the transmitting end adds L CRC bits to obtain a first bit sequence.
  • the transmitting end performs an interleaving operation on the first bit sequence to obtain a second bit sequence.
  • the interleaving sequence used in the interleaving operation has two types, a first interleaving sequence and a second interleaving sequence, and different interleaving sequences correspond to different interleaving operations, and the first interleaving sequence is based on the longest interleaving sequence supported by the system and a preset rule. It is obtained that the length of the first interleaving sequence is equal to A+L.
  • the second interleaving sequence is the longest interleaving sequence, the length of the second interleaving sequence is equal to K max + L, and K max is the maximum number of information bits corresponding to the longest interleaving sequence.
  • the longest interleaving sequence supported by the system is hereinafter referred to as the longest interleaving sequence.
  • the longest interleaving sequence supported by the system may be pre-stored or obtained by online calculation.
  • the first interleaving sequence has two reading modes, which respectively correspond to two preset rules.
  • the preset rule is: taking all the indexes whose index is greater than or equal to K max -A from the longest interleaving sequence according to the order of the indexes, and subtracting K max -A from all the extracted indexes to form the first interlace. sequence.
  • the longest interleaving sequence is ⁇ 2,3,5,9,10,12,4,6,11,13,0,7,14,1,8,15 ⁇
  • the transmitting end performs an interleaving operation on the first bit sequence. Specifically, the transmitting end performs an interleaving operation on the first bit sequence by using the first interleaving sequence to obtain a second bit sequence.
  • the longest interleaving sequence in the above manner 1 is a positive sequence number.
  • the predetermined rule is: the sequence is removed from the longest interleaving index in the order of less than all of the indexes and index A is greater than or equal to K max index, the index is greater than or equal to the extracted index by subtracting K max K Max - A, which constitutes the first interleaving sequence.
  • the longest interleaving sequence is ⁇ 1,2,6,8,9,12,0,5,7,13,4,11,14,3,10,15 ⁇
  • the sequence is ⁇ 1, 2, 6, 8, 9, 10, 0, 5, 7, 11, 4, 12, 3, 13 ⁇ .
  • the transmitting end performs the interleaving operation on the first bit sequence. Specifically, the transmitting end arranges the A information bits in the first bit sequence in reverse order according to the index of the information bits to obtain a third bit sequence, and the reverse order is also called reverse order.
  • the first bit sequence is ⁇ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 ⁇ , ⁇ 0, 1, 2, 3, 4 , 5, 6, 7, 8, 9, 10 ⁇ are information bits, ⁇ 11, 12, 13, 14 ⁇ are CRC bits, and the information bits are arranged in reverse order to be ⁇ 10, 9, 8, 7, 6, 5, 4,3,2,1,0 ⁇ , the resulting third bit sequence is ⁇ 10,9,8,7,6,5,4,3,2,1,0,11,12,13,14 ⁇ . Then, the transmitting end performs an interleaving operation on the third bit sequence by using the first interleaving sequence to obtain a second bit sequence.
  • the longest interleaving sequence in the above manner 2 is a reverse order number.
  • the second interleaving sequence can directly use the longest interleaving sequence.
  • the transmitting end performs an interleaving operation on the first bit sequence, which may be:
  • the transmitting end expands the first bit sequence into a fourth bit sequence containing K max + L bits, the value of the first K max -A bits in the fourth bit sequence is set to null, and the remaining bits are from K max -A+ One bit starts in turn corresponding to the bits in the first bit sequence.
  • the special fourth bit sequence the value of the first two bits in the fourth bit sequence is set to null, and the remaining bits correspond to the bits in the first bit sequence in order from the third bit.
  • the transmitting end interleaves the fourth bit sequence by using the longest interleaving sequence to obtain a fifth bit sequence.
  • the transmitting end removes the bit having a null value from the fifth bit sequence to obtain a second bit sequence.
  • the interleaving operation is performed by using the second interleaving sequence
  • the first bit sequence needs to be extended before the interleaving.
  • the bits with the null value of the interleaved bit sequence need to be removed, and the interleaving operation delay is long; and the second interleaving is adopted.
  • the interleaving operation is performed by using the first interleaving sequence
  • the operations of obtaining the first interleaving sequence according to the longest interleaving sequence and the preset rule may be processed in parallel, and after obtaining the first interleaving sequence, the first interleaving sequence is adopted. Interleaving can directly obtain the second bit sequence, thus reducing the delay and reducing the coding delay.
  • the longest interleaving sequence in this mode is the positive sequence number.
  • the transmitting end performs polarization coding on the second bit sequence.
  • the encoding method for performing polarization encoding on the second bit sequence by the transmitting end may adopt an existing polarization encoding method, and details are not described herein again.
  • the encoding method provided in this embodiment performs CRC encoding on the information bits to be encoded by the transmitting end to obtain a first bit sequence, and then performs an interleaving operation on the first bit sequence to obtain a second bit sequence, where the interleaving operation is performed.
  • the first interleaving sequence is obtained according to the longest interleaving sequence and the preset rule.
  • the length of the first interleaving sequence corresponds to the number of information bits to be encoded, or the second interleaving sequence used by the interleaving operation is directly the longest interleaving sequence, and finally the second.
  • the bit sequence is polar coded. Therefore, in the distributed CRC encoding, when the number of information bits is less than the maximum number of information bits, the interleaving sequence required to complete the interleaving process is obtained according to the longest interleaving sequence supported by the system.
  • an interleaving sequence used in an interleaving operation is used as an example of a first interleaving sequence obtained according to a preset rule of mode 1.
  • the longest interleaving sequence is a sequence of positive sequence numbers ⁇ 1, the maximum information bit length corresponding to the interleaving sequence ⁇ 1 is K max , the CRC polynomial is g, and the number of CRC bits is L, also referred to as CRC length L.
  • a information bits to be encoded are ⁇ a 0 , a 1 , ..., a A-1 ⁇ , and the number of information bits A ⁇ K max .
  • the executor of this embodiment is a transmitting end (encoding end). As shown in FIG. 4, the method in this embodiment includes:
  • S201 Perform CRC encoding on the A information bits to be encoded, to obtain a first bit sequence ⁇ b 0 , b 1 , . . . , b A+L-1 ⁇ .
  • ⁇ b 0 , b 1 , . . . , b A-1 ⁇ are A information bits
  • ⁇ b A , b A+1 , . . . , b A+L-1 ⁇ are L CRC bits.
  • index index is greater than or equal to all K max -A index in accordance with the order from the longest interleaving sequence, the indexes of the withdrawn subtracting K max -A, constituting the first interleaving sequence ⁇ 1 '.
  • the part is ⁇ 2,3,5,9,10,12,4,6,11,13,7,14,8,15 ⁇ , and all the indexes taken out are respectively subtracted by 2, and the first interleaved sequence ⁇ 1' is composed. It is ⁇ 0,1,3,7,8,10,2,4,9,11,5,12,6,13 ⁇ .
  • the first bit sequence shown in FIG. 4 is ⁇ b 0 , b 1 , . . . , b 13 ⁇
  • the first interleaving sequence ⁇ 1′ ⁇ 0 , 1 , 3 , 7 , 8 , 10, 2, 4 is used. 9,11,5,12,6,13 ⁇ for the first bit sequence ⁇ b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , b 7 , b 8 , b 9 , b 10 , b 11 , b 12 , b 13 ⁇ after the interleaving operation,
  • the polynomial is 0xA2B79
  • the interleaving sequence ⁇ 1 ⁇ 0,1,2,5,6,7,10,11,13,14,18,19,20,22,23,24,26,31, 33,35,37,39,42,44,45,47,51,52,55,56,57,58,60,61,62,64,67,69,70,72,73,76,85, 86,89,90,93,94,100,103,104,105,107,109,110,112,113,125,127,128,129,130,131,133,134,137,140,144,145,148,149,152,159,161,162,163,166,169,173,175,178,182,183,186,187,189,195,196,197,200,3,8,12,15,21,25,27,32,34,36,40,40,46,48,48,59,63,65,68, 71,74,77,87,91,
  • the bit sequence after CRC encoding is ⁇ b 0 , b 1 , . . . , b 82 ⁇ .
  • the second, fourth, and sixth interleaving sequences have better early stop effects when applied to high code rate polarization codes; the first and second interleaving sequences are better for polarization code SC decoding.
  • the effect of early stop; the third and fourth interleaving sequences have better early stop effect when applied to long code length polarization codes; the fifth and sixth interleaving sequences are better when applied to short code length polarization codes.
  • the effect of early stop is
  • the interleaving sequence has a better early stop effect when applied to a coded code with a code length of 64;
  • the third interleaving sequence has a better early stop effect when applied to a coded code with a code length of 128;
  • the fourth interleaving sequence has a better early stop effect when applied to a coded code having a code length of 256.
  • CRC polynomial in Table 1 and Table 2 below uses bit reverse order and hexadecimal representation of +1, taking polynomial 0xA2B79 as an example, and the corresponding binary polynomial is (1,0,0,1,1). ,1,1,0,1,1,0,1,0,1,0,0,0,0,1,0,1), corresponding polynomial D ⁇ 19+D ⁇ 16+D ⁇ 15+D ⁇ 14+ D ⁇ 13+D ⁇ 11+D ⁇ 10+D ⁇ 8+D ⁇ 6+D ⁇ 2+1.
  • FIG. 5 is a schematic flowchart of an encoding method provided by the present application.
  • an interleaving sequence used in an interleaving operation is used as an example of a first interleaving sequence obtained according to a preset rule of mode 2, and a distributed CRC encoding is used.
  • the longest interleaving sequence is a reverse-numbered sequence ⁇ 2, the maximum information bit length corresponding to ⁇ 2 is K max , the CRC polynomial is g, and the number of CRC bits is L, also called CRC length L.
  • a information bits to be encoded are ⁇ a 0 , a 1 , ..., a A-1 ⁇ , and the number of information bits A ⁇ K max .
  • the executor of this embodiment is a transmitting end (encoding end). As shown in FIG. 5, the method in this embodiment includes:
  • ⁇ b 0 , b 1 , . . . , b A-1 ⁇ are A information bits
  • ⁇ b A , b A+1 , . . . , b A+L-1 ⁇ are L CRC bits.
  • the extracted part is ⁇ 1,2,6,8,9,12,0,5,7,13,4,14,3,15 ⁇ , and the index of the extracted index greater than or equal to 12 is subtracted by 2
  • the first interleaved sequence ⁇ 2' is composed of ⁇ 1, 2, 6, 8, 9, 10, 0, 5, 7, 11, 4, 12, 3, 13 ⁇ .
  • the first bit sequence shown in FIG. 4 is ⁇ b 0, b 1, ... , b 13 ⁇
  • the first bit sequence ⁇ b 0, b 1, ... , b 13 ⁇ 10 information bits in accordance with The index of the information bits is arranged in reverse order to obtain a third bit sequence ⁇ b 9 , b 8 , b 7 , b 6 , b 5 , b 4 , b 3 , b 2 , b 1 , b 10 , b 11 , b 12 , b 13 ⁇
  • the bit sequence after CRC encoding is ⁇ b 0 , b 1 , . . . , b 82 ⁇ .
  • the second, fourth, and sixth interleaving sequences have better early stop effects when applied to low bit rate polarization codes; the first and second interleaving sequences are better for polarization code SC decoding.
  • the effect of early stop; the third and fourth interleaving sequences have better early stop effect when applied to long code length polarization codes; the fifth and sixth interleaving sequences are better when applied to short code length polarization codes.
  • the effect of early stop for example, long code length refers to a code length greater than 512, and short code length refers to a code length less than 512.
  • the interleaving sequence has a better early stop effect when applied to a coded code with a code length of 64;
  • the third interleaving sequence has a better early stop effect when applied to a coded code with a code length of 128;
  • the fourth interleaving sequence has a better early stop effect when applied to a coded code having a code length of 256.
  • FIG. 6 is a schematic flowchart of an encoding method provided by the present application.
  • an interleaving sequence used in an interleaving operation is used as an example of a longest interleaving sequence, and a longest interleaving sequence of distributed CRC encoding is a positive sequence numbering.
  • the maximum information bit length corresponding to the sequence ⁇ 3, ⁇ 3 is K max
  • the CRC polynomial is g
  • the number of CRC bits is L
  • the CRC length is also L.
  • a information bits to be encoded are ⁇ a 0 , a 1 , ..., a A-1 ⁇ , and the number of information bits A ⁇ K max .
  • the executor of this embodiment is a transmitting end (encoding end). As shown in FIG. 6, the method in this embodiment includes:
  • S401 Perform CRC encoding on the A information bits to be encoded, to obtain a first bit sequence ⁇ b 0 , b 1 , . . . , b A+L-1 ⁇ .
  • ⁇ b 0 , b 1 , . . . , b A-1 ⁇ are A information bits
  • ⁇ b A , b A+1 , . . . , b A+L-1 ⁇ are L CRC bits.
  • the first bit sequence ⁇ b 0 , b 1 , . . . , b A+L-1 ⁇ is expanded to obtain a fourth bit sequence ⁇ c 0 , c 1 , . . . , c Kmax+L-1 ⁇
  • the first bit sequence shown in FIG. 6 is ⁇ b 0 , b 1 , . . . , b 13 ⁇
  • the obtained fourth bit sequence is ⁇ NULL, NULL, b 0 , b 1 ,... , b 13 ⁇ .
  • ⁇ 3 is ⁇ 2,3,5,9,10,12,4,6,11,13,0,7,14,1,8,15 ⁇ , using ⁇ 3 for Figure 6.
  • the fourth bit sequence ⁇ NULL, NULL, b 0 , b 1 , ..., b 13 ⁇ is shown as an interleaving operation, and the fifth bit sequence is obtained as ⁇ b 0 , b 1 , b 3 , b 7 , b 8 , b 10 , b 2 , b 4 , b 9 , b 11 , NULL, b 5 , b 12 , NULL, b 6 , b 13 ⁇ .
  • the polynomial is 0xA2B79
  • the interleaving sequence ⁇ 3 ⁇ 0,1,2,5,6,7,10,11,13,14,18,19,20,22,23,24,26,31, 33,35,37,39,42,44,45,47,51,52,55,56,57,58,60,61,62,64,67,69,70,72,73,76,85, 86,89,90,93,94,100,103,104,105,107,109,110,112,113,125,127,128,129,130,131,133,134,137,140,144,145,148,149,152,159,161,162,163,166,169,173,175,178,182,183,186,187,189,195,196,197,200,3,8,12,15,21,25,27,32,34,36,40,40,46,48,48,59,63,65,68, 71,74,77,87,91,
  • the bit sequence after CRC encoding is ⁇ b 0 , b 1 , . . . , b 82 ⁇ .
  • the sequence ⁇ c 0 , c 1 ,..., c Kmax+L-1 ⁇ ⁇ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, is obtained first.
  • the deinterleaving operation is performed, and the process of obtaining the interleaving sequence in the deinterleaving is consistent with the sending end (encoding side). For details, refer to the encoding. The description of the end is not repeated here.
  • the application may divide the function module by the sending end according to the above method example.
  • each function module may be divided according to each function, or two or more functions may be integrated into one processing module.
  • the above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of the modules in the embodiments of the present application is schematic, and is only a logical function division. In actual implementation, there may be another division manner.
  • FIG. 7 is a schematic structural diagram of an embodiment of an encoding apparatus according to the present application.
  • the apparatus in this embodiment may include: a first encoding module 11, an interleaving module 12, and a second encoding module 13, the first encoding.
  • the module 11 is configured to perform cyclic redundancy check CRC coding on the A information bits to be encoded to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits, and L and A are positive integers.
  • the interleaving module 12 is configured to perform an interleaving operation on the first bit sequence to obtain a second bit sequence, where the first interleaving sequence used by the interleaving operation is obtained according to a longest interleaving sequence supported by the system and a preset rule.
  • the length of the first interleaving sequence is equal to A+L, or the second interleaving sequence used by the interleaving operation is the longest interleaving sequence, and the length of the second interleaving sequence is equal to K max +L, and K max is The maximum number of information bits corresponding to the longest interleaved sequence.
  • the second encoding module 13 is configured to perform polarization encoding on the second bit sequence.
  • the preset rule is: extracting, from the longest interleaving sequence, all indexes whose indexes are greater than or equal to K max -A according to an order of indexes, and subtracting K max -A from all indexes extracted, respectively
  • the first interleaving sequence is described.
  • the interleaving module 12 is configured to perform an interleaving operation on the first bit sequence by using the first interleaving sequence to obtain the second bit sequence.
  • the longest interleaving sequence is any one of the above Table 1.
  • the predetermined rule is: interleaving sequence from the longest of all removed, and the index A index is less than or equal to K max index in the order of the index, the index is greater than or equal to the fetched index K max Save Go to K max -A to form the first interleaving sequence.
  • the interleaving module 12 is configured to: arrange the A information bits in the first bit sequence in reverse order according to the index of the information bits, to obtain a third bit sequence, and perform the third bit sequence by using the first interleaving sequence.
  • the interleaving operation obtains the second bit sequence.
  • the longest interleaving sequence is any one of the above Table 2.
  • the interleaving module 12 is configured to: expand the first bit sequence into a fourth bit sequence including K max + L bits
  • the value of the first K max -A bits in the fourth bit sequence is set to be null, and the remaining bits correspond to the bits in the first bit sequence in order from the K max -A+1 bits
  • the longest interleaving sequence performs an interleaving operation on the fourth bit sequence to obtain a fifth bit sequence, and the null bit is removed from the fifth bit sequence to obtain the second bit sequence.
  • the longest interleaving sequence is any one of the above Table 1.
  • the device in this embodiment may be used to implement the technical solution of the method embodiment shown in FIG. 3, and the implementation principle and technical effects are similar, and details are not described herein again.
  • FIG. 8 is a schematic diagram of a coding entity device provided by the present application.
  • the device 1100 includes:
  • the memory 1101 is configured to store program instructions, and the memory may also be a flash memory.
  • the processor 1102 is configured to call and execute program instructions in the memory to implement various steps in the encoding method shown in FIG. 3. For details, refer to the related description in the foregoing method embodiments.
  • FIG. 9 is a schematic diagram of a coding entity device provided by the present application.
  • the memory 1101 is integrated with the processor 1102.
  • the apparatus may be used to perform various steps and/or processes corresponding to the sender in the above method embodiment.
  • the present application also provides a readable storage medium, a readable storage medium, and a computer program for implementing the encoding methods provided by the various embodiments described above.
  • the application also provides a program product comprising a computer program stored in a readable storage medium.
  • At least one processor of the encoding device can read the computer program from a readable storage medium, and the at least one processor executes the computer program such that the encoding device implements the encoding methods provided by the various embodiments described above.
  • the computer program product includes one or more computer instructions.
  • the computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device.
  • the computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be from a website site, computer, server or data center Transfer to another website site, computer, server, or data center by wire (eg, coaxial cable, fiber optic, digital subscriber line (DSL), or wireless (eg, infrared, wireless, microwave, etc.).
  • the computer readable storage medium can be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that includes one or more available media.
  • the usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (such as a solid state disk (SSD)).

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Abstract

本申请提供一种编码方法及装置。该方法包括：对A个待编码信息比特进行CRC编码，得到第一比特序列，第一比特序列包括L个CRC比特和A个信息比特，对第一比特序列进行交织操作，得到第二比特序列，交织操作采用的第一交织序列根据系统所支持的最长交织序列和预设规则得到，第一交织序列的长度等于A+L，或者，交织操作采用的第二交织序列为最长交织序列，第二交织序列的长度等于K max+L，K max为最长交织序列对应的最大信息比特数目，对第二比特序列进行极化编码。从而实现了在分布式CRC编码中，当信息比特数量小于最大信息比特数量时，根据系统所支持的最长交织序列得到完成交织过程所需要的交织序列。

Description

编码方法及装置 技术领域
本申请涉及通信技术领域，尤其涉及一种编码方法及装置。
背景技术
通信系统通常采用信道编码提高数据传输的可靠性，保证通信的质量，Polar(极化)码是第一种能够被严格证明“达到”信道容量的信道编码方法。Polar码是一种线性块码，其生成矩阵为G N，其编码过程为
Figure PCTCN2018086329-appb-000001
是一个二进制的行矢量，长度为N(即码长)；且
Figure PCTCN2018086329-appb-000002
这里
Figure PCTCN2018086329-appb-000003
B N是一个N×N的转置矩阵，例如比特逆序转置矩阵；
Figure PCTCN2018086329-appb-000004
定义为log 2N个矩阵F 2的克罗内克(Kronecker)乘积，x 1 N是编码后的比特(也叫码字)，
Figure PCTCN2018086329-appb-000005
与生成矩阵G N相乘后就得到编码后的比特，相乘的过程就是编码的过程。在Polar码的编码过程中，
Figure PCTCN2018086329-appb-000006
中的一部分比特用来携带信息，称为信息比特，信息比特的索引的集合记作
Figure PCTCN2018086329-appb-000007
中另外的一部分比特置为收发端预先约定的固定值，称之为冻结比特，其索引的集合用
Figure PCTCN2018086329-appb-000008
的补集
Figure PCTCN2018086329-appb-000009
表示。冻结比特通常被设为0，只需要收发端预先约定，冻结比特序列可以被任意设置。为了提高Polar码的性能，可以在Polar外级联具有校验能力的外码，CA-Polar码是级联循环冗余校验(英文：Cyclic Redundancy Check，CRC)码的Polar码。
CA-Polar码的编码过程为：对待编码信息的信息比特进行CRC编码，得到CRC编码后比特序列，CRC编码后比特序列包括信息比特和CRC比特，接着对CRC编码后的比特序列进行Polar编码。CA-Polar码的译码采用CA-SCL(CRC-Aided Successive Cancellation List)译码算法，在SCL译码结束后，对SCL译码输出的L条候选路径进行CRC校验，将通过CRC校验的候选路径作为译码输出结果，若无候选路径通过CRC校验，则判定译码失败。因此CA-Polar码在信道译码结束后才能进行CRC校验，其译码失败的译码过程所占用时间与译码成功的译码过程所占用时间相同。在无线通信系统的控制信道下行盲检场景中，通常需要尝试译码数十次，而其中最多只有一次能够译码成功，若对译码失败的译码尝试能够提前停止(早停)，则可以有效的降低整个盲检的译码延迟以及平均的能耗。分布式CRC编码作为一种具有早停能力的CRC编码方式被提出，分布式CRC编码在传统的CRC编码结束后引入交织操作，即将CRC编码得到的CRC比特分布到信息比特之间。在译码端的SCL译码过程中，在译码结束前的某一时刻，当所有的候选路径均无法满足已经完成译码的部分CRC比特的校验时，可以提前结束译码。
交织操作通过预存的交织序列进行，由于CRC编码的编码过程与信息比特数量相关，交织序列的长度与信息比特数量相同。若系统需要支持的信息比特数量的数目过多，则需要存储大量交织序列，系统存储开销较大。相关技术中，通过存储支持最大信息比特数量的最长交织序列来节省系统存储开销，对信息比特数量小于最大信息比特数量的情况，通过采用最长交织序列，并引入少量的额外运算，来支持交织过程。然而，根据存储的最长交织序列，采用何种方式来完成交织过程，对分布式CRC编码的编码时延是有影响的。
发明内容
本申请提供一种编码方法及装置，以实现在分布式CRC编码中，当信息比特数量小于最大信息比特数量时，根据系统所支持的最长交织序列得到完成交织过程所需要的交织序列。
第一方面，本申请提供一种编码方法，包括：对A个待编码信息比特进行循环冗余校验CRC编码，得到第一比特序列，第一比特序列包括L个CRC比特和A个信息比特，L、A为正整数，对第一比特序列进行交织操作，得到第二比特序列，其中，交织操作采用的第一交织序列根据系统所支持的最长交织序列和预设规则得到，第一交织序列的长度等于A+L，或者，交织操作采用的第二交织序列为最长交织序列，第二交织序列的长度等于K max+L，K max为最长交织序列对应的最大信息比特数目，对第二比特序列进行极化编码。
通过第一方面提供的编码方法，通过发送端对A个待编码信息比特进行CRC编码，得到第一比特序列，接着对第一比特序列进行交织操作，得到第二比特序列，其中交织操作所采用的第一交织序列根据最长交织序列和预设规则获取，第一交织序列长度与待编码信息比特数量对应，或者，交织操作所采用的第二交织序列直接为最长交织序列，最后对第二比特序列进行极化编码。从而实现了在分布式CRC编码中，当信息比特数量小于最大信息比特数量时，根据系统所支持的最长交织序列得到完成交织过程所需要的交织序列。
在一种可能的设计中，预设规则为：从最长交织序列中按照索引的先后顺序取出所有索引大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成第一交织序列，对第一比特序列进行交织操作，包括：采用第一交织序列对第一比特序列进行交织操作，得到第二比特序列。
通过该实施方式提供的编码方法，当采用第一交织序列进行交织操作时，根据最长交织序列和预设规则得到第一交织序列的操作可以并行处理，得到第一交织序列后，采用第一交织序列进行交织操作可以直接得到第二比特序列，因此可降低时延，从而降低编码时延。
在一种可能的设计中，预设规则为：从最长交织序列中按照索引的先后顺序取出所有索引小于A和索引大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成第一交织序列，对第一比特序列进行交织操作，包括：将第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列，采用第一交织序列对第三比特序列进行交织操作，得到第二比特序列。
通过该实施方式提供的编码方法，当采用第一交织序列进行交织操作时，根据最长交织序列和预设规则得到第一交织序列的操作可以并行处理，得到第一交织序列后，采用第一交织序列进行交织操作可以直接得到第二比特序列，因此可降低时延，从而降低编码时延。
在一种可能的设计中，交织操作采用的第二交织序列为最长交织序列时，对第一比特序列进行交织操作，包括：将第一比特序列扩展为包含K max+L个比特的第四比特序列，第四比特序列中前K max-A个比特的值设置为空，剩下的比特从第K max-A+1个比特开始依次对应第一比特序列中的比特，采用最长交织序列对第四比特序列进行交织操作，得到第五比特序列，从第五比特序列中去掉值为空的比特，得到第二比特序列。
在一种可能的设计中，最长交织序列为说明书中表一中的任一个序列。
在一种可能的设计中，最长交织序列为说明书中表二中的任一个序列。
第二方面，本申请提供一种编码装置，包括：第一编码模块，用于对A个待编码信息比特进行循环冗余校验CRC编码，得到第一比特序列，第一比特序列包括L个CRC比特和A个信息 比特，L、A为正整数；交织模块，用于对第一比特序列进行交织操作，得到第二比特序列；其中，交织操作采用的第一交织序列根据系统所支持的最长交织序列和预设规则得到，第一交织序列的长度等于A+L，或者，交织操作采用的第二交织序列为最长交织序列，第二交织序列的长度等于K max+L，K max为最长交织序列对应的最大信息比特数目；第二编码模块，用于对第二比特序列进行极化编码。
在一种可能的设计中，预设规则为：从最长交织序列中按照索引的先后顺序取出所有索引大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成第一交织序列，交织模块用于：采用第一交织序列对第一比特序列进行交织操作，得到第二比特序列。
在一种可能的设计中，预设规则为：从最长交织序列中按照索引的先后顺序取出所有索引小于A和索引大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成第一交织序列，交织模块用于：将第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列，采用第一交织序列对第三比特序列进行交织操作，得到第二比特序列。
在一种可能的设计中，交织操作采用的第二交织序列为最长交织序列时，交织模块用于：将第一比特序列扩展为包含K max+L个比特的第四比特序列，第四比特序列中前K max-A个比特的值设置为空，剩下的比特从第K max-A+1个比特开始依次对应第一比特序列中的比特，采用最长交织序列对第四比特序列进行交织操作，得到第五比特序列，从第五比特序列中去掉值为空的比特，得到第二比特序列。
在一种可能的设计中，最长交织序列为说明书中表一中的任一个序列。
在一种可能的设计中，最长交织序列为说明书中表二中的任一个序列。
上述第二方面以及上述第二方面的各可能的设计中所提供的编码装置，其有益效果可以参见上述第一方面和第一方面的各可能的实施方式所带来的有益效果，在此不再赘述。
第三方面，本申请提供一种编码装置，包括：存储器和处理器；
存储器用于存储程序指令；
处理器用于调用存储器中的程序指令执行第一方面及第一方面任一种可能的设计中的编码方法。
第四方面，本申请提供一种可读存储介质，包括：可读存储介质和计算机程序，所述计算机程序用于实现第一方面及第一方面任一种可能的设计中的方法。
第五方面，本申请提供一种程序产品，该程序产品包括计算机程序，该计算机程序存储在可读存储介质中。编码装置的至少一个处理器可以从可读存储介质读取该计算机程序，至少一个处理器执行该计算机程序使得编码装置实施第一方面及第一方面任一种可能的设计中的方法。
附图说明
图1为本申请提供的一种发送端和接收端的系统架构示意图；
图2为一种通信系统的流程示意图；
图3为本申请提供的一种编码方法实施例的流程图；
图4为本申请提供的一种编码方法流程示意图；
图5为本申请提供的一种编码方法流程示意图；
图6为本申请提供的一种编码方法流程示意图；
图7为本申请提供的一种编码装置实施例的结构示意图；
图8为本申请提供的一种编码实体装置示意图；
图9为本申请提供的一种编码实体装置示意图。
具体实施方式
本申请实施例可以应用于无线通信系统，需要说明的是，本申请实施例提及的无线通信系统包括但不限于：窄带物联网系统(Narrow Band-Internet of Things，NB-IoT)、全球移动通信系统(Global System for Mobile Communications，GSM)、增强型数据速率GSM演进系统(Enhanced Data rate for GSM Evolution，EDGE)、宽带码分多址系统(Wideband Code Division Multiple Access，WCDMA)、码分多址2000系统(Code Division Multiple Access，CDMA2000)、时分同步码分多址系统(Time Division-Synchronization Code Division Multiple Access，TD-SCDMA)，长期演进系统(Long Term Evolution，LTE)以及下一代5G移动通信系统的三大应用场景增强型移动宽带(Enhanced Mobile Broad Band，eMBB)、URLLC以及大规模机器通信(Massive Machine-Type Communications，mMTC)。
本申请涉及的通信装置主要包括网络设备或者终端设备。本申请中的发送端为网络设备，则接收端为终端设备；本申请中的发送端为终端设备，则接收端为网络设备。
在本申请实施例中，终端设备(terminal device)包括但不限于移动台(MS，Mobile Station)、移动终端(Mobile Terminal)、移动电话(Mobile Telephone)、手机(handset)及便携设备(portable equipment)等，该终端设备可以经无线接入网(RAN，Radio Access Network)与一个或多个核心网进行通信，例如，终端设备可以是移动电话(或称为“蜂窝”电话)、具有无线通信功能的计算机等，终端设备还可以是便携式、袖珍式、手持式、计算机内置的或者车载的移动装置或设备。
本申请结合网络设备描述了各个实施例。网络设备可以是用于与终端设备进行通信的设备，例如，可以是GSM系统或CDMA中的基站(Base Transceiver Station，BTS)，也可以是WCDMA系统中的基站(NodeB，NB)，还可以是LTE系统中的演进型基站(Evolutional Node B，eNB或eNodeB)，或者该网络设备可以为中继站、接入点、车载设备、可穿戴设备以及未来5G网络中的网络侧设备或未来演进的公共陆地移动网络(Public Land Mobile Network，PLMN)中的网络设备等。网络设备还可以是在D2D通信中承担网络设备功能的终端设备。
本申请的通信系统可以包括发送端和接收端，图1为本申请提供的一种发送端和接收端的系统架构示意图，如图1所示，其中，发送端为编码侧，可以用于编码和输出编码信息，编码信息在信道上传输至译码侧；接收端为译码侧，可以用于接收发送端发送的编码信息，并对该编码信息译码。
图2为一种通信系统的流程示意图，如图2所示，在发送端，信源依次经过信源编码、信道编码、交织和速率匹配和数字调制后发出。在接收端，依次通过数字解调、解交织和解速率匹配、信道译码和信源译码输出信宿。信道编译码可以采用Polar码或CA-Polar码，信道编码可以采用本申请提供的编码方法。
本申请提供一种编码方法及装置，以实现分布式CRC编码中，信息比特数量小于最大信息比特数量时，如何根据系统所支持的最长交织序列得到完成交织过程所需要的交织序列，且能保证良好的性能，如降低编码时延，减小虚警概率等，其中，系统所支持的最长交织序列对应的信息比特数量为最大信息比特数量。下面结合附图详细说明本申请提供的编码方法及装置。
需要说明的是，为完成交织功能，交织序列存在两种编号方式，即针对信息比特采取正序编号和反序编号(下文简称为正序编号和反序编号)的方式。正序编号，即交织序列中对应信息比特的索引，其顺序与信息比特的索引顺序相同，即索引0对应第0位信息比特，索引1对应第1位信息比特等。反序编号，即交织序列中对应信息比特的索引，其顺序与信息比特的索引顺序相反，即索引0对应最后1位信息比特，索引1对应倒数第2位信息比特等。
另外，本申请实施例中所涉及的交织序列，基于交织序列的最小索引为0。若实际使用的交织序列的最小索引为1，则可对本申请的方法进行简单的调整，本申请中的所有示例均从索引0开始，实际运用中如以索引1开始，则相应索引均加1即可。
图3为本申请提供的一种编码方法实施例的流程图，如图3所示，本实施例的执行主体为发送端(编码端)，本实施例的方法可以包括：
S101、发送端对A个待编码信息比特进行CRC编码，得到第一比特序列，第一比特序列包括L个CRC比特和A个信息比特，L、A为正整数。
具体地，发送端接收到A个待编码信息比特后，添加L个CRC比特，得到第一比特序列。
S102、发送端对第一比特序列进行交织操作，得到第二比特序列。
其中，交织操作所采用的交织序列有两种，第一交织序列和第二交织序列，不同的交织序列对应不同的交织操作，第一交织序列根据系统所支持的最长交织序列和预设规则得到，第一交织序列的长度等于A+L。第二交织序列为最长交织序列，第二交织序列的长度等于K max+L，K max为最长交织序列对应的最大信息比特数目。系统所支持的最长交织序列下文中简称最长交织序列。
其中，系统所支持的最长交织序列可以是预先存储的，也可以通过在线计算的方式得到。
第一交织序列有两种读取的方式，分别对应两种预设规则。
方式一中，预设规则为：从最长交织序列中按照索引的先后顺序取出所有索引大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成第一交织序列。例如，最长交织序列为{2,3,5,9,10,12,4,6,11,13,0,7,14,1,8,15}，该最长交织序列对应的最大信息比特数目K max＝12，L＝4，A＝10，K max-A＝2，首先从该最长交织序列中按照索引的先后顺序取出所有索引大于或等于2的索引，为{2,3,5,9,10,12,4,6,11,13,7,14,8,15}，将取出的所有索引分别减去2，组成的第一交织序列为{0,1,3,7,8,10,2,4,9,11,5,12,6,13}。
相应的，发送端对第一比特序列进行交织操作，具体可以为：发送端采用第一交织序列对第一比特序列进行交织操作，得到第二比特序列。
上述方式一中最长交织序列为正序编号。
方式二中，预设规则为：从最长交织序列中按照索引的先后顺序取出所有索引小于A和索引大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成第一交织序列。例如：最长交织序列为{1,2,6,8,9,12,0,5,7,13,4,11,14,3,10,15}，该最长交织序列对应的最大信息比特数目K max＝12，L＝4，A＝10，K max-A＝2，首先从该最长交织序列中按照索引的先后顺序取出所有索引小于10和索引大于或等于12的索引，为{1,2,6,8,9,12,0,5,7,13,4,14,3,15}，对取出的索引中大于或等于12的索引减去2，组成的第一交织序列为{1,2,6,8,9,10,0,5,7,11,4,12,3,13}。
相应的，发送端对第一比特序列进行交织操作，具体可以为：发送端将第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列，逆序排列也称倒序排列，例如第一比特序列为{0,1,2,3,4,5,6,7,8,9,10,11,12,13,14}，{0,1,2,3,4,5,6,7,8,9,10}为信息比特，{11,12,13,14}为CRC比特，将信息比特逆序排列后为{10,9,8,7,6,5,4,3,2,1,0}，得到的 第三比特序列为{10,9,8,7,6,5,4,3,2,1,0,11,12,13,14}。接着发送端采用第一交织序列对第三比特序列进行交织操作，得到第二比特序列。
上述方式二中最长交织序列为反序编号。
第二交织序列可直接使用最长交织序列，相应的，发送端对第一比特序列进行交织操作，具体可以为：
发送端将第一比特序列扩展为包含K max+L个比特的第四比特序列，第四比特序列中前K max-A个比特的值设置为空，剩下的比特从K max-A+1个比特开始依次对应第一比特序列中的比特。
例如，K max＝12，L＝4，A＝10，K max-A＝2，发送端将第一比特序列(包含4个CRC比特和10个信息比特)扩展为包含12+4＝16个特的第四比特序列，第四比特序列中前2个比特的值设置为空，剩下的比特从第3个比特开始依次对应第一比特序列中的比特。
发送端采用最长交织序列对第四比特序列进行交织操作，得到第五比特序列。
发送端从第五比特序列中去掉值为空的比特，得到第二比特序列。
采用第二交织序列进行交织操作时，交织前需要对第一比特序列进行扩展，交织后需要将交织后的比特序列中值为空的比特去掉，交织操作时延较长；与采用第二交织序列进行交织操作相比，当采用第一交织序列进行交织操作时，根据最长交织序列和预设规则得到第一交织序列的操作可以并行处理，得到第一交织序列后，采用第一交织序列进行交织操作可以直接得到第二比特序列，因此可降低时延，从而降低编码时延。
该方式中最长交织序列为正序编号。
S103、发送端对第二比特序列进行极化编码。
其中，发送端对第二比特序列进行极化编码的编码方法可采用现有的极化编码方法，此处不再赘述。
本实施例提供的编码方法，通过发送端对A个待编码信息比特进行CRC编码，得到第一比特序列，接着对第一比特序列进行交织操作，得到第二比特序列，其中交织操作所采用的第一交织序列根据最长交织序列和预设规则获取，第一交织序列长度与待编码信息比特数量对应，或者，交织操作所采用的第二交织序列直接为最长交织序列，最后对第二比特序列进行极化编码。从而实现了在分布式CRC编码中，当信息比特数量小于最大信息比特数量时，根据系统所支持的最长交织序列得到完成交织过程所需要的交织序列。
下面采用几个具体的实施例，对图3所示方法实施例的技术方案进行详细说明。
图4为本申请提供的一种编码方法流程示意图，本实施例中以交织操作所采用的交织序列为根据方式一的预设规则获取的第一交织序列为例进行说明，分布式CRC编码的最长交织序列为正序编号的序列π1，交织序列π1对应的最大信息比特长度为K max，CRC多项式为g，CRC比特的个数为L，也称CRC长度为L。假设A个待编码信息比特为{a 0，a 1，…，a A-1}，信息比特数目A≤K max。本实施例的执行主体为发送端(编码端)，结合图4所示，本实施例的方法包括：
S201、对A个待编码信息比特进行CRC编码，得到第一比特序列{b 0，b 1,…,b A+L-1}。
其中，{b 0，b 1,…,b A-1}为A个信息比特，{b A，b A+1,…,b A+L-1}为L个CRC比特。
S202、从最长交织序列中按照索引的先后顺序取出所有索引大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成第一交织序列π1'。
以图4所示为例，最长交织序列π1为{2,3,5,9,10,12,4,6,11,13,0,7,14,1,8,15}，L＝4，A＝10，则该最长交织序列对应的最大信息比特数目K max＝12，K max-A＝2，首先从π1中按照索引的先后 顺序取出所有索引大于或等于2的索引，取出部分为{2,3,5,9,10,12,4,6,11,13,7,14,8,15}，将取出的所有索引分别减去2，组成的第一交织序列π1'为{0,1,3,7,8,10,2,4,9,11,5,12,6,13}。
S203、采用第一交织序列π1'对第一比特序列{b 0，b 1,…,b A+L-1}进行交织操作，得到第二比特序列{c 0，c 1,…,c A+L-1}。
具体地，图4所示的第一比特序列为{b 0，b 1,…,b 13}，采用第一交织序列π1'{0,1,3,7,8,10,2,4,9,11,5,12,6,13}对第一比特序列{b 0，b 1，b 2，b 3，b 4，b 5，b 6，b 7，b 8，b 9，b 10，b 11，b 12，b 13}进行交织操作后，
S204、对第二比特序列进行极化编码。
本实施例中，如下表一中所示，对于表一中的交织序列，针对不同的CRC长度L和不同的最大信息比特数目K max，提供了不同的CRC多项式以及对应的正序编号交织序列。
表一
Figure PCTCN2018086329-appb-000010
Figure PCTCN2018086329-appb-000011
Figure PCTCN2018086329-appb-000012
Figure PCTCN2018086329-appb-000013
Figure PCTCN2018086329-appb-000014
Figure PCTCN2018086329-appb-000015
以L＝19，多项式为0xA2B79，交织序列π1＝{0,1,2,5,6,7,10,11,13,14,18,19,20,22,23,24,26,31,33,35,37,39,42,44,45,47,51,52,55,56,57,58,60,61,62,64,67,69,70,72,73,76,85,86,89,90,93,94,100,103,104,105,107,109,110,112,113,125,127,128,129,130,131,133,134,137,140,144,145,148,149,152,159,161,162,163,166,169,173,175,178,182,183,186,187,189,195,196,197,200,3,8,12,15,21,25,27,32,34,36,38,40,43,46,48,53,59,63,65,68,71,74,77,87,91,95,101,106,108,111,114,126,132,135,138,141,146,150,153,160,164,167,170,174,176,179,184,188,190,198,201,4,9,16,28,41,49,54,66,75,78,88,92,96, 102,115,136,139,142,147,151,154,165,168,171,177,180,185,191,199,202,17,29,50,79,97,116,143,155,172,181,192,203,30,80,98,117,156,193,204,81,99,118,157,194,205,82,119,158,206,83,120,207,84,121,208,122,209,123,210,124,211,212,213,214,215,216,217,218}为例。例如，当前信息比特序列的长度A＝64，则CRC编码之后的比特序列为{b 0，b 1，...，b 82}。从交织序列π1中，按照S202取出当前所需的交织序列π1'＝{1,4,8,9,12,13,16,23,25,26,27,30,33,37,39,42,46,47,50,51,53,59,60,61,64,2,5,10,14,17,24,28,31,34,38,40,43,48,52,54,62,65,0,3,6,11,15,18,29,32,35,41,44,49,55,63,66,7,19,36,45,56,67,20,57,68,21,58,69,22,70,71,72,73,74,75,76,77,78,79,80,81,82}，根据S203对序列{b 0，b 1，...，b 82}进行交织，得到{c 0，c 1,…,c 82}＝{b 1,b 4,b 8,b 9,b 12,b 13,b 16,b 23,b 25,b 26,b 27,b 30,b 33,b 37,b 39,b 42,b 46,b 47,b 50,b 51,b 53,b 59,b 60,b 61,b 64,b 2,b 5,b 10,b 14,b 17,b 24,b 28,b 31,b 34,b 38,b 40,b 43,b 48,b 52,b 54,b 62,b 65,b 0,b 3,b 6,b 11,b 15,b 18,b 29,b 32,b 35,b 41,b 44,b 49,b 55,b 63,b 66,b 7,b 19,b 36,b 45,b 56,b 67,b 20,b 57,b 68,b 21,b 58,b 69,b 22,b 70,b 71,b 72,b 73,b 74,b 75,b 76,b 77,b 78,b 79,b 80,b 81,b 82}。
表一中，K max＝200、L＝19、CRC多项式为0xA2B79对应六个正序编号交织序列，第一、三、五个交织序列应用于低码率极化码时具有更好的早停的效果；第二、四、六个交织序列应用于高码率极化码时具有更好的早停的效果；第一、二个交织序列应用于极化码SC译码时具有更好的早停的效果；第三、四个交织序列应用于长码长极化码时具有更好的早停的效果；第五、六个交织序列应用于短码长极化码时具有更好的早停的效果。
K max＝200、L＝20、CRC多项式为0x191513对应两个正序编号交织序列，第一个交织序列应用于低码率极化码时具有更好的早停的效果；第二个交织序列应用于高码率极化码时具有更好的早停的效果。
K max＝200、L＝21、CRC多项式为0x2E2A69对应两个正序编号交织序列，第一个交织序列应用于低码率极化码时具有更好的早停的效果；第二个交织序列应用于高码率极化码时具有更好的早停的效果。
K max＝200、L＝22、CRC多项式为0x552A55对应两个正序编号交织序列，第一个交织序列应用于低码率极化码时具有更好的早停的效果；第二个交织序列应用于高码率极化码时具有更好的早停的效果。
K max＝200、L＝23、CRC多项式为0x86F4A1对应两个正序编号交织序列，第一个交织序列应用于低码率极化码时具有更好的早停的效果；第二个交织序列应用于高码率极化码时具有更好的早停的效果。
K max＝200、L＝24、CRC多项式为0x1D11A9B对应两个正序编号交织序列，第一个交织序列应用于低码率极化码时具有更好的早停的效果；第二个交织序列应用于高码率极化码时具有更好的早停的效果。
K max＝1000、L＝11、CRC多项式为0x8D7对应两个正序编号交织序列，第一个交织序列应用于低码率极化码时具有更好的早停的效果；第二个交织序列应用于高码率极化码时具有更好的早停的效果。
K max＝22、L＝3、CRC多项式为0xD对应四个正序编号交织序列，第一个交织序列应用于编码码长为32的极化码时具有更好的早停的效果；第二个交织序列应用于编码码长为64的极化码时具有更好的早停的效果；第三个交织序列应用于编码码长为128的极化码时具有更好的早停的效果；第四个交织序列应用于编码码长为256的极化码时具有更好的早停的效果。
需要说明的是，表一和下文表二中的CRC多项式采用比特反序和显示+1的十六进制表示，以多项式0xA2B79为例，对应二进制多项式为(1,0,0,1,1,1,1,0,1,1,0,1,0,1,0,0,0,1,0,1)，对应多项 式D^19+D^16+D^15+D^14+D^13+D^11+D^10+D^8+D^6+D^2+1。
图5为本申请提供的一种编码方法流程示意图，本实施例中以交织操作所采用的交织序列为根据方式二的预设规则获取的第一交织序列为例进行说明，分布式CRC编码的最长交织序列为反序编号的序列π2，π2对应的最大信息比特长度为K max，CRC多项式为g，CRC比特的个数为L，也称CRC长度为L。假设A个待编码信息比特为{a 0，a 1，…，a A-1}，信息比特数目A≤K max。本实施例的执行主体为发送端(编码端)，结合图5所示，本实施例的方法包括：
S301、对A个待编码信息比特进行CRC编码，得到第一比特序列{b 0，b 1,…,b A+L-1}。
其中，{b 0，b 1,…,b A-1}为A个信息比特，{b A，b A+1,…,b A+L-1}为L个CRC比特。
S302、从最长交织序列π2中按照索引的先后顺序取出所有索引小于A和索引大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成第一交织序列π2'。
以图5所示为例，最长交织序列π2为{1,2,6,8,9,12,0,5,7,13,4,11,14,3,10,15}，L＝4，A＝10，则该最长交织序列对应的最大信息比特数目K max＝12，K max-A＝2，首先从π2中按照索引的先后顺序取出所有索引小于10和索引大于或等于12的索引，取出部分为{1,2,6,8,9,12,0,5,7,13,4,14,3,15}，将取出的索引中大于或等于12的索引减去2，组成的第一交织序列π2'为{1,2,6,8,9,10,0,5,7,11,4,12,3,13}。
S303、将第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列。
具体地，将第一比特序列{b 0，b 1,…,b A+L-1}中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列{b 0',b 1',...,b A+L-1'}，其中，当k＝0，1，…，A-1，b k'＝b A-1-k；当k＝A,A+1,…,A+L-1，b k'＝b k。
S304、采用第一交织序列π2'对第三比特序列{b 0',b 1',...,b A+L-1'}进行交织操作，得到第二比特序列。
具体地，图4所示的第一比特序列为{b 0，b 1,…,b 13}，将第一比特序列{b 0，b 1,…,b 13}中的10个信息比特按照信息比特的索引逆序排列，得到第三比特序列{b 9，b 8,b 7，b 6，b 5，b 4，b 3，b 2，b 1，b 10，b 11，b 12,b 13}，采用第一交织序列π2'{1,2,6,8,9,10,0,5,7,11,4,12,3,13}对第三比特序列{b 9，b 8,b 7，b 6，b 5，b 4，b 3，b 2，b 1，b 10，b 11，b 12,b 13}进行交织操作后，得到的第二比特序列为{b 8，b 7，b 3，b 1，b 0，b 10，b 9，b 4，b 2，b 11，b 5，b 12，b 6，b 13}。
S305、对第二比特序列进行极化编码。
本实施例中，如下表二中所示，对于表二中的交织序列，针对不同的CRC长度L和不同的最大信息比特数目K max，提供了不同的CRC多项式以及对应的反序编号交织序列。
表二
Figure PCTCN2018086329-appb-000016
Figure PCTCN2018086329-appb-000017
Figure PCTCN2018086329-appb-000018
Figure PCTCN2018086329-appb-000019
Figure PCTCN2018086329-appb-000020
Figure PCTCN2018086329-appb-000021
以L＝19，多项式为0xA2B79，交织序列π2＝{2,3,4,10,12,13,16,17,21,24,26,30,33,36,37,38,40,47,50,51,54,55,59,62,65,66,68,69,70,71,72,74,86,87,89,90,92,94,95,96,99,105,106,109,110,113,114,123,126,127,129,130,132,135,137,138,139,141,142,143,144, 147,148,152,154,155,157,160,162,164,166,168,173,175,176,177,179,180,181,185,186,188,189,192,193,194,197,198,199,200,1,9,11,15,20,23,25,29,32,35,39,46,49,53,58,61,64,67,73,85,88,91,93,98,104,108,112,122,125,128,131,134,136,140,146,151,153,156,159,161,163,165,167,172,174,178,184,187,191,196,201,0,8,14,19,22,28,31,34,45,48,52,57,60,63,84,97,103,107,111,121,124,133,145,150,158,171,183,190,195,202,7,18,27,44,56,83,102,120,149,170,182,203,6,43,82,101,119,169,204,5,42,81,100,118,205,41,80,117,206,79,116,207,78,115,208,77,209,76,210,75,211,212,213,214,215,216,217,218}为例。例如，当前信息比特序列的长度A＝64，则CRC编码之后的比特序列为{b 0，b 1，...，b 82}。从交织序列π2中，按照S302取出当前所需交织序列π2'＝{2,3,4,10,12,13,16,17,21,24,26,30,33,36,37,38,40,47,50,51,54,55,59,62,64,1,9,11,15,20,23,25,29,32,35,39,46,49,53,58,61,65,0,8,14,19,22,28,31,34,45,48,52,57,60,63,66,7,18,27,44,56,67,6,43,68,5,42,69,41,70,71,72,73,74,75,76,77,78,79,80,81,82}，并根据S303和S304对序列{b 0，b 1，...，b 82}进行交织，得到{c 0，c 1,…,c 82}＝{b 61,b 60,b 59,b 53,b 51,b 50,b 47,b 46,b 42,b 39,b 37,b 33,b 30,b 27,b 26,b 25,b 23,b 16,b 13,b 12,b 9,b 8,b 4,b 1,b 64,b 62,b 54,b 52,b 48,b 43,b 40,b 38,b 34,b 31,b 28,b 24,b 17,b 14,b 10,b 5,b 2,b 65,b 63,b 55,b 49,b 44,b 41,b 35,b 32,b 29,b 18,b 15,b 11,b 6,b 3,b 0,b 66,b 56,b 45,b 36,b 19,b 7,b 67,b 57,b 20,b 68,b 58,b 21,b 69,b 22,b 70,b 71,b 72,b 73,b 74,b 75,b 76,b 77,b 78,b 79,b 80,b 81,b 82}。
表一中，K max＝200、L＝19、CRC多项式为0xA2B79对应六个反序编号交织序列，第一、三、五个交织序列应用于高码率极化码时具有更好的早停的效果；第二、四、六个交织序列应用于低码率极化码时具有更好的早停的效果；第一、二个交织序列应用于极化码SC译码时具有更好的早停的效果；第三、四个交织序列应用于长码长极化码时具有更好的早停的效果；第五、六个交织序列应用于短码长极化码时具有更好的早停的效果，例如，长码长是指大于512的码长，短码长是指小于512的码长。
K max＝200、L＝20、CRC多项式为0x191513对应两个反序编号交织序列，第一个交织序列应用于高码率极化码时具有更好的早停的效果；第二个交织序列应用于低码率极化码时具有更好的早停的效果。
K max＝200、L＝21、CRC多项式为0x2E2A6对应两个反序编号交织序列，第一个交织序列应用于高码率极化码时具有更好的早停的效果；第二个交织序列应用于低码率极化码时具有更好的早停的效果。
K max＝200、L＝22、CRC多项式为0x552A55对应两个反序编号交织序列，第一个交织序列应用于高码率极化码时具有更好的早停的效果；第二个交织序列应用于低码率极化码时具有更好的早停的效果。
K max＝200、L＝23、CRC多项式为0x86F4A1对应两个反序编号交织序列，第一个交织序列应用于高码率极化码时具有更好的早停的效果；第二个交织序列应用于低码率极化码时具有更好的早停的效果。
K max＝200、L＝24、CRC多项式为0x1D11A9B对应两个反序编号交织序列，第一个交织序列应用于高码率极化码时具有更好的早停的效果；第二个交织序列应用于低码率极化码时具有更好的早停的效果。
K max＝1000、L＝11、CRC多项式为0x8D7对应两个反序编号交织序列，第一个交织序列应用于高码率极化码时具有更好的早停的效果；第二个交织序列应用于低码率极化码时具有更好的早停的效果。
K max＝22、L＝3、CRC多项式为0xD对应四个反序编号交织序列，第一个交织序列应用于编码码长为32的极化码时具有更好的早停的效果；第二个交织序列应用于编码码长为64的极化码时具有更好的早停的效果；第三个交织序列应用于编码码长为128的极化码时具有更好的早停的效果；第四个交织序列应用于编码码长为256的极化码时具有更好的早停的效果。
图6为本申请提供的一种编码方法流程示意图，本实施例中以交织操作所采用的交织序列为最长交织序列为例进行说明，分布式CRC编码的最长交织序列为正序编号的序列π3，π3对应的最大信息比特长度为K max，CRC多项式为g，CRC比特的个数为L，也称CRC长度为L。假设A个待编码信息比特为{a 0，a 1，…，a A-1}，信息比特数目A≤K max。本实施例的执行主体为发送端(编码端)，结合图6所示，本实施例的方法包括：
S401、对A个待编码信息比特进行CRC编码，得到第一比特序列{b 0，b 1,…,b A+L-1}。
其中，{b 0，b 1,…,b A-1}为A个信息比特，{b A，b A+1,…,b A+L-1}为L个CRC比特。
S402、将第一比特序列{b 0，b 1,…,b A+L-1}扩展为包含K max+L个比特的第四比特序列{c 0,c 1,...,c Kmax+L-1}，第四比特序列中前K max-A个比特的值设置为空NULL，剩下的比特从K max-A+1个比特开始依次对应第一比特序列中的比特。
具体地，对第一比特序列{b 0，b 1,…,b A+L-1}进行扩展，得到第四比特序列{c 0,c 1,...,c Kmax+L-1}，其中，当k＝0,1,…,K max-A-1，c k＝NULL；当k＝K max-A,K max-A+1,…,K max+L-1，c k＝b (k-(Kmax-A))。
以图6所示为例，图6所示的第一比特序列为{b 0，b 1,…,b 13}，得到的第四比特序列为{NULL，NULL,b 0，b 1,…,b 13}。
S403、采用最长交织序列π3对第四比特序列{c 0,c 1,...,c Kmax+L-1}进行交织操作，得到第五比特序列{d 0,d 1,...,d Kmax+L-1}。
以图6所示为例，π3为{2，3,5,9,10,12,4,6,11,13,0,7,14,1,8,15}，采用π3对图6所示的第四比特序列{NULL，NULL,b 0，b 1,…,b 13}进行交织操作，得到第五比特序列为{b 0，b 1,b 3，b 7,b 8，b 10,b 2，b 4,b 9，b 11,NULL，b 5，b 12,NULL,b 6，b 13}。
S404、从第五比特序列{d 0,d 1,...,d Kmax+L-1}中去掉值为NULL的比特，得到第二比特序列{e 0，e 1,…,e A+L-1}。
以图6所示为例，从第五比特序列{b 0，b 1,b 3，b 7,b 8，b 10,b 2，b 4,b 9，b 11,NULL，b 5，b 12,NULL,b 6，b 13}中去掉值为NULL的比特，得到第二比特序列e n为{b 0，b 1,b 3，b 7,b 8，b 10,b 2，b 4,b 9，b 11,b 5，b 12,b 6，b 13}。
S405、对第二比特序列进行极化编码。
本实施例中，如上文中表一中所示，对于表一中的交织序列，针对不同的CRC长度L和不同的最大信息比特数目K max，提供了不同的CRC多项式以及对应的正序编号交织序列。详细可参见表一所示。不同的交织序列适用的场景也是相同的，详细可参见关于表一中各序列的描述，此处不再赘述。
以L＝19，多项式为0xA2B79，交织序列π3＝{0,1,2,5,6,7,10,11,13,14,18,19,20,22,23,24,26,31,33,35,37,39,42,44,45,47,51,52,55,56,57,58,60,61,62,64,67,69,70,72,73,76,85,86,89,90,93,94,100,103,104,105,107,109,110,112,113,125,127,128,129,130,131,133,134,137,140,144,145,148,149,152,159,161,162,163,166,169,173,175,178,182,183,186,187,189,195,196,197,200,3,8,12,15,21,25,27,32,34,36,38,40,43,46,48,53,59,63,65,68,71,74,77,87,91,95,101,106,108,111,114,126,132,135,138,141,146,150,153,160,164,167,170,174,176,179,184,188,190,198,201,4,9,16,28,41,49,54,66,75,78,88,92,96,102,115,136,139,142,147,151,154,165,168,171,177,180,185,191,199,202,17,29,50,79, 97,116,143,155,172,181,192,203,30,80,98,117,156,193,204,81,99,118,157,194,205,82,119,158,206,83,120,207,84,121,208,122,209,123,210,124,211,212,213,214,215,216,217,218}为例。例如，当前信息比特序列的长度A＝64，则CRC编码之后的比特序列为{b 0，b 1，...，b 82}。根据S402，先得到序列{c 0,c 1,...,c Kmax+L-1}＝{NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,b 0,b 1,b 2,b 3,b 4,b 5,b 6,b 7,b 8,b 9,b 10,b 11,b 12,b 13,b 14,b 15,b 16,b 17,b 18,b 19,b 20,b 21,b 22,b 23,b 24,b 25,b 26,b 27,b 28,b 29,b 30,b 31,b 32,b 33,b 34,b 35,b 36,b 37,b 38,b 39,b 40,b 41,b 42,b 43,b 44,b 45,b 46,b 47,b 48,b 49,b 50,b 51,b 52,b 53,b 54,b 55,b 56,b 57,b 58,b 59,b 60,b 61,b 62,b 63,b 64,b 65,b 66,b 67,b 68,b 69,b 70,b 71,b 72,b 73,b 74,b 75,b 76,b 77,b 78,b 79,b 80,b 81,b 82}；根据S403以及交织序列π3，对{c 0,c 1,...,c Kmax+L-1}进行交织，得到{d 0,d 1,...,d Kmax+L-1}＝{NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,b 1,b 4,b 8,b 9,b 12,b 13,b 16,b 23,b 25,b 26,b 27,b 30,b 33,b 37,b 39,b 42,b 46,b 47,b 50,b 51,b 53,b 59,b 60,b 61,b 64,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,b 2,b 5,b 10,b 14,b 17,b 24,b 28,b 31,b 34,b 38,b 40,b 43,b 48,b 52,b 54,b 62,b 65,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,b 0,b 3,b 6,b 11,b 15,b 18,b 29,b 32,b 35,b 41,b 44,b 49,b 55,b 63,b 66,NULL,NULL,NULL,NULL,NULL,NULL,b 7,b 19,b 36,b 45,b 56,b 67,NULL,NULL,NULL,NULL,b 20,b 57,b 68,NULL,NULL,NULL,b 21,b 58,b 69,NULL,NULL,b 22,b 70,NULL,NULL,b 71,NULL,NULL,b 72,NULL,b 73,NULL,b 74,NULL,b 75,b 76,b 77,b 78,b 79,b 80,b 81,b 82}；根据S404，去除{d 0,d 1,...,d Kmax+L-1}中的NULL比特，得到序列{e 0，e 1,…,e A+L-1}＝{b 1,b 4,b 8,b 9,b 12,b 13,b 16,b 23,b 25,b 26,b 27,b 30,b 33,b 37,b 39,b 42,b 46,b 47,b 50,b 51,b 53,b 59,b 60,b 61,b 64,b 2,b 5,b 10,b 14,b 17,b 24,b 28,b 31,b 34,b 38,b 40,b 43,b 48,b 52,b 54,b 62,b 65,b 0,b 3,b 6,b 11,b 15,b 18,b 29,b 32,b 35,b 41,b 44,b 49,b 55,b 63,b 66,b 7,b 19,b 36,b 45,b 56,b 67,b 20,b 57,b 68,b 21,b 58,b 69,b 22,b 70,b 71,b 72,b 73,b 74,b 75,b 76,b 77,b 78,b 79,b 80,b 81,b 82}。
需要说明的是，接收端(译码侧)接收到待译码信息比特后，要进行解交织操作，解交织时获取交织序列的过程与发送端(编码侧)是一致的，详细可参见编码端的描述，此处不 再赘述。
本申请可以根据上述方法示例对发送端进行功能模块的划分，例如，可以对应各个功能划分各个功能模块，也可以将两个或两个以上的功能集成在一个处理模块中。上述集成的模块既可以采用硬件的形式实现，也可以采用软件功能模块的形式实现。需要说明的是，本申请各实施例中对模块的划分是示意性的，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式。
图7为本申请提供的一种编码装置实施例的结构示意图，如图7所示，本实施例的装置可以包括：第一编码模块11、交织模块12和第二编码模块13，第一编码模块11用于对A个待编码信息比特进行循环冗余校验CRC编码，得到第一比特序列，所述第一比特序列包括L个CRC比特和A个信息比特，L、A为正整数。交织模块12用于对所述第一比特序列进行交织操作，得到第二比特序列，其中，所述交织操作采用的第一交织序列根据系统所支持的最长交织序列和预设规则得到，所述第一交织序列的长度等于A+L，或者，所述交织操作采用的第二交织序列为所述最长交织序列，所述第二交织序列的长度等于K max+L，K max为所述最长交织序列对应的最大信息比特数目。第二编码模块13用于对所述第二比特序列进行极化编码。
可选的，预设规则为：从所述最长交织序列中按照索引的先后顺序取出所有索引大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成所述第一交织序列。所述交织模块12用于：采用所述第一交织序列对所述第一比特序列进行交织操作，得到所述第二比特序列。其中，最长交织序列为上文表一中的任一个序列。
可选的，预设规则为：从所述最长交织序列中按照索引的先后顺序取出所有索引小于A和索引大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成所述第一交织序列。所述交织模块12用于：将所述第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列，采用所述第一交织序列对所述第三比特序列进行交织操作，得到所述第二比特序列。其中，最长交织序列为上文表二中的任一个序列。
可选的，交织操作采用的第二交织序列为所述最长交织序列时，所述交织模块12用于：将所述第一比特序列扩展为包含K max+L个比特的第四比特序列，所述第四比特序列中前K max-A个比特的值设置为空，剩下的比特从第K max-A+1个比特开始依次对应所述第一比特序列中的比特，采用所述最长交织序列对所述第四比特序列进行交织操作，得到第五比特序列，从所述第五比特序列中去掉值为空的比特，得到所述第二比特序列。其中，最长交织序列为上文表一中的任一个序列。
本实施例的装置，可以用于执行图3所示方法实施例的技术方案，其实现原理和技术效果类似，此处不再赘述。
图8为本申请提供的一种编码实体装置示意图，该装置1100包括：
存储器1101，用于存储程序指令，该存储器还可以是flash(闪存)。
处理器1102，用于调用并执行存储器中的程序指令，以实现图3所示的编码方法中的各个步骤。具体可以参见前面方法实施例中的相关描述。
可选地，存储器1101既可以是独立的，也可以如图9所示，图9为本申请提供的一种编码实体装置示意图，存储器1101跟处理器1102集成在一起。
该装置可以用于执行上述方法实施例中发送端对应的各个步骤和/或流程。
本申请还提供一种可读存储介质，可读存储介质和计算机程序，所述计算机程序用于实现上述的各种实施方式提供的编码方法。
本申请还提供一种程序产品，该程序产品包括计算机程序，该计算机程序存储在可读存 储介质中。编码装置的至少一个处理器可以从可读存储介质读取该计算机程序，至少一个处理器执行该计算机程序使得编码装置实施上述的各种实施方式提供的编码方法。
本领域普通技术人员可以理解：在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘Solid State Disk(SSD))等。

Claims (32)

  1. 一种编码方法，其特征在于，包括：
    对A个待编码信息比特进行循环冗余校验CRC编码，得到第一比特序列，所述第一比特序列包括L个CRC比特和A个信息比特，L、A为正整数；
    对所述第一比特序列进行交织操作，得到第二比特序列；
    其中，所述交织操作采用的第一交织序列根据系统所支持的最长交织序列和预设规则得到，所述第一交织序列的长度等于A+L，或者，所述交织操作采用的第二交织序列为所述最长交织序列，所述第二交织序列的长度等于K max+L，K max为所述最长交织序列对应的最大信息比特数目；
    对所述第二比特序列进行极化编码。
  2. 根据权利要求1所述的方法，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成所述第一交织序列；
    所述对所述第一比特序列进行交织操作，包括：
    采用所述第一交织序列对所述第一比特序列进行交织操作，得到所述第二比特序列。
  3. 根据权利要求1所述的方法，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有小于A的索引和大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成所述第一交织序列；
    所述对所述第一比特序列进行交织操作，包括：
    将所述第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列；
    采用所述第一交织序列对所述第三比特序列进行交织操作，得到所述第二比特序列。
  4. 根据权利要求1所述的方法，其特征在于，所述交织操作采用的第二交织序列为所述最长交织序列时，所述对所述第一比特序列进行交织操作，包括：
    将所述第一比特序列扩展为包含K max+L个比特的第四比特序列，所述第四比特序列中前K max-A个比特的值设置为空，剩下的比特从第K max-A+1个比特开始依次对应所述第一比特序列中的比特；
    采用所述最长交织序列对所述第四比特序列进行交织操作，得到第五比特序列；
    从所述第五比特序列中去掉值为空的比特，得到所述第二比特序列。
  5. 根据权利要求1、2和4中任一项所述的方法，其特征在于，所述最长交织序列为说明书中表一中的任一个序列。
  6. 根据权利要求1或3所述的方法，其特征在于，所述最长交织序列为说明书中表二中的任一个序列。
  7. 一种编码装置，其特征在于，包括：
    第一编码模块，用于对A个待编码信息比特进行循环冗余校验CRC编码，得到第一比特序列，所述第一比特序列包括L个CRC比特和A个信息比特，L、A为正整数；
    交织模块，用于对所述第一比特序列进行交织操作，得到第二比特序列；
    其中，所述交织操作采用的第一交织序列根据系统所支持的最长交织序列和预设规则得到，所述第一交织序列的长度等于A+L，或者，所述交织操作采用的第二交织序列为所 述最长交织序列，所述第二交织序列的长度等于K max+L，K max为所述最长交织序列对应的最大信息比特数目；
    第二编码模块，用于对所述第二比特序列进行极化编码。
  8. 根据权利要求7所述的装置，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成所述第一交织序列；
    所述交织模块用于：
    采用所述第一交织序列对所述第一比特序列进行交织操作，得到所述第二比特序列。
  9. 根据权利要求7所述的装置，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有小于A的索引和大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成所述第一交织序列；
    所述交织模块用于：
    将所述第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列；
    采用所述第一交织序列对所述第三比特序列进行交织操作，得到所述第二比特序列。
  10. 根据权利要求7所述的装置，其特征在于，所述交织操作采用的第二交织序列为所述最长交织序列时，所述交织模块用于：
    将所述第一比特序列扩展为包含K max+L个比特的第四比特序列，所述第四比特序列中前K max-A个比特的值设置为空，剩下的比特从第K max-A+1个比特开始依次对应所述第一比特序列中的比特；
    采用所述最长交织序列对所述第四比特序列进行交织操作，得到第五比特序列；
    从所述第五比特序列中去掉值为空的比特，得到所述第二比特序列。
  11. 根据权利要求7、8和10中任一项所述的装置，其特征在于，所述最长交织序列为说明书中表一中的任一个序列。
  12. 根据权利要求7或9所述的装置，其特征在于，所述最长交织序列为说明书中表二中的任一个序列。
  13. 一种编码装置，其特征在于，包括：存储器和处理器；
    所述存储器用于存储程序指令；
    所述处理器用于：对A个待编码信息比特进行循环冗余校验CRC编码，得到第一比特序列，所述第一比特序列包括L个CRC比特和A个信息比特，L、A为正整数；
    对所述第一比特序列进行交织操作，得到第二比特序列；
    其中，所述交织操作采用的第一交织序列根据系统所支持的最长交织序列和预设规则得到，所述第一交织序列的长度等于A+L，或者，所述交织操作采用的第二交织序列为所述最长交织序列，所述第二交织序列的长度等于K max+L，K max为所述最长交织序列对应的最大信息比特数目；
    对所述第二比特序列进行极化编码。
  14. 根据权利要求13所述的装置，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成所述第一交织序列；
    所述处理器用于：
    采用所述第一交织序列对所述第一比特序列进行交织操作，得到所述第二比特序列。
  15. 根据权利要求13所述的装置，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有小于A的索引和索引大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成所述第一交织序列；
    所述处理器用于：
    将所述第一比特序列中的A个信息比特按照信息比特的索引逆序排列，得到第三比特序列；
    采用所述第一交织序列对所述第三比特序列进行交织操作，得到所述第二比特序列。
  16. 根据权利要求13所述的装置，其特征在于，所述交织操作采用的第二交织序列为所述最长交织序列时，所述处理器用于：
    将所述第一比特序列扩展为包含K max+L个比特的第四比特序列，所述第四比特序列中前K max-A个比特的值设置为空，剩下的比特从第K max-A+1个比特开始依次对应所述第一比特序列中的比特；
    采用所述最长交织序列对所述第四比特序列进行交织操作，得到第五比特序列；
    从所述第五比特序列中去掉值为空的比特，得到所述第二比特序列。
  17. 根据权利要求13、14和16中任一项所述的装置，其特征在于，所述最长交织序列为说明书中表一中的任一个序列。
  18. 根据权利要求13或15所述的装置，其特征在于，所述最长交织序列为说明书中表二中的任一个序列。
  19. 一种可读存储介质，其特征在于，包括：可读存储介质和计算机程序，所述计算机程序由编码装置执行时实现权利要求1～6任一项所述的编码方法。
  20. 一种程序产品，其特征在于，所述程序产品包括计算机程序，所述计算机程序存储在可读存储介质中，编码装置的至少一个处理器从所述可读存储介质读取并执行所述计算机程序时实施权利要求1～6任一项所述的编码方法。
  21. 一种译码方法，其特征在于，包括：
    接收端接收待译码信息比特，对所述待译码信息比特进行译码及解交织，得到已译码信息比特，其中所述解交织采用第一交织序列或者第二交织序列，其中，所述第一交织序列根据系统所支持的最长交织序列和预设规则得到，所述第一交织序列的长度等于A+L，或者，所述交织操作采用的第二交织序列为所述最长交织序列，所述第二交织序列的长度等于K max+L，K max为所述最长交织序列对应的最大信息比特数目，A为信息比特数目，L为CRC比特，K max为所述最长交织序列对应的最大信息比特数目。
  22. 根据权利要求21所述的方法，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成所述第一交织序列。
  23. 根据权利要求21所述的方法，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有小于A的索引和大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成所述第一交织序列。
  24. 根据权利要求21或22所述的方法，其特征在于，所述最长交织序列为说明书中表 一中的任一个序列。
  25. 根据权利要求21或23所述的方法，其特征在于，所述最长交织序列为说明书中表二中的任一个序列。
  26. 一种译码装置，其特征在于，包括存储器和处理器；
    所述存储器用于存储程序指令；
    所述处理器用于：
    接收待译码信息比特，对所述待译码信息比特进行译码及解交织，得到已译码信息比特，其中所述解交织采用第一交织序列或者第二交织序列，其中，所述第一交织序列根据系统所支持的最长交织序列和预设规则得到，所述第一交织序列的长度等于A+L，或者，所述交织操作采用的第二交织序列为所述最长交织序列，所述第二交织序列的长度等于K max+L，K max为所述最长交织序列对应的最大信息比特数目，A为信息比特数目，L为CRC比特，K max为所述最长交织序列对应的最大信息比特数目。
  27. 根据权利要求26所述的装置，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有大于或等于K max-A的索引，将取出的所有索引分别减去K max-A，组成所述第一交织序列。
  28. 根据权利要求26所述的装置，其特征在于，所述预设规则为：
    从所述最长交织序列中取出所有小于A的索引和大于或等于K max的索引，对取出的索引中大于或等于K max的索引减去K max-A，组成所述第一交织序列。
  29. 根据权利要求26或27所述的装置，其特征在于，所述最长交织序列为说明书中表一中的任一个序列。
  30. 根据权利要求26或28所述的装置，其特征在于，所述最长交织序列为说明书中表二中的任一个序列。
  31. 一种可读存储介质，其特征在于，包括：可读存储介质和计算机程序，所述计算机程序由译码装置执行时实现权利要求21～25任一项所述的译码方法。
  32. 一种程序产品，其特征在于，所述程序产品包括计算机程序，所述计算机程序存储在可读存储介质中，译码装置的至少一个处理器从所述可读存储介质读取并执行所述计算机程序，用于实施权利要求21～25任一项所述的译码方法。
PCT/CN2018/086329 2017-08-07 2018-05-10 编码方法及装置 WO2019029205A1 (zh)

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BR112020002538-0A BR112020002538A2 (pt) 2017-08-07 2018-05-10 método e aparelho de codificação
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CN109495208B (zh) * 2017-09-11 2022-04-29 华为技术有限公司 编码方法及装置
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104219019A (zh) * 2013-05-31 2014-12-17 华为技术有限公司 编码方法及编码设备
US20170155405A1 (en) * 2015-12-01 2017-06-01 Huawei Technologies Co., Ltd. Signature-enabled polar encoder and decoder

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8379738B2 (en) * 2007-03-16 2013-02-19 Samsung Electronics Co., Ltd. Methods and apparatus to improve performance and enable fast decoding of transmissions with multiple code blocks
CN101277165A (zh) * 2007-03-30 2008-10-01 北京三星通信技术研究有限公司 Mimo-mmse-sic-harq通信系统
US8555148B2 (en) * 2007-09-18 2013-10-08 Samsung Electronics Co., Ltd. Methods and apparatus to generate multiple CRCs
CN101286745B (zh) * 2008-05-07 2011-11-30 中兴通讯股份有限公司 一种交织编码方法及装置
CN102739358A (zh) * 2012-06-01 2012-10-17 武汉邮电科学研究院 一种用于LTE的并行Turbo码内交织器的实现方法
CN103825669B (zh) * 2012-11-16 2017-10-24 华为技术有限公司 数据处理的方法和装置
KR101951663B1 (ko) * 2012-12-14 2019-02-25 삼성전자주식회사 Crc 부호와 극 부호에 의한 부호화 방법 및 장치

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104219019A (zh) * 2013-05-31 2014-12-17 华为技术有限公司 编码方法及编码设备
US20170155405A1 (en) * 2015-12-01 2017-06-01 Huawei Technologies Co., Ltd. Signature-enabled polar encoder and decoder

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ERICSSON: "Design of CRC-assisted Polar Code", 3GPP TSG-RAN WG1 #88 RL-1701630, 17 February 2017 (2017-02-17), pages 1 - 7, XP051208797 *

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