WO2020245900A1 - Dispositif à semi-conducteur - Google Patents

Dispositif à semi-conducteur Download PDF

Info

Publication number
WO2020245900A1
WO2020245900A1 PCT/JP2019/022125 JP2019022125W WO2020245900A1 WO 2020245900 A1 WO2020245900 A1 WO 2020245900A1 JP 2019022125 W JP2019022125 W JP 2019022125W WO 2020245900 A1 WO2020245900 A1 WO 2020245900A1
Authority
WO
WIPO (PCT)
Prior art keywords
switching element
voltage
time
timing
turned
Prior art date
Application number
PCT/JP2019/022125
Other languages
English (en)
Japanese (ja)
Inventor
一輝 西村
俊秀 中野
Original Assignee
東芝三菱電機産業システム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東芝三菱電機産業システム株式会社 filed Critical 東芝三菱電機産業システム株式会社
Priority to JP2019562428A priority Critical patent/JPWO2020245900A1/ja
Priority to PCT/JP2019/022125 priority patent/WO2020245900A1/fr
Publication of WO2020245900A1 publication Critical patent/WO2020245900A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present invention relates to a semiconductor device.
  • Patent Document 1 describes a semiconductor device including a semiconductor switching element, a drive circuit for driving the semiconductor switching element, and a snubber circuit for suppressing a surge voltage generated when the semiconductor switching element is switched. Is disclosed.
  • the semiconductor device further includes a voltage detection circuit that detects the voltage across the snubber circuit and a phase detection circuit that detects the movement of the vibration component of the detection signal output by the voltage detection circuit.
  • the phase detection circuit detects the phase of voltage vibration generated by switching from the detection signal output by the voltage detection circuit.
  • the drive circuit is configured to control the timing of the switching operation of the semiconductor switching element so as to be superimposed in the phase opposite to the phase of the vibration component based on the output of the phase detection circuit.
  • the present invention has been made to solve such a problem, and an object of the present invention is the timing of switching a semiconductor switching element so as to attenuate the voltage vibration generated by the switching of the semiconductor switching element with a simple configuration. Is to provide a semiconductor device capable of controlling.
  • the semiconductor device includes a semiconductor switching element, a drive circuit for driving the semiconductor switching element, and a snubber circuit for suppressing a surge voltage generated when the semiconductor switching element is switched.
  • the drive circuit is configured to switch the semiconductor switching element at a timing when a predetermined time elapses from the timing at which the semiconductor switching element is switched.
  • the predetermined time is set based on the timing at which the voltage increases in the voltage vibration generated by the switching of the semiconductor switching element.
  • the present invention it is possible to provide a semiconductor device capable of controlling the timing of switching a semiconductor switching element so as to attenuate the voltage vibration generated by the switching of the semiconductor switching element with a simple configuration.
  • FIG. 1 is a diagram showing a configuration of a semiconductor device according to an embodiment.
  • the semiconductor device includes semiconductor switching elements (hereinafter, also simply referred to as “switching elements”) Q1 and Q2, diodes D1 and D2, a drive circuit 12, and a snubber circuit 14.
  • IGBTs Insulated Gate Bipolar Transistors
  • MOSFETs Metal Oxide Field Effect Transistor
  • It may be an arc-shaped semiconductor switching element.
  • the semiconductor device shown in FIG. 1 is applied to a power converter such as an inverter that converts DC power into AC power and a converter that converts AC power into DC power.
  • the collector C1 is connected to the DC positive bus PL, and the emitter E1 is connected to the collector terminal C2 of the switching element Q2.
  • the emitter E2 of the switching element Q2 is connected to the DC negative bus NL.
  • Diodes D1 and D1 and 2 are connected in antiparallel to each of the switching elements Q1 and Q2, respectively. Each of the diodes D1 and D2 is provided to allow a freewheel current to flow when the corresponding switching element is off.
  • the freewheel diode may be composed of a parasitic diode (body diode).
  • the series circuit 10 of the switching element Q1 and the switching element Q2 constitutes a half-bridge circuit. By connecting two series circuits 10 in parallel with each other between the DC positive bus PL and the DC negative bus NL, a power converter having a full bridge circuit can be configured.
  • the series circuit 10 of the switching elements Q1 and Q2 has an input terminal T1 and T2 and an output terminal T3.
  • the input terminal T1 is connected to the collector C1 of the switching element Q1 and the DC positive bus PL
  • the input terminal T2 is connected to the emitter E2 of the switching element Q2 and the DC negative bus NL.
  • the output terminal T3 is connected to the emitter E1 of the switching element Q1 and the collector C2 of the switching element Q2.
  • a capacitor 11 is connected between the input terminal T1 and the input terminal T2.
  • the capacitor 11 corresponds to one embodiment of the "DC power supply”.
  • the drive circuit 12 is connected to the gate terminals of the switching elements Q1 and Q2.
  • the drive circuit 12 is configured to apply a voltage for switching the switching elements Q1 and Q2 to the gate terminal when receiving a control command from a control device of a power converter (not shown).
  • a voltage for transitioning (turning on) the switching element Q1 to a conductive state (ON state) is applied to the gate terminal of the switching element Q1.
  • the voltage for turning on is set to a voltage higher than the threshold voltage of the switching element Q1.
  • the drive circuit 12 when the drive circuit 12 receives an off command for the switching element Q1 from the control device, the drive circuit 12 applies a voltage for transitioning (turning off) the switching element Q1 to the cutoff state (off state) to the gate terminal of the switching element Q1.
  • the voltage for turning off is set to a voltage lower than the threshold voltage of the switching element Q1.
  • the drive circuit 12 when the drive circuit 12 receives an ON command for the switching element Q2 from the control device, the drive circuit 12 applies a voltage for turning on the switching element Q2 to the gate terminal of the switching element Q2.
  • the drive circuit 12 receives an off command for the switching element Q2 from the control device, the drive circuit 12 applies a voltage for turning off the switching element Q2 to the gate terminal of the switching element Q2.
  • the drive circuit 12 is configured to drive the switching elements Q1 and Q2 in a complementary manner.
  • the snubber circuit 14 is connected between the input terminal T1 and the input terminal T2 of the series circuit 10.
  • the snubber circuit 14 is provided to absorb the surge voltage generated during the switching operation of the switching elements Q1 and Q2.
  • the snubber circuit 14 includes a capacitor 16. The capacitance of the capacitor 16 is determined according to the current flowing through the switching elements Q1 and Q2.
  • the voltage between the collector C1 of the switching element Q1 and the emitter E2 of the switching element Q2 is defined as the voltage V1
  • the voltage between the collector C2 and the emitter E2 of the switching element Q2 is defined as the voltage V2.
  • the current flowing between the collector C1 and the emitter E1 of the switching element Q1 is the current I1
  • the voltage between the terminals of the capacitor 16 of the snubber circuit 14 is the voltage Vs
  • the current flowing through the capacitor 16 is the current Is.
  • FIG. 2 is a diagram showing waveforms of voltage V1 and current I1 when the switching element Q1 is turned off.
  • the voltage V1 is equivalent to the voltage Vs between the terminals of the capacitor 16.
  • the capacitor 16 of the snubber circuit 14 and the parasitic inductance 18 to 20 exist. Due to the resonance with, the voltage V1 vibrates after the switching element Q1 is turned off. If the switching element Q1 is turned on by receiving an on command from the control device while the voltage vibration remains, the voltage vibration may be amplified depending on the turn-on timing. In this case, if the voltage applied between the collector and the emitter of the switching element exceeds the withstand voltage of the switching element, the switching elements Q1 and Q2 may be destroyed.
  • the semiconductor device described in Patent Document 1 sets the phase of the voltage detection circuit that detects the voltage across the snubber circuit and the phase of the vibration component of the detection signal output from the voltage detection circuit. It includes a phase detection circuit for detection, and is configured to control the timing of the switching operation of the switching element based on the output of the phase detection circuit.
  • the drive circuit controls the timing of the switching operation of the switching element so that the voltage vibrations are superimposed in the opposite phase based on the output of the phase detection circuit.
  • a semiconductor device capable of controlling the timing of turning on the switching element Q1 so as to attenuate the voltage vibration generated at the time of turning off of the switching element Q1 is provided by a simpler configuration.
  • the timing at which the switching element Q1 is turned on after being turned off at the time t0 is set to a plurality of times t1 to Set t7.
  • the switching element Q2 is fixed in the off state.
  • the time t0 at which the voltage V1 starts to increase from the reference voltage is set to phase 0 °
  • the timing at which the voltage V1 decreases to become the reference voltage is set to phase 180 ° (1/2 cycle). ..
  • the phase is set to 360 ° (1 cycle) when the voltage V1 changes from decreasing to increasing and becomes the reference voltage again.
  • the period T of voltage vibration is determined by the capacitance of the capacitor 16 of the snubber circuit 14 and the parasitic inductances 18 to 20. That is, the period T of the voltage vibration is a fixed value determined by the circuit configuration of the semiconductor device.
  • the time difference between time t2 and time t0 is shorter than 1/2 cycle, and the time difference between time t4 and time t0 is longer than 1/2 cycle.
  • the time difference between the time t5 and the time t0 is shorter than one cycle, and the time difference between the time t7 and the time t0 is longer than one cycle.
  • FIG. 4 is a diagram showing waveforms of current I1 and voltages V1 and V2 when the switching element Q1 is turned on at time t1 in FIG.
  • a surge voltage is generated again at the voltage V1
  • voltage vibration occurs.
  • the peak value of the voltage vibration that appears immediately after the turn-on changes depending on the turn-on timing, as shown below.
  • FIG. 5 is a diagram showing waveforms of current I1 and voltages V1 and V2 when the switching element Q1 is turned on at time t2 in FIG. As shown in FIG. 5, when the switching element Q1 is turned on at the time t2, the peak value of the voltage vibration appearing immediately after the time t1 becomes larger than the peak value of the voltage vibration appearing immediately after the time t0.
  • FIG. 6 is a diagram showing waveforms of current I1 and voltages V1 and V2 when the switching element Q1 is turned on at time t3 in FIG.
  • the peak value of the voltage vibration appearing immediately after the time t2 becomes larger than the peak value of the voltage vibration appearing immediately after the time t0.
  • the peak value of the voltage signal appearing immediately after the turn-on is larger than that in FIG.
  • FIG. 7 is a diagram showing waveforms of current I1 and voltages V1 and V2 when the switching element Q1 is turned on at time t4 in FIG. As shown in FIG. 7, when the switching element Q1 is turned on at the time t4, the peak value of the voltage vibration appearing immediately after the time t4 becomes larger than the peak value of the voltage vibration appearing immediately after the time t0.
  • FIG. 8 is a diagram showing waveforms of current I1 and voltages V1 and V2 when the switching element Q1 is turned on at time t5 in FIG. As shown in FIG. 8, when the switching element Q1 is turned on at the time t5, the peak value of the voltage vibration appearing immediately after the time t5 becomes smaller than the peak value of the voltage vibration appearing immediately after the time t0.
  • FIG. 9 is a diagram showing waveforms of the current I1 and the voltages V1 and V2 when the switching element Q1 is turned on at the time t6 of FIG.
  • the peak value of the voltage vibration appearing immediately after the time t6 becomes smaller than the peak value of the voltage vibration appearing immediately after the time t0.
  • the peak value of the voltage signal appearing immediately after the turn-on is smaller than that in FIG.
  • FIG. 10 is a diagram showing waveforms of current I1 and voltages V1 and V2 when the switching element Q1 is turned on at time t7 in FIG. As shown in FIG. 10, when the switching element Q1 is turned on at the time t7, the peak value of the voltage vibration appearing immediately after the time t7 becomes larger than the peak value of the voltage vibration appearing immediately after the time t0.
  • n is an integer of 0 or more.
  • the time for turning off is set so as to have a time difference corresponding to (3/4 + n) times larger than (3/4 + n) times the voltage vibration cycle T and less than (5/4 + n) times the turn-off time t0. If so, it was confirmed that the voltage vibration was attenuated after the turn-on.
  • the times t2, t3, and t4 all correspond to the timing when the voltage V1 decreases from the positive peak value of the voltage vibration toward the negative peak value.
  • the times t5, t6, and t7 all correspond to the timing at which the voltage V1 increases from the negative peak value of the voltage vibration toward the positive peak value. Therefore, the inventors of the present application have considered the relationship between the behavior (increase / decrease) of the voltage V1 at the timing of turning on the switching element Q1 and the amplification / attenuation of the voltage vibration. As a result, the following findings were obtained.
  • FIG. 11 is a diagram showing waveforms of voltage and current when voltage vibration is amplified after the switching element Q1 is turned on.
  • 11 (A) shows the waveforms of the voltages V1 and V2
  • FIG. 11 (B) shows the waveform of the current I1
  • FIG. 11 (C) shows the waveform of the current Is.
  • the current Is is positive in the direction of flowing into the capacitor 16 of the snubber circuit 14 and negative in the direction of flowing out of the capacitor 16.
  • the time toff is the timing when the switching element Q1 is turned off
  • the time ton is the timing when the switching element Q1 is turned on.
  • FIG. 12 is a diagram showing voltage and current waveforms when the voltage vibration is attenuated after the switching element Q1 is turned on.
  • 12 (A) shows the waveforms of the voltages V1 and V2
  • FIG. 12 (B) shows the waveform of the current I1
  • FIG. 12 (C) shows the waveform of the current Is. Similar to FIG. 11C, the current Is has a positive direction in the direction of flowing into the capacitor 16 of the snubber circuit 14 and a negative direction in the direction of flowing out from the capacitor 16.
  • the time toff is the timing at which the switching element Q1 is turned off
  • the time ton is the timing at which the switching element Q1 is turned on.
  • the snubber circuit 14 since the snubber circuit 14 has the capacitor 16, the phase of the voltage V1 ( ⁇ voltage Vs) is delayed by about ⁇ / 2 with respect to the phase of the current Is. Therefore, at the timing when the voltage V1 increases from the negative peak value of the voltage vibration toward the positive peak value, the current Is shows a value close to the positive peak value.
  • the switching element Q1 When the switching element Q1 is turned on at this timing, the amplitude of the current Is is attenuated as shown in FIG. 12C, so that the amplitude of the voltage V1 is attenuated, and as a result, the voltage vibration is attenuated.
  • the amplification of the voltage vibration can be attenuated by turning on the switching element at the timing when the voltage is increasing in the voltage vibration caused by the turn-off of the switching element.
  • the voltage vibration can be attenuated by turning off the switching element at the timing when the voltage is increasing in the voltage vibration generated by the turn-on of the switching element.
  • the timing for turning on (or turning off) the switching element described above can be set by using the period of voltage vibration determined by the capacitance of the capacitor 16 of the snubber circuit 14 and the parasitic inductance of the wiring or the like. Therefore, the drive circuit 12 can be configured to turn on (or turn off) the switching element at a timing when a predetermined time elapses from the timing when the switching element is turned off (or turn on).
  • the predetermined time can be set in advance using the period of voltage vibration.
  • the drive circuit 12 receives an on command (or an off command) of the switching element from the control device, the drive circuit 12 turns on (or turns on (or off) the switching element at a timing when the elapsed time from the timing at which the switching element was turned off immediately before reaches a predetermined time. Turn off).
  • a suitable switching timing capable of attenuating the voltage vibration is controlled without using a voltage detection circuit for detecting the voltage across the snubber circuit and a phase detection circuit for detecting the phase of the voltage vibration. can do. Therefore, it is possible to realize a semiconductor device capable of controlling the timing of switching the switching element so as to attenuate the voltage vibration generated when the switching element is switched with a simple configuration.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)

Abstract

La présente invention concerne un dispositif à semi-conducteur qui comprend : un élément de commutation à semi-conducteur ; un circuit d'attaque qui attaque l'élément de commutation à semi-conducteur ; et un circuit d'amortissement qui supprime une surtension générée lors de la commutation de l'élément de commutation à semi-conducteur. Le circuit d'attaque est configuré de telle sorte que l'élément de commutation à semi-conducteur est commuté au moment où un temps prescrit s'est écoulé depuis le moment où l'élément de commutation à semi-conducteur a été commuté. Le temps prescrit est réglé sur la base du moment auquel la tension augmente en raison d'une oscillation de tension provoquée par la commutation de l'élément de commutation à semi-conducteur.
PCT/JP2019/022125 2019-06-04 2019-06-04 Dispositif à semi-conducteur WO2020245900A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2019562428A JPWO2020245900A1 (ja) 2019-06-04 2019-06-04 半導体装置
PCT/JP2019/022125 WO2020245900A1 (fr) 2019-06-04 2019-06-04 Dispositif à semi-conducteur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/022125 WO2020245900A1 (fr) 2019-06-04 2019-06-04 Dispositif à semi-conducteur

Publications (1)

Publication Number Publication Date
WO2020245900A1 true WO2020245900A1 (fr) 2020-12-10

Family

ID=73651955

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/022125 WO2020245900A1 (fr) 2019-06-04 2019-06-04 Dispositif à semi-conducteur

Country Status (2)

Country Link
JP (1) JPWO2020245900A1 (fr)
WO (1) WO2020245900A1 (fr)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1066356A (ja) * 1996-08-13 1998-03-06 Fuji Electric Co Ltd 電力変換装置のスナバ回路
JP2007143336A (ja) * 2005-11-21 2007-06-07 Fuji Electric Device Technology Co Ltd 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1066356A (ja) * 1996-08-13 1998-03-06 Fuji Electric Co Ltd 電力変換装置のスナバ回路
JP2007143336A (ja) * 2005-11-21 2007-06-07 Fuji Electric Device Technology Co Ltd 半導体装置

Also Published As

Publication number Publication date
JPWO2020245900A1 (ja) 2021-09-13

Similar Documents

Publication Publication Date Title
US20150028923A1 (en) High efficiency gate drive circuit for power transistors
US20060044025A1 (en) Power transistor control device
WO2014097485A1 (fr) Circuit de protection contre une excitation, module semi-conducteur et automobile
JP5736243B2 (ja) 電源回路
JPWO2014097486A1 (ja) スイッチング素子駆動回路、パワーモジュールおよび自動車
JP2009055696A (ja) 半導体素子のゲート駆動回路およびゲート駆動方法
US9948289B2 (en) System and method for a gate driver
JP6090007B2 (ja) 駆動回路
JP5254386B2 (ja) ゲート駆動回路、およびパワー半導体モジュール
JP5925434B2 (ja) ゲート駆動回路
JP5533313B2 (ja) レベルシフト回路及びスイッチング電源装置
JP5002948B2 (ja) 半導体装置
JP3409994B2 (ja) 自己消弧形素子駆動回路
JP2008043003A (ja) 電圧駆動型半導体素子のゲート駆動装置
WO2020245900A1 (fr) Dispositif à semi-conducteur
US20220190706A1 (en) Driving apparatus, semiconductor apparatus, and driving method
JP5471862B2 (ja) レベルシフト回路及びスイッチング電源装置
JP2007104739A (ja) 電力用半導体モジュールの駆動回路
JP5563050B2 (ja) ゲート駆動回路、およびパワー半導体モジュール
JP2014090316A (ja) ゲート駆動回路
JP5862232B2 (ja) 過電圧保護回路
JP5369987B2 (ja) ゲート駆動回路
JPH10209832A (ja) 半導体スイッチ回路
JP2007089294A (ja) 半導体電力変換装置
JP6191017B2 (ja) ハーフブリッジ回路及びハーフブリッジ回路から構成されるフルブリッジ回路及び3相インバータ回路

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2019562428

Country of ref document: JP

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19931994

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19931994

Country of ref document: EP

Kind code of ref document: A1